begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.7.1-dev0">
  12       Active development ...
  13       CMSIS-Core(M):
  14        - updated GCC LinkerDescription, GCC Assembler startup
  15       CMSIS-DSP:
  16        - Purged pre-built libs from Git
  17       CMSIS-RTOS:
  18        - RTX4: Purged pre-built libs from Git
  19       CMSIS-RTOS2:
  20        - RTX5: Purged pre-built libs from Git
  21     </release>
  22     <release version="5.7.0" date="2020-04-09">
  23       CMSIS-Build: 0.9.0 (beta)
  24         - Draft for CMSIS Project description (CPRJ)
  25       CMSIS-Core(M): 5.4.0 (see revision history for details)
  26         - Cortex-M55 cpu support
  27         - Enhanced MVE support for Armv8.1-MML
  28         - Fixed device config define checks.
  29         - L1 Cache functions for Armv7-M and later
  30       CMSIS-Core(A): 1.2.0 (see revision history for details)
  31         - Fixed GIC_SetPendingIRQ to use GICD_SGIR
  32         - Added missing DSP intrinsics
  33         - Reworked assembly intrinsics: volatile, barriers and clobber
  34       CMSIS-DSP: 1.8.0 (see revision history for details)
  35         - Added new functions and function groups
  36         - Added MVE support
  37       CMSIS-NN: 1.3.0 (see revision history for details)
  38         - Added MVE support
  39         - Further optimizations for kernels using DSP extension
  40       CMSIS-RTOS2:
  41         - RTX 5.5.2 (see revision history for details)
  42       CMSIS-Driver: 2.8.0
  43         - Added VIO API 0.1.0 (Preview)
  44         - removed volatile from status related typedefs in APIs
  45         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  46       CMSIS-Pack: 1.6.3 (see revision history for details)
  47         - deprecating all types specific to cpdsc format. Cpdsc is replaced by Cprj with dedicated schema.
  48       Devices:
  49         - ARMCM55 device
  50         - ARMv81MML startup code recognizing __MVE_USED macro
  51         - Refactored vector table references for all Cortex-M devices
  52         - Reworked ARMCM* C-StartUp files.
  53         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  54       Utilities:
  55         Attention: Linux binaries moved to Linux64 folder!
  56         - SVDConv 3.3.35
  57         - PackChk 1.3.89
  58     </release>
  59     <release version="5.6.0" date="2019-07-10">
  60       CMSIS-Core(M): 5.3.0 (see revision history for details)
  61         - Added provisions for compiler-independent C startup code.
  62       CMSIS-Core(A): 1.1.4 (see revision history for details)
  63         - Fixed __FPU_Enable.
  64       CMSIS-DSP: 1.7.0 (see revision history for details)
  65         - New Neon versions of f32 functions
  66         - Python wrapper
  67         - Preliminary cmake build
  68         - Compilation flags for FFTs
  69         - Changes to arm_math.h
  70       CMSIS-NN: 1.2.0 (see revision history for details)
  71         - New function for depthwise convolution with asymmetric quantization.
  72         - New support functions for requantization.
  73       CMSIS-RTOS:
  74         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  75       CMSIS-RTOS2:
  76         - RTX 5.5.1 (see revision history for details)
  77       CMSIS-Driver: 2.7.1
  78         - WiFi Interface API 1.0.0
  79       Devices:
  80         - Generalized C startup code for all Cortex-M family devices.
  81         - Updated Cortex-A default memory regions and MMU configurations
  82         - Moved Cortex-A memory and system config files to avoid include path issues
  83     </release>
  84     <release version="5.5.1" date="2019-03-20">
  85       The following folders are deprecated
  86         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  87
  88       CMSIS-Core(M): 5.2.1 (see revision history for details)
  89         - Fixed compilation issue in cmsis_armclang_ltm.h
  90     </release>
  91     <release version="5.5.0" date="2019-03-18">
  92       The following folders have been removed:
  93         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  94         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  95       The following folders are deprecated
  96         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  97
  98       CMSIS-Core(M): 5.2.0 (see revision history for details)
  99         - Reworked Stack/Heap configuration for ARM startup files.
 100         - Added Cortex-M35P device support.
 101         - Added generic Armv8.1-M Mainline device support.
 102       CMSIS-Core(A): 1.1.3 (see revision history for details)
 103       CMSIS-DSP: 1.6.0 (see revision history for details)
 104         - reworked DSP library source files
 105         - reworked DSP library documentation
 106         - Changed DSP folder structure
 107         - moved DSP libraries to folder ./DSP/Lib
 108         - ARM DSP Libraries are built with ARMCLANG
 109         - Added DSP Libraries Source variant
 110       CMSIS-RTOS2:
 111         - RTX 5.5.0 (see revision history for details)
 112       CMSIS-Driver: 2.7.0
 113         - Added WiFi Interface API 1.0.0-beta
 114         - Added components for project specific driver implementations
 115       CMSIS-Pack: 1.6.0 (see revision history for details)
 116       Devices:
 117         - Added Cortex-M35P and ARMv81MML device templates.
 118         - Fixed C-Startup Code for GCC (aligned with other compilers)
 119       Utilities:
 120         - SVDConv 3.3.25
 121         - PackChk 1.3.82
 122     </release>
 123     <release version="5.4.0" date="2018-08-01">
 124       Aligned pack structure with repository.
 125       The following folders are deprecated:
 126         - CMSIS/Include/
 127         - CMSIS/DSP_Lib/
 128
 129       CMSIS-Core(M): 5.1.2 (see revision history for details)
 130         - Added Cortex-M1 support (beta).
 131       CMSIS-Core(A): 1.1.2 (see revision history for details)
 132       CMSIS-NN: 1.1.0
 133         - Added new math functions.
 134       CMSIS-RTOS2:
 135         - API 2.1.3 (see revision history for details)
 136         - RTX 5.4.0 (see revision history for details)
 137           * Updated exception handling on Cortex-A
 138       CMSIS-Driver:
 139         - Flash Driver API V2.2.0
 140       Utilities:
 141         - SVDConv 3.3.21
 142         - PackChk 1.3.71
 143     </release>
 144     <release version="5.3.0" date="2018-02-22">
 145       Updated Arm company brand.
 146       CMSIS-Core(M): 5.1.1 (see revision history for details)
 147       CMSIS-Core(A): 1.1.1 (see revision history for details)
 148       CMSIS-DAP: 2.0.0 (see revision history for details)
 149       CMSIS-NN: 1.0.0
 150         - Initial contribution of the bare metal Neural Network Library.
 151       CMSIS-RTOS2:
 152         - RTX 5.3.0 (see revision history for details)
 153         - OS Tick API 1.0.1
 154     </release>
 155     <release version="5.2.0" date="2017-11-16">
 156       CMSIS-Core(M): 5.1.0 (see revision history for details)
 157         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 158         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 159       CMSIS-Core(A): 1.1.0 (see revision history for details)
 160         - Added compiler_iccarm.h.
 161         - Added additional access functions for physical timer.
 162       CMSIS-DAP: 1.2.0 (see revision history for details)
 163       CMSIS-DSP: 1.5.2 (see revision history for details)
 164       CMSIS-Driver: 2.6.0 (see revision history for details)
 165         - CAN Driver API V1.2.0
 166         - NAND Driver API V2.3.0
 167       CMSIS-RTOS:
 168         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 169       CMSIS-RTOS2:
 170         - API 2.1.2 (see revision history for details)
 171         - RTX 5.2.3 (see revision history for details)
 172       Devices:
 173         - Added GCC startup and linker script for Cortex-A9.
 174         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 175         - Added IAR startup code for Cortex-A9
 176     </release>
 177     <release version="5.1.1" date="2017-09-19">
 178       CMSIS-RTOS2:
 179       - RTX 5.2.1 (see revision history for details)
 180     </release>
 181     <release version="5.1.0" date="2017-08-04">
 182       CMSIS-Core(M): 5.0.2 (see revision history for details)
 183       - Changed Version Control macros to be core agnostic.
 184       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 185       CMSIS-Core(A): 1.0.0 (see revision history for details)
 186       - Initial release
 187       - IRQ Controller API 1.0.0
 188       CMSIS-Driver: 2.05 (see revision history for details)
 189       - All typedefs related to status have been made volatile.
 190       CMSIS-RTOS2:
 191       - API 2.1.1 (see revision history for details)
 192       - RTX 5.2.0 (see revision history for details)
 193       - OS Tick API 1.0.0
 194       CMSIS-DSP: 1.5.2 (see revision history for details)
 195       - Fixed GNU Compiler specific diagnostics.
 196       CMSIS-Pack: 1.5.0 (see revision history for details)
 197       - added System Description File (*.SDF) Format
 198       CMSIS-Zone: 0.0.1 (Preview)
 199       - Initial specification draft
 200     </release>
 201     <release version="5.0.1" date="2017-02-03">
 202       Package Description:
 203       - added taxonomy for Cclass RTOS
 204       CMSIS-RTOS2:
 205       - API 2.1   (see revision history for details)
 206       - RTX 5.1.0 (see revision history for details)
 207       CMSIS-Core: 5.0.1 (see revision history for details)
 208       - Added __PACKED_STRUCT macro
 209       - Added uVisior support
 210       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 211       - Updated template for secure main function (main_s.c)
 212       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 213       CMSIS-DSP: 1.5.1 (see revision history for details)
 214       - added ARMv8M DSP libraries.
 215       CMSIS-Pack:1.4.9 (see revision history for details)
 216       - added Pack Index File specification and schema file
 217     </release>
 218     <release version="5.0.0" date="2016-11-11">
 219       Changed open source license to Apache 2.0
 220       CMSIS_Core:
 221        - Added support for Cortex-M23 and Cortex-M33.
 222        - Added ARMv8-M device configurations for mainline and baseline.
 223        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 224        - Added cmsis_compiler.h to unify compiler behaviour.
 225        - Updated function SCB_EnableICache (for Cortex-M7).
 226        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 227       CMSIS-RTOS:
 228         - bug fix in RTX 4.82 (see revision history for details)
 229       CMSIS-RTOS2:
 230         - new API including compatibility layer to CMSIS-RTOS
 231         - reference implementation based on RTX5
 232         - supports all Cortex-M variants including TrustZone for ARMv8-M
 233       CMSIS-SVD:
 234        - reworked SVD format documentation
 235        - removed SVD file database documentation as SVD files are distributed in packs
 236        - updated SVDConv for Win32 and Linux
 237       CMSIS-DSP:
 238        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 239        - Added DSP libraries build projects to CMSIS pack.
 240     </release>
 241     <release version="4.5.0" date="2015-10-28">
 242       - CMSIS-Core     4.30.0  (see revision history for details)
 243       - CMSIS-DAP      1.1.0   (unchanged)
 244       - CMSIS-Driver   2.04.0  (see revision history for details)
 245       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 246       - CMSIS-Pack     1.4.1   (see revision history for details)
 247       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 248       - CMSIS-SVD      1.3.1   (see revision history for details)
 249     </release>
 250     <release version="4.4.0" date="2015-09-11">
 251       - CMSIS-Core     4.20   (see revision history for details)
 252       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 253       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 254       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 255       - CMSIS-RTOS
 256         -- API         1.02   (unchanged)
 257         -- RTX         4.79   (see revision history for details)
 258       - CMSIS-SVD      1.3.0  (see revision history for details)
 259       - CMSIS-DAP      1.1.0  (extended with SWO support)
 260     </release>
 261     <release version="4.3.0" date="2015-03-20">
 262       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 263       - CMSIS-DSP      1.4.5  (see revision history for details)
 264       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 265       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 266       - CMSIS-RTOS
 267         -- API         1.02   (unchanged)
 268         -- RTX         4.78   (see revision history for details)
 269       - CMSIS-SVD      1.2    (unchanged)
 270     </release>
 271     <release version="4.2.0" date="2014-09-24">
 272       Adding Cortex-M7 support
 273       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 274       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 275       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 276       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 277       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 278     </release>
 279     <release version="4.1.1" date="2014-06-30">
 280       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 281     </release>
 282     <release version="4.1.0" date="2014-06-12">
 283       - CMSIS-Driver   2.02  (incompatible update)
 284       - CMSIS-Pack     1.3   (see revision history for details)
 285       - CMSIS-DSP      1.4.2 (unchanged)
 286       - CMSIS-Core     3.30  (unchanged)
 287       - CMSIS-RTOS RTX 4.74  (unchanged)
 288       - CMSIS-RTOS API 1.02  (unchanged)
 289       - CMSIS-SVD      1.10  (unchanged)
 290       PACK:
 291       - removed G++ specific files from PACK
 292       - added Component Startup variant "C Startup"
 293       - added Pack Checking Utility
 294       - updated conditions to reflect tool-chain dependency
 295       - added Taxonomy for Graphics
 296       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 297     </release>
 298     <!-- release version="4.0.0">
 299       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 300       - CMSIS-Pack     1.1   Preliminary
 301       - CMSIS-DSP      1.4.2 (see revision history for details)
 302       - CMSIS-Core     3.30  (see revision history for details)
 303       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 304       - CMSIS-RTOS API 1.02  (unchanged)
 305       - CMSIS-SVD      1.10  (unchanged)
 306     </release -->
 307     <release version="3.20.4" date="2014-02-20">
 308       - CMSIS-RTOS 4.74 (see revision history for details)
 309       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 310     </release>
 311     <!-- release version="3.20.3">
 312       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 313       - CMSIS-RTOS 4.73 (see revision history for details)
 314     </release -->
 315     <!-- release version="3.20.2">
 316       - CMSIS-Pack documentation has been added
 317       - CMSIS-Drivers header and documentation have been added to PACK
 318       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 319     </release -->
 320     <!-- release version="3.20.1">
 321       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 322       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 323     </release -->
 324     <!-- release version="3.20.0">
 325       The software portions that are deployed in the application program are now under a BSD license which allows usage
 326       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 327       The individual components have been update as listed below:
 328       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 329       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 330       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 331       - CMSIS-SVD is unchanged.
 332     </release -->
 333   </releases>
 334
 335   <taxonomy>
 336     <description Cclass="Audio">Software components for audio processing</description>
 337     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 338     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 339     <description Cclass="Compiler">Compiler Software Extensions</description>
 340     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 341     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 342     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 343     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 344     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 345     <description Cclass="File System">File Drive Support and File System</description>
 346     <description Cclass="IoT Client">IoT cloud client connector</description>
 347     <description Cclass="IoT Service">IoT specific services</description>
 348     <description Cclass="IoT Utility">IoT specific software utility</description>
 349     <description Cclass="Graphics">Graphical User Interface</description>
 350     <description Cclass="Network">Network Stack using Internet Protocols</description>
 351     <description Cclass="RTOS">Real-time Operating System</description>
 352     <description Cclass="Security">Encryption for secure communication or storage</description>
 353     <description Cclass="USB">Universal Serial Bus Stack</description>
 354     <description Cclass="Utility">Generic software utility components</description>
 355   </taxonomy>
 356
 357   <devices>
 358     <!-- ******************************  Cortex-M0  ****************************** -->
 359     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 360       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 361       <description>
 362 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 363 - simple, easy-to-use programmers model
 364 - highly efficient ultra-low power operation
 365 - excellent code density
 366 - deterministic, high-performance interrupt handling
 367 - upward compatibility with the rest of the Cortex-M processor family.
 368       </description>
 369       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 370       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 371       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 372       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 373
 374       <device Dname="ARMCM0">
 375         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 376         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 377       </device>
 378     </family>
 379
 380     <!-- ******************************  Cortex-M0P  ****************************** -->
 381     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 382       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 383       <description>
 384 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 385 - simple, easy-to-use programmers model
 386 - highly efficient ultra-low power operation
 387 - excellent code density
 388 - deterministic, high-performance interrupt handling
 389 - upward compatibility with the rest of the Cortex-M processor family.
 390       </description>
 391       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 392       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 393       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 394       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 395
 396       <device Dname="ARMCM0P">
 397         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 398         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 399       </device>
 400
 401       <device Dname="ARMCM0P_MPU">
 402         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 403         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 404       </device>
 405     </family>
 406
 407     <!-- ******************************  Cortex-M1  ****************************** -->
 408     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 409       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 410       <description>
 411 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 412 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 413       </description>
 414       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 415       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 416       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 417       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 418
 419       <device Dname="ARMCM1">
 420         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 421         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 422       </device>
 423     </family>
 424
 425     <!-- ******************************  Cortex-M3  ****************************** -->
 426     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 427       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 428       <description>
 429 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 430 - simple, easy-to-use programmers model
 431 - highly efficient ultra-low power operation
 432 - excellent code density
 433 - deterministic, high-performance interrupt handling
 434 - upward compatibility with the rest of the Cortex-M processor family.
 435       </description>
 436       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 437       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 438       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 439       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 440
 441       <device Dname="ARMCM3">
 442         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 443         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 444       </device>
 445     </family>
 446
 447     <!-- ******************************  Cortex-M4  ****************************** -->
 448     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 449       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 450       <description>
 451 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 452 - simple, easy-to-use programmers model
 453 - highly efficient ultra-low power operation
 454 - excellent code density
 455 - deterministic, high-performance interrupt handling
 456 - upward compatibility with the rest of the Cortex-M processor family.
 457       </description>
 458       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 459       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 460       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 461       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 462
 463       <device Dname="ARMCM4">
 464         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 465         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 466       </device>
 467
 468       <device Dname="ARMCM4_FP">
 469         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 470         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 471       </device>
 472     </family>
 473
 474     <!-- ******************************  Cortex-M7  ****************************** -->
 475     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 476       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 477       <description>
 478 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 479 - simple, easy-to-use programmers model
 480 - highly efficient ultra-low power operation
 481 - excellent code density
 482 - deterministic, high-performance interrupt handling
 483 - upward compatibility with the rest of the Cortex-M processor family.
 484       </description>
 485       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 486       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 487       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 488       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 489
 490       <device Dname="ARMCM7">
 491         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 492         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 493       </device>
 494
 495       <device Dname="ARMCM7_SP">
 496         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 497         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 498       </device>
 499
 500       <device Dname="ARMCM7_DP">
 501         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 502         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 503       </device>
 504     </family>
 505
 506     <!-- ******************************  Cortex-M23  ********************** -->
 507     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 508       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 509       <description>
 510 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 511 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 512 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 513       </description>
 514       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 515       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 516       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 517       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 518       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 519       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 520
 521       <device Dname="ARMCM23">
 522         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 523         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 524       </device>
 525
 526       <device Dname="ARMCM23_TZ">
 527         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 528         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 529       </device>
 530     </family>
 531
 532     <!-- ******************************  Cortex-M33  ****************************** -->
 533     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 534       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 535       <description>
 536 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 537 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 538       </description>
 539       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 540       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 541       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 542       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 543       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 544       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 545
 546       <device Dname="ARMCM33">
 547         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 548         <description>
 549           no DSP Instructions, no Floating Point Unit, no TrustZone
 550         </description>
 551         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 552       </device>
 553
 554       <device Dname="ARMCM33_TZ">
 555         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 556         <description>
 557           no DSP Instructions, no Floating Point Unit, TrustZone
 558         </description>
 559         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 560       </device>
 561
 562       <device Dname="ARMCM33_DSP_FP">
 563         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 564         <description>
 565           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 566         </description>
 567         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 568       </device>
 569
 570       <device Dname="ARMCM33_DSP_FP_TZ">
 571         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 572         <description>
 573           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 574         </description>
 575         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 576       </device>
 577     </family>
 578
 579     <!-- ******************************  Cortex-M35P  ****************************** -->
 580     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 581       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 582       <description>
 583 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 584 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 585       </description>
 586
 587       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 588       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 589       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 590       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 591       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 592       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 593
 594       <device Dname="ARMCM35P">
 595         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 596         <description>
 597           no DSP Instructions, no Floating Point Unit, no TrustZone
 598         </description>
 599         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 600       </device>
 601
 602       <device Dname="ARMCM35P_TZ">
 603         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 604         <description>
 605           no DSP Instructions, no Floating Point Unit, TrustZone
 606         </description>
 607         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 608       </device>
 609
 610       <device Dname="ARMCM35P_DSP_FP">
 611         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 612         <description>
 613           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 614         </description>
 615         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 616       </device>
 617
 618       <device Dname="ARMCM35P_DSP_FP_TZ">
 619         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 620         <description>
 621           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 622         </description>
 623         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 624       </device>
 625     </family>
 626
 627     <!-- ******************************  Cortex-M55  ****************************** -->
 628     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 629       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 630       <description>
 631 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 632 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 633 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 634       </description>
 635
 636       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 637       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 638       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 639       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 640       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 641       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 642
 643       <device Dname="ARMCM55">
 644         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 645         <description>
 646           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 647         </description>
 648         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 649       </device>
 650     </family>
 651
 652     <!-- ******************************  ARMSC000  ****************************** -->
 653     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 654       <description>
 655 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 656 - simple, easy-to-use programmers model
 657 - highly efficient ultra-low power operation
 658 - excellent code density
 659 - deterministic, high-performance interrupt handling
 660       </description>
 661       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 662       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 663       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 664       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 665
 666       <device Dname="ARMSC000">
 667         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 668         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 669       </device>
 670     </family>
 671
 672     <!-- ******************************  ARMSC300  ****************************** -->
 673     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 674       <description>
 675 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 676 - simple, easy-to-use programmers model
 677 - highly efficient ultra-low power operation
 678 - excellent code density
 679 - deterministic, high-performance interrupt handling
 680       </description>
 681       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 682       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 683       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 684       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 685
 686       <device Dname="ARMSC300">
 687         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 688         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 689       </device>
 690     </family>
 691
 692     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 693     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 694       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 695       <description>
 696 Armv8-M Baseline based device with TrustZone
 697       </description>
 698       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 699       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 700       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 701       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 702       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 703       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 704
 705       <device Dname="ARMv8MBL">
 706         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 707         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 708       </device>
 709     </family>
 710
 711     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 712     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 713       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 714       <description>
 715 Armv8-M Mainline based device with TrustZone
 716       </description>
 717       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 718       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 719       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 720       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 721       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 722       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 723
 724       <device Dname="ARMv8MML">
 725         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 726         <description>
 727           no DSP Instructions, no Floating Point Unit, TrustZone
 728         </description>
 729         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 730       </device>
 731
 732       <device Dname="ARMv8MML_DSP">
 733         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 734         <description>
 735           DSP Instructions, no Floating Point Unit, TrustZone
 736         </description>
 737         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 738       </device>
 739
 740       <device Dname="ARMv8MML_SP">
 741         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 742         <description>
 743           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 744         </description>
 745         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 746       </device>
 747
 748       <device Dname="ARMv8MML_DSP_SP">
 749         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 750         <description>
 751           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 752         </description>
 753         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 754       </device>
 755
 756       <device Dname="ARMv8MML_DP">
 757         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 758         <description>
 759           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 760         </description>
 761         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 762       </device>
 763
 764       <device Dname="ARMv8MML_DSP_DP">
 765         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 766         <description>
 767           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 768         </description>
 769         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 770       </device>
 771     </family>
 772
 773     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 774     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 775       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 776       <description>
 777 Armv8.1-M Mainline based device with TrustZone and MVE
 778       </description>
 779       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 780       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 781       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 782       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 783       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 784       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 785
 786
 787       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 788         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 789         <description>
 790           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 791         </description>
 792         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 793       </device>
 794     </family>
 795
 796     <!-- ******************************  Cortex-A5  ****************************** -->
 797     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 798       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 799       <description>
 800 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 801 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 802 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 803       </description>
 804
 805       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 806       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 807       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 808       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 809
 810       <device Dname="ARMCA5">
 811         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 812         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 813       </device>
 814     </family>
 815
 816     <!-- ******************************  Cortex-A7  ****************************** -->
 817     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 818       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 819       <description>
 820 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 821 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 822 an optional integrated GIC, and an optional L2 cache controller.
 823       </description>
 824
 825       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 826       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 827       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 828       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 829
 830       <device Dname="ARMCA7">
 831         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 832         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 833       </device>
 834     </family>
 835
 836     <!-- ******************************  Cortex-A9  ****************************** -->
 837     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 838       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 839       <description>
 840 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 841 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 842 and 8-bit Java bytecodes in Jazelle state.
 843       </description>
 844
 845       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 846       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 847       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 848       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 849
 850       <device Dname="ARMCA9">
 851         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 852         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 853       </device>
 854     </family>
 855   </devices>
 856
 857
 858   <apis>
 859     <!-- CMSIS Device API -->
 860     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 861       <description>Device interrupt controller interface</description>
 862       <files>
 863         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 864       </files>
 865     </api>
 866     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 867       <description>RTOS Kernel system tick timer interface</description>
 868       <files>
 869         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 870       </files>
 871     </api>
 872     <!-- CMSIS-RTOS API -->
 873     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 874       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 875       <files>
 876         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 877       </files>
 878     </api>
 879     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 880       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 881       <files>
 882         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 883         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 884       </files>
 885     </api>
 886     <!-- CMSIS Driver API -->
 887     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 888       <description>USART Driver API for Cortex-M</description>
 889       <files>
 890         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 891         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 892       </files>
 893     </api>
 894     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 895       <description>SPI Driver API for Cortex-M</description>
 896       <files>
 897         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 898         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 899       </files>
 900     </api>
 901     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 902       <description>SAI Driver API for Cortex-M</description>
 903       <files>
 904         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 905         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 906       </files>
 907     </api>
 908     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 909       <description>I2C Driver API for Cortex-M</description>
 910       <files>
 911         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 912         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 913       </files>
 914     </api>
 915     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 916       <description>CAN Driver API for Cortex-M</description>
 917       <files>
 918         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 919         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 920       </files>
 921     </api>
 922     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 923       <description>Flash Driver API for Cortex-M</description>
 924       <files>
 925         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 926         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 927       </files>
 928     </api>
 929     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 930       <description>MCI Driver API for Cortex-M</description>
 931       <files>
 932         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 933         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 934       </files>
 935     </api>
 936     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 937       <description>NAND Flash Driver API for Cortex-M</description>
 938       <files>
 939         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 940         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 941       </files>
 942     </api>
 943     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 944       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 945       <files>
 946         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 947         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 948         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 949       </files>
 950     </api>
 951     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 952       <description>Ethernet MAC Driver API for Cortex-M</description>
 953       <files>
 954         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 955         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 956       </files>
 957     </api>
 958     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 959       <description>Ethernet PHY Driver API for Cortex-M</description>
 960       <files>
 961         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 962         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 963       </files>
 964     </api>
 965     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 966       <description>USB Device Driver API for Cortex-M</description>
 967       <files>
 968         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 969         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 970       </files>
 971     </api>
 972     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
 973       <description>USB Host Driver API for Cortex-M</description>
 974       <files>
 975         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 976         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 977       </files>
 978     </api>
 979     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
 980       <description>WiFi driver</description>
 981       <files>
 982         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 983         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 984       </files>
 985     </api>
 986     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
 987       <description>Virtual I/O</description>
 988       <files>
 989         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
 990         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
 991         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
 992       </files>
 993     </api>
 994   </apis>
 995
 996   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 997   <conditions>
 998     <!-- compiler -->
 999     <condition id="ARMCC6">
1000       <accept Tcompiler="ARMCC" Toptions="AC6"/>
1001       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1002     </condition>
1003     <condition id="ARMCC5">
1004       <require Tcompiler="ARMCC" Toptions="AC5"/>
1005     </condition>
1006     <condition id="ARMCC">
1007       <require Tcompiler="ARMCC"/>
1008     </condition>
1009     <condition id="GCC">
1010       <require Tcompiler="GCC"/>
1011     </condition>
1012     <condition id="IAR">
1013       <require Tcompiler="IAR"/>
1014     </condition>
1015     <condition id="ARMCC GCC">
1016       <accept Tcompiler="ARMCC"/>
1017       <accept Tcompiler="GCC"/>
1018     </condition>
1019     <condition id="ARMCC GCC IAR">
1020       <accept Tcompiler="ARMCC"/>
1021       <accept Tcompiler="GCC"/>
1022       <accept Tcompiler="IAR"/>
1023     </condition>
1024
1025     <!-- Arm architecture -->
1026     <condition id="ARMv6-M Device">
1027       <description>Armv6-M architecture based device</description>
1028       <accept Dcore="Cortex-M0"/>
1029       <accept Dcore="Cortex-M1"/>
1030       <accept Dcore="Cortex-M0+"/>
1031       <accept Dcore="SC000"/>
1032     </condition>
1033     <condition id="ARMv7-M Device">
1034       <description>Armv7-M architecture based device</description>
1035       <accept Dcore="Cortex-M3"/>
1036       <accept Dcore="Cortex-M4"/>
1037       <accept Dcore="Cortex-M7"/>
1038       <accept Dcore="SC300"/>
1039     </condition>
1040     <condition id="ARMv8-M Device">
1041       <description>Armv8-M architecture based device</description>
1042       <accept Dcore="ARMV8MBL"/>
1043       <accept Dcore="ARMV8MML"/>
1044       <accept Dcore="ARMV81MML"/>
1045       <accept Dcore="Cortex-M23"/>
1046       <accept Dcore="Cortex-M33"/>
1047       <accept Dcore="Cortex-M35P"/>
1048       <accept Dcore="Cortex-M55"/>
1049     </condition>
1050     <condition id="ARMv6_7-M Device">
1051       <description>Armv6_7-M architecture based device</description>
1052       <accept condition="ARMv6-M Device"/>
1053       <accept condition="ARMv7-M Device"/>
1054     </condition>
1055     <condition id="ARMv6_7_8-M Device">
1056       <description>Armv6_7_8-M architecture based device</description>
1057       <accept condition="ARMv6-M Device"/>
1058       <accept condition="ARMv7-M Device"/>
1059       <accept condition="ARMv8-M Device"/>
1060     </condition>
1061     <condition id="ARMv7-A Device">
1062       <description>Armv7-A architecture based device</description>
1063       <accept Dcore="Cortex-A5"/>
1064       <accept Dcore="Cortex-A7"/>
1065       <accept Dcore="Cortex-A9"/>
1066     </condition>
1067
1068     <condition id="TrustZone">
1069       <description>TrustZone</description>
1070       <require Dtz="TZ"/>
1071     </condition>
1072     <condition id="TZ Secure">
1073       <description>TrustZone (Secure)</description>
1074       <require Dtz="TZ"/>
1075       <require Dsecure="Secure"/>
1076     </condition>
1077     <condition id="TZ Non-secure">
1078       <description>TrustZone (Non-secure)</description>
1079       <require Dtz="TZ"/>
1080       <require Dsecure="Non-secure"/>
1081     </condition>
1082
1083     <!-- ARM core -->
1084     <condition id="CM0">
1085       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1086       <accept Dcore="Cortex-M0"/>
1087       <accept Dcore="Cortex-M0+"/>
1088       <accept Dcore="SC000"/>
1089     </condition>
1090     <condition id="CM1">
1091       <description>Cortex-M1</description>
1092       <require Dcore="Cortex-M1"/>
1093     </condition>
1094     <condition id="CM3">
1095       <description>Cortex-M3 or SC300 processor based device</description>
1096       <accept Dcore="Cortex-M3"/>
1097       <accept Dcore="SC300"/>
1098     </condition>
1099     <condition id="CM4">
1100       <description>Cortex-M4 processor based device</description>
1101       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1102     </condition>
1103     <condition id="CM4_FP">
1104       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1105       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1106       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1107       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1108     </condition>
1109     <condition id="CM7">
1110       <description>Cortex-M7 processor based device</description>
1111       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1112     </condition>
1113     <condition id="CM7_FP">
1114       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1115       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1116       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1117     </condition>
1118     <condition id="CM7_SP">
1119       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1120       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1121     </condition>
1122     <condition id="CM7_DP">
1123       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1124       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1125     </condition>
1126     <condition id="CM23">
1127       <description>Cortex-M23 processor based device</description>
1128       <require Dcore="Cortex-M23"/>
1129     </condition>
1130     <condition id="CM33">
1131       <description>Cortex-M33 processor based device</description>
1132       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1133     </condition>
1134     <condition id="CM33_FP">
1135       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1136       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1137     </condition>
1138     <condition id="CM35P">
1139       <description>Cortex-M35P processor based device</description>
1140       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1141     </condition>
1142     <condition id="CM35P_FP">
1143       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1144       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1145     </condition>
1146     <condition id="ARMv8MBL">
1147       <description>Armv8-M Baseline processor based device</description>
1148       <require Dcore="ARMV8MBL"/>
1149     </condition>
1150     <condition id="ARMv8MML">
1151       <description>Armv8-M Mainline processor based device</description>
1152       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1153     </condition>
1154     <condition id="ARMv8MML_FP">
1155       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1156       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1157       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1158     </condition>
1159
1160     <condition id="CM33_NODSP_NOFPU">
1161       <description>CM33, no DSP, no FPU</description>
1162       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1163     </condition>
1164     <condition id="CM33_DSP_NOFPU">
1165       <description>CM33, DSP, no FPU</description>
1166       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1167     </condition>
1168     <condition id="CM33_NODSP_SP">
1169       <description>CM33, no DSP, SP FPU</description>
1170       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1171     </condition>
1172     <condition id="CM33_DSP_SP">
1173       <description>CM33, DSP, SP FPU</description>
1174       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1175     </condition>
1176
1177     <condition id="CM35P_NODSP_NOFPU">
1178       <description>CM35P, no DSP, no FPU</description>
1179       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1180     </condition>
1181     <condition id="CM35P_DSP_NOFPU">
1182       <description>CM35P, DSP, no FPU</description>
1183       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1184     </condition>
1185     <condition id="CM35P_NODSP_SP">
1186       <description>CM35P, no DSP, SP FPU</description>
1187       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1188     </condition>
1189     <condition id="CM35P_DSP_SP">
1190       <description>CM35P, DSP, SP FPU</description>
1191       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1192     </condition>
1193
1194     <condition id="CM55_NOFPU_NOMVE">
1195       <description>Cortex-M55, no FPU, no MVE</description>
1196       <require Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="NO_MVE"/>
1197     </condition>
1198     <condition id="CM55_NOFPU_MVE">
1199       <description>Cortex-M55, no FPU, MVE</description>
1200       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="MVE"/>
1201       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="FP_MVE"/>
1202     </condition>
1203     <condition id="CM55_FPU">
1204       <description>Cortex-M55, FPU</description>
1205       <accept  Dcore="Cortex-M55" Dfpu="SP_FPU"/>
1206       <accept  Dcore="Cortex-M55" Dfpu="DP_FPU"/>
1207     </condition>
1208
1209     <condition id="ARMv8MML_NODSP_NOFPU">
1210       <description>Armv8-M Mainline, no DSP, no FPU</description>
1211       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1212     </condition>
1213     <condition id="ARMv8MML_DSP_NOFPU">
1214       <description>Armv8-M Mainline, DSP, no FPU</description>
1215       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1216     </condition>
1217     <condition id="ARMv8MML_NODSP_SP">
1218       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1219       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1220     </condition>
1221     <condition id="ARMv8MML_DSP_SP">
1222       <description>Armv8-M Mainline, DSP, SP FPU</description>
1223       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1224     </condition>
1225
1226     <condition id="CA5_CA9">
1227       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1228       <accept Dcore="Cortex-A5"/>
1229       <accept Dcore="Cortex-A9"/>
1230     </condition>
1231
1232     <condition id="CA7">
1233       <description>Cortex-A7 processor based device</description>
1234       <accept Dcore="Cortex-A7"/>
1235     </condition>
1236
1237     <!-- ARMCC compiler -->
1238     <condition id="CA_ARMCC5">
1239       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1240       <require condition="ARMv7-A Device"/>
1241       <require condition="ARMCC5"/>
1242     </condition>
1243     <condition id="CA_ARMCC6">
1244       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1245       <require condition="ARMv7-A Device"/>
1246       <require condition="ARMCC6"/>
1247     </condition>
1248
1249     <condition id="CM0_ARMCC">
1250       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1251       <require condition="CM0"/>
1252       <require Tcompiler="ARMCC"/>
1253     </condition>
1254     <condition id="CM0_LE_ARMCC">
1255       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1256       <require condition="CM0_ARMCC"/>
1257       <require Dendian="Little-endian"/>
1258     </condition>
1259     <condition id="CM0_BE_ARMCC">
1260       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1261       <require condition="CM0_ARMCC"/>
1262       <require Dendian="Big-endian"/>
1263     </condition>
1264
1265     <condition id="CM1_ARMCC">
1266       <description>Cortex-M1 based device for the Arm Compiler</description>
1267       <require condition="CM1"/>
1268       <require Tcompiler="ARMCC"/>
1269     </condition>
1270     <condition id="CM1_LE_ARMCC">
1271       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1272       <require condition="CM1_ARMCC"/>
1273       <require Dendian="Little-endian"/>
1274     </condition>
1275     <condition id="CM1_BE_ARMCC">
1276       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1277       <require condition="CM1_ARMCC"/>
1278       <require Dendian="Big-endian"/>
1279     </condition>
1280
1281     <condition id="CM3_ARMCC">
1282       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1283       <require condition="CM3"/>
1284       <require Tcompiler="ARMCC"/>
1285     </condition>
1286     <condition id="CM3_LE_ARMCC">
1287       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1288       <require condition="CM3_ARMCC"/>
1289       <require Dendian="Little-endian"/>
1290     </condition>
1291     <condition id="CM3_BE_ARMCC">
1292       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1293       <require condition="CM3_ARMCC"/>
1294       <require Dendian="Big-endian"/>
1295     </condition>
1296
1297     <condition id="CM4_ARMCC">
1298       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1299       <require condition="CM4"/>
1300       <require Tcompiler="ARMCC"/>
1301     </condition>
1302     <condition id="CM4_LE_ARMCC">
1303       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1304       <require condition="CM4_ARMCC"/>
1305       <require Dendian="Little-endian"/>
1306     </condition>
1307     <condition id="CM4_BE_ARMCC">
1308       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1309       <require condition="CM4_ARMCC"/>
1310       <require Dendian="Big-endian"/>
1311     </condition>
1312
1313     <condition id="CM4_FP_ARMCC">
1314       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1315       <require condition="CM4_FP"/>
1316       <require Tcompiler="ARMCC"/>
1317     </condition>
1318     <condition id="CM4_FP_LE_ARMCC">
1319       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1320       <require condition="CM4_FP_ARMCC"/>
1321       <require Dendian="Little-endian"/>
1322     </condition>
1323     <condition id="CM4_FP_BE_ARMCC">
1324       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1325       <require condition="CM4_FP_ARMCC"/>
1326       <require Dendian="Big-endian"/>
1327     </condition>
1328
1329     <condition id="CM7_ARMCC">
1330       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1331       <require condition="CM7"/>
1332       <require Tcompiler="ARMCC"/>
1333     </condition>
1334     <condition id="CM7_LE_ARMCC">
1335       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1336       <require condition="CM7_ARMCC"/>
1337       <require Dendian="Little-endian"/>
1338     </condition>
1339     <condition id="CM7_BE_ARMCC">
1340       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1341       <require condition="CM7_ARMCC"/>
1342       <require Dendian="Big-endian"/>
1343     </condition>
1344
1345     <condition id="CM7_FP_ARMCC">
1346       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1347       <require condition="CM7_FP"/>
1348       <require Tcompiler="ARMCC"/>
1349     </condition>
1350     <condition id="CM7_FP_LE_ARMCC">
1351       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1352       <require condition="CM7_FP_ARMCC"/>
1353       <require Dendian="Little-endian"/>
1354     </condition>
1355     <condition id="CM7_FP_BE_ARMCC">
1356       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1357       <require condition="CM7_FP_ARMCC"/>
1358       <require Dendian="Big-endian"/>
1359     </condition>
1360
1361     <condition id="CM7_SP_ARMCC">
1362       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1363       <require condition="CM7_SP"/>
1364       <require Tcompiler="ARMCC"/>
1365     </condition>
1366     <condition id="CM7_SP_LE_ARMCC">
1367       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1368       <require condition="CM7_SP_ARMCC"/>
1369       <require Dendian="Little-endian"/>
1370     </condition>
1371     <condition id="CM7_SP_BE_ARMCC">
1372       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1373       <require condition="CM7_SP_ARMCC"/>
1374       <require Dendian="Big-endian"/>
1375     </condition>
1376
1377     <condition id="CM7_DP_ARMCC">
1378       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1379       <require condition="CM7_DP"/>
1380       <require Tcompiler="ARMCC"/>
1381     </condition>
1382     <condition id="CM7_DP_LE_ARMCC">
1383       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1384       <require condition="CM7_DP_ARMCC"/>
1385       <require Dendian="Little-endian"/>
1386     </condition>
1387     <condition id="CM7_DP_BE_ARMCC">
1388       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1389       <require condition="CM7_DP_ARMCC"/>
1390       <require Dendian="Big-endian"/>
1391     </condition>
1392
1393     <condition id="CM23_ARMCC">
1394       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1395       <require condition="CM23"/>
1396       <require Tcompiler="ARMCC"/>
1397     </condition>
1398     <condition id="CM23_LE_ARMCC">
1399       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1400       <require condition="CM23_ARMCC"/>
1401       <require Dendian="Little-endian"/>
1402     </condition>
1403
1404     <condition id="CM33_ARMCC">
1405       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1406       <require condition="CM33"/>
1407       <require Tcompiler="ARMCC"/>
1408     </condition>
1409     <condition id="CM33_LE_ARMCC">
1410       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1411       <require condition="CM33_ARMCC"/>
1412       <require Dendian="Little-endian"/>
1413     </condition>
1414
1415     <condition id="CM33_FP_ARMCC">
1416       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1417       <require condition="CM33_FP"/>
1418       <require Tcompiler="ARMCC"/>
1419     </condition>
1420     <condition id="CM33_FP_LE_ARMCC">
1421       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1422       <require condition="CM33_FP_ARMCC"/>
1423       <require Dendian="Little-endian"/>
1424     </condition>
1425
1426     <condition id="CM33_NODSP_NOFPU_ARMCC">
1427       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1428       <require condition="CM33_NODSP_NOFPU"/>
1429       <require Tcompiler="ARMCC"/>
1430     </condition>
1431     <condition id="CM33_DSP_NOFPU_ARMCC">
1432       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1433       <require condition="CM33_DSP_NOFPU"/>
1434       <require Tcompiler="ARMCC"/>
1435     </condition>
1436     <condition id="CM33_NODSP_SP_ARMCC">
1437       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1438       <require condition="CM33_NODSP_SP"/>
1439       <require Tcompiler="ARMCC"/>
1440     </condition>
1441     <condition id="CM33_DSP_SP_ARMCC">
1442       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1443       <require condition="CM33_DSP_SP"/>
1444       <require Tcompiler="ARMCC"/>
1445     </condition>
1446     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1447       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1448       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1449       <require Dendian="Little-endian"/>
1450     </condition>
1451     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1452       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1453       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1454       <require Dendian="Little-endian"/>
1455     </condition>
1456     <condition id="CM33_NODSP_SP_LE_ARMCC">
1457       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1458       <require condition="CM33_NODSP_SP_ARMCC"/>
1459       <require Dendian="Little-endian"/>
1460     </condition>
1461     <condition id="CM33_DSP_SP_LE_ARMCC">
1462       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1463       <require condition="CM33_DSP_SP_ARMCC"/>
1464       <require Dendian="Little-endian"/>
1465     </condition>
1466
1467     <condition id="CM35P_ARMCC">
1468       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1469       <require condition="CM35P"/>
1470       <require Tcompiler="ARMCC"/>
1471     </condition>
1472     <condition id="CM35P_LE_ARMCC">
1473       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1474       <require condition="CM35P_ARMCC"/>
1475       <require Dendian="Little-endian"/>
1476     </condition>
1477
1478     <condition id="CM35P_FP_ARMCC">
1479       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1480       <require condition="CM35P_FP"/>
1481       <require Tcompiler="ARMCC"/>
1482     </condition>
1483     <condition id="CM35P_FP_LE_ARMCC">
1484       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1485       <require condition="CM35P_FP_ARMCC"/>
1486       <require Dendian="Little-endian"/>
1487     </condition>
1488
1489     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1490       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1491       <require condition="CM35P_NODSP_NOFPU"/>
1492       <require Tcompiler="ARMCC"/>
1493     </condition>
1494     <condition id="CM35P_DSP_NOFPU_ARMCC">
1495       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1496       <require condition="CM35P_DSP_NOFPU"/>
1497       <require Tcompiler="ARMCC"/>
1498     </condition>
1499     <condition id="CM35P_NODSP_SP_ARMCC">
1500       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1501       <require condition="CM35P_NODSP_SP"/>
1502       <require Tcompiler="ARMCC"/>
1503     </condition>
1504     <condition id="CM35P_DSP_SP_ARMCC">
1505       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1506       <require condition="CM35P_DSP_SP"/>
1507       <require Tcompiler="ARMCC"/>
1508     </condition>
1509     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1510       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1511       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1512       <require Dendian="Little-endian"/>
1513     </condition>
1514     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1515       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1516       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1517       <require Dendian="Little-endian"/>
1518     </condition>
1519     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1520       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1521       <require condition="CM35P_NODSP_SP_ARMCC"/>
1522       <require Dendian="Little-endian"/>
1523     </condition>
1524     <condition id="CM35P_DSP_SP_LE_ARMCC">
1525       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1526       <require condition="CM35P_DSP_SP_ARMCC"/>
1527       <require Dendian="Little-endian"/>
1528     </condition>
1529
1530     <condition id="CM55_NOFPU_NOMVE_ARMCC">
1531       <description>Cortex-M55 processor, no FPU, no MVE, Arm Compiler</description>
1532       <require condition="CM55_NOFPU_NOMVE"/>
1533       <require Tcompiler="ARMCC"/>
1534     </condition>
1535     <condition id="CM55_NOFPU_MVE_ARMCC">
1536       <description>Cortex-M55 processor, no FPU, MVE, Arm Compiler</description>
1537       <require condition="CM55_NOFPU_MVE"/>
1538       <require Tcompiler="ARMCC"/>
1539     </condition>
1540     <condition id="CM55_FPU_ARMCC">
1541       <description>Cortex-M55 processor, FPU, Arm Compiler</description>
1542       <require condition="CM55_FPU"/>
1543       <require Tcompiler="ARMCC"/>
1544     </condition>
1545     <condition id="CM55_NOFPU_NOMVE_LE_ARMCC">
1546       <description>Cortex-M55 processor, little endian, no FPU, no MVE, Arm Compiler</description>
1547       <require condition="CM55_NOFPU_NOMVE_ARMCC"/>
1548       <require Dendian="Little-endian"/>
1549     </condition>
1550     <condition id="CM55_FPU_LE_ARMCC">
1551       <description>Cortex-M55 processor, little endian, FPU, Arm Compiler</description>
1552       <require condition="CM55_FPU_ARMCC"/>
1553       <require Dendian="Little-endian"/>
1554     </condition>
1555
1556     <condition id="ARMv8MBL_ARMCC">
1557       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1558       <require condition="ARMv8MBL"/>
1559       <require Tcompiler="ARMCC"/>
1560     </condition>
1561     <condition id="ARMv8MBL_LE_ARMCC">
1562       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1563       <require condition="ARMv8MBL_ARMCC"/>
1564       <require Dendian="Little-endian"/>
1565     </condition>
1566
1567     <condition id="ARMv8MML_ARMCC">
1568       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1569       <require condition="ARMv8MML"/>
1570       <require Tcompiler="ARMCC"/>
1571     </condition>
1572     <condition id="ARMv8MML_LE_ARMCC">
1573       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1574       <require condition="ARMv8MML_ARMCC"/>
1575       <require Dendian="Little-endian"/>
1576     </condition>
1577
1578     <condition id="ARMv8MML_FP_ARMCC">
1579       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1580       <require condition="ARMv8MML_FP"/>
1581       <require Tcompiler="ARMCC"/>
1582     </condition>
1583     <condition id="ARMv8MML_FP_LE_ARMCC">
1584       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1585       <require condition="ARMv8MML_FP_ARMCC"/>
1586       <require Dendian="Little-endian"/>
1587     </condition>
1588
1589     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1590       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1591       <require condition="ARMv8MML_NODSP_NOFPU"/>
1592       <require Tcompiler="ARMCC"/>
1593     </condition>
1594     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1595       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1596       <require condition="ARMv8MML_DSP_NOFPU"/>
1597       <require Tcompiler="ARMCC"/>
1598     </condition>
1599     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1600       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1601       <require condition="ARMv8MML_NODSP_SP"/>
1602       <require Tcompiler="ARMCC"/>
1603     </condition>
1604     <condition id="ARMv8MML_DSP_SP_ARMCC">
1605       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1606       <require condition="ARMv8MML_DSP_SP"/>
1607       <require Tcompiler="ARMCC"/>
1608     </condition>
1609     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1610       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1611       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1612       <require Dendian="Little-endian"/>
1613     </condition>
1614     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1615       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1616       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1617       <require Dendian="Little-endian"/>
1618     </condition>
1619     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1620       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1621       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1622       <require Dendian="Little-endian"/>
1623     </condition>
1624     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1625       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1626       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1627       <require Dendian="Little-endian"/>
1628     </condition>
1629
1630     <!-- GCC compiler -->
1631     <condition id="CA_GCC">
1632       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1633       <require condition="ARMv7-A Device"/>
1634       <require Tcompiler="GCC"/>
1635     </condition>
1636
1637     <condition id="CM0_GCC">
1638       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1639       <require condition="CM0"/>
1640       <require Tcompiler="GCC"/>
1641     </condition>
1642     <condition id="CM0_LE_GCC">
1643       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1644       <require condition="CM0_GCC"/>
1645       <require Dendian="Little-endian"/>
1646     </condition>
1647     <condition id="CM0_BE_GCC">
1648       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1649       <require condition="CM0_GCC"/>
1650       <require Dendian="Big-endian"/>
1651     </condition>
1652
1653     <condition id="CM1_GCC">
1654       <description>Cortex-M1 based device for the GCC Compiler</description>
1655       <require condition="CM1"/>
1656       <require Tcompiler="GCC"/>
1657     </condition>
1658     <condition id="CM1_LE_GCC">
1659       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1660       <require condition="CM1_GCC"/>
1661       <require Dendian="Little-endian"/>
1662     </condition>
1663     <condition id="CM1_BE_GCC">
1664       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1665       <require condition="CM1_GCC"/>
1666       <require Dendian="Big-endian"/>
1667     </condition>
1668
1669     <condition id="CM3_GCC">
1670       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1671       <require condition="CM3"/>
1672       <require Tcompiler="GCC"/>
1673     </condition>
1674     <condition id="CM3_LE_GCC">
1675       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1676       <require condition="CM3_GCC"/>
1677       <require Dendian="Little-endian"/>
1678     </condition>
1679     <condition id="CM3_BE_GCC">
1680       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1681       <require condition="CM3_GCC"/>
1682       <require Dendian="Big-endian"/>
1683     </condition>
1684
1685     <condition id="CM4_GCC">
1686       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1687       <require condition="CM4"/>
1688       <require Tcompiler="GCC"/>
1689     </condition>
1690     <condition id="CM4_LE_GCC">
1691       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1692       <require condition="CM4_GCC"/>
1693       <require Dendian="Little-endian"/>
1694     </condition>
1695     <condition id="CM4_BE_GCC">
1696       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1697       <require condition="CM4_GCC"/>
1698       <require Dendian="Big-endian"/>
1699     </condition>
1700
1701     <condition id="CM4_FP_GCC">
1702       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1703       <require condition="CM4_FP"/>
1704       <require Tcompiler="GCC"/>
1705     </condition>
1706     <condition id="CM4_FP_LE_GCC">
1707       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1708       <require condition="CM4_FP_GCC"/>
1709       <require Dendian="Little-endian"/>
1710     </condition>
1711     <condition id="CM4_FP_BE_GCC">
1712       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1713       <require condition="CM4_FP_GCC"/>
1714       <require Dendian="Big-endian"/>
1715     </condition>
1716
1717     <condition id="CM7_GCC">
1718       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1719       <require condition="CM7"/>
1720       <require Tcompiler="GCC"/>
1721     </condition>
1722     <condition id="CM7_LE_GCC">
1723       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1724       <require condition="CM7_GCC"/>
1725       <require Dendian="Little-endian"/>
1726     </condition>
1727     <condition id="CM7_BE_GCC">
1728       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1729       <require condition="CM7_GCC"/>
1730       <require Dendian="Big-endian"/>
1731     </condition>
1732
1733     <condition id="CM7_FP_GCC">
1734       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1735       <require condition="CM7_FP"/>
1736       <require Tcompiler="GCC"/>
1737     </condition>
1738     <condition id="CM7_FP_LE_GCC">
1739       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1740       <require condition="CM7_FP_GCC"/>
1741       <require Dendian="Little-endian"/>
1742     </condition>
1743     <condition id="CM7_FP_BE_GCC">
1744       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1745       <require condition="CM7_FP_GCC"/>
1746       <require Dendian="Big-endian"/>
1747     </condition>
1748
1749     <condition id="CM7_SP_GCC">
1750       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1751       <require condition="CM7_SP"/>
1752       <require Tcompiler="GCC"/>
1753     </condition>
1754     <condition id="CM7_SP_LE_GCC">
1755       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1756       <require condition="CM7_SP_GCC"/>
1757       <require Dendian="Little-endian"/>
1758     </condition>
1759
1760     <condition id="CM7_DP_GCC">
1761       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1762       <require condition="CM7_DP"/>
1763       <require Tcompiler="GCC"/>
1764     </condition>
1765     <condition id="CM7_DP_LE_GCC">
1766       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1767       <require condition="CM7_DP_GCC"/>
1768       <require Dendian="Little-endian"/>
1769     </condition>
1770
1771     <condition id="CM23_GCC">
1772       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1773       <require condition="CM23"/>
1774       <require Tcompiler="GCC"/>
1775     </condition>
1776     <condition id="CM23_LE_GCC">
1777       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1778       <require condition="CM23_GCC"/>
1779       <require Dendian="Little-endian"/>
1780     </condition>
1781
1782     <condition id="CM33_GCC">
1783       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1784       <require condition="CM33"/>
1785       <require Tcompiler="GCC"/>
1786     </condition>
1787     <condition id="CM33_LE_GCC">
1788       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1789       <require condition="CM33_GCC"/>
1790       <require Dendian="Little-endian"/>
1791     </condition>
1792
1793     <condition id="CM33_FP_GCC">
1794       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1795       <require condition="CM33_FP"/>
1796       <require Tcompiler="GCC"/>
1797     </condition>
1798     <condition id="CM33_FP_LE_GCC">
1799       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1800       <require condition="CM33_FP_GCC"/>
1801       <require Dendian="Little-endian"/>
1802     </condition>
1803
1804     <condition id="CM33_NODSP_NOFPU_GCC">
1805       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1806       <require condition="CM33_NODSP_NOFPU"/>
1807       <require Tcompiler="GCC"/>
1808     </condition>
1809     <condition id="CM33_DSP_NOFPU_GCC">
1810       <description>CM33, DSP, no FPU, GCC Compiler</description>
1811       <require condition="CM33_DSP_NOFPU"/>
1812       <require Tcompiler="GCC"/>
1813     </condition>
1814     <condition id="CM33_NODSP_SP_GCC">
1815       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1816       <require condition="CM33_NODSP_SP"/>
1817       <require Tcompiler="GCC"/>
1818     </condition>
1819     <condition id="CM33_DSP_SP_GCC">
1820       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1821       <require condition="CM33_DSP_SP"/>
1822       <require Tcompiler="GCC"/>
1823     </condition>
1824     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1825       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1826       <require condition="CM33_NODSP_NOFPU_GCC"/>
1827       <require Dendian="Little-endian"/>
1828     </condition>
1829     <condition id="CM33_DSP_NOFPU_LE_GCC">
1830       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1831       <require condition="CM33_DSP_NOFPU_GCC"/>
1832       <require Dendian="Little-endian"/>
1833     </condition>
1834     <condition id="CM33_NODSP_SP_LE_GCC">
1835       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1836       <require condition="CM33_NODSP_SP_GCC"/>
1837       <require Dendian="Little-endian"/>
1838     </condition>
1839     <condition id="CM33_DSP_SP_LE_GCC">
1840       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1841       <require condition="CM33_DSP_SP_GCC"/>
1842       <require Dendian="Little-endian"/>
1843     </condition>
1844
1845     <condition id="CM35P_GCC">
1846       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1847       <require condition="CM35P"/>
1848       <require Tcompiler="GCC"/>
1849     </condition>
1850     <condition id="CM35P_LE_GCC">
1851       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1852       <require condition="CM35P_GCC"/>
1853       <require Dendian="Little-endian"/>
1854     </condition>
1855
1856     <condition id="CM35P_FP_GCC">
1857       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1858       <require condition="CM35P_FP"/>
1859       <require Tcompiler="GCC"/>
1860     </condition>
1861     <condition id="CM35P_FP_LE_GCC">
1862       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1863       <require condition="CM35P_FP_GCC"/>
1864       <require Dendian="Little-endian"/>
1865     </condition>
1866
1867     <condition id="CM35P_NODSP_NOFPU_GCC">
1868       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1869       <require condition="CM35P_NODSP_NOFPU"/>
1870       <require Tcompiler="GCC"/>
1871     </condition>
1872     <condition id="CM35P_DSP_NOFPU_GCC">
1873       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1874       <require condition="CM35P_DSP_NOFPU"/>
1875       <require Tcompiler="GCC"/>
1876     </condition>
1877     <condition id="CM35P_NODSP_SP_GCC">
1878       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1879       <require condition="CM35P_NODSP_SP"/>
1880       <require Tcompiler="GCC"/>
1881     </condition>
1882     <condition id="CM35P_DSP_SP_GCC">
1883       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1884       <require condition="CM35P_DSP_SP"/>
1885       <require Tcompiler="GCC"/>
1886     </condition>
1887     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1888       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1889       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1890       <require Dendian="Little-endian"/>
1891     </condition>
1892     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1893       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1894       <require condition="CM35P_DSP_NOFPU_GCC"/>
1895       <require Dendian="Little-endian"/>
1896     </condition>
1897     <condition id="CM35P_NODSP_SP_LE_GCC">
1898       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1899       <require condition="CM35P_NODSP_SP_GCC"/>
1900       <require Dendian="Little-endian"/>
1901     </condition>
1902     <condition id="CM35P_DSP_SP_LE_GCC">
1903       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1904       <require condition="CM35P_DSP_SP_GCC"/>
1905       <require Dendian="Little-endian"/>
1906     </condition>
1907
1908     <condition id="CM55_NOFPU_NOMVE_GCC">
1909       <description>Cortex-M55 processor, no FPU, no MVE, GCC Compiler</description>
1910       <require condition="CM55_NOFPU_NOMVE"/>
1911       <require Tcompiler="GCC"/>
1912     </condition>
1913     <condition id="CM55_NOFPU_MVE_GCC">
1914       <description>Cortex-M55 processor, no FPU, MVE, GCC Compiler</description>
1915       <require condition="CM55_NOFPU_MVE"/>
1916       <require Tcompiler="GCC"/>
1917     </condition>
1918     <condition id="CM55_FPU_GCC">
1919       <description>Cortex-M55 processor, FPU, GCC Compiler</description>
1920       <require condition="CM55_FPU"/>
1921       <require Tcompiler="GCC"/>
1922     </condition>
1923     <condition id="CM55_NOFPU_NOMVE_LE_GCC">
1924       <description>Cortex-M55 processor, little endian, no FPU, no MVE, GCC Compiler</description>
1925       <require condition="CM55_NOFPU_NOMVE_GCC"/>
1926       <require Dendian="Little-endian"/>
1927     </condition>
1928     <condition id="CM55_FPU_LE_GCC">
1929       <description>Cortex-M55 processor, little endian, FPU, GCC Compiler</description>
1930       <require condition="CM55_FPU_GCC"/>
1931       <require Dendian="Little-endian"/>
1932     </condition>
1933
1934     <condition id="ARMv8MBL_GCC">
1935       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1936       <require condition="ARMv8MBL"/>
1937       <require Tcompiler="GCC"/>
1938     </condition>
1939     <condition id="ARMv8MBL_LE_GCC">
1940       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1941       <require condition="ARMv8MBL_GCC"/>
1942       <require Dendian="Little-endian"/>
1943     </condition>
1944
1945     <condition id="ARMv8MML_GCC">
1946       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1947       <require condition="ARMv8MML"/>
1948       <require Tcompiler="GCC"/>
1949     </condition>
1950     <condition id="ARMv8MML_LE_GCC">
1951       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1952       <require condition="ARMv8MML_GCC"/>
1953       <require Dendian="Little-endian"/>
1954     </condition>
1955
1956     <condition id="ARMv8MML_FP_GCC">
1957       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1958       <require condition="ARMv8MML_FP"/>
1959       <require Tcompiler="GCC"/>
1960     </condition>
1961     <condition id="ARMv8MML_FP_LE_GCC">
1962       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1963       <require condition="ARMv8MML_FP_GCC"/>
1964       <require Dendian="Little-endian"/>
1965     </condition>
1966
1967     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1968       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1969       <require condition="ARMv8MML_NODSP_NOFPU"/>
1970       <require Tcompiler="GCC"/>
1971     </condition>
1972     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1973       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1974       <require condition="ARMv8MML_DSP_NOFPU"/>
1975       <require Tcompiler="GCC"/>
1976     </condition>
1977     <condition id="ARMv8MML_NODSP_SP_GCC">
1978       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1979       <require condition="ARMv8MML_NODSP_SP"/>
1980       <require Tcompiler="GCC"/>
1981     </condition>
1982     <condition id="ARMv8MML_DSP_SP_GCC">
1983       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1984       <require condition="ARMv8MML_DSP_SP"/>
1985       <require Tcompiler="GCC"/>
1986     </condition>
1987     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1988       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1989       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1990       <require Dendian="Little-endian"/>
1991     </condition>
1992     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1993       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1994       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1995       <require Dendian="Little-endian"/>
1996     </condition>
1997     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1998       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1999       <require condition="ARMv8MML_NODSP_SP_GCC"/>
2000       <require Dendian="Little-endian"/>
2001     </condition>
2002     <condition id="ARMv8MML_DSP_SP_LE_GCC">
2003       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
2004       <require condition="ARMv8MML_DSP_SP_GCC"/>
2005       <require Dendian="Little-endian"/>
2006     </condition>
2007
2008     <!-- IAR compiler -->
2009     <condition id="CA_IAR">
2010       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
2011       <require condition="ARMv7-A Device"/>
2012       <require Tcompiler="IAR"/>
2013     </condition>
2014
2015     <condition id="CM0_IAR">
2016       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
2017       <require condition="CM0"/>
2018       <require Tcompiler="IAR"/>
2019     </condition>
2020     <condition id="CM0_LE_IAR">
2021       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
2022       <require condition="CM0_IAR"/>
2023       <require Dendian="Little-endian"/>
2024     </condition>
2025     <condition id="CM0_BE_IAR">
2026       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
2027       <require condition="CM0_IAR"/>
2028       <require Dendian="Big-endian"/>
2029     </condition>
2030
2031     <condition id="CM1_IAR">
2032       <description>Cortex-M1 based device for the IAR Compiler</description>
2033       <require condition="CM1"/>
2034       <require Tcompiler="IAR"/>
2035     </condition>
2036     <condition id="CM1_LE_IAR">
2037       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
2038       <require condition="CM1_IAR"/>
2039       <require Dendian="Little-endian"/>
2040     </condition>
2041     <condition id="CM1_BE_IAR">
2042       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
2043       <require condition="CM1_IAR"/>
2044       <require Dendian="Big-endian"/>
2045     </condition>
2046
2047     <condition id="CM3_IAR">
2048       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
2049       <require condition="CM3"/>
2050       <require Tcompiler="IAR"/>
2051     </condition>
2052     <condition id="CM3_LE_IAR">
2053       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
2054       <require condition="CM3_IAR"/>
2055       <require Dendian="Little-endian"/>
2056     </condition>
2057     <condition id="CM3_BE_IAR">
2058       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
2059       <require condition="CM3_IAR"/>
2060       <require Dendian="Big-endian"/>
2061     </condition>
2062
2063     <condition id="CM4_IAR">
2064       <description>Cortex-M4 processor based device for the IAR Compiler</description>
2065       <require condition="CM4"/>
2066       <require Tcompiler="IAR"/>
2067     </condition>
2068     <condition id="CM4_LE_IAR">
2069       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
2070       <require condition="CM4_IAR"/>
2071       <require Dendian="Little-endian"/>
2072     </condition>
2073     <condition id="CM4_BE_IAR">
2074       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
2075       <require condition="CM4_IAR"/>
2076       <require Dendian="Big-endian"/>
2077     </condition>
2078
2079     <condition id="CM4_FP_IAR">
2080       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
2081       <require condition="CM4_FP"/>
2082       <require Tcompiler="IAR"/>
2083     </condition>
2084     <condition id="CM4_FP_LE_IAR">
2085       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2086       <require condition="CM4_FP_IAR"/>
2087       <require Dendian="Little-endian"/>
2088     </condition>
2089     <condition id="CM4_FP_BE_IAR">
2090       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2091       <require condition="CM4_FP_IAR"/>
2092       <require Dendian="Big-endian"/>
2093     </condition>
2094
2095     <condition id="CM7_IAR">
2096       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2097       <require condition="CM7"/>
2098       <require Tcompiler="IAR"/>
2099     </condition>
2100     <condition id="CM7_LE_IAR">
2101       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2102       <require condition="CM7_IAR"/>
2103       <require Dendian="Little-endian"/>
2104     </condition>
2105     <condition id="CM7_BE_IAR">
2106       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2107       <require condition="CM7_IAR"/>
2108       <require Dendian="Big-endian"/>
2109     </condition>
2110
2111     <condition id="CM7_FP_IAR">
2112       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2113       <require condition="CM7_FP"/>
2114       <require Tcompiler="IAR"/>
2115     </condition>
2116     <condition id="CM7_FP_LE_IAR">
2117       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2118       <require condition="CM7_FP_IAR"/>
2119       <require Dendian="Little-endian"/>
2120     </condition>
2121     <condition id="CM7_FP_BE_IAR">
2122       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2123       <require condition="CM7_FP_IAR"/>
2124       <require Dendian="Big-endian"/>
2125     </condition>
2126
2127     <condition id="CM7_SP_IAR">
2128       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2129       <require condition="CM7_SP"/>
2130       <require Tcompiler="IAR"/>
2131     </condition>
2132     <condition id="CM7_SP_LE_IAR">
2133       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2134       <require condition="CM7_SP_IAR"/>
2135       <require Dendian="Little-endian"/>
2136     </condition>
2137     <condition id="CM7_SP_BE_IAR">
2138       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2139       <require condition="CM7_SP_IAR"/>
2140       <require Dendian="Big-endian"/>
2141     </condition>
2142
2143     <condition id="CM7_DP_IAR">
2144       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2145       <require condition="CM7_DP"/>
2146       <require Tcompiler="IAR"/>
2147     </condition>
2148     <condition id="CM7_DP_LE_IAR">
2149       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2150       <require condition="CM7_DP_IAR"/>
2151       <require Dendian="Little-endian"/>
2152     </condition>
2153     <condition id="CM7_DP_BE_IAR">
2154       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2155       <require condition="CM7_DP_IAR"/>
2156       <require Dendian="Big-endian"/>
2157     </condition>
2158
2159     <condition id="CM23_IAR">
2160       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2161       <require condition="CM23"/>
2162       <require Tcompiler="IAR"/>
2163     </condition>
2164     <condition id="CM23_LE_IAR">
2165       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2166       <require condition="CM23_IAR"/>
2167       <require Dendian="Little-endian"/>
2168     </condition>
2169
2170     <condition id="CM33_IAR">
2171       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2172       <require condition="CM33"/>
2173       <require Tcompiler="IAR"/>
2174     </condition>
2175     <condition id="CM33_LE_IAR">
2176       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2177       <require condition="CM33_IAR"/>
2178       <require Dendian="Little-endian"/>
2179     </condition>
2180
2181     <condition id="CM33_FP_IAR">
2182       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2183       <require condition="CM33_FP"/>
2184       <require Tcompiler="IAR"/>
2185     </condition>
2186     <condition id="CM33_FP_LE_IAR">
2187       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2188       <require condition="CM33_FP_IAR"/>
2189       <require Dendian="Little-endian"/>
2190     </condition>
2191
2192     <condition id="CM33_NODSP_NOFPU_IAR">
2193       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2194       <require condition="CM33_NODSP_NOFPU"/>
2195       <require Tcompiler="IAR"/>
2196     </condition>
2197     <condition id="CM33_DSP_NOFPU_IAR">
2198       <description>CM33, DSP, no FPU, IAR Compiler</description>
2199       <require condition="CM33_DSP_NOFPU"/>
2200       <require Tcompiler="IAR"/>
2201     </condition>
2202     <condition id="CM33_NODSP_SP_IAR">
2203       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2204       <require condition="CM33_NODSP_SP"/>
2205       <require Tcompiler="IAR"/>
2206     </condition>
2207     <condition id="CM33_DSP_SP_IAR">
2208       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2209       <require condition="CM33_DSP_SP"/>
2210       <require Tcompiler="IAR"/>
2211     </condition>
2212     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2213       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2214       <require condition="CM33_NODSP_NOFPU_IAR"/>
2215       <require Dendian="Little-endian"/>
2216     </condition>
2217     <condition id="CM33_DSP_NOFPU_LE_IAR">
2218       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2219       <require condition="CM33_DSP_NOFPU_IAR"/>
2220       <require Dendian="Little-endian"/>
2221     </condition>
2222     <condition id="CM33_NODSP_SP_LE_IAR">
2223       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2224       <require condition="CM33_NODSP_SP_IAR"/>
2225       <require Dendian="Little-endian"/>
2226     </condition>
2227     <condition id="CM33_DSP_SP_LE_IAR">
2228       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2229       <require condition="CM33_DSP_SP_IAR"/>
2230       <require Dendian="Little-endian"/>
2231     </condition>
2232
2233     <condition id="CM35P_IAR">
2234       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2235       <require condition="CM35P"/>
2236       <require Tcompiler="IAR"/>
2237     </condition>
2238     <condition id="CM35P_LE_IAR">
2239       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2240       <require condition="CM35P_IAR"/>
2241       <require Dendian="Little-endian"/>
2242     </condition>
2243
2244     <condition id="CM35P_FP_IAR">
2245       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2246       <require condition="CM35P_FP"/>
2247       <require Tcompiler="IAR"/>
2248     </condition>
2249     <condition id="CM35P_FP_LE_IAR">
2250       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2251       <require condition="CM35P_FP_IAR"/>
2252       <require Dendian="Little-endian"/>
2253     </condition>
2254
2255     <condition id="CM35P_NODSP_NOFPU_IAR">
2256       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2257       <require condition="CM35P_NODSP_NOFPU"/>
2258       <require Tcompiler="IAR"/>
2259     </condition>
2260     <condition id="CM35P_DSP_NOFPU_IAR">
2261       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2262       <require condition="CM35P_DSP_NOFPU"/>
2263       <require Tcompiler="IAR"/>
2264     </condition>
2265     <condition id="CM35P_NODSP_SP_IAR">
2266       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2267       <require condition="CM35P_NODSP_SP"/>
2268       <require Tcompiler="IAR"/>
2269     </condition>
2270     <condition id="CM35P_DSP_SP_IAR">
2271       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2272       <require condition="CM35P_DSP_SP"/>
2273       <require Tcompiler="IAR"/>
2274     </condition>
2275     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2276       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2277       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2278       <require Dendian="Little-endian"/>
2279     </condition>
2280     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2281       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2282       <require condition="CM35P_DSP_NOFPU_IAR"/>
2283       <require Dendian="Little-endian"/>
2284     </condition>
2285     <condition id="CM35P_NODSP_SP_LE_IAR">
2286       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2287       <require condition="CM35P_NODSP_SP_IAR"/>
2288       <require Dendian="Little-endian"/>
2289     </condition>
2290     <condition id="CM35P_DSP_SP_LE_IAR">
2291       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2292       <require condition="CM35P_DSP_SP_IAR"/>
2293       <require Dendian="Little-endian"/>
2294     </condition>
2295
2296     <condition id="CM55_NOFPU_NOMVE_IAR">
2297       <description>Cortex-M55 processor, no FPU, no MVE, IAR Compiler</description>
2298       <require condition="CM55_NOFPU_NOMVE"/>
2299       <require Tcompiler="IAR"/>
2300     </condition>
2301     <condition id="CM55_NOFPU_MVE_IAR">
2302       <description>Cortex-M55 processor, no FPU, MVE, IAR Compiler</description>
2303       <require condition="CM55_NOFPU_MVE"/>
2304       <require Tcompiler="IAR"/>
2305     </condition>
2306     <condition id="CM55_FPU_IAR">
2307       <description>Cortex-M55 processor, FPU, IAR Compiler</description>
2308       <require condition="CM55_FPU"/>
2309       <require Tcompiler="IAR"/>
2310     </condition>
2311     <condition id="CM55_NOFPU_NOMVE_LE_IAR">
2312       <description>Cortex-M55 processor, little endian, no FPU, no MVE, IAR Compiler</description>
2313       <require condition="CM55_NOFPU_NOMVE_IAR"/>
2314       <require Dendian="Little-endian"/>
2315     </condition>
2316     <condition id="CM55_FPU_LE_IAR">
2317       <description>Cortex-M55 processor, little endian, FPU, IAR Compiler</description>
2318       <require condition="CM55_FPU_IAR"/>
2319       <require Dendian="Little-endian"/>
2320     </condition>
2321
2322     <condition id="ARMv8MBL_IAR">
2323       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2324       <require condition="ARMv8MBL"/>
2325       <require Tcompiler="IAR"/>
2326     </condition>
2327     <condition id="ARMv8MBL_LE_IAR">
2328       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2329       <require condition="ARMv8MBL_IAR"/>
2330       <require Dendian="Little-endian"/>
2331     </condition>
2332
2333     <condition id="ARMv8MML_IAR">
2334       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2335       <require condition="ARMv8MML"/>
2336       <require Tcompiler="IAR"/>
2337     </condition>
2338     <condition id="ARMv8MML_LE_IAR">
2339       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2340       <require condition="ARMv8MML_IAR"/>
2341       <require Dendian="Little-endian"/>
2342     </condition>
2343
2344     <condition id="ARMv8MML_FP_IAR">
2345       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2346       <require condition="ARMv8MML_FP"/>
2347       <require Tcompiler="IAR"/>
2348     </condition>
2349     <condition id="ARMv8MML_FP_LE_IAR">
2350       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2351       <require condition="ARMv8MML_FP_IAR"/>
2352       <require Dendian="Little-endian"/>
2353     </condition>
2354
2355     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2356       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2357       <require condition="ARMv8MML_NODSP_NOFPU"/>
2358       <require Tcompiler="IAR"/>
2359     </condition>
2360     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2361       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2362       <require condition="ARMv8MML_DSP_NOFPU"/>
2363       <require Tcompiler="IAR"/>
2364     </condition>
2365     <condition id="ARMv8MML_NODSP_SP_IAR">
2366       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2367       <require condition="ARMv8MML_NODSP_SP"/>
2368       <require Tcompiler="IAR"/>
2369     </condition>
2370     <condition id="ARMv8MML_DSP_SP_IAR">
2371       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2372       <require condition="ARMv8MML_DSP_SP"/>
2373       <require Tcompiler="IAR"/>
2374     </condition>
2375     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2376       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2377       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2378       <require Dendian="Little-endian"/>
2379     </condition>
2380     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2381       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2382       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2383       <require Dendian="Little-endian"/>
2384     </condition>
2385     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2386       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2387       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2388       <require Dendian="Little-endian"/>
2389     </condition>
2390     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2391       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2392       <require condition="ARMv8MML_DSP_SP_IAR"/>
2393       <require Dendian="Little-endian"/>
2394     </condition>
2395
2396     <!-- conditions selecting single devices and CMSIS Core -->
2397     <condition id="ARMCM0 CMSIS">
2398       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2399       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2400       <require Cclass="CMSIS" Cgroup="CORE"/>
2401     </condition>
2402
2403     <condition id="ARMCM0+ CMSIS">
2404       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2405       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2406       <require Cclass="CMSIS" Cgroup="CORE"/>
2407     </condition>
2408
2409     <condition id="ARMCM1 CMSIS">
2410       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2411       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2412       <require Cclass="CMSIS" Cgroup="CORE"/>
2413     </condition>
2414
2415     <condition id="ARMCM3 CMSIS">
2416       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2417       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2418       <require Cclass="CMSIS" Cgroup="CORE"/>
2419     </condition>
2420
2421     <condition id="ARMCM4 CMSIS">
2422       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2423       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2424       <require Cclass="CMSIS" Cgroup="CORE"/>
2425     </condition>
2426
2427     <condition id="ARMCM7 CMSIS">
2428       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2429       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2430       <require Cclass="CMSIS" Cgroup="CORE"/>
2431     </condition>
2432
2433     <condition id="ARMCM23 CMSIS">
2434       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2435       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2436       <require Cclass="CMSIS" Cgroup="CORE"/>
2437     </condition>
2438
2439     <condition id="ARMCM33 CMSIS">
2440       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2441       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2442       <require Cclass="CMSIS" Cgroup="CORE"/>
2443     </condition>
2444
2445     <condition id="ARMCM35P CMSIS">
2446       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2447       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2448       <require Cclass="CMSIS" Cgroup="CORE"/>
2449     </condition>
2450
2451     <condition id="ARMCM55 CMSIS">
2452       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2453       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2454       <require Cclass="CMSIS" Cgroup="CORE"/>
2455     </condition>
2456
2457     <condition id="ARMSC000 CMSIS">
2458       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2459       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2460       <require Cclass="CMSIS" Cgroup="CORE"/>
2461     </condition>
2462
2463     <condition id="ARMSC300 CMSIS">
2464       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2465       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2466       <require Cclass="CMSIS" Cgroup="CORE"/>
2467     </condition>
2468
2469     <condition id="ARMv8MBL CMSIS">
2470       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2471       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2472       <require Cclass="CMSIS" Cgroup="CORE"/>
2473     </condition>
2474
2475     <condition id="ARMv8MML CMSIS">
2476       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2477       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2478       <require Cclass="CMSIS" Cgroup="CORE"/>
2479     </condition>
2480
2481     <condition id="ARMv81MML CMSIS">
2482       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2483       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2484       <require Cclass="CMSIS" Cgroup="CORE"/>
2485     </condition>
2486
2487     <condition id="ARMCA5 CMSIS">
2488       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2489       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2490       <require Cclass="CMSIS" Cgroup="CORE"/>
2491     </condition>
2492
2493     <condition id="ARMCA7 CMSIS">
2494       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2495       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2496       <require Cclass="CMSIS" Cgroup="CORE"/>
2497     </condition>
2498
2499     <condition id="ARMCA9 CMSIS">
2500       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2501       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2502       <require Cclass="CMSIS" Cgroup="CORE"/>
2503     </condition>
2504
2505     <!-- CMSIS DSP -->
2506     <condition id="CMSIS DSP">
2507       <description>Components required for DSP</description>
2508       <require condition="ARMv6_7_8-M Device"/>
2509       <require condition="ARMCC GCC IAR"/>
2510       <require Cclass="CMSIS" Cgroup="CORE"/>
2511     </condition>
2512
2513     <!-- CMSIS NN -->
2514     <condition id="CMSIS NN">
2515       <description>Components required for NN</description>
2516       <require Cclass="CMSIS" Cgroup="DSP"/>
2517     </condition>
2518
2519     <!-- RTOS RTX -->
2520     <condition id="RTOS RTX">
2521       <description>Components required for RTOS RTX</description>
2522       <require condition="ARMv6_7-M Device"/>
2523       <require condition="ARMCC GCC IAR"/>
2524       <require Cclass="Device" Cgroup="Startup"/>
2525       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2526     </condition>
2527     <condition id="RTOS RTX IFX">
2528       <description>Components required for RTOS RTX IFX</description>
2529       <require condition="ARMv6_7-M Device"/>
2530       <require condition="ARMCC GCC IAR"/>
2531       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2532       <require Cclass="Device" Cgroup="Startup"/>
2533       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2534     </condition>
2535     <condition id="RTOS RTX5">
2536       <description>Components required for RTOS RTX5</description>
2537       <require condition="ARMv6_7_8-M Device"/>
2538       <require condition="ARMCC GCC IAR"/>
2539       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2540     </condition>
2541     <condition id="RTOS2 RTX5">
2542       <description>Components required for RTOS2 RTX5</description>
2543       <require condition="ARMv6_7_8-M Device"/>
2544       <require condition="ARMCC GCC IAR"/>
2545       <require Cclass="CMSIS"  Cgroup="CORE"/>
2546       <require Cclass="Device" Cgroup="Startup"/>
2547     </condition>
2548     <condition id="RTOS2 RTX5 v7-A">
2549       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2550       <require condition="ARMv7-A Device"/>
2551       <require condition="ARMCC GCC IAR"/>
2552       <require Cclass="CMSIS"  Cgroup="CORE"/>
2553       <require Cclass="Device" Cgroup="Startup"/>
2554       <require Cclass="Device" Cgroup="OS Tick"/>
2555       <require Cclass="Device" Cgroup="IRQ Controller"/>
2556     </condition>
2557     <condition id="RTOS2 RTX5 NS">
2558       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2559       <require condition="ARMv8-M Device"/>
2560       <require condition="TZ Non-secure"/>
2561       <require condition="ARMCC GCC IAR"/>
2562       <require Cclass="CMSIS"  Cgroup="CORE"/>
2563       <require Cclass="Device" Cgroup="Startup"/>
2564     </condition>
2565
2566     <!-- OS Tick -->
2567     <condition id="OS Tick PTIM">
2568       <description>Components required for OS Tick Private Timer</description>
2569       <require condition="CA5_CA9"/>
2570       <require Cclass="Device" Cgroup="IRQ Controller"/>
2571     </condition>
2572
2573     <condition id="OS Tick GTIM">
2574       <description>Components required for OS Tick Generic Physical Timer</description>
2575       <require condition="CA7"/>
2576       <require Cclass="Device" Cgroup="IRQ Controller"/>
2577     </condition>
2578
2579   </conditions>
2580
2581   <components>
2582     <!-- CMSIS-Core component -->
2583     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.4.0"  condition="ARMv6_7_8-M Device" >
2584       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2585       <files>
2586         <!-- CPU independent -->
2587         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2588         <file category="include" name="CMSIS/Core/Include/"/>
2589         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
2590         <!-- Code template -->
2591         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2592         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2593       </files>
2594     </component>
2595
2596     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.2.0"  condition="ARMv7-A Device" >
2597       <description>CMSIS-CORE for Cortex-A</description>
2598       <files>
2599         <!-- CPU independent -->
2600         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2601         <file category="include" name="CMSIS/Core_A/Include/"/>
2602       </files>
2603     </component>
2604
2605     <!-- CMSIS-Startup components -->
2606     <!-- Cortex-M0 -->
2607     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS">
2608       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2609       <files>
2610         <!-- include folder / device header file -->
2611         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2612         <!-- startup / system file -->
2613         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
2614         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2615         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2616         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2617         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2618       </files>
2619     </component>
2620     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2621       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2622       <files>
2623         <!-- include folder / device header file -->
2624         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2625         <!-- startup / system file -->
2626         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2627         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.1.0" attr="config" condition="GCC"/>
2628         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2629         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2630         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2631       </files>
2632     </component>
2633
2634     <!-- Cortex-M0+ -->
2635     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS">
2636       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2637       <files>
2638         <!-- include folder / device header file -->
2639         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2640         <!-- startup / system file -->
2641         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
2642         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2643         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2644         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
2645         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2646       </files>
2647     </component>
2648     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0+ CMSIS">
2649       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2650       <files>
2651         <!-- include folder / device header file -->
2652         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2653         <!-- startup / system file -->
2654         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2655         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.1.0" attr="config" condition="GCC"/>
2656         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2657         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2658         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2659       </files>
2660     </component>
2661
2662     <!-- Cortex-M1 -->
2663     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS">
2664       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2665       <files>
2666         <!-- include folder / device header file -->
2667         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2668         <!-- startup / system file -->
2669         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
2670         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2671         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2672         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2673         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2674       </files>
2675     </component>
2676     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2677       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2678       <files>
2679         <!-- include folder / device header file -->
2680         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2681         <!-- startup / system file -->
2682         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2683         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.1.0" attr="config" condition="GCC"/>
2684         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2685         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2686         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2687       </files>
2688     </component>
2689
2690     <!-- Cortex-M3 -->
2691     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS">
2692       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2693       <files>
2694         <!-- include folder / device header file -->
2695         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2696         <!-- startup / system file -->
2697         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
2698         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2699         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2700         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2701         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2702       </files>
2703     </component>
2704     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2705       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2706       <files>
2707         <!-- include folder / device header file -->
2708         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2709         <!-- startup / system file -->
2710         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2711         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.1.0" attr="config" condition="GCC"/>
2712         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2713         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2714         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2715       </files>
2716     </component>
2717
2718     <!-- Cortex-M4 -->
2719     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS">
2720       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2721       <files>
2722         <!-- include folder / device header file -->
2723         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2724         <!-- startup / system file -->
2725         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
2726         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2727         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2728         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2729        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2730       </files>
2731     </component>
2732     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2733       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2734       <files>
2735         <!-- include folder / device header file -->
2736         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2737         <!-- startup / system file -->
2738         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2739         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.1.0" attr="config" condition="GCC"/>
2740         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2741         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2742         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2743       </files>
2744     </component>
2745
2746     <!-- Cortex-M7 -->
2747     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS">
2748       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2749       <files>
2750         <!-- include folder / device header file -->
2751         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2752         <!-- startup / system file -->
2753         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
2754         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2755         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2756         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2757         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2758       </files>
2759     </component>
2760     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2761       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2762       <files>
2763         <!-- include folder / device header file -->
2764         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2765         <!-- startup / system file -->
2766         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2767         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.1.0" attr="config" condition="GCC"/>
2768         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2769         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2770         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2771       </files>
2772     </component>
2773
2774     <!-- Cortex-M23 -->
2775     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM23 CMSIS">
2776       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2777       <files>
2778         <!-- include folder / device header file -->
2779         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2780         <!-- startup / system file -->
2781         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.3" attr="config"/>
2782         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
2783         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2784         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2785         <!-- SAU configuration -->
2786         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2787       </files>
2788     </component>
2789     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM23 CMSIS">
2790       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2791       <files>
2792         <!-- include folder / device header file -->
2793         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2794         <!-- startup / system file -->
2795         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.1" attr="config" condition="ARMCC"/>
2796         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.1.0" attr="config" condition="GCC"/>
2797         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.1.0" attr="config" condition="GCC"/>
2798         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2799         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2800         <!-- SAU configuration -->
2801         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2802       </files>
2803     </component>
2804
2805     <!-- Cortex-M33 -->
2806     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM33 CMSIS">
2807       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2808       <files>
2809         <!-- include folder / device header file -->
2810         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2811         <!-- startup / system file -->
2812         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.3" attr="config"/>
2813         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2814         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.1.0" attr="config" condition="GCC"/>
2815         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2816         <!-- SAU configuration -->
2817         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2818       </files>
2819     </component>
2820     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM33 CMSIS">
2821       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2822       <files>
2823         <!-- include folder / device header file -->
2824         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2825         <!-- startup / system file -->
2826         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2827         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.1.0" attr="config" condition="GCC"/>
2828         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.1.0" attr="config" condition="GCC"/>
2829         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2830         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2831         <!-- SAU configuration -->
2832         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2833       </files>
2834     </component>
2835
2836     <!-- Cortex-M35P -->
2837     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM35P CMSIS">
2838       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2839       <files>
2840         <!-- include folder / device header file -->
2841         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2842         <!-- startup / system file -->
2843         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.3" attr="config"/>
2844         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2845         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.1.0" attr="config" condition="GCC"/>
2846         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2847         <!-- SAU configuration -->
2848         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2849       </files>
2850     </component>
2851     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM35P CMSIS">
2852       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2853       <files>
2854         <!-- include folder / device header file -->
2855         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2856         <!-- startup / system file -->
2857         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2858         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.1.0" attr="config" condition="GCC"/>
2859         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.1.0" attr="config" condition="GCC"/>
2860         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
2861         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2862         <!-- SAU configuration -->
2863         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2864       </files>
2865     </component>
2866
2867     <!-- Cortex-M55 -->
2868     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM55 CMSIS">
2869       <description>System and Startup for Generic Cortex-M55 device</description>
2870       <files>
2871         <!-- include folder / device header file -->
2872         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2873         <!-- startup / system file -->
2874         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.0.0" attr="config"/>
2875         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2876         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.1.0" attr="config" condition="GCC"/>
2877         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.0.0" attr="config"/>
2878         <!-- SAU configuration -->
2879         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2880       </files>
2881     </component>
2882
2883     <!-- Cortex-SC000 -->
2884     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS">
2885       <description>System and Startup for Generic Arm SC000 device</description>
2886       <files>
2887         <!-- include folder / device header file -->
2888         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2889         <!-- startup / system file -->
2890         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
2891         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2892         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2893         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2894         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2895       </files>
2896     </component>
2897     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2898       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2899       <files>
2900         <!-- include folder / device header file -->
2901         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2902         <!-- startup / system file -->
2903         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2904         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.1.0" attr="config" condition="GCC"/>
2905         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2906         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2907         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2908       </files>
2909     </component>
2910
2911     <!-- Cortex-SC300 -->
2912     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS">
2913       <description>System and Startup for Generic Arm SC300 device</description>
2914       <files>
2915         <!-- include folder / device header file -->
2916         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2917         <!-- startup / system file -->
2918         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
2919         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2920         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2921         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2922         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2923       </files>
2924     </component>
2925     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2926       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2927       <files>
2928         <!-- include folder / device header file -->
2929         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2930         <!-- startup / system file -->
2931         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2932         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.1.0" attr="config" condition="GCC"/>
2933         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2934         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2935         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2936       </files>
2937     </component>
2938
2939     <!-- ARMv8MBL -->
2940     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMv8MBL CMSIS">
2941       <description>System and Startup for Generic Armv8-M Baseline device</description>
2942       <files>
2943         <!-- include folder / device header file -->
2944         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2945         <!-- startup / system file -->
2946         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.3" attr="config"/>
2947         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
2948         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.1.0" attr="config" condition="GCC"/>
2949         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2950         <!-- SAU configuration -->
2951         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2952       </files>
2953     </component>
2954     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMv8MBL CMSIS">
2955       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2956       <files>
2957         <!-- include folder / device header file -->
2958         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2959         <!-- startup / system file -->
2960         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.1" attr="config" condition="ARMCC"/>
2961         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.1.0" attr="config" condition="GCC"/>
2962         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2963         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2964         <!-- SAU configuration -->
2965         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2966       </files>
2967     </component>
2968
2969     <!-- ARMv8MML -->
2970     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMv8MML CMSIS">
2971       <description>System and Startup for Generic Armv8-M Mainline device</description>
2972       <files>
2973         <!-- include folder / device header file -->
2974         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2975         <!-- startup / system file -->
2976         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.3" attr="config"/>
2977         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2978         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.1.0" attr="config" condition="GCC"/>
2979         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2980         <!-- SAU configuration -->
2981         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2982       </files>
2983     </component>
2984     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMv8MML CMSIS">
2985       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2986       <files>
2987         <!-- include folder / device header file -->
2988         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2989         <!-- startup / system file -->
2990         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2991         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.1.0" attr="config" condition="GCC"/>
2992         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.1.0" attr="config" condition="GCC"/>
2993         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2994         <!-- SAU configuration -->
2995         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2996       </files>
2997     </component>
2998
2999     <!-- ARMv81MML -->
3000     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.1" condition="ARMv81MML CMSIS">
3001       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
3002       <files>
3003         <!-- include folder / device header file -->
3004         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
3005         <!-- startup / system file -->
3006         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.3" attr="config"/>
3007         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
3008         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.1.0" attr="config" condition="GCC"/>
3009         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
3010         <!-- SAU configuration -->
3011         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
3012       </files>
3013     </component>
3014
3015     <!-- Cortex-A5 -->
3016     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
3017       <description>System and Startup for Generic Arm Cortex-A5 device</description>
3018       <files>
3019         <!-- include folder / device header file -->
3020         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
3021         <!-- startup / system / mmu files -->
3022         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3023         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3024         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3025         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3026         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
3027         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
3028         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
3029         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
3030         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
3031         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
3032         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
3033         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
3034
3035       </files>
3036     </component>
3037
3038     <!-- Cortex-A7 -->
3039     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
3040       <description>System and Startup for Generic Arm Cortex-A7 device</description>
3041       <files>
3042         <!-- include folder / device header file -->
3043         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
3044         <!-- startup / system / mmu files -->
3045         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3046         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3047         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3048         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3049         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
3050         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
3051         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
3052         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
3053         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
3054         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
3055         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
3056         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
3057       </files>
3058     </component>
3059
3060     <!-- Cortex-A9 -->
3061     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
3062       <description>System and Startup for Generic Arm Cortex-A9 device</description>
3063       <files>
3064         <!-- include folder / device header file -->
3065         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3066         <!-- startup / system / mmu files -->
3067         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3068         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3069         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3070         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3071         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3072         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3073         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3074         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3075         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
3076         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
3077         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
3078         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
3079       </files>
3080     </component>
3081
3082     <!-- IRQ Controller -->
3083     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3084       <description>IRQ Controller implementation using GIC</description>
3085       <files>
3086         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3087       </files>
3088     </component>
3089
3090     <!-- OS Tick -->
3091     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3092       <description>OS Tick implementation using Private Timer</description>
3093       <files>
3094         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3095       </files>
3096     </component>
3097
3098     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3099       <description>OS Tick implementation using Generic Physical Timer</description>
3100       <files>
3101         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3102       </files>
3103     </component>
3104
3105     <!-- CMSIS-DSP component -->
3106     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.8.0" condition="CMSIS DSP">
3107       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3108       <files>
3109         <!-- CPU independent -->
3110         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3111         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3112
3113         <!-- CPU and Compiler dependent -->
3114         <!-- ARMCC -->
3115         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3116         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3117         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3118         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3119         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3120         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3121         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3122         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3123         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3124         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3125         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3126         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3127         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3128         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3129         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3130         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3131
3132         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3133         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3134         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3135         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3136         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3137         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3138         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3139         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3140         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3141         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3142         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3143         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3144         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3145         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3146         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3147         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3148
3149         <!-- GCC -->
3150         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3151         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3152         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3153         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3154         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3155         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3156         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3157         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3158
3159         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3160         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3161         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3162         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3163         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3164         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3165         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3166         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3167         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3168         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3169         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3170         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3171         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3172         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3173         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3174         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3175
3176         <!-- IAR -->
3177         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3178         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3179         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3180         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3181         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3182         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3183         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3184         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3185         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3186         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3187         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3188         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3189         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3190         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3191         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3192         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3193
3194         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3195         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3196         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3197         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3198         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3199         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3200         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3201         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3202         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3203         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3204         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3205         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3206         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3207         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3208         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3209         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3210
3211       </files>
3212     </component>
3213     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.9.0-dev" isDefaultVariant="true" condition="CMSIS DSP">
3214       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3215       <files>
3216         <!-- CPU independent -->
3217         <file category="doc"      name="CMSIS/Documentation/DSP/html/index.html"/>
3218         <file category="header"   name="CMSIS/DSP/Include/arm_math.h"/>
3219         <file category="header"   name="CMSIS/DSP/Include/arm_math_f16.h"/>
3220         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables.h"/>
3221         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables_f16.h"/>
3222         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs.h"/>
3223         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs_f16.h"/>
3224
3225         <file category="include"  name="CMSIS/DSP/PrivateInclude/"/>
3226         <file category="include"  name="CMSIS/DSP/Include/"/>
3227
3228         <!-- DSP sources (core) -->
3229         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3230
3231         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
3232         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3233         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3234         <file category="source"   name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3235         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
3236         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3237         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3238         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3239         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3240         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3241         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
3242         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3243
3244         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctions.c"/>
3245
3246         <!-- DSP sources F16 versions -->
3247         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.c"/>
3248         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c"/>
3249         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.c"/>
3250         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTablesF16.c"/>
3251         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctionsF16.c"/>
3252         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctionsF16.c"/>
3253         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.c"/>
3254         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c"/>
3255         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctionsF16.c"/>
3256         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctionsF16.c"/>
3257         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctionsF16.c"/>
3258         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctionsF16.c"/>
3259         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctionsF16.c"/>
3260
3261         <!-- Compute Library for Cortex-A -->
3262         <file category="header"   name="CMSIS/DSP/ComputeLibrary/Include/NEMath.h"        condition="ARMv7-A Device"/>
3263         <file category="source"   name="CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c"  condition="ARMv7-A Device"/>
3264       </files>
3265     </component>
3266
3267     <!-- CMSIS-NN component -->
3268     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.3.0" condition="CMSIS NN">
3269       <description>CMSIS-NN Neural Network Library</description>
3270       <files>
3271         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3272         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3273         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
3274         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
3275
3276         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3277         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3278         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3279         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
3280         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
3281         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
3282         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c"/>
3283         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3284         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3285         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3286         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
3287         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
3288         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
3289         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
3290         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
3291         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
3292         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3293         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3294         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
3295         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3296         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3297         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
3298         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3299         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3300         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
3301         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
3302         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
3303         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
3304         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8_opt.c"/>
3305         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
3306         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
3307         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3308         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
3309         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
3310         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
3311         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3312         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3313         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3314         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3315         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
3316         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3317         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3318         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
3319         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
3320         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
3321         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
3322         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
3323         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
3324         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3325         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3326         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
3327         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3328         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
3329         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
3330         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3331         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3332         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3333         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3334         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3335         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3336         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3337         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
3338         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
3339         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3340         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
3341       </files>
3342     </component>
3343
3344     <!-- CMSIS-RTOS Keil RTX component -->
3345     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3346       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3347       <RTE_Components_h>
3348         <!-- the following content goes into file 'RTE_Components.h' -->
3349         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3350         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3351       </RTE_Components_h>
3352       <files>
3353         <!-- CPU independent -->
3354         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3355         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3356         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3357
3358         <!-- RTX templates -->
3359         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3360         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3361         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3362         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3363         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3364         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3365         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3366         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3367         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3368         <!-- tool-chain specific template file -->
3369         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3370         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3371         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3372
3373         <!-- CPU and Compiler dependent -->
3374         <!-- ARMCC -->
3375         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3376         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3377         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3378         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3379         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3380         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3381         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3382         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3383         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3384         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3385         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3386         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3387         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3388         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3389         <!-- GCC -->
3390         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3391         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3392         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3393         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3394         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3395         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3396         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3397         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3398         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3399         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3400         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3401         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3402         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3403         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3404         <!-- IAR -->
3405         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3406         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3407         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3408         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3409         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3410         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3411         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3412         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3413         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3414         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3415         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3416         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3417         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3418         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3419       </files>
3420     </component>
3421     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3422     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3423       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3424       <RTE_Components_h>
3425         <!-- the following content goes into file 'RTE_Components.h' -->
3426         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3427         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3428       </RTE_Components_h>
3429       <files>
3430         <!-- CPU independent -->
3431         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3432         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3433         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3434
3435         <!-- RTX templates -->
3436         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3437         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3438         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3439         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3440         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3441         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3442         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3443         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3444         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3445         <!-- tool-chain specific template file -->
3446         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3447         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3448         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3449
3450         <!-- CPU and Compiler dependent -->
3451         <!-- ARMCC -->
3452         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3453         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3454         <!-- GCC -->
3455         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3456         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3457         <!-- IAR -->
3458       </files>
3459     </component>
3460
3461     <!-- CMSIS-RTOS Keil RTX5 component -->
3462     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.2" Capiversion="1.0.0" condition="RTOS RTX5">
3463       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3464       <RTE_Components_h>
3465         <!-- the following content goes into file 'RTE_Components.h' -->
3466         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3467         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3468       </RTE_Components_h>
3469       <files>
3470         <!-- RTX header file -->
3471         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3472         <!-- RTX compatibility module for API V1 -->
3473         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3474       </files>
3475     </component>
3476
3477     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3478     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3479       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
3480       <RTE_Components_h>
3481         <!-- the following content goes into file 'RTE_Components.h' -->
3482         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3483         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3484       </RTE_Components_h>
3485       <files>
3486         <!-- RTX documentation -->
3487         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3488
3489         <!-- RTX header files -->
3490         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3491
3492         <!-- RTX configuration -->
3493         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3494         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3495
3496         <!-- RTX templates -->
3497         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3498         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3499         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3500         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3501         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3502         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3503         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3504         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3505         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3506         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3507
3508         <!-- RTX library configuration -->
3509         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3510
3511         <!-- RTX libraries (CPU and Compiler dependent) -->
3512         <!-- ARMCC -->
3513         <file category="library" condition="CM0_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3514         <file category="library" condition="CM1_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3515         <file category="library" condition="CM3_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3516         <file category="library" condition="CM4_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3517         <file category="library" condition="CM4_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3518         <file category="library" condition="CM7_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3519         <file category="library" condition="CM7_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3520         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3521         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3522         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3523         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3524         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3525         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3526         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3527         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3528         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3529         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3530         <!-- GCC -->
3531         <file category="library" condition="CM0_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3532         <file category="library" condition="CM1_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3533         <file category="library" condition="CM3_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3534         <file category="library" condition="CM4_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3535         <file category="library" condition="CM4_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3536         <file category="library" condition="CM7_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3537         <file category="library" condition="CM7_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3538         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3539         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3540         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3541         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3542         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3543         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3544         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3545         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3546         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3547         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3548         <!-- IAR -->
3549         <file category="library" condition="CM0_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3550         <file category="library" condition="CM1_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3551         <file category="library" condition="CM3_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3552         <file category="library" condition="CM4_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3553         <file category="library" condition="CM4_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3554         <file category="library" condition="CM7_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3555         <file category="library" condition="CM7_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3556         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3557         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3558         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3559         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3560         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3561         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3562         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3563         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3564         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3565         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3566       </files>
3567     </component>
3568     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3569       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
3570       <RTE_Components_h>
3571         <!-- the following content goes into file 'RTE_Components.h' -->
3572         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3573         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3574         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3575       </RTE_Components_h>
3576       <files>
3577         <!-- RTX documentation -->
3578         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3579
3580         <!-- RTX header files -->
3581         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3582
3583         <!-- RTX configuration -->
3584         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3585         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3586
3587         <!-- RTX templates -->
3588         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3589         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3590         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3591         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3592         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3593         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3594         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3595         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3596         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3597         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3598
3599         <!-- RTX library configuration -->
3600         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3601
3602         <!-- RTX libraries (CPU and Compiler dependent) -->
3603         <!-- ARMCC -->
3604         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3605         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3606         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3607         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3608         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3609         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3610         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3611         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3612         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3613         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3614         <!-- GCC -->
3615         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3616         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3617         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3618         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3619         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3620         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3621         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3622         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3623         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3624         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3625         <!-- IAR -->
3626         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3627         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3628         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3629         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3630         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3631         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3632         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3633         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3634         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3635         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3636       </files>
3637     </component>
3638     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3639       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
3640       <RTE_Components_h>
3641         <!-- the following content goes into file 'RTE_Components.h' -->
3642         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3643         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3644         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3645       </RTE_Components_h>
3646       <files>
3647         <!-- RTX documentation -->
3648         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3649
3650         <!-- RTX header files -->
3651         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3652
3653         <!-- RTX configuration -->
3654         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3655         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3656
3657         <!-- RTX templates -->
3658         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3659         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3660         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3661         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3662         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3663         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3664         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3665         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3666         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3667         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3668
3669         <!-- RTX sources (core) -->
3670         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3671         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3672         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3673         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3674         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3675         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3676         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3677         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3678         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3679         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3680         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3681         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3682         <!-- RTX sources (library configuration) -->
3683         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3684         <!-- RTX sources (handlers ARMCC) -->
3685         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"      condition="CM0_ARMCC"/>
3686         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"      condition="CM1_ARMCC"/>
3687         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM3_ARMCC"/>
3688         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM4_ARMCC"/>
3689         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"     condition="CM4_FP_ARMCC"/>
3690         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM7_ARMCC"/>
3691         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"     condition="CM7_FP_ARMCC"/>
3692         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
3693         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
3694         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
3695         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM35P_ARMCC"/>
3696         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM35P_FP_ARMCC"/>
3697         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3698         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3699         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3700         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
3701         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
3702         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
3703         <!-- RTX sources (handlers GCC) -->
3704         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"      condition="CM0_GCC"/>
3705         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"      condition="CM1_GCC"/>
3706         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM3_GCC"/>
3707         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM4_GCC"/>
3708         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"     condition="CM4_FP_GCC"/>
3709         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM7_GCC"/>
3710         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"     condition="CM7_FP_GCC"/>
3711         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3712         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3713         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3714         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3715         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3716         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3717         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3718         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3719         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3720         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3721         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3722         <!-- RTX sources (handlers IAR) -->
3723         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"      condition="CM0_IAR"/>
3724         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"      condition="CM1_IAR"/>
3725         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM3_IAR"/>
3726         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM4_IAR"/>
3727         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"     condition="CM4_FP_IAR"/>
3728         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM7_IAR"/>
3729         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"     condition="CM7_FP_IAR"/>
3730         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3731         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3732         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3733         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3734         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3735         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3736         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3737         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3738         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3739         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3740         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3741         <!-- OS Tick (SysTick) -->
3742         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3743       </files>
3744     </component>
3745     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3746       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3747       <RTE_Components_h>
3748         <!-- the following content goes into file 'RTE_Components.h' -->
3749         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3750         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3751         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3752       </RTE_Components_h>
3753       <files>
3754         <!-- RTX documentation -->
3755         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3756
3757         <!-- RTX header files -->
3758         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3759
3760         <!-- RTX configuration -->
3761         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3762         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3763
3764         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3765
3766         <!-- RTX templates -->
3767         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3768         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3769         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3770         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3771         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3772         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3773         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3774         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3775         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3776         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3777
3778         <!-- RTX sources (core) -->
3779         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3780         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3781         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3782         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3783         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3784         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3785         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3786         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3787         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3788         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3789         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3790         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3791         <!-- RTX sources (library configuration) -->
3792         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3793         <!-- RTX sources (handlers ARMCC) -->
3794         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3795         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3796         <!-- RTX sources (handlers GCC) -->
3797         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3798         <!-- RTX sources (handlers IAR) -->
3799         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3800       </files>
3801     </component>
3802     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3803       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
3804       <RTE_Components_h>
3805         <!-- the following content goes into file 'RTE_Components.h' -->
3806         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3807         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3808         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3809         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3810       </RTE_Components_h>
3811       <files>
3812         <!-- RTX documentation -->
3813         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3814
3815         <!-- RTX header files -->
3816         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3817
3818         <!-- RTX configuration -->
3819         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3820         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3821
3822         <!-- RTX templates -->
3823         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3824         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3825         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3826         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3827         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3828         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3829         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3830         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3831         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3832         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3833
3834         <!-- RTX sources (core) -->
3835         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3836         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3837         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3838         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3839         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3840         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3841         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3842         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3843         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3844         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3845         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3846         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3847         <!-- RTX sources (library configuration) -->
3848         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3849         <!-- RTX sources (ARMCC handlers) -->
3850         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
3851         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
3852         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
3853         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM35P_ARMCC"/>
3854         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM35P_FP_ARMCC"/>
3855         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_NOMVE_ARMCC"/>
3856         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_MVE_ARMCC"/>
3857         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_FPU_ARMCC"/>
3858         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
3859         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
3860         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
3861         <!-- RTX sources (GCC handlers) -->
3862         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3863         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3864         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_FP_GCC"/>
3865         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3866         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_FP_GCC"/>
3867         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_NOMVE_GCC"/>
3868         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_MVE_GCC"/>
3869         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_FPU_GCC"/>
3870         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3871         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3872         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_FP_GCC"/>
3873         <!-- RTX sources (IAR handlers) -->
3874         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="CM23_IAR"/>
3875         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_IAR"/>
3876         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_FP_IAR"/>
3877         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM35P_IAR"/>
3878         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM35P_FP_IAR"/>
3879         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3880         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_NOFPU_MVE_IAR"/>
3881         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_FPU_IAR"/>
3882         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="ARMv8MBL_IAR"/>
3883         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_IAR"/>
3884         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_FP_IAR"/>
3885         <!-- OS Tick (SysTick) -->
3886         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3887       </files>
3888     </component>
3889
3890     <!-- CMSIS-Driver Custom components -->
3891     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3892       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3893       <files>
3894         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3895         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3896       </files>
3897     </component>
3898     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3899       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3900       <files>
3901         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3902         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3903       </files>
3904     </component>
3905     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3906       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3907       <files>
3908         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3909         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3910       </files>
3911     </component>
3912     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3913       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3914       <files>
3915         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3916         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3917       </files>
3918     </component>
3919     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3920       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3921       <files>
3922         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3923         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3924       </files>
3925     </component>
3926     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3927       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3928       <files>
3929         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3930         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3931       </files>
3932     </component>
3933     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3934       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3935       <files>
3936         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3937         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3938       </files>
3939     </component>
3940     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3941       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3942       <files>
3943         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3944         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
3945       </files>
3946     </component>
3947     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3948       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3949       <files>
3950         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3951         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3952         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3953         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3954       </files>
3955     </component>
3956     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3957       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3958       <files>
3959         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3960         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3961       </files>
3962     </component>
3963     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3964       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3965       <files>
3966         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3967         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3968       </files>
3969     </component>
3970     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3971       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3972       <files>
3973         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3974         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3975       </files>
3976     </component>
3977     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3978       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3979       <files>
3980         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3981         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3982       </files>
3983     </component>
3984     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3985       <description>Access to #include Driver_WiFi.h file</description>
3986       <files>
3987         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3988         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
3989       </files>
3990     </component>
3991
3992     <!-- VIO components -->
3993     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
3994       <description>Virtual I/O custom implementation template</description>
3995       <files>
3996         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
3997       </files>
3998     </component>
3999     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
4000       <description>Virtual I/O implementation using memory only</description>
4001       <files>
4002         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
4003       </files>
4004     </component>
4005
4006   </components>
4007
4008   <boards>
4009     <board name="uVision Simulator" vendor="Keil">
4010       <description>uVision Simulator</description>
4011       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
4012       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
4013       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
4014       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
4015       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
4016       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
4017       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
4018       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
4019       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
4020       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
4021       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
4022       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
4023       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
4024       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
4025       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
4026       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
4027       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
4028       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
4029       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
4030       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
4031       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
4032       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
4033       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
4034       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
4035       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
4036       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
4037     </board>
4038
4039     <board name="EWARM Simulator" vendor="IAR">
4040       <description>EWARM Simulator</description>
4041       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
4042       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
4043       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
4044       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
4045       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
4046       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
4047       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
4048       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
4049       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
4050       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
4051       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
4052       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
4053       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
4054       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
4055       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
4056       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
4057       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
4058       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
4059       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
4060       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
4061       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
4062       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
4063       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
4064       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
4065       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
4066       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
4067     </board>
4068   </boards>
4069
4070   <examples>
4071     <example name="DSP_Lib Bayes example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_bayes_example">
4072       <description>DSP_Lib Bayes example</description>
4073       <board name="uVision Simulator" vendor="Keil"/>
4074       <project>
4075         <environment name="uv" load="arm_bayes_example.uvprojx"/>
4076       </project>
4077       <attributes>
4078         <component Cclass="CMSIS" Cgroup="CORE"/>
4079         <component Cclass="CMSIS" Cgroup="DSP"/>
4080         <component Cclass="Device" Cgroup="Startup"/>
4081         <category>Getting Started</category>
4082       </attributes>
4083     </example>
4084
4085     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
4086       <description>DSP_Lib Class Marks example</description>
4087       <board name="uVision Simulator" vendor="Keil"/>
4088       <project>
4089         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
4090       </project>
4091       <attributes>
4092         <component Cclass="CMSIS" Cgroup="CORE"/>
4093         <component Cclass="CMSIS" Cgroup="DSP"/>
4094         <component Cclass="Device" Cgroup="Startup"/>
4095         <category>Getting Started</category>
4096       </attributes>
4097     </example>
4098
4099     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
4100       <description>DSP_Lib Convolution example</description>
4101       <board name="uVision Simulator" vendor="Keil"/>
4102       <project>
4103         <environment name="uv" load="arm_convolution_example.uvprojx"/>
4104       </project>
4105       <attributes>
4106         <component Cclass="CMSIS" Cgroup="CORE"/>
4107         <component Cclass="CMSIS" Cgroup="DSP"/>
4108         <component Cclass="Device" Cgroup="Startup"/>
4109         <category>Getting Started</category>
4110       </attributes>
4111     </example>
4112
4113     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
4114       <description>DSP_Lib Dotproduct example</description>
4115       <board name="uVision Simulator" vendor="Keil"/>
4116       <project>
4117         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
4118       </project>
4119       <attributes>
4120         <component Cclass="CMSIS" Cgroup="CORE"/>
4121         <component Cclass="CMSIS" Cgroup="DSP"/>
4122         <component Cclass="Device" Cgroup="Startup"/>
4123         <category>Getting Started</category>
4124       </attributes>
4125     </example>
4126
4127     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
4128       <description>DSP_Lib FFT Bin example</description>
4129       <board name="uVision Simulator" vendor="Keil"/>
4130       <project>
4131         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
4132       </project>
4133       <attributes>
4134         <component Cclass="CMSIS" Cgroup="CORE"/>
4135         <component Cclass="CMSIS" Cgroup="DSP"/>
4136         <component Cclass="Device" Cgroup="Startup"/>
4137         <category>Getting Started</category>
4138       </attributes>
4139     </example>
4140
4141     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
4142       <description>DSP_Lib FIR example</description>
4143       <board name="uVision Simulator" vendor="Keil"/>
4144       <project>
4145         <environment name="uv" load="arm_fir_example.uvprojx"/>
4146       </project>
4147       <attributes>
4148         <component Cclass="CMSIS" Cgroup="CORE"/>
4149         <component Cclass="CMSIS" Cgroup="DSP"/>
4150         <component Cclass="Device" Cgroup="Startup"/>
4151         <category>Getting Started</category>
4152       </attributes>
4153     </example>
4154
4155     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
4156       <description>DSP_Lib Graphic Equalizer example</description>
4157       <board name="uVision Simulator" vendor="Keil"/>
4158       <project>
4159         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
4160       </project>
4161       <attributes>
4162         <component Cclass="CMSIS" Cgroup="CORE"/>
4163         <component Cclass="CMSIS" Cgroup="DSP"/>
4164         <component Cclass="Device" Cgroup="Startup"/>
4165         <category>Getting Started</category>
4166       </attributes>
4167     </example>
4168
4169     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4170       <description>DSP_Lib Linear Interpolation example</description>
4171       <board name="uVision Simulator" vendor="Keil"/>
4172       <project>
4173         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4174       </project>
4175       <attributes>
4176         <component Cclass="CMSIS" Cgroup="CORE"/>
4177         <component Cclass="CMSIS" Cgroup="DSP"/>
4178         <component Cclass="Device" Cgroup="Startup"/>
4179         <category>Getting Started</category>
4180       </attributes>
4181     </example>
4182
4183     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4184       <description>DSP_Lib Matrix example</description>
4185       <board name="uVision Simulator" vendor="Keil"/>
4186       <project>
4187         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4188       </project>
4189       <attributes>
4190         <component Cclass="CMSIS" Cgroup="CORE"/>
4191         <component Cclass="CMSIS" Cgroup="DSP"/>
4192         <component Cclass="Device" Cgroup="Startup"/>
4193         <category>Getting Started</category>
4194       </attributes>
4195     </example>
4196
4197     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4198       <description>DSP_Lib Signal Convergence example</description>
4199       <board name="uVision Simulator" vendor="Keil"/>
4200       <project>
4201         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4202       </project>
4203       <attributes>
4204         <component Cclass="CMSIS" Cgroup="CORE"/>
4205         <component Cclass="CMSIS" Cgroup="DSP"/>
4206         <component Cclass="Device" Cgroup="Startup"/>
4207         <category>Getting Started</category>
4208       </attributes>
4209     </example>
4210
4211     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4212       <description>DSP_Lib Sinus/Cosinus example</description>
4213       <board name="uVision Simulator" vendor="Keil"/>
4214       <project>
4215         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4216       </project>
4217       <attributes>
4218         <component Cclass="CMSIS" Cgroup="CORE"/>
4219         <component Cclass="CMSIS" Cgroup="DSP"/>
4220         <component Cclass="Device" Cgroup="Startup"/>
4221         <category>Getting Started</category>
4222       </attributes>
4223     </example>
4224
4225     <example name="DSP_Lib SVM example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_svm_example">
4226       <description>DSP_Lib SVM example</description>
4227       <board name="uVision Simulator" vendor="Keil"/>
4228       <project>
4229         <environment name="uv" load="arm_svm_example.uvprojx"/>
4230       </project>
4231       <attributes>
4232         <component Cclass="CMSIS" Cgroup="CORE"/>
4233         <component Cclass="CMSIS" Cgroup="DSP"/>
4234         <component Cclass="Device" Cgroup="Startup"/>
4235         <category>Getting Started</category>
4236       </attributes>
4237     </example>
4238
4239     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4240       <description>DSP_Lib Variance example</description>
4241       <board name="uVision Simulator" vendor="Keil"/>
4242       <project>
4243         <environment name="uv" load="arm_variance_example.uvprojx"/>
4244       </project>
4245       <attributes>
4246         <component Cclass="CMSIS" Cgroup="CORE"/>
4247         <component Cclass="CMSIS" Cgroup="DSP"/>
4248         <component Cclass="Device" Cgroup="Startup"/>
4249         <category>Getting Started</category>
4250       </attributes>
4251     </example>
4252
4253     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4254       <description>Neural Network CIFAR10 example</description>
4255       <board name="uVision Simulator" vendor="Keil"/>
4256       <project>
4257         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4258       </project>
4259       <attributes>
4260         <component Cclass="CMSIS" Cgroup="CORE"/>
4261         <component Cclass="CMSIS" Cgroup="DSP"/>
4262         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4263         <component Cclass="Device" Cgroup="Startup"/>
4264         <category>Getting Started</category>
4265       </attributes>
4266     </example>
4267
4268     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4269       <description>Neural Network CIFAR10 example</description>
4270       <board name="EWARM Simulator" vendor="IAR"/>
4271       <project>
4272         <environment name="iar" load="NN-example-cifar10.ewp"/>
4273       </project>
4274       <attributes>
4275         <component Cclass="CMSIS" Cgroup="CORE"/>
4276         <component Cclass="CMSIS" Cgroup="DSP"/>
4277         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4278         <component Cclass="Device" Cgroup="Startup"/>
4279         <category>Getting Started</category>
4280       </attributes>
4281     </example>
4282
4283     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4284       <description>Neural Network GRU example</description>
4285       <board name="uVision Simulator" vendor="Keil"/>
4286       <project>
4287         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4288       </project>
4289       <attributes>
4290         <component Cclass="CMSIS" Cgroup="CORE"/>
4291         <component Cclass="CMSIS" Cgroup="DSP"/>
4292         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4293         <component Cclass="Device" Cgroup="Startup"/>
4294         <category>Getting Started</category>
4295       </attributes>
4296     </example>
4297
4298     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4299       <description>Neural Network GRU example</description>
4300       <board name="EWARM Simulator" vendor="IAR"/>
4301       <project>
4302         <environment name="iar" load="NN-example-gru.ewp"/>
4303       </project>
4304       <attributes>
4305         <component Cclass="CMSIS" Cgroup="CORE"/>
4306         <component Cclass="CMSIS" Cgroup="DSP"/>
4307         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4308         <component Cclass="Device" Cgroup="Startup"/>
4309         <category>Getting Started</category>
4310       </attributes>
4311     </example>
4312
4313     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4314       <description>CMSIS-RTOS2 Blinky example</description>
4315       <board name="uVision Simulator" vendor="Keil"/>
4316       <project>
4317         <environment name="uv" load="Blinky.uvprojx"/>
4318       </project>
4319       <attributes>
4320         <component Cclass="CMSIS" Cgroup="CORE"/>
4321         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4322         <component Cclass="Device" Cgroup="Startup"/>
4323         <category>Getting Started</category>
4324       </attributes>
4325     </example>
4326
4327     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4328       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4329       <board name="uVision Simulator" vendor="Keil"/>
4330       <project>
4331         <environment name="uv" load="Blinky.uvprojx"/>
4332       </project>
4333       <attributes>
4334         <component Cclass="CMSIS" Cgroup="CORE"/>
4335         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4336         <component Cclass="Device" Cgroup="Startup"/>
4337         <category>Getting Started</category>
4338       </attributes>
4339     </example>
4340
4341     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4342       <description>CMSIS-RTOS2 Message Queue Example</description>
4343       <board name="uVision Simulator" vendor="Keil"/>
4344       <project>
4345         <environment name="uv" load="MsqQueue.uvprojx"/>
4346       </project>
4347       <attributes>
4348         <component Cclass="CMSIS" Cgroup="CORE"/>
4349         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4350         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4351         <component Cclass="Device" Cgroup="Startup"/>
4352         <category>Getting Started</category>
4353       </attributes>
4354     </example>
4355
4356     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4357       <description>CMSIS-RTOS2 Memory Pool Example</description>
4358       <board name="uVision Simulator" vendor="Keil"/>
4359       <project>
4360         <environment name="uv" load="MemPool.uvprojx"/>
4361       </project>
4362       <attributes>
4363         <component Cclass="CMSIS" Cgroup="CORE"/>
4364         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4365         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4366         <component Cclass="Device" Cgroup="Startup"/>
4367         <category>Getting Started</category>
4368       </attributes>
4369     </example>
4370
4371     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4372       <description>Bare-metal secure/non-secure example without RTOS</description>
4373       <board name="uVision Simulator" vendor="Keil"/>
4374       <project>
4375         <environment name="uv" load="NoRTOS.uvmpw"/>
4376       </project>
4377       <attributes>
4378         <component Cclass="CMSIS" Cgroup="CORE"/>
4379         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4380         <component Cclass="Device" Cgroup="Startup"/>
4381         <category>Getting Started</category>
4382       </attributes>
4383     </example>
4384
4385     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4386       <description>Secure/non-secure RTOS example with thread context management</description>
4387       <board name="uVision Simulator" vendor="Keil"/>
4388       <project>
4389         <environment name="uv" load="RTOS.uvmpw"/>
4390       </project>
4391       <attributes>
4392         <component Cclass="CMSIS" Cgroup="CORE"/>
4393         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4394         <component Cclass="Device" Cgroup="Startup"/>
4395         <category>Getting Started</category>
4396       </attributes>
4397     </example>
4398
4399     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4400       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4401       <board name="uVision Simulator" vendor="Keil"/>
4402       <project>
4403         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4404       </project>
4405       <attributes>
4406         <component Cclass="CMSIS" Cgroup="CORE"/>
4407         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4408         <component Cclass="Device" Cgroup="Startup"/>
4409         <category>Getting Started</category>
4410       </attributes>
4411     </example>
4412
4413     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
4414       <description>CMSIS-RTOS2 Blinky example</description>
4415       <board name="EWARM Simulator" vendor="IAR"/>
4416       <project>
4417         <environment name="iar" load="Blinky/Blinky.ewp"/>
4418       </project>
4419       <attributes>
4420         <component Cclass="CMSIS" Cgroup="CORE"/>
4421         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4422         <component Cclass="Device" Cgroup="Startup"/>
4423         <category>Getting Started</category>
4424       </attributes>
4425     </example>
4426
4427     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
4428       <description>CMSIS-RTOS2 Message Queue Example</description>
4429       <board name="EWARM Simulator" vendor="IAR"/>
4430       <project>
4431         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
4432       </project>
4433       <attributes>
4434         <component Cclass="CMSIS" Cgroup="CORE"/>
4435         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4436         <component Cclass="Device" Cgroup="Startup"/>
4437         <category>Getting Started</category>
4438       </attributes>
4439     </example>
4440
4441   </examples>
4442
4443 </package>