begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.0.2-dev4">
  12       CMSIS Device:
  13       - Added OS Tick API
  14       - Added IRQ Controller API
  15     </release>
  16     <release version="5.0.2-dev3">
  17       CMSIS-Core_A:
  18       - Added ARM Compiler 6 support
  19       - Updated Cortex-A core functions
  20       - Updated Startup and System files
  21       CMSIS-RTOS2:
  22       - API 2.1.1 (see revision history for details)
  23       - RTX 5.2.0 (see revision history for details)
  24     </release>
  25     <release version="5.0.2-dev2">
  26       CMSIS-RTOS2:
  27       - RTX 5.1.1 (see revision history for details)
  28     </release>
  29     <release version="5.0.2-dev1">
  30       CMSIS-Core_A:
  31       - Added Cortex-A core support, ARMCC specific:
  32         - Core specific register definitions
  33         - Generic Interrupt Controller functions
  34         - Generic Timer functions
  35         - L1 and L2 Cache functions
  36         - MMU functions
  37       - Added ARMCA5, ARMCA7 and ARMCA9 devices
  38       - Added Startup, System and MMU configuration files
  39     </release>
  40     <release version="5.0.2-dev0">
  41       CMSIS-Core: 5.0.2 (see revision history for details)
  42       - Added macros __UNALIGNED_UINT16_READ, __UNALIGNED_UINT16_WRITE
  43       - Added macros __UNALIGNED_UINT32_READ, __UNALIGNED_UINT32_WRITE
  44       - Set macro __UNALIGNED_UINT32 to deprecated
  45     </release>
  46     <release version="5.0.1" date="2017-02-03">
  47       Package Description:
  48       - added taxonomy for Cclass RTOS
  49       CMSIS-RTOS2:
  50       - API 2.1   (see revision history for details)
  51       - RTX 5.1.0 (see revision history for details)
  52       CMSIS-Core: 5.0.1 (see revision history for details)
  53       - Added __PACKED_STRUCT macro
  54       - Added uVisior support
  55       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  56       - Updated template for secure main function (main_s.c)
  57       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  58       CMSIS-DSP: 1.5.1 (see revision history for details)
  59       - added ARMv8M DSP libraries.
  60       CMSIS-PACK:1.4.9 (see revision history for details)
  61       - added Pack Index File specification and schema file
  62     </release>
  63     <release version="5.0.0" date="2016-11-11">
  64       Changed open source license to Apache 2.0
  65       CMSIS_Core:
  66        - Added support for Cortex-M23 and Cortex-M33.
  67        - Added ARMv8-M device configurations for mainline and baseline.
  68        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  69        - Added cmsis_compiler.h to unify compiler behaviour.
  70        - Updated function SCB_EnableICache (for Cortex-M7).
  71        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  72       CMSIS-RTOS:
  73         - bug fix in RTX 4.82 (see revision history for details)
  74       CMSIS-RTOS2:
  75         - new API including compatibility layer to CMSIS-RTOS
  76         - reference implementation based on RTX5
  77         - supports all Cortex-M variants including TrustZone for ARMv8-M
  78       CMSIS-SVD:
  79        - reworked SVD format documentation
  80        - removed SVD file database documentation as SVD files are distributed in packs
  81        - updated SVDConv for Win32 and Linux
  82       CMSIS-DSP:
  83        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  84        - Added DSP libraries build projects to CMSIS pack.
  85     </release>
  86     <release version="4.5.0" date="2015-10-28">
  87       - CMSIS-Core     4.30.0  (see revision history for details)
  88       - CMSIS-DAP      1.1.0   (unchanged)
  89       - CMSIS-Driver   2.04.0  (see revision history for details)
  90       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
  91       - CMSIS-PACK     1.4.1   (see revision history for details)
  92       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
  93       - CMSIS-SVD      1.3.1   (see revision history for details)
  94     </release>
  95     <release version="4.4.0" date="2015-09-11">
  96       - CMSIS-Core     4.20   (see revision history for details)
  97       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
  98       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
  99       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 100       - CMSIS-RTOS
 101         -- API         1.02   (unchanged)
 102         -- RTX         4.79   (see revision history for details)
 103       - CMSIS-SVD      1.3.0  (see revision history for details)
 104       - CMSIS-DAP      1.1.0  (extended with SWO support)
 105     </release>
 106     <release version="4.3.0" date="2015-03-20">
 107       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 108       - CMSIS-DSP      1.4.5  (see revision history for details)
 109       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 110       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 111       - CMSIS-RTOS
 112         -- API         1.02   (unchanged)
 113         -- RTX         4.78   (see revision history for details)
 114       - CMSIS-SVD      1.2    (unchanged)
 115     </release>
 116     <release version="4.2.0" date="2014-09-24">
 117       Adding Cortex-M7 support
 118       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 119       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 120       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 121       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 122       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 123     </release>
 124     <release version="4.1.1" date="2014-06-30">
 125       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 126     </release>
 127     <release version="4.1.0" date="2014-06-12">
 128       - CMSIS-Driver   2.02  (incompatible update)
 129       - CMSIS-Pack     1.3   (see revision history for details)
 130       - CMSIS-DSP      1.4.2 (unchanged)
 131       - CMSIS-Core     3.30  (unchanged)
 132       - CMSIS-RTOS RTX 4.74  (unchanged)
 133       - CMSIS-RTOS API 1.02  (unchanged)
 134       - CMSIS-SVD      1.10  (unchanged)
 135       PACK:
 136       - removed G++ specific files from PACK
 137       - added Component Startup variant "C Startup"
 138       - added Pack Checking Utility
 139       - updated conditions to reflect tool-chain dependency
 140       - added Taxonomy for Graphics
 141       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 142     </release>
 143     <release version="4.0.0">
 144       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 145       - CMSIS-Pack     1.1   Preliminary
 146       - CMSIS-DSP      1.4.2 (see revision history for details)
 147       - CMSIS-Core     3.30  (see revision history for details)
 148       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 149       - CMSIS-RTOS API 1.02  (unchanged)
 150       - CMSIS-SVD      1.10  (unchanged)
 151     </release>
 152     <release version="3.20.4">
 153       - CMSIS-RTOS 4.74 (see revision history for details)
 154       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 155     </release>
 156     <release version="3.20.3">
 157       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 158       - CMSIS-RTOS 4.73 (see revision history for details)
 159     </release>
 160     <release version="3.20.2">
 161       - CMSIS-Pack documentation has been added
 162       - CMSIS-Drivers header and documentation have been added to PACK
 163       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 164     </release>
 165     <release version="3.20.1">
 166       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 167       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 168     </release>
 169     <release version="3.20.0">
 170       The software portions that are deployed in the application program are now under a BSD license which allows usage
 171       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 172       The individual components have been update as listed below:
 173       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 174       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 175       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 176       - CMSIS-SVD is unchanged.
 177     </release>
 178   </releases>
 179
 180   <taxonomy>
 181     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 182     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 183     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 184     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 185     <description Cclass="File System">File Drive Support and File System</description>
 186     <description Cclass="Graphics">Graphical User Interface</description>
 187     <description Cclass="Network">Network Stack using Internet Protocols</description>
 188     <description Cclass="USB">Universal Serial Bus Stack</description>
 189     <description Cclass="Compiler">Compiler Software Extensions</description>
 190     <description Cclass="RTOS">Real-time Operating System</description>
 191   </taxonomy>
 192
 193   <devices>
 194     <!-- ******************************  Cortex-M0  ****************************** -->
 195     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 196       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 197       <description>
 198 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 199 - simple, easy-to-use programmers model
 200 - highly efficient ultra-low power operation
 201 - excellent code density
 202 - deterministic, high-performance interrupt handling
 203 - upward compatibility with the rest of the Cortex-M processor family.
 204       </description>
 205       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 206       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 207       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 208       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 209
 210       <device Dname="ARMCM0">
 211         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 212         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 213       </device>
 214     </family>
 215
 216     <!-- ******************************  Cortex-M0P  ****************************** -->
 217     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 218       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 219       <description>
 220 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 221 - simple, easy-to-use programmers model
 222 - highly efficient ultra-low power operation
 223 - excellent code density
 224 - deterministic, high-performance interrupt handling
 225 - upward compatibility with the rest of the Cortex-M processor family.
 226       </description>
 227       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 228       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 229       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 230       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 231
 232       <device Dname="ARMCM0P">
 233         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 234         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 235       </device>
 236     </family>
 237
 238     <!-- ******************************  Cortex-M3  ****************************** -->
 239     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 240       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 241       <description>
 242 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 243 - simple, easy-to-use programmers model
 244 - highly efficient ultra-low power operation
 245 - excellent code density
 246 - deterministic, high-performance interrupt handling
 247 - upward compatibility with the rest of the Cortex-M processor family.
 248       </description>
 249       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 250       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 251       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 252       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 253
 254       <device Dname="ARMCM3">
 255         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 256         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 257       </device>
 258     </family>
 259
 260     <!-- ******************************  Cortex-M4  ****************************** -->
 261     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 262       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 263       <description>
 264 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 265 - simple, easy-to-use programmers model
 266 - highly efficient ultra-low power operation
 267 - excellent code density
 268 - deterministic, high-performance interrupt handling
 269 - upward compatibility with the rest of the Cortex-M processor family.
 270       </description>
 271       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 272       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 273       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 274       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 275
 276       <device Dname="ARMCM4">
 277         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 278         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 279       </device>
 280
 281       <device Dname="ARMCM4_FP">
 282         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 283         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 284       </device>
 285     </family>
 286
 287     <!-- ******************************  Cortex-M7  ****************************** -->
 288     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 289       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 290       <description>
 291 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 292 - simple, easy-to-use programmers model
 293 - highly efficient ultra-low power operation
 294 - excellent code density
 295 - deterministic, high-performance interrupt handling
 296 - upward compatibility with the rest of the Cortex-M processor family.
 297       </description>
 298       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 299       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 300       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 301       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 302
 303       <device Dname="ARMCM7">
 304         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 305         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 306       </device>
 307
 308       <device Dname="ARMCM7_SP">
 309         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 310         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 311       </device>
 312
 313       <device Dname="ARMCM7_DP">
 314         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 315         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 316       </device>
 317     </family>
 318
 319     <!-- ******************************  Cortex-M23  ********************** -->
 320     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 321       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 322       <description>
 323 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 324 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 325 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 326       </description>
 327       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 328       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 329       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 330       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 331       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 332       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 333
 334       <device Dname="ARMCM23">
 335         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 336         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 337       </device>
 338
 339       <device Dname="ARMCM23_TZ">
 340         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 341         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 342       </device>
 343     </family>
 344
 345     <!-- ******************************  Cortex-M33  ****************************** -->
 346     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 347       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 348       <description>
 349 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 350 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 351       </description>
 352       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 353       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 354       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 355       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 356       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 357       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 358
 359       <device Dname="ARMCM33">
 360         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 361         <description>
 362           no DSP Instructions, no Floating Point Unit, no TrustZone
 363         </description>
 364         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 365       </device>
 366
 367       <device Dname="ARMCM33_TZ">
 368         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 369         <description>
 370           no DSP Instructions, no Floating Point Unit, TrustZone
 371         </description>
 372         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 373       </device>
 374
 375       <device Dname="ARMCM33_DSP_FP">
 376         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 377         <description>
 378           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 379         </description>
 380         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 381       </device>
 382
 383       <device Dname="ARMCM33_DSP_FP_TZ">
 384         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 385         <description>
 386           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 387         </description>
 388         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 389       </device>
 390     </family>
 391
 392     <!-- ******************************  ARMSC000  ****************************** -->
 393     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 394       <description>
 395 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 396 - simple, easy-to-use programmers model
 397 - highly efficient ultra-low power operation
 398 - excellent code density
 399 - deterministic, high-performance interrupt handling
 400       </description>
 401       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 402       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 403       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 404       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 405
 406       <device Dname="ARMSC000">
 407         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 408         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 409       </device>
 410     </family>
 411
 412     <!-- ******************************  ARMSC300  ****************************** -->
 413     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 414       <description>
 415 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 416 - simple, easy-to-use programmers model
 417 - highly efficient ultra-low power operation
 418 - excellent code density
 419 - deterministic, high-performance interrupt handling
 420       </description>
 421       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 422       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 423       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 424       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 425
 426       <device Dname="ARMSC300">
 427         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 428         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 429       </device>
 430     </family>
 431
 432     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 433     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 434       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 435       <description>
 436 ARMv8-M Baseline based device with TrustZone
 437       </description>
 438       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 439       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 440       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 441       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 442       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 443       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 444
 445       <device Dname="ARMv8MBL">
 446         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 447         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 448       </device>
 449     </family>
 450
 451     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 452     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 453       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 454       <description>
 455 ARMv8-M Mainline based device with TrustZone
 456       </description>
 457       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 458       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 459       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 460       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 461       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 462       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 463
 464       <device Dname="ARMv8MML">
 465         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 466         <description>
 467           no DSP Instructions, no Floating Point Unit, TrustZone
 468         </description>
 469         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 470       </device>
 471
 472       <device Dname="ARMv8MML_DSP">
 473         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 474         <description>
 475           DSP Instructions, no Floating Point Unit, TrustZone
 476         </description>
 477         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 478       </device>
 479
 480       <device Dname="ARMv8MML_SP">
 481         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 482         <description>
 483           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 484         </description>
 485         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 486       </device>
 487
 488       <device Dname="ARMv8MML_DSP_SP">
 489         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 490         <description>
 491           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 492         </description>
 493         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 494       </device>
 495
 496       <device Dname="ARMv8MML_DP">
 497         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 498         <description>
 499           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 500         </description>
 501         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 502       </device>
 503
 504       <device Dname="ARMv8MML_DSP_DP">
 505         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 506         <description>
 507           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 508         </description>
 509         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 510       </device>
 511     </family>
 512
 513     <!-- ******************************  Cortex-A5  ****************************** -->
 514     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 515       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 516       <description>
 517 The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
 518 virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
 519 ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 520       </description>
 521
 522       <device Dname="ARMCA5">
 523         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 524         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 525       </device>
 526     </family>
 527
 528     <!-- ******************************  Cortex-A7  ****************************** -->
 529     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 530       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 531       <description>
 532 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
 533 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 534 an optional integrated GIC, and an optional L2 cache controller.
 535       </description>
 536
 537       <device Dname="ARMCA7">
 538         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 539         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 540       </device>
 541     </family>
 542
 543     <!-- ******************************  Cortex-A9  ****************************** -->
 544     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 545       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 546       <description>
 547 The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 548 The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
 549 and 8-bit Java bytecodes in Jazelle state.
 550       </description>
 551
 552       <device Dname="ARMCA9">
 553         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 554         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 555       </device>
 556     </family>
 557   </devices>
 558
 559
 560   <apis>
 561     <!-- CMSIS Device API -->
 562     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 563       <description>Device interrupt controller interface</description>
 564       <files>
 565         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 566       </files>
 567     </api>
 568     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.0" exclusive="1">
 569       <description>RTOS Kernel system tick timer interface</description>
 570       <files>
 571         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 572       </files>
 573     </api>
 574     <!-- CMSIS-RTOS API -->
 575     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 576       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 577       <files>
 578         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 579       </files>
 580     </api>
 581     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.1" exclusive="1">
 582       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 583       <files>
 584         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 585         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 586       </files>
 587     </api>
 588     <!-- CMSIS Driver API -->
 589     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 590       <description>USART Driver API for Cortex-M</description>
 591       <files>
 592         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 593         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 594       </files>
 595     </api>
 596     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 597       <description>SPI Driver API for Cortex-M</description>
 598       <files>
 599         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 600         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 601       </files>
 602     </api>
 603     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 604       <description>SAI Driver API for Cortex-M</description>
 605       <files>
 606         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 607         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 608       </files>
 609     </api>
 610     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 611       <description>I2C Driver API for Cortex-M</description>
 612       <files>
 613         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 614         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 615       </files>
 616     </api>
 617     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.1.0" exclusive="0">
 618       <description>CAN Driver API for Cortex-M</description>
 619       <files>
 620         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 621         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 622       </files>
 623     </api>
 624     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
 625       <description>Flash Driver API for Cortex-M</description>
 626       <files>
 627         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 628         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 629       </files>
 630     </api>
 631     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 632       <description>MCI Driver API for Cortex-M</description>
 633       <files>
 634         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 635         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 636       </files>
 637     </api>
 638     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
 639       <description>NAND Flash Driver API for Cortex-M</description>
 640       <files>
 641         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 642         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 643       </files>
 644     </api>
 645     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 646       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 647       <files>
 648         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 649         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 650         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 651       </files>
 652     </api>
 653     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 654       <description>Ethernet MAC Driver API for Cortex-M</description>
 655       <files>
 656         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 657         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 658       </files>
 659     </api>
 660     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 661       <description>Ethernet PHY Driver API for Cortex-M</description>
 662       <files>
 663         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 664         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 665       </files>
 666     </api>
 667     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 668       <description>USB Device Driver API for Cortex-M</description>
 669       <files>
 670         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 671         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 672       </files>
 673     </api>
 674     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 675       <description>USB Host Driver API for Cortex-M</description>
 676       <files>
 677         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 678         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 679       </files>
 680     </api>
 681   </apis>
 682
 683   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 684   <conditions>
 685     <!-- compiler -->
 686     <condition id="ARMCC6">
 687       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 688       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 689     </condition>
 690     <condition id="ARMCC5">
 691       <require Tcompiler="ARMCC" Toptions="AC5"/>
 692     </condition>
 693     <condition id="ARMCC">
 694       <require Tcompiler="ARMCC"/>
 695     </condition>
 696     <condition id="GCC">
 697       <require Tcompiler="GCC"/>
 698     </condition>
 699     <condition id="IAR">
 700       <require Tcompiler="IAR"/>
 701     </condition>
 702     <condition id="ARMCC GCC">
 703       <accept Tcompiler="ARMCC"/>
 704       <accept Tcompiler="GCC"/>
 705     </condition>
 706     <condition id="ARMCC GCC IAR">
 707       <accept Tcompiler="ARMCC"/>
 708       <accept Tcompiler="GCC"/>
 709       <accept Tcompiler="IAR"/>
 710     </condition>
 711
 712     <!-- ARM architecture -->
 713     <condition id="ARMv6-M Device">
 714       <description>ARMv6-M architecture based device</description>
 715       <accept Dcore="Cortex-M0"/>
 716       <accept Dcore="Cortex-M0+"/>
 717       <accept Dcore="SC000"/>
 718     </condition>
 719     <condition id="ARMv7-M Device">
 720       <description>ARMv7-M architecture based device</description>
 721       <accept Dcore="Cortex-M3"/>
 722       <accept Dcore="Cortex-M4"/>
 723       <accept Dcore="Cortex-M7"/>
 724       <accept Dcore="SC300"/>
 725     </condition>
 726     <condition id="ARMv8-M Device">
 727       <description>ARMv8-M architecture based device</description>
 728       <accept Dcore="ARMV8MBL"/>
 729       <accept Dcore="ARMV8MML"/>
 730       <accept Dcore="Cortex-M23"/>
 731       <accept Dcore="Cortex-M33"/>
 732     </condition>
 733     <condition id="ARMv8-M TZ Device">
 734       <description>ARMv8-M architecture based device with TrustZone</description>
 735       <require condition="ARMv8-M Device"/>
 736       <require Dtz="TZ"/>
 737     </condition>
 738     <condition id="ARMv6_7-M Device">
 739       <description>ARMv6_7-M architecture based device</description>
 740       <accept condition="ARMv6-M Device"/>
 741       <accept condition="ARMv7-M Device"/>
 742     </condition>
 743     <condition id="ARMv6_7_8-M Device">
 744       <description>ARMv6_7_8-M architecture based device</description>
 745       <accept condition="ARMv6-M Device"/>
 746       <accept condition="ARMv7-M Device"/>
 747       <accept condition="ARMv8-M Device"/>
 748     </condition>
 749     <condition id="ARMv7-A Device">
 750       <description>ARMv7-A architecture based device</description>
 751       <accept Dcore="Cortex-A5"/>
 752       <accept Dcore="Cortex-A7"/>
 753       <accept Dcore="Cortex-A9"/>
 754     </condition>
 755
 756     <!-- ARM core -->
 757     <condition id="CM0">
 758       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 759       <accept Dcore="Cortex-M0"/>
 760       <accept Dcore="Cortex-M0+"/>
 761       <accept Dcore="SC000"/>
 762     </condition>
 763     <condition id="CM3">
 764       <description>Cortex-M3 or SC300 processor based device</description>
 765       <accept Dcore="Cortex-M3"/>
 766       <accept Dcore="SC300"/>
 767     </condition>
 768     <condition id="CM4">
 769       <description>Cortex-M4 processor based device</description>
 770       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 771     </condition>
 772     <condition id="CM4_FP">
 773       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 774       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 775     </condition>
 776     <condition id="CM7">
 777       <description>Cortex-M7 processor based device</description>
 778       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 779     </condition>
 780     <condition id="CM7_FP">
 781       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 782       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 783       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 784     </condition>
 785     <condition id="CM7_SP">
 786       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 787       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 788     </condition>
 789     <condition id="CM7_DP">
 790       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 791       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 792     </condition>
 793     <condition id="CM23">
 794       <description>Cortex-M23 processor based device</description>
 795       <require Dcore="Cortex-M23"/>
 796     </condition>
 797     <condition id="CM33">
 798       <description>Cortex-M33 processor based device</description>
 799       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 800     </condition>
 801     <condition id="CM33_FP">
 802       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 803       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 804     </condition>
 805     <condition id="ARMv8MBL">
 806       <description>ARMv8-M Baseline processor based device</description>
 807       <require Dcore="ARMV8MBL"/>
 808     </condition>
 809     <condition id="ARMv8MML">
 810       <description>ARMv8-M Mainline processor based device</description>
 811       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 812     </condition>
 813     <condition id="ARMv8MML_FP">
 814       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 815       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 816       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 817     </condition>
 818
 819     <condition id="CM33_NODSP_NOFPU">
 820       <description>CM33, no DSP, no FPU</description>
 821       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 822     </condition>
 823     <condition id="CM33_DSP_NOFPU">
 824       <description>CM33, DSP, no FPU</description>
 825       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 826     </condition>
 827     <condition id="CM33_NODSP_SP">
 828       <description>CM33, no DSP, SP FPU</description>
 829       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 830     </condition>
 831     <condition id="CM33_DSP_SP">
 832       <description>CM33, DSP, SP FPU</description>
 833       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 834     </condition>
 835
 836     <condition id="ARMv8MML_NODSP_NOFPU">
 837       <description>ARMv8MML, no DSP, no FPU</description>
 838       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 839     </condition>
 840     <condition id="ARMv8MML_DSP_NOFPU">
 841       <description>ARMv8MML, DSP, no FPU</description>
 842       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 843     </condition>
 844     <condition id="ARMv8MML_NODSP_SP">
 845       <description>ARMv8MML, no DSP, SP FPU</description>
 846       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 847     </condition>
 848     <condition id="ARMv8MML_DSP_SP">
 849       <description>ARMv8MML, DSP, SP FPU</description>
 850       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 851     </condition>
 852
 853     <condition id="CA5_CA9">
 854       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 855       <accept Dcore="Cortex-A5"/>
 856       <accept Dcore="Cortex-A9"/>
 857     </condition>
 858
 859     <!-- ARMCC compiler -->
 860     <condition id="CA_ARMCC5">
 861       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
 862       <require condition="ARMv7-A Device"/>
 863       <require condition="ARMCC5"/>
 864     </condition>
 865     <condition id="CA_ARMCC6">
 866       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
 867       <require condition="ARMv7-A Device"/>
 868       <require condition="ARMCC6"/>
 869     </condition>
 870
 871     <condition id="CM0_ARMCC">
 872       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 873       <require condition="CM0"/>
 874       <require Tcompiler="ARMCC"/>
 875     </condition>
 876     <condition id="CM0_LE_ARMCC">
 877       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 878       <require condition="CM0_ARMCC"/>
 879       <require Dendian="Little-endian"/>
 880     </condition>
 881     <condition id="CM0_BE_ARMCC">
 882       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 883       <require condition="CM0_ARMCC"/>
 884       <require Dendian="Big-endian"/>
 885     </condition>
 886
 887     <condition id="CM3_ARMCC">
 888       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 889       <require condition="CM3"/>
 890       <require Tcompiler="ARMCC"/>
 891     </condition>
 892     <condition id="CM3_LE_ARMCC">
 893       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 894       <require condition="CM3_ARMCC"/>
 895       <require Dendian="Little-endian"/>
 896     </condition>
 897     <condition id="CM3_BE_ARMCC">
 898       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 899       <require condition="CM3_ARMCC"/>
 900       <require Dendian="Big-endian"/>
 901     </condition>
 902
 903     <condition id="CM4_ARMCC">
 904       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 905       <require condition="CM4"/>
 906       <require Tcompiler="ARMCC"/>
 907     </condition>
 908     <condition id="CM4_LE_ARMCC">
 909       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 910       <require condition="CM4_ARMCC"/>
 911       <require Dendian="Little-endian"/>
 912     </condition>
 913     <condition id="CM4_BE_ARMCC">
 914       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 915       <require condition="CM4_ARMCC"/>
 916       <require Dendian="Big-endian"/>
 917     </condition>
 918
 919     <condition id="CM4_FP_ARMCC">
 920       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 921       <require condition="CM4_FP"/>
 922       <require Tcompiler="ARMCC"/>
 923     </condition>
 924     <condition id="CM4_FP_LE_ARMCC">
 925       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 926       <require condition="CM4_FP_ARMCC"/>
 927       <require Dendian="Little-endian"/>
 928     </condition>
 929     <condition id="CM4_FP_BE_ARMCC">
 930       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 931       <require condition="CM4_FP_ARMCC"/>
 932       <require Dendian="Big-endian"/>
 933     </condition>
 934
 935     <!-- XMC 4000 Series devices from Infineon require a special library -->
 936     <condition id="CM4_LE_ARMCC_STD">
 937       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
 938       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
 939       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 940       <require Tcompiler="ARMCC"/>
 941     </condition>
 942     <condition id="CM4_LE_ARMCC_IFX">
 943       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
 944       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 945       <require Tcompiler="ARMCC"/>
 946     </condition>
 947     <condition id="CM4_FP_LE_ARMCC_STD">
 948       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
 949       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
 950       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 951       <require Tcompiler="ARMCC"/>
 952     </condition>
 953     <condition id="CM4_FP_LE_ARMCC_IFX">
 954       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
 955       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 956       <require Tcompiler="ARMCC"/>
 957     </condition>
 958
 959     <condition id="CM7_ARMCC">
 960       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 961       <require condition="CM7"/>
 962       <require Tcompiler="ARMCC"/>
 963     </condition>
 964     <condition id="CM7_LE_ARMCC">
 965       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 966       <require condition="CM7_ARMCC"/>
 967       <require Dendian="Little-endian"/>
 968     </condition>
 969     <condition id="CM7_BE_ARMCC">
 970       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 971       <require condition="CM7_ARMCC"/>
 972       <require Dendian="Big-endian"/>
 973     </condition>
 974
 975     <condition id="CM7_FP_ARMCC">
 976       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 977       <require condition="CM7_FP"/>
 978       <require Tcompiler="ARMCC"/>
 979     </condition>
 980     <condition id="CM7_FP_LE_ARMCC">
 981       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 982       <require condition="CM7_FP_ARMCC"/>
 983       <require Dendian="Little-endian"/>
 984     </condition>
 985     <condition id="CM7_FP_BE_ARMCC">
 986       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 987       <require condition="CM7_FP_ARMCC"/>
 988       <require Dendian="Big-endian"/>
 989     </condition>
 990
 991     <condition id="CM7_SP_ARMCC">
 992       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 993       <require condition="CM7_SP"/>
 994       <require Tcompiler="ARMCC"/>
 995     </condition>
 996     <condition id="CM7_SP_LE_ARMCC">
 997       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 998       <require condition="CM7_SP_ARMCC"/>
 999       <require Dendian="Little-endian"/>
1000     </condition>
1001     <condition id="CM7_SP_BE_ARMCC">
1002       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1003       <require condition="CM7_SP_ARMCC"/>
1004       <require Dendian="Big-endian"/>
1005     </condition>
1006
1007     <condition id="CM7_DP_ARMCC">
1008       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1009       <require condition="CM7_DP"/>
1010       <require Tcompiler="ARMCC"/>
1011     </condition>
1012     <condition id="CM7_DP_LE_ARMCC">
1013       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1014       <require condition="CM7_DP_ARMCC"/>
1015       <require Dendian="Little-endian"/>
1016     </condition>
1017     <condition id="CM7_DP_BE_ARMCC">
1018       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1019       <require condition="CM7_DP_ARMCC"/>
1020       <require Dendian="Big-endian"/>
1021     </condition>
1022
1023     <condition id="CM23_ARMCC">
1024       <description>Cortex-M23 processor based device for the ARM Compiler</description>
1025       <require condition="CM23"/>
1026       <require Tcompiler="ARMCC"/>
1027     </condition>
1028     <condition id="CM23_LE_ARMCC">
1029       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1030       <require condition="CM23_ARMCC"/>
1031       <require Dendian="Little-endian"/>
1032     </condition>
1033     <condition id="CM23_BE_ARMCC">
1034       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1035       <require condition="CM23_ARMCC"/>
1036       <require Dendian="Big-endian"/>
1037     </condition>
1038
1039     <condition id="CM33_ARMCC">
1040       <description>Cortex-M33 processor based device for the ARM Compiler</description>
1041       <require condition="CM33"/>
1042       <require Tcompiler="ARMCC"/>
1043     </condition>
1044     <condition id="CM33_LE_ARMCC">
1045       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1046       <require condition="CM33_ARMCC"/>
1047       <require Dendian="Little-endian"/>
1048     </condition>
1049     <condition id="CM33_BE_ARMCC">
1050       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1051       <require condition="CM33_ARMCC"/>
1052       <require Dendian="Big-endian"/>
1053     </condition>
1054
1055     <condition id="CM33_FP_ARMCC">
1056       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1057       <require condition="CM33_FP"/>
1058       <require Tcompiler="ARMCC"/>
1059     </condition>
1060     <condition id="CM33_FP_LE_ARMCC">
1061       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1062       <require condition="CM33_FP_ARMCC"/>
1063       <require Dendian="Little-endian"/>
1064     </condition>
1065     <condition id="CM33_FP_BE_ARMCC">
1066       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1067       <require condition="CM33_FP_ARMCC"/>
1068       <require Dendian="Big-endian"/>
1069     </condition>
1070
1071     <condition id="CM33_NODSP_NOFPU_ARMCC">
1072       <description>CM33, no DSP, no FPU, ARM Compiler</description>
1073       <require condition="CM33_NODSP_NOFPU"/>
1074       <require Tcompiler="ARMCC"/>
1075     </condition>
1076     <condition id="CM33_DSP_NOFPU_ARMCC">
1077       <description>CM33, DSP, no FPU, ARM Compiler</description>
1078       <require condition="CM33_DSP_NOFPU"/>
1079       <require Tcompiler="ARMCC"/>
1080     </condition>
1081     <condition id="CM33_NODSP_SP_ARMCC">
1082       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1083       <require condition="CM33_NODSP_SP"/>
1084       <require Tcompiler="ARMCC"/>
1085     </condition>
1086     <condition id="CM33_DSP_SP_ARMCC">
1087       <description>CM33, DSP, SP FPU, ARM Compiler</description>
1088       <require condition="CM33_DSP_SP"/>
1089       <require Tcompiler="ARMCC"/>
1090     </condition>
1091     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1092       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1093       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1094       <require Dendian="Little-endian"/>
1095     </condition>
1096     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1097       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1098       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1099       <require Dendian="Little-endian"/>
1100     </condition>
1101     <condition id="CM33_NODSP_SP_LE_ARMCC">
1102       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1103       <require condition="CM33_NODSP_SP_ARMCC"/>
1104       <require Dendian="Little-endian"/>
1105     </condition>
1106     <condition id="CM33_DSP_SP_LE_ARMCC">
1107       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
1108       <require condition="CM33_DSP_SP_ARMCC"/>
1109       <require Dendian="Little-endian"/>
1110     </condition>
1111
1112     <condition id="ARMv8MBL_ARMCC">
1113       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1114       <require condition="ARMv8MBL"/>
1115       <require Tcompiler="ARMCC"/>
1116     </condition>
1117     <condition id="ARMv8MBL_LE_ARMCC">
1118       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1119       <require condition="ARMv8MBL_ARMCC"/>
1120       <require Dendian="Little-endian"/>
1121     </condition>
1122     <condition id="ARMv8MBL_BE_ARMCC">
1123       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1124       <require condition="ARMv8MBL_ARMCC"/>
1125       <require Dendian="Big-endian"/>
1126     </condition>
1127
1128     <condition id="ARMv8MML_ARMCC">
1129       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1130       <require condition="ARMv8MML"/>
1131       <require Tcompiler="ARMCC"/>
1132     </condition>
1133     <condition id="ARMv8MML_LE_ARMCC">
1134       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1135       <require condition="ARMv8MML_ARMCC"/>
1136       <require Dendian="Little-endian"/>
1137     </condition>
1138     <condition id="ARMv8MML_BE_ARMCC">
1139       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1140       <require condition="ARMv8MML_ARMCC"/>
1141       <require Dendian="Big-endian"/>
1142     </condition>
1143
1144     <condition id="ARMv8MML_FP_ARMCC">
1145       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1146       <require condition="ARMv8MML_FP"/>
1147       <require Tcompiler="ARMCC"/>
1148     </condition>
1149     <condition id="ARMv8MML_FP_LE_ARMCC">
1150       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1151       <require condition="ARMv8MML_FP_ARMCC"/>
1152       <require Dendian="Little-endian"/>
1153     </condition>
1154     <condition id="ARMv8MML_FP_BE_ARMCC">
1155       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1156       <require condition="ARMv8MML_FP_ARMCC"/>
1157       <require Dendian="Big-endian"/>
1158     </condition>
1159
1160     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1161       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1162       <require condition="ARMv8MML_NODSP_NOFPU"/>
1163       <require Tcompiler="ARMCC"/>
1164     </condition>
1165     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1166       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1167       <require condition="ARMv8MML_DSP_NOFPU"/>
1168       <require Tcompiler="ARMCC"/>
1169     </condition>
1170     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1171       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1172       <require condition="ARMv8MML_NODSP_SP"/>
1173       <require Tcompiler="ARMCC"/>
1174     </condition>
1175     <condition id="ARMv8MML_DSP_SP_ARMCC">
1176       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1177       <require condition="ARMv8MML_DSP_SP"/>
1178       <require Tcompiler="ARMCC"/>
1179     </condition>
1180     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1181       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1182       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1183       <require Dendian="Little-endian"/>
1184     </condition>
1185     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1186       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1187       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1188       <require Dendian="Little-endian"/>
1189     </condition>
1190     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1191       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1192       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1193       <require Dendian="Little-endian"/>
1194     </condition>
1195     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1196       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1197       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1198       <require Dendian="Little-endian"/>
1199     </condition>
1200
1201     <!-- GCC compiler -->
1202     <condition id="CA_GCC">
1203       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1204       <require condition="ARMv7-A Device"/>
1205       <require Tcompiler="GCC"/>
1206     </condition>
1207
1208     <condition id="CM0_GCC">
1209       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1210       <require condition="CM0"/>
1211       <require Tcompiler="GCC"/>
1212     </condition>
1213     <condition id="CM0_LE_GCC">
1214       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1215       <require condition="CM0_GCC"/>
1216       <require Dendian="Little-endian"/>
1217     </condition>
1218     <condition id="CM0_BE_GCC">
1219       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1220       <require condition="CM0_GCC"/>
1221       <require Dendian="Big-endian"/>
1222     </condition>
1223
1224     <condition id="CM3_GCC">
1225       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1226       <require condition="CM3"/>
1227       <require Tcompiler="GCC"/>
1228     </condition>
1229     <condition id="CM3_LE_GCC">
1230       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1231       <require condition="CM3_GCC"/>
1232       <require Dendian="Little-endian"/>
1233     </condition>
1234     <condition id="CM3_BE_GCC">
1235       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1236       <require condition="CM3_GCC"/>
1237       <require Dendian="Big-endian"/>
1238     </condition>
1239
1240     <condition id="CM4_GCC">
1241       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1242       <require condition="CM4"/>
1243       <require Tcompiler="GCC"/>
1244     </condition>
1245     <condition id="CM4_LE_GCC">
1246       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1247       <require condition="CM4_GCC"/>
1248       <require Dendian="Little-endian"/>
1249     </condition>
1250     <condition id="CM4_BE_GCC">
1251       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1252       <require condition="CM4_GCC"/>
1253       <require Dendian="Big-endian"/>
1254     </condition>
1255
1256     <condition id="CM4_FP_GCC">
1257       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1258       <require condition="CM4_FP"/>
1259       <require Tcompiler="GCC"/>
1260     </condition>
1261     <condition id="CM4_FP_LE_GCC">
1262       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1263       <require condition="CM4_FP_GCC"/>
1264       <require Dendian="Little-endian"/>
1265     </condition>
1266     <condition id="CM4_FP_BE_GCC">
1267       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1268       <require condition="CM4_FP_GCC"/>
1269       <require Dendian="Big-endian"/>
1270     </condition>
1271
1272     <!-- XMC 4000 Series devices from Infineon require a special library -->
1273     <condition id="CM4_LE_GCC_STD">
1274       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1275       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1276       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1277       <require Tcompiler="GCC"/>
1278     </condition>
1279     <condition id="CM4_LE_GCC_IFX">
1280       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1281       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1282       <require Tcompiler="GCC"/>
1283     </condition>
1284     <condition id="CM4_FP_LE_GCC_STD">
1285       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1286       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1287       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1288       <require Tcompiler="GCC"/>
1289     </condition>
1290     <condition id="CM4_FP_LE_GCC_IFX">
1291       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1292       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1293       <require Tcompiler="GCC"/>
1294     </condition>
1295
1296     <condition id="CM7_GCC">
1297       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1298       <require condition="CM7"/>
1299       <require Tcompiler="GCC"/>
1300     </condition>
1301     <condition id="CM7_LE_GCC">
1302       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1303       <require condition="CM7_GCC"/>
1304       <require Dendian="Little-endian"/>
1305     </condition>
1306     <condition id="CM7_BE_GCC">
1307       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1308       <require condition="CM7_GCC"/>
1309       <require Dendian="Big-endian"/>
1310     </condition>
1311
1312     <condition id="CM7_FP_GCC">
1313       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1314       <require condition="CM7_FP"/>
1315       <require Tcompiler="GCC"/>
1316     </condition>
1317     <condition id="CM7_FP_LE_GCC">
1318       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1319       <require condition="CM7_FP_GCC"/>
1320       <require Dendian="Little-endian"/>
1321     </condition>
1322     <condition id="CM7_FP_BE_GCC">
1323       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1324       <require condition="CM7_FP_GCC"/>
1325       <require Dendian="Big-endian"/>
1326     </condition>
1327
1328     <condition id="CM7_SP_GCC">
1329       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1330       <require condition="CM7_SP"/>
1331       <require Tcompiler="GCC"/>
1332     </condition>
1333     <condition id="CM7_SP_LE_GCC">
1334       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1335       <require condition="CM7_SP_GCC"/>
1336       <require Dendian="Little-endian"/>
1337     </condition>
1338     <condition id="CM7_SP_BE_GCC">
1339       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1340       <require condition="CM7_SP_GCC"/>
1341       <require Dendian="Big-endian"/>
1342     </condition>
1343
1344     <condition id="CM7_DP_GCC">
1345       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1346       <require condition="CM7_DP"/>
1347       <require Tcompiler="GCC"/>
1348     </condition>
1349     <condition id="CM7_DP_LE_GCC">
1350       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1351       <require condition="CM7_DP_GCC"/>
1352       <require Dendian="Little-endian"/>
1353     </condition>
1354     <condition id="CM7_DP_BE_GCC">
1355       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1356       <require condition="CM7_DP_GCC"/>
1357       <require Dendian="Big-endian"/>
1358     </condition>
1359
1360     <condition id="CM23_GCC">
1361       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1362       <require condition="CM23"/>
1363       <require Tcompiler="GCC"/>
1364     </condition>
1365     <condition id="CM23_LE_GCC">
1366       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1367       <require condition="CM23_GCC"/>
1368       <require Dendian="Little-endian"/>
1369     </condition>
1370     <condition id="CM23_BE_GCC">
1371       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1372       <require condition="CM23_GCC"/>
1373       <require Dendian="Big-endian"/>
1374     </condition>
1375
1376     <condition id="CM33_GCC">
1377       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1378       <require condition="CM33"/>
1379       <require Tcompiler="GCC"/>
1380     </condition>
1381     <condition id="CM33_LE_GCC">
1382       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1383       <require condition="CM33_GCC"/>
1384       <require Dendian="Little-endian"/>
1385     </condition>
1386     <condition id="CM33_BE_GCC">
1387       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1388       <require condition="CM33_GCC"/>
1389       <require Dendian="Big-endian"/>
1390     </condition>
1391
1392     <condition id="CM33_FP_GCC">
1393       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1394       <require condition="CM33_FP"/>
1395       <require Tcompiler="GCC"/>
1396     </condition>
1397     <condition id="CM33_FP_LE_GCC">
1398       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1399       <require condition="CM33_FP_GCC"/>
1400       <require Dendian="Little-endian"/>
1401     </condition>
1402     <condition id="CM33_FP_BE_GCC">
1403       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1404       <require condition="CM33_FP_GCC"/>
1405       <require Dendian="Big-endian"/>
1406     </condition>
1407
1408     <condition id="CM33_NODSP_NOFPU_GCC">
1409       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1410       <require condition="CM33_NODSP_NOFPU"/>
1411       <require Tcompiler="GCC"/>
1412     </condition>
1413     <condition id="CM33_DSP_NOFPU_GCC">
1414       <description>CM33, DSP, no FPU, GCC Compiler</description>
1415       <require condition="CM33_DSP_NOFPU"/>
1416       <require Tcompiler="GCC"/>
1417     </condition>
1418     <condition id="CM33_NODSP_SP_GCC">
1419       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1420       <require condition="CM33_NODSP_SP"/>
1421       <require Tcompiler="GCC"/>
1422     </condition>
1423     <condition id="CM33_DSP_SP_GCC">
1424       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1425       <require condition="CM33_DSP_SP"/>
1426       <require Tcompiler="GCC"/>
1427     </condition>
1428     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1429       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1430       <require condition="CM33_NODSP_NOFPU_GCC"/>
1431       <require Dendian="Little-endian"/>
1432     </condition>
1433     <condition id="CM33_DSP_NOFPU_LE_GCC">
1434       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1435       <require condition="CM33_DSP_NOFPU_GCC"/>
1436       <require Dendian="Little-endian"/>
1437     </condition>
1438     <condition id="CM33_NODSP_SP_LE_GCC">
1439       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1440       <require condition="CM33_NODSP_SP_GCC"/>
1441       <require Dendian="Little-endian"/>
1442     </condition>
1443     <condition id="CM33_DSP_SP_LE_GCC">
1444       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1445       <require condition="CM33_DSP_SP_GCC"/>
1446       <require Dendian="Little-endian"/>
1447     </condition>
1448
1449     <condition id="ARMv8MBL_GCC">
1450       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1451       <require condition="ARMv8MBL"/>
1452       <require Tcompiler="GCC"/>
1453     </condition>
1454     <condition id="ARMv8MBL_LE_GCC">
1455       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1456       <require condition="ARMv8MBL_GCC"/>
1457       <require Dendian="Little-endian"/>
1458     </condition>
1459     <condition id="ARMv8MBL_BE_GCC">
1460       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1461       <require condition="ARMv8MBL_GCC"/>
1462       <require Dendian="Big-endian"/>
1463     </condition>
1464
1465     <condition id="ARMv8MML_GCC">
1466       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1467       <require condition="ARMv8MML"/>
1468       <require Tcompiler="GCC"/>
1469     </condition>
1470     <condition id="ARMv8MML_LE_GCC">
1471       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1472       <require condition="ARMv8MML_GCC"/>
1473       <require Dendian="Little-endian"/>
1474     </condition>
1475     <condition id="ARMv8MML_BE_GCC">
1476       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1477       <require condition="ARMv8MML_GCC"/>
1478       <require Dendian="Big-endian"/>
1479     </condition>
1480
1481     <condition id="ARMv8MML_FP_GCC">
1482       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1483       <require condition="ARMv8MML_FP"/>
1484       <require Tcompiler="GCC"/>
1485     </condition>
1486     <condition id="ARMv8MML_FP_LE_GCC">
1487       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1488       <require condition="ARMv8MML_FP_GCC"/>
1489       <require Dendian="Little-endian"/>
1490     </condition>
1491     <condition id="ARMv8MML_FP_BE_GCC">
1492       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1493       <require condition="ARMv8MML_FP_GCC"/>
1494       <require Dendian="Big-endian"/>
1495     </condition>
1496
1497     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1498       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1499       <require condition="ARMv8MML_NODSP_NOFPU"/>
1500       <require Tcompiler="GCC"/>
1501     </condition>
1502     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1503       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1504       <require condition="ARMv8MML_DSP_NOFPU"/>
1505       <require Tcompiler="GCC"/>
1506     </condition>
1507     <condition id="ARMv8MML_NODSP_SP_GCC">
1508       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1509       <require condition="ARMv8MML_NODSP_SP"/>
1510       <require Tcompiler="GCC"/>
1511     </condition>
1512     <condition id="ARMv8MML_DSP_SP_GCC">
1513       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1514       <require condition="ARMv8MML_DSP_SP"/>
1515       <require Tcompiler="GCC"/>
1516     </condition>
1517     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1518       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1519       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1520       <require Dendian="Little-endian"/>
1521     </condition>
1522     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1523       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1524       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1525       <require Dendian="Little-endian"/>
1526     </condition>
1527     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1528       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1529       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1530       <require Dendian="Little-endian"/>
1531     </condition>
1532     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1533       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1534       <require condition="ARMv8MML_DSP_SP_GCC"/>
1535       <require Dendian="Little-endian"/>
1536     </condition>
1537
1538     <!-- IAR compiler -->
1539     <condition id="CA_IAR">
1540       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1541       <require condition="ARMv7-A Device"/>
1542       <require Tcompiler="IAR"/>
1543     </condition>
1544
1545     <condition id="CM0_IAR">
1546       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1547       <require condition="CM0"/>
1548       <require Tcompiler="IAR"/>
1549     </condition>
1550     <condition id="CM0_LE_IAR">
1551       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1552       <require condition="CM0_IAR"/>
1553       <require Dendian="Little-endian"/>
1554     </condition>
1555     <condition id="CM0_BE_IAR">
1556       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1557       <require condition="CM0_IAR"/>
1558       <require Dendian="Big-endian"/>
1559     </condition>
1560
1561     <condition id="CM3_IAR">
1562       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1563       <require condition="CM3"/>
1564       <require Tcompiler="IAR"/>
1565     </condition>
1566     <condition id="CM3_LE_IAR">
1567       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1568       <require condition="CM3_IAR"/>
1569       <require Dendian="Little-endian"/>
1570     </condition>
1571     <condition id="CM3_BE_IAR">
1572       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1573       <require condition="CM3_IAR"/>
1574       <require Dendian="Big-endian"/>
1575     </condition>
1576
1577     <condition id="CM4_IAR">
1578       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1579       <require condition="CM4"/>
1580       <require Tcompiler="IAR"/>
1581     </condition>
1582     <condition id="CM4_LE_IAR">
1583       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1584       <require condition="CM4_IAR"/>
1585       <require Dendian="Little-endian"/>
1586     </condition>
1587     <condition id="CM4_BE_IAR">
1588       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1589       <require condition="CM4_IAR"/>
1590       <require Dendian="Big-endian"/>
1591     </condition>
1592
1593     <condition id="CM4_FP_IAR">
1594       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1595       <require condition="CM4_FP"/>
1596       <require Tcompiler="IAR"/>
1597     </condition>
1598     <condition id="CM4_FP_LE_IAR">
1599       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1600       <require condition="CM4_FP_IAR"/>
1601       <require Dendian="Little-endian"/>
1602     </condition>
1603     <condition id="CM4_FP_BE_IAR">
1604       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1605       <require condition="CM4_FP_IAR"/>
1606       <require Dendian="Big-endian"/>
1607     </condition>
1608
1609     <condition id="CM7_IAR">
1610       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1611       <require condition="CM7"/>
1612       <require Tcompiler="IAR"/>
1613     </condition>
1614     <condition id="CM7_LE_IAR">
1615       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1616       <require condition="CM7_IAR"/>
1617       <require Dendian="Little-endian"/>
1618     </condition>
1619     <condition id="CM7_BE_IAR">
1620       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1621       <require condition="CM7_IAR"/>
1622       <require Dendian="Big-endian"/>
1623     </condition>
1624
1625     <condition id="CM7_FP_IAR">
1626       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1627       <require condition="CM7_FP"/>
1628       <require Tcompiler="IAR"/>
1629     </condition>
1630     <condition id="CM7_FP_LE_IAR">
1631       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1632       <require condition="CM7_FP_IAR"/>
1633       <require Dendian="Little-endian"/>
1634     </condition>
1635     <condition id="CM7_FP_BE_IAR">
1636       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1637       <require condition="CM7_FP_IAR"/>
1638       <require Dendian="Big-endian"/>
1639     </condition>
1640
1641     <condition id="CM7_SP_IAR">
1642       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1643       <require condition="CM7_SP"/>
1644       <require Tcompiler="IAR"/>
1645     </condition>
1646     <condition id="CM7_SP_LE_IAR">
1647       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1648       <require condition="CM7_SP_IAR"/>
1649       <require Dendian="Little-endian"/>
1650     </condition>
1651     <condition id="CM7_SP_BE_IAR">
1652       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1653       <require condition="CM7_SP_IAR"/>
1654       <require Dendian="Big-endian"/>
1655     </condition>
1656
1657     <condition id="CM7_DP_IAR">
1658       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1659       <require condition="CM7_DP"/>
1660       <require Tcompiler="IAR"/>
1661     </condition>
1662     <condition id="CM7_DP_LE_IAR">
1663       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1664       <require condition="CM7_DP_IAR"/>
1665       <require Dendian="Little-endian"/>
1666     </condition>
1667     <condition id="CM7_DP_BE_IAR">
1668       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1669       <require condition="CM7_DP_IAR"/>
1670       <require Dendian="Big-endian"/>
1671     </condition>
1672
1673     <!-- conditions selecting single devices and CMSIS Core -->
1674     <!-- used for component startup, GCC version is used for C-Startup -->
1675     <condition id="ARMCM0 CMSIS">
1676       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1677       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1678       <require Cclass="CMSIS" Cgroup="CORE"/>
1679     </condition>
1680     <condition id="ARMCM0 CMSIS GCC">
1681       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1682       <require condition="ARMCM0 CMSIS"/>
1683       <require condition="GCC"/>
1684     </condition>
1685
1686     <condition id="ARMCM0+ CMSIS">
1687       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1688       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1689       <require Cclass="CMSIS" Cgroup="CORE"/>
1690     </condition>
1691     <condition id="ARMCM0+ CMSIS GCC">
1692       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1693       <require condition="ARMCM0+ CMSIS"/>
1694       <require condition="GCC"/>
1695     </condition>
1696
1697     <condition id="ARMCM3 CMSIS">
1698       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1699       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1700       <require Cclass="CMSIS" Cgroup="CORE"/>
1701     </condition>
1702     <condition id="ARMCM3 CMSIS GCC">
1703       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1704       <require condition="ARMCM3 CMSIS"/>
1705       <require condition="GCC"/>
1706     </condition>
1707
1708     <condition id="ARMCM4 CMSIS">
1709       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1710       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1711       <require Cclass="CMSIS" Cgroup="CORE"/>
1712     </condition>
1713     <condition id="ARMCM4 CMSIS GCC">
1714       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1715       <require condition="ARMCM4 CMSIS"/>
1716       <require condition="GCC"/>
1717     </condition>
1718
1719     <condition id="ARMCM7 CMSIS">
1720       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1721       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1722       <require Cclass="CMSIS" Cgroup="CORE"/>
1723     </condition>
1724     <condition id="ARMCM7 CMSIS GCC">
1725       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1726       <require condition="ARMCM7 CMSIS"/>
1727       <require condition="GCC"/>
1728     </condition>
1729
1730     <condition id="ARMCM23 CMSIS">
1731       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1732       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1733       <require Cclass="CMSIS" Cgroup="CORE"/>
1734     </condition>
1735     <condition id="ARMCM23 CMSIS GCC">
1736       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1737       <require condition="ARMCM23 CMSIS"/>
1738       <require condition="GCC"/>
1739     </condition>
1740
1741     <condition id="ARMCM33 CMSIS">
1742       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1743       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1744       <require Cclass="CMSIS" Cgroup="CORE"/>
1745     </condition>
1746     <condition id="ARMCM33 CMSIS GCC">
1747       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1748       <require condition="ARMCM33 CMSIS"/>
1749       <require condition="GCC"/>
1750     </condition>
1751
1752     <condition id="ARMSC000 CMSIS">
1753       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1754       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1755       <require Cclass="CMSIS" Cgroup="CORE"/>
1756     </condition>
1757     <condition id="ARMSC000 CMSIS GCC">
1758       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1759       <require condition="ARMSC000 CMSIS"/>
1760       <require condition="GCC"/>
1761     </condition>
1762
1763     <condition id="ARMSC300 CMSIS">
1764       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1765       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1766       <require Cclass="CMSIS" Cgroup="CORE"/>
1767     </condition>
1768     <condition id="ARMSC300 CMSIS GCC">
1769       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1770       <require condition="ARMSC300 CMSIS"/>
1771       <require condition="GCC"/>
1772     </condition>
1773
1774     <condition id="ARMv8MBL CMSIS">
1775       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1776       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1777       <require Cclass="CMSIS" Cgroup="CORE"/>
1778     </condition>
1779     <condition id="ARMv8MBL CMSIS GCC">
1780       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1781       <require condition="ARMv8MBL CMSIS"/>
1782       <require condition="GCC"/>
1783     </condition>
1784
1785     <condition id="ARMv8MML CMSIS">
1786       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1787       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1788       <require Cclass="CMSIS" Cgroup="CORE"/>
1789     </condition>
1790     <condition id="ARMv8MML CMSIS GCC">
1791       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1792       <require condition="ARMv8MML CMSIS"/>
1793       <require condition="GCC"/>
1794     </condition>
1795
1796     <condition id="ARMCA5 CMSIS">
1797       <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1798       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1799       <require Cclass="CMSIS" Cgroup="CORE"/>
1800     </condition>
1801
1802     <condition id="ARMCA7 CMSIS">
1803       <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1804       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1805       <require Cclass="CMSIS" Cgroup="CORE"/>
1806     </condition>
1807
1808     <condition id="ARMCA9 CMSIS">
1809       <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1810       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1811       <require Cclass="CMSIS" Cgroup="CORE"/>
1812     </condition>
1813
1814     <!-- CMSIS DSP -->
1815     <condition id="CMSIS DSP">
1816       <description>Components required for DSP</description>
1817       <require condition="ARMv6_7_8-M Device"/>
1818       <require condition="ARMCC GCC"/>
1819       <require Cclass="CMSIS" Cgroup="CORE"/>
1820     </condition>
1821
1822     <!-- RTOS RTX -->
1823     <condition id="RTOS RTX">
1824       <description>Components required for RTOS RTX</description>
1825       <require condition="ARMv6_7-M Device"/>
1826       <require condition="ARMCC GCC IAR"/>
1827       <require Cclass="Device" Cgroup="Startup"/>
1828       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1829     </condition>
1830     <condition id="RTOS RTX5">
1831       <description>Components required for RTOS RTX5</description>
1832       <require condition="ARMv6_7_8-M Device"/>
1833       <require condition="ARMCC GCC IAR"/>
1834       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1835     </condition>
1836     <condition id="RTOS2 RTX5">
1837       <description>Components required for RTOS2 RTX5</description>
1838       <require condition="ARMv6_7_8-M Device"/>
1839       <require condition="ARMCC GCC IAR"/>
1840       <require Cclass="CMSIS"  Cgroup="CORE"/>
1841       <require Cclass="Device" Cgroup="Startup"/>
1842     </condition>
1843     <condition id="RTOS2 RTX5 v7-A">
1844       <description>Components required for RTOS2 RTX5 v7-A</description>
1845       <require condition="ARMv7-A Device"/>
1846       <require condition="ARMCC GCC IAR"/>
1847       <require Cclass="CMSIS"  Cgroup="CORE"/>
1848       <require Cclass="Device" Cgroup="Startup"/>
1849       <require Cclass="Device" Cgroup="OS Tick"/>
1850       <require Cclass="Device" Cgroup="IRQ Controller"/>
1851     </condition>
1852     <condition id="RTOS2 RTX5 Lib">
1853       <description>Components required for RTOS2 RTX5 Library</description>
1854       <require condition="ARMv6_7_8-M Device"/>
1855       <require condition="ARMCC GCC IAR"/>
1856       <require Cclass="CMSIS"  Cgroup="CORE"/>
1857       <require Cclass="Device" Cgroup="Startup"/>
1858     </condition>
1859     <condition id="RTOS2 RTX5 NS">
1860       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1861       <require condition="ARMv8-M TZ Device"/>
1862       <require condition="ARMCC GCC"/>
1863       <require Cclass="CMSIS"  Cgroup="CORE"/>
1864       <require Cclass="Device" Cgroup="Startup"/>
1865     </condition>
1866
1867     <!-- OS Tick -->
1868     <condition id="OS Tick PTIM">
1869       <description>Components required for OS Tick Private Timer</description>
1870       <require condition="CA5_CA9"/>
1871       <require Cclass="Device" Cgroup="IRQ Controller"/>
1872     </condition>
1873
1874   </conditions>
1875
1876   <components>
1877     <!-- CMSIS-Core component -->
1878     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.1"  condition="ARMv6_7_8-M Device" >
1879       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1880       <files>
1881         <!-- CPU independent -->
1882         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1883         <file category="include" name="CMSIS/Include/"/>
1884         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1885         <!-- Code template -->
1886         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1887         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1888       </files>
1889     </component>
1890
1891     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.0"  condition="ARMv7-A Device" >
1892       <description>CMSIS-CORE for Cortex-A</description>
1893       <files>
1894         <!-- CPU independent -->
1895         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
1896         <file category="include" name="CMSIS/Core_A/Include/"/>
1897       </files>
1898     </component>
1899
1900     <!-- CMSIS-Startup components -->
1901     <!-- Cortex-M0 -->
1902     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1903       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1904       <files>
1905         <!-- include folder / device header file -->
1906         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1907         <!-- startup / system file -->
1908         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1909         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1910         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1911         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1912         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1913       </files>
1914     </component>
1915     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1916       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1917       <files>
1918         <!-- include folder / device header file -->
1919         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1920         <!-- startup / system file -->
1921         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1922         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1923         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1924       </files>
1925     </component>
1926
1927     <!-- Cortex-M0+ -->
1928     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1929       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1930       <files>
1931         <!-- include folder / device header file -->
1932         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1933         <!-- startup / system file -->
1934         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1935         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1936         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1937         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1938         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1939       </files>
1940     </component>
1941     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1942       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1943       <files>
1944         <!-- include folder / device header file -->
1945         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1946         <!-- startup / system file -->
1947         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1948         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1949         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1950       </files>
1951     </component>
1952
1953     <!-- Cortex-M3 -->
1954     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1955       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1956       <files>
1957         <!-- include folder / device header file -->
1958         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1959         <!-- startup / system file -->
1960         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1961         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1962         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1963         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1964         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1965       </files>
1966     </component>
1967     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1968       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1969       <files>
1970         <!-- include folder / device header file -->
1971         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1972         <!-- startup / system file -->
1973         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1974         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1975         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1976       </files>
1977     </component>
1978
1979     <!-- Cortex-M4 -->
1980     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1981       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1982       <files>
1983         <!-- include folder / device header file -->
1984         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1985         <!-- startup / system file -->
1986         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1987         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1988         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1989         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1990         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1991       </files>
1992     </component>
1993     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1994       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1995       <files>
1996         <!-- include folder / device header file -->
1997         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1998         <!-- startup / system file -->
1999         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2000         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2001         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2002       </files>
2003     </component>
2004
2005     <!-- Cortex-M7 -->
2006     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2007       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2008       <files>
2009         <!-- include folder / device header file -->
2010         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2011         <!-- startup / system file -->
2012         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2013         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2014         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2015         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2016         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2017       </files>
2018     </component>
2019     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2020       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2021       <files>
2022         <!-- include folder / device header file -->
2023         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2024         <!-- startup / system file -->
2025         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2026         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2027         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2028       </files>
2029     </component>
2030
2031     <!-- Cortex-M23 -->
2032     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2033       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2034       <files>
2035         <!-- include folder / device header file -->
2036         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2037         <!-- startup / system file -->
2038         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2039         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2040         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2041         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2042         <!-- SAU configuration -->
2043         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2044       </files>
2045     </component>
2046     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2047       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2048       <files>
2049         <!-- include folder / device header file -->
2050         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2051         <!-- startup / system file -->
2052         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2053         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2054         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2055         <!-- SAU configuration -->
2056         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2057       </files>
2058     </component>
2059
2060     <!-- Cortex-M33 -->
2061     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2062       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2063       <files>
2064         <!-- include folder / device header file -->
2065         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2066         <!-- startup / system file -->
2067         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2068         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2069         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2070         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2071         <!-- SAU configuration -->
2072         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2073       </files>
2074     </component>
2075     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2076       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2077       <files>
2078         <!-- include folder / device header file -->
2079         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2080         <!-- startup / system file -->
2081         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2082         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2083         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2084         <!-- SAU configuration -->
2085         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2086       </files>
2087     </component>
2088
2089     <!-- Cortex-SC000 -->
2090     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2091       <description>System and Startup for Generic ARM SC000 device</description>
2092       <files>
2093         <!-- include folder / device header file -->
2094         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2095         <!-- startup / system file -->
2096         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2097         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2098         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2099         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2100         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2101       </files>
2102     </component>
2103     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2104       <description>System and Startup for Generic ARM SC000 device</description>
2105       <files>
2106         <!-- include folder / device header file -->
2107         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2108         <!-- startup / system file -->
2109         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2110         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2111         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2112       </files>
2113     </component>
2114
2115     <!-- Cortex-SC300 -->
2116     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2117       <description>System and Startup for Generic ARM SC300 device</description>
2118       <files>
2119         <!-- include folder / device header file -->
2120         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2121         <!-- startup / system file -->
2122         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2123         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2124         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2125         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2126         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2127       </files>
2128     </component>
2129     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2130       <description>System and Startup for Generic ARM SC300 device</description>
2131       <files>
2132         <!-- include folder / device header file -->
2133         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2134         <!-- startup / system file -->
2135         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2136         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2137         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2138       </files>
2139     </component>
2140
2141     <!-- ARMv8MBL -->
2142     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2143       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2144       <files>
2145         <!-- include folder / device header file -->
2146         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2147         <!-- startup / system file -->
2148         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2149         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2150         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2151         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2152         <!-- SAU configuration -->
2153         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2154       </files>
2155     </component>
2156     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2157       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2158       <files>
2159         <!-- include folder / device header file -->
2160         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2161         <!-- startup / system file -->
2162         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2163         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2164         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2165         <!-- SAU configuration -->
2166         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2167       </files>
2168     </component>
2169
2170     <!-- ARMv8MML -->
2171     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2172       <description>System and Startup for Generic ARM ARMv8MML device</description>
2173       <files>
2174         <!-- include folder / device header file -->
2175         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2176         <!-- startup / system file -->
2177         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2178         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2179         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2180         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2181         <!-- SAU configuration -->
2182         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2183       </files>
2184     </component>
2185     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2186       <description>System and Startup for Generic ARM ARMv8MML device</description>
2187       <files>
2188         <!-- include folder / device header file -->
2189         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2190         <!-- startup / system file -->
2191         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2192         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2193         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2194         <!-- SAU configuration -->
2195         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2196       </files>
2197     </component>
2198
2199     <!-- Cortex-A5 -->
2200     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2201       <description>System and Startup for Generic ARM Cortex-A5 device</description>
2202       <files>
2203         <!-- include folder / device header file -->
2204         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2205         <!-- startup / system / mmu files -->
2206         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2207         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2208         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2209         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2210         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2211         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2212         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2213         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2214
2215       </files>
2216     </component>
2217
2218     <!-- Cortex-A7 -->
2219     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2220       <description>System and Startup for Generic ARM Cortex-A7 device</description>
2221       <files>
2222         <!-- include folder / device header file -->
2223         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2224         <!-- startup / system / mmu files -->
2225         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2226         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2227         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2228         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2229         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2230         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2231         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2232         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2233       </files>
2234     </component>
2235
2236     <!-- Cortex-A9 -->
2237     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA9 CMSIS">
2238       <description>System and Startup for Generic ARM Cortex-A9 device</description>
2239       <files>
2240         <!-- include folder / device header file -->
2241         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2242         <!-- startup / system / mmu files -->
2243         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2244         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2245         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2246         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2247         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2248         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2249         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2250         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2251       </files>
2252     </component>
2253
2254     <!-- IRQ Controller -->
2255     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.0" condition="ARMv7-A Device">
2256       <description>IRQ Controller implementation using GIC</description>
2257       <files>
2258         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2259       </files>
2260     </component>
2261
2262     <!-- OS Tick -->
2263     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick PTIM">
2264       <description>OS Tick implementation using Private Timer</description>
2265       <files>
2266         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2267       </files>
2268     </component>
2269
2270     <!-- CMSIS-DSP component -->
2271     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.1" condition="CMSIS DSP">
2272       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2273       <files>
2274         <!-- CPU independent -->
2275         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2276         <file category="header" name="CMSIS/Include/arm_math.h"/>
2277
2278         <!-- CPU and Compiler dependent -->
2279         <!-- ARMCC -->
2280         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2281         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2282         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2283         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2284         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2285         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2286         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2287         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2288         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2289         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2290         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2291         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2292         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2293         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2294
2295         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2296         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2297         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2298         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2299         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2300         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2301         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2302         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2303         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2304         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2305         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2306         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2307
2308         <!-- GCC -->
2309         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2310         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2311         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2312         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2313         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2314         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2315         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2316
2317         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2318         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2319         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2320         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2321         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2322         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2323         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2324         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2325         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2326         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2327         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2328         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2329
2330       </files>
2331     </component>
2332
2333     <!-- CMSIS-RTOS Keil RTX component -->
2334     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0.0" condition="RTOS RTX">
2335       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2336       <RTE_Components_h>
2337         <!-- the following content goes into file 'RTE_Components.h' -->
2338         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2339         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2340       </RTE_Components_h>
2341       <files>
2342         <!-- CPU independent -->
2343         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2344         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2345         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2346
2347         <!-- RTX templates -->
2348         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2349         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2350         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2351         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2352         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2353         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2354         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2355         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2356         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2357         <!-- tool-chain specific template file -->
2358         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2359         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2360         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2361
2362         <!-- CPU and Compiler dependent -->
2363         <!-- ARMCC -->
2364         <file category="library" condition="CM0_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2365         <file category="library" condition="CM0_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2366         <file category="library" condition="CM3_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2367         <file category="library" condition="CM3_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2368         <file category="library" condition="CM4_LE_ARMCC_STD"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2369         <file category="library" condition="CM4_LE_ARMCC_IFX"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2370         <file category="library" condition="CM4_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2371         <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2372         <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2373         <file category="library" condition="CM4_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2374         <file category="library" condition="CM7_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2375         <file category="library" condition="CM7_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2376         <file category="library" condition="CM7_FP_LE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2377         <file category="library" condition="CM7_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2378         <!-- GCC -->
2379         <file category="library" condition="CM0_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2380         <file category="library" condition="CM0_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2381         <file category="library" condition="CM3_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2382         <file category="library" condition="CM3_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2383         <file category="library" condition="CM4_LE_GCC_STD"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2384         <file category="library" condition="CM4_LE_GCC_IFX"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2385         <file category="library" condition="CM4_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2386         <file category="library" condition="CM4_FP_LE_GCC_STD"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2387         <file category="library" condition="CM4_FP_LE_GCC_IFX"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2388         <file category="library" condition="CM4_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2389         <file category="library" condition="CM7_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2390         <file category="library" condition="CM7_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2391         <file category="library" condition="CM7_FP_LE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2392         <file category="library" condition="CM7_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2393         <!-- IAR -->
2394         <file category="library" condition="CM0_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2395         <file category="library" condition="CM0_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2396         <file category="library" condition="CM3_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2397         <file category="library" condition="CM3_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2398         <file category="library" condition="CM4_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2399         <file category="library" condition="CM4_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2400         <file category="library" condition="CM4_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2401         <file category="library" condition="CM4_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2402         <file category="library" condition="CM7_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2403         <file category="library" condition="CM7_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2404         <file category="library" condition="CM7_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2405         <file category="library" condition="CM7_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2406       </files>
2407     </component>
2408
2409     <!-- CMSIS-RTOS Keil RTX5 component -->
2410     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.0" Capiversion="1.0.0" condition="RTOS RTX5">
2411       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2412       <RTE_Components_h>
2413         <!-- the following content goes into file 'RTE_Components.h' -->
2414         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2415         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2416       </RTE_Components_h>
2417       <files>
2418         <!-- RTX header file -->
2419         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2420         <!-- RTX compatibility module for API V1 -->
2421         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2422       </files>
2423     </component>
2424
2425     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2426     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 Lib">
2427       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2428       <RTE_Components_h>
2429         <!-- the following content goes into file 'RTE_Components.h' -->
2430         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2431         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2432       </RTE_Components_h>
2433       <files>
2434         <!-- RTX documentation -->
2435         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2436
2437         <!-- RTX header files -->
2438         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2439
2440         <!-- RTX configuration -->
2441         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2442         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2443
2444         <!-- RTX templates -->
2445         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2446         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2447         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2448         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2449         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2450         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2451         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2452         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2453         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="2.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2454         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2455
2456         <!-- RTX library configuration -->
2457         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2458
2459         <!-- RTX libraries (CPU and Compiler dependent) -->
2460         <!-- ARMCC -->
2461         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2462         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2463         <file category="library" condition="CM4_LE_ARMCC_STD"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2464         <file category="library" condition="CM4_FP_LE_ARMCC_STD"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2465         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2466         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2467         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2468         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2469         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2470         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2471         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2472         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2473         <!-- GCC -->
2474         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2475         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2476         <file category="library" condition="CM4_LE_GCC_STD"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2477         <file category="library" condition="CM4_FP_LE_GCC_STD"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2478         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2479         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2480         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2481         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2482         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2483         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2484         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2485         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2486         <!-- IAR -->
2487         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2488         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2489         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2490         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2491         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2492         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2493       </files>
2494     </component>
2495     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
2496       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2497       <RTE_Components_h>
2498         <!-- the following content goes into file 'RTE_Components.h' -->
2499         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2500         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2501         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2502       </RTE_Components_h>
2503       <files>
2504         <!-- RTX documentation -->
2505         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2506
2507         <!-- RTX header files -->
2508         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2509
2510         <!-- RTX configuration -->
2511         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2512         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2513
2514         <!-- RTX templates -->
2515         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2516         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2517         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2518         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2519         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2520         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2521         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2522         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2523         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2524
2525         <!-- RTX library configuration -->
2526         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2527
2528         <!-- RTX libraries (CPU and Compiler dependent) -->
2529         <!-- ARMCC -->
2530         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2531         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2532         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2533         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2534         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2535         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2536         <!-- GCC -->
2537         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2538         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2539         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2540         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2541         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2542         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2543       </files>
2544     </component>
2545     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5">
2546       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2547       <RTE_Components_h>
2548         <!-- the following content goes into file 'RTE_Components.h' -->
2549         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2550         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2551         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2552       </RTE_Components_h>
2553       <files>
2554         <!-- RTX documentation -->
2555         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2556
2557         <!-- RTX header files -->
2558         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2559
2560         <!-- RTX configuration -->
2561         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2562         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2563
2564         <!-- RTX templates -->
2565         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2566         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2567         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2568         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2569         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2570         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2571         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2572         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2573         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2574
2575         <!-- RTX sources (core) -->
2576         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2577         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2578         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2579         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2580         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2581         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2582         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2583         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2584         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2585         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2586         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2587         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2588         <!-- RTX sources (library configuration) -->
2589         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2590         <!-- RTX sources (handlers ARMCC) -->
2591         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2592         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2593         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2594         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2595         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2596         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2597         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2598         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2599         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2600         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2601         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2602         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2603         <!-- RTX sources (handlers GCC) -->
2604         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2605         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2606         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2607         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2608         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2609         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2610         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2611         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2612         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2613         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2614         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2615         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2616         <!-- RTX sources (handlers IAR) -->
2617         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2618         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2619         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2620         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2621         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2622         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2623         <!-- OS Tick (SysTick) -->
2624         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2625       </files>
2626     </component>
2627     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 v7-A">
2628       <description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
2629       <RTE_Components_h>
2630         <!-- the following content goes into file 'RTE_Components.h' -->
2631         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2632         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2633         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2634       </RTE_Components_h>
2635       <files>
2636         <!-- RTX documentation -->
2637         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2638
2639         <!-- RTX header files -->
2640         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2641
2642         <!-- RTX configuration -->
2643         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2644         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2645
2646         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2647
2648         <!-- RTX templates -->
2649         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2650         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2651         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2652         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2653         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2654         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2655         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2656         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2657         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2658
2659         <!-- RTX sources (core) -->
2660         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2661         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2662         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2663         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2664         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2665         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2666         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2667         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2668         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2669         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2670         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2671         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2672         <!-- RTX sources (library configuration) -->
2673         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2674         <!-- RTX sources (handlers ARMCC) -->
2675         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
2676         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
2677         <!-- RTX sources (handlers GCC) -->
2678         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
2679         <!-- RTX sources (handlers IAR) -->
2680         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
2681       </files>
2682     </component>
2683     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
2684       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2685       <RTE_Components_h>
2686         <!-- the following content goes into file 'RTE_Components.h' -->
2687         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2688         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2689         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2690         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2691       </RTE_Components_h>
2692       <files>
2693         <!-- RTX documentation -->
2694         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2695
2696         <!-- RTX header files -->
2697         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2698
2699         <!-- RTX configuration -->
2700         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2701         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2702
2703         <!-- RTX templates -->
2704         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2705         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2706         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2707         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2708         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2709         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2710         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2711         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2712         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2713
2714         <!-- RTX sources (core) -->
2715         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2716         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2717         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2718         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2719         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2720         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2721         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2722         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2723         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2724         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2725         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2726         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2727         <!-- RTX sources (library configuration) -->
2728         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2729         <!-- RTX sources (ARMCC handlers) -->
2730         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2731         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2732         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2733         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2734         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2735         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2736         <!-- RTX sources (GCC handlers) -->
2737         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2738         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2739         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2740         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2741         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2742         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2743         <!-- OS Tick (SysTick) -->
2744         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2745       </files>
2746     </component>
2747
2748   </components>
2749
2750   <boards>
2751     <board name="uVision Simulator" vendor="Keil">
2752       <description>uVision Simulator</description>
2753       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2754       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2755       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2756       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2757       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2758       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2759       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2760       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2761       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2762       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2763       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2764       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2765       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2766       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2767       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2768       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2769       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2770       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2771    </board>
2772   </boards>
2773
2774   <examples>
2775     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2776       <description>DSP_Lib Class Marks example</description>
2777       <board name="uVision Simulator" vendor="Keil"/>
2778       <project>
2779         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2780       </project>
2781       <attributes>
2782         <component Cclass="CMSIS" Cgroup="CORE"/>
2783         <component Cclass="CMSIS" Cgroup="DSP"/>
2784         <component Cclass="Device" Cgroup="Startup"/>
2785         <category>Getting Started</category>
2786       </attributes>
2787     </example>
2788
2789     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2790       <description>DSP_Lib Convolution example</description>
2791       <board name="uVision Simulator" vendor="Keil"/>
2792       <project>
2793         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2794       </project>
2795       <attributes>
2796         <component Cclass="CMSIS" Cgroup="CORE"/>
2797         <component Cclass="CMSIS" Cgroup="DSP"/>
2798         <component Cclass="Device" Cgroup="Startup"/>
2799         <category>Getting Started</category>
2800       </attributes>
2801     </example>
2802
2803     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2804       <description>DSP_Lib Dotproduct example</description>
2805       <board name="uVision Simulator" vendor="Keil"/>
2806       <project>
2807         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2808       </project>
2809       <attributes>
2810         <component Cclass="CMSIS" Cgroup="CORE"/>
2811         <component Cclass="CMSIS" Cgroup="DSP"/>
2812         <component Cclass="Device" Cgroup="Startup"/>
2813         <category>Getting Started</category>
2814       </attributes>
2815     </example>
2816
2817     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2818       <description>DSP_Lib FFT Bin example</description>
2819       <board name="uVision Simulator" vendor="Keil"/>
2820       <project>
2821         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2822       </project>
2823       <attributes>
2824         <component Cclass="CMSIS" Cgroup="CORE"/>
2825         <component Cclass="CMSIS" Cgroup="DSP"/>
2826         <component Cclass="Device" Cgroup="Startup"/>
2827         <category>Getting Started</category>
2828       </attributes>
2829     </example>
2830
2831     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2832       <description>DSP_Lib FIR example</description>
2833       <board name="uVision Simulator" vendor="Keil"/>
2834       <project>
2835         <environment name="uv" load="arm_fir_example.uvprojx"/>
2836       </project>
2837       <attributes>
2838         <component Cclass="CMSIS" Cgroup="CORE"/>
2839         <component Cclass="CMSIS" Cgroup="DSP"/>
2840         <component Cclass="Device" Cgroup="Startup"/>
2841         <category>Getting Started</category>
2842       </attributes>
2843     </example>
2844
2845     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2846       <description>DSP_Lib Graphic Equalizer example</description>
2847       <board name="uVision Simulator" vendor="Keil"/>
2848       <project>
2849         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2850       </project>
2851       <attributes>
2852         <component Cclass="CMSIS" Cgroup="CORE"/>
2853         <component Cclass="CMSIS" Cgroup="DSP"/>
2854         <component Cclass="Device" Cgroup="Startup"/>
2855         <category>Getting Started</category>
2856       </attributes>
2857     </example>
2858
2859     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2860       <description>DSP_Lib Linear Interpolation example</description>
2861       <board name="uVision Simulator" vendor="Keil"/>
2862       <project>
2863         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2864       </project>
2865       <attributes>
2866         <component Cclass="CMSIS" Cgroup="CORE"/>
2867         <component Cclass="CMSIS" Cgroup="DSP"/>
2868         <component Cclass="Device" Cgroup="Startup"/>
2869         <category>Getting Started</category>
2870       </attributes>
2871     </example>
2872
2873     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2874       <description>DSP_Lib Matrix example</description>
2875       <board name="uVision Simulator" vendor="Keil"/>
2876       <project>
2877         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2878       </project>
2879       <attributes>
2880         <component Cclass="CMSIS" Cgroup="CORE"/>
2881         <component Cclass="CMSIS" Cgroup="DSP"/>
2882         <component Cclass="Device" Cgroup="Startup"/>
2883         <category>Getting Started</category>
2884       </attributes>
2885     </example>
2886
2887     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2888       <description>DSP_Lib Signal Convergence example</description>
2889       <board name="uVision Simulator" vendor="Keil"/>
2890       <project>
2891         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2892       </project>
2893       <attributes>
2894         <component Cclass="CMSIS" Cgroup="CORE"/>
2895         <component Cclass="CMSIS" Cgroup="DSP"/>
2896         <component Cclass="Device" Cgroup="Startup"/>
2897         <category>Getting Started</category>
2898       </attributes>
2899     </example>
2900
2901     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2902       <description>DSP_Lib Sinus/Cosinus example</description>
2903       <board name="uVision Simulator" vendor="Keil"/>
2904       <project>
2905         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2906       </project>
2907       <attributes>
2908         <component Cclass="CMSIS" Cgroup="CORE"/>
2909         <component Cclass="CMSIS" Cgroup="DSP"/>
2910         <component Cclass="Device" Cgroup="Startup"/>
2911         <category>Getting Started</category>
2912       </attributes>
2913     </example>
2914
2915     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2916       <description>DSP_Lib Variance example</description>
2917       <board name="uVision Simulator" vendor="Keil"/>
2918       <project>
2919         <environment name="uv" load="arm_variance_example.uvprojx"/>
2920       </project>
2921       <attributes>
2922         <component Cclass="CMSIS" Cgroup="CORE"/>
2923         <component Cclass="CMSIS" Cgroup="DSP"/>
2924         <component Cclass="Device" Cgroup="Startup"/>
2925         <category>Getting Started</category>
2926       </attributes>
2927     </example>
2928
2929     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2930       <description>CMSIS-RTOS2 Blinky example</description>
2931       <board name="uVision Simulator" vendor="Keil"/>
2932       <project>
2933         <environment name="uv" load="Blinky.uvprojx"/>
2934       </project>
2935       <attributes>
2936         <component Cclass="CMSIS" Cgroup="CORE"/>
2937         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2938         <component Cclass="Device" Cgroup="Startup"/>
2939         <category>Getting Started</category>
2940       </attributes>
2941     </example>
2942
2943     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2944       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2945       <board name="uVision Simulator" vendor="Keil"/>
2946       <project>
2947         <environment name="uv" load="Blinky.uvprojx"/>
2948       </project>
2949       <attributes>
2950         <component Cclass="CMSIS" Cgroup="CORE"/>
2951         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2952         <component Cclass="Device" Cgroup="Startup"/>
2953         <category>Getting Started</category>
2954       </attributes>
2955     </example>
2956
2957     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2958       <description>Bare-metal secure/non-secure example without RTOS</description>
2959       <board name="uVision Simulator" vendor="Keil"/>
2960       <project>
2961         <environment name="uv" load="NoRTOS.uvmpw"/>
2962       </project>
2963       <attributes>
2964         <component Cclass="CMSIS" Cgroup="CORE"/>
2965         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2966         <component Cclass="Device" Cgroup="Startup"/>
2967         <category>Getting Started</category>
2968       </attributes>
2969     </example>
2970
2971     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2972       <description>Secure/non-secure RTOS example with thread context management</description>
2973       <board name="uVision Simulator" vendor="Keil"/>
2974       <project>
2975         <environment name="uv" load="RTOS.uvmpw"/>
2976       </project>
2977       <attributes>
2978         <component Cclass="CMSIS" Cgroup="CORE"/>
2979         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2980         <component Cclass="Device" Cgroup="Startup"/>
2981         <category>Getting Started</category>
2982       </attributes>
2983     </example>
2984
2985     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2986       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2987       <board name="uVision Simulator" vendor="Keil"/>
2988       <project>
2989         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2990       </project>
2991       <attributes>
2992         <component Cclass="CMSIS" Cgroup="CORE"/>
2993         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2994         <component Cclass="Device" Cgroup="Startup"/>
2995         <category>Getting Started</category>
2996       </attributes>
2997     </example>
2998
2999   </examples>
3000
3001 </package>