begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.7.7" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="https://raw.githubusercontent.com/Open-CMSIS-Pack/Open-CMSIS-Pack-Spec/v1.7.7/schema/PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Common Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>https://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.9.1">
  12       Active development ...
  13       CMSIS-DSP: Moved into separate pack!
  14       CMSIS-NN: Moved into separate pack!
  15       CMSIS-DAP: 2.1.2 (see revision history for details)
  16        - Fix DAP_Transfer handling when transfer fails
  17     </release>
  18     <release version="5.9.0" date="2022-05-02">
  19       CMSIS-Core(M): 5.6.0
  20        - Arm Cortex-M85 cpu support
  21        - Arm China STAR-MC1 cpu support
  22        - Updated system_ARMCM55.c
  23       CMSIS-DSP: 1.10.0 (see revision history for details)
  24       CMSIS-NN: 3.1.0 (see revision history for details)
  25        - Support for int16 convolution and fully connected for reference implementation
  26        - Support for DSP extension optimization for int16 convolution and fully connected
  27        - Support dilation for int8 convolution
  28        - Support dilation for int8 depthwise convolution
  29        - Support for int16 depthwise conv for reference implementation including dilation
  30        - Support for int16 average and max pooling for reference implementation
  31        - Support for elementwise add and mul int16 scalar version
  32        - Support for softmax int16 scalar version
  33        - Support for SVDF with 8 bit state tensor
  34       CMSIS-RTOS2: 2.1.3 (unchanged)
  35         - RTX 5.5.4 (see revision history for details)
  36       CMSIS-Pack: deprecated (moved to Open-CMSIS-Pack)
  37       CMSIS-SVD: 1.3.9 (see revision history for details)
  38       CMSIS-DAP: 2.1.1 (see revision history for details)
  39        - Allow default clock frequency to use fast clock mode
  40       Devices
  41        - Support for Cortex-M85
  42       Utilities
  43         - SVDConv 3.3.42
  44         - PackChk 1.3.95
  45     </release>
  46     <release version="5.8.0" date="2021-06-24">
  47       CMSIS-Core(M): 5.5.0 (see revision history for details)
  48         - Updated GCC LinkerDescription, GCC Assembler startup
  49         - Added Armv8-M Stack Sealing (to linker, startup) for toolchain ARM, GCC
  50         - Changed C-Startup to default Startup.
  51         - Updated Armv8-M Assembler startup to use GAS syntax
  52           Note: Updating existing projects may need manual user interaction!
  53       CMSIS-Core(A): 1.2.1 (see revision history for details)
  54         - Bugfixes for Cortex-A32
  55       CMSIS-DAP: 2.1.0 (see revision history for details)
  56         - Enhanced DAP_Info
  57         - Added extra UART support
  58       CMSIS-DSP: 1.9.0 (see revision history for details)
  59         - Purged pre-built libs from Git
  60         - Enhanced support for f16 datatype
  61         - Fixed couple of GCC issues
  62       CMSIS-NN: 3.0.0 (see revision history for details including version 2.0.0)
  63         - Major interface change for functions compatible with TensorFlow Lite for Microcontroller
  64         - Added optimization for SVDF kernel
  65         - Improved MVE performance for fully Connected and max pool operator
  66         - NULL bias support for fully connected operator in non-MVE case(Can affect performance)
  67         - Expanded existing unit test suite along with support for FVP
  68         - Removed Examples folder
  69       CMSIS-RTOS2:
  70         - RTX 5.5.3 (see revision history for details)
  71           - CVE-2021-27431 vulnerability mitigation.
  72           - Enhanced stack overrun checking.
  73           - Various bug fixes and improvements.
  74       CMSIS-Pack: 1.7.2 (see revision history for details)
  75         - Support for Microchip XC32 compiler
  76         - Support for Custom Datapath Extension
  77     </release>
  78     <release version="5.7.0" date="2020-04-09">
  79       CMSIS-Build: 0.9.0 (beta)
  80         - Draft for CMSIS Project description (CPRJ)
  81       CMSIS-Core(M): 5.4.0 (see revision history for details)
  82         - Cortex-M55 cpu support
  83         - Enhanced MVE support for Armv8.1-MML
  84         - Fixed device config define checks.
  85         - L1 Cache functions for Armv7-M and later
  86       CMSIS-Core(A): 1.2.0 (see revision history for details)
  87         - Fixed GIC_SetPendingIRQ to use GICD_SGIR
  88         - Added missing DSP intrinsics
  89         - Reworked assembly intrinsics: volatile, barriers and clobber
  90       CMSIS-DSP: 1.8.0 (see revision history for details)
  91         - Added new functions and function groups
  92         - Added MVE support
  93       CMSIS-NN: 1.3.0 (see revision history for details)
  94         - Added MVE support
  95         - Further optimizations for kernels using DSP extension
  96       CMSIS-RTOS2:
  97         - RTX 5.5.2 (see revision history for details)
  98       CMSIS-Driver: 2.8.0
  99         - Added VIO API 0.1.0 (Preview)
 100         - removed volatile from status related typedefs in APIs
 101         - enhanced WiFi Interface API with support for polling Socket Receive/Send
 102       CMSIS-Pack: 1.6.3 (see revision history for details)
 103         - deprecating all types specific to cpdsc format. Cpdsc is replaced by Cprj with dedicated schema.
 104       Devices:
 105         - ARMCM55 device
 106         - ARMv81MML startup code recognizing __MVE_USED macro
 107         - Refactored vector table references for all Cortex-M devices
 108         - Reworked ARMCM* C-StartUp files.
 109         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
 110       Utilities:
 111         Attention: Linux binaries moved to Linux64 folder!
 112         - SVDConv 3.3.35
 113         - PackChk 1.3.89
 114     </release>
 115     <release version="5.6.0" date="2019-07-10">
 116       CMSIS-Core(M): 5.3.0 (see revision history for details)
 117         - Added provisions for compiler-independent C startup code.
 118       CMSIS-Core(A): 1.1.4 (see revision history for details)
 119         - Fixed __FPU_Enable.
 120       CMSIS-DSP: 1.7.0 (see revision history for details)
 121         - New Neon versions of f32 functions
 122         - Python wrapper
 123         - Preliminary cmake build
 124         - Compilation flags for FFTs
 125         - Changes to arm_math.h
 126       CMSIS-NN: 1.2.0 (see revision history for details)
 127         - New function for depthwise convolution with asymmetric quantization.
 128         - New support functions for requantization.
 129       CMSIS-RTOS:
 130         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
 131       CMSIS-RTOS2:
 132         - RTX 5.5.1 (see revision history for details)
 133       CMSIS-Driver: 2.7.1
 134         - WiFi Interface API 1.0.0
 135       Devices:
 136         - Generalized C startup code for all Cortex-M family devices.
 137         - Updated Cortex-A default memory regions and MMU configurations
 138         - Moved Cortex-A memory and system config files to avoid include path issues
 139     </release>
 140     <release version="5.5.1" date="2019-03-20">
 141       The following folders are deprecated
 142         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 143
 144       CMSIS-Core(M): 5.2.1 (see revision history for details)
 145         - Fixed compilation issue in cmsis_armclang_ltm.h
 146     </release>
 147     <release version="5.5.0" date="2019-03-18">
 148       The following folders have been removed:
 149         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
 150         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
 151       The following folders are deprecated
 152         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 153
 154       CMSIS-Core(M): 5.2.0 (see revision history for details)
 155         - Reworked Stack/Heap configuration for ARM startup files.
 156         - Added Cortex-M35P device support.
 157         - Added generic Armv8.1-M Mainline device support.
 158       CMSIS-Core(A): 1.1.3 (see revision history for details)
 159       CMSIS-DSP: 1.6.0 (see revision history for details)
 160         - reworked DSP library source files
 161         - reworked DSP library documentation
 162         - Changed DSP folder structure
 163         - moved DSP libraries to folder ./DSP/Lib
 164         - ARM DSP Libraries are built with ARMCLANG
 165         - Added DSP Libraries Source variant
 166       CMSIS-RTOS2:
 167         - RTX 5.5.0 (see revision history for details)
 168       CMSIS-Driver: 2.7.0
 169         - Added WiFi Interface API 1.0.0-beta
 170         - Added components for project specific driver implementations
 171       CMSIS-Pack: 1.6.0 (see revision history for details)
 172       Devices:
 173         - Added Cortex-M35P and ARMv81MML device templates.
 174         - Fixed C-Startup Code for GCC (aligned with other compilers)
 175       Utilities:
 176         - SVDConv 3.3.25
 177         - PackChk 1.3.82
 178     </release>
 179     <release version="5.4.0" date="2018-08-01">
 180       Aligned pack structure with repository.
 181       The following folders are deprecated:
 182         - CMSIS/Include/
 183         - CMSIS/DSP_Lib/
 184
 185       CMSIS-Core(M): 5.1.2 (see revision history for details)
 186         - Added Cortex-M1 support (beta).
 187       CMSIS-Core(A): 1.1.2 (see revision history for details)
 188       CMSIS-NN: 1.1.0
 189         - Added new math functions.
 190       CMSIS-RTOS2:
 191         - API 2.1.3 (see revision history for details)
 192         - RTX 5.4.0 (see revision history for details)
 193           * Updated exception handling on Cortex-A
 194       CMSIS-Driver:
 195         - Flash Driver API V2.2.0
 196       Utilities:
 197         - SVDConv 3.3.21
 198         - PackChk 1.3.71
 199     </release>
 200     <release version="5.3.0" date="2018-02-22">
 201       Updated Arm company brand.
 202       CMSIS-Core(M): 5.1.1 (see revision history for details)
 203       CMSIS-Core(A): 1.1.1 (see revision history for details)
 204       CMSIS-DAP: 2.0.0 (see revision history for details)
 205       CMSIS-NN: 1.0.0
 206         - Initial contribution of the bare metal Neural Network Library.
 207       CMSIS-RTOS2:
 208         - RTX 5.3.0 (see revision history for details)
 209         - OS Tick API 1.0.1
 210     </release>
 211     <release version="5.2.0" date="2017-11-16">
 212       CMSIS-Core(M): 5.1.0 (see revision history for details)
 213         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 214         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 215       CMSIS-Core(A): 1.1.0 (see revision history for details)
 216         - Added compiler_iccarm.h.
 217         - Added additional access functions for physical timer.
 218       CMSIS-DAP: 1.2.0 (see revision history for details)
 219       CMSIS-DSP: 1.5.2 (see revision history for details)
 220       CMSIS-Driver: 2.6.0 (see revision history for details)
 221         - CAN Driver API V1.2.0
 222         - NAND Driver API V2.3.0
 223       CMSIS-RTOS:
 224         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 225       CMSIS-RTOS2:
 226         - API 2.1.2 (see revision history for details)
 227         - RTX 5.2.3 (see revision history for details)
 228       Devices:
 229         - Added GCC startup and linker script for Cortex-A9.
 230         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 231         - Added IAR startup code for Cortex-A9
 232     </release>
 233     <release version="5.1.1" date="2017-09-19">
 234       CMSIS-RTOS2:
 235       - RTX 5.2.1 (see revision history for details)
 236     </release>
 237     <release version="5.1.0" date="2017-08-04">
 238       CMSIS-Core(M): 5.0.2 (see revision history for details)
 239       - Changed Version Control macros to be core agnostic.
 240       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 241       CMSIS-Core(A): 1.0.0 (see revision history for details)
 242       - Initial release
 243       - IRQ Controller API 1.0.0
 244       CMSIS-Driver: 2.05 (see revision history for details)
 245       - All typedefs related to status have been made volatile.
 246       CMSIS-RTOS2:
 247       - API 2.1.1 (see revision history for details)
 248       - RTX 5.2.0 (see revision history for details)
 249       - OS Tick API 1.0.0
 250       CMSIS-DSP: 1.5.2 (see revision history for details)
 251       - Fixed GNU Compiler specific diagnostics.
 252       CMSIS-Pack: 1.5.0 (see revision history for details)
 253       - added System Description File (*.SDF) Format
 254       CMSIS-Zone: 0.0.1 (Preview)
 255       - Initial specification draft
 256     </release>
 257     <release version="5.0.1" date="2017-02-03">
 258       Package Description:
 259       - added taxonomy for Cclass RTOS
 260       CMSIS-RTOS2:
 261       - API 2.1   (see revision history for details)
 262       - RTX 5.1.0 (see revision history for details)
 263       CMSIS-Core: 5.0.1 (see revision history for details)
 264       - Added __PACKED_STRUCT macro
 265       - Added uVisior support
 266       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 267       - Updated template for secure main function (main_s.c)
 268       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 269       CMSIS-DSP: 1.5.1 (see revision history for details)
 270       - added ARMv8M DSP libraries.
 271       CMSIS-Pack:1.4.9 (see revision history for details)
 272       - added Pack Index File specification and schema file
 273     </release>
 274     <release version="5.0.0" date="2016-11-11">
 275       Changed open source license to Apache 2.0
 276       CMSIS_Core:
 277        - Added support for Cortex-M23 and Cortex-M33.
 278        - Added ARMv8-M device configurations for mainline and baseline.
 279        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 280        - Added cmsis_compiler.h to unify compiler behaviour.
 281        - Updated function SCB_EnableICache (for Cortex-M7).
 282        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 283       CMSIS-RTOS:
 284         - bug fix in RTX 4.82 (see revision history for details)
 285       CMSIS-RTOS2:
 286         - new API including compatibility layer to CMSIS-RTOS
 287         - reference implementation based on RTX5
 288         - supports all Cortex-M variants including TrustZone for ARMv8-M
 289       CMSIS-SVD:
 290        - reworked SVD format documentation
 291        - removed SVD file database documentation as SVD files are distributed in packs
 292        - updated SVDConv for Win32 and Linux
 293       CMSIS-DSP:
 294        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 295        - Added DSP libraries build projects to CMSIS pack.
 296     </release>
 297     <release version="4.5.0" date="2015-10-28">
 298       - CMSIS-Core     4.30.0  (see revision history for details)
 299       - CMSIS-DAP      1.1.0   (unchanged)
 300       - CMSIS-Driver   2.04.0  (see revision history for details)
 301       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 302       - CMSIS-Pack     1.4.1   (see revision history for details)
 303       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 304       - CMSIS-SVD      1.3.1   (see revision history for details)
 305     </release>
 306     <release version="4.4.0" date="2015-09-11">
 307       - CMSIS-Core     4.20   (see revision history for details)
 308       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 309       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 310       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 311       - CMSIS-RTOS
 312         -- API         1.02   (unchanged)
 313         -- RTX         4.79   (see revision history for details)
 314       - CMSIS-SVD      1.3.0  (see revision history for details)
 315       - CMSIS-DAP      1.1.0  (extended with SWO support)
 316     </release>
 317     <release version="4.3.0" date="2015-03-20">
 318       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 319       - CMSIS-DSP      1.4.5  (see revision history for details)
 320       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 321       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 322       - CMSIS-RTOS
 323         -- API         1.02   (unchanged)
 324         -- RTX         4.78   (see revision history for details)
 325       - CMSIS-SVD      1.2    (unchanged)
 326     </release>
 327     <release version="4.2.0" date="2014-09-24">
 328       Adding Cortex-M7 support
 329       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 330       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 331       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 332       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 333       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 334     </release>
 335     <release version="4.1.1" date="2014-06-30">
 336       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 337     </release>
 338     <release version="4.1.0" date="2014-06-12">
 339       - CMSIS-Driver   2.02  (incompatible update)
 340       - CMSIS-Pack     1.3   (see revision history for details)
 341       - CMSIS-DSP      1.4.2 (unchanged)
 342       - CMSIS-Core     3.30  (unchanged)
 343       - CMSIS-RTOS RTX 4.74  (unchanged)
 344       - CMSIS-RTOS API 1.02  (unchanged)
 345       - CMSIS-SVD      1.10  (unchanged)
 346       PACK:
 347       - removed G++ specific files from PACK
 348       - added Component Startup variant "C Startup"
 349       - added Pack Checking Utility
 350       - updated conditions to reflect tool-chain dependency
 351       - added Taxonomy for Graphics
 352       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 353     </release>
 354     <!-- release version="4.0.0">
 355       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 356       - CMSIS-Pack     1.1   Preliminary
 357       - CMSIS-DSP      1.4.2 (see revision history for details)
 358       - CMSIS-Core     3.30  (see revision history for details)
 359       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 360       - CMSIS-RTOS API 1.02  (unchanged)
 361       - CMSIS-SVD      1.10  (unchanged)
 362     </release -->
 363     <release version="3.20.4" date="2014-02-20">
 364       - CMSIS-RTOS 4.74 (see revision history for details)
 365       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 366     </release>
 367     <!-- release version="3.20.3">
 368       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 369       - CMSIS-RTOS 4.73 (see revision history for details)
 370     </release -->
 371     <!-- release version="3.20.2">
 372       - CMSIS-Pack documentation has been added
 373       - CMSIS-Drivers header and documentation have been added to PACK
 374       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 375     </release -->
 376     <!-- release version="3.20.1">
 377       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 378       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 379     </release -->
 380     <!-- release version="3.20.0">
 381       The software portions that are deployed in the application program are now under a BSD license which allows usage
 382       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 383       The individual components have been update as listed below:
 384       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 385       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 386       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 387       - CMSIS-SVD is unchanged.
 388     </release -->
 389   </releases>
 390
 391   <taxonomy>
 392     <description Cclass="Audio">Software components for audio processing</description>
 393     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 394     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 395     <description Cclass="Compiler">Compiler Software Extensions</description>
 396     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 397     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 398     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 399     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 400     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 401     <description Cclass="File System">File Drive Support and File System</description>
 402     <description Cclass="IoT Client">IoT cloud client connector</description>
 403     <description Cclass="IoT Service">IoT specific services</description>
 404     <description Cclass="IoT Utility">IoT specific software utility</description>
 405     <description Cclass="Graphics">Graphical User Interface</description>
 406     <description Cclass="Network">Network Stack using Internet Protocols</description>
 407     <description Cclass="RTOS">Real-time Operating System</description>
 408     <description Cclass="Security">Encryption for secure communication or storage</description>
 409     <description Cclass="USB">Universal Serial Bus Stack</description>
 410     <description Cclass="Utility">Generic software utility components</description>
 411   </taxonomy>
 412
 413   <devices>
 414     <!-- ******************************  Cortex-M0  ****************************** -->
 415     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 416       <book name="https://developer.arm.com/documentation/dui0497" title="Cortex-M0 Processor Devices Generic Users Guide"/>
 417       <description>
 418 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 419 - simple, easy-to-use programmers model
 420 - highly efficient ultra-low power operation
 421 - excellent code density
 422 - deterministic, high-performance interrupt handling
 423 - upward compatibility with the rest of the Cortex-M processor family.
 424       </description>
 425       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 426       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 427       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 428       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 429
 430       <device Dname="ARMCM0">
 431         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 432         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 433       </device>
 434     </family>
 435
 436     <!-- ******************************  Cortex-M0P  ****************************** -->
 437     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 438       <book name="https://developer.arm.com/documentation/dui0662" title="Cortex-M0+ Processor Devices Generic Users Guide"/>
 439       <description>
 440 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 441 - simple, easy-to-use programmers model
 442 - highly efficient ultra-low power operation
 443 - excellent code density
 444 - deterministic, high-performance interrupt handling
 445 - upward compatibility with the rest of the Cortex-M processor family.
 446       </description>
 447       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 448       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 449       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 450       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 451
 452       <device Dname="ARMCM0P">
 453         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 454         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 455       </device>
 456
 457       <device Dname="ARMCM0P_MPU">
 458         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 459         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 460       </device>
 461     </family>
 462
 463     <!-- ******************************  Cortex-M1  ****************************** -->
 464     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 465       <!--book name="https://developer.arm.com/documentation/dui0497" title="Cortex-M0 Processor Devices Generic Users Guide"/-->
 466       <description>
 467 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 468 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 469       </description>
 470       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 471       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 472       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 473       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 474
 475       <device Dname="ARMCM1">
 476         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 477         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 478       </device>
 479     </family>
 480
 481     <!-- ******************************  Cortex-M3  ****************************** -->
 482     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 483       <book name="https://developer.arm.com/documentation/dui0552" title="Cortex-M3 Processor Devices Generic Users Guide"/>
 484       <description>
 485 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 486 - simple, easy-to-use programmers model
 487 - highly efficient ultra-low power operation
 488 - excellent code density
 489 - deterministic, high-performance interrupt handling
 490 - upward compatibility with the rest of the Cortex-M processor family.
 491       </description>
 492       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 493       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 494       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 495       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 496
 497       <device Dname="ARMCM3">
 498         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 499         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 500       </device>
 501     </family>
 502
 503     <!-- ******************************  Cortex-M4  ****************************** -->
 504     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 505       <book name="https://developer.arm.com/documentation/dui0553" title="Cortex-M4 Processor Devices Generic Users Guide"/>
 506       <description>
 507 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 508 - simple, easy-to-use programmers model
 509 - highly efficient ultra-low power operation
 510 - excellent code density
 511 - deterministic, high-performance interrupt handling
 512 - upward compatibility with the rest of the Cortex-M processor family.
 513       </description>
 514       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 515       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 516       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 517       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 518
 519       <device Dname="ARMCM4">
 520         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 521         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 522       </device>
 523
 524       <device Dname="ARMCM4_FP">
 525         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 526         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 527       </device>
 528     </family>
 529
 530     <!-- ******************************  Cortex-M7  ****************************** -->
 531     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 532       <book name="https://developer.arm.com/documentation/dui0646" title="Cortex-M7 Processor Devices Generic Users Guide"/>
 533       <description>
 534 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 535 - simple, easy-to-use programmers model
 536 - highly efficient ultra-low power operation
 537 - excellent code density
 538 - deterministic, high-performance interrupt handling
 539 - upward compatibility with the rest of the Cortex-M processor family.
 540       </description>
 541       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 542       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 543       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 544       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 545
 546       <device Dname="ARMCM7">
 547         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 548         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 549       </device>
 550
 551       <device Dname="ARMCM7_SP">
 552         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 553         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 554       </device>
 555
 556       <device Dname="ARMCM7_DP">
 557         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 558         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 559       </device>
 560     </family>
 561
 562     <!-- ******************************  Cortex-M23  ********************** -->
 563     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 564       <book name="https://developer.arm.com/documentation/dui1095"       title="Cortex-M23 Processor Devices Generic Users Guide"/>
 565       <description>
 566 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 567 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 568 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 569       </description>
 570       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 571       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 572       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 573       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 574       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 575       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 576
 577       <device Dname="ARMCM23">
 578         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 579         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 580       </device>
 581
 582       <device Dname="ARMCM23_TZ">
 583         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 584         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 585       </device>
 586     </family>
 587
 588     <!-- ******************************  Cortex-M33  ****************************** -->
 589     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 590       <book name="https://developer.arm.com/documentation/100235"       title="Cortex-M33 Processor Devices Generic Users Guide"/>
 591       <description>
 592 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 593 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 594       </description>
 595       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 596       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 597       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 598       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 599       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 600       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 601
 602       <device Dname="ARMCM33">
 603         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 604         <description>
 605           no DSP Instructions, no Floating Point Unit, no TrustZone
 606         </description>
 607         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 608       </device>
 609
 610       <device Dname="ARMCM33_TZ">
 611         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 612         <description>
 613           no DSP Instructions, no Floating Point Unit, TrustZone
 614         </description>
 615         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 616       </device>
 617
 618       <device Dname="ARMCM33_DSP_FP">
 619         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 620         <description>
 621           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 622         </description>
 623         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 624       </device>
 625
 626       <device Dname="ARMCM33_DSP_FP_TZ">
 627         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 628         <description>
 629           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 630         </description>
 631         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 632       </device>
 633     </family>
 634
 635     <!-- ******************************  Cortex-M35P  ****************************** -->
 636     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 637       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 638       <description>
 639 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 640 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 641       </description>
 642
 643       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 644       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 645       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 646       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 647       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 648       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 649
 650       <device Dname="ARMCM35P">
 651         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 652         <description>
 653           no DSP Instructions, no Floating Point Unit, no TrustZone
 654         </description>
 655         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 656       </device>
 657
 658       <device Dname="ARMCM35P_TZ">
 659         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 660         <description>
 661           no DSP Instructions, no Floating Point Unit, TrustZone
 662         </description>
 663         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 664       </device>
 665
 666       <device Dname="ARMCM35P_DSP_FP">
 667         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 668         <description>
 669           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 670         </description>
 671         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 672       </device>
 673
 674       <device Dname="ARMCM35P_DSP_FP_TZ">
 675         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 676         <description>
 677           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 678         </description>
 679         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 680       </device>
 681     </family>
 682
 683     <!-- ******************************  Cortex-M55  ****************************** -->
 684     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 685       <book name="https://developer.arm.com/documentation/101273"       title="Cortex-M55 Processor Devices Generic Users Guide"/>
 686       <description>
 687 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 688 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 689 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 690       </description>
 691
 692       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 693       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 694       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 695       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 696       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 697       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 698
 699       <device Dname="ARMCM55">
 700         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 701         <description>
 702           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 703         </description>
 704         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 705       </device>
 706     </family>
 707
 708     <!-- ******************************  Cortex-M85  ****************************** -->
 709     <family Dfamily="ARM Cortex M85" Dvendor="ARM:82">
 710       <book name="https://developer.arm.com/documentation/1019283"       title="Cortex-M85 Processor Devices Generic Users Guide"/>
 711       <description>
 712 The Arm Cortex-M85 processor is a fully synthesizable high-performance microcontroller class processor that implements the Armv8.1-M Mainline architecture which includes support for the M-profile Vector Extension (MVE).
 713 The processor also supports previous Armv8-M architectural features.
 714 The design is focused on compute applications such as Digital Signal Processing (DSP) and machine learning.
 715 The Arm Cortex-M85 processor is energy efficient and achieves high compute performance across scalar and vector operations while maintaining low power consumption.
 716       </description>
 717
 718       <!-- debug svd="Device/ARM/SVD/ARMCM85.svd"/ SVD files do not contain any peripheral -->
 719       <memory name="ROM_NS" access="rxn"  start="0x00000000" size="0x00200000" startup="1" default="1" alias="ROM_S"/>
 720       <memory name="RAM_NS" access="rwxn" start="0x20000000" size="0x00020000" init   ="0" default="1" alias="RAM_S"/>
 721       <memory name="ROM_S"  access="rxn"  start="0x10000000" size="0x00200000" startup="1" default="1"/>
 722       <memory name="RAM_S"  access="rwxn" start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 723       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 724
 725       <device Dname="ARMCM85">
 726         <processor Dcore="Cortex-M85" DcoreVersion="r0p0" Dpacbti="PACBTI" Dmpu="MPU" Dfpu="DP_FPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 727         <description>
 728           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone, PACBTI
 729         </description>
 730         <compile header="Device/ARM/ARMCM85/Include/ARMCM85.h" define="ARMCM85"/>
 731       </device>
 732     </family>
 733
 734     <!-- ******************************  ARMSC000  ****************************** -->
 735     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 736       <description>
 737 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 738 - simple, easy-to-use programmers model
 739 - highly efficient ultra-low power operation
 740 - excellent code density
 741 - deterministic, high-performance interrupt handling
 742       </description>
 743       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 744       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 745       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 746       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 747
 748       <device Dname="ARMSC000">
 749         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 750         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 751       </device>
 752     </family>
 753
 754     <!-- ******************************  ARMSC300  ****************************** -->
 755     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 756       <description>
 757 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 758 - simple, easy-to-use programmers model
 759 - highly efficient ultra-low power operation
 760 - excellent code density
 761 - deterministic, high-performance interrupt handling
 762       </description>
 763       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 764       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 765       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 766       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 767
 768       <device Dname="ARMSC300">
 769         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 770         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 771       </device>
 772     </family>
 773
 774     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 775     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 776       <book name="https://developer.arm.com/documentation/ddi0553"       title="Armv8-M Architecture Reference Manual"/>
 777       <description>
 778 Armv8-M Baseline based device with TrustZone
 779       </description>
 780       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 781       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 782       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 783       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 784       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 785       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 786
 787       <device Dname="ARMv8MBL">
 788         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 789         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 790       </device>
 791     </family>
 792
 793     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 794     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 795       <book name="https://developer.arm.com/documentation/ddi0553"       title="Armv8-M Architecture Reference Manual"/>
 796       <description>
 797 Armv8-M Mainline based device with TrustZone
 798       </description>
 799       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 800       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 801       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 802       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 803       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 804       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 805
 806       <device Dname="ARMv8MML">
 807         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 808         <description>
 809           no DSP Instructions, no Floating Point Unit, TrustZone
 810         </description>
 811         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 812       </device>
 813
 814       <device Dname="ARMv8MML_DSP">
 815         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 816         <description>
 817           DSP Instructions, no Floating Point Unit, TrustZone
 818         </description>
 819         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 820       </device>
 821
 822       <device Dname="ARMv8MML_SP">
 823         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 824         <description>
 825           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 826         </description>
 827         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 828       </device>
 829
 830       <device Dname="ARMv8MML_DSP_SP">
 831         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 832         <description>
 833           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 834         </description>
 835         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 836       </device>
 837
 838       <device Dname="ARMv8MML_DP">
 839         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 840         <description>
 841           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 842         </description>
 843         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 844       </device>
 845
 846       <device Dname="ARMv8MML_DSP_DP">
 847         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 848         <description>
 849           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 850         </description>
 851         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 852       </device>
 853     </family>
 854
 855     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 856     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 857       <book name="https://developer.arm.com/documentation/ddi0553"       title="Armv8-M Architecture Reference Manual"/>
 858       <description>
 859 Armv8.1-M Mainline based device with TrustZone and MVE
 860       </description>
 861       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 862       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 863       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 864       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 865       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 866       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 867
 868
 869       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 870         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 871         <description>
 872           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 873         </description>
 874         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 875       </device>
 876     </family>
 877
 878     <!-- ******************************  Cortex-A5  ****************************** -->
 879     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 880       <book name="https://developer.arm.com/documentation/ddi0433" title="Cortex-A5 Technical Reference Manual"/>
 881       <description>
 882 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 883 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 884 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 885       </description>
 886
 887       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 888       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 889       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 890       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 891
 892       <device Dname="ARMCA5">
 893         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 894         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 895       </device>
 896     </family>
 897
 898     <!-- ******************************  Cortex-A7  ****************************** -->
 899     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 900       <book name="https://developer.arm.com/documentation/ddi0464" title="Cortex-A7 MPCore Technical Reference Manual"/>
 901       <description>
 902 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 903 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 904 an optional integrated GIC, and an optional L2 cache controller.
 905       </description>
 906
 907       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 908       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 909       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 910       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 911
 912       <device Dname="ARMCA7">
 913         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 914         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 915       </device>
 916     </family>
 917
 918     <!-- ******************************  Cortex-A9  ****************************** -->
 919     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 920       <book name="https://developer.arm.com/documentation/100511" title="Cortex-A9 Technical Reference Manual"/>
 921       <description>
 922 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 923 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 924 and 8-bit Java bytecodes in Jazelle state.
 925       </description>
 926
 927       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 928       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 929       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 930       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 931
 932       <device Dname="ARMCA9">
 933         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 934         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 935       </device>
 936     </family>
 937   </devices>
 938
 939
 940   <apis>
 941     <!-- CMSIS Device API -->
 942     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 943       <description>Device interrupt controller interface</description>
 944       <files>
 945         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 946       </files>
 947     </api>
 948     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 949       <description>RTOS Kernel system tick timer interface</description>
 950       <files>
 951         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 952       </files>
 953     </api>
 954     <!-- CMSIS-RTOS API -->
 955     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 956       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 957       <files>
 958         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 959       </files>
 960     </api>
 961     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 962       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 963       <files>
 964         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 965         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 966       </files>
 967     </api>
 968     <!-- CMSIS Driver API -->
 969     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 970       <description>USART Driver API for Cortex-M</description>
 971       <files>
 972         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 973         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 974       </files>
 975     </api>
 976     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 977       <description>SPI Driver API for Cortex-M</description>
 978       <files>
 979         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 980         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 981       </files>
 982     </api>
 983     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 984       <description>SAI Driver API for Cortex-M</description>
 985       <files>
 986         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 987         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 988       </files>
 989     </api>
 990     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 991       <description>I2C Driver API for Cortex-M</description>
 992       <files>
 993         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 994         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 995       </files>
 996     </api>
 997     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 998       <description>CAN Driver API for Cortex-M</description>
 999       <files>
1000         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
1001         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
1002       </files>
1003     </api>
1004     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
1005       <description>Flash Driver API for Cortex-M</description>
1006       <files>
1007         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
1008         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
1009       </files>
1010     </api>
1011     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
1012       <description>MCI Driver API for Cortex-M</description>
1013       <files>
1014         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
1015         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
1016       </files>
1017     </api>
1018     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
1019       <description>NAND Flash Driver API for Cortex-M</description>
1020       <files>
1021         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
1022         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
1023       </files>
1024     </api>
1025     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
1026       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
1027       <files>
1028         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
1029         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
1030         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
1031       </files>
1032     </api>
1033     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
1034       <description>Ethernet MAC Driver API for Cortex-M</description>
1035       <files>
1036         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
1037         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
1038       </files>
1039     </api>
1040     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
1041       <description>Ethernet PHY Driver API for Cortex-M</description>
1042       <files>
1043         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
1044         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
1045       </files>
1046     </api>
1047     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
1048       <description>USB Device Driver API for Cortex-M</description>
1049       <files>
1050         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
1051         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
1052       </files>
1053     </api>
1054     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
1055       <description>USB Host Driver API for Cortex-M</description>
1056       <files>
1057         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
1058         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
1059       </files>
1060     </api>
1061     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
1062       <description>WiFi driver</description>
1063       <files>
1064         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
1065         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
1066       </files>
1067     </api>
1068     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
1069       <description>Virtual I/O</description>
1070       <files>
1071         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
1072         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
1073         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
1074       </files>
1075     </api>
1076   </apis>
1077
1078   <!-- conditions are dependency rules that can apply to a component or an individual file -->
1079   <conditions>
1080     <!-- compiler -->
1081     <condition id="ARMCC6">
1082       <accept Tcompiler="ARMCC" Toptions="AC6"/>
1083       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1084     </condition>
1085     <condition id="ARMCC5">
1086       <require Tcompiler="ARMCC" Toptions="AC5"/>
1087     </condition>
1088     <condition id="ARMCC">
1089       <require Tcompiler="ARMCC"/>
1090     </condition>
1091     <condition id="GCC">
1092       <require Tcompiler="GCC"/>
1093     </condition>
1094     <condition id="IAR">
1095       <require Tcompiler="IAR"/>
1096     </condition>
1097     <condition id="ARMCC GCC">
1098       <accept Tcompiler="ARMCC"/>
1099       <accept Tcompiler="GCC"/>
1100     </condition>
1101     <condition id="ARMCC GCC IAR">
1102       <accept Tcompiler="ARMCC"/>
1103       <accept Tcompiler="GCC"/>
1104       <accept Tcompiler="IAR"/>
1105     </condition>
1106
1107     <!-- Arm architecture -->
1108     <condition id="ARMv6-M Device">
1109       <description>Armv6-M architecture based device</description>
1110       <accept Dcore="Cortex-M0"/>
1111       <accept Dcore="Cortex-M1"/>
1112       <accept Dcore="Cortex-M0+"/>
1113       <accept Dcore="SC000"/>
1114     </condition>
1115     <condition id="ARMv7-M Device">
1116       <description>Armv7-M architecture based device</description>
1117       <accept Dcore="Cortex-M3"/>
1118       <accept Dcore="Cortex-M4"/>
1119       <accept Dcore="Cortex-M7"/>
1120       <accept Dcore="SC300"/>
1121     </condition>
1122     <condition id="ARMv8-MBL Device">
1123       <description>Armv8-M base line architecture based device</description>
1124       <accept Dcore="ARMV8MBL"/>
1125       <accept Dcore="Cortex-M23"/>
1126     </condition>
1127     <condition id="ARMv8-MML Device">
1128       <description>Armv8-M main line architecture based device</description>
1129       <accept Dcore="ARMV8MML"/>
1130       <accept Dcore="Cortex-M33"/>
1131       <accept Dcore="Cortex-M35P"/>
1132       <accept Dcore="Star-MC1"/>
1133     </condition>
1134     <condition id="ARMv81-MML Device">
1135       <description>Armv8.1-M main line architecture based device</description>
1136       <accept Dcore="ARMV81MML"/>
1137       <accept Dcore="Cortex-M55"/>
1138       <accept Dcore="Cortex-M85"/>
1139     </condition>
1140     <condition id="ARMv8x-MML Device">
1141       <description>Armv8-M/Armv8.1-M architecture based device</description>
1142       <accept condition="ARMv8-MML Device"/>
1143       <accept condition="ARMv81-MML Device"/>
1144     </condition>
1145     <condition id="ARMv8-M Device">
1146       <description>Armv8-M architecture based device</description>
1147       <accept condition="ARMv8-MBL Device"/>
1148       <accept condition="ARMv8-MML Device"/>
1149       <accept condition="ARMv81-MML Device"/>
1150     </condition>
1151     <condition id="ARMv6_7-M Device">
1152       <description>Armv6_7-M architecture based device</description>
1153       <accept condition="ARMv6-M Device"/>
1154       <accept condition="ARMv7-M Device"/>
1155     </condition>
1156     <condition id="ARMv6_7_8-M Device">
1157       <description>Armv6_7_8-M architecture based device</description>
1158       <accept condition="ARMv6-M Device"/>
1159       <accept condition="ARMv7-M Device"/>
1160       <accept condition="ARMv8-M Device"/>
1161     </condition>
1162     <condition id="ARMv7-A Device">
1163       <description>Armv7-A architecture based device</description>
1164       <accept Dcore="Cortex-A5"/>
1165       <accept Dcore="Cortex-A7"/>
1166       <accept Dcore="Cortex-A9"/>
1167     </condition>
1168
1169     <condition id="TrustZone">
1170       <description>TrustZone</description>
1171       <require Dtz="TZ"/>
1172     </condition>
1173     <condition id="TZ Secure">
1174       <description>TrustZone (Secure)</description>
1175       <require Dtz="TZ"/>
1176       <require Dsecure="Secure"/>
1177     </condition>
1178     <condition id="TZ Non-secure">
1179       <description>TrustZone (Non-secure)</description>
1180       <require Dtz="TZ"/>
1181       <accept Dsecure="Non-secure"/>
1182       <accept Dsecure="TZ-disabled"/>
1183     </condition>
1184
1185     <!-- Startup -->
1186     <condition id="Startup ARMCC6 Secure">
1187       <description>Startup files for Arm Compiler 6 targeting TrustZone secure mode</description>
1188       <require condition="ARMCC6"/>
1189       <require condition="TZ Secure"/>
1190     </condition>
1191     <condition id="Startup ARMCC6 Unsecure">
1192       <description>Startup files for Arm Compiler 6 targeting non-TrustZone or TrustZone non-secure mode</description>
1193       <require condition="ARMCC6"/>
1194       <deny condition="TZ Secure"/>
1195     </condition>
1196
1197     <!-- CMSIS-Core -->
1198     <condition id="ARMCM0 CMSIS">
1199       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
1200       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1201       <require Cclass="CMSIS" Cgroup="CORE"/>
1202     </condition>
1203
1204     <condition id="ARMCM0+ CMSIS">
1205       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
1206       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1207       <require Cclass="CMSIS" Cgroup="CORE"/>
1208     </condition>
1209
1210     <condition id="ARMCM1 CMSIS">
1211       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
1212       <require Dvendor="ARM:82" Dname="ARMCM1"/>
1213       <require Cclass="CMSIS" Cgroup="CORE"/>
1214     </condition>
1215
1216     <condition id="ARMCM3 CMSIS">
1217       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
1218       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1219       <require Cclass="CMSIS" Cgroup="CORE"/>
1220     </condition>
1221
1222     <condition id="ARMCM4 CMSIS">
1223       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
1224       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1225       <require Cclass="CMSIS" Cgroup="CORE"/>
1226     </condition>
1227
1228     <condition id="ARMCM7 CMSIS">
1229       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
1230       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1231       <require Cclass="CMSIS" Cgroup="CORE"/>
1232     </condition>
1233
1234     <condition id="ARMCM23 CMSIS">
1235       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
1236       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1237       <require Cclass="CMSIS" Cgroup="CORE"/>
1238     </condition>
1239
1240     <condition id="ARMCM33 CMSIS">
1241       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
1242       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1243       <require Cclass="CMSIS" Cgroup="CORE"/>
1244     </condition>
1245
1246     <condition id="ARMCM35P CMSIS">
1247       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
1248       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
1249       <require Cclass="CMSIS" Cgroup="CORE"/>
1250     </condition>
1251
1252     <condition id="ARMCM55 CMSIS">
1253       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
1254       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
1255       <require Cclass="CMSIS" Cgroup="CORE"/>
1256     </condition>
1257
1258     <condition id="ARMCM85 CMSIS">
1259       <description>Generic Arm Cortex-M85 device startup and depends on CMSIS Core</description>
1260       <require Dvendor="ARM:82" Dname="ARMCM85*"/>
1261       <require Cclass="CMSIS" Cgroup="CORE"/>
1262     </condition>
1263
1264     <condition id="ARMSC000 CMSIS">
1265       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
1266       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1267       <require Cclass="CMSIS" Cgroup="CORE"/>
1268     </condition>
1269
1270     <condition id="ARMSC300 CMSIS">
1271       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
1272       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1273       <require Cclass="CMSIS" Cgroup="CORE"/>
1274     </condition>
1275
1276     <condition id="ARMv8MBL CMSIS">
1277       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
1278       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1279       <require Cclass="CMSIS" Cgroup="CORE"/>
1280     </condition>
1281
1282     <condition id="ARMv8MML CMSIS">
1283       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
1284       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1285       <require Cclass="CMSIS" Cgroup="CORE"/>
1286     </condition>
1287
1288     <condition id="ARMv81MML CMSIS">
1289       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
1290       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
1291       <require Cclass="CMSIS" Cgroup="CORE"/>
1292     </condition>
1293
1294     <condition id="ARMCA5 CMSIS">
1295       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
1296       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1297       <require Cclass="CMSIS" Cgroup="CORE"/>
1298     </condition>
1299
1300     <condition id="ARMCA7 CMSIS">
1301       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
1302       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1303       <require Cclass="CMSIS" Cgroup="CORE"/>
1304     </condition>
1305
1306     <condition id="ARMCA9 CMSIS">
1307       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
1308       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1309       <require Cclass="CMSIS" Cgroup="CORE"/>
1310     </condition>
1311
1312     <!-- RTOS RTX -->
1313     <condition id="RTOS RTX">
1314       <description>Components required for RTOS RTX</description>
1315       <require condition="ARMv6_7-M Device"/>
1316       <require condition="ARMCC GCC IAR"/>
1317       <require Cclass="Device" Cgroup="Startup"/>
1318       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1319     </condition>
1320     <condition id="RTOS RTX IFX">
1321       <description>Components required for RTOS RTX IFX</description>
1322       <require condition="ARMv6_7-M Device"/>
1323       <require condition="ARMCC GCC IAR"/>
1324       <require Dvendor="Infineon:7" Dname="XMC4*"/>
1325       <require Cclass="Device" Cgroup="Startup"/>
1326       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1327     </condition>
1328     <condition id="RTOS RTX5">
1329       <description>Components required for RTOS RTX5</description>
1330       <require condition="ARMv6_7_8-M Device"/>
1331       <require condition="ARMCC GCC IAR"/>
1332       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1333     </condition>
1334     <condition id="RTOS2 RTX5">
1335       <description>Components required for RTOS2 RTX5</description>
1336       <require condition="ARMv6_7_8-M Device"/>
1337       <require condition="ARMCC GCC IAR"/>
1338       <require Cclass="CMSIS"  Cgroup="CORE"/>
1339       <require Cclass="Device" Cgroup="Startup"/>
1340     </condition>
1341     <condition id="RTOS2 RTX5 v7-A">
1342       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
1343       <require condition="ARMv7-A Device"/>
1344       <require condition="ARMCC GCC IAR"/>
1345       <require Cclass="CMSIS"  Cgroup="CORE"/>
1346       <require Cclass="Device" Cgroup="Startup"/>
1347       <require Cclass="Device" Cgroup="OS Tick"/>
1348       <require Cclass="Device" Cgroup="IRQ Controller"/>
1349     </condition>
1350     <condition id="RTOS2 RTX5 NS">
1351       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1352       <require condition="ARMv8-M Device"/>
1353       <require condition="TZ Non-secure"/>
1354       <require condition="ARMCC GCC IAR"/>
1355       <require Cclass="CMSIS"  Cgroup="CORE"/>
1356       <require Cclass="Device" Cgroup="Startup"/>
1357     </condition>
1358
1359     <condition id="ARMCC ARMv6-M LE">
1360         <description>Arm Compiler for Armv6-M architecture (little endian)</description>
1361         <require condition="ARMCC"/>
1362         <require condition="ARMv6-M Device"/>
1363         <require Dendian="Little-endian"/>
1364     </condition>
1365     <condition id="ARMCC ARMv6-M BE">
1366         <description>Arm Compiler for Armv6-M architecture (big endian)</description>
1367         <require condition="ARMCC"/>
1368         <require condition="ARMv6-M Device"/>
1369         <require Dendian="Big-endian"/>
1370     </condition>
1371     <condition id="ARMCC ARMv7-M NOFP LE">
1372         <description>Arm Compiler for Armv7-M architecture without FPU (little endian)</description>
1373         <require condition="ARMCC"/>
1374         <require condition="ARMv7-M Device"/>
1375         <require Dendian="Little-endian"/>
1376         <require Dfpu="NO_FPU"/>
1377     </condition>
1378     <condition id="ARMCC ARMv7-M NOFP BE">
1379         <description>Arm Compiler for Armv7-M architecture without FPU (big endian)</description>
1380         <require condition="ARMCC"/>
1381         <require condition="ARMv7-M Device"/>
1382         <require Dendian="Big-endian"/>
1383         <require Dfpu="NO_FPU"/>
1384     </condition>
1385     <condition id="ARMCC ARMv7-M FP LE">
1386         <description>Arm Compiler for Armv7-M architecture with FPU (little endian)</description>
1387         <require condition="ARMCC"/>
1388         <require condition="ARMv7-M Device"/>
1389         <require Dendian="Little-endian"/>
1390         <accept Dfpu="SP_FPU"/>
1391         <accept Dfpu="DP_FPU"/>
1392     </condition>
1393     <condition id="ARMCC ARMv7-M FP BE">
1394         <description>Arm Compiler for Armv7-M architecture with FPU (big endian)</description>
1395         <require condition="ARMCC"/>
1396         <require condition="ARMv7-M Device"/>
1397         <require Dendian="Big-endian"/>
1398         <accept Dfpu="SP_FPU"/>
1399         <accept Dfpu="DP_FPU"/>
1400     </condition>
1401     <condition id="ARMCC ARMv8-MBL LE">
1402         <description>Arm Compiler for Armv8-M base line architecture (little endian)</description>
1403         <require condition="ARMCC"/>
1404         <require condition="ARMv8-MBL Device"/>
1405         <require Dendian="Little-endian"/>
1406     </condition>
1407     <condition id="ARMCC ARMv8-MML NOFP LE">
1408         <description>Arm Compiler for Armv8-M/Armv8.1-M main line architecture without FPU/MVE (little endian)</description>
1409         <require condition="ARMCC"/>
1410         <require condition="ARMv8x-MML Device"/>
1411         <require Dendian="Little-endian"/>
1412         <require Dfpu="NO_FPU"/>
1413         <require Dmve="NO_MVE"/>
1414     </condition>
1415      <condition id="ARMCC ARMv8-MML FP LE">
1416         <description>Arm Compiler for Armv8-M/Armv8.1-M main line architecture with FPU/MVE (little endian)</description>
1417         <require condition="ARMCC"/>
1418         <require condition="ARMv8x-MML Device"/>
1419         <require Dendian="Little-endian"/>
1420         <accept Dfpu="SP_FPU"/>
1421         <accept Dfpu="DP_FPU"/>
1422         <accept Dmve="MVE"/>
1423         <accept Dmve="FP_MVE"/>
1424     </condition>
1425
1426     <condition id="GCC ARMv6-M LE">
1427         <description>GNU Compiler for Armv6-M architecture (little endian)</description>
1428         <require condition="GCC"/>
1429         <require condition="ARMv6-M Device"/>
1430         <require Dendian="Little-endian"/>
1431     </condition>
1432     <condition id="GCC ARMv6-M BE">
1433         <description>GNU Compiler for Armv6-M architecture (big endian)</description>
1434         <require condition="GCC"/>
1435         <require condition="ARMv6-M Device"/>
1436         <require Dendian="Big-endian"/>
1437     </condition>
1438     <condition id="GCC ARMv7-M NOFP LE">
1439         <description>GNU Compiler for Armv7-M architecture without FPU (little endian)</description>
1440         <require condition="GCC"/>
1441         <require condition="ARMv7-M Device"/>
1442         <require Dendian="Little-endian"/>
1443         <require Dfpu="NO_FPU"/>
1444     </condition>
1445     <condition id="GCC ARMv7-M NOFP BE">
1446         <description>GNU Compiler for Armv7-M architecture without FPU (big endian)</description>
1447         <require condition="GCC"/>
1448         <require condition="ARMv7-M Device"/>
1449         <require Dendian="Big-endian"/>
1450         <require Dfpu="NO_FPU"/>
1451     </condition>
1452     <condition id="GCC ARMv7-M FP LE">
1453         <description>GNU Compiler for Armv7-M architecture with FPU (little endian)</description>
1454         <require condition="GCC"/>
1455         <require condition="ARMv7-M Device"/>
1456         <require Dendian="Little-endian"/>
1457         <accept Dfpu="SP_FPU"/>
1458         <accept Dfpu="DP_FPU"/>
1459     </condition>
1460     <condition id="GCC ARMv7-M FP BE">
1461         <description>GNU Compiler for Armv7-M architecture with FPU (big endian)</description>
1462         <require condition="GCC"/>
1463         <require condition="ARMv7-M Device"/>
1464         <require Dendian="Big-endian"/>
1465         <accept Dfpu="SP_FPU"/>
1466         <accept Dfpu="DP_FPU"/>
1467     </condition>
1468     <condition id="GCC ARMv8-MBL LE">
1469         <description>GNU Compiler for Armv8-M base line architecture (little endian)</description>
1470         <require condition="GCC"/>
1471         <require condition="ARMv8-MBL Device"/>
1472         <require Dendian="Little-endian"/>
1473     </condition>
1474     <condition id="GCC ARMv8-MML NOFP LE">
1475         <description>GNU Compiler for Armv8-M/Armv8.1-M main line architecture without FPU/MVE (little endian)</description>
1476         <require condition="GCC"/>
1477         <require condition="ARMv8x-MML Device"/>
1478         <require Dendian="Little-endian"/>
1479         <require Dfpu="NO_FPU"/>
1480         <require Dmve="NO_MVE"/>
1481     </condition>
1482      <condition id="GCC ARMv8-MML FP LE">
1483         <description>GNU Compiler for Armv8-M/Armv8.1-M main line architecture with FPU/MVE (little endian)</description>
1484         <require condition="GCC"/>
1485         <require condition="ARMv8x-MML Device"/>
1486         <require Dendian="Little-endian"/>
1487         <accept Dfpu="SP_FPU"/>
1488         <accept Dfpu="DP_FPU"/>
1489         <accept Dmve="MVE"/>
1490         <accept Dmve="FP_MVE"/>
1491     </condition>
1492
1493     <condition id="IARCC ARMv6-M LE">
1494         <description>IAR Compiler for Armv6-M architecture (little endian)</description>
1495         <require condition="IAR"/>
1496         <require condition="ARMv6-M Device"/>
1497         <require Dendian="Little-endian"/>
1498     </condition>
1499     <condition id="IARCC ARMv6-M BE">
1500         <description>IAR Compiler for Armv6-M architecture (big endian)</description>
1501         <require condition="IAR"/>
1502         <require condition="ARMv6-M Device"/>
1503         <require Dendian="Big-endian"/>
1504     </condition>
1505     <condition id="IARCC ARMv7-M NOFP LE">
1506         <description>IAR Compiler for Armv7-M architecture without FPU (little endian)</description>
1507         <require condition="IAR"/>
1508         <require condition="ARMv7-M Device"/>
1509         <require Dendian="Little-endian"/>
1510         <require Dfpu="NO_FPU"/>
1511     </condition>
1512     <condition id="IARCC ARMv7-M NOFP BE">
1513         <description>IAR Compiler for Armv7-M architecture without FPU (big endian)</description>
1514         <require condition="IAR"/>
1515         <require condition="ARMv7-M Device"/>
1516         <require Dendian="Big-endian"/>
1517         <require Dfpu="NO_FPU"/>
1518     </condition>
1519     <condition id="IARCC ARMv7-M FP LE">
1520         <description>IAR Compiler for Armv7-M architecture with FPU (little endian)</description>
1521         <require condition="IAR"/>
1522         <require condition="ARMv7-M Device"/>
1523         <require Dendian="Little-endian"/>
1524         <accept Dfpu="SP_FPU"/>
1525         <accept Dfpu="DP_FPU"/>
1526     </condition>
1527     <condition id="IARCC ARMv7-M FP BE">
1528         <description>IAR Compiler for Armv7-M architecture with FPU (big endian)</description>
1529         <require condition="IAR"/>
1530         <require condition="ARMv7-M Device"/>
1531         <require Dendian="Big-endian"/>
1532         <accept Dfpu="SP_FPU"/>
1533         <accept Dfpu="DP_FPU"/>
1534     </condition>
1535     <condition id="IARCC ARMv8-MBL LE">
1536         <description>IAR Compiler for Armv8-M base line architecture (little endian)</description>
1537         <require condition="IAR"/>
1538         <require condition="ARMv8-MBL Device"/>
1539         <require Dendian="Little-endian"/>
1540     </condition>
1541     <condition id="IARCC ARMv8-MML NOFP LE">
1542         <description>IAR Compiler for Armv8-M main line architecture without FPU (little endian)</description>
1543         <require condition="IAR"/>
1544         <require condition="ARMv8-MML Device"/>
1545         <require Dendian="Little-endian"/>
1546         <require Dfpu="NO_FPU"/>
1547     </condition>
1548     <condition id="IARCC ARMv8-MML FP LE">
1549         <description>IAR Compiler for Armv8-M main line architecture with FPU (little endian)</description>
1550         <require condition="IAR"/>
1551         <require condition="ARMv8-MML Device"/>
1552         <require Dendian="Little-endian"/>
1553         <accept Dfpu="SP_FPU"/>
1554         <accept Dfpu="DP_FPU"/>
1555     </condition>
1556     <condition id="IARCC ARMv81-MML NOFP LE">
1557         <description>IAR Compiler for Armv8.1-M main line architecture without FPU/MVE (little endian)</description>
1558         <require condition="IAR"/>
1559         <require condition="ARMv81-MML Device"/>
1560         <require Dendian="Little-endian"/>
1561         <require Dfpu="NO_FPU"/>
1562         <require Dmve="NO_MVE"/>
1563     </condition>
1564      <condition id="IARCC ARMv81-MML FP LE">
1565         <description>IAR Compiler for Armv8.1-M main line architecture with FPU/MVE (little endian)</description>
1566         <require condition="IAR"/>
1567         <require condition="ARMv81-MML Device"/>
1568         <require Dendian="Little-endian"/>
1569         <accept Dfpu="SP_FPU"/>
1570         <accept Dfpu="DP_FPU"/>
1571         <accept Dmve="MVE"/>
1572         <accept Dmve="FP_MVE"/>
1573     </condition>
1574
1575     <condition id="ARMASM ARMv6-M">
1576         <description>Arm Assembler for Armv6-M architecture</description>
1577         <require condition="ARMCC5"/>
1578         <require condition="ARMv6-M Device"/>
1579     </condition>
1580     <condition id="GNUASM ARMv6-M">
1581         <description>GNU Assembler for Armv6-M architecture</description>
1582         <accept condition="ARMCC6"/>
1583         <accept condition="GCC"/>
1584         <require condition="ARMv6-M Device"/>
1585     </condition>
1586     <condition id="IARASM ARMv6-M">
1587         <description>IAR Assembler for Armv6-M architecture</description>
1588         <require condition="IAR"/>
1589         <require condition="ARMv6-M Device"/>
1590     </condition>
1591
1592     <condition id="ARMASM ARMv7-M">
1593         <description>Arm Assembler for Armv7-M architecture</description>
1594         <require condition="ARMCC5"/>
1595         <require condition="ARMv7-M Device"/>
1596     </condition>
1597     <condition id="GNUASM ARMv7-M">
1598         <description>GNU Assembler for Armv7-M architecture</description>
1599         <accept condition="ARMCC6"/>
1600         <accept condition="GCC"/>
1601         <require condition="ARMv7-M Device"/>
1602     </condition>
1603     <condition id="IARASM ARMv7-M">
1604         <description>IAR Assembler for Armv7-M architecture</description>
1605         <require condition="IAR"/>
1606         <require condition="ARMv7-M Device"/>
1607     </condition>
1608
1609     <condition id="GNUASM ARMv8-MBL">
1610         <description>GNU Assembler for Armv8-M base line architecture</description>
1611         <require condition="ARMCC GCC"/>
1612         <require condition="ARMv8-MBL Device"/>
1613     </condition>
1614     <condition id="GNUASM ARMv8-MML">
1615         <description>GNU Assembler for Armv8-M/Armv8.1-M main line architecture</description>
1616         <require condition="ARMCC GCC"/>
1617         <require condition="ARMv8x-MML Device"/>
1618     </condition>
1619     <condition id="IARASM ARMv8-MBL">
1620         <description>IAR Assembler for Armv8-M base line architecture</description>
1621         <require condition="IAR"/>
1622         <require condition="ARMv8-MBL Device"/>
1623     </condition>
1624     <condition id="IARASM ARMv8-MML">
1625         <description>IAR Assembler for Armv8-M main line architecture</description>
1626         <require condition="IAR"/>
1627         <require condition="ARMv8x-MML Device"/>
1628     </condition>
1629
1630     <condition id="ARMASM ARMv7-A">
1631         <description>Arm Assembler for Armv7-A architecture</description>
1632         <require condition="ARMCC5"/>
1633         <require condition="ARMv7-A Device"/>
1634     </condition>
1635     <condition id="GNUASM ARMv7-A">
1636         <description>GNU Assembler for Armv7-A architecture</description>
1637         <accept condition="ARMCC6"/>
1638         <accept condition="GCC"/>
1639         <require condition="ARMv7-A Device"/>
1640     </condition>
1641     <condition id="IARASM ARMv7-A">
1642         <description>IAR Assembler for Armv7-A architecture</description>
1643         <require condition="IAR"/>
1644         <require condition="ARMv7-A Device"/>
1645     </condition>
1646
1647     <!-- OS Tick -->
1648     <condition id="OS Tick PTIM">
1649       <description>Components required for OS Tick Private Timer</description>
1650       <accept Dcore="Cortex-A5"/>
1651       <accept Dcore="Cortex-A9"/>
1652       <require Cclass="Device" Cgroup="IRQ Controller"/>
1653     </condition>
1654
1655     <condition id="OS Tick GTIM">
1656       <description>Components required for OS Tick Generic Physical Timer</description>
1657       <accept Dcore="Cortex-A7"/>
1658       <require Cclass="Device" Cgroup="IRQ Controller"/>
1659     </condition>
1660
1661   </conditions>
1662
1663   <components>
1664     <!-- CMSIS-Core component -->
1665     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.6.0"  condition="ARMv6_7_8-M Device" >
1666       <description>CMSIS-CORE for Cortex-M, SC000, SC300, Star-MC1, ARMv8-M, ARMv8.1-M</description>
1667       <files>
1668         <!-- CPU independent -->
1669         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1670         <file category="include" name="CMSIS/Core/Include/"/>
1671         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
1672         <!-- Code template -->
1673         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
1674         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1675       </files>
1676     </component>
1677
1678     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.2.1"  condition="ARMv7-A Device" >
1679       <description>CMSIS-CORE for Cortex-A</description>
1680       <files>
1681         <!-- CPU independent -->
1682         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
1683         <file category="include" name="CMSIS/Core_A/Include/"/>
1684       </files>
1685     </component>
1686
1687     <!-- CMSIS-Startup components -->
1688     <!-- Cortex-M0 -->
1689     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS" isDefaultVariant="true">
1690       <description>System and Startup for Generic Arm Cortex-M0 device</description>
1691       <files>
1692         <!-- include folder / device header file -->
1693         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1694         <!-- startup / system file -->
1695         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
1696         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1697         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1698         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1699         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1700       </files>
1701     </component>
1702     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
1703       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
1704       <files>
1705         <!-- include folder / device header file -->
1706         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1707         <!-- startup / system file -->
1708         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
1709         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.2.0" attr="config" condition="GCC"/>
1710         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1711         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1712         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1713       </files>
1714     </component>
1715
1716     <!-- Cortex-M0+ -->
1717     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS" isDefaultVariant="true">
1718       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
1719       <files>
1720         <!-- include folder / device header file -->
1721         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1722         <!-- startup / system file -->
1723         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
1724         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1725         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1726         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
1727         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1728       </files>
1729     </component>
1730     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM0+ CMSIS">
1731       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
1732       <files>
1733         <!-- include folder / device header file -->
1734         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1735         <!-- startup / system file -->
1736         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
1737         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.2.0" attr="config" condition="GCC"/>
1738         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
1739         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1740         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1741       </files>
1742     </component>
1743
1744     <!-- Cortex-M1 -->
1745     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS" isDefaultVariant="true">
1746       <description>System and Startup for Generic Arm Cortex-M1 device</description>
1747       <files>
1748         <!-- include folder / device header file -->
1749         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
1750         <!-- startup / system file -->
1751         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
1752         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1753         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1754         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1755         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
1756       </files>
1757     </component>
1758     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
1759       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
1760       <files>
1761         <!-- include folder / device header file -->
1762         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
1763         <!-- startup / system file -->
1764         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
1765         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.2.0" attr="config" condition="GCC"/>
1766         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1767         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
1768         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
1769       </files>
1770     </component>
1771
1772     <!-- Cortex-M3 -->
1773     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="true">
1774       <description>System and Startup for Generic Arm Cortex-M3 device</description>
1775       <files>
1776         <!-- include folder / device header file -->
1777         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1778         <!-- startup / system file -->
1779         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
1780         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1781         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1782         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1783         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
1784       </files>
1785     </component>
1786     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
1787       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
1788       <files>
1789         <!-- include folder / device header file -->
1790         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1791         <!-- startup / system file -->
1792         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
1793         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.2.0" attr="config" condition="GCC"/>
1794         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1795         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1796         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
1797       </files>
1798     </component>
1799
1800     <!-- Cortex-M4 -->
1801     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS" isDefaultVariant="true">
1802       <description>System and Startup for Generic Arm Cortex-M4 device</description>
1803       <files>
1804         <!-- include folder / device header file -->
1805         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1806         <!-- startup / system file -->
1807         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
1808         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1809         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1810         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1811        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
1812       </files>
1813     </component>
1814     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
1815       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
1816       <files>
1817         <!-- include folder / device header file -->
1818         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1819         <!-- startup / system file -->
1820         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
1821         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.2.0" attr="config" condition="GCC"/>
1822         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1823         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1824         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
1825       </files>
1826     </component>
1827
1828     <!-- Cortex-M7 -->
1829     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS" isDefaultVariant="true">
1830       <description>System and Startup for Generic Arm Cortex-M7 device</description>
1831       <files>
1832         <!-- include folder / device header file -->
1833         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1834         <!-- startup / system file -->
1835         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
1836         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1837         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1838         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1839         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
1840       </files>
1841     </component>
1842     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
1843       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
1844       <files>
1845         <!-- include folder / device header file -->
1846         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1847         <!-- startup / system file -->
1848         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
1849         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.2.0" attr="config" condition="GCC"/>
1850         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1851         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1852         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
1853       </files>
1854     </component>
1855
1856     <!-- Cortex-M23 -->
1857     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM23 CMSIS" isDefaultVariant="true">
1858       <description>System and Startup for Generic Arm Cortex-M23 device</description>
1859       <files>
1860         <!-- include folder / device header file -->
1861         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
1862         <!-- startup / system file -->
1863         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"             version="2.1.0" attr="config"/>
1864         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1865         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1866         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1867         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
1868         <!-- SAU configuration -->
1869         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1870       </files>
1871     </component>
1872     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM23 CMSIS">
1873       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
1874       <files>
1875         <!-- include folder / device header file -->
1876         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
1877         <!-- startup / system file -->
1878         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
1879         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1880         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1881         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S"         version="2.2.0" attr="config" condition="GCC"/>
1882         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1883         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.1.0" attr="config" condition="IAR"/>
1884         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
1885         <!-- SAU configuration -->
1886         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1887       </files>
1888     </component>
1889
1890     <!-- Cortex-M33 -->
1891     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM33 CMSIS" isDefaultVariant="true">
1892       <description>System and Startup for Generic Arm Cortex-M33 device</description>
1893       <files>
1894         <!-- include folder / device header file -->
1895         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
1896         <!-- startup / system file -->
1897         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.1.0" attr="config"/>
1898         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1899         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1900         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1901         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
1902         <!-- SAU configuration -->
1903         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
1904       </files>
1905     </component>
1906     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM33 CMSIS">
1907       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
1908       <files>
1909         <!-- include folder / device header file -->
1910         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
1911         <!-- startup / system file -->
1912         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
1913         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1914         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1915         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.3.0" attr="config" condition="GCC"/>
1916         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1917         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.1.0" attr="config" condition="IAR"/>
1918         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
1919         <!-- SAU configuration -->
1920         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
1921       </files>
1922     </component>
1923
1924     <!-- Cortex-M35P -->
1925     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM35P CMSIS" isDefaultVariant="true">
1926       <description>System and Startup for Generic Arm Cortex-M35P device</description>
1927       <files>
1928         <!-- include folder / device header file -->
1929         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
1930         <!-- startup / system file -->
1931         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.1.0" attr="config"/>
1932         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1933         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1934         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
1935         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
1936         <!-- SAU configuration -->
1937         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1938       </files>
1939     </component>
1940     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM35P CMSIS">
1941       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
1942       <files>
1943         <!-- include folder / device header file -->
1944         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
1945         <!-- startup / system file -->
1946         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
1947         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1948         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1949         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.3.0" attr="config" condition="GCC"/>
1950         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
1951         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.1.0" attr="config" condition="IAR"/>
1952         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
1953         <!-- SAU configuration -->
1954         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1955       </files>
1956     </component>
1957
1958     <!-- Cortex-M55 -->
1959     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM55 CMSIS" isDefaultVariant="true">
1960       <description>System and Startup for Generic Cortex-M55 device</description>
1961       <files>
1962         <!-- include folder / device header file -->
1963         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
1964         <!-- startup / system file -->
1965         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.1.0" attr="config"/>
1966         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1967         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1968         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1969         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.1.0" attr="config"/>
1970         <!-- SAU configuration -->
1971         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1972       </files>
1973     </component>
1974
1975     <!-- Cortex-M85 -->
1976     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM85 CMSIS" isDefaultVariant="true">
1977       <description>System and Startup for Generic Cortex-M85 device</description>
1978       <files>
1979         <!-- include folder / device header file -->
1980         <file category="include"      name="Device/ARM/ARMCM85/Include/"/>
1981         <!-- startup / system file -->
1982         <file category="sourceC"      name="Device/ARM/ARMCM85/Source/startup_ARMCM85.c"             version="1.0.0" attr="config"/>
1983         <file category="linkerScript" name="Device/ARM/ARMCM85/Source/ARM/ARMCM85_ac6_s.sct"         version="1.0.0" attr="config" condition="Startup ARMCC6 Secure"/>
1984         <file category="linkerScript" name="Device/ARM/ARMCM85/Source/ARM/ARMCM85_ac6.sct"           version="1.0.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1985         <file category="linkerScript" name="Device/ARM/ARMCM85/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1986         <file category="sourceC"      name="Device/ARM/ARMCM85/Source/system_ARMCM85.c"              version="1.0.0" attr="config"/>
1987         <!-- SAU configuration -->
1988         <file category="header"       name="Device/ARM/ARMCM85/Include/Template/partition_ARMCM85.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1989       </files>
1990     </component>
1991
1992     <!-- Cortex-SC000 -->
1993     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS" isDefaultVariant="true">
1994       <description>System and Startup for Generic Arm SC000 device</description>
1995       <files>
1996         <!-- include folder / device header file -->
1997         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1998         <!-- startup / system file -->
1999         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
2000         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2001         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2002         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2003         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2004       </files>
2005     </component>
2006     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2007       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2008       <files>
2009         <!-- include folder / device header file -->
2010         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2011         <!-- startup / system file -->
2012         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2013         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.2.0" attr="config" condition="GCC"/>
2014         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2015         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2016         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2017       </files>
2018     </component>
2019
2020     <!-- Cortex-SC300 -->
2021     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS" isDefaultVariant="true">
2022       <description>System and Startup for Generic Arm SC300 device</description>
2023       <files>
2024         <!-- include folder / device header file -->
2025         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2026         <!-- startup / system file -->
2027         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
2028         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2029         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2030         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2031         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2032       </files>
2033     </component>
2034     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2035       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2036       <files>
2037         <!-- include folder / device header file -->
2038         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2039         <!-- startup / system file -->
2040         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2041         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.2.0" attr="config" condition="GCC"/>
2042         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2043         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2044         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2045       </files>
2046     </component>
2047
2048     <!-- ARMv8MBL -->
2049     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MBL CMSIS" isDefaultVariant="true">
2050       <description>System and Startup for Generic Armv8-M Baseline device</description>
2051       <files>
2052         <!-- include folder / device header file -->
2053         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2054         <!-- startup / system file -->
2055         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"             version="2.1.0" attr="config"/>
2056         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2057         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2058         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2059         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2060         <!-- SAU configuration -->
2061         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2062       </files>
2063     </component>
2064     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMv8MBL CMSIS">
2065       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2066       <files>
2067         <!-- include folder / device header file -->
2068         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2069         <!-- startup / system file -->
2070         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2071         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2072         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2073         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S"         version="2.2.0" attr="config" condition="GCC"/>
2074         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2075         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2076         <!-- SAU configuration -->
2077         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2078       </files>
2079     </component>
2080
2081     <!-- ARMv8MML -->
2082     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MML CMSIS" isDefaultVariant="true">
2083       <description>System and Startup for Generic Armv8-M Mainline device</description>
2084       <files>
2085         <!-- include folder / device header file -->
2086         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2087         <!-- startup / system file -->
2088         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.1.0" attr="config"/>
2089         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2090         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2091         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2092         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2093         <!-- SAU configuration -->
2094         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2095       </files>
2096     </component>
2097     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMv8MML CMSIS">
2098       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2099       <files>
2100         <!-- include folder / device header file -->
2101         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2102         <!-- startup / system file -->
2103         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2104         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2105         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2106         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.3.0" attr="config" condition="GCC"/>
2107         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2108         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2109         <!-- SAU configuration -->
2110         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2111       </files>
2112     </component>
2113
2114     <!-- ARMv81MML -->
2115     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.2.0" condition="ARMv81MML CMSIS" isDefaultVariant="true">
2116       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2117       <files>
2118         <!-- include folder / device header file -->
2119         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2120         <!-- startup / system file -->
2121         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.1.0" attr="config"/>
2122         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2123         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2124         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.2.0" attr="config" condition="GCC"/>
2125         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
2126         <!-- SAU configuration -->
2127         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
2128       </files>
2129     </component>
2130
2131     <!-- Cortex-A5 -->
2132     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA5 CMSIS">
2133       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2134       <files>
2135         <!-- include folder / device header file -->
2136         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2137         <!-- startup / system / mmu files -->
2138         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2139         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2140         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2141         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2142         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.1" attr="config" condition="GCC"/>
2143         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2144         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2145         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2146         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2147         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2148         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2149         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2150
2151       </files>
2152     </component>
2153
2154     <!-- Cortex-A7 -->
2155     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA7 CMSIS">
2156       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2157       <files>
2158         <!-- include folder / device header file -->
2159         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2160         <!-- startup / system / mmu files -->
2161         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2162         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2163         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2164         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2165         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.1" attr="config" condition="GCC"/>
2166         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2167         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2168         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2169         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2170         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2171         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2172         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2173       </files>
2174     </component>
2175
2176     <!-- Cortex-A9 -->
2177     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.2" condition="ARMCA9 CMSIS">
2178       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2179       <files>
2180         <!-- include folder / device header file -->
2181         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2182         <!-- startup / system / mmu files -->
2183         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2184         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2185         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2186         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2187         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.1" attr="config" condition="GCC"/>
2188         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2189         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2190         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2191         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2192         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2193         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2194         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2195       </files>
2196     </component>
2197
2198     <!-- IRQ Controller -->
2199     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.2.0" condition="ARMv7-A Device">
2200       <description>IRQ Controller implementation using GIC</description>
2201       <files>
2202         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2203       </files>
2204     </component>
2205
2206     <!-- OS Tick -->
2207     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2208       <description>OS Tick implementation using Private Timer</description>
2209       <files>
2210         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2211       </files>
2212     </component>
2213
2214     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2215       <description>OS Tick implementation using Generic Physical Timer</description>
2216       <files>
2217         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2218       </files>
2219     </component>
2220
2221     <!-- CMSIS-RTOS Keil RTX component -->
2222     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2223       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2224       <RTE_Components_h>
2225         <!-- the following content goes into file 'RTE_Components.h' -->
2226         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2227         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2228       </RTE_Components_h>
2229       <files>
2230         <!-- CPU independent -->
2231         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2232         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2233         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2234
2235         <!-- RTX templates -->
2236         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2237         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2238         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2239         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2240         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2241         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2242         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2243         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2244         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2245         <!-- tool-chain specific template file -->
2246         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2247         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2248         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2249
2250         <!-- CPU and Compiler dependent -->
2251         <!-- ARMCC -->
2252         <file category="library" condition="ARMCC ARMv6-M LE"      name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2253         <file category="library" condition="ARMCC ARMv6-M BE"      name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2254         <file category="library" condition="ARMCC ARMv7-M NOFP LE" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2255         <file category="library" condition="ARMCC ARMv7-M NOFP BE" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2256         <file category="library" condition="ARMCC ARMv7-M FP LE"   name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2257         <file category="library" condition="ARMCC ARMv7-M FP BE"   name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2258         <!-- GCC -->
2259         <file category="library" condition="GCC ARMv6-M LE"        name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2260         <file category="library" condition="GCC ARMv6-M BE"        name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2261         <file category="library" condition="GCC ARMv7-M NOFP LE"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2262         <file category="library" condition="GCC ARMv7-M NOFP BE"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2263         <file category="library" condition="GCC ARMv7-M FP LE"     name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2264         <file category="library" condition="GCC ARMv7-M FP BE"     name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2265         <!-- IAR -->
2266         <file category="library" condition="IARCC ARMv6-M LE"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2267         <file category="library" condition="IARCC ARMv6-M BE"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2268         <file category="library" condition="IARCC ARMv7-M NOFP LE" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2269         <file category="library" condition="IARCC ARMv7-M NOFP BE" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2270         <file category="library" condition="IARCC ARMv7-M FP LE"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2271         <file category="library" condition="IARCC ARMv7-M FP BE"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2272       </files>
2273     </component>
2274     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2275     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
2276       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2277       <RTE_Components_h>
2278         <!-- the following content goes into file 'RTE_Components.h' -->
2279         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2280         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2281       </RTE_Components_h>
2282       <files>
2283         <!-- CPU independent -->
2284         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2285         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2286         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2287
2288         <!-- RTX templates -->
2289         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2290         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2291         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2292         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2293         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2294         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2295         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2296         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2297         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2298         <!-- tool-chain specific template file -->
2299         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2300         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2301         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2302
2303         <!-- CPU and Compiler dependent -->
2304         <!-- ARMCC -->
2305         <file category="library" condition="ARMCC ARMv7-M NOFP LE" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2306         <file category="library" condition="ARMCC ARMv7-M FP LE"   name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2307         <!-- GCC -->
2308         <file category="library" condition="GCC ARMv7-M NOFP LE"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2309         <file category="library" condition="GCC ARMv7-M FP LE"     name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2310         <!-- IAR -->
2311       </files>
2312     </component>
2313
2314     <!-- CMSIS-RTOS Keil RTX5 component -->
2315     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.4" Capiversion="1.0.0" condition="RTOS RTX5">
2316       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2317       <RTE_Components_h>
2318         <!-- the following content goes into file 'RTE_Components.h' -->
2319         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2320         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2321       </RTE_Components_h>
2322       <files>
2323         <!-- RTX header file -->
2324         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2325         <!-- RTX compatibility module for API V1 -->
2326         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2327       </files>
2328     </component>
2329
2330     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2331     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5">
2332       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
2333       <RTE_Components_h>
2334         <!-- the following content goes into file 'RTE_Components.h' -->
2335         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2336         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2337       </RTE_Components_h>
2338       <files>
2339         <!-- RTX documentation -->
2340         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2341
2342         <!-- RTX header files -->
2343         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2344
2345         <!-- RTX configuration -->
2346         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
2347         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
2348
2349         <!-- RTX templates -->
2350         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2351         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2352         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2353         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2354         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2355         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2356         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2357         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2358         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2359         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2360
2361         <!-- RTX library configuration -->
2362         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2363
2364         <!-- RTX libraries (CPU and Compiler dependent) -->
2365         <!-- ARMCC -->
2366         <file category="library" condition="ARMCC ARMv6-M LE"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2367         <file category="library" condition="ARMCC ARMv7-M NOFP LE"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2368         <file category="library" condition="ARMCC ARMv7-M FP LE"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2369         <file category="library" condition="ARMCC ARMv8-MBL LE"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2370         <file category="library" condition="ARMCC ARMv8-MML NOFP LE"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2371         <file category="library" condition="ARMCC ARMv8-MML FP LE"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2372         <!-- GCC -->
2373         <file category="library" condition="GCC ARMv6-M LE"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2374         <file category="library" condition="GCC ARMv7-M NOFP LE"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2375         <file category="library" condition="GCC ARMv7-M FP LE"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2376         <file category="library" condition="GCC ARMv8-MBL LE"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2377         <file category="library" condition="GCC ARMv8-MML NOFP LE"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2378         <file category="library" condition="GCC ARMv8-MML FP LE"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2379         <!-- IAR -->
2380         <file category="library" condition="IARCC ARMv6-M LE"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2381         <file category="library" condition="IARCC ARMv7-M NOFP LE"    name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2382         <file category="library" condition="IARCC ARMv7-M FP LE"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2383         <file category="library" condition="IARCC ARMv8-MBL LE"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
2384         <file category="library" condition="IARCC ARMv8-MML NOFP LE"  name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
2385         <file category="library" condition="IARCC ARMv8-MML FP LE"    name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
2386         <file category="library" condition="IARCC ARMv81-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MM.a"    src="CMSIS/RTOS2/RTX/Source"/>
2387         <file category="library" condition="IARCC ARMv81-MML FP LE"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MMF.a"   src="CMSIS/RTOS2/RTX/Source"/>
2388       </files>
2389     </component>
2390     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
2391       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
2392       <RTE_Components_h>
2393         <!-- the following content goes into file 'RTE_Components.h' -->
2394         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2395         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2396         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2397       </RTE_Components_h>
2398       <files>
2399         <!-- RTX documentation -->
2400         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2401
2402         <!-- RTX header files -->
2403         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2404
2405         <!-- RTX configuration -->
2406         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
2407         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
2408
2409         <!-- RTX templates -->
2410         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2411         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2412         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2413         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2414         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2415         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2416         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2417         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2418         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2419         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2420
2421         <!-- RTX library configuration -->
2422         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2423
2424         <!-- RTX libraries (CPU and Compiler dependent) -->
2425         <!-- ARMCC -->
2426         <file category="library" condition="ARMCC ARMv8-MBL LE"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2427         <file category="library" condition="ARMCC ARMv8-MML NOFP LE"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2428         <file category="library" condition="ARMCC ARMv8-MML FP LE"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2429         <!-- GCC -->
2430         <file category="library" condition="GCC ARMv8-MBL LE"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2431         <file category="library" condition="GCC ARMv8-MML NOFP LE"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2432         <file category="library" condition="GCC ARMv8-MML FP LE"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2433         <!-- IAR -->
2434         <file category="library" condition="IARCC ARMv8-MBL LE"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
2435         <file category="library" condition="IARCC ARMv8-MML NOFP LE"  name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
2436         <file category="library" condition="IARCC ARMv8-MML FP LE"    name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
2437         <file category="library" condition="IARCC ARMv81-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MMN.a"    src="CMSIS/RTOS2/RTX/Source"/>
2438         <file category="library" condition="IARCC ARMv81-MML FP LE"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MMFN.a"   src="CMSIS/RTOS2/RTX/Source"/>
2439       </files>
2440     </component>
2441     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5">
2442       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
2443       <RTE_Components_h>
2444         <!-- the following content goes into file 'RTE_Components.h' -->
2445         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2446         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2447         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2448       </RTE_Components_h>
2449       <files>
2450         <!-- RTX documentation -->
2451         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2452
2453         <!-- RTX header files -->
2454         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2455
2456         <!-- RTX configuration -->
2457         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
2458         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
2459
2460         <!-- RTX templates -->
2461         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2462         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2463         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2464         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2465         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2466         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2467         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2468         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2469         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2470         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2471
2472         <!-- RTX sources (core) -->
2473         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2474         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2475         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2476         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2477         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2478         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2479         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2480         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2481         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2482         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2483         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2484         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2485         <!-- RTX sources (library configuration) -->
2486         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2487         <!-- RTX sources (handlers ARMASM) -->
2488         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="ARMASM ARMv6-M"/>
2489         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="ARMASM ARMv7-M"/>
2490         <!-- RTX sources (handlers GAS) -->
2491         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="GNUASM ARMv6-M"/>
2492         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="GNUASM ARMv7-M"/>
2493         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="GNUASM ARMv8-MBL"/>
2494         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="GNUASM ARMv8-MML"/>
2495         <!-- RTX sources (handlers IAR) -->
2496         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="IARASM ARMv6-M"/>
2497         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="IARASM ARMv7-M"/>
2498         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="IARASM ARMv8-MBL"/>
2499         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="IARASM ARMv8-MML"/>
2500         <!-- OS Tick (SysTick) -->
2501         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2502       </files>
2503     </component>
2504     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
2505       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
2506       <RTE_Components_h>
2507         <!-- the following content goes into file 'RTE_Components.h' -->
2508         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2509         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2510         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2511       </RTE_Components_h>
2512       <files>
2513         <!-- RTX documentation -->
2514         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2515
2516         <!-- RTX header files -->
2517         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2518
2519         <!-- RTX configuration -->
2520         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
2521         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
2522
2523         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2524
2525         <!-- RTX templates -->
2526         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2527         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2528         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2529         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2530         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2531         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2532         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2533         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2534         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2535         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2536
2537         <!-- RTX sources (core) -->
2538         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2539         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2540         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2541         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2542         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2543         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2544         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2545         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2546         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2547         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2548         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2549         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2550         <!-- RTX sources (library configuration) -->
2551         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2552         <!-- RTX sources (handlers ARMASM) -->
2553         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7a.s" condition="ARMASM ARMv7-A"/>
2554         <!-- RTX sources (handlers GAS) -->
2555         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="GNUASM ARMv7-A"/>
2556         <!-- RTX sources (handlers IAR) -->
2557         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7a.s" condition="IARASM ARMv7-A"/>
2558       </files>
2559     </component>
2560     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
2561       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
2562       <RTE_Components_h>
2563         <!-- the following content goes into file 'RTE_Components.h' -->
2564         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2565         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2566         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2567         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2568       </RTE_Components_h>
2569       <files>
2570         <!-- RTX documentation -->
2571         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2572
2573         <!-- RTX header files -->
2574         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2575
2576         <!-- RTX configuration -->
2577         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
2578         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
2579
2580         <!-- RTX templates -->
2581         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2582         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2583         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2584         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2585         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2586         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2587         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2588         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2589         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2590         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2591
2592         <!-- RTX sources (core) -->
2593         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2594         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2595         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2596         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2597         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2598         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2599         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2600         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2601         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2602         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2603         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2604         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2605         <!-- RTX sources (library configuration) -->
2606         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2607         <!-- RTX sources (GAS handlers) -->
2608         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="GNUASM ARMv8-MBL"/>
2609         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="GNUASM ARMv8-MML"/>
2610         <!-- RTX sources (IAR handlers) -->
2611         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="IARASM ARMv8-MBL"/>
2612         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="IARASM ARMv8-MML"/>
2613         <!-- OS Tick (SysTick) -->
2614         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2615       </files>
2616     </component>
2617
2618     <!-- CMSIS-Driver Custom components -->
2619     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
2620       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
2621       <files>
2622         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
2623         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
2624       </files>
2625     </component>
2626     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
2627       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
2628       <files>
2629         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
2630         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
2631       </files>
2632     </component>
2633     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
2634       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
2635       <files>
2636         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
2637         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
2638       </files>
2639     </component>
2640     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
2641       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
2642       <files>
2643         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
2644         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
2645       </files>
2646     </component>
2647     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
2648       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
2649       <files>
2650         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
2651         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
2652       </files>
2653     </component>
2654     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
2655       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
2656       <files>
2657         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
2658         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
2659       </files>
2660     </component>
2661     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
2662       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
2663       <files>
2664         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
2665         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
2666       </files>
2667     </component>
2668     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
2669       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
2670       <files>
2671         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
2672         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
2673       </files>
2674     </component>
2675     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
2676       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
2677       <files>
2678         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
2679         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
2680         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
2681         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
2682       </files>
2683     </component>
2684     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
2685       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
2686       <files>
2687         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
2688         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
2689       </files>
2690     </component>
2691     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
2692       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
2693       <files>
2694         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
2695         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
2696       </files>
2697     </component>
2698     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
2699       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
2700       <files>
2701         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
2702         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
2703       </files>
2704     </component>
2705     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
2706       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
2707       <files>
2708         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
2709         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
2710       </files>
2711     </component>
2712     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
2713       <description>Access to #include Driver_WiFi.h file</description>
2714       <files>
2715         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
2716         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
2717       </files>
2718     </component>
2719
2720     <!-- VIO components -->
2721     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
2722       <description>Virtual I/O custom implementation template</description>
2723       <files>
2724         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
2725       </files>
2726     </component>
2727     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
2728       <description>Virtual I/O implementation using memory only</description>
2729       <files>
2730         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
2731       </files>
2732     </component>
2733
2734   </components>
2735
2736   <boards>
2737     <board name="uVision Simulator" vendor="Keil">
2738       <description>uVision Simulator</description>
2739       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2740       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2741       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
2742       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
2743       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2744       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2745       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2746       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2747       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2748       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2749       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2750       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2751       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2752       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2753       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
2754       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2755       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2756       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2757       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2758       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2759       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2760       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
2761       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
2762       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
2763       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
2764       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
2765     </board>
2766
2767     <board name="EWARM Simulator" vendor="IAR">
2768       <description>EWARM Simulator</description>
2769       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2770       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2771       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
2772       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
2773       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2774       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2775       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2776       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2777       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2778       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2779       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2780       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2781       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2782       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2783       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
2784       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2785       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2786       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2787       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2788       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2789       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2790       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
2791       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
2792       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
2793       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
2794       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
2795     </board>
2796   </boards>
2797
2798   <examples>
2799     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2800       <description>CMSIS-RTOS2 Blinky example</description>
2801       <board name="uVision Simulator" vendor="Keil"/>
2802       <project>
2803         <environment name="uv" load="Blinky.uvprojx"/>
2804       </project>
2805       <attributes>
2806         <component Cclass="CMSIS" Cgroup="CORE"/>
2807         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2808         <component Cclass="Device" Cgroup="Startup"/>
2809         <category>Getting Started</category>
2810       </attributes>
2811     </example>
2812
2813     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2814       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2815       <board name="uVision Simulator" vendor="Keil"/>
2816       <project>
2817         <environment name="uv" load="Blinky.uvprojx"/>
2818       </project>
2819       <attributes>
2820         <component Cclass="CMSIS" Cgroup="CORE"/>
2821         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2822         <component Cclass="Device" Cgroup="Startup"/>
2823         <category>Getting Started</category>
2824       </attributes>
2825     </example>
2826
2827     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
2828       <description>CMSIS-RTOS2 Message Queue Example</description>
2829       <board name="uVision Simulator" vendor="Keil"/>
2830       <project>
2831         <environment name="uv" load="MsqQueue.uvprojx"/>
2832       </project>
2833       <attributes>
2834         <component Cclass="CMSIS" Cgroup="CORE"/>
2835         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2836         <component Cclass="Compiler" Cgroup="EventRecorder"/>
2837         <component Cclass="Device" Cgroup="Startup"/>
2838         <category>Getting Started</category>
2839       </attributes>
2840     </example>
2841
2842     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
2843       <description>CMSIS-RTOS2 Memory Pool Example</description>
2844       <board name="uVision Simulator" vendor="Keil"/>
2845       <project>
2846         <environment name="uv" load="MemPool.uvprojx"/>
2847       </project>
2848       <attributes>
2849         <component Cclass="CMSIS" Cgroup="CORE"/>
2850         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2851         <component Cclass="Compiler" Cgroup="EventRecorder"/>
2852         <component Cclass="Device" Cgroup="Startup"/>
2853         <category>Getting Started</category>
2854       </attributes>
2855     </example>
2856
2857     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2858       <description>Bare-metal secure/non-secure example without RTOS</description>
2859       <board name="uVision Simulator" vendor="Keil"/>
2860       <project>
2861         <environment name="uv" load="NoRTOS.uvmpw"/>
2862       </project>
2863       <attributes>
2864         <component Cclass="CMSIS" Cgroup="CORE"/>
2865         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2866         <component Cclass="Device" Cgroup="Startup"/>
2867         <category>Getting Started</category>
2868       </attributes>
2869     </example>
2870
2871     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2872       <description>Secure/non-secure RTOS example with thread context management</description>
2873       <board name="uVision Simulator" vendor="Keil"/>
2874       <project>
2875         <environment name="uv" load="RTOS.uvmpw"/>
2876       </project>
2877       <attributes>
2878         <component Cclass="CMSIS" Cgroup="CORE"/>
2879         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2880         <component Cclass="Device" Cgroup="Startup"/>
2881         <category>Getting Started</category>
2882       </attributes>
2883     </example>
2884
2885     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2886       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2887       <board name="uVision Simulator" vendor="Keil"/>
2888       <project>
2889         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2890       </project>
2891       <attributes>
2892         <component Cclass="CMSIS" Cgroup="CORE"/>
2893         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2894         <component Cclass="Device" Cgroup="Startup"/>
2895         <category>Getting Started</category>
2896       </attributes>
2897     </example>
2898
2899     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
2900       <description>CMSIS-RTOS2 Blinky example</description>
2901       <board name="EWARM Simulator" vendor="IAR"/>
2902       <project>
2903         <environment name="iar" load="Blinky/Blinky.ewp"/>
2904       </project>
2905       <attributes>
2906         <component Cclass="CMSIS" Cgroup="CORE"/>
2907         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2908         <component Cclass="Device" Cgroup="Startup"/>
2909         <category>Getting Started</category>
2910       </attributes>
2911     </example>
2912
2913     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
2914       <description>CMSIS-RTOS2 Message Queue Example</description>
2915       <board name="EWARM Simulator" vendor="IAR"/>
2916       <project>
2917         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
2918       </project>
2919       <attributes>
2920         <component Cclass="CMSIS" Cgroup="CORE"/>
2921         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2922         <component Cclass="Device" Cgroup="Startup"/>
2923         <category>Getting Started</category>
2924       </attributes>
2925     </example>
2926
2927   </examples>
2928
2929 </package>