begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.0.2-dev5">
  12       CMSIS-Core(M):
  13       - Added MPU Management Functions for CM0+/3/4/7
  14     </release>
  15     <release version="5.0.2-dev4">
  16       CMSIS Device:
  17       - Added OS Tick API
  18       - Added IRQ Controller API
  19     </release>
  20     <release version="5.0.2-dev3">
  21       CMSIS-Core_A:
  22       - Added ARM Compiler 6 support
  23       - Updated Cortex-A core functions
  24       - Updated Startup and System files
  25       CMSIS-RTOS2:
  26       - API 2.1.1 (see revision history for details)
  27       - RTX 5.2.0 (see revision history for details)
  28     </release>
  29     <release version="5.0.2-dev2">
  30       CMSIS-RTOS2:
  31       - RTX 5.1.1 (see revision history for details)
  32     </release>
  33     <release version="5.0.2-dev1">
  34       CMSIS-Core_A:
  35       - Added Cortex-A core support, ARMCC specific:
  36         - Core specific register definitions
  37         - Generic Interrupt Controller functions
  38         - Generic Timer functions
  39         - L1 and L2 Cache functions
  40         - MMU functions
  41       - Added ARMCA5, ARMCA7 and ARMCA9 devices
  42       - Added Startup, System and MMU configuration files
  43     </release>
  44     <release version="5.0.2-dev0">
  45       CMSIS-Core: 5.0.2 (see revision history for details)
  46       - Added macros __UNALIGNED_UINT16_READ, __UNALIGNED_UINT16_WRITE
  47       - Added macros __UNALIGNED_UINT32_READ, __UNALIGNED_UINT32_WRITE
  48       - Set macro __UNALIGNED_UINT32 to deprecated
  49     </release>
  50     <release version="5.0.1" date="2017-02-03">
  51       Package Description:
  52       - added taxonomy for Cclass RTOS
  53       CMSIS-RTOS2:
  54       - API 2.1   (see revision history for details)
  55       - RTX 5.1.0 (see revision history for details)
  56       CMSIS-Core: 5.0.1 (see revision history for details)
  57       - Added __PACKED_STRUCT macro
  58       - Added uVisior support
  59       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  60       - Updated template for secure main function (main_s.c)
  61       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  62       CMSIS-DSP: 1.5.1 (see revision history for details)
  63       - added ARMv8M DSP libraries.
  64       CMSIS-PACK:1.4.9 (see revision history for details)
  65       - added Pack Index File specification and schema file
  66     </release>
  67     <release version="5.0.0" date="2016-11-11">
  68       Changed open source license to Apache 2.0
  69       CMSIS_Core:
  70        - Added support for Cortex-M23 and Cortex-M33.
  71        - Added ARMv8-M device configurations for mainline and baseline.
  72        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  73        - Added cmsis_compiler.h to unify compiler behaviour.
  74        - Updated function SCB_EnableICache (for Cortex-M7).
  75        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  76       CMSIS-RTOS:
  77         - bug fix in RTX 4.82 (see revision history for details)
  78       CMSIS-RTOS2:
  79         - new API including compatibility layer to CMSIS-RTOS
  80         - reference implementation based on RTX5
  81         - supports all Cortex-M variants including TrustZone for ARMv8-M
  82       CMSIS-SVD:
  83        - reworked SVD format documentation
  84        - removed SVD file database documentation as SVD files are distributed in packs
  85        - updated SVDConv for Win32 and Linux
  86       CMSIS-DSP:
  87        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  88        - Added DSP libraries build projects to CMSIS pack.
  89     </release>
  90     <release version="4.5.0" date="2015-10-28">
  91       - CMSIS-Core     4.30.0  (see revision history for details)
  92       - CMSIS-DAP      1.1.0   (unchanged)
  93       - CMSIS-Driver   2.04.0  (see revision history for details)
  94       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
  95       - CMSIS-PACK     1.4.1   (see revision history for details)
  96       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
  97       - CMSIS-SVD      1.3.1   (see revision history for details)
  98     </release>
  99     <release version="4.4.0" date="2015-09-11">
 100       - CMSIS-Core     4.20   (see revision history for details)
 101       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 102       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 103       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 104       - CMSIS-RTOS
 105         -- API         1.02   (unchanged)
 106         -- RTX         4.79   (see revision history for details)
 107       - CMSIS-SVD      1.3.0  (see revision history for details)
 108       - CMSIS-DAP      1.1.0  (extended with SWO support)
 109     </release>
 110     <release version="4.3.0" date="2015-03-20">
 111       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 112       - CMSIS-DSP      1.4.5  (see revision history for details)
 113       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 114       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 115       - CMSIS-RTOS
 116         -- API         1.02   (unchanged)
 117         -- RTX         4.78   (see revision history for details)
 118       - CMSIS-SVD      1.2    (unchanged)
 119     </release>
 120     <release version="4.2.0" date="2014-09-24">
 121       Adding Cortex-M7 support
 122       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 123       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 124       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 125       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 126       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 127     </release>
 128     <release version="4.1.1" date="2014-06-30">
 129       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 130     </release>
 131     <release version="4.1.0" date="2014-06-12">
 132       - CMSIS-Driver   2.02  (incompatible update)
 133       - CMSIS-Pack     1.3   (see revision history for details)
 134       - CMSIS-DSP      1.4.2 (unchanged)
 135       - CMSIS-Core     3.30  (unchanged)
 136       - CMSIS-RTOS RTX 4.74  (unchanged)
 137       - CMSIS-RTOS API 1.02  (unchanged)
 138       - CMSIS-SVD      1.10  (unchanged)
 139       PACK:
 140       - removed G++ specific files from PACK
 141       - added Component Startup variant "C Startup"
 142       - added Pack Checking Utility
 143       - updated conditions to reflect tool-chain dependency
 144       - added Taxonomy for Graphics
 145       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 146     </release>
 147     <release version="4.0.0">
 148       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 149       - CMSIS-Pack     1.1   Preliminary
 150       - CMSIS-DSP      1.4.2 (see revision history for details)
 151       - CMSIS-Core     3.30  (see revision history for details)
 152       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 153       - CMSIS-RTOS API 1.02  (unchanged)
 154       - CMSIS-SVD      1.10  (unchanged)
 155     </release>
 156     <release version="3.20.4">
 157       - CMSIS-RTOS 4.74 (see revision history for details)
 158       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 159     </release>
 160     <release version="3.20.3">
 161       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 162       - CMSIS-RTOS 4.73 (see revision history for details)
 163     </release>
 164     <release version="3.20.2">
 165       - CMSIS-Pack documentation has been added
 166       - CMSIS-Drivers header and documentation have been added to PACK
 167       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 168     </release>
 169     <release version="3.20.1">
 170       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 171       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 172     </release>
 173     <release version="3.20.0">
 174       The software portions that are deployed in the application program are now under a BSD license which allows usage
 175       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 176       The individual components have been update as listed below:
 177       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 178       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 179       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 180       - CMSIS-SVD is unchanged.
 181     </release>
 182   </releases>
 183
 184   <taxonomy>
 185     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 186     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 187     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 188     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 189     <description Cclass="File System">File Drive Support and File System</description>
 190     <description Cclass="Graphics">Graphical User Interface</description>
 191     <description Cclass="Network">Network Stack using Internet Protocols</description>
 192     <description Cclass="USB">Universal Serial Bus Stack</description>
 193     <description Cclass="Compiler">Compiler Software Extensions</description>
 194     <description Cclass="RTOS">Real-time Operating System</description>
 195   </taxonomy>
 196
 197   <devices>
 198     <!-- ******************************  Cortex-M0  ****************************** -->
 199     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 200       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 201       <description>
 202 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 203 - simple, easy-to-use programmers model
 204 - highly efficient ultra-low power operation
 205 - excellent code density
 206 - deterministic, high-performance interrupt handling
 207 - upward compatibility with the rest of the Cortex-M processor family.
 208       </description>
 209       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 210       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 211       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 212       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 213
 214       <device Dname="ARMCM0">
 215         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 216         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 217       </device>
 218     </family>
 219
 220     <!-- ******************************  Cortex-M0P  ****************************** -->
 221     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 222       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 223       <description>
 224 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 225 - simple, easy-to-use programmers model
 226 - highly efficient ultra-low power operation
 227 - excellent code density
 228 - deterministic, high-performance interrupt handling
 229 - upward compatibility with the rest of the Cortex-M processor family.
 230       </description>
 231       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 232       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 233       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 234       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 235
 236       <device Dname="ARMCM0P">
 237         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 238         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 239       </device>
 240     </family>
 241
 242     <!-- ******************************  Cortex-M3  ****************************** -->
 243     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 244       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 245       <description>
 246 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 247 - simple, easy-to-use programmers model
 248 - highly efficient ultra-low power operation
 249 - excellent code density
 250 - deterministic, high-performance interrupt handling
 251 - upward compatibility with the rest of the Cortex-M processor family.
 252       </description>
 253       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 254       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 255       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 256       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 257
 258       <device Dname="ARMCM3">
 259         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 260         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 261       </device>
 262     </family>
 263
 264     <!-- ******************************  Cortex-M4  ****************************** -->
 265     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 266       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 267       <description>
 268 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 269 - simple, easy-to-use programmers model
 270 - highly efficient ultra-low power operation
 271 - excellent code density
 272 - deterministic, high-performance interrupt handling
 273 - upward compatibility with the rest of the Cortex-M processor family.
 274       </description>
 275       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 276       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 277       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 278       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 279
 280       <device Dname="ARMCM4">
 281         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 282         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 283       </device>
 284
 285       <device Dname="ARMCM4_FP">
 286         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 287         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 288       </device>
 289     </family>
 290
 291     <!-- ******************************  Cortex-M7  ****************************** -->
 292     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 293       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 294       <description>
 295 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 296 - simple, easy-to-use programmers model
 297 - highly efficient ultra-low power operation
 298 - excellent code density
 299 - deterministic, high-performance interrupt handling
 300 - upward compatibility with the rest of the Cortex-M processor family.
 301       </description>
 302       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 303       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 304       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 305       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 306
 307       <device Dname="ARMCM7">
 308         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 309         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 310       </device>
 311
 312       <device Dname="ARMCM7_SP">
 313         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 314         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 315       </device>
 316
 317       <device Dname="ARMCM7_DP">
 318         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 319         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 320       </device>
 321     </family>
 322
 323     <!-- ******************************  Cortex-M23  ********************** -->
 324     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 325       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 326       <description>
 327 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 328 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 329 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 330       </description>
 331       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 332       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 333       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 334       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 335       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 336       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 337
 338       <device Dname="ARMCM23">
 339         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 340         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 341       </device>
 342
 343       <device Dname="ARMCM23_TZ">
 344         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 345         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 346       </device>
 347     </family>
 348
 349     <!-- ******************************  Cortex-M33  ****************************** -->
 350     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 351       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 352       <description>
 353 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 354 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 355       </description>
 356       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 357       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 358       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 359       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 360       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 361       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 362
 363       <device Dname="ARMCM33">
 364         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 365         <description>
 366           no DSP Instructions, no Floating Point Unit, no TrustZone
 367         </description>
 368         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 369       </device>
 370
 371       <device Dname="ARMCM33_TZ">
 372         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 373         <description>
 374           no DSP Instructions, no Floating Point Unit, TrustZone
 375         </description>
 376         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 377       </device>
 378
 379       <device Dname="ARMCM33_DSP_FP">
 380         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 381         <description>
 382           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 383         </description>
 384         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 385       </device>
 386
 387       <device Dname="ARMCM33_DSP_FP_TZ">
 388         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 389         <description>
 390           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 391         </description>
 392         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 393       </device>
 394     </family>
 395
 396     <!-- ******************************  ARMSC000  ****************************** -->
 397     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 398       <description>
 399 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 400 - simple, easy-to-use programmers model
 401 - highly efficient ultra-low power operation
 402 - excellent code density
 403 - deterministic, high-performance interrupt handling
 404       </description>
 405       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 406       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 407       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 408       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 409
 410       <device Dname="ARMSC000">
 411         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 412         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 413       </device>
 414     </family>
 415
 416     <!-- ******************************  ARMSC300  ****************************** -->
 417     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 418       <description>
 419 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 420 - simple, easy-to-use programmers model
 421 - highly efficient ultra-low power operation
 422 - excellent code density
 423 - deterministic, high-performance interrupt handling
 424       </description>
 425       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 426       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 427       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 428       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 429
 430       <device Dname="ARMSC300">
 431         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 432         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 433       </device>
 434     </family>
 435
 436     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 437     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 438       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 439       <description>
 440 ARMv8-M Baseline based device with TrustZone
 441       </description>
 442       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 443       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 444       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 445       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 446       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 447       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 448
 449       <device Dname="ARMv8MBL">
 450         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 451         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 452       </device>
 453     </family>
 454
 455     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 456     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 457       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 458       <description>
 459 ARMv8-M Mainline based device with TrustZone
 460       </description>
 461       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 462       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 463       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 464       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 465       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 466       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 467
 468       <device Dname="ARMv8MML">
 469         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 470         <description>
 471           no DSP Instructions, no Floating Point Unit, TrustZone
 472         </description>
 473         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 474       </device>
 475
 476       <device Dname="ARMv8MML_DSP">
 477         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 478         <description>
 479           DSP Instructions, no Floating Point Unit, TrustZone
 480         </description>
 481         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 482       </device>
 483
 484       <device Dname="ARMv8MML_SP">
 485         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 486         <description>
 487           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 488         </description>
 489         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 490       </device>
 491
 492       <device Dname="ARMv8MML_DSP_SP">
 493         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 494         <description>
 495           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 496         </description>
 497         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 498       </device>
 499
 500       <device Dname="ARMv8MML_DP">
 501         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 502         <description>
 503           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 504         </description>
 505         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 506       </device>
 507
 508       <device Dname="ARMv8MML_DSP_DP">
 509         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 510         <description>
 511           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 512         </description>
 513         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 514       </device>
 515     </family>
 516
 517     <!-- ******************************  Cortex-A5  ****************************** -->
 518     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 519       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 520       <description>
 521 The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
 522 virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
 523 ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 524       </description>
 525
 526       <device Dname="ARMCA5">
 527         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 528         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 529       </device>
 530     </family>
 531
 532     <!-- ******************************  Cortex-A7  ****************************** -->
 533     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 534       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 535       <description>
 536 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
 537 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 538 an optional integrated GIC, and an optional L2 cache controller.
 539       </description>
 540
 541       <device Dname="ARMCA7">
 542         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 543         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 544       </device>
 545     </family>
 546
 547     <!-- ******************************  Cortex-A9  ****************************** -->
 548     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 549       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 550       <description>
 551 The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 552 The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
 553 and 8-bit Java bytecodes in Jazelle state.
 554       </description>
 555
 556       <device Dname="ARMCA9">
 557         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 558         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 559       </device>
 560     </family>
 561   </devices>
 562
 563
 564   <apis>
 565     <!-- CMSIS Device API -->
 566     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 567       <description>Device interrupt controller interface</description>
 568       <files>
 569         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 570       </files>
 571     </api>
 572     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.0" exclusive="1">
 573       <description>RTOS Kernel system tick timer interface</description>
 574       <files>
 575         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 576       </files>
 577     </api>
 578     <!-- CMSIS-RTOS API -->
 579     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 580       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 581       <files>
 582         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 583       </files>
 584     </api>
 585     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.1" exclusive="1">
 586       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 587       <files>
 588         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 589         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 590       </files>
 591     </api>
 592     <!-- CMSIS Driver API -->
 593     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 594       <description>USART Driver API for Cortex-M</description>
 595       <files>
 596         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 597         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 598       </files>
 599     </api>
 600     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 601       <description>SPI Driver API for Cortex-M</description>
 602       <files>
 603         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 604         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 605       </files>
 606     </api>
 607     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 608       <description>SAI Driver API for Cortex-M</description>
 609       <files>
 610         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 611         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 612       </files>
 613     </api>
 614     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 615       <description>I2C Driver API for Cortex-M</description>
 616       <files>
 617         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 618         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 619       </files>
 620     </api>
 621     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.1.0" exclusive="0">
 622       <description>CAN Driver API for Cortex-M</description>
 623       <files>
 624         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 625         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 626       </files>
 627     </api>
 628     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
 629       <description>Flash Driver API for Cortex-M</description>
 630       <files>
 631         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 632         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 633       </files>
 634     </api>
 635     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 636       <description>MCI Driver API for Cortex-M</description>
 637       <files>
 638         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 639         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 640       </files>
 641     </api>
 642     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
 643       <description>NAND Flash Driver API for Cortex-M</description>
 644       <files>
 645         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 646         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 647       </files>
 648     </api>
 649     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 650       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 651       <files>
 652         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 653         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 654         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 655       </files>
 656     </api>
 657     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 658       <description>Ethernet MAC Driver API for Cortex-M</description>
 659       <files>
 660         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 661         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 662       </files>
 663     </api>
 664     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 665       <description>Ethernet PHY Driver API for Cortex-M</description>
 666       <files>
 667         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 668         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 669       </files>
 670     </api>
 671     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 672       <description>USB Device Driver API for Cortex-M</description>
 673       <files>
 674         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 675         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 676       </files>
 677     </api>
 678     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 679       <description>USB Host Driver API for Cortex-M</description>
 680       <files>
 681         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 682         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 683       </files>
 684     </api>
 685   </apis>
 686
 687   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 688   <conditions>
 689     <!-- compiler -->
 690     <condition id="ARMCC6">
 691       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 692       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 693     </condition>
 694     <condition id="ARMCC5">
 695       <require Tcompiler="ARMCC" Toptions="AC5"/>
 696     </condition>
 697     <condition id="ARMCC">
 698       <require Tcompiler="ARMCC"/>
 699     </condition>
 700     <condition id="GCC">
 701       <require Tcompiler="GCC"/>
 702     </condition>
 703     <condition id="IAR">
 704       <require Tcompiler="IAR"/>
 705     </condition>
 706     <condition id="ARMCC GCC">
 707       <accept Tcompiler="ARMCC"/>
 708       <accept Tcompiler="GCC"/>
 709     </condition>
 710     <condition id="ARMCC GCC IAR">
 711       <accept Tcompiler="ARMCC"/>
 712       <accept Tcompiler="GCC"/>
 713       <accept Tcompiler="IAR"/>
 714     </condition>
 715
 716     <!-- ARM architecture -->
 717     <condition id="ARMv6-M Device">
 718       <description>ARMv6-M architecture based device</description>
 719       <accept Dcore="Cortex-M0"/>
 720       <accept Dcore="Cortex-M0+"/>
 721       <accept Dcore="SC000"/>
 722     </condition>
 723     <condition id="ARMv7-M Device">
 724       <description>ARMv7-M architecture based device</description>
 725       <accept Dcore="Cortex-M3"/>
 726       <accept Dcore="Cortex-M4"/>
 727       <accept Dcore="Cortex-M7"/>
 728       <accept Dcore="SC300"/>
 729     </condition>
 730     <condition id="ARMv8-M Device">
 731       <description>ARMv8-M architecture based device</description>
 732       <accept Dcore="ARMV8MBL"/>
 733       <accept Dcore="ARMV8MML"/>
 734       <accept Dcore="Cortex-M23"/>
 735       <accept Dcore="Cortex-M33"/>
 736     </condition>
 737     <condition id="ARMv8-M TZ Device">
 738       <description>ARMv8-M architecture based device with TrustZone</description>
 739       <require condition="ARMv8-M Device"/>
 740       <require Dtz="TZ"/>
 741     </condition>
 742     <condition id="ARMv6_7-M Device">
 743       <description>ARMv6_7-M architecture based device</description>
 744       <accept condition="ARMv6-M Device"/>
 745       <accept condition="ARMv7-M Device"/>
 746     </condition>
 747     <condition id="ARMv6_7_8-M Device">
 748       <description>ARMv6_7_8-M architecture based device</description>
 749       <accept condition="ARMv6-M Device"/>
 750       <accept condition="ARMv7-M Device"/>
 751       <accept condition="ARMv8-M Device"/>
 752     </condition>
 753     <condition id="ARMv7-A Device">
 754       <description>ARMv7-A architecture based device</description>
 755       <accept Dcore="Cortex-A5"/>
 756       <accept Dcore="Cortex-A7"/>
 757       <accept Dcore="Cortex-A9"/>
 758     </condition>
 759
 760     <!-- ARM core -->
 761     <condition id="CM0">
 762       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 763       <accept Dcore="Cortex-M0"/>
 764       <accept Dcore="Cortex-M0+"/>
 765       <accept Dcore="SC000"/>
 766     </condition>
 767     <condition id="CM3">
 768       <description>Cortex-M3 or SC300 processor based device</description>
 769       <accept Dcore="Cortex-M3"/>
 770       <accept Dcore="SC300"/>
 771     </condition>
 772     <condition id="CM4">
 773       <description>Cortex-M4 processor based device</description>
 774       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 775     </condition>
 776     <condition id="CM4_FP">
 777       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 778       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 779     </condition>
 780     <condition id="CM7">
 781       <description>Cortex-M7 processor based device</description>
 782       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 783     </condition>
 784     <condition id="CM7_FP">
 785       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 786       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 787       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 788     </condition>
 789     <condition id="CM7_SP">
 790       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 791       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 792     </condition>
 793     <condition id="CM7_DP">
 794       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 795       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 796     </condition>
 797     <condition id="CM23">
 798       <description>Cortex-M23 processor based device</description>
 799       <require Dcore="Cortex-M23"/>
 800     </condition>
 801     <condition id="CM33">
 802       <description>Cortex-M33 processor based device</description>
 803       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 804     </condition>
 805     <condition id="CM33_FP">
 806       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 807       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 808     </condition>
 809     <condition id="ARMv8MBL">
 810       <description>ARMv8-M Baseline processor based device</description>
 811       <require Dcore="ARMV8MBL"/>
 812     </condition>
 813     <condition id="ARMv8MML">
 814       <description>ARMv8-M Mainline processor based device</description>
 815       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 816     </condition>
 817     <condition id="ARMv8MML_FP">
 818       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 819       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 820       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 821     </condition>
 822
 823     <condition id="CM33_NODSP_NOFPU">
 824       <description>CM33, no DSP, no FPU</description>
 825       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 826     </condition>
 827     <condition id="CM33_DSP_NOFPU">
 828       <description>CM33, DSP, no FPU</description>
 829       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 830     </condition>
 831     <condition id="CM33_NODSP_SP">
 832       <description>CM33, no DSP, SP FPU</description>
 833       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 834     </condition>
 835     <condition id="CM33_DSP_SP">
 836       <description>CM33, DSP, SP FPU</description>
 837       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 838     </condition>
 839
 840     <condition id="ARMv8MML_NODSP_NOFPU">
 841       <description>ARMv8MML, no DSP, no FPU</description>
 842       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 843     </condition>
 844     <condition id="ARMv8MML_DSP_NOFPU">
 845       <description>ARMv8MML, DSP, no FPU</description>
 846       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 847     </condition>
 848     <condition id="ARMv8MML_NODSP_SP">
 849       <description>ARMv8MML, no DSP, SP FPU</description>
 850       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 851     </condition>
 852     <condition id="ARMv8MML_DSP_SP">
 853       <description>ARMv8MML, DSP, SP FPU</description>
 854       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 855     </condition>
 856
 857     <condition id="CA5_CA9">
 858       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 859       <accept Dcore="Cortex-A5"/>
 860       <accept Dcore="Cortex-A9"/>
 861     </condition>
 862
 863     <!-- ARMCC compiler -->
 864     <condition id="CA_ARMCC5">
 865       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
 866       <require condition="ARMv7-A Device"/>
 867       <require condition="ARMCC5"/>
 868     </condition>
 869     <condition id="CA_ARMCC6">
 870       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
 871       <require condition="ARMv7-A Device"/>
 872       <require condition="ARMCC6"/>
 873     </condition>
 874
 875     <condition id="CM0_ARMCC">
 876       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 877       <require condition="CM0"/>
 878       <require Tcompiler="ARMCC"/>
 879     </condition>
 880     <condition id="CM0_LE_ARMCC">
 881       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 882       <require condition="CM0_ARMCC"/>
 883       <require Dendian="Little-endian"/>
 884     </condition>
 885     <condition id="CM0_BE_ARMCC">
 886       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 887       <require condition="CM0_ARMCC"/>
 888       <require Dendian="Big-endian"/>
 889     </condition>
 890
 891     <condition id="CM3_ARMCC">
 892       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 893       <require condition="CM3"/>
 894       <require Tcompiler="ARMCC"/>
 895     </condition>
 896     <condition id="CM3_LE_ARMCC">
 897       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 898       <require condition="CM3_ARMCC"/>
 899       <require Dendian="Little-endian"/>
 900     </condition>
 901     <condition id="CM3_BE_ARMCC">
 902       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 903       <require condition="CM3_ARMCC"/>
 904       <require Dendian="Big-endian"/>
 905     </condition>
 906
 907     <condition id="CM4_ARMCC">
 908       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 909       <require condition="CM4"/>
 910       <require Tcompiler="ARMCC"/>
 911     </condition>
 912     <condition id="CM4_LE_ARMCC">
 913       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 914       <require condition="CM4_ARMCC"/>
 915       <require Dendian="Little-endian"/>
 916     </condition>
 917     <condition id="CM4_BE_ARMCC">
 918       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 919       <require condition="CM4_ARMCC"/>
 920       <require Dendian="Big-endian"/>
 921     </condition>
 922
 923     <condition id="CM4_FP_ARMCC">
 924       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 925       <require condition="CM4_FP"/>
 926       <require Tcompiler="ARMCC"/>
 927     </condition>
 928     <condition id="CM4_FP_LE_ARMCC">
 929       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 930       <require condition="CM4_FP_ARMCC"/>
 931       <require Dendian="Little-endian"/>
 932     </condition>
 933     <condition id="CM4_FP_BE_ARMCC">
 934       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 935       <require condition="CM4_FP_ARMCC"/>
 936       <require Dendian="Big-endian"/>
 937     </condition>
 938
 939     <!-- XMC 4000 Series devices from Infineon require a special library -->
 940     <condition id="CM4_LE_ARMCC_STD">
 941       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
 942       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
 943       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 944       <require Tcompiler="ARMCC"/>
 945     </condition>
 946     <condition id="CM4_LE_ARMCC_IFX">
 947       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
 948       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 949       <require Tcompiler="ARMCC"/>
 950     </condition>
 951     <condition id="CM4_FP_LE_ARMCC_STD">
 952       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
 953       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
 954       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 955       <require Tcompiler="ARMCC"/>
 956     </condition>
 957     <condition id="CM4_FP_LE_ARMCC_IFX">
 958       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
 959       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 960       <require Tcompiler="ARMCC"/>
 961     </condition>
 962
 963     <condition id="CM7_ARMCC">
 964       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 965       <require condition="CM7"/>
 966       <require Tcompiler="ARMCC"/>
 967     </condition>
 968     <condition id="CM7_LE_ARMCC">
 969       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 970       <require condition="CM7_ARMCC"/>
 971       <require Dendian="Little-endian"/>
 972     </condition>
 973     <condition id="CM7_BE_ARMCC">
 974       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 975       <require condition="CM7_ARMCC"/>
 976       <require Dendian="Big-endian"/>
 977     </condition>
 978
 979     <condition id="CM7_FP_ARMCC">
 980       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 981       <require condition="CM7_FP"/>
 982       <require Tcompiler="ARMCC"/>
 983     </condition>
 984     <condition id="CM7_FP_LE_ARMCC">
 985       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 986       <require condition="CM7_FP_ARMCC"/>
 987       <require Dendian="Little-endian"/>
 988     </condition>
 989     <condition id="CM7_FP_BE_ARMCC">
 990       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 991       <require condition="CM7_FP_ARMCC"/>
 992       <require Dendian="Big-endian"/>
 993     </condition>
 994
 995     <condition id="CM7_SP_ARMCC">
 996       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 997       <require condition="CM7_SP"/>
 998       <require Tcompiler="ARMCC"/>
 999     </condition>
1000     <condition id="CM7_SP_LE_ARMCC">
1001       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1002       <require condition="CM7_SP_ARMCC"/>
1003       <require Dendian="Little-endian"/>
1004     </condition>
1005     <condition id="CM7_SP_BE_ARMCC">
1006       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1007       <require condition="CM7_SP_ARMCC"/>
1008       <require Dendian="Big-endian"/>
1009     </condition>
1010
1011     <condition id="CM7_DP_ARMCC">
1012       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1013       <require condition="CM7_DP"/>
1014       <require Tcompiler="ARMCC"/>
1015     </condition>
1016     <condition id="CM7_DP_LE_ARMCC">
1017       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1018       <require condition="CM7_DP_ARMCC"/>
1019       <require Dendian="Little-endian"/>
1020     </condition>
1021     <condition id="CM7_DP_BE_ARMCC">
1022       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1023       <require condition="CM7_DP_ARMCC"/>
1024       <require Dendian="Big-endian"/>
1025     </condition>
1026
1027     <condition id="CM23_ARMCC">
1028       <description>Cortex-M23 processor based device for the ARM Compiler</description>
1029       <require condition="CM23"/>
1030       <require Tcompiler="ARMCC"/>
1031     </condition>
1032     <condition id="CM23_LE_ARMCC">
1033       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1034       <require condition="CM23_ARMCC"/>
1035       <require Dendian="Little-endian"/>
1036     </condition>
1037     <condition id="CM23_BE_ARMCC">
1038       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1039       <require condition="CM23_ARMCC"/>
1040       <require Dendian="Big-endian"/>
1041     </condition>
1042
1043     <condition id="CM33_ARMCC">
1044       <description>Cortex-M33 processor based device for the ARM Compiler</description>
1045       <require condition="CM33"/>
1046       <require Tcompiler="ARMCC"/>
1047     </condition>
1048     <condition id="CM33_LE_ARMCC">
1049       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1050       <require condition="CM33_ARMCC"/>
1051       <require Dendian="Little-endian"/>
1052     </condition>
1053     <condition id="CM33_BE_ARMCC">
1054       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1055       <require condition="CM33_ARMCC"/>
1056       <require Dendian="Big-endian"/>
1057     </condition>
1058
1059     <condition id="CM33_FP_ARMCC">
1060       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1061       <require condition="CM33_FP"/>
1062       <require Tcompiler="ARMCC"/>
1063     </condition>
1064     <condition id="CM33_FP_LE_ARMCC">
1065       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1066       <require condition="CM33_FP_ARMCC"/>
1067       <require Dendian="Little-endian"/>
1068     </condition>
1069     <condition id="CM33_FP_BE_ARMCC">
1070       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1071       <require condition="CM33_FP_ARMCC"/>
1072       <require Dendian="Big-endian"/>
1073     </condition>
1074
1075     <condition id="CM33_NODSP_NOFPU_ARMCC">
1076       <description>CM33, no DSP, no FPU, ARM Compiler</description>
1077       <require condition="CM33_NODSP_NOFPU"/>
1078       <require Tcompiler="ARMCC"/>
1079     </condition>
1080     <condition id="CM33_DSP_NOFPU_ARMCC">
1081       <description>CM33, DSP, no FPU, ARM Compiler</description>
1082       <require condition="CM33_DSP_NOFPU"/>
1083       <require Tcompiler="ARMCC"/>
1084     </condition>
1085     <condition id="CM33_NODSP_SP_ARMCC">
1086       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1087       <require condition="CM33_NODSP_SP"/>
1088       <require Tcompiler="ARMCC"/>
1089     </condition>
1090     <condition id="CM33_DSP_SP_ARMCC">
1091       <description>CM33, DSP, SP FPU, ARM Compiler</description>
1092       <require condition="CM33_DSP_SP"/>
1093       <require Tcompiler="ARMCC"/>
1094     </condition>
1095     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1096       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1097       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1098       <require Dendian="Little-endian"/>
1099     </condition>
1100     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1101       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1102       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1103       <require Dendian="Little-endian"/>
1104     </condition>
1105     <condition id="CM33_NODSP_SP_LE_ARMCC">
1106       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1107       <require condition="CM33_NODSP_SP_ARMCC"/>
1108       <require Dendian="Little-endian"/>
1109     </condition>
1110     <condition id="CM33_DSP_SP_LE_ARMCC">
1111       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
1112       <require condition="CM33_DSP_SP_ARMCC"/>
1113       <require Dendian="Little-endian"/>
1114     </condition>
1115
1116     <condition id="ARMv8MBL_ARMCC">
1117       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1118       <require condition="ARMv8MBL"/>
1119       <require Tcompiler="ARMCC"/>
1120     </condition>
1121     <condition id="ARMv8MBL_LE_ARMCC">
1122       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1123       <require condition="ARMv8MBL_ARMCC"/>
1124       <require Dendian="Little-endian"/>
1125     </condition>
1126     <condition id="ARMv8MBL_BE_ARMCC">
1127       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1128       <require condition="ARMv8MBL_ARMCC"/>
1129       <require Dendian="Big-endian"/>
1130     </condition>
1131
1132     <condition id="ARMv8MML_ARMCC">
1133       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1134       <require condition="ARMv8MML"/>
1135       <require Tcompiler="ARMCC"/>
1136     </condition>
1137     <condition id="ARMv8MML_LE_ARMCC">
1138       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1139       <require condition="ARMv8MML_ARMCC"/>
1140       <require Dendian="Little-endian"/>
1141     </condition>
1142     <condition id="ARMv8MML_BE_ARMCC">
1143       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1144       <require condition="ARMv8MML_ARMCC"/>
1145       <require Dendian="Big-endian"/>
1146     </condition>
1147
1148     <condition id="ARMv8MML_FP_ARMCC">
1149       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1150       <require condition="ARMv8MML_FP"/>
1151       <require Tcompiler="ARMCC"/>
1152     </condition>
1153     <condition id="ARMv8MML_FP_LE_ARMCC">
1154       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1155       <require condition="ARMv8MML_FP_ARMCC"/>
1156       <require Dendian="Little-endian"/>
1157     </condition>
1158     <condition id="ARMv8MML_FP_BE_ARMCC">
1159       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1160       <require condition="ARMv8MML_FP_ARMCC"/>
1161       <require Dendian="Big-endian"/>
1162     </condition>
1163
1164     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1165       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1166       <require condition="ARMv8MML_NODSP_NOFPU"/>
1167       <require Tcompiler="ARMCC"/>
1168     </condition>
1169     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1170       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1171       <require condition="ARMv8MML_DSP_NOFPU"/>
1172       <require Tcompiler="ARMCC"/>
1173     </condition>
1174     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1175       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1176       <require condition="ARMv8MML_NODSP_SP"/>
1177       <require Tcompiler="ARMCC"/>
1178     </condition>
1179     <condition id="ARMv8MML_DSP_SP_ARMCC">
1180       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1181       <require condition="ARMv8MML_DSP_SP"/>
1182       <require Tcompiler="ARMCC"/>
1183     </condition>
1184     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1185       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1186       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1187       <require Dendian="Little-endian"/>
1188     </condition>
1189     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1190       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1191       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1192       <require Dendian="Little-endian"/>
1193     </condition>
1194     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1195       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1196       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1197       <require Dendian="Little-endian"/>
1198     </condition>
1199     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1200       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1201       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1202       <require Dendian="Little-endian"/>
1203     </condition>
1204
1205     <!-- GCC compiler -->
1206     <condition id="CA_GCC">
1207       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1208       <require condition="ARMv7-A Device"/>
1209       <require Tcompiler="GCC"/>
1210     </condition>
1211
1212     <condition id="CM0_GCC">
1213       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1214       <require condition="CM0"/>
1215       <require Tcompiler="GCC"/>
1216     </condition>
1217     <condition id="CM0_LE_GCC">
1218       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1219       <require condition="CM0_GCC"/>
1220       <require Dendian="Little-endian"/>
1221     </condition>
1222     <condition id="CM0_BE_GCC">
1223       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1224       <require condition="CM0_GCC"/>
1225       <require Dendian="Big-endian"/>
1226     </condition>
1227
1228     <condition id="CM3_GCC">
1229       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1230       <require condition="CM3"/>
1231       <require Tcompiler="GCC"/>
1232     </condition>
1233     <condition id="CM3_LE_GCC">
1234       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1235       <require condition="CM3_GCC"/>
1236       <require Dendian="Little-endian"/>
1237     </condition>
1238     <condition id="CM3_BE_GCC">
1239       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1240       <require condition="CM3_GCC"/>
1241       <require Dendian="Big-endian"/>
1242     </condition>
1243
1244     <condition id="CM4_GCC">
1245       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1246       <require condition="CM4"/>
1247       <require Tcompiler="GCC"/>
1248     </condition>
1249     <condition id="CM4_LE_GCC">
1250       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1251       <require condition="CM4_GCC"/>
1252       <require Dendian="Little-endian"/>
1253     </condition>
1254     <condition id="CM4_BE_GCC">
1255       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1256       <require condition="CM4_GCC"/>
1257       <require Dendian="Big-endian"/>
1258     </condition>
1259
1260     <condition id="CM4_FP_GCC">
1261       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1262       <require condition="CM4_FP"/>
1263       <require Tcompiler="GCC"/>
1264     </condition>
1265     <condition id="CM4_FP_LE_GCC">
1266       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1267       <require condition="CM4_FP_GCC"/>
1268       <require Dendian="Little-endian"/>
1269     </condition>
1270     <condition id="CM4_FP_BE_GCC">
1271       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1272       <require condition="CM4_FP_GCC"/>
1273       <require Dendian="Big-endian"/>
1274     </condition>
1275
1276     <!-- XMC 4000 Series devices from Infineon require a special library -->
1277     <condition id="CM4_LE_GCC_STD">
1278       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1279       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1280       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1281       <require Tcompiler="GCC"/>
1282     </condition>
1283     <condition id="CM4_LE_GCC_IFX">
1284       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1285       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1286       <require Tcompiler="GCC"/>
1287     </condition>
1288     <condition id="CM4_FP_LE_GCC_STD">
1289       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1290       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1291       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1292       <require Tcompiler="GCC"/>
1293     </condition>
1294     <condition id="CM4_FP_LE_GCC_IFX">
1295       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1296       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1297       <require Tcompiler="GCC"/>
1298     </condition>
1299
1300     <condition id="CM7_GCC">
1301       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1302       <require condition="CM7"/>
1303       <require Tcompiler="GCC"/>
1304     </condition>
1305     <condition id="CM7_LE_GCC">
1306       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1307       <require condition="CM7_GCC"/>
1308       <require Dendian="Little-endian"/>
1309     </condition>
1310     <condition id="CM7_BE_GCC">
1311       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1312       <require condition="CM7_GCC"/>
1313       <require Dendian="Big-endian"/>
1314     </condition>
1315
1316     <condition id="CM7_FP_GCC">
1317       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1318       <require condition="CM7_FP"/>
1319       <require Tcompiler="GCC"/>
1320     </condition>
1321     <condition id="CM7_FP_LE_GCC">
1322       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1323       <require condition="CM7_FP_GCC"/>
1324       <require Dendian="Little-endian"/>
1325     </condition>
1326     <condition id="CM7_FP_BE_GCC">
1327       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1328       <require condition="CM7_FP_GCC"/>
1329       <require Dendian="Big-endian"/>
1330     </condition>
1331
1332     <condition id="CM7_SP_GCC">
1333       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1334       <require condition="CM7_SP"/>
1335       <require Tcompiler="GCC"/>
1336     </condition>
1337     <condition id="CM7_SP_LE_GCC">
1338       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1339       <require condition="CM7_SP_GCC"/>
1340       <require Dendian="Little-endian"/>
1341     </condition>
1342     <condition id="CM7_SP_BE_GCC">
1343       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1344       <require condition="CM7_SP_GCC"/>
1345       <require Dendian="Big-endian"/>
1346     </condition>
1347
1348     <condition id="CM7_DP_GCC">
1349       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1350       <require condition="CM7_DP"/>
1351       <require Tcompiler="GCC"/>
1352     </condition>
1353     <condition id="CM7_DP_LE_GCC">
1354       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1355       <require condition="CM7_DP_GCC"/>
1356       <require Dendian="Little-endian"/>
1357     </condition>
1358     <condition id="CM7_DP_BE_GCC">
1359       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1360       <require condition="CM7_DP_GCC"/>
1361       <require Dendian="Big-endian"/>
1362     </condition>
1363
1364     <condition id="CM23_GCC">
1365       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1366       <require condition="CM23"/>
1367       <require Tcompiler="GCC"/>
1368     </condition>
1369     <condition id="CM23_LE_GCC">
1370       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1371       <require condition="CM23_GCC"/>
1372       <require Dendian="Little-endian"/>
1373     </condition>
1374     <condition id="CM23_BE_GCC">
1375       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1376       <require condition="CM23_GCC"/>
1377       <require Dendian="Big-endian"/>
1378     </condition>
1379
1380     <condition id="CM33_GCC">
1381       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1382       <require condition="CM33"/>
1383       <require Tcompiler="GCC"/>
1384     </condition>
1385     <condition id="CM33_LE_GCC">
1386       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1387       <require condition="CM33_GCC"/>
1388       <require Dendian="Little-endian"/>
1389     </condition>
1390     <condition id="CM33_BE_GCC">
1391       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1392       <require condition="CM33_GCC"/>
1393       <require Dendian="Big-endian"/>
1394     </condition>
1395
1396     <condition id="CM33_FP_GCC">
1397       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1398       <require condition="CM33_FP"/>
1399       <require Tcompiler="GCC"/>
1400     </condition>
1401     <condition id="CM33_FP_LE_GCC">
1402       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1403       <require condition="CM33_FP_GCC"/>
1404       <require Dendian="Little-endian"/>
1405     </condition>
1406     <condition id="CM33_FP_BE_GCC">
1407       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1408       <require condition="CM33_FP_GCC"/>
1409       <require Dendian="Big-endian"/>
1410     </condition>
1411
1412     <condition id="CM33_NODSP_NOFPU_GCC">
1413       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1414       <require condition="CM33_NODSP_NOFPU"/>
1415       <require Tcompiler="GCC"/>
1416     </condition>
1417     <condition id="CM33_DSP_NOFPU_GCC">
1418       <description>CM33, DSP, no FPU, GCC Compiler</description>
1419       <require condition="CM33_DSP_NOFPU"/>
1420       <require Tcompiler="GCC"/>
1421     </condition>
1422     <condition id="CM33_NODSP_SP_GCC">
1423       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1424       <require condition="CM33_NODSP_SP"/>
1425       <require Tcompiler="GCC"/>
1426     </condition>
1427     <condition id="CM33_DSP_SP_GCC">
1428       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1429       <require condition="CM33_DSP_SP"/>
1430       <require Tcompiler="GCC"/>
1431     </condition>
1432     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1433       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1434       <require condition="CM33_NODSP_NOFPU_GCC"/>
1435       <require Dendian="Little-endian"/>
1436     </condition>
1437     <condition id="CM33_DSP_NOFPU_LE_GCC">
1438       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1439       <require condition="CM33_DSP_NOFPU_GCC"/>
1440       <require Dendian="Little-endian"/>
1441     </condition>
1442     <condition id="CM33_NODSP_SP_LE_GCC">
1443       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1444       <require condition="CM33_NODSP_SP_GCC"/>
1445       <require Dendian="Little-endian"/>
1446     </condition>
1447     <condition id="CM33_DSP_SP_LE_GCC">
1448       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1449       <require condition="CM33_DSP_SP_GCC"/>
1450       <require Dendian="Little-endian"/>
1451     </condition>
1452
1453     <condition id="ARMv8MBL_GCC">
1454       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1455       <require condition="ARMv8MBL"/>
1456       <require Tcompiler="GCC"/>
1457     </condition>
1458     <condition id="ARMv8MBL_LE_GCC">
1459       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1460       <require condition="ARMv8MBL_GCC"/>
1461       <require Dendian="Little-endian"/>
1462     </condition>
1463     <condition id="ARMv8MBL_BE_GCC">
1464       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1465       <require condition="ARMv8MBL_GCC"/>
1466       <require Dendian="Big-endian"/>
1467     </condition>
1468
1469     <condition id="ARMv8MML_GCC">
1470       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1471       <require condition="ARMv8MML"/>
1472       <require Tcompiler="GCC"/>
1473     </condition>
1474     <condition id="ARMv8MML_LE_GCC">
1475       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1476       <require condition="ARMv8MML_GCC"/>
1477       <require Dendian="Little-endian"/>
1478     </condition>
1479     <condition id="ARMv8MML_BE_GCC">
1480       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1481       <require condition="ARMv8MML_GCC"/>
1482       <require Dendian="Big-endian"/>
1483     </condition>
1484
1485     <condition id="ARMv8MML_FP_GCC">
1486       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1487       <require condition="ARMv8MML_FP"/>
1488       <require Tcompiler="GCC"/>
1489     </condition>
1490     <condition id="ARMv8MML_FP_LE_GCC">
1491       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1492       <require condition="ARMv8MML_FP_GCC"/>
1493       <require Dendian="Little-endian"/>
1494     </condition>
1495     <condition id="ARMv8MML_FP_BE_GCC">
1496       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1497       <require condition="ARMv8MML_FP_GCC"/>
1498       <require Dendian="Big-endian"/>
1499     </condition>
1500
1501     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1502       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1503       <require condition="ARMv8MML_NODSP_NOFPU"/>
1504       <require Tcompiler="GCC"/>
1505     </condition>
1506     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1507       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1508       <require condition="ARMv8MML_DSP_NOFPU"/>
1509       <require Tcompiler="GCC"/>
1510     </condition>
1511     <condition id="ARMv8MML_NODSP_SP_GCC">
1512       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1513       <require condition="ARMv8MML_NODSP_SP"/>
1514       <require Tcompiler="GCC"/>
1515     </condition>
1516     <condition id="ARMv8MML_DSP_SP_GCC">
1517       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1518       <require condition="ARMv8MML_DSP_SP"/>
1519       <require Tcompiler="GCC"/>
1520     </condition>
1521     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1522       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1523       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1524       <require Dendian="Little-endian"/>
1525     </condition>
1526     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1527       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1528       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1529       <require Dendian="Little-endian"/>
1530     </condition>
1531     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1532       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1533       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1534       <require Dendian="Little-endian"/>
1535     </condition>
1536     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1537       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1538       <require condition="ARMv8MML_DSP_SP_GCC"/>
1539       <require Dendian="Little-endian"/>
1540     </condition>
1541
1542     <!-- IAR compiler -->
1543     <condition id="CA_IAR">
1544       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1545       <require condition="ARMv7-A Device"/>
1546       <require Tcompiler="IAR"/>
1547     </condition>
1548
1549     <condition id="CM0_IAR">
1550       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1551       <require condition="CM0"/>
1552       <require Tcompiler="IAR"/>
1553     </condition>
1554     <condition id="CM0_LE_IAR">
1555       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1556       <require condition="CM0_IAR"/>
1557       <require Dendian="Little-endian"/>
1558     </condition>
1559     <condition id="CM0_BE_IAR">
1560       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1561       <require condition="CM0_IAR"/>
1562       <require Dendian="Big-endian"/>
1563     </condition>
1564
1565     <condition id="CM3_IAR">
1566       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1567       <require condition="CM3"/>
1568       <require Tcompiler="IAR"/>
1569     </condition>
1570     <condition id="CM3_LE_IAR">
1571       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1572       <require condition="CM3_IAR"/>
1573       <require Dendian="Little-endian"/>
1574     </condition>
1575     <condition id="CM3_BE_IAR">
1576       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1577       <require condition="CM3_IAR"/>
1578       <require Dendian="Big-endian"/>
1579     </condition>
1580
1581     <condition id="CM4_IAR">
1582       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1583       <require condition="CM4"/>
1584       <require Tcompiler="IAR"/>
1585     </condition>
1586     <condition id="CM4_LE_IAR">
1587       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1588       <require condition="CM4_IAR"/>
1589       <require Dendian="Little-endian"/>
1590     </condition>
1591     <condition id="CM4_BE_IAR">
1592       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1593       <require condition="CM4_IAR"/>
1594       <require Dendian="Big-endian"/>
1595     </condition>
1596
1597     <condition id="CM4_FP_IAR">
1598       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1599       <require condition="CM4_FP"/>
1600       <require Tcompiler="IAR"/>
1601     </condition>
1602     <condition id="CM4_FP_LE_IAR">
1603       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1604       <require condition="CM4_FP_IAR"/>
1605       <require Dendian="Little-endian"/>
1606     </condition>
1607     <condition id="CM4_FP_BE_IAR">
1608       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1609       <require condition="CM4_FP_IAR"/>
1610       <require Dendian="Big-endian"/>
1611     </condition>
1612
1613     <condition id="CM7_IAR">
1614       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1615       <require condition="CM7"/>
1616       <require Tcompiler="IAR"/>
1617     </condition>
1618     <condition id="CM7_LE_IAR">
1619       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1620       <require condition="CM7_IAR"/>
1621       <require Dendian="Little-endian"/>
1622     </condition>
1623     <condition id="CM7_BE_IAR">
1624       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1625       <require condition="CM7_IAR"/>
1626       <require Dendian="Big-endian"/>
1627     </condition>
1628
1629     <condition id="CM7_FP_IAR">
1630       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1631       <require condition="CM7_FP"/>
1632       <require Tcompiler="IAR"/>
1633     </condition>
1634     <condition id="CM7_FP_LE_IAR">
1635       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1636       <require condition="CM7_FP_IAR"/>
1637       <require Dendian="Little-endian"/>
1638     </condition>
1639     <condition id="CM7_FP_BE_IAR">
1640       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1641       <require condition="CM7_FP_IAR"/>
1642       <require Dendian="Big-endian"/>
1643     </condition>
1644
1645     <condition id="CM7_SP_IAR">
1646       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1647       <require condition="CM7_SP"/>
1648       <require Tcompiler="IAR"/>
1649     </condition>
1650     <condition id="CM7_SP_LE_IAR">
1651       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1652       <require condition="CM7_SP_IAR"/>
1653       <require Dendian="Little-endian"/>
1654     </condition>
1655     <condition id="CM7_SP_BE_IAR">
1656       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1657       <require condition="CM7_SP_IAR"/>
1658       <require Dendian="Big-endian"/>
1659     </condition>
1660
1661     <condition id="CM7_DP_IAR">
1662       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1663       <require condition="CM7_DP"/>
1664       <require Tcompiler="IAR"/>
1665     </condition>
1666     <condition id="CM7_DP_LE_IAR">
1667       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1668       <require condition="CM7_DP_IAR"/>
1669       <require Dendian="Little-endian"/>
1670     </condition>
1671     <condition id="CM7_DP_BE_IAR">
1672       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1673       <require condition="CM7_DP_IAR"/>
1674       <require Dendian="Big-endian"/>
1675     </condition>
1676
1677     <!-- conditions selecting single devices and CMSIS Core -->
1678     <!-- used for component startup, GCC version is used for C-Startup -->
1679     <condition id="ARMCM0 CMSIS">
1680       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1681       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1682       <require Cclass="CMSIS" Cgroup="CORE"/>
1683     </condition>
1684     <condition id="ARMCM0 CMSIS GCC">
1685       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1686       <require condition="ARMCM0 CMSIS"/>
1687       <require condition="GCC"/>
1688     </condition>
1689
1690     <condition id="ARMCM0+ CMSIS">
1691       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1692       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1693       <require Cclass="CMSIS" Cgroup="CORE"/>
1694     </condition>
1695     <condition id="ARMCM0+ CMSIS GCC">
1696       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1697       <require condition="ARMCM0+ CMSIS"/>
1698       <require condition="GCC"/>
1699     </condition>
1700
1701     <condition id="ARMCM3 CMSIS">
1702       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1703       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1704       <require Cclass="CMSIS" Cgroup="CORE"/>
1705     </condition>
1706     <condition id="ARMCM3 CMSIS GCC">
1707       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1708       <require condition="ARMCM3 CMSIS"/>
1709       <require condition="GCC"/>
1710     </condition>
1711
1712     <condition id="ARMCM4 CMSIS">
1713       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1714       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1715       <require Cclass="CMSIS" Cgroup="CORE"/>
1716     </condition>
1717     <condition id="ARMCM4 CMSIS GCC">
1718       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1719       <require condition="ARMCM4 CMSIS"/>
1720       <require condition="GCC"/>
1721     </condition>
1722
1723     <condition id="ARMCM7 CMSIS">
1724       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1725       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1726       <require Cclass="CMSIS" Cgroup="CORE"/>
1727     </condition>
1728     <condition id="ARMCM7 CMSIS GCC">
1729       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1730       <require condition="ARMCM7 CMSIS"/>
1731       <require condition="GCC"/>
1732     </condition>
1733
1734     <condition id="ARMCM23 CMSIS">
1735       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1736       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1737       <require Cclass="CMSIS" Cgroup="CORE"/>
1738     </condition>
1739     <condition id="ARMCM23 CMSIS GCC">
1740       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1741       <require condition="ARMCM23 CMSIS"/>
1742       <require condition="GCC"/>
1743     </condition>
1744
1745     <condition id="ARMCM33 CMSIS">
1746       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1747       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1748       <require Cclass="CMSIS" Cgroup="CORE"/>
1749     </condition>
1750     <condition id="ARMCM33 CMSIS GCC">
1751       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1752       <require condition="ARMCM33 CMSIS"/>
1753       <require condition="GCC"/>
1754     </condition>
1755
1756     <condition id="ARMSC000 CMSIS">
1757       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1758       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1759       <require Cclass="CMSIS" Cgroup="CORE"/>
1760     </condition>
1761     <condition id="ARMSC000 CMSIS GCC">
1762       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1763       <require condition="ARMSC000 CMSIS"/>
1764       <require condition="GCC"/>
1765     </condition>
1766
1767     <condition id="ARMSC300 CMSIS">
1768       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1769       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1770       <require Cclass="CMSIS" Cgroup="CORE"/>
1771     </condition>
1772     <condition id="ARMSC300 CMSIS GCC">
1773       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1774       <require condition="ARMSC300 CMSIS"/>
1775       <require condition="GCC"/>
1776     </condition>
1777
1778     <condition id="ARMv8MBL CMSIS">
1779       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1780       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1781       <require Cclass="CMSIS" Cgroup="CORE"/>
1782     </condition>
1783     <condition id="ARMv8MBL CMSIS GCC">
1784       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1785       <require condition="ARMv8MBL CMSIS"/>
1786       <require condition="GCC"/>
1787     </condition>
1788
1789     <condition id="ARMv8MML CMSIS">
1790       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1791       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1792       <require Cclass="CMSIS" Cgroup="CORE"/>
1793     </condition>
1794     <condition id="ARMv8MML CMSIS GCC">
1795       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1796       <require condition="ARMv8MML CMSIS"/>
1797       <require condition="GCC"/>
1798     </condition>
1799
1800     <condition id="ARMCA5 CMSIS">
1801       <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1802       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1803       <require Cclass="CMSIS" Cgroup="CORE"/>
1804     </condition>
1805
1806     <condition id="ARMCA7 CMSIS">
1807       <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1808       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1809       <require Cclass="CMSIS" Cgroup="CORE"/>
1810     </condition>
1811
1812     <condition id="ARMCA9 CMSIS">
1813       <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1814       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1815       <require Cclass="CMSIS" Cgroup="CORE"/>
1816     </condition>
1817
1818     <!-- CMSIS DSP -->
1819     <condition id="CMSIS DSP">
1820       <description>Components required for DSP</description>
1821       <require condition="ARMv6_7_8-M Device"/>
1822       <require condition="ARMCC GCC"/>
1823       <require Cclass="CMSIS" Cgroup="CORE"/>
1824     </condition>
1825
1826     <!-- RTOS RTX -->
1827     <condition id="RTOS RTX">
1828       <description>Components required for RTOS RTX</description>
1829       <require condition="ARMv6_7-M Device"/>
1830       <require condition="ARMCC GCC IAR"/>
1831       <require Cclass="Device" Cgroup="Startup"/>
1832       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1833     </condition>
1834     <condition id="RTOS RTX5">
1835       <description>Components required for RTOS RTX5</description>
1836       <require condition="ARMv6_7_8-M Device"/>
1837       <require condition="ARMCC GCC IAR"/>
1838       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1839     </condition>
1840     <condition id="RTOS2 RTX5">
1841       <description>Components required for RTOS2 RTX5</description>
1842       <require condition="ARMv6_7_8-M Device"/>
1843       <require condition="ARMCC GCC IAR"/>
1844       <require Cclass="CMSIS"  Cgroup="CORE"/>
1845       <require Cclass="Device" Cgroup="Startup"/>
1846     </condition>
1847     <condition id="RTOS2 RTX5 v7-A">
1848       <description>Components required for RTOS2 RTX5 v7-A</description>
1849       <require condition="ARMv7-A Device"/>
1850       <require condition="ARMCC GCC IAR"/>
1851       <require Cclass="CMSIS"  Cgroup="CORE"/>
1852       <require Cclass="Device" Cgroup="Startup"/>
1853       <require Cclass="Device" Cgroup="OS Tick"/>
1854       <require Cclass="Device" Cgroup="IRQ Controller"/>
1855     </condition>
1856     <condition id="RTOS2 RTX5 Lib">
1857       <description>Components required for RTOS2 RTX5 Library</description>
1858       <require condition="ARMv6_7_8-M Device"/>
1859       <require condition="ARMCC GCC IAR"/>
1860       <require Cclass="CMSIS"  Cgroup="CORE"/>
1861       <require Cclass="Device" Cgroup="Startup"/>
1862     </condition>
1863     <condition id="RTOS2 RTX5 NS">
1864       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1865       <require condition="ARMv8-M TZ Device"/>
1866       <require condition="ARMCC GCC"/>
1867       <require Cclass="CMSIS"  Cgroup="CORE"/>
1868       <require Cclass="Device" Cgroup="Startup"/>
1869     </condition>
1870
1871     <!-- OS Tick -->
1872     <condition id="OS Tick PTIM">
1873       <description>Components required for OS Tick Private Timer</description>
1874       <require condition="CA5_CA9"/>
1875       <require Cclass="Device" Cgroup="IRQ Controller"/>
1876     </condition>
1877
1878   </conditions>
1879
1880   <components>
1881     <!-- CMSIS-Core component -->
1882     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.1"  condition="ARMv6_7_8-M Device" >
1883       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1884       <files>
1885         <!-- CPU independent -->
1886         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1887         <file category="include" name="CMSIS/Include/"/>
1888         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1889         <!-- Code template -->
1890         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1891         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1892       </files>
1893     </component>
1894
1895     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.0"  condition="ARMv7-A Device" >
1896       <description>CMSIS-CORE for Cortex-A</description>
1897       <files>
1898         <!-- CPU independent -->
1899         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
1900         <file category="include" name="CMSIS/Core_A/Include/"/>
1901       </files>
1902     </component>
1903
1904     <!-- CMSIS-Startup components -->
1905     <!-- Cortex-M0 -->
1906     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1907       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1908       <files>
1909         <!-- include folder / device header file -->
1910         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1911         <!-- startup / system file -->
1912         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1913         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1914         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1915         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1916         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1917       </files>
1918     </component>
1919     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1920       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1921       <files>
1922         <!-- include folder / device header file -->
1923         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1924         <!-- startup / system file -->
1925         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1926         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1927         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1928       </files>
1929     </component>
1930
1931     <!-- Cortex-M0+ -->
1932     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1933       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1934       <files>
1935         <!-- include folder / device header file -->
1936         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1937         <!-- startup / system file -->
1938         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1939         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1940         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1941         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1942         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1943       </files>
1944     </component>
1945     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1946       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1947       <files>
1948         <!-- include folder / device header file -->
1949         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1950         <!-- startup / system file -->
1951         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1952         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1953         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1954       </files>
1955     </component>
1956
1957     <!-- Cortex-M3 -->
1958     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1959       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1960       <files>
1961         <!-- include folder / device header file -->
1962         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1963         <!-- startup / system file -->
1964         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1965         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1966         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1967         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1968         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1969       </files>
1970     </component>
1971     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1972       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1973       <files>
1974         <!-- include folder / device header file -->
1975         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1976         <!-- startup / system file -->
1977         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1978         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1979         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1980       </files>
1981     </component>
1982
1983     <!-- Cortex-M4 -->
1984     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1985       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1986       <files>
1987         <!-- include folder / device header file -->
1988         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1989         <!-- startup / system file -->
1990         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1991         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1992         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1993         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1994         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1995       </files>
1996     </component>
1997     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1998       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1999       <files>
2000         <!-- include folder / device header file -->
2001         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2002         <!-- startup / system file -->
2003         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2004         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2005         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2006       </files>
2007     </component>
2008
2009     <!-- Cortex-M7 -->
2010     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2011       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2012       <files>
2013         <!-- include folder / device header file -->
2014         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2015         <!-- startup / system file -->
2016         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2017         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2018         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2019         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2020         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2021       </files>
2022     </component>
2023     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2024       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2025       <files>
2026         <!-- include folder / device header file -->
2027         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2028         <!-- startup / system file -->
2029         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2030         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2031         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2032       </files>
2033     </component>
2034
2035     <!-- Cortex-M23 -->
2036     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2037       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2038       <files>
2039         <!-- include folder / device header file -->
2040         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2041         <!-- startup / system file -->
2042         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2043         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2044         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2045         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2046         <!-- SAU configuration -->
2047         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2048       </files>
2049     </component>
2050     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2051       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2052       <files>
2053         <!-- include folder / device header file -->
2054         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2055         <!-- startup / system file -->
2056         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2057         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2058         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2059         <!-- SAU configuration -->
2060         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2061       </files>
2062     </component>
2063
2064     <!-- Cortex-M33 -->
2065     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2066       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2067       <files>
2068         <!-- include folder / device header file -->
2069         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2070         <!-- startup / system file -->
2071         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2072         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2073         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2074         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2075         <!-- SAU configuration -->
2076         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2077       </files>
2078     </component>
2079     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2080       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2081       <files>
2082         <!-- include folder / device header file -->
2083         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2084         <!-- startup / system file -->
2085         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2086         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2087         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2088         <!-- SAU configuration -->
2089         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2090       </files>
2091     </component>
2092
2093     <!-- Cortex-SC000 -->
2094     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2095       <description>System and Startup for Generic ARM SC000 device</description>
2096       <files>
2097         <!-- include folder / device header file -->
2098         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2099         <!-- startup / system file -->
2100         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2101         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2102         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2103         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2104         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2105       </files>
2106     </component>
2107     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2108       <description>System and Startup for Generic ARM SC000 device</description>
2109       <files>
2110         <!-- include folder / device header file -->
2111         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2112         <!-- startup / system file -->
2113         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2114         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2115         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2116       </files>
2117     </component>
2118
2119     <!-- Cortex-SC300 -->
2120     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2121       <description>System and Startup for Generic ARM SC300 device</description>
2122       <files>
2123         <!-- include folder / device header file -->
2124         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2125         <!-- startup / system file -->
2126         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2127         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2128         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2129         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2130         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2131       </files>
2132     </component>
2133     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2134       <description>System and Startup for Generic ARM SC300 device</description>
2135       <files>
2136         <!-- include folder / device header file -->
2137         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2138         <!-- startup / system file -->
2139         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2140         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2141         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2142       </files>
2143     </component>
2144
2145     <!-- ARMv8MBL -->
2146     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2147       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2148       <files>
2149         <!-- include folder / device header file -->
2150         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2151         <!-- startup / system file -->
2152         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2153         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2154         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2155         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2156         <!-- SAU configuration -->
2157         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2158       </files>
2159     </component>
2160     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2161       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2162       <files>
2163         <!-- include folder / device header file -->
2164         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2165         <!-- startup / system file -->
2166         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2167         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2168         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2169         <!-- SAU configuration -->
2170         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2171       </files>
2172     </component>
2173
2174     <!-- ARMv8MML -->
2175     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2176       <description>System and Startup for Generic ARM ARMv8MML device</description>
2177       <files>
2178         <!-- include folder / device header file -->
2179         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2180         <!-- startup / system file -->
2181         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2182         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2183         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2184         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2185         <!-- SAU configuration -->
2186         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2187       </files>
2188     </component>
2189     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2190       <description>System and Startup for Generic ARM ARMv8MML device</description>
2191       <files>
2192         <!-- include folder / device header file -->
2193         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2194         <!-- startup / system file -->
2195         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2196         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2197         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2198         <!-- SAU configuration -->
2199         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2200       </files>
2201     </component>
2202
2203     <!-- Cortex-A5 -->
2204     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2205       <description>System and Startup for Generic ARM Cortex-A5 device</description>
2206       <files>
2207         <!-- include folder / device header file -->
2208         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2209         <!-- startup / system / mmu files -->
2210         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2211         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2212         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2213         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2214         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2215         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2216         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2217         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2218
2219       </files>
2220     </component>
2221
2222     <!-- Cortex-A7 -->
2223     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2224       <description>System and Startup for Generic ARM Cortex-A7 device</description>
2225       <files>
2226         <!-- include folder / device header file -->
2227         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2228         <!-- startup / system / mmu files -->
2229         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2230         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2231         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2232         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2233         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2234         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2235         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2236         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2237       </files>
2238     </component>
2239
2240     <!-- Cortex-A9 -->
2241     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA9 CMSIS">
2242       <description>System and Startup for Generic ARM Cortex-A9 device</description>
2243       <files>
2244         <!-- include folder / device header file -->
2245         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2246         <!-- startup / system / mmu files -->
2247         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2248         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2249         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2250         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2251         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2252         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2253         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2254         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2255       </files>
2256     </component>
2257
2258     <!-- IRQ Controller -->
2259     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.0" condition="ARMv7-A Device">
2260       <description>IRQ Controller implementation using GIC</description>
2261       <files>
2262         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2263       </files>
2264     </component>
2265
2266     <!-- OS Tick -->
2267     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick PTIM">
2268       <description>OS Tick implementation using Private Timer</description>
2269       <files>
2270         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2271       </files>
2272     </component>
2273
2274     <!-- CMSIS-DSP component -->
2275     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.1" condition="CMSIS DSP">
2276       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2277       <files>
2278         <!-- CPU independent -->
2279         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2280         <file category="header" name="CMSIS/Include/arm_math.h"/>
2281
2282         <!-- CPU and Compiler dependent -->
2283         <!-- ARMCC -->
2284         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2285         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2286         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2287         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2288         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2289         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2290         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2291         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2292         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2293         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2294         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2295         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2296         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2297         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2298
2299         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2300         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2301         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2302         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2303         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2304         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2305         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2306         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2307         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2308         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2309         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2310         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2311
2312         <!-- GCC -->
2313         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2314         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2315         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2316         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2317         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2318         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2319         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2320
2321         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2322         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2323         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2324         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2325         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2326         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2327         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2328         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2329         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2330         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2331         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2332         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2333
2334       </files>
2335     </component>
2336
2337     <!-- CMSIS-RTOS Keil RTX component -->
2338     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0.0" condition="RTOS RTX">
2339       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2340       <RTE_Components_h>
2341         <!-- the following content goes into file 'RTE_Components.h' -->
2342         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2343         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2344       </RTE_Components_h>
2345       <files>
2346         <!-- CPU independent -->
2347         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2348         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2349         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2350
2351         <!-- RTX templates -->
2352         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2353         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2354         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2355         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2356         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2357         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2358         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2359         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2360         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2361         <!-- tool-chain specific template file -->
2362         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2363         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2364         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2365
2366         <!-- CPU and Compiler dependent -->
2367         <!-- ARMCC -->
2368         <file category="library" condition="CM0_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2369         <file category="library" condition="CM0_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2370         <file category="library" condition="CM3_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2371         <file category="library" condition="CM3_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2372         <file category="library" condition="CM4_LE_ARMCC_STD"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2373         <file category="library" condition="CM4_LE_ARMCC_IFX"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2374         <file category="library" condition="CM4_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2375         <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2376         <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2377         <file category="library" condition="CM4_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2378         <file category="library" condition="CM7_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2379         <file category="library" condition="CM7_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2380         <file category="library" condition="CM7_FP_LE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2381         <file category="library" condition="CM7_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2382         <!-- GCC -->
2383         <file category="library" condition="CM0_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2384         <file category="library" condition="CM0_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2385         <file category="library" condition="CM3_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2386         <file category="library" condition="CM3_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2387         <file category="library" condition="CM4_LE_GCC_STD"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2388         <file category="library" condition="CM4_LE_GCC_IFX"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2389         <file category="library" condition="CM4_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2390         <file category="library" condition="CM4_FP_LE_GCC_STD"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2391         <file category="library" condition="CM4_FP_LE_GCC_IFX"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2392         <file category="library" condition="CM4_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2393         <file category="library" condition="CM7_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2394         <file category="library" condition="CM7_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2395         <file category="library" condition="CM7_FP_LE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2396         <file category="library" condition="CM7_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2397         <!-- IAR -->
2398         <file category="library" condition="CM0_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2399         <file category="library" condition="CM0_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2400         <file category="library" condition="CM3_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2401         <file category="library" condition="CM3_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2402         <file category="library" condition="CM4_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2403         <file category="library" condition="CM4_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2404         <file category="library" condition="CM4_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2405         <file category="library" condition="CM4_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2406         <file category="library" condition="CM7_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2407         <file category="library" condition="CM7_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2408         <file category="library" condition="CM7_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2409         <file category="library" condition="CM7_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2410       </files>
2411     </component>
2412
2413     <!-- CMSIS-RTOS Keil RTX5 component -->
2414     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.0" Capiversion="1.0.0" condition="RTOS RTX5">
2415       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2416       <RTE_Components_h>
2417         <!-- the following content goes into file 'RTE_Components.h' -->
2418         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2419         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2420       </RTE_Components_h>
2421       <files>
2422         <!-- RTX header file -->
2423         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2424         <!-- RTX compatibility module for API V1 -->
2425         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2426       </files>
2427     </component>
2428
2429     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2430     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 Lib">
2431       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2432       <RTE_Components_h>
2433         <!-- the following content goes into file 'RTE_Components.h' -->
2434         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2435         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2436       </RTE_Components_h>
2437       <files>
2438         <!-- RTX documentation -->
2439         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2440
2441         <!-- RTX header files -->
2442         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2443
2444         <!-- RTX configuration -->
2445         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2446         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2447
2448         <!-- RTX templates -->
2449         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2450         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2451         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2452         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2453         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2454         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2455         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2456         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2457         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="2.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2458         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2459
2460         <!-- RTX library configuration -->
2461         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2462
2463         <!-- RTX libraries (CPU and Compiler dependent) -->
2464         <!-- ARMCC -->
2465         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2466         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2467         <file category="library" condition="CM4_LE_ARMCC_STD"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2468         <file category="library" condition="CM4_FP_LE_ARMCC_STD"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2469         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2470         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2471         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2472         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2473         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2474         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2475         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2476         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2477         <!-- GCC -->
2478         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2479         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2480         <file category="library" condition="CM4_LE_GCC_STD"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2481         <file category="library" condition="CM4_FP_LE_GCC_STD"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2482         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2483         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2484         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2485         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2486         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2487         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2488         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2489         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2490         <!-- IAR -->
2491         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2492         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2493         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2494         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2495         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2496         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2497       </files>
2498     </component>
2499     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
2500       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2501       <RTE_Components_h>
2502         <!-- the following content goes into file 'RTE_Components.h' -->
2503         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2504         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2505         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2506       </RTE_Components_h>
2507       <files>
2508         <!-- RTX documentation -->
2509         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2510
2511         <!-- RTX header files -->
2512         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2513
2514         <!-- RTX configuration -->
2515         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2516         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2517
2518         <!-- RTX templates -->
2519         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2520         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2521         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2522         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2523         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2524         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2525         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2526         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2527         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2528
2529         <!-- RTX library configuration -->
2530         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2531
2532         <!-- RTX libraries (CPU and Compiler dependent) -->
2533         <!-- ARMCC -->
2534         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2535         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2536         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2537         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2538         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2539         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2540         <!-- GCC -->
2541         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2542         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2543         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2544         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2545         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2546         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2547       </files>
2548     </component>
2549     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5">
2550       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2551       <RTE_Components_h>
2552         <!-- the following content goes into file 'RTE_Components.h' -->
2553         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2554         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2555         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2556       </RTE_Components_h>
2557       <files>
2558         <!-- RTX documentation -->
2559         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2560
2561         <!-- RTX header files -->
2562         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2563
2564         <!-- RTX configuration -->
2565         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2566         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2567
2568         <!-- RTX templates -->
2569         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2570         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2571         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2572         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2573         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2574         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2575         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2576         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2577         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2578
2579         <!-- RTX sources (core) -->
2580         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2581         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2582         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2583         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2584         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2585         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2586         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2587         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2588         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2589         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2590         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2591         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2592         <!-- RTX sources (library configuration) -->
2593         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2594         <!-- RTX sources (handlers ARMCC) -->
2595         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2596         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2597         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2598         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2599         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2600         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2601         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2602         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2603         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2604         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2605         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2606         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2607         <!-- RTX sources (handlers GCC) -->
2608         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2609         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2610         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2611         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2612         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2613         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2614         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2615         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2616         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2617         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2618         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2619         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2620         <!-- RTX sources (handlers IAR) -->
2621         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2622         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2623         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2624         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2625         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2626         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2627         <!-- OS Tick (SysTick) -->
2628         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2629       </files>
2630     </component>
2631     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 v7-A">
2632       <description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
2633       <RTE_Components_h>
2634         <!-- the following content goes into file 'RTE_Components.h' -->
2635         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2636         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2637         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2638       </RTE_Components_h>
2639       <files>
2640         <!-- RTX documentation -->
2641         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2642
2643         <!-- RTX header files -->
2644         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2645
2646         <!-- RTX configuration -->
2647         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2648         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2649
2650         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2651
2652         <!-- RTX templates -->
2653         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2654         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2655         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2656         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2657         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2658         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2659         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2660         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2661         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2662
2663         <!-- RTX sources (core) -->
2664         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2665         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2666         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2667         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2668         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2669         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2670         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2671         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2672         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2673         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2674         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2675         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2676         <!-- RTX sources (library configuration) -->
2677         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2678         <!-- RTX sources (handlers ARMCC) -->
2679         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
2680         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
2681         <!-- RTX sources (handlers GCC) -->
2682         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
2683         <!-- RTX sources (handlers IAR) -->
2684         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
2685       </files>
2686     </component>
2687     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
2688       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2689       <RTE_Components_h>
2690         <!-- the following content goes into file 'RTE_Components.h' -->
2691         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2692         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2693         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2694         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2695       </RTE_Components_h>
2696       <files>
2697         <!-- RTX documentation -->
2698         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2699
2700         <!-- RTX header files -->
2701         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2702
2703         <!-- RTX configuration -->
2704         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2705         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2706
2707         <!-- RTX templates -->
2708         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2709         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2710         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2711         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2712         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2713         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2714         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2715         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2716         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2717
2718         <!-- RTX sources (core) -->
2719         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2720         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2721         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2722         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2723         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2724         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2725         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2726         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2727         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2728         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2729         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2730         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2731         <!-- RTX sources (library configuration) -->
2732         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2733         <!-- RTX sources (ARMCC handlers) -->
2734         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2735         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2736         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2737         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2738         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2739         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2740         <!-- RTX sources (GCC handlers) -->
2741         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2742         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2743         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2744         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2745         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2746         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2747         <!-- OS Tick (SysTick) -->
2748         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2749       </files>
2750     </component>
2751
2752   </components>
2753
2754   <boards>
2755     <board name="uVision Simulator" vendor="Keil">
2756       <description>uVision Simulator</description>
2757       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2758       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2759       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2760       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2761       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2762       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2763       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2764       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2765       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2766       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2767       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2768       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2769       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2770       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2771       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2772       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2773       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2774       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2775    </board>
2776   </boards>
2777
2778   <examples>
2779     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2780       <description>DSP_Lib Class Marks example</description>
2781       <board name="uVision Simulator" vendor="Keil"/>
2782       <project>
2783         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2784       </project>
2785       <attributes>
2786         <component Cclass="CMSIS" Cgroup="CORE"/>
2787         <component Cclass="CMSIS" Cgroup="DSP"/>
2788         <component Cclass="Device" Cgroup="Startup"/>
2789         <category>Getting Started</category>
2790       </attributes>
2791     </example>
2792
2793     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2794       <description>DSP_Lib Convolution example</description>
2795       <board name="uVision Simulator" vendor="Keil"/>
2796       <project>
2797         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2798       </project>
2799       <attributes>
2800         <component Cclass="CMSIS" Cgroup="CORE"/>
2801         <component Cclass="CMSIS" Cgroup="DSP"/>
2802         <component Cclass="Device" Cgroup="Startup"/>
2803         <category>Getting Started</category>
2804       </attributes>
2805     </example>
2806
2807     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2808       <description>DSP_Lib Dotproduct example</description>
2809       <board name="uVision Simulator" vendor="Keil"/>
2810       <project>
2811         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2812       </project>
2813       <attributes>
2814         <component Cclass="CMSIS" Cgroup="CORE"/>
2815         <component Cclass="CMSIS" Cgroup="DSP"/>
2816         <component Cclass="Device" Cgroup="Startup"/>
2817         <category>Getting Started</category>
2818       </attributes>
2819     </example>
2820
2821     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2822       <description>DSP_Lib FFT Bin example</description>
2823       <board name="uVision Simulator" vendor="Keil"/>
2824       <project>
2825         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2826       </project>
2827       <attributes>
2828         <component Cclass="CMSIS" Cgroup="CORE"/>
2829         <component Cclass="CMSIS" Cgroup="DSP"/>
2830         <component Cclass="Device" Cgroup="Startup"/>
2831         <category>Getting Started</category>
2832       </attributes>
2833     </example>
2834
2835     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2836       <description>DSP_Lib FIR example</description>
2837       <board name="uVision Simulator" vendor="Keil"/>
2838       <project>
2839         <environment name="uv" load="arm_fir_example.uvprojx"/>
2840       </project>
2841       <attributes>
2842         <component Cclass="CMSIS" Cgroup="CORE"/>
2843         <component Cclass="CMSIS" Cgroup="DSP"/>
2844         <component Cclass="Device" Cgroup="Startup"/>
2845         <category>Getting Started</category>
2846       </attributes>
2847     </example>
2848
2849     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2850       <description>DSP_Lib Graphic Equalizer example</description>
2851       <board name="uVision Simulator" vendor="Keil"/>
2852       <project>
2853         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2854       </project>
2855       <attributes>
2856         <component Cclass="CMSIS" Cgroup="CORE"/>
2857         <component Cclass="CMSIS" Cgroup="DSP"/>
2858         <component Cclass="Device" Cgroup="Startup"/>
2859         <category>Getting Started</category>
2860       </attributes>
2861     </example>
2862
2863     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2864       <description>DSP_Lib Linear Interpolation example</description>
2865       <board name="uVision Simulator" vendor="Keil"/>
2866       <project>
2867         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2868       </project>
2869       <attributes>
2870         <component Cclass="CMSIS" Cgroup="CORE"/>
2871         <component Cclass="CMSIS" Cgroup="DSP"/>
2872         <component Cclass="Device" Cgroup="Startup"/>
2873         <category>Getting Started</category>
2874       </attributes>
2875     </example>
2876
2877     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2878       <description>DSP_Lib Matrix example</description>
2879       <board name="uVision Simulator" vendor="Keil"/>
2880       <project>
2881         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2882       </project>
2883       <attributes>
2884         <component Cclass="CMSIS" Cgroup="CORE"/>
2885         <component Cclass="CMSIS" Cgroup="DSP"/>
2886         <component Cclass="Device" Cgroup="Startup"/>
2887         <category>Getting Started</category>
2888       </attributes>
2889     </example>
2890
2891     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2892       <description>DSP_Lib Signal Convergence example</description>
2893       <board name="uVision Simulator" vendor="Keil"/>
2894       <project>
2895         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2896       </project>
2897       <attributes>
2898         <component Cclass="CMSIS" Cgroup="CORE"/>
2899         <component Cclass="CMSIS" Cgroup="DSP"/>
2900         <component Cclass="Device" Cgroup="Startup"/>
2901         <category>Getting Started</category>
2902       </attributes>
2903     </example>
2904
2905     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2906       <description>DSP_Lib Sinus/Cosinus example</description>
2907       <board name="uVision Simulator" vendor="Keil"/>
2908       <project>
2909         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2910       </project>
2911       <attributes>
2912         <component Cclass="CMSIS" Cgroup="CORE"/>
2913         <component Cclass="CMSIS" Cgroup="DSP"/>
2914         <component Cclass="Device" Cgroup="Startup"/>
2915         <category>Getting Started</category>
2916       </attributes>
2917     </example>
2918
2919     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2920       <description>DSP_Lib Variance example</description>
2921       <board name="uVision Simulator" vendor="Keil"/>
2922       <project>
2923         <environment name="uv" load="arm_variance_example.uvprojx"/>
2924       </project>
2925       <attributes>
2926         <component Cclass="CMSIS" Cgroup="CORE"/>
2927         <component Cclass="CMSIS" Cgroup="DSP"/>
2928         <component Cclass="Device" Cgroup="Startup"/>
2929         <category>Getting Started</category>
2930       </attributes>
2931     </example>
2932
2933     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2934       <description>CMSIS-RTOS2 Blinky example</description>
2935       <board name="uVision Simulator" vendor="Keil"/>
2936       <project>
2937         <environment name="uv" load="Blinky.uvprojx"/>
2938       </project>
2939       <attributes>
2940         <component Cclass="CMSIS" Cgroup="CORE"/>
2941         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2942         <component Cclass="Device" Cgroup="Startup"/>
2943         <category>Getting Started</category>
2944       </attributes>
2945     </example>
2946
2947     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2948       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2949       <board name="uVision Simulator" vendor="Keil"/>
2950       <project>
2951         <environment name="uv" load="Blinky.uvprojx"/>
2952       </project>
2953       <attributes>
2954         <component Cclass="CMSIS" Cgroup="CORE"/>
2955         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2956         <component Cclass="Device" Cgroup="Startup"/>
2957         <category>Getting Started</category>
2958       </attributes>
2959     </example>
2960
2961     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2962       <description>Bare-metal secure/non-secure example without RTOS</description>
2963       <board name="uVision Simulator" vendor="Keil"/>
2964       <project>
2965         <environment name="uv" load="NoRTOS.uvmpw"/>
2966       </project>
2967       <attributes>
2968         <component Cclass="CMSIS" Cgroup="CORE"/>
2969         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2970         <component Cclass="Device" Cgroup="Startup"/>
2971         <category>Getting Started</category>
2972       </attributes>
2973     </example>
2974
2975     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2976       <description>Secure/non-secure RTOS example with thread context management</description>
2977       <board name="uVision Simulator" vendor="Keil"/>
2978       <project>
2979         <environment name="uv" load="RTOS.uvmpw"/>
2980       </project>
2981       <attributes>
2982         <component Cclass="CMSIS" Cgroup="CORE"/>
2983         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2984         <component Cclass="Device" Cgroup="Startup"/>
2985         <category>Getting Started</category>
2986       </attributes>
2987     </example>
2988
2989     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2990       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2991       <board name="uVision Simulator" vendor="Keil"/>
2992       <project>
2993         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2994       </project>
2995       <attributes>
2996         <component Cclass="CMSIS" Cgroup="CORE"/>
2997         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2998         <component Cclass="Device" Cgroup="Startup"/>
2999         <category>Getting Started</category>
3000       </attributes>
3001     </example>
3002
3003   </examples>
3004
3005 </package>