begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.3.1-dev6">
  12       Utilities:
  13       - updated SVDConv and PackChk for Win32 and Linux
  14     </release>
  15     <release version="5.3.1-dev5">
  16       Aligned pack structure with repository.
  17       The following folders are deprecated:
  18       - CMSIS/Include/
  19       - CMSIS/DSP_Lib/
  20     </release>
  21     <release version="5.3.1-dev4">
  22       CMSIS-RTOS2:
  23         - API 2.1.3 (see revision history for details)
  24     </release>
  25     <release version="5.3.1-dev3">
  26       RTX5 (Cortex-A): updated exception handling
  27     </release>
  28     <release version="5.3.1-dev2">
  29       CMSIS-RTOS2:
  30         - RTX 5.4.0 (see revision history for details)
  31     </release>
  32     <release version="5.3.1-dev1">
  33       CMSIS-Core(M): 5.1.2 (see revision history for details)
  34       CMSIS-Core(A): 1.1.2 (see revision history for details)
  35       CMSIS-RTOS2:
  36         - RTX 5.3.1 (see revision history for details)
  37       CMSIS-Driver:
  38         - Flash Driver API V2.2.0
  39     </release>
  40     <release version="5.3.1-dev0">
  41       Patch release scheduled for after EW18.
  42     </release>
  43     <release version="5.3.0" date="2018-02-22">
  44       Updated Arm company brand.
  45       CMSIS-Core(M): 5.1.1 (see revision history for details)
  46       CMSIS-Core(A): 1.1.1 (see revision history for details)
  47       CMSIS-DAP: 2.0.0 (see revision history for details)
  48       CMSIS-NN: 1.0.0
  49         - Initial contribution of the bare metal Neural Network Library.
  50       CMSIS-RTOS2:
  51         - RTX 5.3.0 (see revision history for details)
  52         - OS Tick API 1.0.1
  53     </release>
  54     <release version="5.2.0" date="2017-11-16">
  55       CMSIS-Core(M): 5.1.0 (see revision history for details)
  56         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  57         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  58       CMSIS-Core(A): 1.1.0 (see revision history for details)
  59         - Added compiler_iccarm.h.
  60         - Added additional access functions for physical timer.
  61       CMSIS-DAP: 1.2.0 (see revision history for details)
  62       CMSIS-DSP: 1.5.2 (see revision history for details)
  63       CMSIS-Driver: 2.6.0 (see revision history for details)
  64         - CAN Driver API V1.2.0
  65         - NAND Driver API V2.3.0
  66       CMSIS-RTOS:
  67         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
  68       CMSIS-RTOS2:
  69         - API 2.1.2 (see revision history for details)
  70         - RTX 5.2.3 (see revision history for details)
  71       Devices:
  72         - Added GCC startup and linker script for Cortex-A9.
  73         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
  74         - Added IAR startup code for Cortex-A9
  75     </release>
  76     <release version="5.1.1" date="2017-09-19">
  77       CMSIS-RTOS2:
  78       - RTX 5.2.1 (see revision history for details)
  79     </release>
  80     <release version="5.1.0" date="2017-08-04">
  81       CMSIS-Core(M): 5.0.2 (see revision history for details)
  82       - Changed Version Control macros to be core agnostic.
  83       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  84       CMSIS-Core(A): 1.0.0 (see revision history for details)
  85       - Initial release
  86       - IRQ Controller API 1.0.0
  87       CMSIS-Driver: 2.05 (see revision history for details)
  88       - All typedefs related to status have been made volatile.
  89       CMSIS-RTOS2:
  90       - API 2.1.1 (see revision history for details)
  91       - RTX 5.2.0 (see revision history for details)
  92       - OS Tick API 1.0.0
  93       CMSIS-DSP: 1.5.2 (see revision history for details)
  94       - Fixed GNU Compiler specific diagnostics.
  95       CMSIS-PACK: 1.5.0 (see revision history for details)
  96       - added System Description File (*.SDF) Format
  97       CMSIS-Zone: 0.0.1 (Preview)
  98       - Initial specification draft
  99     </release>
 100     <release version="5.0.1" date="2017-02-03">
 101       Package Description:
 102       - added taxonomy for Cclass RTOS
 103       CMSIS-RTOS2:
 104       - API 2.1   (see revision history for details)
 105       - RTX 5.1.0 (see revision history for details)
 106       CMSIS-Core: 5.0.1 (see revision history for details)
 107       - Added __PACKED_STRUCT macro
 108       - Added uVisior support
 109       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 110       - Updated template for secure main function (main_s.c)
 111       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 112       CMSIS-DSP: 1.5.1 (see revision history for details)
 113       - added ARMv8M DSP libraries.
 114       CMSIS-PACK:1.4.9 (see revision history for details)
 115       - added Pack Index File specification and schema file
 116     </release>
 117     <release version="5.0.0" date="2016-11-11">
 118       Changed open source license to Apache 2.0
 119       CMSIS_Core:
 120        - Added support for Cortex-M23 and Cortex-M33.
 121        - Added ARMv8-M device configurations for mainline and baseline.
 122        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 123        - Added cmsis_compiler.h to unify compiler behaviour.
 124        - Updated function SCB_EnableICache (for Cortex-M7).
 125        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 126       CMSIS-RTOS:
 127         - bug fix in RTX 4.82 (see revision history for details)
 128       CMSIS-RTOS2:
 129         - new API including compatibility layer to CMSIS-RTOS
 130         - reference implementation based on RTX5
 131         - supports all Cortex-M variants including TrustZone for ARMv8-M
 132       CMSIS-SVD:
 133        - reworked SVD format documentation
 134        - removed SVD file database documentation as SVD files are distributed in packs
 135        - updated SVDConv for Win32 and Linux
 136       CMSIS-DSP:
 137        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 138        - Added DSP libraries build projects to CMSIS pack.
 139     </release>
 140     <release version="4.5.0" date="2015-10-28">
 141       - CMSIS-Core     4.30.0  (see revision history for details)
 142       - CMSIS-DAP      1.1.0   (unchanged)
 143       - CMSIS-Driver   2.04.0  (see revision history for details)
 144       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 145       - CMSIS-PACK     1.4.1   (see revision history for details)
 146       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 147       - CMSIS-SVD      1.3.1   (see revision history for details)
 148     </release>
 149     <release version="4.4.0" date="2015-09-11">
 150       - CMSIS-Core     4.20   (see revision history for details)
 151       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 152       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 153       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 154       - CMSIS-RTOS
 155         -- API         1.02   (unchanged)
 156         -- RTX         4.79   (see revision history for details)
 157       - CMSIS-SVD      1.3.0  (see revision history for details)
 158       - CMSIS-DAP      1.1.0  (extended with SWO support)
 159     </release>
 160     <release version="4.3.0" date="2015-03-20">
 161       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 162       - CMSIS-DSP      1.4.5  (see revision history for details)
 163       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 164       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 165       - CMSIS-RTOS
 166         -- API         1.02   (unchanged)
 167         -- RTX         4.78   (see revision history for details)
 168       - CMSIS-SVD      1.2    (unchanged)
 169     </release>
 170     <release version="4.2.0" date="2014-09-24">
 171       Adding Cortex-M7 support
 172       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 173       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 174       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 175       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 176       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 177     </release>
 178     <release version="4.1.1" date="2014-06-30">
 179       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 180     </release>
 181     <release version="4.1.0" date="2014-06-12">
 182       - CMSIS-Driver   2.02  (incompatible update)
 183       - CMSIS-Pack     1.3   (see revision history for details)
 184       - CMSIS-DSP      1.4.2 (unchanged)
 185       - CMSIS-Core     3.30  (unchanged)
 186       - CMSIS-RTOS RTX 4.74  (unchanged)
 187       - CMSIS-RTOS API 1.02  (unchanged)
 188       - CMSIS-SVD      1.10  (unchanged)
 189       PACK:
 190       - removed G++ specific files from PACK
 191       - added Component Startup variant "C Startup"
 192       - added Pack Checking Utility
 193       - updated conditions to reflect tool-chain dependency
 194       - added Taxonomy for Graphics
 195       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 196     </release>
 197     <release version="4.0.0">
 198       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 199       - CMSIS-Pack     1.1   Preliminary
 200       - CMSIS-DSP      1.4.2 (see revision history for details)
 201       - CMSIS-Core     3.30  (see revision history for details)
 202       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 203       - CMSIS-RTOS API 1.02  (unchanged)
 204       - CMSIS-SVD      1.10  (unchanged)
 205     </release>
 206     <release version="3.20.4">
 207       - CMSIS-RTOS 4.74 (see revision history for details)
 208       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 209     </release>
 210     <release version="3.20.3">
 211       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 212       - CMSIS-RTOS 4.73 (see revision history for details)
 213     </release>
 214     <release version="3.20.2">
 215       - CMSIS-Pack documentation has been added
 216       - CMSIS-Drivers header and documentation have been added to PACK
 217       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 218     </release>
 219     <release version="3.20.1">
 220       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 221       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 222     </release>
 223     <release version="3.20.0">
 224       The software portions that are deployed in the application program are now under a BSD license which allows usage
 225       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 226       The individual components have been update as listed below:
 227       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 228       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 229       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 230       - CMSIS-SVD is unchanged.
 231     </release>
 232   </releases>
 233
 234   <taxonomy>
 235     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 236     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 237     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 238     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 239     <description Cclass="File System">File Drive Support and File System</description>
 240     <description Cclass="Graphics">Graphical User Interface</description>
 241     <description Cclass="Network">Network Stack using Internet Protocols</description>
 242     <description Cclass="USB">Universal Serial Bus Stack</description>
 243     <description Cclass="Compiler">Compiler Software Extensions</description>
 244     <description Cclass="RTOS">Real-time Operating System</description>
 245   </taxonomy>
 246
 247   <devices>
 248     <!-- ******************************  Cortex-M0  ****************************** -->
 249     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 250       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 251       <description>
 252 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 253 - simple, easy-to-use programmers model
 254 - highly efficient ultra-low power operation
 255 - excellent code density
 256 - deterministic, high-performance interrupt handling
 257 - upward compatibility with the rest of the Cortex-M processor family.
 258       </description>
 259       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 260       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 261       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 262       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 263
 264       <device Dname="ARMCM0">
 265         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 266         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 267       </device>
 268     </family>
 269
 270     <!-- ******************************  Cortex-M0P  ****************************** -->
 271     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 272       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 273       <description>
 274 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 275 - simple, easy-to-use programmers model
 276 - highly efficient ultra-low power operation
 277 - excellent code density
 278 - deterministic, high-performance interrupt handling
 279 - upward compatibility with the rest of the Cortex-M processor family.
 280       </description>
 281       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 282       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 283       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 284       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 285
 286       <device Dname="ARMCM0P">
 287         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 288         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 289       </device>
 290
 291       <device Dname="ARMCM0P_MPU">
 292         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 293         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 294       </device>
 295     </family>
 296
 297     <!-- ******************************  Cortex-M3  ****************************** -->
 298     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 299       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 300       <description>
 301 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 302 - simple, easy-to-use programmers model
 303 - highly efficient ultra-low power operation
 304 - excellent code density
 305 - deterministic, high-performance interrupt handling
 306 - upward compatibility with the rest of the Cortex-M processor family.
 307       </description>
 308       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 309       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 310       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 311       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 312
 313       <device Dname="ARMCM3">
 314         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 315         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 316       </device>
 317     </family>
 318
 319     <!-- ******************************  Cortex-M4  ****************************** -->
 320     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 321       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 322       <description>
 323 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 324 - simple, easy-to-use programmers model
 325 - highly efficient ultra-low power operation
 326 - excellent code density
 327 - deterministic, high-performance interrupt handling
 328 - upward compatibility with the rest of the Cortex-M processor family.
 329       </description>
 330       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 331       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 332       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 333       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 334
 335       <device Dname="ARMCM4">
 336         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 337         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 338       </device>
 339
 340       <device Dname="ARMCM4_FP">
 341         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 342         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 343       </device>
 344     </family>
 345
 346     <!-- ******************************  Cortex-M7  ****************************** -->
 347     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 348       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 349       <description>
 350 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 351 - simple, easy-to-use programmers model
 352 - highly efficient ultra-low power operation
 353 - excellent code density
 354 - deterministic, high-performance interrupt handling
 355 - upward compatibility with the rest of the Cortex-M processor family.
 356       </description>
 357       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 358       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 359       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 360       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 361
 362       <device Dname="ARMCM7">
 363         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 364         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 365       </device>
 366
 367       <device Dname="ARMCM7_SP">
 368         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 369         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 370       </device>
 371
 372       <device Dname="ARMCM7_DP">
 373         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 374         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 375       </device>
 376     </family>
 377
 378     <!-- ******************************  Cortex-M23  ********************** -->
 379     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 380       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 381       <description>
 382 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 383 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 384 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 385       </description>
 386       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 387       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 388       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 389       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 390       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 391       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 392
 393       <device Dname="ARMCM23">
 394         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 395         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 396       </device>
 397
 398       <device Dname="ARMCM23_TZ">
 399         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 400         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 401       </device>
 402     </family>
 403
 404     <!-- ******************************  Cortex-M33  ****************************** -->
 405     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 406       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 407       <description>
 408 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 409 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 410       </description>
 411       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 412       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 413       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 414       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 415       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 416       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 417
 418       <device Dname="ARMCM33">
 419         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 420         <description>
 421           no DSP Instructions, no Floating Point Unit, no TrustZone
 422         </description>
 423         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 424       </device>
 425
 426       <device Dname="ARMCM33_TZ">
 427         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 428         <description>
 429           no DSP Instructions, no Floating Point Unit, TrustZone
 430         </description>
 431         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 432       </device>
 433
 434       <device Dname="ARMCM33_DSP_FP">
 435         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 436         <description>
 437           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 438         </description>
 439         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 440       </device>
 441
 442       <device Dname="ARMCM33_DSP_FP_TZ">
 443         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 444         <description>
 445           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 446         </description>
 447         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 448       </device>
 449     </family>
 450
 451     <!-- ******************************  ARMSC000  ****************************** -->
 452     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 453       <description>
 454 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 455 - simple, easy-to-use programmers model
 456 - highly efficient ultra-low power operation
 457 - excellent code density
 458 - deterministic, high-performance interrupt handling
 459       </description>
 460       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 461       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 462       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 463       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 464
 465       <device Dname="ARMSC000">
 466         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 467         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 468       </device>
 469     </family>
 470
 471     <!-- ******************************  ARMSC300  ****************************** -->
 472     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 473       <description>
 474 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 475 - simple, easy-to-use programmers model
 476 - highly efficient ultra-low power operation
 477 - excellent code density
 478 - deterministic, high-performance interrupt handling
 479       </description>
 480       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 481       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 482       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 483       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 484
 485       <device Dname="ARMSC300">
 486         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 487         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 488       </device>
 489     </family>
 490
 491     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 492     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 493       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 494       <description>
 495 Armv8-M Baseline based device with TrustZone
 496       </description>
 497       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 498       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 499       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 500       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 501       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 502       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 503
 504       <device Dname="ARMv8MBL">
 505         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 506         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 507       </device>
 508     </family>
 509
 510     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 511     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 512       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 513       <description>
 514 Armv8-M Mainline based device with TrustZone
 515       </description>
 516       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 517       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 518       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 519       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 520       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 521       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 522
 523       <device Dname="ARMv8MML">
 524         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 525         <description>
 526           no DSP Instructions, no Floating Point Unit, TrustZone
 527         </description>
 528         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 529       </device>
 530
 531       <device Dname="ARMv8MML_DSP">
 532         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 533         <description>
 534           DSP Instructions, no Floating Point Unit, TrustZone
 535         </description>
 536         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 537       </device>
 538
 539       <device Dname="ARMv8MML_SP">
 540         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 541         <description>
 542           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 543         </description>
 544         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 545       </device>
 546
 547       <device Dname="ARMv8MML_DSP_SP">
 548         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 549         <description>
 550           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 551         </description>
 552         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 553       </device>
 554
 555       <device Dname="ARMv8MML_DP">
 556         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 557         <description>
 558           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 559         </description>
 560         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 561       </device>
 562
 563       <device Dname="ARMv8MML_DSP_DP">
 564         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 565         <description>
 566           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 567         </description>
 568         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 569       </device>
 570     </family>
 571
 572     <!-- ******************************  Cortex-A5  ****************************** -->
 573     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 574       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 575       <description>
 576 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 577 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 578 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 579       </description>
 580
 581       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 582       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 583
 584       <device Dname="ARMCA5">
 585         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 586         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 587       </device>
 588     </family>
 589
 590     <!-- ******************************  Cortex-A7  ****************************** -->
 591     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 592       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 593       <description>
 594 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 595 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 596 an optional integrated GIC, and an optional L2 cache controller.
 597       </description>
 598
 599       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 600       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 601
 602       <device Dname="ARMCA7">
 603         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 604         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 605       </device>
 606     </family>
 607
 608     <!-- ******************************  Cortex-A9  ****************************** -->
 609     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 610       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 611       <description>
 612 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 613 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 614 and 8-bit Java bytecodes in Jazelle state.
 615       </description>
 616
 617       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 618       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 619
 620       <device Dname="ARMCA9">
 621         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 622         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 623       </device>
 624     </family>
 625   </devices>
 626
 627
 628   <apis>
 629     <!-- CMSIS Device API -->
 630     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 631       <description>Device interrupt controller interface</description>
 632       <files>
 633         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 634       </files>
 635     </api>
 636     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 637       <description>RTOS Kernel system tick timer interface</description>
 638       <files>
 639         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 640       </files>
 641     </api>
 642     <!-- CMSIS-RTOS API -->
 643     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 644       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 645       <files>
 646         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 647       </files>
 648     </api>
 649     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 650       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 651       <files>
 652         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 653         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 654       </files>
 655     </api>
 656     <!-- CMSIS Driver API -->
 657     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 658       <description>USART Driver API for Cortex-M</description>
 659       <files>
 660         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 661         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 662       </files>
 663     </api>
 664     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 665       <description>SPI Driver API for Cortex-M</description>
 666       <files>
 667         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 668         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 669       </files>
 670     </api>
 671     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 672       <description>SAI Driver API for Cortex-M</description>
 673       <files>
 674         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 675         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 676       </files>
 677     </api>
 678     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 679       <description>I2C Driver API for Cortex-M</description>
 680       <files>
 681         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 682         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 683       </files>
 684     </api>
 685     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 686       <description>CAN Driver API for Cortex-M</description>
 687       <files>
 688         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 689         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 690       </files>
 691     </api>
 692     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 693       <description>Flash Driver API for Cortex-M</description>
 694       <files>
 695         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 696         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 697       </files>
 698     </api>
 699     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 700       <description>MCI Driver API for Cortex-M</description>
 701       <files>
 702         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 703         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 704       </files>
 705     </api>
 706     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 707       <description>NAND Flash Driver API for Cortex-M</description>
 708       <files>
 709         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 710         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 711       </files>
 712     </api>
 713     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 714       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 715       <files>
 716         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 717         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 718         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 719       </files>
 720     </api>
 721     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 722       <description>Ethernet MAC Driver API for Cortex-M</description>
 723       <files>
 724         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 725         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 726       </files>
 727     </api>
 728     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 729       <description>Ethernet PHY Driver API for Cortex-M</description>
 730       <files>
 731         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 732         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 733       </files>
 734     </api>
 735     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 736       <description>USB Device Driver API for Cortex-M</description>
 737       <files>
 738         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 739         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 740       </files>
 741     </api>
 742     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 743       <description>USB Host Driver API for Cortex-M</description>
 744       <files>
 745         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 746         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 747       </files>
 748     </api>
 749   </apis>
 750
 751   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 752   <conditions>
 753     <!-- compiler -->
 754     <condition id="ARMCC6">
 755       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 756       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 757     </condition>
 758     <condition id="ARMCC5">
 759       <require Tcompiler="ARMCC" Toptions="AC5"/>
 760     </condition>
 761     <condition id="ARMCC">
 762       <require Tcompiler="ARMCC"/>
 763     </condition>
 764     <condition id="GCC">
 765       <require Tcompiler="GCC"/>
 766     </condition>
 767     <condition id="IAR">
 768       <require Tcompiler="IAR"/>
 769     </condition>
 770     <condition id="ARMCC GCC">
 771       <accept Tcompiler="ARMCC"/>
 772       <accept Tcompiler="GCC"/>
 773     </condition>
 774     <condition id="ARMCC GCC IAR">
 775       <accept Tcompiler="ARMCC"/>
 776       <accept Tcompiler="GCC"/>
 777       <accept Tcompiler="IAR"/>
 778     </condition>
 779
 780     <!-- Arm architecture -->
 781     <condition id="ARMv6-M Device">
 782       <description>Armv6-M architecture based device</description>
 783       <accept Dcore="Cortex-M0"/>
 784       <accept Dcore="Cortex-M0+"/>
 785       <accept Dcore="SC000"/>
 786     </condition>
 787     <condition id="ARMv7-M Device">
 788       <description>Armv7-M architecture based device</description>
 789       <accept Dcore="Cortex-M3"/>
 790       <accept Dcore="Cortex-M4"/>
 791       <accept Dcore="Cortex-M7"/>
 792       <accept Dcore="SC300"/>
 793     </condition>
 794     <condition id="ARMv8-M Device">
 795       <description>Armv8-M architecture based device</description>
 796       <accept Dcore="ARMV8MBL"/>
 797       <accept Dcore="ARMV8MML"/>
 798       <accept Dcore="Cortex-M23"/>
 799       <accept Dcore="Cortex-M33"/>
 800     </condition>
 801     <condition id="ARMv8-M TZ Device">
 802       <description>Armv8-M architecture based device with TrustZone</description>
 803       <require condition="ARMv8-M Device"/>
 804       <require Dtz="TZ"/>
 805     </condition>
 806     <condition id="ARMv6_7-M Device">
 807       <description>Armv6_7-M architecture based device</description>
 808       <accept condition="ARMv6-M Device"/>
 809       <accept condition="ARMv7-M Device"/>
 810     </condition>
 811     <condition id="ARMv6_7_8-M Device">
 812       <description>Armv6_7_8-M architecture based device</description>
 813       <accept condition="ARMv6-M Device"/>
 814       <accept condition="ARMv7-M Device"/>
 815       <accept condition="ARMv8-M Device"/>
 816     </condition>
 817     <condition id="ARMv7-A Device">
 818       <description>Armv7-A architecture based device</description>
 819       <accept Dcore="Cortex-A5"/>
 820       <accept Dcore="Cortex-A7"/>
 821       <accept Dcore="Cortex-A9"/>
 822     </condition>
 823
 824     <!-- ARM core -->
 825     <condition id="CM0">
 826       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 827       <accept Dcore="Cortex-M0"/>
 828       <accept Dcore="Cortex-M0+"/>
 829       <accept Dcore="SC000"/>
 830     </condition>
 831     <condition id="CM3">
 832       <description>Cortex-M3 or SC300 processor based device</description>
 833       <accept Dcore="Cortex-M3"/>
 834       <accept Dcore="SC300"/>
 835     </condition>
 836     <condition id="CM4">
 837       <description>Cortex-M4 processor based device</description>
 838       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 839     </condition>
 840     <condition id="CM4_FP">
 841       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 842       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 843       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 844       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 845     </condition>
 846     <condition id="CM7">
 847       <description>Cortex-M7 processor based device</description>
 848       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 849     </condition>
 850     <condition id="CM7_FP">
 851       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 852       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 853       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 854     </condition>
 855     <condition id="CM7_SP">
 856       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 857       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 858     </condition>
 859     <condition id="CM7_DP">
 860       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 861       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 862     </condition>
 863     <condition id="CM23">
 864       <description>Cortex-M23 processor based device</description>
 865       <require Dcore="Cortex-M23"/>
 866     </condition>
 867     <condition id="CM33">
 868       <description>Cortex-M33 processor based device</description>
 869       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 870     </condition>
 871     <condition id="CM33_FP">
 872       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 873       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 874     </condition>
 875     <condition id="ARMv8MBL">
 876       <description>Armv8-M Baseline processor based device</description>
 877       <require Dcore="ARMV8MBL"/>
 878     </condition>
 879     <condition id="ARMv8MML">
 880       <description>Armv8-M Mainline processor based device</description>
 881       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 882     </condition>
 883     <condition id="ARMv8MML_FP">
 884       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
 885       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 886       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 887     </condition>
 888
 889     <condition id="CM33_NODSP_NOFPU">
 890       <description>CM33, no DSP, no FPU</description>
 891       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 892     </condition>
 893     <condition id="CM33_DSP_NOFPU">
 894       <description>CM33, DSP, no FPU</description>
 895       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 896     </condition>
 897     <condition id="CM33_NODSP_SP">
 898       <description>CM33, no DSP, SP FPU</description>
 899       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 900     </condition>
 901     <condition id="CM33_DSP_SP">
 902       <description>CM33, DSP, SP FPU</description>
 903       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 904     </condition>
 905
 906     <condition id="ARMv8MML_NODSP_NOFPU">
 907       <description>Armv8-M Mainline, no DSP, no FPU</description>
 908       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 909     </condition>
 910     <condition id="ARMv8MML_DSP_NOFPU">
 911       <description>Armv8-M Mainline, DSP, no FPU</description>
 912       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 913     </condition>
 914     <condition id="ARMv8MML_NODSP_SP">
 915       <description>Armv8-M Mainline, no DSP, SP FPU</description>
 916       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 917     </condition>
 918     <condition id="ARMv8MML_DSP_SP">
 919       <description>Armv8-M Mainline, DSP, SP FPU</description>
 920       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 921     </condition>
 922
 923     <condition id="CA5_CA9">
 924       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 925       <accept Dcore="Cortex-A5"/>
 926       <accept Dcore="Cortex-A9"/>
 927     </condition>
 928
 929     <condition id="CA7">
 930       <description>Cortex-A7 processor based device</description>
 931       <accept Dcore="Cortex-A7"/>
 932     </condition>
 933
 934     <!-- ARMCC compiler -->
 935     <condition id="CA_ARMCC5">
 936       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
 937       <require condition="ARMv7-A Device"/>
 938       <require condition="ARMCC5"/>
 939     </condition>
 940     <condition id="CA_ARMCC6">
 941       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
 942       <require condition="ARMv7-A Device"/>
 943       <require condition="ARMCC6"/>
 944     </condition>
 945
 946     <condition id="CM0_ARMCC">
 947       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
 948       <require condition="CM0"/>
 949       <require Tcompiler="ARMCC"/>
 950     </condition>
 951     <condition id="CM0_LE_ARMCC">
 952       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
 953       <require condition="CM0_ARMCC"/>
 954       <require Dendian="Little-endian"/>
 955     </condition>
 956     <condition id="CM0_BE_ARMCC">
 957       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
 958       <require condition="CM0_ARMCC"/>
 959       <require Dendian="Big-endian"/>
 960     </condition>
 961
 962     <condition id="CM3_ARMCC">
 963       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
 964       <require condition="CM3"/>
 965       <require Tcompiler="ARMCC"/>
 966     </condition>
 967     <condition id="CM3_LE_ARMCC">
 968       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
 969       <require condition="CM3_ARMCC"/>
 970       <require Dendian="Little-endian"/>
 971     </condition>
 972     <condition id="CM3_BE_ARMCC">
 973       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
 974       <require condition="CM3_ARMCC"/>
 975       <require Dendian="Big-endian"/>
 976     </condition>
 977
 978     <condition id="CM4_ARMCC">
 979       <description>Cortex-M4 processor based device for the Arm Compiler</description>
 980       <require condition="CM4"/>
 981       <require Tcompiler="ARMCC"/>
 982     </condition>
 983     <condition id="CM4_LE_ARMCC">
 984       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
 985       <require condition="CM4_ARMCC"/>
 986       <require Dendian="Little-endian"/>
 987     </condition>
 988     <condition id="CM4_BE_ARMCC">
 989       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
 990       <require condition="CM4_ARMCC"/>
 991       <require Dendian="Big-endian"/>
 992     </condition>
 993
 994     <condition id="CM4_FP_ARMCC">
 995       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
 996       <require condition="CM4_FP"/>
 997       <require Tcompiler="ARMCC"/>
 998     </condition>
 999     <condition id="CM4_FP_LE_ARMCC">
1000       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1001       <require condition="CM4_FP_ARMCC"/>
1002       <require Dendian="Little-endian"/>
1003     </condition>
1004     <condition id="CM4_FP_BE_ARMCC">
1005       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1006       <require condition="CM4_FP_ARMCC"/>
1007       <require Dendian="Big-endian"/>
1008     </condition>
1009
1010     <condition id="CM7_ARMCC">
1011       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1012       <require condition="CM7"/>
1013       <require Tcompiler="ARMCC"/>
1014     </condition>
1015     <condition id="CM7_LE_ARMCC">
1016       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1017       <require condition="CM7_ARMCC"/>
1018       <require Dendian="Little-endian"/>
1019     </condition>
1020     <condition id="CM7_BE_ARMCC">
1021       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1022       <require condition="CM7_ARMCC"/>
1023       <require Dendian="Big-endian"/>
1024     </condition>
1025
1026     <condition id="CM7_FP_ARMCC">
1027       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1028       <require condition="CM7_FP"/>
1029       <require Tcompiler="ARMCC"/>
1030     </condition>
1031     <condition id="CM7_FP_LE_ARMCC">
1032       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1033       <require condition="CM7_FP_ARMCC"/>
1034       <require Dendian="Little-endian"/>
1035     </condition>
1036     <condition id="CM7_FP_BE_ARMCC">
1037       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1038       <require condition="CM7_FP_ARMCC"/>
1039       <require Dendian="Big-endian"/>
1040     </condition>
1041
1042     <condition id="CM7_SP_ARMCC">
1043       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1044       <require condition="CM7_SP"/>
1045       <require Tcompiler="ARMCC"/>
1046     </condition>
1047     <condition id="CM7_SP_LE_ARMCC">
1048       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1049       <require condition="CM7_SP_ARMCC"/>
1050       <require Dendian="Little-endian"/>
1051     </condition>
1052     <condition id="CM7_SP_BE_ARMCC">
1053       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1054       <require condition="CM7_SP_ARMCC"/>
1055       <require Dendian="Big-endian"/>
1056     </condition>
1057
1058     <condition id="CM7_DP_ARMCC">
1059       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1060       <require condition="CM7_DP"/>
1061       <require Tcompiler="ARMCC"/>
1062     </condition>
1063     <condition id="CM7_DP_LE_ARMCC">
1064       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1065       <require condition="CM7_DP_ARMCC"/>
1066       <require Dendian="Little-endian"/>
1067     </condition>
1068     <condition id="CM7_DP_BE_ARMCC">
1069       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1070       <require condition="CM7_DP_ARMCC"/>
1071       <require Dendian="Big-endian"/>
1072     </condition>
1073
1074     <condition id="CM23_ARMCC">
1075       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1076       <require condition="CM23"/>
1077       <require Tcompiler="ARMCC"/>
1078     </condition>
1079     <condition id="CM23_LE_ARMCC">
1080       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1081       <require condition="CM23_ARMCC"/>
1082       <require Dendian="Little-endian"/>
1083     </condition>
1084     <condition id="CM23_BE_ARMCC">
1085       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1086       <require condition="CM23_ARMCC"/>
1087       <require Dendian="Big-endian"/>
1088     </condition>
1089
1090     <condition id="CM33_ARMCC">
1091       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1092       <require condition="CM33"/>
1093       <require Tcompiler="ARMCC"/>
1094     </condition>
1095     <condition id="CM33_LE_ARMCC">
1096       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1097       <require condition="CM33_ARMCC"/>
1098       <require Dendian="Little-endian"/>
1099     </condition>
1100     <condition id="CM33_BE_ARMCC">
1101       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1102       <require condition="CM33_ARMCC"/>
1103       <require Dendian="Big-endian"/>
1104     </condition>
1105
1106     <condition id="CM33_FP_ARMCC">
1107       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1108       <require condition="CM33_FP"/>
1109       <require Tcompiler="ARMCC"/>
1110     </condition>
1111     <condition id="CM33_FP_LE_ARMCC">
1112       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1113       <require condition="CM33_FP_ARMCC"/>
1114       <require Dendian="Little-endian"/>
1115     </condition>
1116     <condition id="CM33_FP_BE_ARMCC">
1117       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1118       <require condition="CM33_FP_ARMCC"/>
1119       <require Dendian="Big-endian"/>
1120     </condition>
1121
1122     <condition id="CM33_NODSP_NOFPU_ARMCC">
1123       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1124       <require condition="CM33_NODSP_NOFPU"/>
1125       <require Tcompiler="ARMCC"/>
1126     </condition>
1127     <condition id="CM33_DSP_NOFPU_ARMCC">
1128       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1129       <require condition="CM33_DSP_NOFPU"/>
1130       <require Tcompiler="ARMCC"/>
1131     </condition>
1132     <condition id="CM33_NODSP_SP_ARMCC">
1133       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1134       <require condition="CM33_NODSP_SP"/>
1135       <require Tcompiler="ARMCC"/>
1136     </condition>
1137     <condition id="CM33_DSP_SP_ARMCC">
1138       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1139       <require condition="CM33_DSP_SP"/>
1140       <require Tcompiler="ARMCC"/>
1141     </condition>
1142     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1143       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1144       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1145       <require Dendian="Little-endian"/>
1146     </condition>
1147     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1148       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1149       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1150       <require Dendian="Little-endian"/>
1151     </condition>
1152     <condition id="CM33_NODSP_SP_LE_ARMCC">
1153       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1154       <require condition="CM33_NODSP_SP_ARMCC"/>
1155       <require Dendian="Little-endian"/>
1156     </condition>
1157     <condition id="CM33_DSP_SP_LE_ARMCC">
1158       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1159       <require condition="CM33_DSP_SP_ARMCC"/>
1160       <require Dendian="Little-endian"/>
1161     </condition>
1162
1163     <condition id="ARMv8MBL_ARMCC">
1164       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1165       <require condition="ARMv8MBL"/>
1166       <require Tcompiler="ARMCC"/>
1167     </condition>
1168     <condition id="ARMv8MBL_LE_ARMCC">
1169       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1170       <require condition="ARMv8MBL_ARMCC"/>
1171       <require Dendian="Little-endian"/>
1172     </condition>
1173     <condition id="ARMv8MBL_BE_ARMCC">
1174       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1175       <require condition="ARMv8MBL_ARMCC"/>
1176       <require Dendian="Big-endian"/>
1177     </condition>
1178
1179     <condition id="ARMv8MML_ARMCC">
1180       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1181       <require condition="ARMv8MML"/>
1182       <require Tcompiler="ARMCC"/>
1183     </condition>
1184     <condition id="ARMv8MML_LE_ARMCC">
1185       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1186       <require condition="ARMv8MML_ARMCC"/>
1187       <require Dendian="Little-endian"/>
1188     </condition>
1189     <condition id="ARMv8MML_BE_ARMCC">
1190       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1191       <require condition="ARMv8MML_ARMCC"/>
1192       <require Dendian="Big-endian"/>
1193     </condition>
1194
1195     <condition id="ARMv8MML_FP_ARMCC">
1196       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1197       <require condition="ARMv8MML_FP"/>
1198       <require Tcompiler="ARMCC"/>
1199     </condition>
1200     <condition id="ARMv8MML_FP_LE_ARMCC">
1201       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1202       <require condition="ARMv8MML_FP_ARMCC"/>
1203       <require Dendian="Little-endian"/>
1204     </condition>
1205     <condition id="ARMv8MML_FP_BE_ARMCC">
1206       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1207       <require condition="ARMv8MML_FP_ARMCC"/>
1208       <require Dendian="Big-endian"/>
1209     </condition>
1210
1211     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1212       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1213       <require condition="ARMv8MML_NODSP_NOFPU"/>
1214       <require Tcompiler="ARMCC"/>
1215     </condition>
1216     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1217       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1218       <require condition="ARMv8MML_DSP_NOFPU"/>
1219       <require Tcompiler="ARMCC"/>
1220     </condition>
1221     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1222       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1223       <require condition="ARMv8MML_NODSP_SP"/>
1224       <require Tcompiler="ARMCC"/>
1225     </condition>
1226     <condition id="ARMv8MML_DSP_SP_ARMCC">
1227       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1228       <require condition="ARMv8MML_DSP_SP"/>
1229       <require Tcompiler="ARMCC"/>
1230     </condition>
1231     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1232       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1233       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1234       <require Dendian="Little-endian"/>
1235     </condition>
1236     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1237       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1238       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1239       <require Dendian="Little-endian"/>
1240     </condition>
1241     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1242       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1243       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1244       <require Dendian="Little-endian"/>
1245     </condition>
1246     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1247       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1248       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1249       <require Dendian="Little-endian"/>
1250     </condition>
1251
1252     <!-- GCC compiler -->
1253     <condition id="CA_GCC">
1254       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1255       <require condition="ARMv7-A Device"/>
1256       <require Tcompiler="GCC"/>
1257     </condition>
1258
1259     <condition id="CM0_GCC">
1260       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1261       <require condition="CM0"/>
1262       <require Tcompiler="GCC"/>
1263     </condition>
1264     <condition id="CM0_LE_GCC">
1265       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1266       <require condition="CM0_GCC"/>
1267       <require Dendian="Little-endian"/>
1268     </condition>
1269     <condition id="CM0_BE_GCC">
1270       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1271       <require condition="CM0_GCC"/>
1272       <require Dendian="Big-endian"/>
1273     </condition>
1274
1275     <condition id="CM3_GCC">
1276       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1277       <require condition="CM3"/>
1278       <require Tcompiler="GCC"/>
1279     </condition>
1280     <condition id="CM3_LE_GCC">
1281       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1282       <require condition="CM3_GCC"/>
1283       <require Dendian="Little-endian"/>
1284     </condition>
1285     <condition id="CM3_BE_GCC">
1286       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1287       <require condition="CM3_GCC"/>
1288       <require Dendian="Big-endian"/>
1289     </condition>
1290
1291     <condition id="CM4_GCC">
1292       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1293       <require condition="CM4"/>
1294       <require Tcompiler="GCC"/>
1295     </condition>
1296     <condition id="CM4_LE_GCC">
1297       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1298       <require condition="CM4_GCC"/>
1299       <require Dendian="Little-endian"/>
1300     </condition>
1301     <condition id="CM4_BE_GCC">
1302       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1303       <require condition="CM4_GCC"/>
1304       <require Dendian="Big-endian"/>
1305     </condition>
1306
1307     <condition id="CM4_FP_GCC">
1308       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1309       <require condition="CM4_FP"/>
1310       <require Tcompiler="GCC"/>
1311     </condition>
1312     <condition id="CM4_FP_LE_GCC">
1313       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1314       <require condition="CM4_FP_GCC"/>
1315       <require Dendian="Little-endian"/>
1316     </condition>
1317     <condition id="CM4_FP_BE_GCC">
1318       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1319       <require condition="CM4_FP_GCC"/>
1320       <require Dendian="Big-endian"/>
1321     </condition>
1322
1323     <condition id="CM7_GCC">
1324       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1325       <require condition="CM7"/>
1326       <require Tcompiler="GCC"/>
1327     </condition>
1328     <condition id="CM7_LE_GCC">
1329       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1330       <require condition="CM7_GCC"/>
1331       <require Dendian="Little-endian"/>
1332     </condition>
1333     <condition id="CM7_BE_GCC">
1334       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1335       <require condition="CM7_GCC"/>
1336       <require Dendian="Big-endian"/>
1337     </condition>
1338
1339     <condition id="CM7_FP_GCC">
1340       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1341       <require condition="CM7_FP"/>
1342       <require Tcompiler="GCC"/>
1343     </condition>
1344     <condition id="CM7_FP_LE_GCC">
1345       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1346       <require condition="CM7_FP_GCC"/>
1347       <require Dendian="Little-endian"/>
1348     </condition>
1349     <condition id="CM7_FP_BE_GCC">
1350       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1351       <require condition="CM7_FP_GCC"/>
1352       <require Dendian="Big-endian"/>
1353     </condition>
1354
1355     <condition id="CM7_SP_GCC">
1356       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1357       <require condition="CM7_SP"/>
1358       <require Tcompiler="GCC"/>
1359     </condition>
1360     <condition id="CM7_SP_LE_GCC">
1361       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1362       <require condition="CM7_SP_GCC"/>
1363       <require Dendian="Little-endian"/>
1364     </condition>
1365     <condition id="CM7_SP_BE_GCC">
1366       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1367       <require condition="CM7_SP_GCC"/>
1368       <require Dendian="Big-endian"/>
1369     </condition>
1370
1371     <condition id="CM7_DP_GCC">
1372       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1373       <require condition="CM7_DP"/>
1374       <require Tcompiler="GCC"/>
1375     </condition>
1376     <condition id="CM7_DP_LE_GCC">
1377       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1378       <require condition="CM7_DP_GCC"/>
1379       <require Dendian="Little-endian"/>
1380     </condition>
1381     <condition id="CM7_DP_BE_GCC">
1382       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1383       <require condition="CM7_DP_GCC"/>
1384       <require Dendian="Big-endian"/>
1385     </condition>
1386
1387     <condition id="CM23_GCC">
1388       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1389       <require condition="CM23"/>
1390       <require Tcompiler="GCC"/>
1391     </condition>
1392     <condition id="CM23_LE_GCC">
1393       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1394       <require condition="CM23_GCC"/>
1395       <require Dendian="Little-endian"/>
1396     </condition>
1397     <condition id="CM23_BE_GCC">
1398       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1399       <require condition="CM23_GCC"/>
1400       <require Dendian="Big-endian"/>
1401     </condition>
1402
1403     <condition id="CM33_GCC">
1404       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1405       <require condition="CM33"/>
1406       <require Tcompiler="GCC"/>
1407     </condition>
1408     <condition id="CM33_LE_GCC">
1409       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1410       <require condition="CM33_GCC"/>
1411       <require Dendian="Little-endian"/>
1412     </condition>
1413     <condition id="CM33_BE_GCC">
1414       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1415       <require condition="CM33_GCC"/>
1416       <require Dendian="Big-endian"/>
1417     </condition>
1418
1419     <condition id="CM33_FP_GCC">
1420       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1421       <require condition="CM33_FP"/>
1422       <require Tcompiler="GCC"/>
1423     </condition>
1424     <condition id="CM33_FP_LE_GCC">
1425       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1426       <require condition="CM33_FP_GCC"/>
1427       <require Dendian="Little-endian"/>
1428     </condition>
1429     <condition id="CM33_FP_BE_GCC">
1430       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1431       <require condition="CM33_FP_GCC"/>
1432       <require Dendian="Big-endian"/>
1433     </condition>
1434
1435     <condition id="CM33_NODSP_NOFPU_GCC">
1436       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1437       <require condition="CM33_NODSP_NOFPU"/>
1438       <require Tcompiler="GCC"/>
1439     </condition>
1440     <condition id="CM33_DSP_NOFPU_GCC">
1441       <description>CM33, DSP, no FPU, GCC Compiler</description>
1442       <require condition="CM33_DSP_NOFPU"/>
1443       <require Tcompiler="GCC"/>
1444     </condition>
1445     <condition id="CM33_NODSP_SP_GCC">
1446       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1447       <require condition="CM33_NODSP_SP"/>
1448       <require Tcompiler="GCC"/>
1449     </condition>
1450     <condition id="CM33_DSP_SP_GCC">
1451       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1452       <require condition="CM33_DSP_SP"/>
1453       <require Tcompiler="GCC"/>
1454     </condition>
1455     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1456       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1457       <require condition="CM33_NODSP_NOFPU_GCC"/>
1458       <require Dendian="Little-endian"/>
1459     </condition>
1460     <condition id="CM33_DSP_NOFPU_LE_GCC">
1461       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1462       <require condition="CM33_DSP_NOFPU_GCC"/>
1463       <require Dendian="Little-endian"/>
1464     </condition>
1465     <condition id="CM33_NODSP_SP_LE_GCC">
1466       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1467       <require condition="CM33_NODSP_SP_GCC"/>
1468       <require Dendian="Little-endian"/>
1469     </condition>
1470     <condition id="CM33_DSP_SP_LE_GCC">
1471       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1472       <require condition="CM33_DSP_SP_GCC"/>
1473       <require Dendian="Little-endian"/>
1474     </condition>
1475
1476     <condition id="ARMv8MBL_GCC">
1477       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1478       <require condition="ARMv8MBL"/>
1479       <require Tcompiler="GCC"/>
1480     </condition>
1481     <condition id="ARMv8MBL_LE_GCC">
1482       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1483       <require condition="ARMv8MBL_GCC"/>
1484       <require Dendian="Little-endian"/>
1485     </condition>
1486     <condition id="ARMv8MBL_BE_GCC">
1487       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1488       <require condition="ARMv8MBL_GCC"/>
1489       <require Dendian="Big-endian"/>
1490     </condition>
1491
1492     <condition id="ARMv8MML_GCC">
1493       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1494       <require condition="ARMv8MML"/>
1495       <require Tcompiler="GCC"/>
1496     </condition>
1497     <condition id="ARMv8MML_LE_GCC">
1498       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1499       <require condition="ARMv8MML_GCC"/>
1500       <require Dendian="Little-endian"/>
1501     </condition>
1502     <condition id="ARMv8MML_BE_GCC">
1503       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1504       <require condition="ARMv8MML_GCC"/>
1505       <require Dendian="Big-endian"/>
1506     </condition>
1507
1508     <condition id="ARMv8MML_FP_GCC">
1509       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1510       <require condition="ARMv8MML_FP"/>
1511       <require Tcompiler="GCC"/>
1512     </condition>
1513     <condition id="ARMv8MML_FP_LE_GCC">
1514       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1515       <require condition="ARMv8MML_FP_GCC"/>
1516       <require Dendian="Little-endian"/>
1517     </condition>
1518     <condition id="ARMv8MML_FP_BE_GCC">
1519       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1520       <require condition="ARMv8MML_FP_GCC"/>
1521       <require Dendian="Big-endian"/>
1522     </condition>
1523
1524     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1525       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1526       <require condition="ARMv8MML_NODSP_NOFPU"/>
1527       <require Tcompiler="GCC"/>
1528     </condition>
1529     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1530       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1531       <require condition="ARMv8MML_DSP_NOFPU"/>
1532       <require Tcompiler="GCC"/>
1533     </condition>
1534     <condition id="ARMv8MML_NODSP_SP_GCC">
1535       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1536       <require condition="ARMv8MML_NODSP_SP"/>
1537       <require Tcompiler="GCC"/>
1538     </condition>
1539     <condition id="ARMv8MML_DSP_SP_GCC">
1540       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1541       <require condition="ARMv8MML_DSP_SP"/>
1542       <require Tcompiler="GCC"/>
1543     </condition>
1544     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1545       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1546       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1547       <require Dendian="Little-endian"/>
1548     </condition>
1549     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1550       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1551       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1552       <require Dendian="Little-endian"/>
1553     </condition>
1554     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1555       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1556       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1557       <require Dendian="Little-endian"/>
1558     </condition>
1559     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1560       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1561       <require condition="ARMv8MML_DSP_SP_GCC"/>
1562       <require Dendian="Little-endian"/>
1563     </condition>
1564
1565     <!-- IAR compiler -->
1566     <condition id="CA_IAR">
1567       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1568       <require condition="ARMv7-A Device"/>
1569       <require Tcompiler="IAR"/>
1570     </condition>
1571
1572     <condition id="CM0_IAR">
1573       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1574       <require condition="CM0"/>
1575       <require Tcompiler="IAR"/>
1576     </condition>
1577     <condition id="CM0_LE_IAR">
1578       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1579       <require condition="CM0_IAR"/>
1580       <require Dendian="Little-endian"/>
1581     </condition>
1582     <condition id="CM0_BE_IAR">
1583       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1584       <require condition="CM0_IAR"/>
1585       <require Dendian="Big-endian"/>
1586     </condition>
1587
1588     <condition id="CM3_IAR">
1589       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1590       <require condition="CM3"/>
1591       <require Tcompiler="IAR"/>
1592     </condition>
1593     <condition id="CM3_LE_IAR">
1594       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1595       <require condition="CM3_IAR"/>
1596       <require Dendian="Little-endian"/>
1597     </condition>
1598     <condition id="CM3_BE_IAR">
1599       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1600       <require condition="CM3_IAR"/>
1601       <require Dendian="Big-endian"/>
1602     </condition>
1603
1604     <condition id="CM4_IAR">
1605       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1606       <require condition="CM4"/>
1607       <require Tcompiler="IAR"/>
1608     </condition>
1609     <condition id="CM4_LE_IAR">
1610       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1611       <require condition="CM4_IAR"/>
1612       <require Dendian="Little-endian"/>
1613     </condition>
1614     <condition id="CM4_BE_IAR">
1615       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1616       <require condition="CM4_IAR"/>
1617       <require Dendian="Big-endian"/>
1618     </condition>
1619
1620     <condition id="CM4_FP_IAR">
1621       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1622       <require condition="CM4_FP"/>
1623       <require Tcompiler="IAR"/>
1624     </condition>
1625     <condition id="CM4_FP_LE_IAR">
1626       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1627       <require condition="CM4_FP_IAR"/>
1628       <require Dendian="Little-endian"/>
1629     </condition>
1630     <condition id="CM4_FP_BE_IAR">
1631       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1632       <require condition="CM4_FP_IAR"/>
1633       <require Dendian="Big-endian"/>
1634     </condition>
1635
1636     <condition id="CM7_IAR">
1637       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1638       <require condition="CM7"/>
1639       <require Tcompiler="IAR"/>
1640     </condition>
1641     <condition id="CM7_LE_IAR">
1642       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1643       <require condition="CM7_IAR"/>
1644       <require Dendian="Little-endian"/>
1645     </condition>
1646     <condition id="CM7_BE_IAR">
1647       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1648       <require condition="CM7_IAR"/>
1649       <require Dendian="Big-endian"/>
1650     </condition>
1651
1652     <condition id="CM7_FP_IAR">
1653       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1654       <require condition="CM7_FP"/>
1655       <require Tcompiler="IAR"/>
1656     </condition>
1657     <condition id="CM7_FP_LE_IAR">
1658       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1659       <require condition="CM7_FP_IAR"/>
1660       <require Dendian="Little-endian"/>
1661     </condition>
1662     <condition id="CM7_FP_BE_IAR">
1663       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1664       <require condition="CM7_FP_IAR"/>
1665       <require Dendian="Big-endian"/>
1666     </condition>
1667
1668     <condition id="CM7_SP_IAR">
1669       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1670       <require condition="CM7_SP"/>
1671       <require Tcompiler="IAR"/>
1672     </condition>
1673     <condition id="CM7_SP_LE_IAR">
1674       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1675       <require condition="CM7_SP_IAR"/>
1676       <require Dendian="Little-endian"/>
1677     </condition>
1678     <condition id="CM7_SP_BE_IAR">
1679       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1680       <require condition="CM7_SP_IAR"/>
1681       <require Dendian="Big-endian"/>
1682     </condition>
1683
1684     <condition id="CM7_DP_IAR">
1685       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1686       <require condition="CM7_DP"/>
1687       <require Tcompiler="IAR"/>
1688     </condition>
1689     <condition id="CM7_DP_LE_IAR">
1690       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1691       <require condition="CM7_DP_IAR"/>
1692       <require Dendian="Little-endian"/>
1693     </condition>
1694     <condition id="CM7_DP_BE_IAR">
1695       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1696       <require condition="CM7_DP_IAR"/>
1697       <require Dendian="Big-endian"/>
1698     </condition>
1699
1700     <condition id="CM23_IAR">
1701       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1702       <require condition="CM23"/>
1703       <require Tcompiler="IAR"/>
1704     </condition>
1705     <condition id="CM23_LE_IAR">
1706       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1707       <require condition="CM23_IAR"/>
1708       <require Dendian="Little-endian"/>
1709     </condition>
1710     <condition id="CM23_BE_IAR">
1711       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
1712       <require condition="CM23_IAR"/>
1713       <require Dendian="Big-endian"/>
1714     </condition>
1715
1716     <condition id="CM33_IAR">
1717       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1718       <require condition="CM33"/>
1719       <require Tcompiler="IAR"/>
1720     </condition>
1721     <condition id="CM33_LE_IAR">
1722       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1723       <require condition="CM33_IAR"/>
1724       <require Dendian="Little-endian"/>
1725     </condition>
1726     <condition id="CM33_BE_IAR">
1727       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
1728       <require condition="CM33_IAR"/>
1729       <require Dendian="Big-endian"/>
1730     </condition>
1731
1732     <condition id="CM33_FP_IAR">
1733       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1734       <require condition="CM33_FP"/>
1735       <require Tcompiler="IAR"/>
1736     </condition>
1737     <condition id="CM33_FP_LE_IAR">
1738       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1739       <require condition="CM33_FP_IAR"/>
1740       <require Dendian="Little-endian"/>
1741     </condition>
1742     <condition id="CM33_FP_BE_IAR">
1743       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1744       <require condition="CM33_FP_IAR"/>
1745       <require Dendian="Big-endian"/>
1746     </condition>
1747
1748     <condition id="CM33_NODSP_NOFPU_IAR">
1749       <description>CM33, no DSP, no FPU, IAR Compiler</description>
1750       <require condition="CM33_NODSP_NOFPU"/>
1751       <require Tcompiler="IAR"/>
1752     </condition>
1753     <condition id="CM33_DSP_NOFPU_IAR">
1754       <description>CM33, DSP, no FPU, IAR Compiler</description>
1755       <require condition="CM33_DSP_NOFPU"/>
1756       <require Tcompiler="IAR"/>
1757     </condition>
1758     <condition id="CM33_NODSP_SP_IAR">
1759       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
1760       <require condition="CM33_NODSP_SP"/>
1761       <require Tcompiler="IAR"/>
1762     </condition>
1763     <condition id="CM33_DSP_SP_IAR">
1764       <description>CM33, DSP, SP FPU, IAR Compiler</description>
1765       <require condition="CM33_DSP_SP"/>
1766       <require Tcompiler="IAR"/>
1767     </condition>
1768     <condition id="CM33_NODSP_NOFPU_LE_IAR">
1769       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
1770       <require condition="CM33_NODSP_NOFPU_IAR"/>
1771       <require Dendian="Little-endian"/>
1772     </condition>
1773     <condition id="CM33_DSP_NOFPU_LE_IAR">
1774       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
1775       <require condition="CM33_DSP_NOFPU_IAR"/>
1776       <require Dendian="Little-endian"/>
1777     </condition>
1778     <condition id="CM33_NODSP_SP_LE_IAR">
1779       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
1780       <require condition="CM33_NODSP_SP_IAR"/>
1781       <require Dendian="Little-endian"/>
1782     </condition>
1783     <condition id="CM33_DSP_SP_LE_IAR">
1784       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
1785       <require condition="CM33_DSP_SP_IAR"/>
1786       <require Dendian="Little-endian"/>
1787     </condition>
1788
1789     <condition id="ARMv8MBL_IAR">
1790       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1791       <require condition="ARMv8MBL"/>
1792       <require Tcompiler="IAR"/>
1793     </condition>
1794     <condition id="ARMv8MBL_LE_IAR">
1795       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1796       <require condition="ARMv8MBL_IAR"/>
1797       <require Dendian="Little-endian"/>
1798     </condition>
1799     <condition id="ARMv8MBL_BE_IAR">
1800       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
1801       <require condition="ARMv8MBL_IAR"/>
1802       <require Dendian="Big-endian"/>
1803     </condition>
1804
1805     <condition id="ARMv8MML_IAR">
1806       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1807       <require condition="ARMv8MML"/>
1808       <require Tcompiler="IAR"/>
1809     </condition>
1810     <condition id="ARMv8MML_LE_IAR">
1811       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1812       <require condition="ARMv8MML_IAR"/>
1813       <require Dendian="Little-endian"/>
1814     </condition>
1815     <condition id="ARMv8MML_BE_IAR">
1816       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
1817       <require condition="ARMv8MML_IAR"/>
1818       <require Dendian="Big-endian"/>
1819     </condition>
1820
1821     <condition id="ARMv8MML_FP_IAR">
1822       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1823       <require condition="ARMv8MML_FP"/>
1824       <require Tcompiler="IAR"/>
1825     </condition>
1826     <condition id="ARMv8MML_FP_LE_IAR">
1827       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1828       <require condition="ARMv8MML_FP_IAR"/>
1829       <require Dendian="Little-endian"/>
1830     </condition>
1831     <condition id="ARMv8MML_FP_BE_IAR">
1832       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1833       <require condition="ARMv8MML_FP_IAR"/>
1834       <require Dendian="Big-endian"/>
1835     </condition>
1836
1837     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
1838       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
1839       <require condition="ARMv8MML_NODSP_NOFPU"/>
1840       <require Tcompiler="IAR"/>
1841     </condition>
1842     <condition id="ARMv8MML_DSP_NOFPU_IAR">
1843       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
1844       <require condition="ARMv8MML_DSP_NOFPU"/>
1845       <require Tcompiler="IAR"/>
1846     </condition>
1847     <condition id="ARMv8MML_NODSP_SP_IAR">
1848       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
1849       <require condition="ARMv8MML_NODSP_SP"/>
1850       <require Tcompiler="IAR"/>
1851     </condition>
1852     <condition id="ARMv8MML_DSP_SP_IAR">
1853       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
1854       <require condition="ARMv8MML_DSP_SP"/>
1855       <require Tcompiler="IAR"/>
1856     </condition>
1857     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
1858       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
1859       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
1860       <require Dendian="Little-endian"/>
1861     </condition>
1862     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
1863       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
1864       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
1865       <require Dendian="Little-endian"/>
1866     </condition>
1867     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
1868       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
1869       <require condition="ARMv8MML_NODSP_SP_IAR"/>
1870       <require Dendian="Little-endian"/>
1871     </condition>
1872     <condition id="ARMv8MML_DSP_SP_LE_IAR">
1873       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
1874       <require condition="ARMv8MML_DSP_SP_IAR"/>
1875       <require Dendian="Little-endian"/>
1876     </condition>
1877
1878     <!-- conditions selecting single devices and CMSIS Core -->
1879     <!-- used for component startup, GCC version is used for C-Startup -->
1880     <condition id="ARMCM0 CMSIS">
1881       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
1882       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1883       <require Cclass="CMSIS" Cgroup="CORE"/>
1884     </condition>
1885     <condition id="ARMCM0 CMSIS GCC">
1886       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1887       <require condition="ARMCM0 CMSIS"/>
1888       <require condition="GCC"/>
1889     </condition>
1890
1891     <condition id="ARMCM0+ CMSIS">
1892       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
1893       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1894       <require Cclass="CMSIS" Cgroup="CORE"/>
1895     </condition>
1896     <condition id="ARMCM0+ CMSIS GCC">
1897       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1898       <require condition="ARMCM0+ CMSIS"/>
1899       <require condition="GCC"/>
1900     </condition>
1901
1902     <condition id="ARMCM3 CMSIS">
1903       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
1904       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1905       <require Cclass="CMSIS" Cgroup="CORE"/>
1906     </condition>
1907     <condition id="ARMCM3 CMSIS GCC">
1908       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1909       <require condition="ARMCM3 CMSIS"/>
1910       <require condition="GCC"/>
1911     </condition>
1912
1913     <condition id="ARMCM4 CMSIS">
1914       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
1915       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1916       <require Cclass="CMSIS" Cgroup="CORE"/>
1917     </condition>
1918     <condition id="ARMCM4 CMSIS GCC">
1919       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1920       <require condition="ARMCM4 CMSIS"/>
1921       <require condition="GCC"/>
1922     </condition>
1923
1924     <condition id="ARMCM7 CMSIS">
1925       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
1926       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1927       <require Cclass="CMSIS" Cgroup="CORE"/>
1928     </condition>
1929     <condition id="ARMCM7 CMSIS GCC">
1930       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1931       <require condition="ARMCM7 CMSIS"/>
1932       <require condition="GCC"/>
1933     </condition>
1934
1935     <condition id="ARMCM23 CMSIS">
1936       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
1937       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1938       <require Cclass="CMSIS" Cgroup="CORE"/>
1939     </condition>
1940     <condition id="ARMCM23 CMSIS GCC">
1941       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1942       <require condition="ARMCM23 CMSIS"/>
1943       <require condition="GCC"/>
1944     </condition>
1945
1946     <condition id="ARMCM33 CMSIS">
1947       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
1948       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1949       <require Cclass="CMSIS" Cgroup="CORE"/>
1950     </condition>
1951     <condition id="ARMCM33 CMSIS GCC">
1952       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1953       <require condition="ARMCM33 CMSIS"/>
1954       <require condition="GCC"/>
1955     </condition>
1956
1957     <condition id="ARMSC000 CMSIS">
1958       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
1959       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1960       <require Cclass="CMSIS" Cgroup="CORE"/>
1961     </condition>
1962     <condition id="ARMSC000 CMSIS GCC">
1963       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
1964       <require condition="ARMSC000 CMSIS"/>
1965       <require condition="GCC"/>
1966     </condition>
1967
1968     <condition id="ARMSC300 CMSIS">
1969       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
1970       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1971       <require Cclass="CMSIS" Cgroup="CORE"/>
1972     </condition>
1973     <condition id="ARMSC300 CMSIS GCC">
1974       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
1975       <require condition="ARMSC300 CMSIS"/>
1976       <require condition="GCC"/>
1977     </condition>
1978
1979     <condition id="ARMv8MBL CMSIS">
1980       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
1981       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1982       <require Cclass="CMSIS" Cgroup="CORE"/>
1983     </condition>
1984     <condition id="ARMv8MBL CMSIS GCC">
1985       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
1986       <require condition="ARMv8MBL CMSIS"/>
1987       <require condition="GCC"/>
1988     </condition>
1989
1990     <condition id="ARMv8MML CMSIS">
1991       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
1992       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1993       <require Cclass="CMSIS" Cgroup="CORE"/>
1994     </condition>
1995     <condition id="ARMv8MML CMSIS GCC">
1996       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
1997       <require condition="ARMv8MML CMSIS"/>
1998       <require condition="GCC"/>
1999     </condition>
2000
2001     <condition id="ARMCA5 CMSIS">
2002       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2003       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2004       <require Cclass="CMSIS" Cgroup="CORE"/>
2005     </condition>
2006
2007     <condition id="ARMCA7 CMSIS">
2008       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2009       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2010       <require Cclass="CMSIS" Cgroup="CORE"/>
2011     </condition>
2012
2013     <condition id="ARMCA9 CMSIS">
2014       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2015       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2016       <require Cclass="CMSIS" Cgroup="CORE"/>
2017     </condition>
2018
2019     <!-- CMSIS DSP -->
2020     <condition id="CMSIS DSP">
2021       <description>Components required for DSP</description>
2022       <require condition="ARMv6_7_8-M Device"/>
2023       <require condition="ARMCC GCC IAR"/>
2024       <require Cclass="CMSIS" Cgroup="CORE"/>
2025     </condition>
2026
2027     <!-- CMSIS NN -->
2028     <condition id="CMSIS NN">
2029       <description>Components required for NN</description>
2030       <require condition="CMSIS DSP"/>
2031     </condition>
2032
2033     <!-- RTOS RTX -->
2034     <condition id="RTOS RTX">
2035       <description>Components required for RTOS RTX</description>
2036       <require condition="ARMv6_7-M Device"/>
2037       <require condition="ARMCC GCC IAR"/>
2038       <require Cclass="Device" Cgroup="Startup"/>
2039       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2040     </condition>
2041     <condition id="RTOS RTX IFX">
2042       <description>Components required for RTOS RTX IFX</description>
2043       <require condition="ARMv6_7-M Device"/>
2044       <require condition="ARMCC GCC IAR"/>
2045       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2046       <require Cclass="Device" Cgroup="Startup"/>
2047       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2048     </condition>
2049     <condition id="RTOS RTX5">
2050       <description>Components required for RTOS RTX5</description>
2051       <require condition="ARMv6_7_8-M Device"/>
2052       <require condition="ARMCC GCC IAR"/>
2053       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2054     </condition>
2055     <condition id="RTOS2 RTX5">
2056       <description>Components required for RTOS2 RTX5</description>
2057       <require condition="ARMv6_7_8-M Device"/>
2058       <require condition="ARMCC GCC IAR"/>
2059       <require Cclass="CMSIS"  Cgroup="CORE"/>
2060       <require Cclass="Device" Cgroup="Startup"/>
2061     </condition>
2062     <condition id="RTOS2 RTX5 v7-A">
2063       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2064       <require condition="ARMv7-A Device"/>
2065       <require condition="ARMCC GCC IAR"/>
2066       <require Cclass="CMSIS"  Cgroup="CORE"/>
2067       <require Cclass="Device" Cgroup="Startup"/>
2068       <require Cclass="Device" Cgroup="OS Tick"/>
2069       <require Cclass="Device" Cgroup="IRQ Controller"/>
2070     </condition>
2071     <condition id="RTOS2 RTX5 Lib">
2072       <description>Components required for RTOS2 RTX5 Library</description>
2073       <require condition="ARMv6_7_8-M Device"/>
2074       <require condition="ARMCC GCC IAR"/>
2075       <require Cclass="CMSIS"  Cgroup="CORE"/>
2076       <require Cclass="Device" Cgroup="Startup"/>
2077     </condition>
2078     <condition id="RTOS2 RTX5 NS">
2079       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2080       <require condition="ARMv8-M TZ Device"/>
2081       <require condition="ARMCC GCC IAR"/>
2082       <require Cclass="CMSIS"  Cgroup="CORE"/>
2083       <require Cclass="Device" Cgroup="Startup"/>
2084     </condition>
2085
2086     <!-- OS Tick -->
2087     <condition id="OS Tick PTIM">
2088       <description>Components required for OS Tick Private Timer</description>
2089       <require condition="CA5_CA9"/>
2090       <require Cclass="Device" Cgroup="IRQ Controller"/>
2091     </condition>
2092
2093     <condition id="OS Tick GTIM">
2094       <description>Components required for OS Tick Generic Physical Timer</description>
2095       <require condition="CA7"/>
2096       <require Cclass="Device" Cgroup="IRQ Controller"/>
2097     </condition>
2098
2099   </conditions>
2100
2101   <components>
2102     <!-- CMSIS-Core component -->
2103     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.1.1"  condition="ARMv6_7_8-M Device" >
2104       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
2105       <files>
2106         <!-- CPU independent -->
2107         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2108         <file category="include" name="CMSIS/Core/Include/"/>
2109         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2110         <!-- Code template -->
2111         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
2112         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2113       </files>
2114     </component>
2115
2116     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.1"  condition="ARMv7-A Device" >
2117       <description>CMSIS-CORE for Cortex-A</description>
2118       <files>
2119         <!-- CPU independent -->
2120         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2121         <file category="include" name="CMSIS/Core_A/Include/"/>
2122       </files>
2123     </component>
2124
2125     <!-- CMSIS-Startup components -->
2126     <!-- Cortex-M0 -->
2127     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
2128       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2129       <files>
2130         <!-- include folder / device header file -->
2131         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2132         <!-- startup / system file -->
2133         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2134         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
2135         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2136         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2137         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2138       </files>
2139     </component>
2140     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
2141       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2142       <files>
2143         <!-- include folder / device header file -->
2144         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2145         <!-- startup / system file -->
2146         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
2147         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2148         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2149       </files>
2150     </component>
2151
2152     <!-- Cortex-M0+ -->
2153     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
2154       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2155       <files>
2156         <!-- include folder / device header file -->
2157         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2158         <!-- startup / system file -->
2159         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2160         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
2161         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2162         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2163         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2164       </files>
2165     </component>
2166     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
2167       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2168       <files>
2169         <!-- include folder / device header file -->
2170         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2171         <!-- startup / system file -->
2172         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
2173         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2174         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2175       </files>
2176     </component>
2177
2178     <!-- Cortex-M3 -->
2179     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
2180       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2181       <files>
2182         <!-- include folder / device header file -->
2183         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2184         <!-- startup / system file -->
2185         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2186         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
2187         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2188         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2189         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2190       </files>
2191     </component>
2192     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
2193       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2194       <files>
2195         <!-- include folder / device header file -->
2196         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2197         <!-- startup / system file -->
2198         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
2199         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2200         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2201       </files>
2202     </component>
2203
2204     <!-- Cortex-M4 -->
2205     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
2206       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2207       <files>
2208         <!-- include folder / device header file -->
2209         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2210         <!-- startup / system file -->
2211         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2212         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2213         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2214         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2215         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2216       </files>
2217     </component>
2218     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2219       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2220       <files>
2221         <!-- include folder / device header file -->
2222         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2223         <!-- startup / system file -->
2224         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2225         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2226         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2227       </files>
2228     </component>
2229
2230     <!-- Cortex-M7 -->
2231     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2232       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2233       <files>
2234         <!-- include folder / device header file -->
2235         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2236         <!-- startup / system file -->
2237         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2238         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2239         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2240         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2241         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2242       </files>
2243     </component>
2244     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2245       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2246       <files>
2247         <!-- include folder / device header file -->
2248         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2249         <!-- startup / system file -->
2250         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2251         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2252         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2253       </files>
2254     </component>
2255
2256     <!-- Cortex-M23 -->
2257     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2258       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2259       <files>
2260         <!-- include folder / device header file -->
2261         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2262         <!-- startup / system file -->
2263         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2264         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2265         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2266         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2267         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2268         <!-- SAU configuration -->
2269         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2270       </files>
2271     </component>
2272     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2273       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2274       <files>
2275         <!-- include folder / device header file -->
2276         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2277         <!-- startup / system file -->
2278         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2279         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2280         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2281         <!-- SAU configuration -->
2282         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2283       </files>
2284     </component>
2285
2286     <!-- Cortex-M33 -->
2287     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2288       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2289       <files>
2290         <!-- include folder / device header file -->
2291         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2292         <!-- startup / system file -->
2293         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2294         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2295         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2296         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2297         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2298         <!-- SAU configuration -->
2299         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2300       </files>
2301     </component>
2302     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2303       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2304       <files>
2305         <!-- include folder / device header file -->
2306         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2307         <!-- startup / system file -->
2308         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2309         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2310         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2311         <!-- SAU configuration -->
2312         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2313       </files>
2314     </component>
2315
2316     <!-- Cortex-SC000 -->
2317     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2318       <description>System and Startup for Generic Arm SC000 device</description>
2319       <files>
2320         <!-- include folder / device header file -->
2321         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2322         <!-- startup / system file -->
2323         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2324         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2325         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2326         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2327         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2328       </files>
2329     </component>
2330     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2331       <description>System and Startup for Generic Arm SC000 device</description>
2332       <files>
2333         <!-- include folder / device header file -->
2334         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2335         <!-- startup / system file -->
2336         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2337         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2338         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2339       </files>
2340     </component>
2341
2342     <!-- Cortex-SC300 -->
2343     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2344       <description>System and Startup for Generic Arm SC300 device</description>
2345       <files>
2346         <!-- include folder / device header file -->
2347         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2348         <!-- startup / system file -->
2349         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2350         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2351         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2352         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2353         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2354       </files>
2355     </component>
2356     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2357       <description>System and Startup for Generic Arm SC300 device</description>
2358       <files>
2359         <!-- include folder / device header file -->
2360         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2361         <!-- startup / system file -->
2362         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2363         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2364         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2365       </files>
2366     </component>
2367
2368     <!-- ARMv8MBL -->
2369     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2370       <description>System and Startup for Generic Armv8-M Baseline device</description>
2371       <files>
2372         <!-- include folder / device header file -->
2373         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2374         <!-- startup / system file -->
2375         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2376         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2377         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2378         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2379         <!-- SAU configuration -->
2380         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2381       </files>
2382     </component>
2383     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2384       <description>System and Startup for Generic Armv8-M Baseline device</description>
2385       <files>
2386         <!-- include folder / device header file -->
2387         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2388         <!-- startup / system file -->
2389         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2390         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2391         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2392         <!-- SAU configuration -->
2393         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2394       </files>
2395     </component>
2396
2397     <!-- ARMv8MML -->
2398     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2399       <description>System and Startup for Generic Armv8-M Mainline device</description>
2400       <files>
2401         <!-- include folder / device header file -->
2402         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2403         <!-- startup / system file -->
2404         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2405         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2406         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2407         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2408         <!-- SAU configuration -->
2409         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2410       </files>
2411     </component>
2412     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2413       <description>System and Startup for Generic Armv8-M Mainline device</description>
2414       <files>
2415         <!-- include folder / device header file -->
2416         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2417         <!-- startup / system file -->
2418         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2419         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2420         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2421         <!-- SAU configuration -->
2422         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2423       </files>
2424     </component>
2425
2426     <!-- Cortex-A5 -->
2427     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2428       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2429       <files>
2430         <!-- include folder / device header file -->
2431         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2432         <!-- startup / system / mmu files -->
2433         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2434         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2435         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2436         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2437         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2438         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2439         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2440         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2441         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2442         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2443         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2444         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2445
2446       </files>
2447     </component>
2448
2449     <!-- Cortex-A7 -->
2450     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2451       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2452       <files>
2453         <!-- include folder / device header file -->
2454         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2455         <!-- startup / system / mmu files -->
2456         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2457         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2458         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2459         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2460         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2461         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2462         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2463         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2464         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2465         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2466         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2467         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2468       </files>
2469     </component>
2470
2471     <!-- Cortex-A9 -->
2472     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2473       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2474       <files>
2475         <!-- include folder / device header file -->
2476         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2477         <!-- startup / system / mmu files -->
2478         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2479         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2480         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2481         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2482         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2483         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2484         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2485         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2486         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2487         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2488         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2489         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2490       </files>
2491     </component>
2492
2493     <!-- IRQ Controller -->
2494     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2495       <description>IRQ Controller implementation using GIC</description>
2496       <files>
2497         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2498       </files>
2499     </component>
2500
2501     <!-- OS Tick -->
2502     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2503       <description>OS Tick implementation using Private Timer</description>
2504       <files>
2505         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2506       </files>
2507     </component>
2508
2509     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2510       <description>OS Tick implementation using Generic Physical Timer</description>
2511       <files>
2512         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2513       </files>
2514     </component>
2515
2516     <!-- CMSIS-DSP component -->
2517     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2518       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2519       <files>
2520         <!-- CPU independent -->
2521         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2522         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
2523
2524         <!-- CPU and Compiler dependent -->
2525         <!-- ARMCC -->
2526         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2527         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2528         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2529         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2530         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2531         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2532         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2533         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2534         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2535         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2536         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2537         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2538         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2539         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2540
2541         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2542         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2543         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2544         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2545         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2546         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2547         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2548         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2549         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2550         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2551         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
2552         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
2553
2554         <!-- GCC -->
2555         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2556         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2557         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2558         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
2559         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2560         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2561         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2562
2563         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2564         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2565         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2566         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2567         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2568         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2569         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2570         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2571         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2572         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2573         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
2574         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
2575
2576         <!-- IAR -->
2577         <file category="library" condition="CM0_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2578         <file category="library" condition="CM0_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2579         <file category="library" condition="CM3_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2580         <file category="library" condition="CM3_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2581         <file category="library" condition="CM4_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2582         <file category="library" condition="CM4_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2583         <file category="library" condition="CM4_FP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2584         <file category="library" condition="CM4_FP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2585         <file category="library" condition="CM7_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2586         <file category="library" condition="CM7_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2587         <file category="library" condition="CM7_DP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2588         <file category="library" condition="CM7_DP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2589         <file category="library" condition="CM7_SP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
2590         <file category="library" condition="CM7_SP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
2591
2592         <file category="library" condition="CM23_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2593         <file category="library" condition="CM33_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2594         <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2595         <file category="library" condition="CM33_FP_LE_IAR"           name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2596         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"    name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
2597         <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
2598         <!--file category="library" condition="CM33_DSP_DP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
2599         <file category="library" condition="ARMv8MBL_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2600         <file category="library" condition="ARMv8MML_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2601         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2602         <file category="library" condition="ARMv8MML_FP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2603         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
2604         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
2605         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
2606
2607       </files>
2608     </component>
2609
2610     <!-- CMSIS-NN component -->
2611     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.0.0" condition="CMSIS NN">
2612       <description>CMSIS-NN Neural Network Library</description>
2613       <files>
2614         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2615         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2616
2617         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2618         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2619         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2620         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2621
2622         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2623         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2624         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2625         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2626         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2627         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2628         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2629         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2630         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2631         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2632         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2633
2634         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2635         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2636         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2637         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2638         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2639         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2640
2641         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2642         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2643         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2644
2645         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2646
2647         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2648         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2649       </files>
2650     </component>
2651
2652     <!-- CMSIS-RTOS Keil RTX component -->
2653     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2654       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2655       <RTE_Components_h>
2656         <!-- the following content goes into file 'RTE_Components.h' -->
2657         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2658         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2659       </RTE_Components_h>
2660       <files>
2661         <!-- CPU independent -->
2662         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2663         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2664         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2665
2666         <!-- RTX templates -->
2667         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2668         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2669         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2670         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2671         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2672         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2673         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2674         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2675         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2676         <!-- tool-chain specific template file -->
2677         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2678         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2679         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2680
2681         <!-- CPU and Compiler dependent -->
2682         <!-- ARMCC -->
2683         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2684         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2685         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2686         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2687         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2688         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2689         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2690         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2691         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2692         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2693         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2694         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2695         <!-- GCC -->
2696         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2697         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2698         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2699         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2700         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2701         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2702         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2703         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2704         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2705         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2706         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2707         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2708         <!-- IAR -->
2709         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2710         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2711         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2712         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2713         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2714         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2715         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2716         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2717         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2718         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2719         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2720         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2721       </files>
2722     </component>
2723     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2724     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2725       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2726       <RTE_Components_h>
2727         <!-- the following content goes into file 'RTE_Components.h' -->
2728         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2729         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2730       </RTE_Components_h>
2731       <files>
2732         <!-- CPU independent -->
2733         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2734         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2735         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2736
2737         <!-- RTX templates -->
2738         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2739         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2740         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2741         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2742         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2743         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2744         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2745         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2746         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2747         <!-- tool-chain specific template file -->
2748         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2749         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2750         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2751
2752         <!-- CPU and Compiler dependent -->
2753         <!-- ARMCC -->
2754         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2755         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2756         <!-- GCC -->
2757         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2758         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2759         <!-- IAR -->
2760       </files>
2761     </component>
2762
2763     <!-- CMSIS-RTOS Keil RTX5 component -->
2764     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.4.0" Capiversion="1.0.0" condition="RTOS RTX5">
2765       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2766       <RTE_Components_h>
2767         <!-- the following content goes into file 'RTE_Components.h' -->
2768         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2769         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2770       </RTE_Components_h>
2771       <files>
2772         <!-- RTX header file -->
2773         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2774         <!-- RTX compatibility module for API V1 -->
2775         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2776       </files>
2777     </component>
2778
2779     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2780     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
2781       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
2782       <RTE_Components_h>
2783         <!-- the following content goes into file 'RTE_Components.h' -->
2784         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2785         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2786       </RTE_Components_h>
2787       <files>
2788         <!-- RTX documentation -->
2789         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2790
2791         <!-- RTX header files -->
2792         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2793
2794         <!-- RTX configuration -->
2795         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2796         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2797
2798         <!-- RTX templates -->
2799         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2800         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2801         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2802         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2803         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2804         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2805         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2806         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2807         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2808         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2809
2810         <!-- RTX library configuration -->
2811         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2812
2813         <!-- RTX libraries (CPU and Compiler dependent) -->
2814         <!-- ARMCC -->
2815         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2816         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2817         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2818         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2819         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2820         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2821         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2822         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2823         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2824         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2825         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2826         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2827         <!-- GCC -->
2828         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2829         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2830         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2831         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2832         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2833         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2834         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2835         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2836         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2837         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2838         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2839         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2840         <!-- IAR -->
2841         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2842         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2843         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2844         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2845         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2846         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2847       </files>
2848     </component>
2849     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
2850       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
2851       <RTE_Components_h>
2852         <!-- the following content goes into file 'RTE_Components.h' -->
2853         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2854         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2855         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2856       </RTE_Components_h>
2857       <files>
2858         <!-- RTX documentation -->
2859         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2860
2861         <!-- RTX header files -->
2862         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2863
2864         <!-- RTX configuration -->
2865         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2866         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2867
2868         <!-- RTX templates -->
2869         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2870         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2871         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2872         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2873         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2874         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2875         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2876         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2877         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2878         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2879
2880         <!-- RTX library configuration -->
2881         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2882
2883         <!-- RTX libraries (CPU and Compiler dependent) -->
2884         <!-- ARMCC -->
2885         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2886         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2887         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2888         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2889         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2890         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2891         <!-- GCC -->
2892         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2893         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2894         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2895         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2896         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2897         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2898       </files>
2899     </component>
2900     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5">
2901       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
2902       <RTE_Components_h>
2903         <!-- the following content goes into file 'RTE_Components.h' -->
2904         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2905         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2906         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2907       </RTE_Components_h>
2908       <files>
2909         <!-- RTX documentation -->
2910         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2911
2912         <!-- RTX header files -->
2913         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2914
2915         <!-- RTX configuration -->
2916         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2917         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2918
2919         <!-- RTX templates -->
2920         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2921         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2922         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2923         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2924         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2925         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2926         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2927         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2928         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2929         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2930
2931         <!-- RTX sources (core) -->
2932         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2933         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2934         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2935         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2936         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2937         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2938         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2939         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2940         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2941         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2942         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2943         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2944         <!-- RTX sources (library configuration) -->
2945         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2946         <!-- RTX sources (handlers ARMCC) -->
2947         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2948         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2949         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2950         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2951         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2952         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2953         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2954         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2955         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2956         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2957         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2958         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2959         <!-- RTX sources (handlers GCC) -->
2960         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2961         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2962         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2963         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2964         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2965         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2966         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2967         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2968         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2969         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2970         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2971         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2972         <!-- RTX sources (handlers IAR) -->
2973         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2974         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2975         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2976         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2977         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2978         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2979         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
2980         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
2981         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
2982         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
2983         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
2984         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
2985         <!-- OS Tick (SysTick) -->
2986         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2987       </files>
2988     </component>
2989     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
2990       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
2991       <RTE_Components_h>
2992         <!-- the following content goes into file 'RTE_Components.h' -->
2993         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2994         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2995         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2996       </RTE_Components_h>
2997       <files>
2998         <!-- RTX documentation -->
2999         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3000
3001         <!-- RTX header files -->
3002         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3003
3004         <!-- RTX configuration -->
3005         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3006         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3007
3008         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3009
3010         <!-- RTX templates -->
3011         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3012         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3013         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3014         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3015         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3016         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3017         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3018         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3019         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3020         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3021
3022         <!-- RTX sources (core) -->
3023         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3024         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3025         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3026         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3027         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3028         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3029         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3030         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3031         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3032         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3033         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3034         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3035         <!-- RTX sources (library configuration) -->
3036         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3037         <!-- RTX sources (handlers ARMCC) -->
3038         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3039         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3040         <!-- RTX sources (handlers GCC) -->
3041         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3042         <!-- RTX sources (handlers IAR) -->
3043         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3044       </files>
3045     </component>
3046     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3047       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3048       <RTE_Components_h>
3049         <!-- the following content goes into file 'RTE_Components.h' -->
3050         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3051         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3052         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3053         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3054       </RTE_Components_h>
3055       <files>
3056         <!-- RTX documentation -->
3057         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3058
3059         <!-- RTX header files -->
3060         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3061
3062         <!-- RTX configuration -->
3063         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3064         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3065
3066         <!-- RTX templates -->
3067         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3068         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3069         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3070         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3071         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3072         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3073         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3074         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3075         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3076         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3077
3078         <!-- RTX sources (core) -->
3079         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3080         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3081         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3082         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3083         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3084         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3085         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3086         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3087         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3088         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3089         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3090         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3091         <!-- RTX sources (library configuration) -->
3092         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3093         <!-- RTX sources (ARMCC handlers) -->
3094         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3095         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3096         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3097         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3098         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3099         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3100         <!-- RTX sources (GCC handlers) -->
3101         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3102         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3103         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3104         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3105         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3106         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3107         <!-- RTX sources (IAR handlers) -->
3108         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3109         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3110         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3111         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3112         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3113         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3114         <!-- OS Tick (SysTick) -->
3115         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3116       </files>
3117     </component>
3118
3119   </components>
3120
3121   <boards>
3122     <board name="uVision Simulator" vendor="Keil">
3123       <description>uVision Simulator</description>
3124       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3125       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3126       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3127       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3128       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3129       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3130       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3131       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3132       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3133       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3134       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3135       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3136       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3137       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3138       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3139       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3140       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3141       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3142       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3143     </board>
3144
3145     <board name="Fixed Virtual Platform" vendor="ARM">
3146       <description>Fixed Virtual Platform</description>
3147       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
3148       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
3149       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
3150     </board>
3151   </boards>
3152
3153   <examples>
3154     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3155       <description>DSP_Lib Class Marks example</description>
3156       <board name="uVision Simulator" vendor="Keil"/>
3157       <project>
3158         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3159       </project>
3160       <attributes>
3161         <component Cclass="CMSIS" Cgroup="CORE"/>
3162         <component Cclass="CMSIS" Cgroup="DSP"/>
3163         <component Cclass="Device" Cgroup="Startup"/>
3164         <category>Getting Started</category>
3165       </attributes>
3166     </example>
3167
3168     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3169       <description>DSP_Lib Convolution example</description>
3170       <board name="uVision Simulator" vendor="Keil"/>
3171       <project>
3172         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3173       </project>
3174       <attributes>
3175         <component Cclass="CMSIS" Cgroup="CORE"/>
3176         <component Cclass="CMSIS" Cgroup="DSP"/>
3177         <component Cclass="Device" Cgroup="Startup"/>
3178         <category>Getting Started</category>
3179       </attributes>
3180     </example>
3181
3182     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3183       <description>DSP_Lib Dotproduct example</description>
3184       <board name="uVision Simulator" vendor="Keil"/>
3185       <project>
3186         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3187       </project>
3188       <attributes>
3189         <component Cclass="CMSIS" Cgroup="CORE"/>
3190         <component Cclass="CMSIS" Cgroup="DSP"/>
3191         <component Cclass="Device" Cgroup="Startup"/>
3192         <category>Getting Started</category>
3193       </attributes>
3194     </example>
3195
3196     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3197       <description>DSP_Lib FFT Bin example</description>
3198       <board name="uVision Simulator" vendor="Keil"/>
3199       <project>
3200         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3201       </project>
3202       <attributes>
3203         <component Cclass="CMSIS" Cgroup="CORE"/>
3204         <component Cclass="CMSIS" Cgroup="DSP"/>
3205         <component Cclass="Device" Cgroup="Startup"/>
3206         <category>Getting Started</category>
3207       </attributes>
3208     </example>
3209
3210     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3211       <description>DSP_Lib FIR example</description>
3212       <board name="uVision Simulator" vendor="Keil"/>
3213       <project>
3214         <environment name="uv" load="arm_fir_example.uvprojx"/>
3215       </project>
3216       <attributes>
3217         <component Cclass="CMSIS" Cgroup="CORE"/>
3218         <component Cclass="CMSIS" Cgroup="DSP"/>
3219         <component Cclass="Device" Cgroup="Startup"/>
3220         <category>Getting Started</category>
3221       </attributes>
3222     </example>
3223
3224     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3225       <description>DSP_Lib Graphic Equalizer example</description>
3226       <board name="uVision Simulator" vendor="Keil"/>
3227       <project>
3228         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3229       </project>
3230       <attributes>
3231         <component Cclass="CMSIS" Cgroup="CORE"/>
3232         <component Cclass="CMSIS" Cgroup="DSP"/>
3233         <component Cclass="Device" Cgroup="Startup"/>
3234         <category>Getting Started</category>
3235       </attributes>
3236     </example>
3237
3238     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3239       <description>DSP_Lib Linear Interpolation example</description>
3240       <board name="uVision Simulator" vendor="Keil"/>
3241       <project>
3242         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3243       </project>
3244       <attributes>
3245         <component Cclass="CMSIS" Cgroup="CORE"/>
3246         <component Cclass="CMSIS" Cgroup="DSP"/>
3247         <component Cclass="Device" Cgroup="Startup"/>
3248         <category>Getting Started</category>
3249       </attributes>
3250     </example>
3251
3252     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3253       <description>DSP_Lib Matrix example</description>
3254       <board name="uVision Simulator" vendor="Keil"/>
3255       <project>
3256         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3257       </project>
3258       <attributes>
3259         <component Cclass="CMSIS" Cgroup="CORE"/>
3260         <component Cclass="CMSIS" Cgroup="DSP"/>
3261         <component Cclass="Device" Cgroup="Startup"/>
3262         <category>Getting Started</category>
3263       </attributes>
3264     </example>
3265
3266     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3267       <description>DSP_Lib Signal Convergence example</description>
3268       <board name="uVision Simulator" vendor="Keil"/>
3269       <project>
3270         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3271       </project>
3272       <attributes>
3273         <component Cclass="CMSIS" Cgroup="CORE"/>
3274         <component Cclass="CMSIS" Cgroup="DSP"/>
3275         <component Cclass="Device" Cgroup="Startup"/>
3276         <category>Getting Started</category>
3277       </attributes>
3278     </example>
3279
3280     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3281       <description>DSP_Lib Sinus/Cosinus example</description>
3282       <board name="uVision Simulator" vendor="Keil"/>
3283       <project>
3284         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3285       </project>
3286       <attributes>
3287         <component Cclass="CMSIS" Cgroup="CORE"/>
3288         <component Cclass="CMSIS" Cgroup="DSP"/>
3289         <component Cclass="Device" Cgroup="Startup"/>
3290         <category>Getting Started</category>
3291       </attributes>
3292     </example>
3293
3294     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3295       <description>DSP_Lib Variance example</description>
3296       <board name="uVision Simulator" vendor="Keil"/>
3297       <project>
3298         <environment name="uv" load="arm_variance_example.uvprojx"/>
3299       </project>
3300       <attributes>
3301         <component Cclass="CMSIS" Cgroup="CORE"/>
3302         <component Cclass="CMSIS" Cgroup="DSP"/>
3303         <component Cclass="Device" Cgroup="Startup"/>
3304         <category>Getting Started</category>
3305       </attributes>
3306     </example>
3307
3308     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3309       <description>Neural Network CIFAR10 example</description>
3310       <board name="uVision Simulator" vendor="Keil"/>
3311       <project>
3312         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3313       </project>
3314       <attributes>
3315         <component Cclass="CMSIS" Cgroup="CORE"/>
3316         <component Cclass="CMSIS" Cgroup="DSP"/>
3317         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3318         <component Cclass="Device" Cgroup="Startup"/>
3319         <category>Getting Started</category>
3320       </attributes>
3321     </example>
3322
3323     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
3324       <description>Neural Network GRU example</description>
3325       <board name="uVision Simulator" vendor="Keil"/>
3326       <project>
3327         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3328       </project>
3329       <attributes>
3330         <component Cclass="CMSIS" Cgroup="CORE"/>
3331         <component Cclass="CMSIS" Cgroup="DSP"/>
3332         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3333         <component Cclass="Device" Cgroup="Startup"/>
3334         <category>Getting Started</category>
3335       </attributes>
3336     </example>
3337
3338     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3339       <description>CMSIS-RTOS2 Blinky example</description>
3340       <board name="uVision Simulator" vendor="Keil"/>
3341       <project>
3342         <environment name="uv" load="Blinky.uvprojx"/>
3343       </project>
3344       <attributes>
3345         <component Cclass="CMSIS" Cgroup="CORE"/>
3346         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3347         <component Cclass="Device" Cgroup="Startup"/>
3348         <category>Getting Started</category>
3349       </attributes>
3350     </example>
3351
3352     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3353       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3354       <board name="uVision Simulator" vendor="Keil"/>
3355       <project>
3356         <environment name="uv" load="Blinky.uvprojx"/>
3357       </project>
3358       <attributes>
3359         <component Cclass="CMSIS" Cgroup="CORE"/>
3360         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3361         <component Cclass="Device" Cgroup="Startup"/>
3362         <category>Getting Started</category>
3363       </attributes>
3364     </example>
3365
3366     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3367       <description>CMSIS-RTOS2 Message Queue Example</description>
3368       <board name="uVision Simulator" vendor="Keil"/>
3369       <project>
3370         <environment name="uv" load="MsqQueue.uvprojx"/>
3371       </project>
3372       <attributes>
3373         <component Cclass="CMSIS" Cgroup="CORE"/>
3374         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3375         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3376         <component Cclass="Device" Cgroup="Startup"/>
3377         <category>Getting Started</category>
3378       </attributes>
3379     </example>
3380
3381     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3382       <description>CMSIS-RTOS2 Memory Pool Example</description>
3383       <board name="Fixed Virtual Platform" vendor="ARM"/>
3384       <project>
3385         <environment name="uv" load="MemPool.uvprojx"/>
3386       </project>
3387       <attributes>
3388         <component Cclass="CMSIS" Cgroup="CORE"/>
3389         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3390         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3391         <component Cclass="Device" Cgroup="Startup"/>
3392         <category>Getting Started</category>
3393       </attributes>
3394     </example>
3395
3396     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3397       <description>Bare-metal secure/non-secure example without RTOS</description>
3398       <board name="uVision Simulator" vendor="Keil"/>
3399       <project>
3400         <environment name="uv" load="NoRTOS.uvmpw"/>
3401       </project>
3402       <attributes>
3403         <component Cclass="CMSIS" Cgroup="CORE"/>
3404         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3405         <component Cclass="Device" Cgroup="Startup"/>
3406         <category>Getting Started</category>
3407       </attributes>
3408     </example>
3409
3410     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3411       <description>Secure/non-secure RTOS example with thread context management</description>
3412       <board name="uVision Simulator" vendor="Keil"/>
3413       <project>
3414         <environment name="uv" load="RTOS.uvmpw"/>
3415       </project>
3416       <attributes>
3417         <component Cclass="CMSIS" Cgroup="CORE"/>
3418         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3419         <component Cclass="Device" Cgroup="Startup"/>
3420         <category>Getting Started</category>
3421       </attributes>
3422     </example>
3423
3424     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3425       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3426       <board name="uVision Simulator" vendor="Keil"/>
3427       <project>
3428         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3429       </project>
3430       <attributes>
3431         <component Cclass="CMSIS" Cgroup="CORE"/>
3432         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3433         <component Cclass="Device" Cgroup="Startup"/>
3434         <category>Getting Started</category>
3435       </attributes>
3436     </example>
3437
3438   </examples>
3439
3440 </package>