begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Common Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.8.1">
  12       Active development ...
  13       CMSIS-DSP: 1.10.0 (see revision history for details)
  14     </release>
  15     <release version="5.8.0" date="2021-06-24">
  16       CMSIS-Core(M): 5.5.0 (see revision history for details)
  17         - Updated GCC LinkerDescription, GCC Assembler startup
  18         - Added Armv8-M Stack Sealing (to linker, startup) for toolchain ARM, GCC
  19         - Changed C-Startup to default Startup.
  20         - Updated Armv8-M Assembler startup to use GAS syntax
  21           Note: Updating existing projects may need manual user interaction!
  22       CMSIS-Core(A): 1.2.1 (see revision history for details)
  23         - Bugfixes for Cortex-A32
  24       CMSIS-DAP: 2.1.0 (see revision history for details)
  25         - Enhanced DAP_Info
  26         - Added extra UART support
  27       CMSIS-DSP: 1.9.0 (see revision history for details)
  28         - Purged pre-built libs from Git
  29         - Enhanced support for f16 datatype
  30         - Fixed couple of GCC issues
  31       CMSIS-NN: 3.0.0 (see revision history for details including version 2.0.0)
  32         - Major interface change for functions compatible with TensorFlow Lite for Microcontroller
  33         - Added optimization for SVDF kernel
  34         - Improved MVE performance for fully Connected and max pool operator
  35         - NULL bias support for fully connected operator in non-MVE case(Can affect performance)
  36         - Expanded existing unit test suite along with support for FVP
  37         - Removed Examples folder
  38       CMSIS-RTOS2:
  39         - RTX 5.5.3 (see revision history for details)
  40           - CVE-2021-27431 vulnerability mitigation.
  41           - Enhanced stack overrun checking.
  42           - Various bug fixes and improvements.
  43       CMSIS-Pack: 1.7.2 (see revision history for details)
  44         - Support for Microchip XC32 compiler
  45         - Support for Custom Datapath Extension
  46     </release>
  47     <release version="5.7.0" date="2020-04-09">
  48       CMSIS-Build: 0.9.0 (beta)
  49         - Draft for CMSIS Project description (CPRJ)
  50       CMSIS-Core(M): 5.4.0 (see revision history for details)
  51         - Cortex-M55 cpu support
  52         - Enhanced MVE support for Armv8.1-MML
  53         - Fixed device config define checks.
  54         - L1 Cache functions for Armv7-M and later
  55       CMSIS-Core(A): 1.2.0 (see revision history for details)
  56         - Fixed GIC_SetPendingIRQ to use GICD_SGIR
  57         - Added missing DSP intrinsics
  58         - Reworked assembly intrinsics: volatile, barriers and clobber
  59       CMSIS-DSP: 1.8.0 (see revision history for details)
  60         - Added new functions and function groups
  61         - Added MVE support
  62       CMSIS-NN: 1.3.0 (see revision history for details)
  63         - Added MVE support
  64         - Further optimizations for kernels using DSP extension
  65       CMSIS-RTOS2:
  66         - RTX 5.5.2 (see revision history for details)
  67       CMSIS-Driver: 2.8.0
  68         - Added VIO API 0.1.0 (Preview)
  69         - removed volatile from status related typedefs in APIs
  70         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  71       CMSIS-Pack: 1.6.3 (see revision history for details)
  72         - deprecating all types specific to cpdsc format. Cpdsc is replaced by Cprj with dedicated schema.
  73       Devices:
  74         - ARMCM55 device
  75         - ARMv81MML startup code recognizing __MVE_USED macro
  76         - Refactored vector table references for all Cortex-M devices
  77         - Reworked ARMCM* C-StartUp files.
  78         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  79       Utilities:
  80         Attention: Linux binaries moved to Linux64 folder!
  81         - SVDConv 3.3.35
  82         - PackChk 1.3.89
  83     </release>
  84     <release version="5.6.0" date="2019-07-10">
  85       CMSIS-Core(M): 5.3.0 (see revision history for details)
  86         - Added provisions for compiler-independent C startup code.
  87       CMSIS-Core(A): 1.1.4 (see revision history for details)
  88         - Fixed __FPU_Enable.
  89       CMSIS-DSP: 1.7.0 (see revision history for details)
  90         - New Neon versions of f32 functions
  91         - Python wrapper
  92         - Preliminary cmake build
  93         - Compilation flags for FFTs
  94         - Changes to arm_math.h
  95       CMSIS-NN: 1.2.0 (see revision history for details)
  96         - New function for depthwise convolution with asymmetric quantization.
  97         - New support functions for requantization.
  98       CMSIS-RTOS:
  99         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
 100       CMSIS-RTOS2:
 101         - RTX 5.5.1 (see revision history for details)
 102       CMSIS-Driver: 2.7.1
 103         - WiFi Interface API 1.0.0
 104       Devices:
 105         - Generalized C startup code for all Cortex-M family devices.
 106         - Updated Cortex-A default memory regions and MMU configurations
 107         - Moved Cortex-A memory and system config files to avoid include path issues
 108     </release>
 109     <release version="5.5.1" date="2019-03-20">
 110       The following folders are deprecated
 111         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 112
 113       CMSIS-Core(M): 5.2.1 (see revision history for details)
 114         - Fixed compilation issue in cmsis_armclang_ltm.h
 115     </release>
 116     <release version="5.5.0" date="2019-03-18">
 117       The following folders have been removed:
 118         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
 119         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
 120       The following folders are deprecated
 121         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 122
 123       CMSIS-Core(M): 5.2.0 (see revision history for details)
 124         - Reworked Stack/Heap configuration for ARM startup files.
 125         - Added Cortex-M35P device support.
 126         - Added generic Armv8.1-M Mainline device support.
 127       CMSIS-Core(A): 1.1.3 (see revision history for details)
 128       CMSIS-DSP: 1.6.0 (see revision history for details)
 129         - reworked DSP library source files
 130         - reworked DSP library documentation
 131         - Changed DSP folder structure
 132         - moved DSP libraries to folder ./DSP/Lib
 133         - ARM DSP Libraries are built with ARMCLANG
 134         - Added DSP Libraries Source variant
 135       CMSIS-RTOS2:
 136         - RTX 5.5.0 (see revision history for details)
 137       CMSIS-Driver: 2.7.0
 138         - Added WiFi Interface API 1.0.0-beta
 139         - Added components for project specific driver implementations
 140       CMSIS-Pack: 1.6.0 (see revision history for details)
 141       Devices:
 142         - Added Cortex-M35P and ARMv81MML device templates.
 143         - Fixed C-Startup Code for GCC (aligned with other compilers)
 144       Utilities:
 145         - SVDConv 3.3.25
 146         - PackChk 1.3.82
 147     </release>
 148     <release version="5.4.0" date="2018-08-01">
 149       Aligned pack structure with repository.
 150       The following folders are deprecated:
 151         - CMSIS/Include/
 152         - CMSIS/DSP_Lib/
 153
 154       CMSIS-Core(M): 5.1.2 (see revision history for details)
 155         - Added Cortex-M1 support (beta).
 156       CMSIS-Core(A): 1.1.2 (see revision history for details)
 157       CMSIS-NN: 1.1.0
 158         - Added new math functions.
 159       CMSIS-RTOS2:
 160         - API 2.1.3 (see revision history for details)
 161         - RTX 5.4.0 (see revision history for details)
 162           * Updated exception handling on Cortex-A
 163       CMSIS-Driver:
 164         - Flash Driver API V2.2.0
 165       Utilities:
 166         - SVDConv 3.3.21
 167         - PackChk 1.3.71
 168     </release>
 169     <release version="5.3.0" date="2018-02-22">
 170       Updated Arm company brand.
 171       CMSIS-Core(M): 5.1.1 (see revision history for details)
 172       CMSIS-Core(A): 1.1.1 (see revision history for details)
 173       CMSIS-DAP: 2.0.0 (see revision history for details)
 174       CMSIS-NN: 1.0.0
 175         - Initial contribution of the bare metal Neural Network Library.
 176       CMSIS-RTOS2:
 177         - RTX 5.3.0 (see revision history for details)
 178         - OS Tick API 1.0.1
 179     </release>
 180     <release version="5.2.0" date="2017-11-16">
 181       CMSIS-Core(M): 5.1.0 (see revision history for details)
 182         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 183         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 184       CMSIS-Core(A): 1.1.0 (see revision history for details)
 185         - Added compiler_iccarm.h.
 186         - Added additional access functions for physical timer.
 187       CMSIS-DAP: 1.2.0 (see revision history for details)
 188       CMSIS-DSP: 1.5.2 (see revision history for details)
 189       CMSIS-Driver: 2.6.0 (see revision history for details)
 190         - CAN Driver API V1.2.0
 191         - NAND Driver API V2.3.0
 192       CMSIS-RTOS:
 193         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 194       CMSIS-RTOS2:
 195         - API 2.1.2 (see revision history for details)
 196         - RTX 5.2.3 (see revision history for details)
 197       Devices:
 198         - Added GCC startup and linker script for Cortex-A9.
 199         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 200         - Added IAR startup code for Cortex-A9
 201     </release>
 202     <release version="5.1.1" date="2017-09-19">
 203       CMSIS-RTOS2:
 204       - RTX 5.2.1 (see revision history for details)
 205     </release>
 206     <release version="5.1.0" date="2017-08-04">
 207       CMSIS-Core(M): 5.0.2 (see revision history for details)
 208       - Changed Version Control macros to be core agnostic.
 209       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 210       CMSIS-Core(A): 1.0.0 (see revision history for details)
 211       - Initial release
 212       - IRQ Controller API 1.0.0
 213       CMSIS-Driver: 2.05 (see revision history for details)
 214       - All typedefs related to status have been made volatile.
 215       CMSIS-RTOS2:
 216       - API 2.1.1 (see revision history for details)
 217       - RTX 5.2.0 (see revision history for details)
 218       - OS Tick API 1.0.0
 219       CMSIS-DSP: 1.5.2 (see revision history for details)
 220       - Fixed GNU Compiler specific diagnostics.
 221       CMSIS-Pack: 1.5.0 (see revision history for details)
 222       - added System Description File (*.SDF) Format
 223       CMSIS-Zone: 0.0.1 (Preview)
 224       - Initial specification draft
 225     </release>
 226     <release version="5.0.1" date="2017-02-03">
 227       Package Description:
 228       - added taxonomy for Cclass RTOS
 229       CMSIS-RTOS2:
 230       - API 2.1   (see revision history for details)
 231       - RTX 5.1.0 (see revision history for details)
 232       CMSIS-Core: 5.0.1 (see revision history for details)
 233       - Added __PACKED_STRUCT macro
 234       - Added uVisior support
 235       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 236       - Updated template for secure main function (main_s.c)
 237       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 238       CMSIS-DSP: 1.5.1 (see revision history for details)
 239       - added ARMv8M DSP libraries.
 240       CMSIS-Pack:1.4.9 (see revision history for details)
 241       - added Pack Index File specification and schema file
 242     </release>
 243     <release version="5.0.0" date="2016-11-11">
 244       Changed open source license to Apache 2.0
 245       CMSIS_Core:
 246        - Added support for Cortex-M23 and Cortex-M33.
 247        - Added ARMv8-M device configurations for mainline and baseline.
 248        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 249        - Added cmsis_compiler.h to unify compiler behaviour.
 250        - Updated function SCB_EnableICache (for Cortex-M7).
 251        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 252       CMSIS-RTOS:
 253         - bug fix in RTX 4.82 (see revision history for details)
 254       CMSIS-RTOS2:
 255         - new API including compatibility layer to CMSIS-RTOS
 256         - reference implementation based on RTX5
 257         - supports all Cortex-M variants including TrustZone for ARMv8-M
 258       CMSIS-SVD:
 259        - reworked SVD format documentation
 260        - removed SVD file database documentation as SVD files are distributed in packs
 261        - updated SVDConv for Win32 and Linux
 262       CMSIS-DSP:
 263        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 264        - Added DSP libraries build projects to CMSIS pack.
 265     </release>
 266     <release version="4.5.0" date="2015-10-28">
 267       - CMSIS-Core     4.30.0  (see revision history for details)
 268       - CMSIS-DAP      1.1.0   (unchanged)
 269       - CMSIS-Driver   2.04.0  (see revision history for details)
 270       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 271       - CMSIS-Pack     1.4.1   (see revision history for details)
 272       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 273       - CMSIS-SVD      1.3.1   (see revision history for details)
 274     </release>
 275     <release version="4.4.0" date="2015-09-11">
 276       - CMSIS-Core     4.20   (see revision history for details)
 277       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 278       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 279       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 280       - CMSIS-RTOS
 281         -- API         1.02   (unchanged)
 282         -- RTX         4.79   (see revision history for details)
 283       - CMSIS-SVD      1.3.0  (see revision history for details)
 284       - CMSIS-DAP      1.1.0  (extended with SWO support)
 285     </release>
 286     <release version="4.3.0" date="2015-03-20">
 287       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 288       - CMSIS-DSP      1.4.5  (see revision history for details)
 289       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 290       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 291       - CMSIS-RTOS
 292         -- API         1.02   (unchanged)
 293         -- RTX         4.78   (see revision history for details)
 294       - CMSIS-SVD      1.2    (unchanged)
 295     </release>
 296     <release version="4.2.0" date="2014-09-24">
 297       Adding Cortex-M7 support
 298       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 299       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 300       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 301       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 302       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 303     </release>
 304     <release version="4.1.1" date="2014-06-30">
 305       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 306     </release>
 307     <release version="4.1.0" date="2014-06-12">
 308       - CMSIS-Driver   2.02  (incompatible update)
 309       - CMSIS-Pack     1.3   (see revision history for details)
 310       - CMSIS-DSP      1.4.2 (unchanged)
 311       - CMSIS-Core     3.30  (unchanged)
 312       - CMSIS-RTOS RTX 4.74  (unchanged)
 313       - CMSIS-RTOS API 1.02  (unchanged)
 314       - CMSIS-SVD      1.10  (unchanged)
 315       PACK:
 316       - removed G++ specific files from PACK
 317       - added Component Startup variant "C Startup"
 318       - added Pack Checking Utility
 319       - updated conditions to reflect tool-chain dependency
 320       - added Taxonomy for Graphics
 321       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 322     </release>
 323     <!-- release version="4.0.0">
 324       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 325       - CMSIS-Pack     1.1   Preliminary
 326       - CMSIS-DSP      1.4.2 (see revision history for details)
 327       - CMSIS-Core     3.30  (see revision history for details)
 328       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 329       - CMSIS-RTOS API 1.02  (unchanged)
 330       - CMSIS-SVD      1.10  (unchanged)
 331     </release -->
 332     <release version="3.20.4" date="2014-02-20">
 333       - CMSIS-RTOS 4.74 (see revision history for details)
 334       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 335     </release>
 336     <!-- release version="3.20.3">
 337       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 338       - CMSIS-RTOS 4.73 (see revision history for details)
 339     </release -->
 340     <!-- release version="3.20.2">
 341       - CMSIS-Pack documentation has been added
 342       - CMSIS-Drivers header and documentation have been added to PACK
 343       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 344     </release -->
 345     <!-- release version="3.20.1">
 346       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 347       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 348     </release -->
 349     <!-- release version="3.20.0">
 350       The software portions that are deployed in the application program are now under a BSD license which allows usage
 351       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 352       The individual components have been update as listed below:
 353       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 354       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 355       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 356       - CMSIS-SVD is unchanged.
 357     </release -->
 358   </releases>
 359
 360   <taxonomy>
 361     <description Cclass="Audio">Software components for audio processing</description>
 362     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 363     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 364     <description Cclass="Compiler">Compiler Software Extensions</description>
 365     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 366     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 367     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 368     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 369     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 370     <description Cclass="File System">File Drive Support and File System</description>
 371     <description Cclass="IoT Client">IoT cloud client connector</description>
 372     <description Cclass="IoT Service">IoT specific services</description>
 373     <description Cclass="IoT Utility">IoT specific software utility</description>
 374     <description Cclass="Graphics">Graphical User Interface</description>
 375     <description Cclass="Network">Network Stack using Internet Protocols</description>
 376     <description Cclass="RTOS">Real-time Operating System</description>
 377     <description Cclass="Security">Encryption for secure communication or storage</description>
 378     <description Cclass="USB">Universal Serial Bus Stack</description>
 379     <description Cclass="Utility">Generic software utility components</description>
 380   </taxonomy>
 381
 382   <devices>
 383     <!-- ******************************  Cortex-M0  ****************************** -->
 384     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 385       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 386       <description>
 387 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 388 - simple, easy-to-use programmers model
 389 - highly efficient ultra-low power operation
 390 - excellent code density
 391 - deterministic, high-performance interrupt handling
 392 - upward compatibility with the rest of the Cortex-M processor family.
 393       </description>
 394       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 395       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 396       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 397       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 398
 399       <device Dname="ARMCM0">
 400         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 401         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 402       </device>
 403     </family>
 404
 405     <!-- ******************************  Cortex-M0P  ****************************** -->
 406     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 407       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 408       <description>
 409 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 410 - simple, easy-to-use programmers model
 411 - highly efficient ultra-low power operation
 412 - excellent code density
 413 - deterministic, high-performance interrupt handling
 414 - upward compatibility with the rest of the Cortex-M processor family.
 415       </description>
 416       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 417       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 418       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 419       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 420
 421       <device Dname="ARMCM0P">
 422         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 423         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 424       </device>
 425
 426       <device Dname="ARMCM0P_MPU">
 427         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 428         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 429       </device>
 430     </family>
 431
 432     <!-- ******************************  Cortex-M1  ****************************** -->
 433     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 434       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 435       <description>
 436 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 437 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 438       </description>
 439       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 440       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 441       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 442       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 443
 444       <device Dname="ARMCM1">
 445         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 446         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 447       </device>
 448     </family>
 449
 450     <!-- ******************************  Cortex-M3  ****************************** -->
 451     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 452       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 453       <description>
 454 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 455 - simple, easy-to-use programmers model
 456 - highly efficient ultra-low power operation
 457 - excellent code density
 458 - deterministic, high-performance interrupt handling
 459 - upward compatibility with the rest of the Cortex-M processor family.
 460       </description>
 461       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 462       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 463       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 464       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 465
 466       <device Dname="ARMCM3">
 467         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 468         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 469       </device>
 470     </family>
 471
 472     <!-- ******************************  Cortex-M4  ****************************** -->
 473     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 474       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 475       <description>
 476 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 477 - simple, easy-to-use programmers model
 478 - highly efficient ultra-low power operation
 479 - excellent code density
 480 - deterministic, high-performance interrupt handling
 481 - upward compatibility with the rest of the Cortex-M processor family.
 482       </description>
 483       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 484       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 485       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 486       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 487
 488       <device Dname="ARMCM4">
 489         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 490         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 491       </device>
 492
 493       <device Dname="ARMCM4_FP">
 494         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 495         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 496       </device>
 497     </family>
 498
 499     <!-- ******************************  Cortex-M7  ****************************** -->
 500     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 501       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 502       <description>
 503 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 504 - simple, easy-to-use programmers model
 505 - highly efficient ultra-low power operation
 506 - excellent code density
 507 - deterministic, high-performance interrupt handling
 508 - upward compatibility with the rest of the Cortex-M processor family.
 509       </description>
 510       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 511       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 512       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 513       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 514
 515       <device Dname="ARMCM7">
 516         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 517         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 518       </device>
 519
 520       <device Dname="ARMCM7_SP">
 521         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 522         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 523       </device>
 524
 525       <device Dname="ARMCM7_DP">
 526         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 527         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 528       </device>
 529     </family>
 530
 531     <!-- ******************************  Cortex-M23  ********************** -->
 532     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 533       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 534       <description>
 535 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 536 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 537 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 538       </description>
 539       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 540       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 541       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 542       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 543       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 544       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 545
 546       <device Dname="ARMCM23">
 547         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 548         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 549       </device>
 550
 551       <device Dname="ARMCM23_TZ">
 552         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 553         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 554       </device>
 555     </family>
 556
 557     <!-- ******************************  Cortex-M33  ****************************** -->
 558     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 559       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 560       <description>
 561 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 562 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 563       </description>
 564       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 565       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 566       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 567       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 568       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 569       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 570
 571       <device Dname="ARMCM33">
 572         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 573         <description>
 574           no DSP Instructions, no Floating Point Unit, no TrustZone
 575         </description>
 576         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 577       </device>
 578
 579       <device Dname="ARMCM33_TZ">
 580         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 581         <description>
 582           no DSP Instructions, no Floating Point Unit, TrustZone
 583         </description>
 584         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 585       </device>
 586
 587       <device Dname="ARMCM33_DSP_FP">
 588         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 589         <description>
 590           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 591         </description>
 592         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 593       </device>
 594
 595       <device Dname="ARMCM33_DSP_FP_TZ">
 596         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 597         <description>
 598           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 599         </description>
 600         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 601       </device>
 602     </family>
 603
 604     <!-- ******************************  Cortex-M35P  ****************************** -->
 605     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 606       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 607       <description>
 608 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 609 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 610       </description>
 611
 612       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 613       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 614       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 615       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 616       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 617       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 618
 619       <device Dname="ARMCM35P">
 620         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 621         <description>
 622           no DSP Instructions, no Floating Point Unit, no TrustZone
 623         </description>
 624         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 625       </device>
 626
 627       <device Dname="ARMCM35P_TZ">
 628         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 629         <description>
 630           no DSP Instructions, no Floating Point Unit, TrustZone
 631         </description>
 632         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 633       </device>
 634
 635       <device Dname="ARMCM35P_DSP_FP">
 636         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 637         <description>
 638           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 639         </description>
 640         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 641       </device>
 642
 643       <device Dname="ARMCM35P_DSP_FP_TZ">
 644         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 645         <description>
 646           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 647         </description>
 648         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 649       </device>
 650     </family>
 651
 652     <!-- ******************************  Cortex-M55  ****************************** -->
 653     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 654       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 655       <description>
 656 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 657 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 658 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 659       </description>
 660
 661       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 662       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 663       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 664       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 665       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 666       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 667
 668       <device Dname="ARMCM55">
 669         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 670         <description>
 671           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 672         </description>
 673         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 674       </device>
 675     </family>
 676
 677     <!-- ******************************  ARMSC000  ****************************** -->
 678     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 679       <description>
 680 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 681 - simple, easy-to-use programmers model
 682 - highly efficient ultra-low power operation
 683 - excellent code density
 684 - deterministic, high-performance interrupt handling
 685       </description>
 686       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 687       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 688       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 689       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 690
 691       <device Dname="ARMSC000">
 692         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 693         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 694       </device>
 695     </family>
 696
 697     <!-- ******************************  ARMSC300  ****************************** -->
 698     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 699       <description>
 700 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 701 - simple, easy-to-use programmers model
 702 - highly efficient ultra-low power operation
 703 - excellent code density
 704 - deterministic, high-performance interrupt handling
 705       </description>
 706       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 707       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 708       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 709       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 710
 711       <device Dname="ARMSC300">
 712         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 713         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 714       </device>
 715     </family>
 716
 717     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 718     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 719       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 720       <description>
 721 Armv8-M Baseline based device with TrustZone
 722       </description>
 723       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 724       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 725       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 726       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 727       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 728       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 729
 730       <device Dname="ARMv8MBL">
 731         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 732         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 733       </device>
 734     </family>
 735
 736     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 737     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 738       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 739       <description>
 740 Armv8-M Mainline based device with TrustZone
 741       </description>
 742       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 743       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 744       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 745       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 746       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 747       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 748
 749       <device Dname="ARMv8MML">
 750         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 751         <description>
 752           no DSP Instructions, no Floating Point Unit, TrustZone
 753         </description>
 754         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 755       </device>
 756
 757       <device Dname="ARMv8MML_DSP">
 758         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 759         <description>
 760           DSP Instructions, no Floating Point Unit, TrustZone
 761         </description>
 762         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 763       </device>
 764
 765       <device Dname="ARMv8MML_SP">
 766         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 767         <description>
 768           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 769         </description>
 770         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 771       </device>
 772
 773       <device Dname="ARMv8MML_DSP_SP">
 774         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 775         <description>
 776           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 777         </description>
 778         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 779       </device>
 780
 781       <device Dname="ARMv8MML_DP">
 782         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 783         <description>
 784           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 785         </description>
 786         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 787       </device>
 788
 789       <device Dname="ARMv8MML_DSP_DP">
 790         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 791         <description>
 792           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 793         </description>
 794         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 795       </device>
 796     </family>
 797
 798     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 799     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 800       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 801       <description>
 802 Armv8.1-M Mainline based device with TrustZone and MVE
 803       </description>
 804       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 805       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 806       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 807       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 808       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 809       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 810
 811
 812       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 813         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 814         <description>
 815           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 816         </description>
 817         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 818       </device>
 819     </family>
 820
 821     <!-- ******************************  Cortex-A5  ****************************** -->
 822     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 823       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 824       <description>
 825 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 826 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 827 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 828       </description>
 829
 830       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 831       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 832       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 833       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 834
 835       <device Dname="ARMCA5">
 836         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 837         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 838       </device>
 839     </family>
 840
 841     <!-- ******************************  Cortex-A7  ****************************** -->
 842     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 843       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 844       <description>
 845 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 846 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 847 an optional integrated GIC, and an optional L2 cache controller.
 848       </description>
 849
 850       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 851       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 852       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 853       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 854
 855       <device Dname="ARMCA7">
 856         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 857         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 858       </device>
 859     </family>
 860
 861     <!-- ******************************  Cortex-A9  ****************************** -->
 862     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 863       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 864       <description>
 865 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 866 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 867 and 8-bit Java bytecodes in Jazelle state.
 868       </description>
 869
 870       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 871       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 872       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 873       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 874
 875       <device Dname="ARMCA9">
 876         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 877         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 878       </device>
 879     </family>
 880   </devices>
 881
 882
 883   <apis>
 884     <!-- CMSIS Device API -->
 885     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 886       <description>Device interrupt controller interface</description>
 887       <files>
 888         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 889       </files>
 890     </api>
 891     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 892       <description>RTOS Kernel system tick timer interface</description>
 893       <files>
 894         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 895       </files>
 896     </api>
 897     <!-- CMSIS-RTOS API -->
 898     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 899       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 900       <files>
 901         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 902       </files>
 903     </api>
 904     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 905       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 906       <files>
 907         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 908         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 909       </files>
 910     </api>
 911     <!-- CMSIS Driver API -->
 912     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 913       <description>USART Driver API for Cortex-M</description>
 914       <files>
 915         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 916         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 917       </files>
 918     </api>
 919     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 920       <description>SPI Driver API for Cortex-M</description>
 921       <files>
 922         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 923         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 924       </files>
 925     </api>
 926     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 927       <description>SAI Driver API for Cortex-M</description>
 928       <files>
 929         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 930         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 931       </files>
 932     </api>
 933     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 934       <description>I2C Driver API for Cortex-M</description>
 935       <files>
 936         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 937         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 938       </files>
 939     </api>
 940     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 941       <description>CAN Driver API for Cortex-M</description>
 942       <files>
 943         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 944         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 945       </files>
 946     </api>
 947     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 948       <description>Flash Driver API for Cortex-M</description>
 949       <files>
 950         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 951         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 952       </files>
 953     </api>
 954     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 955       <description>MCI Driver API for Cortex-M</description>
 956       <files>
 957         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 958         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 959       </files>
 960     </api>
 961     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 962       <description>NAND Flash Driver API for Cortex-M</description>
 963       <files>
 964         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 965         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 966       </files>
 967     </api>
 968     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 969       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 970       <files>
 971         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 972         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 973         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 974       </files>
 975     </api>
 976     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 977       <description>Ethernet MAC Driver API for Cortex-M</description>
 978       <files>
 979         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 980         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 981       </files>
 982     </api>
 983     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 984       <description>Ethernet PHY Driver API for Cortex-M</description>
 985       <files>
 986         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 987         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 988       </files>
 989     </api>
 990     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 991       <description>USB Device Driver API for Cortex-M</description>
 992       <files>
 993         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 994         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 995       </files>
 996     </api>
 997     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
 998       <description>USB Host Driver API for Cortex-M</description>
 999       <files>
1000         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
1001         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
1002       </files>
1003     </api>
1004     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
1005       <description>WiFi driver</description>
1006       <files>
1007         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
1008         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
1009       </files>
1010     </api>
1011     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
1012       <description>Virtual I/O</description>
1013       <files>
1014         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
1015         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
1016         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
1017       </files>
1018     </api>
1019   </apis>
1020
1021   <!-- conditions are dependency rules that can apply to a component or an individual file -->
1022   <conditions>
1023     <!-- compiler -->
1024     <condition id="ARMCC6">
1025       <accept Tcompiler="ARMCC" Toptions="AC6"/>
1026       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1027     </condition>
1028     <condition id="ARMCC5">
1029       <require Tcompiler="ARMCC" Toptions="AC5"/>
1030     </condition>
1031     <condition id="ARMCC">
1032       <require Tcompiler="ARMCC"/>
1033     </condition>
1034     <condition id="GCC">
1035       <require Tcompiler="GCC"/>
1036     </condition>
1037     <condition id="IAR">
1038       <require Tcompiler="IAR"/>
1039     </condition>
1040     <condition id="ARMCC GCC">
1041       <accept Tcompiler="ARMCC"/>
1042       <accept Tcompiler="GCC"/>
1043     </condition>
1044     <condition id="ARMCC GCC IAR">
1045       <accept Tcompiler="ARMCC"/>
1046       <accept Tcompiler="GCC"/>
1047       <accept Tcompiler="IAR"/>
1048     </condition>
1049
1050     <!-- Arm architecture -->
1051     <condition id="ARMv6-M Device">
1052       <description>Armv6-M architecture based device</description>
1053       <accept Dcore="Cortex-M0"/>
1054       <accept Dcore="Cortex-M1"/>
1055       <accept Dcore="Cortex-M0+"/>
1056       <accept Dcore="SC000"/>
1057     </condition>
1058     <condition id="ARMv7-M Device">
1059       <description>Armv7-M architecture based device</description>
1060       <accept Dcore="Cortex-M3"/>
1061       <accept Dcore="Cortex-M4"/>
1062       <accept Dcore="Cortex-M7"/>
1063       <accept Dcore="SC300"/>
1064     </condition>
1065     <condition id="ARMv8-M Device">
1066       <description>Armv8-M architecture based device</description>
1067       <accept Dcore="ARMV8MBL"/>
1068       <accept Dcore="ARMV8MML"/>
1069       <accept Dcore="ARMV81MML"/>
1070       <accept Dcore="Cortex-M23"/>
1071       <accept Dcore="Cortex-M33"/>
1072       <accept Dcore="Cortex-M35P"/>
1073       <accept Dcore="Cortex-M55"/>
1074     </condition>
1075     <condition id="ARMv6_7-M Device">
1076       <description>Armv6_7-M architecture based device</description>
1077       <accept condition="ARMv6-M Device"/>
1078       <accept condition="ARMv7-M Device"/>
1079     </condition>
1080     <condition id="ARMv6_7_8-M Device">
1081       <description>Armv6_7_8-M architecture based device</description>
1082       <accept condition="ARMv6-M Device"/>
1083       <accept condition="ARMv7-M Device"/>
1084       <accept condition="ARMv8-M Device"/>
1085     </condition>
1086     <condition id="ARMv7-A Device">
1087       <description>Armv7-A architecture based device</description>
1088       <accept Dcore="Cortex-A5"/>
1089       <accept Dcore="Cortex-A7"/>
1090       <accept Dcore="Cortex-A9"/>
1091     </condition>
1092
1093     <condition id="TrustZone">
1094       <description>TrustZone</description>
1095       <require Dtz="TZ"/>
1096     </condition>
1097     <condition id="TZ Secure">
1098       <description>TrustZone (Secure)</description>
1099       <require Dtz="TZ"/>
1100       <require Dsecure="Secure"/>
1101     </condition>
1102     <condition id="TZ Non-secure">
1103       <description>TrustZone (Non-secure)</description>
1104       <require Dtz="TZ"/>
1105       <accept Dsecure="Non-secure"/>
1106       <accept Dsecure="TZ-disabled"/>
1107     </condition>
1108     <condition id="TZ Unavailable">
1109       <description>TrustZone not available</description>
1110       <deny Dtz="TZ"/>
1111     </condition>
1112
1113     <!-- ARM core -->
1114     <condition id="CM0">
1115       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1116       <accept Dcore="Cortex-M0"/>
1117       <accept Dcore="Cortex-M0+"/>
1118       <accept Dcore="SC000"/>
1119     </condition>
1120     <condition id="CM1">
1121       <description>Cortex-M1</description>
1122       <require Dcore="Cortex-M1"/>
1123     </condition>
1124     <condition id="CM3">
1125       <description>Cortex-M3 or SC300 processor based device</description>
1126       <accept Dcore="Cortex-M3"/>
1127       <accept Dcore="SC300"/>
1128     </condition>
1129     <condition id="CM4">
1130       <description>Cortex-M4 processor based device</description>
1131       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1132     </condition>
1133     <condition id="CM4_FP">
1134       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1135       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1136       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1137       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1138     </condition>
1139     <condition id="CM7">
1140       <description>Cortex-M7 processor based device</description>
1141       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1142     </condition>
1143     <condition id="CM7_FP">
1144       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1145       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1146       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1147     </condition>
1148     <condition id="CM23">
1149       <description>Cortex-M23 processor based device</description>
1150       <require Dcore="Cortex-M23"/>
1151     </condition>
1152     <condition id="CM33">
1153       <description>Cortex-M33 processor based device</description>
1154       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1155     </condition>
1156     <condition id="CM33_FP">
1157       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1158       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1159     </condition>
1160     <condition id="CM35P">
1161       <description>Cortex-M35P processor based device</description>
1162       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1163     </condition>
1164     <condition id="CM35P_FP">
1165       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1166       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1167     </condition>
1168     <condition id="ARMv8MBL">
1169       <description>Armv8-M Baseline processor based device</description>
1170       <require Dcore="ARMV8MBL"/>
1171     </condition>
1172     <condition id="ARMv8MML">
1173       <description>Armv8-M Mainline processor based device</description>
1174       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1175     </condition>
1176     <condition id="ARMv8MML_FP">
1177       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1178       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1179       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1180     </condition>
1181
1182     <condition id="CM55_NOFPU_NOMVE">
1183       <description>Cortex-M55, no FPU, no MVE</description>
1184       <require Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="NO_MVE"/>
1185     </condition>
1186     <condition id="CM55_NOFPU_MVE">
1187       <description>Cortex-M55, no FPU, MVE</description>
1188       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="MVE"/>
1189       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="FP_MVE"/>
1190     </condition>
1191     <condition id="CM55_FPU">
1192       <description>Cortex-M55, FPU</description>
1193       <accept  Dcore="Cortex-M55" Dfpu="SP_FPU"/>
1194       <accept  Dcore="Cortex-M55" Dfpu="DP_FPU"/>
1195     </condition>
1196
1197     <condition id="CA5_CA9">
1198       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1199       <accept Dcore="Cortex-A5"/>
1200       <accept Dcore="Cortex-A9"/>
1201     </condition>
1202
1203     <condition id="CA7">
1204       <description>Cortex-A7 processor based device</description>
1205       <accept Dcore="Cortex-A7"/>
1206     </condition>
1207
1208     <!-- ARMCC compiler -->
1209     <condition id="CA_ARMCC5">
1210       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1211       <require condition="ARMv7-A Device"/>
1212       <require condition="ARMCC5"/>
1213     </condition>
1214     <condition id="CA_ARMCC6">
1215       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1216       <require condition="ARMv7-A Device"/>
1217       <require condition="ARMCC6"/>
1218     </condition>
1219
1220     <condition id="CM0_ARMCC">
1221       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1222       <require condition="CM0"/>
1223       <require Tcompiler="ARMCC"/>
1224     </condition>
1225     <condition id="CM0_ARMCC5">
1226       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler 5</description>
1227       <require condition="CM0"/>
1228       <require condition="ARMCC5"/>
1229     </condition>
1230     <condition id="CM0_ARMCC6">
1231       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler 6</description>
1232       <require condition="CM0"/>
1233       <require condition="ARMCC6"/>
1234     </condition>
1235     <condition id="CM0_LE_ARMCC">
1236       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1237       <require condition="CM0_ARMCC"/>
1238       <require Dendian="Little-endian"/>
1239     </condition>
1240     <condition id="CM0_BE_ARMCC">
1241       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1242       <require condition="CM0_ARMCC"/>
1243       <require Dendian="Big-endian"/>
1244     </condition>
1245
1246     <condition id="CM1_ARMCC">
1247       <description>Cortex-M1 based device for the Arm Compiler</description>
1248       <require condition="CM1"/>
1249       <require Tcompiler="ARMCC"/>
1250     </condition>
1251     <condition id="CM1_ARMCC5">
1252       <description>Cortex-M1 based device for the Arm Compiler 5</description>
1253       <require condition="CM1"/>
1254       <require condition="ARMCC5"/>
1255     </condition>
1256     <condition id="CM1_ARMCC6">
1257       <description>Cortex-M1 based device for the Arm Compiler 6</description>
1258       <require condition="CM1"/>
1259       <require condition="ARMCC6"/>
1260     </condition>
1261     <condition id="CM1_LE_ARMCC">
1262       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1263       <require condition="CM1_ARMCC"/>
1264       <require Dendian="Little-endian"/>
1265     </condition>
1266     <condition id="CM1_BE_ARMCC">
1267       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1268       <require condition="CM1_ARMCC"/>
1269       <require Dendian="Big-endian"/>
1270     </condition>
1271
1272     <condition id="CM3_ARMCC">
1273       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1274       <require condition="CM3"/>
1275       <require Tcompiler="ARMCC"/>
1276     </condition>
1277     <condition id="CM3_ARMCC5">
1278       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler 5</description>
1279       <require condition="CM3"/>
1280       <require condition="ARMCC5"/>
1281     </condition>
1282     <condition id="CM3_ARMCC6">
1283       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler 6</description>
1284       <require condition="CM3"/>
1285       <require condition="ARMCC6"/>
1286     </condition>
1287     <condition id="CM3_LE_ARMCC">
1288       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1289       <require condition="CM3_ARMCC"/>
1290       <require Dendian="Little-endian"/>
1291     </condition>
1292     <condition id="CM3_BE_ARMCC">
1293       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1294       <require condition="CM3_ARMCC"/>
1295       <require Dendian="Big-endian"/>
1296     </condition>
1297
1298     <condition id="CM4_ARMCC">
1299       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1300       <require condition="CM4"/>
1301       <require Tcompiler="ARMCC"/>
1302     </condition>
1303     <condition id="CM4_ARMCC5">
1304       <description>Cortex-M4 processor based device for the Arm Compiler 5</description>
1305       <require condition="CM4"/>
1306       <require condition="ARMCC5"/>
1307     </condition>
1308     <condition id="CM4_ARMCC6">
1309       <description>Cortex-M4 processor based device for the Arm Compiler 6</description>
1310       <require condition="CM4"/>
1311       <require condition="ARMCC6"/>
1312     </condition>
1313     <condition id="CM4_LE_ARMCC">
1314       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1315       <require condition="CM4_ARMCC"/>
1316       <require Dendian="Little-endian"/>
1317     </condition>
1318     <condition id="CM4_BE_ARMCC">
1319       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1320       <require condition="CM4_ARMCC"/>
1321       <require Dendian="Big-endian"/>
1322     </condition>
1323
1324     <condition id="CM4_FP_ARMCC">
1325       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1326       <require condition="CM4_FP"/>
1327       <require Tcompiler="ARMCC"/>
1328     </condition>
1329     <condition id="CM4_FP_ARMCC5">
1330       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler 5</description>
1331       <require condition="CM4_FP"/>
1332       <require condition="ARMCC5"/>
1333     </condition>
1334     <condition id="CM4_FP_ARMCC6">
1335       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler 6</description>
1336       <require condition="CM4_FP"/>
1337       <require condition="ARMCC6"/>
1338     </condition>
1339     <condition id="CM4_FP_LE_ARMCC">
1340       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1341       <require condition="CM4_FP_ARMCC"/>
1342       <require Dendian="Little-endian"/>
1343     </condition>
1344     <condition id="CM4_FP_BE_ARMCC">
1345       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1346       <require condition="CM4_FP_ARMCC"/>
1347       <require Dendian="Big-endian"/>
1348     </condition>
1349
1350     <condition id="CM7_ARMCC">
1351       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1352       <require condition="CM7"/>
1353       <require Tcompiler="ARMCC"/>
1354     </condition>
1355     <condition id="CM7_ARMCC5">
1356       <description>Cortex-M7 processor based device for the Arm Compiler 5</description>
1357       <require condition="CM7"/>
1358       <require condition="ARMCC5"/>
1359     </condition>
1360     <condition id="CM7_ARMCC6">
1361       <description>Cortex-M7 processor based device for the Arm Compiler 6</description>
1362       <require condition="CM7"/>
1363       <require condition="ARMCC6"/>
1364     </condition>
1365     <condition id="CM7_LE_ARMCC">
1366       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1367       <require condition="CM7_ARMCC"/>
1368       <require Dendian="Little-endian"/>
1369     </condition>
1370     <condition id="CM7_BE_ARMCC">
1371       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1372       <require condition="CM7_ARMCC"/>
1373       <require Dendian="Big-endian"/>
1374     </condition>
1375
1376     <condition id="CM7_FP_ARMCC">
1377       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1378       <require condition="CM7_FP"/>
1379       <require Tcompiler="ARMCC"/>
1380     </condition>
1381     <condition id="CM7_FP_ARMCC5">
1382       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler 5</description>
1383       <require condition="CM7_FP"/>
1384       <require condition="ARMCC5"/>
1385     </condition>
1386     <condition id="CM7_FP_ARMCC6">
1387       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler 6</description>
1388       <require condition="CM7_FP"/>
1389       <require condition="ARMCC6"/>
1390     </condition>
1391     <condition id="CM7_FP_LE_ARMCC">
1392       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1393       <require condition="CM7_FP_ARMCC"/>
1394       <require Dendian="Little-endian"/>
1395     </condition>
1396     <condition id="CM7_FP_BE_ARMCC">
1397       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1398       <require condition="CM7_FP_ARMCC"/>
1399       <require Dendian="Big-endian"/>
1400     </condition>
1401
1402     <condition id="CM23_ARMCC">
1403       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1404       <require condition="CM23"/>
1405       <require Tcompiler="ARMCC"/>
1406     </condition>
1407     <condition id="CM23_LE_ARMCC">
1408       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1409       <require condition="CM23_ARMCC"/>
1410       <require Dendian="Little-endian"/>
1411     </condition>
1412
1413     <condition id="CM33_ARMCC">
1414       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1415       <require condition="CM33"/>
1416       <require Tcompiler="ARMCC"/>
1417     </condition>
1418     <condition id="CM33_LE_ARMCC">
1419       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1420       <require condition="CM33_ARMCC"/>
1421       <require Dendian="Little-endian"/>
1422     </condition>
1423
1424     <condition id="CM33_FP_ARMCC">
1425       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1426       <require condition="CM33_FP"/>
1427       <require Tcompiler="ARMCC"/>
1428     </condition>
1429     <condition id="CM33_FP_LE_ARMCC">
1430       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1431       <require condition="CM33_FP_ARMCC"/>
1432       <require Dendian="Little-endian"/>
1433     </condition>
1434
1435     <condition id="CM35P_ARMCC">
1436       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1437       <require condition="CM35P"/>
1438       <require Tcompiler="ARMCC"/>
1439     </condition>
1440     <condition id="CM35P_LE_ARMCC">
1441       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1442       <require condition="CM35P_ARMCC"/>
1443       <require Dendian="Little-endian"/>
1444     </condition>
1445
1446     <condition id="CM35P_FP_ARMCC">
1447       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1448       <require condition="CM35P_FP"/>
1449       <require Tcompiler="ARMCC"/>
1450     </condition>
1451     <condition id="CM35P_FP_LE_ARMCC">
1452       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1453       <require condition="CM35P_FP_ARMCC"/>
1454       <require Dendian="Little-endian"/>
1455     </condition>
1456
1457     <condition id="CM55_NOFPU_NOMVE_ARMCC">
1458       <description>Cortex-M55 processor, no FPU, no MVE, Arm Compiler</description>
1459       <require condition="CM55_NOFPU_NOMVE"/>
1460       <require Tcompiler="ARMCC"/>
1461     </condition>
1462     <condition id="CM55_NOFPU_MVE_ARMCC">
1463       <description>Cortex-M55 processor, no FPU, MVE, Arm Compiler</description>
1464       <require condition="CM55_NOFPU_MVE"/>
1465       <require Tcompiler="ARMCC"/>
1466     </condition>
1467     <condition id="CM55_FPU_ARMCC">
1468       <description>Cortex-M55 processor, FPU, Arm Compiler</description>
1469       <require condition="CM55_FPU"/>
1470       <require Tcompiler="ARMCC"/>
1471     </condition>
1472     <condition id="CM55_NOFPU_NOMVE_LE_ARMCC">
1473       <description>Cortex-M55 processor, little endian, no FPU, no MVE, Arm Compiler</description>
1474       <require condition="CM55_NOFPU_NOMVE_ARMCC"/>
1475       <require Dendian="Little-endian"/>
1476     </condition>
1477     <condition id="CM55_FPU_LE_ARMCC">
1478       <description>Cortex-M55 processor, little endian, FPU, Arm Compiler</description>
1479       <require condition="CM55_FPU_ARMCC"/>
1480       <require Dendian="Little-endian"/>
1481     </condition>
1482
1483     <condition id="ARMv8MBL_ARMCC">
1484       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1485       <require condition="ARMv8MBL"/>
1486       <require Tcompiler="ARMCC"/>
1487     </condition>
1488     <condition id="ARMv8MBL_LE_ARMCC">
1489       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1490       <require condition="ARMv8MBL_ARMCC"/>
1491       <require Dendian="Little-endian"/>
1492     </condition>
1493
1494     <condition id="ARMv8MML_ARMCC">
1495       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1496       <require condition="ARMv8MML"/>
1497       <require Tcompiler="ARMCC"/>
1498     </condition>
1499     <condition id="ARMv8MML_LE_ARMCC">
1500       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1501       <require condition="ARMv8MML_ARMCC"/>
1502       <require Dendian="Little-endian"/>
1503     </condition>
1504
1505     <condition id="ARMv8MML_FP_ARMCC">
1506       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1507       <require condition="ARMv8MML_FP"/>
1508       <require Tcompiler="ARMCC"/>
1509     </condition>
1510     <condition id="ARMv8MML_FP_LE_ARMCC">
1511       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1512       <require condition="ARMv8MML_FP_ARMCC"/>
1513       <require Dendian="Little-endian"/>
1514     </condition>
1515
1516     <condition id="TZ Secure ARMCC6">
1517       <description>TrustZone (Secure), Arm Compiler</description>
1518       <require condition="TZ Secure"/>
1519       <require condition="ARMCC6"/>
1520     </condition>
1521     <condition id="TZ Non-secure ARMCC6">
1522       <description>TrustZone (Non-secure), Arm Compiler</description>
1523       <require condition="TZ Non-secure"/>
1524       <require condition="ARMCC6"/>
1525     </condition>
1526     <condition id="TZ Unavailable ARMCC6">
1527       <description>TrustZone not available, Arm Compiler</description>
1528       <require condition="TZ Unavailable"/>
1529       <require condition="ARMCC6"/>
1530     </condition>
1531
1532     <!-- GCC compiler -->
1533     <condition id="CA_GCC">
1534       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1535       <require condition="ARMv7-A Device"/>
1536       <require Tcompiler="GCC"/>
1537     </condition>
1538
1539     <condition id="CM0_GCC">
1540       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1541       <require condition="CM0"/>
1542       <require Tcompiler="GCC"/>
1543     </condition>
1544     <condition id="CM0_LE_GCC">
1545       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1546       <require condition="CM0_GCC"/>
1547       <require Dendian="Little-endian"/>
1548     </condition>
1549     <condition id="CM0_BE_GCC">
1550       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1551       <require condition="CM0_GCC"/>
1552       <require Dendian="Big-endian"/>
1553     </condition>
1554
1555     <condition id="CM1_GCC">
1556       <description>Cortex-M1 based device for the GCC Compiler</description>
1557       <require condition="CM1"/>
1558       <require Tcompiler="GCC"/>
1559     </condition>
1560     <condition id="CM1_LE_GCC">
1561       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1562       <require condition="CM1_GCC"/>
1563       <require Dendian="Little-endian"/>
1564     </condition>
1565     <condition id="CM1_BE_GCC">
1566       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1567       <require condition="CM1_GCC"/>
1568       <require Dendian="Big-endian"/>
1569     </condition>
1570
1571     <condition id="CM3_GCC">
1572       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1573       <require condition="CM3"/>
1574       <require Tcompiler="GCC"/>
1575     </condition>
1576     <condition id="CM3_LE_GCC">
1577       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1578       <require condition="CM3_GCC"/>
1579       <require Dendian="Little-endian"/>
1580     </condition>
1581     <condition id="CM3_BE_GCC">
1582       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1583       <require condition="CM3_GCC"/>
1584       <require Dendian="Big-endian"/>
1585     </condition>
1586
1587     <condition id="CM4_GCC">
1588       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1589       <require condition="CM4"/>
1590       <require Tcompiler="GCC"/>
1591     </condition>
1592     <condition id="CM4_LE_GCC">
1593       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1594       <require condition="CM4_GCC"/>
1595       <require Dendian="Little-endian"/>
1596     </condition>
1597     <condition id="CM4_BE_GCC">
1598       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1599       <require condition="CM4_GCC"/>
1600       <require Dendian="Big-endian"/>
1601     </condition>
1602
1603     <condition id="CM4_FP_GCC">
1604       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1605       <require condition="CM4_FP"/>
1606       <require Tcompiler="GCC"/>
1607     </condition>
1608     <condition id="CM4_FP_LE_GCC">
1609       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1610       <require condition="CM4_FP_GCC"/>
1611       <require Dendian="Little-endian"/>
1612     </condition>
1613     <condition id="CM4_FP_BE_GCC">
1614       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1615       <require condition="CM4_FP_GCC"/>
1616       <require Dendian="Big-endian"/>
1617     </condition>
1618
1619     <condition id="CM7_GCC">
1620       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1621       <require condition="CM7"/>
1622       <require Tcompiler="GCC"/>
1623     </condition>
1624     <condition id="CM7_LE_GCC">
1625       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1626       <require condition="CM7_GCC"/>
1627       <require Dendian="Little-endian"/>
1628     </condition>
1629     <condition id="CM7_BE_GCC">
1630       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1631       <require condition="CM7_GCC"/>
1632       <require Dendian="Big-endian"/>
1633     </condition>
1634
1635     <condition id="CM7_FP_GCC">
1636       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1637       <require condition="CM7_FP"/>
1638       <require Tcompiler="GCC"/>
1639     </condition>
1640     <condition id="CM7_FP_LE_GCC">
1641       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1642       <require condition="CM7_FP_GCC"/>
1643       <require Dendian="Little-endian"/>
1644     </condition>
1645     <condition id="CM7_FP_BE_GCC">
1646       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1647       <require condition="CM7_FP_GCC"/>
1648       <require Dendian="Big-endian"/>
1649     </condition>
1650
1651     <condition id="CM23_GCC">
1652       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1653       <require condition="CM23"/>
1654       <require Tcompiler="GCC"/>
1655     </condition>
1656     <condition id="CM23_LE_GCC">
1657       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1658       <require condition="CM23_GCC"/>
1659       <require Dendian="Little-endian"/>
1660     </condition>
1661
1662     <condition id="CM33_GCC">
1663       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1664       <require condition="CM33"/>
1665       <require Tcompiler="GCC"/>
1666     </condition>
1667     <condition id="CM33_LE_GCC">
1668       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1669       <require condition="CM33_GCC"/>
1670       <require Dendian="Little-endian"/>
1671     </condition>
1672
1673     <condition id="CM33_FP_GCC">
1674       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1675       <require condition="CM33_FP"/>
1676       <require Tcompiler="GCC"/>
1677     </condition>
1678     <condition id="CM33_FP_LE_GCC">
1679       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1680       <require condition="CM33_FP_GCC"/>
1681       <require Dendian="Little-endian"/>
1682     </condition>
1683
1684     <condition id="CM35P_GCC">
1685       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1686       <require condition="CM35P"/>
1687       <require Tcompiler="GCC"/>
1688     </condition>
1689     <condition id="CM35P_LE_GCC">
1690       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1691       <require condition="CM35P_GCC"/>
1692       <require Dendian="Little-endian"/>
1693     </condition>
1694
1695     <condition id="CM35P_FP_GCC">
1696       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1697       <require condition="CM35P_FP"/>
1698       <require Tcompiler="GCC"/>
1699     </condition>
1700     <condition id="CM35P_FP_LE_GCC">
1701       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1702       <require condition="CM35P_FP_GCC"/>
1703       <require Dendian="Little-endian"/>
1704     </condition>
1705
1706     <condition id="CM55_NOFPU_NOMVE_GCC">
1707       <description>Cortex-M55 processor, no FPU, no MVE, GCC Compiler</description>
1708       <require condition="CM55_NOFPU_NOMVE"/>
1709       <require Tcompiler="GCC"/>
1710     </condition>
1711     <condition id="CM55_NOFPU_MVE_GCC">
1712       <description>Cortex-M55 processor, no FPU, MVE, GCC Compiler</description>
1713       <require condition="CM55_NOFPU_MVE"/>
1714       <require Tcompiler="GCC"/>
1715     </condition>
1716     <condition id="CM55_FPU_GCC">
1717       <description>Cortex-M55 processor, FPU, GCC Compiler</description>
1718       <require condition="CM55_FPU"/>
1719       <require Tcompiler="GCC"/>
1720     </condition>
1721     <condition id="CM55_NOFPU_NOMVE_LE_GCC">
1722       <description>Cortex-M55 processor, little endian, no FPU, no MVE, GCC Compiler</description>
1723       <require condition="CM55_NOFPU_NOMVE_GCC"/>
1724       <require Dendian="Little-endian"/>
1725     </condition>
1726     <condition id="CM55_FPU_LE_GCC">
1727       <description>Cortex-M55 processor, little endian, FPU, GCC Compiler</description>
1728       <require condition="CM55_FPU_GCC"/>
1729       <require Dendian="Little-endian"/>
1730     </condition>
1731
1732     <condition id="ARMv8MBL_GCC">
1733       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1734       <require condition="ARMv8MBL"/>
1735       <require Tcompiler="GCC"/>
1736     </condition>
1737     <condition id="ARMv8MBL_LE_GCC">
1738       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1739       <require condition="ARMv8MBL_GCC"/>
1740       <require Dendian="Little-endian"/>
1741     </condition>
1742
1743     <condition id="ARMv8MML_GCC">
1744       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1745       <require condition="ARMv8MML"/>
1746       <require Tcompiler="GCC"/>
1747     </condition>
1748     <condition id="ARMv8MML_LE_GCC">
1749       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1750       <require condition="ARMv8MML_GCC"/>
1751       <require Dendian="Little-endian"/>
1752     </condition>
1753
1754     <condition id="ARMv8MML_FP_GCC">
1755       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1756       <require condition="ARMv8MML_FP"/>
1757       <require Tcompiler="GCC"/>
1758     </condition>
1759     <condition id="ARMv8MML_FP_LE_GCC">
1760       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1761       <require condition="ARMv8MML_FP_GCC"/>
1762       <require Dendian="Little-endian"/>
1763     </condition>
1764
1765     <!-- IAR compiler -->
1766     <condition id="CA_IAR">
1767       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1768       <require condition="ARMv7-A Device"/>
1769       <require Tcompiler="IAR"/>
1770     </condition>
1771
1772     <condition id="CM0_IAR">
1773       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1774       <require condition="CM0"/>
1775       <require Tcompiler="IAR"/>
1776     </condition>
1777     <condition id="CM0_LE_IAR">
1778       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1779       <require condition="CM0_IAR"/>
1780       <require Dendian="Little-endian"/>
1781     </condition>
1782     <condition id="CM0_BE_IAR">
1783       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1784       <require condition="CM0_IAR"/>
1785       <require Dendian="Big-endian"/>
1786     </condition>
1787
1788     <condition id="CM1_IAR">
1789       <description>Cortex-M1 based device for the IAR Compiler</description>
1790       <require condition="CM1"/>
1791       <require Tcompiler="IAR"/>
1792     </condition>
1793     <condition id="CM1_LE_IAR">
1794       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1795       <require condition="CM1_IAR"/>
1796       <require Dendian="Little-endian"/>
1797     </condition>
1798     <condition id="CM1_BE_IAR">
1799       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1800       <require condition="CM1_IAR"/>
1801       <require Dendian="Big-endian"/>
1802     </condition>
1803
1804     <condition id="CM3_IAR">
1805       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1806       <require condition="CM3"/>
1807       <require Tcompiler="IAR"/>
1808     </condition>
1809     <condition id="CM3_LE_IAR">
1810       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1811       <require condition="CM3_IAR"/>
1812       <require Dendian="Little-endian"/>
1813     </condition>
1814     <condition id="CM3_BE_IAR">
1815       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1816       <require condition="CM3_IAR"/>
1817       <require Dendian="Big-endian"/>
1818     </condition>
1819
1820     <condition id="CM4_IAR">
1821       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1822       <require condition="CM4"/>
1823       <require Tcompiler="IAR"/>
1824     </condition>
1825     <condition id="CM4_LE_IAR">
1826       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1827       <require condition="CM4_IAR"/>
1828       <require Dendian="Little-endian"/>
1829     </condition>
1830     <condition id="CM4_BE_IAR">
1831       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1832       <require condition="CM4_IAR"/>
1833       <require Dendian="Big-endian"/>
1834     </condition>
1835
1836     <condition id="CM4_FP_IAR">
1837       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1838       <require condition="CM4_FP"/>
1839       <require Tcompiler="IAR"/>
1840     </condition>
1841     <condition id="CM4_FP_LE_IAR">
1842       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1843       <require condition="CM4_FP_IAR"/>
1844       <require Dendian="Little-endian"/>
1845     </condition>
1846     <condition id="CM4_FP_BE_IAR">
1847       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1848       <require condition="CM4_FP_IAR"/>
1849       <require Dendian="Big-endian"/>
1850     </condition>
1851
1852     <condition id="CM7_IAR">
1853       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1854       <require condition="CM7"/>
1855       <require Tcompiler="IAR"/>
1856     </condition>
1857     <condition id="CM7_LE_IAR">
1858       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1859       <require condition="CM7_IAR"/>
1860       <require Dendian="Little-endian"/>
1861     </condition>
1862     <condition id="CM7_BE_IAR">
1863       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1864       <require condition="CM7_IAR"/>
1865       <require Dendian="Big-endian"/>
1866     </condition>
1867
1868     <condition id="CM7_FP_IAR">
1869       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1870       <require condition="CM7_FP"/>
1871       <require Tcompiler="IAR"/>
1872     </condition>
1873     <condition id="CM7_FP_LE_IAR">
1874       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1875       <require condition="CM7_FP_IAR"/>
1876       <require Dendian="Little-endian"/>
1877     </condition>
1878     <condition id="CM7_FP_BE_IAR">
1879       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1880       <require condition="CM7_FP_IAR"/>
1881       <require Dendian="Big-endian"/>
1882     </condition>
1883
1884     <condition id="CM23_IAR">
1885       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1886       <require condition="CM23"/>
1887       <require Tcompiler="IAR"/>
1888     </condition>
1889     <condition id="CM23_LE_IAR">
1890       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1891       <require condition="CM23_IAR"/>
1892       <require Dendian="Little-endian"/>
1893     </condition>
1894
1895     <condition id="CM33_IAR">
1896       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1897       <require condition="CM33"/>
1898       <require Tcompiler="IAR"/>
1899     </condition>
1900     <condition id="CM33_LE_IAR">
1901       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1902       <require condition="CM33_IAR"/>
1903       <require Dendian="Little-endian"/>
1904     </condition>
1905
1906     <condition id="CM33_FP_IAR">
1907       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1908       <require condition="CM33_FP"/>
1909       <require Tcompiler="IAR"/>
1910     </condition>
1911     <condition id="CM33_FP_LE_IAR">
1912       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1913       <require condition="CM33_FP_IAR"/>
1914       <require Dendian="Little-endian"/>
1915     </condition>
1916
1917     <condition id="CM35P_IAR">
1918       <description>Cortex-M35P processor based device for the IAR Compiler</description>
1919       <require condition="CM35P"/>
1920       <require Tcompiler="IAR"/>
1921     </condition>
1922     <condition id="CM35P_LE_IAR">
1923       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
1924       <require condition="CM35P_IAR"/>
1925       <require Dendian="Little-endian"/>
1926     </condition>
1927
1928     <condition id="CM35P_FP_IAR">
1929       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
1930       <require condition="CM35P_FP"/>
1931       <require Tcompiler="IAR"/>
1932     </condition>
1933     <condition id="CM35P_FP_LE_IAR">
1934       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1935       <require condition="CM35P_FP_IAR"/>
1936       <require Dendian="Little-endian"/>
1937     </condition>
1938
1939     <condition id="CM55_NOFPU_NOMVE_IAR">
1940       <description>Cortex-M55 processor, no FPU, no MVE, IAR Compiler</description>
1941       <require condition="CM55_NOFPU_NOMVE"/>
1942       <require Tcompiler="IAR"/>
1943     </condition>
1944     <condition id="CM55_NOFPU_MVE_IAR">
1945       <description>Cortex-M55 processor, no FPU, MVE, IAR Compiler</description>
1946       <require condition="CM55_NOFPU_MVE"/>
1947       <require Tcompiler="IAR"/>
1948     </condition>
1949     <condition id="CM55_FPU_IAR">
1950       <description>Cortex-M55 processor, FPU, IAR Compiler</description>
1951       <require condition="CM55_FPU"/>
1952       <require Tcompiler="IAR"/>
1953     </condition>
1954     <condition id="CM55_NOFPU_NOMVE_LE_IAR">
1955       <description>Cortex-M55 processor, little endian, no FPU, no MVE, IAR Compiler</description>
1956       <require condition="CM55_NOFPU_NOMVE_IAR"/>
1957       <require Dendian="Little-endian"/>
1958     </condition>
1959     <condition id="CM55_FPU_LE_IAR">
1960       <description>Cortex-M55 processor, little endian, FPU, IAR Compiler</description>
1961       <require condition="CM55_FPU_IAR"/>
1962       <require Dendian="Little-endian"/>
1963     </condition>
1964
1965     <condition id="ARMv8MBL_IAR">
1966       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1967       <require condition="ARMv8MBL"/>
1968       <require Tcompiler="IAR"/>
1969     </condition>
1970     <condition id="ARMv8MBL_LE_IAR">
1971       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1972       <require condition="ARMv8MBL_IAR"/>
1973       <require Dendian="Little-endian"/>
1974     </condition>
1975
1976     <condition id="ARMv8MML_IAR">
1977       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1978       <require condition="ARMv8MML"/>
1979       <require Tcompiler="IAR"/>
1980     </condition>
1981     <condition id="ARMv8MML_LE_IAR">
1982       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1983       <require condition="ARMv8MML_IAR"/>
1984       <require Dendian="Little-endian"/>
1985     </condition>
1986
1987     <condition id="ARMv8MML_FP_IAR">
1988       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1989       <require condition="ARMv8MML_FP"/>
1990       <require Tcompiler="IAR"/>
1991     </condition>
1992     <condition id="ARMv8MML_FP_LE_IAR">
1993       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1994       <require condition="ARMv8MML_FP_IAR"/>
1995       <require Dendian="Little-endian"/>
1996     </condition>
1997
1998     <!-- conditions selecting single devices and CMSIS Core -->
1999     <condition id="ARMCM0 CMSIS">
2000       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2001       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2002       <require Cclass="CMSIS" Cgroup="CORE"/>
2003     </condition>
2004
2005     <condition id="ARMCM0+ CMSIS">
2006       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2007       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2008       <require Cclass="CMSIS" Cgroup="CORE"/>
2009     </condition>
2010
2011     <condition id="ARMCM1 CMSIS">
2012       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2013       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2014       <require Cclass="CMSIS" Cgroup="CORE"/>
2015     </condition>
2016
2017     <condition id="ARMCM3 CMSIS">
2018       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2019       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2020       <require Cclass="CMSIS" Cgroup="CORE"/>
2021     </condition>
2022
2023     <condition id="ARMCM4 CMSIS">
2024       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2025       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2026       <require Cclass="CMSIS" Cgroup="CORE"/>
2027     </condition>
2028
2029     <condition id="ARMCM7 CMSIS">
2030       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2031       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2032       <require Cclass="CMSIS" Cgroup="CORE"/>
2033     </condition>
2034
2035     <condition id="ARMCM23 CMSIS">
2036       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2037       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2038       <require Cclass="CMSIS" Cgroup="CORE"/>
2039     </condition>
2040
2041     <condition id="ARMCM33 CMSIS">
2042       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2043       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2044       <require Cclass="CMSIS" Cgroup="CORE"/>
2045     </condition>
2046
2047     <condition id="ARMCM35P CMSIS">
2048       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2049       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2050       <require Cclass="CMSIS" Cgroup="CORE"/>
2051     </condition>
2052
2053     <condition id="ARMCM55 CMSIS">
2054       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2055       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2056       <require Cclass="CMSIS" Cgroup="CORE"/>
2057     </condition>
2058
2059     <condition id="ARMSC000 CMSIS">
2060       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2061       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2062       <require Cclass="CMSIS" Cgroup="CORE"/>
2063     </condition>
2064
2065     <condition id="ARMSC300 CMSIS">
2066       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2067       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2068       <require Cclass="CMSIS" Cgroup="CORE"/>
2069     </condition>
2070
2071     <condition id="ARMv8MBL CMSIS">
2072       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2073       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2074       <require Cclass="CMSIS" Cgroup="CORE"/>
2075     </condition>
2076
2077     <condition id="ARMv8MML CMSIS">
2078       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2079       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2080       <require Cclass="CMSIS" Cgroup="CORE"/>
2081     </condition>
2082
2083     <condition id="ARMv81MML CMSIS">
2084       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2085       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2086       <require Cclass="CMSIS" Cgroup="CORE"/>
2087     </condition>
2088
2089     <condition id="ARMCA5 CMSIS">
2090       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2091       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2092       <require Cclass="CMSIS" Cgroup="CORE"/>
2093     </condition>
2094
2095     <condition id="ARMCA7 CMSIS">
2096       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2097       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2098       <require Cclass="CMSIS" Cgroup="CORE"/>
2099     </condition>
2100
2101     <condition id="ARMCA9 CMSIS">
2102       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2103       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2104       <require Cclass="CMSIS" Cgroup="CORE"/>
2105     </condition>
2106
2107     <!-- CMSIS DSP -->
2108     <condition id="CMSIS DSP">
2109       <description>Components required for DSP</description>
2110       <require condition="ARMv6_7_8-M Device"/>
2111       <require condition="ARMCC GCC IAR"/>
2112       <require Cclass="CMSIS" Cgroup="CORE"/>
2113     </condition>
2114
2115     <!-- CMSIS NN -->
2116     <condition id="CMSIS NN">
2117       <description>Components required for NN</description>
2118       <require Cclass="CMSIS" Cgroup="DSP"/>
2119     </condition>
2120
2121     <!-- RTOS RTX -->
2122     <condition id="RTOS RTX">
2123       <description>Components required for RTOS RTX</description>
2124       <require condition="ARMv6_7-M Device"/>
2125       <require condition="ARMCC GCC IAR"/>
2126       <require Cclass="Device" Cgroup="Startup"/>
2127       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2128     </condition>
2129     <condition id="RTOS RTX IFX">
2130       <description>Components required for RTOS RTX IFX</description>
2131       <require condition="ARMv6_7-M Device"/>
2132       <require condition="ARMCC GCC IAR"/>
2133       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2134       <require Cclass="Device" Cgroup="Startup"/>
2135       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2136     </condition>
2137     <condition id="RTOS RTX5">
2138       <description>Components required for RTOS RTX5</description>
2139       <require condition="ARMv6_7_8-M Device"/>
2140       <require condition="ARMCC GCC IAR"/>
2141       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2142     </condition>
2143     <condition id="RTOS2 RTX5">
2144       <description>Components required for RTOS2 RTX5</description>
2145       <require condition="ARMv6_7_8-M Device"/>
2146       <require condition="ARMCC GCC IAR"/>
2147       <require Cclass="CMSIS"  Cgroup="CORE"/>
2148       <require Cclass="Device" Cgroup="Startup"/>
2149     </condition>
2150     <condition id="RTOS2 RTX5 v7-A">
2151       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2152       <require condition="ARMv7-A Device"/>
2153       <require condition="ARMCC GCC IAR"/>
2154       <require Cclass="CMSIS"  Cgroup="CORE"/>
2155       <require Cclass="Device" Cgroup="Startup"/>
2156       <require Cclass="Device" Cgroup="OS Tick"/>
2157       <require Cclass="Device" Cgroup="IRQ Controller"/>
2158     </condition>
2159     <condition id="RTOS2 RTX5 NS">
2160       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2161       <require condition="ARMv8-M Device"/>
2162       <require condition="TZ Non-secure"/>
2163       <require condition="ARMCC GCC IAR"/>
2164       <require Cclass="CMSIS"  Cgroup="CORE"/>
2165       <require Cclass="Device" Cgroup="Startup"/>
2166     </condition>
2167
2168     <!-- OS Tick -->
2169     <condition id="OS Tick PTIM">
2170       <description>Components required for OS Tick Private Timer</description>
2171       <require condition="CA5_CA9"/>
2172       <require Cclass="Device" Cgroup="IRQ Controller"/>
2173     </condition>
2174
2175     <condition id="OS Tick GTIM">
2176       <description>Components required for OS Tick Generic Physical Timer</description>
2177       <require condition="CA7"/>
2178       <require Cclass="Device" Cgroup="IRQ Controller"/>
2179     </condition>
2180
2181   </conditions>
2182
2183   <components>
2184     <!-- CMSIS-Core component -->
2185     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.5.0"  condition="ARMv6_7_8-M Device" >
2186       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2187       <files>
2188         <!-- CPU independent -->
2189         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2190         <file category="include" name="CMSIS/Core/Include/"/>
2191         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
2192         <!-- Code template -->
2193         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2194         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2195       </files>
2196     </component>
2197
2198     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.2.1"  condition="ARMv7-A Device" >
2199       <description>CMSIS-CORE for Cortex-A</description>
2200       <files>
2201         <!-- CPU independent -->
2202         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2203         <file category="include" name="CMSIS/Core_A/Include/"/>
2204       </files>
2205     </component>
2206
2207     <!-- CMSIS-Startup components -->
2208     <!-- Cortex-M0 -->
2209     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS" isDefaultVariant="true">
2210       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2211       <files>
2212         <!-- include folder / device header file -->
2213         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2214         <!-- startup / system file -->
2215         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
2216         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2217         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2218         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2219         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2220       </files>
2221     </component>
2222     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2223       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2224       <files>
2225         <!-- include folder / device header file -->
2226         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2227         <!-- startup / system file -->
2228         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2229         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.2.0" attr="config" condition="GCC"/>
2230         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2231         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2232         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2233       </files>
2234     </component>
2235
2236     <!-- Cortex-M0+ -->
2237     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS" isDefaultVariant="true">
2238       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2239       <files>
2240         <!-- include folder / device header file -->
2241         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2242         <!-- startup / system file -->
2243         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
2244         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2245         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2246         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
2247         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2248       </files>
2249     </component>
2250     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM0+ CMSIS">
2251       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2252       <files>
2253         <!-- include folder / device header file -->
2254         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2255         <!-- startup / system file -->
2256         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2257         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.2.0" attr="config" condition="GCC"/>
2258         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
2259         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2260         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2261       </files>
2262     </component>
2263
2264     <!-- Cortex-M1 -->
2265     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS" isDefaultVariant="true">
2266       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2267       <files>
2268         <!-- include folder / device header file -->
2269         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2270         <!-- startup / system file -->
2271         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
2272         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2273         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2274         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2275         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2276       </files>
2277     </component>
2278     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2279       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2280       <files>
2281         <!-- include folder / device header file -->
2282         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2283         <!-- startup / system file -->
2284         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2285         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.2.0" attr="config" condition="GCC"/>
2286         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2287         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2288         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2289       </files>
2290     </component>
2291
2292     <!-- Cortex-M3 -->
2293     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="true">
2294       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2295       <files>
2296         <!-- include folder / device header file -->
2297         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2298         <!-- startup / system file -->
2299         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
2300         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2301         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2302         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2303         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2304       </files>
2305     </component>
2306     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2307       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2308       <files>
2309         <!-- include folder / device header file -->
2310         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2311         <!-- startup / system file -->
2312         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2313         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.2.0" attr="config" condition="GCC"/>
2314         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2315         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2316         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2317       </files>
2318     </component>
2319
2320     <!-- Cortex-M4 -->
2321     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS" isDefaultVariant="true">
2322       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2323       <files>
2324         <!-- include folder / device header file -->
2325         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2326         <!-- startup / system file -->
2327         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
2328         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2329         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2330         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2331        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2332       </files>
2333     </component>
2334     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2335       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2336       <files>
2337         <!-- include folder / device header file -->
2338         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2339         <!-- startup / system file -->
2340         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2341         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.2.0" attr="config" condition="GCC"/>
2342         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2343         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2344         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2345       </files>
2346     </component>
2347
2348     <!-- Cortex-M7 -->
2349     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS" isDefaultVariant="true">
2350       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2351       <files>
2352         <!-- include folder / device header file -->
2353         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2354         <!-- startup / system file -->
2355         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
2356         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2357         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2358         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2359         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2360       </files>
2361     </component>
2362     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2363       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2364       <files>
2365         <!-- include folder / device header file -->
2366         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2367         <!-- startup / system file -->
2368         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2369         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.2.0" attr="config" condition="GCC"/>
2370         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2371         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2372         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2373       </files>
2374     </component>
2375
2376     <!-- Cortex-M23 -->
2377     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM23 CMSIS" isDefaultVariant="true">
2378       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2379       <files>
2380         <!-- include folder / device header file -->
2381         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2382         <!-- startup / system file -->
2383         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"             version="2.1.0" attr="config"/>
2384         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2385         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2386         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2387         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2388         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2389         <!-- SAU configuration -->
2390         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2391       </files>
2392     </component>
2393     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM23 CMSIS">
2394       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2395       <files>
2396         <!-- include folder / device header file -->
2397         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2398         <!-- startup / system file -->
2399         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2400         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2401         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2402         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2403         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S"         version="2.2.0" attr="config" condition="GCC"/>
2404         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2405         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.1.0" attr="config" condition="IAR"/>
2406         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2407         <!-- SAU configuration -->
2408         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2409       </files>
2410     </component>
2411
2412     <!-- Cortex-M33 -->
2413     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM33 CMSIS" isDefaultVariant="true">
2414       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2415       <files>
2416         <!-- include folder / device header file -->
2417         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2418         <!-- startup / system file -->
2419         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.1.0" attr="config"/>
2420         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2421         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2422         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2423         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2424         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2425         <!-- SAU configuration -->
2426         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2427       </files>
2428     </component>
2429     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM33 CMSIS">
2430       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2431       <files>
2432         <!-- include folder / device header file -->
2433         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2434         <!-- startup / system file -->
2435         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2436         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2437         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2438         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2439         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.3.0" attr="config" condition="GCC"/>
2440         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2441         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.1.0" attr="config" condition="IAR"/>
2442         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2443         <!-- SAU configuration -->
2444         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2445       </files>
2446     </component>
2447
2448     <!-- Cortex-M35P -->
2449     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM35P CMSIS" isDefaultVariant="true">
2450       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2451       <files>
2452         <!-- include folder / device header file -->
2453         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2454         <!-- startup / system file -->
2455         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.1.0" attr="config"/>
2456         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2457         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2458         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2459         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2460         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2461         <!-- SAU configuration -->
2462         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2463       </files>
2464     </component>
2465     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM35P CMSIS">
2466       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2467       <files>
2468         <!-- include folder / device header file -->
2469         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2470         <!-- startup / system file -->
2471         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2472         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2473         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2474         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2475         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.3.0" attr="config" condition="GCC"/>
2476         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2477         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.1.0" attr="config" condition="IAR"/>
2478         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2479         <!-- SAU configuration -->
2480         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2481       </files>
2482     </component>
2483
2484     <!-- Cortex-M55 -->
2485     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM55 CMSIS" isDefaultVariant="true">
2486       <description>System and Startup for Generic Cortex-M55 device</description>
2487       <files>
2488         <!-- include folder / device header file -->
2489         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2490         <!-- startup / system file -->
2491         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.1.0" attr="config"/>
2492         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2493         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2494         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2495         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2496         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.0.1" attr="config"/>
2497         <!-- SAU configuration -->
2498         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2499       </files>
2500     </component>
2501
2502     <!-- Cortex-SC000 -->
2503     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS" isDefaultVariant="true">
2504       <description>System and Startup for Generic Arm SC000 device</description>
2505       <files>
2506         <!-- include folder / device header file -->
2507         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2508         <!-- startup / system file -->
2509         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
2510         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2511         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2512         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2513         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2514       </files>
2515     </component>
2516     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2517       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2518       <files>
2519         <!-- include folder / device header file -->
2520         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2521         <!-- startup / system file -->
2522         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2523         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.2.0" attr="config" condition="GCC"/>
2524         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2525         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2526         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2527       </files>
2528     </component>
2529
2530     <!-- Cortex-SC300 -->
2531     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS" isDefaultVariant="true">
2532       <description>System and Startup for Generic Arm SC300 device</description>
2533       <files>
2534         <!-- include folder / device header file -->
2535         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2536         <!-- startup / system file -->
2537         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
2538         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2539         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2540         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2541         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2542       </files>
2543     </component>
2544     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2545       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2546       <files>
2547         <!-- include folder / device header file -->
2548         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2549         <!-- startup / system file -->
2550         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2551         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.2.0" attr="config" condition="GCC"/>
2552         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2553         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2554         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2555       </files>
2556     </component>
2557
2558     <!-- ARMv8MBL -->
2559     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MBL CMSIS" isDefaultVariant="true">
2560       <description>System and Startup for Generic Armv8-M Baseline device</description>
2561       <files>
2562         <!-- include folder / device header file -->
2563         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2564         <!-- startup / system file -->
2565         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"             version="2.1.0" attr="config"/>
2566         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2567         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2568         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2569         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2570         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2571         <!-- SAU configuration -->
2572         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2573       </files>
2574     </component>
2575     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMv8MBL CMSIS">
2576       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2577       <files>
2578         <!-- include folder / device header file -->
2579         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2580         <!-- startup / system file -->
2581         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2582         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2583         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2584         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2585         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S"         version="2.2.0" attr="config" condition="GCC"/>
2586         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2587         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2588         <!-- SAU configuration -->
2589         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2590       </files>
2591     </component>
2592
2593     <!-- ARMv8MML -->
2594     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MML CMSIS" isDefaultVariant="true">
2595       <description>System and Startup for Generic Armv8-M Mainline device</description>
2596       <files>
2597         <!-- include folder / device header file -->
2598         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2599         <!-- startup / system file -->
2600         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.1.0" attr="config"/>
2601         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2602         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2603         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2604         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2605         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2606         <!-- SAU configuration -->
2607         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2608       </files>
2609     </component>
2610     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMv8MML CMSIS">
2611       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2612       <files>
2613         <!-- include folder / device header file -->
2614         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2615         <!-- startup / system file -->
2616         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2617         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2618         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2619         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2620         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.3.0" attr="config" condition="GCC"/>
2621         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2622         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2623         <!-- SAU configuration -->
2624         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2625       </files>
2626     </component>
2627
2628     <!-- ARMv81MML -->
2629     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.2.0" condition="ARMv81MML CMSIS" isDefaultVariant="true">
2630       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2631       <files>
2632         <!-- include folder / device header file -->
2633         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2634         <!-- startup / system file -->
2635         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.1.0" attr="config"/>
2636         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2637         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2638         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2639         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.2.0" attr="config" condition="GCC"/>
2640         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
2641         <!-- SAU configuration -->
2642         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
2643       </files>
2644     </component>
2645
2646     <!-- Cortex-A5 -->
2647     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA5 CMSIS">
2648       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2649       <files>
2650         <!-- include folder / device header file -->
2651         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2652         <!-- startup / system / mmu files -->
2653         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2654         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2655         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2656         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2657         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.1" attr="config" condition="GCC"/>
2658         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2659         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2660         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2661         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2662         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2663         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2664         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2665
2666       </files>
2667     </component>
2668
2669     <!-- Cortex-A7 -->
2670     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA7 CMSIS">
2671       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2672       <files>
2673         <!-- include folder / device header file -->
2674         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2675         <!-- startup / system / mmu files -->
2676         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2677         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2678         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2679         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2680         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.1" attr="config" condition="GCC"/>
2681         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2682         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2683         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2684         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2685         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2686         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2687         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2688       </files>
2689     </component>
2690
2691     <!-- Cortex-A9 -->
2692     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.2" condition="ARMCA9 CMSIS">
2693       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2694       <files>
2695         <!-- include folder / device header file -->
2696         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2697         <!-- startup / system / mmu files -->
2698         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2699         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2700         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2701         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2702         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.1" attr="config" condition="GCC"/>
2703         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2704         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2705         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2706         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2707         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2708         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2709         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2710       </files>
2711     </component>
2712
2713     <!-- IRQ Controller -->
2714     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2715       <description>IRQ Controller implementation using GIC</description>
2716       <files>
2717         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2718       </files>
2719     </component>
2720
2721     <!-- OS Tick -->
2722     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2723       <description>OS Tick implementation using Private Timer</description>
2724       <files>
2725         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2726       </files>
2727     </component>
2728
2729     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2730       <description>OS Tick implementation using Generic Physical Timer</description>
2731       <files>
2732         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2733       </files>
2734     </component>
2735
2736     <!-- CMSIS-DSP component -->
2737     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.10.0-dev" isDefaultVariant="true" condition="CMSIS DSP">
2738       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2739       <files>
2740         <!-- CPU independent -->
2741         <file category="doc"      name="CMSIS/Documentation/DSP/html/index.html"/>
2742         <file category="header"   name="CMSIS/DSP/Include/arm_math.h"/>
2743         <file category="header"   name="CMSIS/DSP/Include/arm_math_f16.h"/>
2744         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables.h"/>
2745         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables_f16.h"/>
2746         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs.h"/>
2747         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs_f16.h"/>
2748
2749         <file category="include"  name="CMSIS/DSP/PrivateInclude/"/>
2750         <file category="include"  name="CMSIS/DSP/Include/"/>
2751
2752         <!-- DSP sources (core) -->
2753         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
2754
2755         <file category="source"   name="CMSIS/DSP/Source/QuaternionMathFunctions/QuaternionMathFunctions.c"/>
2756
2757         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
2758         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
2759         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
2760         <file category="source"   name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
2761         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
2762         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
2763         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
2764         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
2765         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
2766         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
2767         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
2768         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
2769
2770         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctions.c"/>
2771
2772         <!-- DSP sources F16 versions -->
2773         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.c"/>
2774         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c"/>
2775         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.c"/>
2776         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTablesF16.c"/>
2777         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctionsF16.c"/>
2778         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctionsF16.c"/>
2779         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.c"/>
2780         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c"/>
2781         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctionsF16.c"/>
2782         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctionsF16.c"/>
2783         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctionsF16.c"/>
2784         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctionsF16.c"/>
2785         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctionsF16.c"/>
2786
2787         <!-- Compute Library for Cortex-A -->
2788         <file category="header"   name="CMSIS/DSP/ComputeLibrary/Include/NEMath.h"        condition="ARMv7-A Device"/>
2789         <file category="source"   name="CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c"  condition="ARMv7-A Device"/>
2790       </files>
2791     </component>
2792
2793     <!-- CMSIS-NN component -->
2794     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="3.0.0" condition="CMSIS NN">
2795       <description>CMSIS-NN Neural Network Library</description>
2796       <files>
2797         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2798         <file category="header" name="CMSIS/NN/Include/arm_nn_types.h"/>
2799         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2800         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
2801         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
2802
2803         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2804         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2805         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2806         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
2807         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
2808         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
2809         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c"/>
2810         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2811         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.c"/>
2812         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2813         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2814         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
2815         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
2816         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
2817         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
2818         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
2819         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
2820         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2821         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2822         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
2823         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c"/>
2824         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2825         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2826         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
2827         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
2828         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2829         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
2830         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
2831         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
2832         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
2833         <file category="source" name="CMSIS/NN/Source/SVDFunctions/arm_svdf_s8.c"/>
2834         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
2835         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
2836         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2837         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
2838         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
2839         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
2840         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2841         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2842         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2843         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2844         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
2845         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
2846         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2847         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
2848         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c"/>
2849         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
2850         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
2851         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
2852         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.c"/>
2853         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
2854         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
2855         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2856         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c"/>
2857         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2858         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
2859         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
2860         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
2861         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
2862         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2863         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2864         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2865         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2866         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2867         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2868         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2869         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
2870         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
2871         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2872         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
2873       </files>
2874     </component>
2875
2876     <!-- CMSIS-RTOS Keil RTX component -->
2877     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2878       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2879       <RTE_Components_h>
2880         <!-- the following content goes into file 'RTE_Components.h' -->
2881         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2882         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2883       </RTE_Components_h>
2884       <files>
2885         <!-- CPU independent -->
2886         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2887         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2888         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2889
2890         <!-- RTX templates -->
2891         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2892         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2893         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2894         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2895         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2896         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2897         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2898         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2899         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2900         <!-- tool-chain specific template file -->
2901         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2902         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2903         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2904
2905         <!-- CPU and Compiler dependent -->
2906         <!-- ARMCC -->
2907         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2908         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2909         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2910         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2911         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2912         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2913         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2914         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2915         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2916         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2917         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2918         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2919         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2920         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2921         <!-- GCC -->
2922         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2923         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2924         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2925         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2926         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2927         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2928         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2929         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2930         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2931         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2932         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2933         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2934         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2935         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2936         <!-- IAR -->
2937         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2938         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2939         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2940         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2941         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2942         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2943         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2944         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2945         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2946         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2947         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2948         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2949         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2950         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2951       </files>
2952     </component>
2953     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2954     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
2955       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2956       <RTE_Components_h>
2957         <!-- the following content goes into file 'RTE_Components.h' -->
2958         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2959         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2960       </RTE_Components_h>
2961       <files>
2962         <!-- CPU independent -->
2963         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2964         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2965         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2966
2967         <!-- RTX templates -->
2968         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2969         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2970         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2971         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2972         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2973         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2974         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2975         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2976         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2977         <!-- tool-chain specific template file -->
2978         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2979         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2980         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2981
2982         <!-- CPU and Compiler dependent -->
2983         <!-- ARMCC -->
2984         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2985         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2986         <!-- GCC -->
2987         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2988         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2989         <!-- IAR -->
2990       </files>
2991     </component>
2992
2993     <!-- CMSIS-RTOS Keil RTX5 component -->
2994     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.3" Capiversion="1.0.0" condition="RTOS RTX5">
2995       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2996       <RTE_Components_h>
2997         <!-- the following content goes into file 'RTE_Components.h' -->
2998         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2999         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3000       </RTE_Components_h>
3001       <files>
3002         <!-- RTX header file -->
3003         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3004         <!-- RTX compatibility module for API V1 -->
3005         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3006       </files>
3007     </component>
3008
3009     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3010     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5">
3011       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
3012       <RTE_Components_h>
3013         <!-- the following content goes into file 'RTE_Components.h' -->
3014         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3015         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3016       </RTE_Components_h>
3017       <files>
3018         <!-- RTX documentation -->
3019         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3020
3021         <!-- RTX header files -->
3022         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3023
3024         <!-- RTX configuration -->
3025         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3026         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3027
3028         <!-- RTX templates -->
3029         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3030         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3031         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3032         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3033         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3034         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3035         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3036         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3037         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3038         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3039
3040         <!-- RTX library configuration -->
3041         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3042
3043         <!-- RTX libraries (CPU and Compiler dependent) -->
3044         <!-- ARMCC -->
3045         <file category="library" condition="CM0_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3046         <file category="library" condition="CM1_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3047         <file category="library" condition="CM3_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3048         <file category="library" condition="CM4_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3049         <file category="library" condition="CM4_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3050         <file category="library" condition="CM7_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3051         <file category="library" condition="CM7_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3052         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3053         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3054         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3055         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3056         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3057         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3058         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3059         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3060         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3061         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3062         <!-- GCC -->
3063         <file category="library" condition="CM0_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3064         <file category="library" condition="CM1_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3065         <file category="library" condition="CM3_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3066         <file category="library" condition="CM4_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3067         <file category="library" condition="CM4_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3068         <file category="library" condition="CM7_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3069         <file category="library" condition="CM7_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3070         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3071         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3072         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3073         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3074         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3075         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3076         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3077         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3078         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3079         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3080         <!-- IAR -->
3081         <file category="library" condition="CM0_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3082         <file category="library" condition="CM1_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3083         <file category="library" condition="CM3_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3084         <file category="library" condition="CM4_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3085         <file category="library" condition="CM4_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3086         <file category="library" condition="CM7_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3087         <file category="library" condition="CM7_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3088         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3089         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3090         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3091         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3092         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3093         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3094         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3095         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3096         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3097         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3098       </files>
3099     </component>
3100     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3101       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
3102       <RTE_Components_h>
3103         <!-- the following content goes into file 'RTE_Components.h' -->
3104         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3105         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3106         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3107       </RTE_Components_h>
3108       <files>
3109         <!-- RTX documentation -->
3110         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3111
3112         <!-- RTX header files -->
3113         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3114
3115         <!-- RTX configuration -->
3116         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3117         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3118
3119         <!-- RTX templates -->
3120         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3121         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3122         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3123         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3124         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3125         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3126         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3127         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3128         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3129         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3130
3131         <!-- RTX library configuration -->
3132         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3133
3134         <!-- RTX libraries (CPU and Compiler dependent) -->
3135         <!-- ARMCC -->
3136         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3137         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3138         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3139         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3140         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3141         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3142         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3143         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3144         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3145         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3146         <!-- GCC -->
3147         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3148         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3149         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3150         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3151         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3152         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3153         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3154         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3155         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3156         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3157         <!-- IAR -->
3158         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3159         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3160         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3161         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3162         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3163         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3164         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3165         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3166         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3167         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3168       </files>
3169     </component>
3170     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5">
3171       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
3172       <RTE_Components_h>
3173         <!-- the following content goes into file 'RTE_Components.h' -->
3174         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3175         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3176         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3177       </RTE_Components_h>
3178       <files>
3179         <!-- RTX documentation -->
3180         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3181
3182         <!-- RTX header files -->
3183         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3184
3185         <!-- RTX configuration -->
3186         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3187         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3188
3189         <!-- RTX templates -->
3190         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3191         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3192         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3193         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3194         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3195         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3196         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3197         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3198         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3199         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3200
3201         <!-- RTX sources (core) -->
3202         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3203         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3204         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3205         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3206         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3207         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3208         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3209         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3210         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3211         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3212         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3213         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3214         <!-- RTX sources (library configuration) -->
3215         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3216         <!-- RTX sources (handlers ARMCC) -->
3217         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="CM0_ARMCC5"/>
3218         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM0_ARMCC6"/>
3219         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="CM1_ARMCC5"/>
3220         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM1_ARMCC6"/>
3221         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM3_ARMCC5"/>
3222         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM3_ARMCC6"/>
3223         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM4_ARMCC5"/>
3224         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_ARMCC6"/>
3225         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM4_FP_ARMCC5"/>
3226         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_FP_ARMCC6"/>
3227         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM7_ARMCC5"/>
3228         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_ARMCC6"/>
3229         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM7_FP_ARMCC5"/>
3230         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_FP_ARMCC6"/>
3231         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_ARMCC"/>
3232         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_ARMCC"/>
3233         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_ARMCC"/>
3234         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_ARMCC"/>
3235         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_ARMCC"/>
3236         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3237         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3238         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3239         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_ARMCC"/>
3240         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_ARMCC"/>
3241         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_ARMCC"/>
3242         <!-- RTX sources (handlers GCC) -->
3243         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM0_GCC"/>
3244         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM1_GCC"/>
3245         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM3_GCC"/>
3246         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_GCC"/>
3247         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_FP_GCC"/>
3248         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_GCC"/>
3249         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_FP_GCC"/>
3250         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3251         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3252         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3253         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3254         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3255         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3256         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3257         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3258         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3259         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3260         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3261         <!-- RTX sources (handlers IAR) -->
3262         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="CM0_IAR"/>
3263         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="CM1_IAR"/>
3264         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM3_IAR"/>
3265         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM4_IAR"/>
3266         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM4_FP_IAR"/>
3267         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM7_IAR"/>
3268         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM7_FP_IAR"/>
3269         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3270         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3271         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3272         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3273         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3274         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3275         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3276         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3277         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3278         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3279         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3280         <!-- OS Tick (SysTick) -->
3281         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3282       </files>
3283     </component>
3284     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3285       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3286       <RTE_Components_h>
3287         <!-- the following content goes into file 'RTE_Components.h' -->
3288         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3289         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3290         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3291       </RTE_Components_h>
3292       <files>
3293         <!-- RTX documentation -->
3294         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3295
3296         <!-- RTX header files -->
3297         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3298
3299         <!-- RTX configuration -->
3300         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3301         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3302
3303         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3304
3305         <!-- RTX templates -->
3306         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3307         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3308         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3309         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3310         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3311         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3312         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3313         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3314         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3315         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3316
3317         <!-- RTX sources (core) -->
3318         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3319         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3320         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3321         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3322         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3323         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3324         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3325         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3326         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3327         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3328         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3329         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3330         <!-- RTX sources (library configuration) -->
3331         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3332         <!-- RTX sources (handlers ARMCC) -->
3333         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7a.s" condition="CA_ARMCC5"/>
3334         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="CA_ARMCC6"/>
3335         <!-- RTX sources (handlers GCC) -->
3336         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="CA_GCC"/>
3337         <!-- RTX sources (handlers IAR) -->
3338         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7a.s" condition="CA_IAR"/>
3339       </files>
3340     </component>
3341     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3342       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
3343       <RTE_Components_h>
3344         <!-- the following content goes into file 'RTE_Components.h' -->
3345         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3346         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3347         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3348         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3349       </RTE_Components_h>
3350       <files>
3351         <!-- RTX documentation -->
3352         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3353
3354         <!-- RTX header files -->
3355         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3356
3357         <!-- RTX configuration -->
3358         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3359         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3360
3361         <!-- RTX templates -->
3362         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3363         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3364         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3365         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3366         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3367         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3368         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3369         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3370         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3371         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3372
3373         <!-- RTX sources (core) -->
3374         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3375         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3376         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3377         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3378         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3379         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3380         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3381         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3382         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3383         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3384         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3385         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3386         <!-- RTX sources (library configuration) -->
3387         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3388         <!-- RTX sources (ARMCC handlers) -->
3389         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_ARMCC"/>
3390         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_ARMCC"/>
3391         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_ARMCC"/>
3392         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_ARMCC"/>
3393         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_ARMCC"/>
3394         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3395         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3396         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3397         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_ARMCC"/>
3398         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_ARMCC"/>
3399         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_ARMCC"/>
3400         <!-- RTX sources (GCC handlers) -->
3401         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3402         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3403         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3404         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3405         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3406         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3407         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3408         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3409         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3410         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3411         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3412         <!-- RTX sources (IAR handlers) -->
3413         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3414         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3415         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3416         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3417         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3418         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3419         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3420         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3421         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3422         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3423         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3424         <!-- OS Tick (SysTick) -->
3425         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3426       </files>
3427     </component>
3428
3429     <!-- CMSIS-Driver Custom components -->
3430     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3431       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3432       <files>
3433         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3434         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3435       </files>
3436     </component>
3437     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3438       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3439       <files>
3440         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3441         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3442       </files>
3443     </component>
3444     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3445       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3446       <files>
3447         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3448         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3449       </files>
3450     </component>
3451     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3452       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3453       <files>
3454         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3455         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3456       </files>
3457     </component>
3458     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3459       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3460       <files>
3461         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3462         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3463       </files>
3464     </component>
3465     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3466       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3467       <files>
3468         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3469         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3470       </files>
3471     </component>
3472     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3473       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3474       <files>
3475         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3476         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3477       </files>
3478     </component>
3479     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3480       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3481       <files>
3482         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3483         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
3484       </files>
3485     </component>
3486     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3487       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3488       <files>
3489         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3490         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3491         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3492         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3493       </files>
3494     </component>
3495     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3496       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3497       <files>
3498         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3499         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3500       </files>
3501     </component>
3502     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3503       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3504       <files>
3505         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3506         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3507       </files>
3508     </component>
3509     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3510       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3511       <files>
3512         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3513         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3514       </files>
3515     </component>
3516     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3517       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3518       <files>
3519         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3520         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3521       </files>
3522     </component>
3523     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3524       <description>Access to #include Driver_WiFi.h file</description>
3525       <files>
3526         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3527         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
3528       </files>
3529     </component>
3530
3531     <!-- VIO components -->
3532     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
3533       <description>Virtual I/O custom implementation template</description>
3534       <files>
3535         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
3536       </files>
3537     </component>
3538     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
3539       <description>Virtual I/O implementation using memory only</description>
3540       <files>
3541         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
3542       </files>
3543     </component>
3544
3545   </components>
3546
3547   <boards>
3548     <board name="uVision Simulator" vendor="Keil">
3549       <description>uVision Simulator</description>
3550       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3551       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3552       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3553       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3554       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3555       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3556       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3557       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3558       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3559       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3560       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3561       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3562       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3563       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3564       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
3565       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3566       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3567       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3568       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3569       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3570       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3571       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3572       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3573       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3574       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3575       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
3576     </board>
3577
3578     <board name="EWARM Simulator" vendor="IAR">
3579       <description>EWARM Simulator</description>
3580       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3581       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3582       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3583       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3584       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3585       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3586       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3587       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3588       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3589       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3590       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3591       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3592       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3593       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3594       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
3595       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3596       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3597       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3598       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3599       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3600       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3601       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3602       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3603       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3604       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3605       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
3606     </board>
3607   </boards>
3608
3609   <examples>
3610     <example name="DSP_Lib Bayes example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_bayes_example">
3611       <description>DSP_Lib Bayes example</description>
3612       <board name="uVision Simulator" vendor="Keil"/>
3613       <project>
3614         <environment name="uv" load="arm_bayes_example.uvprojx"/>
3615       </project>
3616       <attributes>
3617         <component Cclass="CMSIS" Cgroup="CORE"/>
3618         <component Cclass="CMSIS" Cgroup="DSP"/>
3619         <component Cclass="Device" Cgroup="Startup"/>
3620         <category>Getting Started</category>
3621       </attributes>
3622     </example>
3623
3624     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3625       <description>DSP_Lib Class Marks example</description>
3626       <board name="uVision Simulator" vendor="Keil"/>
3627       <project>
3628         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3629       </project>
3630       <attributes>
3631         <component Cclass="CMSIS" Cgroup="CORE"/>
3632         <component Cclass="CMSIS" Cgroup="DSP"/>
3633         <component Cclass="Device" Cgroup="Startup"/>
3634         <category>Getting Started</category>
3635       </attributes>
3636     </example>
3637
3638     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3639       <description>DSP_Lib Convolution example</description>
3640       <board name="uVision Simulator" vendor="Keil"/>
3641       <project>
3642         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3643       </project>
3644       <attributes>
3645         <component Cclass="CMSIS" Cgroup="CORE"/>
3646         <component Cclass="CMSIS" Cgroup="DSP"/>
3647         <component Cclass="Device" Cgroup="Startup"/>
3648         <category>Getting Started</category>
3649       </attributes>
3650     </example>
3651
3652     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3653       <description>DSP_Lib Dotproduct example</description>
3654       <board name="uVision Simulator" vendor="Keil"/>
3655       <project>
3656         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3657       </project>
3658       <attributes>
3659         <component Cclass="CMSIS" Cgroup="CORE"/>
3660         <component Cclass="CMSIS" Cgroup="DSP"/>
3661         <component Cclass="Device" Cgroup="Startup"/>
3662         <category>Getting Started</category>
3663       </attributes>
3664     </example>
3665
3666     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3667       <description>DSP_Lib FFT Bin example</description>
3668       <board name="uVision Simulator" vendor="Keil"/>
3669       <project>
3670         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3671       </project>
3672       <attributes>
3673         <component Cclass="CMSIS" Cgroup="CORE"/>
3674         <component Cclass="CMSIS" Cgroup="DSP"/>
3675         <component Cclass="Device" Cgroup="Startup"/>
3676         <category>Getting Started</category>
3677       </attributes>
3678     </example>
3679
3680     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3681       <description>DSP_Lib FIR example</description>
3682       <board name="uVision Simulator" vendor="Keil"/>
3683       <project>
3684         <environment name="uv" load="arm_fir_example.uvprojx"/>
3685       </project>
3686       <attributes>
3687         <component Cclass="CMSIS" Cgroup="CORE"/>
3688         <component Cclass="CMSIS" Cgroup="DSP"/>
3689         <component Cclass="Device" Cgroup="Startup"/>
3690         <category>Getting Started</category>
3691       </attributes>
3692     </example>
3693
3694     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3695       <description>DSP_Lib Graphic Equalizer example</description>
3696       <board name="uVision Simulator" vendor="Keil"/>
3697       <project>
3698         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3699       </project>
3700       <attributes>
3701         <component Cclass="CMSIS" Cgroup="CORE"/>
3702         <component Cclass="CMSIS" Cgroup="DSP"/>
3703         <component Cclass="Device" Cgroup="Startup"/>
3704         <category>Getting Started</category>
3705       </attributes>
3706     </example>
3707
3708     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3709       <description>DSP_Lib Linear Interpolation example</description>
3710       <board name="uVision Simulator" vendor="Keil"/>
3711       <project>
3712         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3713       </project>
3714       <attributes>
3715         <component Cclass="CMSIS" Cgroup="CORE"/>
3716         <component Cclass="CMSIS" Cgroup="DSP"/>
3717         <component Cclass="Device" Cgroup="Startup"/>
3718         <category>Getting Started</category>
3719       </attributes>
3720     </example>
3721
3722     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3723       <description>DSP_Lib Matrix example</description>
3724       <board name="uVision Simulator" vendor="Keil"/>
3725       <project>
3726         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3727       </project>
3728       <attributes>
3729         <component Cclass="CMSIS" Cgroup="CORE"/>
3730         <component Cclass="CMSIS" Cgroup="DSP"/>
3731         <component Cclass="Device" Cgroup="Startup"/>
3732         <category>Getting Started</category>
3733       </attributes>
3734     </example>
3735
3736     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3737       <description>DSP_Lib Signal Convergence example</description>
3738       <board name="uVision Simulator" vendor="Keil"/>
3739       <project>
3740         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3741       </project>
3742       <attributes>
3743         <component Cclass="CMSIS" Cgroup="CORE"/>
3744         <component Cclass="CMSIS" Cgroup="DSP"/>
3745         <component Cclass="Device" Cgroup="Startup"/>
3746         <category>Getting Started</category>
3747       </attributes>
3748     </example>
3749
3750     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3751       <description>DSP_Lib Sinus/Cosinus example</description>
3752       <board name="uVision Simulator" vendor="Keil"/>
3753       <project>
3754         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3755       </project>
3756       <attributes>
3757         <component Cclass="CMSIS" Cgroup="CORE"/>
3758         <component Cclass="CMSIS" Cgroup="DSP"/>
3759         <component Cclass="Device" Cgroup="Startup"/>
3760         <category>Getting Started</category>
3761       </attributes>
3762     </example>
3763
3764     <example name="DSP_Lib SVM example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_svm_example">
3765       <description>DSP_Lib SVM example</description>
3766       <board name="uVision Simulator" vendor="Keil"/>
3767       <project>
3768         <environment name="uv" load="arm_svm_example.uvprojx"/>
3769       </project>
3770       <attributes>
3771         <component Cclass="CMSIS" Cgroup="CORE"/>
3772         <component Cclass="CMSIS" Cgroup="DSP"/>
3773         <component Cclass="Device" Cgroup="Startup"/>
3774         <category>Getting Started</category>
3775       </attributes>
3776     </example>
3777
3778     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3779       <description>DSP_Lib Variance example</description>
3780       <board name="uVision Simulator" vendor="Keil"/>
3781       <project>
3782         <environment name="uv" load="arm_variance_example.uvprojx"/>
3783       </project>
3784       <attributes>
3785         <component Cclass="CMSIS" Cgroup="CORE"/>
3786         <component Cclass="CMSIS" Cgroup="DSP"/>
3787         <component Cclass="Device" Cgroup="Startup"/>
3788         <category>Getting Started</category>
3789       </attributes>
3790     </example>
3791
3792     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3793       <description>CMSIS-RTOS2 Blinky example</description>
3794       <board name="uVision Simulator" vendor="Keil"/>
3795       <project>
3796         <environment name="uv" load="Blinky.uvprojx"/>
3797       </project>
3798       <attributes>
3799         <component Cclass="CMSIS" Cgroup="CORE"/>
3800         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3801         <component Cclass="Device" Cgroup="Startup"/>
3802         <category>Getting Started</category>
3803       </attributes>
3804     </example>
3805
3806     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3807       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3808       <board name="uVision Simulator" vendor="Keil"/>
3809       <project>
3810         <environment name="uv" load="Blinky.uvprojx"/>
3811       </project>
3812       <attributes>
3813         <component Cclass="CMSIS" Cgroup="CORE"/>
3814         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3815         <component Cclass="Device" Cgroup="Startup"/>
3816         <category>Getting Started</category>
3817       </attributes>
3818     </example>
3819
3820     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3821       <description>CMSIS-RTOS2 Message Queue Example</description>
3822       <board name="uVision Simulator" vendor="Keil"/>
3823       <project>
3824         <environment name="uv" load="MsqQueue.uvprojx"/>
3825       </project>
3826       <attributes>
3827         <component Cclass="CMSIS" Cgroup="CORE"/>
3828         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3829         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3830         <component Cclass="Device" Cgroup="Startup"/>
3831         <category>Getting Started</category>
3832       </attributes>
3833     </example>
3834
3835     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3836       <description>CMSIS-RTOS2 Memory Pool Example</description>
3837       <board name="uVision Simulator" vendor="Keil"/>
3838       <project>
3839         <environment name="uv" load="MemPool.uvprojx"/>
3840       </project>
3841       <attributes>
3842         <component Cclass="CMSIS" Cgroup="CORE"/>
3843         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3844         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3845         <component Cclass="Device" Cgroup="Startup"/>
3846         <category>Getting Started</category>
3847       </attributes>
3848     </example>
3849
3850     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3851       <description>Bare-metal secure/non-secure example without RTOS</description>
3852       <board name="uVision Simulator" vendor="Keil"/>
3853       <project>
3854         <environment name="uv" load="NoRTOS.uvmpw"/>
3855       </project>
3856       <attributes>
3857         <component Cclass="CMSIS" Cgroup="CORE"/>
3858         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3859         <component Cclass="Device" Cgroup="Startup"/>
3860         <category>Getting Started</category>
3861       </attributes>
3862     </example>
3863
3864     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3865       <description>Secure/non-secure RTOS example with thread context management</description>
3866       <board name="uVision Simulator" vendor="Keil"/>
3867       <project>
3868         <environment name="uv" load="RTOS.uvmpw"/>
3869       </project>
3870       <attributes>
3871         <component Cclass="CMSIS" Cgroup="CORE"/>
3872         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3873         <component Cclass="Device" Cgroup="Startup"/>
3874         <category>Getting Started</category>
3875       </attributes>
3876     </example>
3877
3878     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3879       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3880       <board name="uVision Simulator" vendor="Keil"/>
3881       <project>
3882         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3883       </project>
3884       <attributes>
3885         <component Cclass="CMSIS" Cgroup="CORE"/>
3886         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3887         <component Cclass="Device" Cgroup="Startup"/>
3888         <category>Getting Started</category>
3889       </attributes>
3890     </example>
3891
3892     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
3893       <description>CMSIS-RTOS2 Blinky example</description>
3894       <board name="EWARM Simulator" vendor="IAR"/>
3895       <project>
3896         <environment name="iar" load="Blinky/Blinky.ewp"/>
3897       </project>
3898       <attributes>
3899         <component Cclass="CMSIS" Cgroup="CORE"/>
3900         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3901         <component Cclass="Device" Cgroup="Startup"/>
3902         <category>Getting Started</category>
3903       </attributes>
3904     </example>
3905
3906     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
3907       <description>CMSIS-RTOS2 Message Queue Example</description>
3908       <board name="EWARM Simulator" vendor="IAR"/>
3909       <project>
3910         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
3911       </project>
3912       <attributes>
3913         <component Cclass="CMSIS" Cgroup="CORE"/>
3914         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3915         <component Cclass="Device" Cgroup="Startup"/>
3916         <category>Getting Started</category>
3917       </attributes>
3918     </example>
3919
3920   </examples>
3921
3922 </package>