begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Common Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.8.0">
  12       Active development ...
  13       CMSIS-Core(M): 5.5.0 (see revision history for details)
  14         - Updated GCC LinkerDescription, GCC Assembler startup
  15         - Added Armv8-M Stack Sealing (to linker, startup) for toolchain ARM, GCC
  16         - Changed C-Startup to default Startup.
  17         - Updated Armv8-M Assembler startup to use GAS syntax
  18           Note: Updating existing projects may need manual user interaction!
  19       CMSIS-Core(A): 1.2.1 (see revision history for details)
  20         - Bugfixes for Cortex-A32
  21       CMSIS-DAP: 2.1.0 (see revision history for details)
  22         - Enhanced DAP_Info
  23         - Added extra UART support
  24       CMSIS-DSP: 1.9.0 (see revision history for details)
  25         - Purged pre-built libs from Git
  26         - Enhanced support for f16 datatype
  27         - Fixed couple of GCC issues
  28       CMSIS-NN: 3.0.0 (see revision history for details including version 2.0.0)
  29         - Major interface change for functions compatible with TensorFlow Lite for Microcontroller
  30         - Added optimization for SVDF kernel
  31         - Improved MVE performance for fully Connected and max pool operator
  32         - NULL bias support for fully connected operator in non-MVE case(Can affect performance)
  33         - Expanded existing unit test suite along with support for FVP
  34         - Removed Examples folder
  35       CMSIS-RTOS2:
  36         - RTX 5.5.3 (see revision history for details)
  37           - CVE-2021-27431 vulnerability mitigation.
  38           - Enhanced stack overrun checking.
  39           - Various bug fixes and improvements.
  40       CMSIS-Pack: 1.7.2 (see revision history for details)
  41         - Support for Microchip XC32 compiler
  42         - Support for Custom Datapath Extension
  43     </release>
  44     <release version="5.7.0" date="2020-04-09">
  45       CMSIS-Build: 0.9.0 (beta)
  46         - Draft for CMSIS Project description (CPRJ)
  47       CMSIS-Core(M): 5.4.0 (see revision history for details)
  48         - Cortex-M55 cpu support
  49         - Enhanced MVE support for Armv8.1-MML
  50         - Fixed device config define checks.
  51         - L1 Cache functions for Armv7-M and later
  52       CMSIS-Core(A): 1.2.0 (see revision history for details)
  53         - Fixed GIC_SetPendingIRQ to use GICD_SGIR
  54         - Added missing DSP intrinsics
  55         - Reworked assembly intrinsics: volatile, barriers and clobber
  56       CMSIS-DSP: 1.8.0 (see revision history for details)
  57         - Added new functions and function groups
  58         - Added MVE support
  59       CMSIS-NN: 1.3.0 (see revision history for details)
  60         - Added MVE support
  61         - Further optimizations for kernels using DSP extension
  62       CMSIS-RTOS2:
  63         - RTX 5.5.2 (see revision history for details)
  64       CMSIS-Driver: 2.8.0
  65         - Added VIO API 0.1.0 (Preview)
  66         - removed volatile from status related typedefs in APIs
  67         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  68       CMSIS-Pack: 1.6.3 (see revision history for details)
  69         - deprecating all types specific to cpdsc format. Cpdsc is replaced by Cprj with dedicated schema.
  70       Devices:
  71         - ARMCM55 device
  72         - ARMv81MML startup code recognizing __MVE_USED macro
  73         - Refactored vector table references for all Cortex-M devices
  74         - Reworked ARMCM* C-StartUp files.
  75         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  76       Utilities:
  77         Attention: Linux binaries moved to Linux64 folder!
  78         - SVDConv 3.3.35
  79         - PackChk 1.3.89
  80     </release>
  81     <release version="5.6.0" date="2019-07-10">
  82       CMSIS-Core(M): 5.3.0 (see revision history for details)
  83         - Added provisions for compiler-independent C startup code.
  84       CMSIS-Core(A): 1.1.4 (see revision history for details)
  85         - Fixed __FPU_Enable.
  86       CMSIS-DSP: 1.7.0 (see revision history for details)
  87         - New Neon versions of f32 functions
  88         - Python wrapper
  89         - Preliminary cmake build
  90         - Compilation flags for FFTs
  91         - Changes to arm_math.h
  92       CMSIS-NN: 1.2.0 (see revision history for details)
  93         - New function for depthwise convolution with asymmetric quantization.
  94         - New support functions for requantization.
  95       CMSIS-RTOS:
  96         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  97       CMSIS-RTOS2:
  98         - RTX 5.5.1 (see revision history for details)
  99       CMSIS-Driver: 2.7.1
 100         - WiFi Interface API 1.0.0
 101       Devices:
 102         - Generalized C startup code for all Cortex-M family devices.
 103         - Updated Cortex-A default memory regions and MMU configurations
 104         - Moved Cortex-A memory and system config files to avoid include path issues
 105     </release>
 106     <release version="5.5.1" date="2019-03-20">
 107       The following folders are deprecated
 108         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 109
 110       CMSIS-Core(M): 5.2.1 (see revision history for details)
 111         - Fixed compilation issue in cmsis_armclang_ltm.h
 112     </release>
 113     <release version="5.5.0" date="2019-03-18">
 114       The following folders have been removed:
 115         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
 116         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
 117       The following folders are deprecated
 118         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 119
 120       CMSIS-Core(M): 5.2.0 (see revision history for details)
 121         - Reworked Stack/Heap configuration for ARM startup files.
 122         - Added Cortex-M35P device support.
 123         - Added generic Armv8.1-M Mainline device support.
 124       CMSIS-Core(A): 1.1.3 (see revision history for details)
 125       CMSIS-DSP: 1.6.0 (see revision history for details)
 126         - reworked DSP library source files
 127         - reworked DSP library documentation
 128         - Changed DSP folder structure
 129         - moved DSP libraries to folder ./DSP/Lib
 130         - ARM DSP Libraries are built with ARMCLANG
 131         - Added DSP Libraries Source variant
 132       CMSIS-RTOS2:
 133         - RTX 5.5.0 (see revision history for details)
 134       CMSIS-Driver: 2.7.0
 135         - Added WiFi Interface API 1.0.0-beta
 136         - Added components for project specific driver implementations
 137       CMSIS-Pack: 1.6.0 (see revision history for details)
 138       Devices:
 139         - Added Cortex-M35P and ARMv81MML device templates.
 140         - Fixed C-Startup Code for GCC (aligned with other compilers)
 141       Utilities:
 142         - SVDConv 3.3.25
 143         - PackChk 1.3.82
 144     </release>
 145     <release version="5.4.0" date="2018-08-01">
 146       Aligned pack structure with repository.
 147       The following folders are deprecated:
 148         - CMSIS/Include/
 149         - CMSIS/DSP_Lib/
 150
 151       CMSIS-Core(M): 5.1.2 (see revision history for details)
 152         - Added Cortex-M1 support (beta).
 153       CMSIS-Core(A): 1.1.2 (see revision history for details)
 154       CMSIS-NN: 1.1.0
 155         - Added new math functions.
 156       CMSIS-RTOS2:
 157         - API 2.1.3 (see revision history for details)
 158         - RTX 5.4.0 (see revision history for details)
 159           * Updated exception handling on Cortex-A
 160       CMSIS-Driver:
 161         - Flash Driver API V2.2.0
 162       Utilities:
 163         - SVDConv 3.3.21
 164         - PackChk 1.3.71
 165     </release>
 166     <release version="5.3.0" date="2018-02-22">
 167       Updated Arm company brand.
 168       CMSIS-Core(M): 5.1.1 (see revision history for details)
 169       CMSIS-Core(A): 1.1.1 (see revision history for details)
 170       CMSIS-DAP: 2.0.0 (see revision history for details)
 171       CMSIS-NN: 1.0.0
 172         - Initial contribution of the bare metal Neural Network Library.
 173       CMSIS-RTOS2:
 174         - RTX 5.3.0 (see revision history for details)
 175         - OS Tick API 1.0.1
 176     </release>
 177     <release version="5.2.0" date="2017-11-16">
 178       CMSIS-Core(M): 5.1.0 (see revision history for details)
 179         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 180         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 181       CMSIS-Core(A): 1.1.0 (see revision history for details)
 182         - Added compiler_iccarm.h.
 183         - Added additional access functions for physical timer.
 184       CMSIS-DAP: 1.2.0 (see revision history for details)
 185       CMSIS-DSP: 1.5.2 (see revision history for details)
 186       CMSIS-Driver: 2.6.0 (see revision history for details)
 187         - CAN Driver API V1.2.0
 188         - NAND Driver API V2.3.0
 189       CMSIS-RTOS:
 190         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 191       CMSIS-RTOS2:
 192         - API 2.1.2 (see revision history for details)
 193         - RTX 5.2.3 (see revision history for details)
 194       Devices:
 195         - Added GCC startup and linker script for Cortex-A9.
 196         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 197         - Added IAR startup code for Cortex-A9
 198     </release>
 199     <release version="5.1.1" date="2017-09-19">
 200       CMSIS-RTOS2:
 201       - RTX 5.2.1 (see revision history for details)
 202     </release>
 203     <release version="5.1.0" date="2017-08-04">
 204       CMSIS-Core(M): 5.0.2 (see revision history for details)
 205       - Changed Version Control macros to be core agnostic.
 206       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 207       CMSIS-Core(A): 1.0.0 (see revision history for details)
 208       - Initial release
 209       - IRQ Controller API 1.0.0
 210       CMSIS-Driver: 2.05 (see revision history for details)
 211       - All typedefs related to status have been made volatile.
 212       CMSIS-RTOS2:
 213       - API 2.1.1 (see revision history for details)
 214       - RTX 5.2.0 (see revision history for details)
 215       - OS Tick API 1.0.0
 216       CMSIS-DSP: 1.5.2 (see revision history for details)
 217       - Fixed GNU Compiler specific diagnostics.
 218       CMSIS-Pack: 1.5.0 (see revision history for details)
 219       - added System Description File (*.SDF) Format
 220       CMSIS-Zone: 0.0.1 (Preview)
 221       - Initial specification draft
 222     </release>
 223     <release version="5.0.1" date="2017-02-03">
 224       Package Description:
 225       - added taxonomy for Cclass RTOS
 226       CMSIS-RTOS2:
 227       - API 2.1   (see revision history for details)
 228       - RTX 5.1.0 (see revision history for details)
 229       CMSIS-Core: 5.0.1 (see revision history for details)
 230       - Added __PACKED_STRUCT macro
 231       - Added uVisior support
 232       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 233       - Updated template for secure main function (main_s.c)
 234       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 235       CMSIS-DSP: 1.5.1 (see revision history for details)
 236       - added ARMv8M DSP libraries.
 237       CMSIS-Pack:1.4.9 (see revision history for details)
 238       - added Pack Index File specification and schema file
 239     </release>
 240     <release version="5.0.0" date="2016-11-11">
 241       Changed open source license to Apache 2.0
 242       CMSIS_Core:
 243        - Added support for Cortex-M23 and Cortex-M33.
 244        - Added ARMv8-M device configurations for mainline and baseline.
 245        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 246        - Added cmsis_compiler.h to unify compiler behaviour.
 247        - Updated function SCB_EnableICache (for Cortex-M7).
 248        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 249       CMSIS-RTOS:
 250         - bug fix in RTX 4.82 (see revision history for details)
 251       CMSIS-RTOS2:
 252         - new API including compatibility layer to CMSIS-RTOS
 253         - reference implementation based on RTX5
 254         - supports all Cortex-M variants including TrustZone for ARMv8-M
 255       CMSIS-SVD:
 256        - reworked SVD format documentation
 257        - removed SVD file database documentation as SVD files are distributed in packs
 258        - updated SVDConv for Win32 and Linux
 259       CMSIS-DSP:
 260        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 261        - Added DSP libraries build projects to CMSIS pack.
 262     </release>
 263     <release version="4.5.0" date="2015-10-28">
 264       - CMSIS-Core     4.30.0  (see revision history for details)
 265       - CMSIS-DAP      1.1.0   (unchanged)
 266       - CMSIS-Driver   2.04.0  (see revision history for details)
 267       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 268       - CMSIS-Pack     1.4.1   (see revision history for details)
 269       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 270       - CMSIS-SVD      1.3.1   (see revision history for details)
 271     </release>
 272     <release version="4.4.0" date="2015-09-11">
 273       - CMSIS-Core     4.20   (see revision history for details)
 274       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 275       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 276       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 277       - CMSIS-RTOS
 278         -- API         1.02   (unchanged)
 279         -- RTX         4.79   (see revision history for details)
 280       - CMSIS-SVD      1.3.0  (see revision history for details)
 281       - CMSIS-DAP      1.1.0  (extended with SWO support)
 282     </release>
 283     <release version="4.3.0" date="2015-03-20">
 284       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 285       - CMSIS-DSP      1.4.5  (see revision history for details)
 286       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 287       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 288       - CMSIS-RTOS
 289         -- API         1.02   (unchanged)
 290         -- RTX         4.78   (see revision history for details)
 291       - CMSIS-SVD      1.2    (unchanged)
 292     </release>
 293     <release version="4.2.0" date="2014-09-24">
 294       Adding Cortex-M7 support
 295       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 296       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 297       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 298       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 299       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 300     </release>
 301     <release version="4.1.1" date="2014-06-30">
 302       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 303     </release>
 304     <release version="4.1.0" date="2014-06-12">
 305       - CMSIS-Driver   2.02  (incompatible update)
 306       - CMSIS-Pack     1.3   (see revision history for details)
 307       - CMSIS-DSP      1.4.2 (unchanged)
 308       - CMSIS-Core     3.30  (unchanged)
 309       - CMSIS-RTOS RTX 4.74  (unchanged)
 310       - CMSIS-RTOS API 1.02  (unchanged)
 311       - CMSIS-SVD      1.10  (unchanged)
 312       PACK:
 313       - removed G++ specific files from PACK
 314       - added Component Startup variant "C Startup"
 315       - added Pack Checking Utility
 316       - updated conditions to reflect tool-chain dependency
 317       - added Taxonomy for Graphics
 318       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 319     </release>
 320     <!-- release version="4.0.0">
 321       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 322       - CMSIS-Pack     1.1   Preliminary
 323       - CMSIS-DSP      1.4.2 (see revision history for details)
 324       - CMSIS-Core     3.30  (see revision history for details)
 325       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 326       - CMSIS-RTOS API 1.02  (unchanged)
 327       - CMSIS-SVD      1.10  (unchanged)
 328     </release -->
 329     <release version="3.20.4" date="2014-02-20">
 330       - CMSIS-RTOS 4.74 (see revision history for details)
 331       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 332     </release>
 333     <!-- release version="3.20.3">
 334       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 335       - CMSIS-RTOS 4.73 (see revision history for details)
 336     </release -->
 337     <!-- release version="3.20.2">
 338       - CMSIS-Pack documentation has been added
 339       - CMSIS-Drivers header and documentation have been added to PACK
 340       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 341     </release -->
 342     <!-- release version="3.20.1">
 343       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 344       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 345     </release -->
 346     <!-- release version="3.20.0">
 347       The software portions that are deployed in the application program are now under a BSD license which allows usage
 348       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 349       The individual components have been update as listed below:
 350       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 351       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 352       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 353       - CMSIS-SVD is unchanged.
 354     </release -->
 355   </releases>
 356
 357   <taxonomy>
 358     <description Cclass="Audio">Software components for audio processing</description>
 359     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 360     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 361     <description Cclass="Compiler">Compiler Software Extensions</description>
 362     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 363     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 364     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 365     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 366     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 367     <description Cclass="File System">File Drive Support and File System</description>
 368     <description Cclass="IoT Client">IoT cloud client connector</description>
 369     <description Cclass="IoT Service">IoT specific services</description>
 370     <description Cclass="IoT Utility">IoT specific software utility</description>
 371     <description Cclass="Graphics">Graphical User Interface</description>
 372     <description Cclass="Network">Network Stack using Internet Protocols</description>
 373     <description Cclass="RTOS">Real-time Operating System</description>
 374     <description Cclass="Security">Encryption for secure communication or storage</description>
 375     <description Cclass="USB">Universal Serial Bus Stack</description>
 376     <description Cclass="Utility">Generic software utility components</description>
 377   </taxonomy>
 378
 379   <devices>
 380     <!-- ******************************  Cortex-M0  ****************************** -->
 381     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 382       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 383       <description>
 384 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 385 - simple, easy-to-use programmers model
 386 - highly efficient ultra-low power operation
 387 - excellent code density
 388 - deterministic, high-performance interrupt handling
 389 - upward compatibility with the rest of the Cortex-M processor family.
 390       </description>
 391       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 392       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 393       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 394       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 395
 396       <device Dname="ARMCM0">
 397         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 398         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 399       </device>
 400     </family>
 401
 402     <!-- ******************************  Cortex-M0P  ****************************** -->
 403     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 404       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 405       <description>
 406 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 407 - simple, easy-to-use programmers model
 408 - highly efficient ultra-low power operation
 409 - excellent code density
 410 - deterministic, high-performance interrupt handling
 411 - upward compatibility with the rest of the Cortex-M processor family.
 412       </description>
 413       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 414       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 415       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 416       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 417
 418       <device Dname="ARMCM0P">
 419         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 420         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 421       </device>
 422
 423       <device Dname="ARMCM0P_MPU">
 424         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 425         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 426       </device>
 427     </family>
 428
 429     <!-- ******************************  Cortex-M1  ****************************** -->
 430     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 431       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 432       <description>
 433 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 434 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 435       </description>
 436       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 437       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 438       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 439       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 440
 441       <device Dname="ARMCM1">
 442         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 443         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 444       </device>
 445     </family>
 446
 447     <!-- ******************************  Cortex-M3  ****************************** -->
 448     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 449       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 450       <description>
 451 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 452 - simple, easy-to-use programmers model
 453 - highly efficient ultra-low power operation
 454 - excellent code density
 455 - deterministic, high-performance interrupt handling
 456 - upward compatibility with the rest of the Cortex-M processor family.
 457       </description>
 458       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 459       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 460       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 461       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 462
 463       <device Dname="ARMCM3">
 464         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 465         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 466       </device>
 467     </family>
 468
 469     <!-- ******************************  Cortex-M4  ****************************** -->
 470     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 471       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 472       <description>
 473 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 474 - simple, easy-to-use programmers model
 475 - highly efficient ultra-low power operation
 476 - excellent code density
 477 - deterministic, high-performance interrupt handling
 478 - upward compatibility with the rest of the Cortex-M processor family.
 479       </description>
 480       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 481       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 482       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 483       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 484
 485       <device Dname="ARMCM4">
 486         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 487         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 488       </device>
 489
 490       <device Dname="ARMCM4_FP">
 491         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 492         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 493       </device>
 494     </family>
 495
 496     <!-- ******************************  Cortex-M7  ****************************** -->
 497     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 498       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 499       <description>
 500 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 501 - simple, easy-to-use programmers model
 502 - highly efficient ultra-low power operation
 503 - excellent code density
 504 - deterministic, high-performance interrupt handling
 505 - upward compatibility with the rest of the Cortex-M processor family.
 506       </description>
 507       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 508       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 509       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 510       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 511
 512       <device Dname="ARMCM7">
 513         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 514         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 515       </device>
 516
 517       <device Dname="ARMCM7_SP">
 518         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 519         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 520       </device>
 521
 522       <device Dname="ARMCM7_DP">
 523         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 524         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 525       </device>
 526     </family>
 527
 528     <!-- ******************************  Cortex-M23  ********************** -->
 529     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 530       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 531       <description>
 532 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 533 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 534 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 535       </description>
 536       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 537       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 538       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 539       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 540       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 541       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 542
 543       <device Dname="ARMCM23">
 544         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 545         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 546       </device>
 547
 548       <device Dname="ARMCM23_TZ">
 549         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 550         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 551       </device>
 552     </family>
 553
 554     <!-- ******************************  Cortex-M33  ****************************** -->
 555     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 556       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 557       <description>
 558 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 559 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 560       </description>
 561       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 562       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 563       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 564       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 565       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 566       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 567
 568       <device Dname="ARMCM33">
 569         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 570         <description>
 571           no DSP Instructions, no Floating Point Unit, no TrustZone
 572         </description>
 573         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 574       </device>
 575
 576       <device Dname="ARMCM33_TZ">
 577         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 578         <description>
 579           no DSP Instructions, no Floating Point Unit, TrustZone
 580         </description>
 581         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 582       </device>
 583
 584       <device Dname="ARMCM33_DSP_FP">
 585         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 586         <description>
 587           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 588         </description>
 589         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 590       </device>
 591
 592       <device Dname="ARMCM33_DSP_FP_TZ">
 593         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 594         <description>
 595           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 596         </description>
 597         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 598       </device>
 599     </family>
 600
 601     <!-- ******************************  Cortex-M35P  ****************************** -->
 602     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 603       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 604       <description>
 605 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 606 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 607       </description>
 608
 609       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 610       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 611       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 612       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 613       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 614       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 615
 616       <device Dname="ARMCM35P">
 617         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 618         <description>
 619           no DSP Instructions, no Floating Point Unit, no TrustZone
 620         </description>
 621         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 622       </device>
 623
 624       <device Dname="ARMCM35P_TZ">
 625         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 626         <description>
 627           no DSP Instructions, no Floating Point Unit, TrustZone
 628         </description>
 629         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 630       </device>
 631
 632       <device Dname="ARMCM35P_DSP_FP">
 633         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 634         <description>
 635           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 636         </description>
 637         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 638       </device>
 639
 640       <device Dname="ARMCM35P_DSP_FP_TZ">
 641         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 642         <description>
 643           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 644         </description>
 645         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 646       </device>
 647     </family>
 648
 649     <!-- ******************************  Cortex-M55  ****************************** -->
 650     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 651       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 652       <description>
 653 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 654 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 655 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 656       </description>
 657
 658       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 659       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 660       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 661       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 662       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 663       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 664
 665       <device Dname="ARMCM55">
 666         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 667         <description>
 668           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 669         </description>
 670         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 671       </device>
 672     </family>
 673
 674     <!-- ******************************  ARMSC000  ****************************** -->
 675     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 676       <description>
 677 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 678 - simple, easy-to-use programmers model
 679 - highly efficient ultra-low power operation
 680 - excellent code density
 681 - deterministic, high-performance interrupt handling
 682       </description>
 683       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 684       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 685       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 686       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 687
 688       <device Dname="ARMSC000">
 689         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 690         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 691       </device>
 692     </family>
 693
 694     <!-- ******************************  ARMSC300  ****************************** -->
 695     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 696       <description>
 697 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 698 - simple, easy-to-use programmers model
 699 - highly efficient ultra-low power operation
 700 - excellent code density
 701 - deterministic, high-performance interrupt handling
 702       </description>
 703       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 704       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 705       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 706       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 707
 708       <device Dname="ARMSC300">
 709         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 710         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 711       </device>
 712     </family>
 713
 714     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 715     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 716       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 717       <description>
 718 Armv8-M Baseline based device with TrustZone
 719       </description>
 720       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 721       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 722       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 723       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 724       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 725       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 726
 727       <device Dname="ARMv8MBL">
 728         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 729         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 730       </device>
 731     </family>
 732
 733     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 734     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 735       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 736       <description>
 737 Armv8-M Mainline based device with TrustZone
 738       </description>
 739       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 740       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 741       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 742       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 743       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 744       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 745
 746       <device Dname="ARMv8MML">
 747         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 748         <description>
 749           no DSP Instructions, no Floating Point Unit, TrustZone
 750         </description>
 751         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 752       </device>
 753
 754       <device Dname="ARMv8MML_DSP">
 755         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 756         <description>
 757           DSP Instructions, no Floating Point Unit, TrustZone
 758         </description>
 759         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 760       </device>
 761
 762       <device Dname="ARMv8MML_SP">
 763         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 764         <description>
 765           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 766         </description>
 767         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 768       </device>
 769
 770       <device Dname="ARMv8MML_DSP_SP">
 771         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 772         <description>
 773           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 774         </description>
 775         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 776       </device>
 777
 778       <device Dname="ARMv8MML_DP">
 779         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 780         <description>
 781           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 782         </description>
 783         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 784       </device>
 785
 786       <device Dname="ARMv8MML_DSP_DP">
 787         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 788         <description>
 789           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 790         </description>
 791         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 792       </device>
 793     </family>
 794
 795     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 796     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 797       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 798       <description>
 799 Armv8.1-M Mainline based device with TrustZone and MVE
 800       </description>
 801       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 802       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 803       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 804       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 805       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 806       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 807
 808
 809       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 810         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 811         <description>
 812           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 813         </description>
 814         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 815       </device>
 816     </family>
 817
 818     <!-- ******************************  Cortex-A5  ****************************** -->
 819     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 820       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 821       <description>
 822 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 823 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 824 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 825       </description>
 826
 827       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 828       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 829       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 830       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 831
 832       <device Dname="ARMCA5">
 833         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 834         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 835       </device>
 836     </family>
 837
 838     <!-- ******************************  Cortex-A7  ****************************** -->
 839     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 840       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 841       <description>
 842 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 843 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 844 an optional integrated GIC, and an optional L2 cache controller.
 845       </description>
 846
 847       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 848       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 849       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 850       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 851
 852       <device Dname="ARMCA7">
 853         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 854         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 855       </device>
 856     </family>
 857
 858     <!-- ******************************  Cortex-A9  ****************************** -->
 859     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 860       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 861       <description>
 862 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 863 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 864 and 8-bit Java bytecodes in Jazelle state.
 865       </description>
 866
 867       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 868       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 869       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 870       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 871
 872       <device Dname="ARMCA9">
 873         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 874         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 875       </device>
 876     </family>
 877   </devices>
 878
 879
 880   <apis>
 881     <!-- CMSIS Device API -->
 882     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 883       <description>Device interrupt controller interface</description>
 884       <files>
 885         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 886       </files>
 887     </api>
 888     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 889       <description>RTOS Kernel system tick timer interface</description>
 890       <files>
 891         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 892       </files>
 893     </api>
 894     <!-- CMSIS-RTOS API -->
 895     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 896       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 897       <files>
 898         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 899       </files>
 900     </api>
 901     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 902       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 903       <files>
 904         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 905         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 906       </files>
 907     </api>
 908     <!-- CMSIS Driver API -->
 909     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 910       <description>USART Driver API for Cortex-M</description>
 911       <files>
 912         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 913         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 914       </files>
 915     </api>
 916     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 917       <description>SPI Driver API for Cortex-M</description>
 918       <files>
 919         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 920         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 921       </files>
 922     </api>
 923     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 924       <description>SAI Driver API for Cortex-M</description>
 925       <files>
 926         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 927         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 928       </files>
 929     </api>
 930     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 931       <description>I2C Driver API for Cortex-M</description>
 932       <files>
 933         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 934         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 935       </files>
 936     </api>
 937     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 938       <description>CAN Driver API for Cortex-M</description>
 939       <files>
 940         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 941         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 942       </files>
 943     </api>
 944     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 945       <description>Flash Driver API for Cortex-M</description>
 946       <files>
 947         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 948         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 949       </files>
 950     </api>
 951     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 952       <description>MCI Driver API for Cortex-M</description>
 953       <files>
 954         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 955         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 956       </files>
 957     </api>
 958     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 959       <description>NAND Flash Driver API for Cortex-M</description>
 960       <files>
 961         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 962         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 963       </files>
 964     </api>
 965     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 966       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 967       <files>
 968         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 969         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 970         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 971       </files>
 972     </api>
 973     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 974       <description>Ethernet MAC Driver API for Cortex-M</description>
 975       <files>
 976         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 977         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 978       </files>
 979     </api>
 980     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 981       <description>Ethernet PHY Driver API for Cortex-M</description>
 982       <files>
 983         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 984         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 985       </files>
 986     </api>
 987     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 988       <description>USB Device Driver API for Cortex-M</description>
 989       <files>
 990         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 991         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 992       </files>
 993     </api>
 994     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
 995       <description>USB Host Driver API for Cortex-M</description>
 996       <files>
 997         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 998         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 999       </files>
1000     </api>
1001     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
1002       <description>WiFi driver</description>
1003       <files>
1004         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
1005         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
1006       </files>
1007     </api>
1008     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
1009       <description>Virtual I/O</description>
1010       <files>
1011         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
1012         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
1013         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
1014       </files>
1015     </api>
1016   </apis>
1017
1018   <!-- conditions are dependency rules that can apply to a component or an individual file -->
1019   <conditions>
1020     <!-- compiler -->
1021     <condition id="ARMCC6">
1022       <accept Tcompiler="ARMCC" Toptions="AC6"/>
1023       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1024     </condition>
1025     <condition id="ARMCC5">
1026       <require Tcompiler="ARMCC" Toptions="AC5"/>
1027     </condition>
1028     <condition id="ARMCC">
1029       <require Tcompiler="ARMCC"/>
1030     </condition>
1031     <condition id="GCC">
1032       <require Tcompiler="GCC"/>
1033     </condition>
1034     <condition id="IAR">
1035       <require Tcompiler="IAR"/>
1036     </condition>
1037     <condition id="ARMCC GCC">
1038       <accept Tcompiler="ARMCC"/>
1039       <accept Tcompiler="GCC"/>
1040     </condition>
1041     <condition id="ARMCC GCC IAR">
1042       <accept Tcompiler="ARMCC"/>
1043       <accept Tcompiler="GCC"/>
1044       <accept Tcompiler="IAR"/>
1045     </condition>
1046
1047     <!-- Arm architecture -->
1048     <condition id="ARMv6-M Device">
1049       <description>Armv6-M architecture based device</description>
1050       <accept Dcore="Cortex-M0"/>
1051       <accept Dcore="Cortex-M1"/>
1052       <accept Dcore="Cortex-M0+"/>
1053       <accept Dcore="SC000"/>
1054     </condition>
1055     <condition id="ARMv7-M Device">
1056       <description>Armv7-M architecture based device</description>
1057       <accept Dcore="Cortex-M3"/>
1058       <accept Dcore="Cortex-M4"/>
1059       <accept Dcore="Cortex-M7"/>
1060       <accept Dcore="SC300"/>
1061     </condition>
1062     <condition id="ARMv8-M Device">
1063       <description>Armv8-M architecture based device</description>
1064       <accept Dcore="ARMV8MBL"/>
1065       <accept Dcore="ARMV8MML"/>
1066       <accept Dcore="ARMV81MML"/>
1067       <accept Dcore="Cortex-M23"/>
1068       <accept Dcore="Cortex-M33"/>
1069       <accept Dcore="Cortex-M35P"/>
1070       <accept Dcore="Cortex-M55"/>
1071     </condition>
1072     <condition id="ARMv6_7-M Device">
1073       <description>Armv6_7-M architecture based device</description>
1074       <accept condition="ARMv6-M Device"/>
1075       <accept condition="ARMv7-M Device"/>
1076     </condition>
1077     <condition id="ARMv6_7_8-M Device">
1078       <description>Armv6_7_8-M architecture based device</description>
1079       <accept condition="ARMv6-M Device"/>
1080       <accept condition="ARMv7-M Device"/>
1081       <accept condition="ARMv8-M Device"/>
1082     </condition>
1083     <condition id="ARMv7-A Device">
1084       <description>Armv7-A architecture based device</description>
1085       <accept Dcore="Cortex-A5"/>
1086       <accept Dcore="Cortex-A7"/>
1087       <accept Dcore="Cortex-A9"/>
1088     </condition>
1089
1090     <condition id="TrustZone">
1091       <description>TrustZone</description>
1092       <require Dtz="TZ"/>
1093     </condition>
1094     <condition id="TZ Secure">
1095       <description>TrustZone (Secure)</description>
1096       <require Dtz="TZ"/>
1097       <require Dsecure="Secure"/>
1098     </condition>
1099     <condition id="TZ Non-secure">
1100       <description>TrustZone (Non-secure)</description>
1101       <require Dtz="TZ"/>
1102       <accept Dsecure="Non-secure"/>
1103       <accept Dsecure="TZ-disabled"/>
1104     </condition>
1105     <condition id="TZ Unavailable">
1106       <description>TrustZone not available</description>
1107       <deny Dtz="TZ"/>
1108     </condition>
1109
1110     <!-- ARM core -->
1111     <condition id="CM0">
1112       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1113       <accept Dcore="Cortex-M0"/>
1114       <accept Dcore="Cortex-M0+"/>
1115       <accept Dcore="SC000"/>
1116     </condition>
1117     <condition id="CM1">
1118       <description>Cortex-M1</description>
1119       <require Dcore="Cortex-M1"/>
1120     </condition>
1121     <condition id="CM3">
1122       <description>Cortex-M3 or SC300 processor based device</description>
1123       <accept Dcore="Cortex-M3"/>
1124       <accept Dcore="SC300"/>
1125     </condition>
1126     <condition id="CM4">
1127       <description>Cortex-M4 processor based device</description>
1128       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1129     </condition>
1130     <condition id="CM4_FP">
1131       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1132       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1133       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1134       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1135     </condition>
1136     <condition id="CM7">
1137       <description>Cortex-M7 processor based device</description>
1138       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1139     </condition>
1140     <condition id="CM7_FP">
1141       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1142       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1143       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1144     </condition>
1145     <condition id="CM23">
1146       <description>Cortex-M23 processor based device</description>
1147       <require Dcore="Cortex-M23"/>
1148     </condition>
1149     <condition id="CM33">
1150       <description>Cortex-M33 processor based device</description>
1151       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1152     </condition>
1153     <condition id="CM33_FP">
1154       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1155       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1156     </condition>
1157     <condition id="CM35P">
1158       <description>Cortex-M35P processor based device</description>
1159       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1160     </condition>
1161     <condition id="CM35P_FP">
1162       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1163       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1164     </condition>
1165     <condition id="ARMv8MBL">
1166       <description>Armv8-M Baseline processor based device</description>
1167       <require Dcore="ARMV8MBL"/>
1168     </condition>
1169     <condition id="ARMv8MML">
1170       <description>Armv8-M Mainline processor based device</description>
1171       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1172     </condition>
1173     <condition id="ARMv8MML_FP">
1174       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1175       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1176       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1177     </condition>
1178
1179     <condition id="CM55_NOFPU_NOMVE">
1180       <description>Cortex-M55, no FPU, no MVE</description>
1181       <require Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="NO_MVE"/>
1182     </condition>
1183     <condition id="CM55_NOFPU_MVE">
1184       <description>Cortex-M55, no FPU, MVE</description>
1185       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="MVE"/>
1186       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="FP_MVE"/>
1187     </condition>
1188     <condition id="CM55_FPU">
1189       <description>Cortex-M55, FPU</description>
1190       <accept  Dcore="Cortex-M55" Dfpu="SP_FPU"/>
1191       <accept  Dcore="Cortex-M55" Dfpu="DP_FPU"/>
1192     </condition>
1193
1194     <condition id="CA5_CA9">
1195       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1196       <accept Dcore="Cortex-A5"/>
1197       <accept Dcore="Cortex-A9"/>
1198     </condition>
1199
1200     <condition id="CA7">
1201       <description>Cortex-A7 processor based device</description>
1202       <accept Dcore="Cortex-A7"/>
1203     </condition>
1204
1205     <!-- ARMCC compiler -->
1206     <condition id="CA_ARMCC5">
1207       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1208       <require condition="ARMv7-A Device"/>
1209       <require condition="ARMCC5"/>
1210     </condition>
1211     <condition id="CA_ARMCC6">
1212       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1213       <require condition="ARMv7-A Device"/>
1214       <require condition="ARMCC6"/>
1215     </condition>
1216
1217     <condition id="CM0_ARMCC">
1218       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1219       <require condition="CM0"/>
1220       <require Tcompiler="ARMCC"/>
1221     </condition>
1222     <condition id="CM0_ARMCC5">
1223       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler 5</description>
1224       <require condition="CM0"/>
1225       <require condition="ARMCC5"/>
1226     </condition>
1227     <condition id="CM0_ARMCC6">
1228       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler 6</description>
1229       <require condition="CM0"/>
1230       <require condition="ARMCC6"/>
1231     </condition>
1232     <condition id="CM0_LE_ARMCC">
1233       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1234       <require condition="CM0_ARMCC"/>
1235       <require Dendian="Little-endian"/>
1236     </condition>
1237     <condition id="CM0_BE_ARMCC">
1238       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1239       <require condition="CM0_ARMCC"/>
1240       <require Dendian="Big-endian"/>
1241     </condition>
1242
1243     <condition id="CM1_ARMCC">
1244       <description>Cortex-M1 based device for the Arm Compiler</description>
1245       <require condition="CM1"/>
1246       <require Tcompiler="ARMCC"/>
1247     </condition>
1248     <condition id="CM1_ARMCC5">
1249       <description>Cortex-M1 based device for the Arm Compiler 5</description>
1250       <require condition="CM1"/>
1251       <require condition="ARMCC5"/>
1252     </condition>
1253     <condition id="CM1_ARMCC6">
1254       <description>Cortex-M1 based device for the Arm Compiler 6</description>
1255       <require condition="CM1"/>
1256       <require condition="ARMCC6"/>
1257     </condition>
1258     <condition id="CM1_LE_ARMCC">
1259       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1260       <require condition="CM1_ARMCC"/>
1261       <require Dendian="Little-endian"/>
1262     </condition>
1263     <condition id="CM1_BE_ARMCC">
1264       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1265       <require condition="CM1_ARMCC"/>
1266       <require Dendian="Big-endian"/>
1267     </condition>
1268
1269     <condition id="CM3_ARMCC">
1270       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1271       <require condition="CM3"/>
1272       <require Tcompiler="ARMCC"/>
1273     </condition>
1274     <condition id="CM3_ARMCC5">
1275       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler 5</description>
1276       <require condition="CM3"/>
1277       <require condition="ARMCC5"/>
1278     </condition>
1279     <condition id="CM3_ARMCC6">
1280       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler 6</description>
1281       <require condition="CM3"/>
1282       <require condition="ARMCC6"/>
1283     </condition>
1284     <condition id="CM3_LE_ARMCC">
1285       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1286       <require condition="CM3_ARMCC"/>
1287       <require Dendian="Little-endian"/>
1288     </condition>
1289     <condition id="CM3_BE_ARMCC">
1290       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1291       <require condition="CM3_ARMCC"/>
1292       <require Dendian="Big-endian"/>
1293     </condition>
1294
1295     <condition id="CM4_ARMCC">
1296       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1297       <require condition="CM4"/>
1298       <require Tcompiler="ARMCC"/>
1299     </condition>
1300     <condition id="CM4_ARMCC5">
1301       <description>Cortex-M4 processor based device for the Arm Compiler 5</description>
1302       <require condition="CM4"/>
1303       <require condition="ARMCC5"/>
1304     </condition>
1305     <condition id="CM4_ARMCC6">
1306       <description>Cortex-M4 processor based device for the Arm Compiler 6</description>
1307       <require condition="CM4"/>
1308       <require condition="ARMCC6"/>
1309     </condition>
1310     <condition id="CM4_LE_ARMCC">
1311       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1312       <require condition="CM4_ARMCC"/>
1313       <require Dendian="Little-endian"/>
1314     </condition>
1315     <condition id="CM4_BE_ARMCC">
1316       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1317       <require condition="CM4_ARMCC"/>
1318       <require Dendian="Big-endian"/>
1319     </condition>
1320
1321     <condition id="CM4_FP_ARMCC">
1322       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1323       <require condition="CM4_FP"/>
1324       <require Tcompiler="ARMCC"/>
1325     </condition>
1326     <condition id="CM4_FP_ARMCC5">
1327       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler 5</description>
1328       <require condition="CM4_FP"/>
1329       <require condition="ARMCC5"/>
1330     </condition>
1331     <condition id="CM4_FP_ARMCC6">
1332       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler 6</description>
1333       <require condition="CM4_FP"/>
1334       <require condition="ARMCC6"/>
1335     </condition>
1336     <condition id="CM4_FP_LE_ARMCC">
1337       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1338       <require condition="CM4_FP_ARMCC"/>
1339       <require Dendian="Little-endian"/>
1340     </condition>
1341     <condition id="CM4_FP_BE_ARMCC">
1342       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1343       <require condition="CM4_FP_ARMCC"/>
1344       <require Dendian="Big-endian"/>
1345     </condition>
1346
1347     <condition id="CM7_ARMCC">
1348       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1349       <require condition="CM7"/>
1350       <require Tcompiler="ARMCC"/>
1351     </condition>
1352     <condition id="CM7_ARMCC5">
1353       <description>Cortex-M7 processor based device for the Arm Compiler 5</description>
1354       <require condition="CM7"/>
1355       <require condition="ARMCC5"/>
1356     </condition>
1357     <condition id="CM7_ARMCC6">
1358       <description>Cortex-M7 processor based device for the Arm Compiler 6</description>
1359       <require condition="CM7"/>
1360       <require condition="ARMCC6"/>
1361     </condition>
1362     <condition id="CM7_LE_ARMCC">
1363       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1364       <require condition="CM7_ARMCC"/>
1365       <require Dendian="Little-endian"/>
1366     </condition>
1367     <condition id="CM7_BE_ARMCC">
1368       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1369       <require condition="CM7_ARMCC"/>
1370       <require Dendian="Big-endian"/>
1371     </condition>
1372
1373     <condition id="CM7_FP_ARMCC">
1374       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1375       <require condition="CM7_FP"/>
1376       <require Tcompiler="ARMCC"/>
1377     </condition>
1378     <condition id="CM7_FP_ARMCC5">
1379       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler 5</description>
1380       <require condition="CM7_FP"/>
1381       <require condition="ARMCC5"/>
1382     </condition>
1383     <condition id="CM7_FP_ARMCC6">
1384       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler 6</description>
1385       <require condition="CM7_FP"/>
1386       <require condition="ARMCC6"/>
1387     </condition>
1388     <condition id="CM7_FP_LE_ARMCC">
1389       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1390       <require condition="CM7_FP_ARMCC"/>
1391       <require Dendian="Little-endian"/>
1392     </condition>
1393     <condition id="CM7_FP_BE_ARMCC">
1394       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1395       <require condition="CM7_FP_ARMCC"/>
1396       <require Dendian="Big-endian"/>
1397     </condition>
1398
1399     <condition id="CM23_ARMCC">
1400       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1401       <require condition="CM23"/>
1402       <require Tcompiler="ARMCC"/>
1403     </condition>
1404     <condition id="CM23_LE_ARMCC">
1405       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1406       <require condition="CM23_ARMCC"/>
1407       <require Dendian="Little-endian"/>
1408     </condition>
1409
1410     <condition id="CM33_ARMCC">
1411       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1412       <require condition="CM33"/>
1413       <require Tcompiler="ARMCC"/>
1414     </condition>
1415     <condition id="CM33_LE_ARMCC">
1416       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1417       <require condition="CM33_ARMCC"/>
1418       <require Dendian="Little-endian"/>
1419     </condition>
1420
1421     <condition id="CM33_FP_ARMCC">
1422       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1423       <require condition="CM33_FP"/>
1424       <require Tcompiler="ARMCC"/>
1425     </condition>
1426     <condition id="CM33_FP_LE_ARMCC">
1427       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1428       <require condition="CM33_FP_ARMCC"/>
1429       <require Dendian="Little-endian"/>
1430     </condition>
1431
1432     <condition id="CM35P_ARMCC">
1433       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1434       <require condition="CM35P"/>
1435       <require Tcompiler="ARMCC"/>
1436     </condition>
1437     <condition id="CM35P_LE_ARMCC">
1438       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1439       <require condition="CM35P_ARMCC"/>
1440       <require Dendian="Little-endian"/>
1441     </condition>
1442
1443     <condition id="CM35P_FP_ARMCC">
1444       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1445       <require condition="CM35P_FP"/>
1446       <require Tcompiler="ARMCC"/>
1447     </condition>
1448     <condition id="CM35P_FP_LE_ARMCC">
1449       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1450       <require condition="CM35P_FP_ARMCC"/>
1451       <require Dendian="Little-endian"/>
1452     </condition>
1453
1454     <condition id="CM55_NOFPU_NOMVE_ARMCC">
1455       <description>Cortex-M55 processor, no FPU, no MVE, Arm Compiler</description>
1456       <require condition="CM55_NOFPU_NOMVE"/>
1457       <require Tcompiler="ARMCC"/>
1458     </condition>
1459     <condition id="CM55_NOFPU_MVE_ARMCC">
1460       <description>Cortex-M55 processor, no FPU, MVE, Arm Compiler</description>
1461       <require condition="CM55_NOFPU_MVE"/>
1462       <require Tcompiler="ARMCC"/>
1463     </condition>
1464     <condition id="CM55_FPU_ARMCC">
1465       <description>Cortex-M55 processor, FPU, Arm Compiler</description>
1466       <require condition="CM55_FPU"/>
1467       <require Tcompiler="ARMCC"/>
1468     </condition>
1469     <condition id="CM55_NOFPU_NOMVE_LE_ARMCC">
1470       <description>Cortex-M55 processor, little endian, no FPU, no MVE, Arm Compiler</description>
1471       <require condition="CM55_NOFPU_NOMVE_ARMCC"/>
1472       <require Dendian="Little-endian"/>
1473     </condition>
1474     <condition id="CM55_FPU_LE_ARMCC">
1475       <description>Cortex-M55 processor, little endian, FPU, Arm Compiler</description>
1476       <require condition="CM55_FPU_ARMCC"/>
1477       <require Dendian="Little-endian"/>
1478     </condition>
1479
1480     <condition id="ARMv8MBL_ARMCC">
1481       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1482       <require condition="ARMv8MBL"/>
1483       <require Tcompiler="ARMCC"/>
1484     </condition>
1485     <condition id="ARMv8MBL_LE_ARMCC">
1486       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1487       <require condition="ARMv8MBL_ARMCC"/>
1488       <require Dendian="Little-endian"/>
1489     </condition>
1490
1491     <condition id="ARMv8MML_ARMCC">
1492       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1493       <require condition="ARMv8MML"/>
1494       <require Tcompiler="ARMCC"/>
1495     </condition>
1496     <condition id="ARMv8MML_LE_ARMCC">
1497       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1498       <require condition="ARMv8MML_ARMCC"/>
1499       <require Dendian="Little-endian"/>
1500     </condition>
1501
1502     <condition id="ARMv8MML_FP_ARMCC">
1503       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1504       <require condition="ARMv8MML_FP"/>
1505       <require Tcompiler="ARMCC"/>
1506     </condition>
1507     <condition id="ARMv8MML_FP_LE_ARMCC">
1508       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1509       <require condition="ARMv8MML_FP_ARMCC"/>
1510       <require Dendian="Little-endian"/>
1511     </condition>
1512
1513     <condition id="TZ Secure ARMCC6">
1514       <description>TrustZone (Secure), Arm Compiler</description>
1515       <require condition="TZ Secure"/>
1516       <require condition="ARMCC6"/>
1517     </condition>
1518     <condition id="TZ Non-secure ARMCC6">
1519       <description>TrustZone (Non-secure), Arm Compiler</description>
1520       <require condition="TZ Non-secure"/>
1521       <require condition="ARMCC6"/>
1522     </condition>
1523     <condition id="TZ Unavailable ARMCC6">
1524       <description>TrustZone not available, Arm Compiler</description>
1525       <require condition="TZ Unavailable"/>
1526       <require condition="ARMCC6"/>
1527     </condition>
1528
1529     <!-- GCC compiler -->
1530     <condition id="CA_GCC">
1531       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1532       <require condition="ARMv7-A Device"/>
1533       <require Tcompiler="GCC"/>
1534     </condition>
1535
1536     <condition id="CM0_GCC">
1537       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1538       <require condition="CM0"/>
1539       <require Tcompiler="GCC"/>
1540     </condition>
1541     <condition id="CM0_LE_GCC">
1542       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1543       <require condition="CM0_GCC"/>
1544       <require Dendian="Little-endian"/>
1545     </condition>
1546     <condition id="CM0_BE_GCC">
1547       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1548       <require condition="CM0_GCC"/>
1549       <require Dendian="Big-endian"/>
1550     </condition>
1551
1552     <condition id="CM1_GCC">
1553       <description>Cortex-M1 based device for the GCC Compiler</description>
1554       <require condition="CM1"/>
1555       <require Tcompiler="GCC"/>
1556     </condition>
1557     <condition id="CM1_LE_GCC">
1558       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1559       <require condition="CM1_GCC"/>
1560       <require Dendian="Little-endian"/>
1561     </condition>
1562     <condition id="CM1_BE_GCC">
1563       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1564       <require condition="CM1_GCC"/>
1565       <require Dendian="Big-endian"/>
1566     </condition>
1567
1568     <condition id="CM3_GCC">
1569       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1570       <require condition="CM3"/>
1571       <require Tcompiler="GCC"/>
1572     </condition>
1573     <condition id="CM3_LE_GCC">
1574       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1575       <require condition="CM3_GCC"/>
1576       <require Dendian="Little-endian"/>
1577     </condition>
1578     <condition id="CM3_BE_GCC">
1579       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1580       <require condition="CM3_GCC"/>
1581       <require Dendian="Big-endian"/>
1582     </condition>
1583
1584     <condition id="CM4_GCC">
1585       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1586       <require condition="CM4"/>
1587       <require Tcompiler="GCC"/>
1588     </condition>
1589     <condition id="CM4_LE_GCC">
1590       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1591       <require condition="CM4_GCC"/>
1592       <require Dendian="Little-endian"/>
1593     </condition>
1594     <condition id="CM4_BE_GCC">
1595       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1596       <require condition="CM4_GCC"/>
1597       <require Dendian="Big-endian"/>
1598     </condition>
1599
1600     <condition id="CM4_FP_GCC">
1601       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1602       <require condition="CM4_FP"/>
1603       <require Tcompiler="GCC"/>
1604     </condition>
1605     <condition id="CM4_FP_LE_GCC">
1606       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1607       <require condition="CM4_FP_GCC"/>
1608       <require Dendian="Little-endian"/>
1609     </condition>
1610     <condition id="CM4_FP_BE_GCC">
1611       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1612       <require condition="CM4_FP_GCC"/>
1613       <require Dendian="Big-endian"/>
1614     </condition>
1615
1616     <condition id="CM7_GCC">
1617       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1618       <require condition="CM7"/>
1619       <require Tcompiler="GCC"/>
1620     </condition>
1621     <condition id="CM7_LE_GCC">
1622       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1623       <require condition="CM7_GCC"/>
1624       <require Dendian="Little-endian"/>
1625     </condition>
1626     <condition id="CM7_BE_GCC">
1627       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1628       <require condition="CM7_GCC"/>
1629       <require Dendian="Big-endian"/>
1630     </condition>
1631
1632     <condition id="CM7_FP_GCC">
1633       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1634       <require condition="CM7_FP"/>
1635       <require Tcompiler="GCC"/>
1636     </condition>
1637     <condition id="CM7_FP_LE_GCC">
1638       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1639       <require condition="CM7_FP_GCC"/>
1640       <require Dendian="Little-endian"/>
1641     </condition>
1642     <condition id="CM7_FP_BE_GCC">
1643       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1644       <require condition="CM7_FP_GCC"/>
1645       <require Dendian="Big-endian"/>
1646     </condition>
1647
1648     <condition id="CM23_GCC">
1649       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1650       <require condition="CM23"/>
1651       <require Tcompiler="GCC"/>
1652     </condition>
1653     <condition id="CM23_LE_GCC">
1654       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1655       <require condition="CM23_GCC"/>
1656       <require Dendian="Little-endian"/>
1657     </condition>
1658
1659     <condition id="CM33_GCC">
1660       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1661       <require condition="CM33"/>
1662       <require Tcompiler="GCC"/>
1663     </condition>
1664     <condition id="CM33_LE_GCC">
1665       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1666       <require condition="CM33_GCC"/>
1667       <require Dendian="Little-endian"/>
1668     </condition>
1669
1670     <condition id="CM33_FP_GCC">
1671       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1672       <require condition="CM33_FP"/>
1673       <require Tcompiler="GCC"/>
1674     </condition>
1675     <condition id="CM33_FP_LE_GCC">
1676       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1677       <require condition="CM33_FP_GCC"/>
1678       <require Dendian="Little-endian"/>
1679     </condition>
1680
1681     <condition id="CM35P_GCC">
1682       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1683       <require condition="CM35P"/>
1684       <require Tcompiler="GCC"/>
1685     </condition>
1686     <condition id="CM35P_LE_GCC">
1687       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1688       <require condition="CM35P_GCC"/>
1689       <require Dendian="Little-endian"/>
1690     </condition>
1691
1692     <condition id="CM35P_FP_GCC">
1693       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1694       <require condition="CM35P_FP"/>
1695       <require Tcompiler="GCC"/>
1696     </condition>
1697     <condition id="CM35P_FP_LE_GCC">
1698       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1699       <require condition="CM35P_FP_GCC"/>
1700       <require Dendian="Little-endian"/>
1701     </condition>
1702
1703     <condition id="CM55_NOFPU_NOMVE_GCC">
1704       <description>Cortex-M55 processor, no FPU, no MVE, GCC Compiler</description>
1705       <require condition="CM55_NOFPU_NOMVE"/>
1706       <require Tcompiler="GCC"/>
1707     </condition>
1708     <condition id="CM55_NOFPU_MVE_GCC">
1709       <description>Cortex-M55 processor, no FPU, MVE, GCC Compiler</description>
1710       <require condition="CM55_NOFPU_MVE"/>
1711       <require Tcompiler="GCC"/>
1712     </condition>
1713     <condition id="CM55_FPU_GCC">
1714       <description>Cortex-M55 processor, FPU, GCC Compiler</description>
1715       <require condition="CM55_FPU"/>
1716       <require Tcompiler="GCC"/>
1717     </condition>
1718     <condition id="CM55_NOFPU_NOMVE_LE_GCC">
1719       <description>Cortex-M55 processor, little endian, no FPU, no MVE, GCC Compiler</description>
1720       <require condition="CM55_NOFPU_NOMVE_GCC"/>
1721       <require Dendian="Little-endian"/>
1722     </condition>
1723     <condition id="CM55_FPU_LE_GCC">
1724       <description>Cortex-M55 processor, little endian, FPU, GCC Compiler</description>
1725       <require condition="CM55_FPU_GCC"/>
1726       <require Dendian="Little-endian"/>
1727     </condition>
1728
1729     <condition id="ARMv8MBL_GCC">
1730       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1731       <require condition="ARMv8MBL"/>
1732       <require Tcompiler="GCC"/>
1733     </condition>
1734     <condition id="ARMv8MBL_LE_GCC">
1735       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1736       <require condition="ARMv8MBL_GCC"/>
1737       <require Dendian="Little-endian"/>
1738     </condition>
1739
1740     <condition id="ARMv8MML_GCC">
1741       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1742       <require condition="ARMv8MML"/>
1743       <require Tcompiler="GCC"/>
1744     </condition>
1745     <condition id="ARMv8MML_LE_GCC">
1746       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1747       <require condition="ARMv8MML_GCC"/>
1748       <require Dendian="Little-endian"/>
1749     </condition>
1750
1751     <condition id="ARMv8MML_FP_GCC">
1752       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1753       <require condition="ARMv8MML_FP"/>
1754       <require Tcompiler="GCC"/>
1755     </condition>
1756     <condition id="ARMv8MML_FP_LE_GCC">
1757       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1758       <require condition="ARMv8MML_FP_GCC"/>
1759       <require Dendian="Little-endian"/>
1760     </condition>
1761
1762     <!-- IAR compiler -->
1763     <condition id="CA_IAR">
1764       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1765       <require condition="ARMv7-A Device"/>
1766       <require Tcompiler="IAR"/>
1767     </condition>
1768
1769     <condition id="CM0_IAR">
1770       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1771       <require condition="CM0"/>
1772       <require Tcompiler="IAR"/>
1773     </condition>
1774     <condition id="CM0_LE_IAR">
1775       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1776       <require condition="CM0_IAR"/>
1777       <require Dendian="Little-endian"/>
1778     </condition>
1779     <condition id="CM0_BE_IAR">
1780       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1781       <require condition="CM0_IAR"/>
1782       <require Dendian="Big-endian"/>
1783     </condition>
1784
1785     <condition id="CM1_IAR">
1786       <description>Cortex-M1 based device for the IAR Compiler</description>
1787       <require condition="CM1"/>
1788       <require Tcompiler="IAR"/>
1789     </condition>
1790     <condition id="CM1_LE_IAR">
1791       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1792       <require condition="CM1_IAR"/>
1793       <require Dendian="Little-endian"/>
1794     </condition>
1795     <condition id="CM1_BE_IAR">
1796       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1797       <require condition="CM1_IAR"/>
1798       <require Dendian="Big-endian"/>
1799     </condition>
1800
1801     <condition id="CM3_IAR">
1802       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1803       <require condition="CM3"/>
1804       <require Tcompiler="IAR"/>
1805     </condition>
1806     <condition id="CM3_LE_IAR">
1807       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1808       <require condition="CM3_IAR"/>
1809       <require Dendian="Little-endian"/>
1810     </condition>
1811     <condition id="CM3_BE_IAR">
1812       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1813       <require condition="CM3_IAR"/>
1814       <require Dendian="Big-endian"/>
1815     </condition>
1816
1817     <condition id="CM4_IAR">
1818       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1819       <require condition="CM4"/>
1820       <require Tcompiler="IAR"/>
1821     </condition>
1822     <condition id="CM4_LE_IAR">
1823       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1824       <require condition="CM4_IAR"/>
1825       <require Dendian="Little-endian"/>
1826     </condition>
1827     <condition id="CM4_BE_IAR">
1828       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1829       <require condition="CM4_IAR"/>
1830       <require Dendian="Big-endian"/>
1831     </condition>
1832
1833     <condition id="CM4_FP_IAR">
1834       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1835       <require condition="CM4_FP"/>
1836       <require Tcompiler="IAR"/>
1837     </condition>
1838     <condition id="CM4_FP_LE_IAR">
1839       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1840       <require condition="CM4_FP_IAR"/>
1841       <require Dendian="Little-endian"/>
1842     </condition>
1843     <condition id="CM4_FP_BE_IAR">
1844       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1845       <require condition="CM4_FP_IAR"/>
1846       <require Dendian="Big-endian"/>
1847     </condition>
1848
1849     <condition id="CM7_IAR">
1850       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1851       <require condition="CM7"/>
1852       <require Tcompiler="IAR"/>
1853     </condition>
1854     <condition id="CM7_LE_IAR">
1855       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1856       <require condition="CM7_IAR"/>
1857       <require Dendian="Little-endian"/>
1858     </condition>
1859     <condition id="CM7_BE_IAR">
1860       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1861       <require condition="CM7_IAR"/>
1862       <require Dendian="Big-endian"/>
1863     </condition>
1864
1865     <condition id="CM7_FP_IAR">
1866       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1867       <require condition="CM7_FP"/>
1868       <require Tcompiler="IAR"/>
1869     </condition>
1870     <condition id="CM7_FP_LE_IAR">
1871       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1872       <require condition="CM7_FP_IAR"/>
1873       <require Dendian="Little-endian"/>
1874     </condition>
1875     <condition id="CM7_FP_BE_IAR">
1876       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1877       <require condition="CM7_FP_IAR"/>
1878       <require Dendian="Big-endian"/>
1879     </condition>
1880
1881     <condition id="CM23_IAR">
1882       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1883       <require condition="CM23"/>
1884       <require Tcompiler="IAR"/>
1885     </condition>
1886     <condition id="CM23_LE_IAR">
1887       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1888       <require condition="CM23_IAR"/>
1889       <require Dendian="Little-endian"/>
1890     </condition>
1891
1892     <condition id="CM33_IAR">
1893       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1894       <require condition="CM33"/>
1895       <require Tcompiler="IAR"/>
1896     </condition>
1897     <condition id="CM33_LE_IAR">
1898       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1899       <require condition="CM33_IAR"/>
1900       <require Dendian="Little-endian"/>
1901     </condition>
1902
1903     <condition id="CM33_FP_IAR">
1904       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1905       <require condition="CM33_FP"/>
1906       <require Tcompiler="IAR"/>
1907     </condition>
1908     <condition id="CM33_FP_LE_IAR">
1909       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1910       <require condition="CM33_FP_IAR"/>
1911       <require Dendian="Little-endian"/>
1912     </condition>
1913
1914     <condition id="CM35P_IAR">
1915       <description>Cortex-M35P processor based device for the IAR Compiler</description>
1916       <require condition="CM35P"/>
1917       <require Tcompiler="IAR"/>
1918     </condition>
1919     <condition id="CM35P_LE_IAR">
1920       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
1921       <require condition="CM35P_IAR"/>
1922       <require Dendian="Little-endian"/>
1923     </condition>
1924
1925     <condition id="CM35P_FP_IAR">
1926       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
1927       <require condition="CM35P_FP"/>
1928       <require Tcompiler="IAR"/>
1929     </condition>
1930     <condition id="CM35P_FP_LE_IAR">
1931       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1932       <require condition="CM35P_FP_IAR"/>
1933       <require Dendian="Little-endian"/>
1934     </condition>
1935
1936     <condition id="CM55_NOFPU_NOMVE_IAR">
1937       <description>Cortex-M55 processor, no FPU, no MVE, IAR Compiler</description>
1938       <require condition="CM55_NOFPU_NOMVE"/>
1939       <require Tcompiler="IAR"/>
1940     </condition>
1941     <condition id="CM55_NOFPU_MVE_IAR">
1942       <description>Cortex-M55 processor, no FPU, MVE, IAR Compiler</description>
1943       <require condition="CM55_NOFPU_MVE"/>
1944       <require Tcompiler="IAR"/>
1945     </condition>
1946     <condition id="CM55_FPU_IAR">
1947       <description>Cortex-M55 processor, FPU, IAR Compiler</description>
1948       <require condition="CM55_FPU"/>
1949       <require Tcompiler="IAR"/>
1950     </condition>
1951     <condition id="CM55_NOFPU_NOMVE_LE_IAR">
1952       <description>Cortex-M55 processor, little endian, no FPU, no MVE, IAR Compiler</description>
1953       <require condition="CM55_NOFPU_NOMVE_IAR"/>
1954       <require Dendian="Little-endian"/>
1955     </condition>
1956     <condition id="CM55_FPU_LE_IAR">
1957       <description>Cortex-M55 processor, little endian, FPU, IAR Compiler</description>
1958       <require condition="CM55_FPU_IAR"/>
1959       <require Dendian="Little-endian"/>
1960     </condition>
1961
1962     <condition id="ARMv8MBL_IAR">
1963       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1964       <require condition="ARMv8MBL"/>
1965       <require Tcompiler="IAR"/>
1966     </condition>
1967     <condition id="ARMv8MBL_LE_IAR">
1968       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1969       <require condition="ARMv8MBL_IAR"/>
1970       <require Dendian="Little-endian"/>
1971     </condition>
1972
1973     <condition id="ARMv8MML_IAR">
1974       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1975       <require condition="ARMv8MML"/>
1976       <require Tcompiler="IAR"/>
1977     </condition>
1978     <condition id="ARMv8MML_LE_IAR">
1979       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1980       <require condition="ARMv8MML_IAR"/>
1981       <require Dendian="Little-endian"/>
1982     </condition>
1983
1984     <condition id="ARMv8MML_FP_IAR">
1985       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1986       <require condition="ARMv8MML_FP"/>
1987       <require Tcompiler="IAR"/>
1988     </condition>
1989     <condition id="ARMv8MML_FP_LE_IAR">
1990       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1991       <require condition="ARMv8MML_FP_IAR"/>
1992       <require Dendian="Little-endian"/>
1993     </condition>
1994
1995     <!-- conditions selecting single devices and CMSIS Core -->
1996     <condition id="ARMCM0 CMSIS">
1997       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
1998       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1999       <require Cclass="CMSIS" Cgroup="CORE"/>
2000     </condition>
2001
2002     <condition id="ARMCM0+ CMSIS">
2003       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2004       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2005       <require Cclass="CMSIS" Cgroup="CORE"/>
2006     </condition>
2007
2008     <condition id="ARMCM1 CMSIS">
2009       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2010       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2011       <require Cclass="CMSIS" Cgroup="CORE"/>
2012     </condition>
2013
2014     <condition id="ARMCM3 CMSIS">
2015       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2016       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2017       <require Cclass="CMSIS" Cgroup="CORE"/>
2018     </condition>
2019
2020     <condition id="ARMCM4 CMSIS">
2021       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2022       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2023       <require Cclass="CMSIS" Cgroup="CORE"/>
2024     </condition>
2025
2026     <condition id="ARMCM7 CMSIS">
2027       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2028       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2029       <require Cclass="CMSIS" Cgroup="CORE"/>
2030     </condition>
2031
2032     <condition id="ARMCM23 CMSIS">
2033       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2034       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2035       <require Cclass="CMSIS" Cgroup="CORE"/>
2036     </condition>
2037
2038     <condition id="ARMCM33 CMSIS">
2039       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2040       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2041       <require Cclass="CMSIS" Cgroup="CORE"/>
2042     </condition>
2043
2044     <condition id="ARMCM35P CMSIS">
2045       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2046       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2047       <require Cclass="CMSIS" Cgroup="CORE"/>
2048     </condition>
2049
2050     <condition id="ARMCM55 CMSIS">
2051       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2052       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2053       <require Cclass="CMSIS" Cgroup="CORE"/>
2054     </condition>
2055
2056     <condition id="ARMSC000 CMSIS">
2057       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2058       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2059       <require Cclass="CMSIS" Cgroup="CORE"/>
2060     </condition>
2061
2062     <condition id="ARMSC300 CMSIS">
2063       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2064       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2065       <require Cclass="CMSIS" Cgroup="CORE"/>
2066     </condition>
2067
2068     <condition id="ARMv8MBL CMSIS">
2069       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2070       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2071       <require Cclass="CMSIS" Cgroup="CORE"/>
2072     </condition>
2073
2074     <condition id="ARMv8MML CMSIS">
2075       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2076       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2077       <require Cclass="CMSIS" Cgroup="CORE"/>
2078     </condition>
2079
2080     <condition id="ARMv81MML CMSIS">
2081       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2082       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2083       <require Cclass="CMSIS" Cgroup="CORE"/>
2084     </condition>
2085
2086     <condition id="ARMCA5 CMSIS">
2087       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2088       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2089       <require Cclass="CMSIS" Cgroup="CORE"/>
2090     </condition>
2091
2092     <condition id="ARMCA7 CMSIS">
2093       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2094       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2095       <require Cclass="CMSIS" Cgroup="CORE"/>
2096     </condition>
2097
2098     <condition id="ARMCA9 CMSIS">
2099       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2100       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2101       <require Cclass="CMSIS" Cgroup="CORE"/>
2102     </condition>
2103
2104     <!-- CMSIS DSP -->
2105     <condition id="CMSIS DSP">
2106       <description>Components required for DSP</description>
2107       <require condition="ARMv6_7_8-M Device"/>
2108       <require condition="ARMCC GCC IAR"/>
2109       <require Cclass="CMSIS" Cgroup="CORE"/>
2110     </condition>
2111
2112     <!-- CMSIS NN -->
2113     <condition id="CMSIS NN">
2114       <description>Components required for NN</description>
2115       <require Cclass="CMSIS" Cgroup="DSP"/>
2116     </condition>
2117
2118     <!-- RTOS RTX -->
2119     <condition id="RTOS RTX">
2120       <description>Components required for RTOS RTX</description>
2121       <require condition="ARMv6_7-M Device"/>
2122       <require condition="ARMCC GCC IAR"/>
2123       <require Cclass="Device" Cgroup="Startup"/>
2124       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2125     </condition>
2126     <condition id="RTOS RTX IFX">
2127       <description>Components required for RTOS RTX IFX</description>
2128       <require condition="ARMv6_7-M Device"/>
2129       <require condition="ARMCC GCC IAR"/>
2130       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2131       <require Cclass="Device" Cgroup="Startup"/>
2132       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2133     </condition>
2134     <condition id="RTOS RTX5">
2135       <description>Components required for RTOS RTX5</description>
2136       <require condition="ARMv6_7_8-M Device"/>
2137       <require condition="ARMCC GCC IAR"/>
2138       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2139     </condition>
2140     <condition id="RTOS2 RTX5">
2141       <description>Components required for RTOS2 RTX5</description>
2142       <require condition="ARMv6_7_8-M Device"/>
2143       <require condition="ARMCC GCC IAR"/>
2144       <require Cclass="CMSIS"  Cgroup="CORE"/>
2145       <require Cclass="Device" Cgroup="Startup"/>
2146     </condition>
2147     <condition id="RTOS2 RTX5 v7-A">
2148       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2149       <require condition="ARMv7-A Device"/>
2150       <require condition="ARMCC GCC IAR"/>
2151       <require Cclass="CMSIS"  Cgroup="CORE"/>
2152       <require Cclass="Device" Cgroup="Startup"/>
2153       <require Cclass="Device" Cgroup="OS Tick"/>
2154       <require Cclass="Device" Cgroup="IRQ Controller"/>
2155     </condition>
2156     <condition id="RTOS2 RTX5 NS">
2157       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2158       <require condition="ARMv8-M Device"/>
2159       <require condition="TZ Non-secure"/>
2160       <require condition="ARMCC GCC IAR"/>
2161       <require Cclass="CMSIS"  Cgroup="CORE"/>
2162       <require Cclass="Device" Cgroup="Startup"/>
2163     </condition>
2164
2165     <!-- OS Tick -->
2166     <condition id="OS Tick PTIM">
2167       <description>Components required for OS Tick Private Timer</description>
2168       <require condition="CA5_CA9"/>
2169       <require Cclass="Device" Cgroup="IRQ Controller"/>
2170     </condition>
2171
2172     <condition id="OS Tick GTIM">
2173       <description>Components required for OS Tick Generic Physical Timer</description>
2174       <require condition="CA7"/>
2175       <require Cclass="Device" Cgroup="IRQ Controller"/>
2176     </condition>
2177
2178   </conditions>
2179
2180   <components>
2181     <!-- CMSIS-Core component -->
2182     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.5.0"  condition="ARMv6_7_8-M Device" >
2183       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2184       <files>
2185         <!-- CPU independent -->
2186         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2187         <file category="include" name="CMSIS/Core/Include/"/>
2188         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
2189         <!-- Code template -->
2190         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2191         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2192       </files>
2193     </component>
2194
2195     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.2.1"  condition="ARMv7-A Device" >
2196       <description>CMSIS-CORE for Cortex-A</description>
2197       <files>
2198         <!-- CPU independent -->
2199         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2200         <file category="include" name="CMSIS/Core_A/Include/"/>
2201       </files>
2202     </component>
2203
2204     <!-- CMSIS-Startup components -->
2205     <!-- Cortex-M0 -->
2206     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS" isDefaultVariant="true">
2207       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2208       <files>
2209         <!-- include folder / device header file -->
2210         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2211         <!-- startup / system file -->
2212         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
2213         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2214         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2215         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2216         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2217       </files>
2218     </component>
2219     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2220       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2221       <files>
2222         <!-- include folder / device header file -->
2223         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2224         <!-- startup / system file -->
2225         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2226         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.2.0" attr="config" condition="GCC"/>
2227         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2228         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2229         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2230       </files>
2231     </component>
2232
2233     <!-- Cortex-M0+ -->
2234     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS" isDefaultVariant="true">
2235       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2236       <files>
2237         <!-- include folder / device header file -->
2238         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2239         <!-- startup / system file -->
2240         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
2241         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2242         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2243         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
2244         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2245       </files>
2246     </component>
2247     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM0+ CMSIS">
2248       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2249       <files>
2250         <!-- include folder / device header file -->
2251         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2252         <!-- startup / system file -->
2253         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2254         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.2.0" attr="config" condition="GCC"/>
2255         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
2256         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2257         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2258       </files>
2259     </component>
2260
2261     <!-- Cortex-M1 -->
2262     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS" isDefaultVariant="true">
2263       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2264       <files>
2265         <!-- include folder / device header file -->
2266         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2267         <!-- startup / system file -->
2268         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
2269         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2270         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2271         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2272         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2273       </files>
2274     </component>
2275     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2276       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2277       <files>
2278         <!-- include folder / device header file -->
2279         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2280         <!-- startup / system file -->
2281         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2282         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.2.0" attr="config" condition="GCC"/>
2283         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2284         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2285         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2286       </files>
2287     </component>
2288
2289     <!-- Cortex-M3 -->
2290     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="true">
2291       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2292       <files>
2293         <!-- include folder / device header file -->
2294         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2295         <!-- startup / system file -->
2296         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
2297         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2298         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2299         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2300         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2301       </files>
2302     </component>
2303     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2304       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2305       <files>
2306         <!-- include folder / device header file -->
2307         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2308         <!-- startup / system file -->
2309         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2310         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.2.0" attr="config" condition="GCC"/>
2311         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2312         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2313         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2314       </files>
2315     </component>
2316
2317     <!-- Cortex-M4 -->
2318     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS" isDefaultVariant="true">
2319       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2320       <files>
2321         <!-- include folder / device header file -->
2322         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2323         <!-- startup / system file -->
2324         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
2325         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2326         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2327         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2328        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2329       </files>
2330     </component>
2331     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2332       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2333       <files>
2334         <!-- include folder / device header file -->
2335         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2336         <!-- startup / system file -->
2337         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2338         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.2.0" attr="config" condition="GCC"/>
2339         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2340         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2341         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2342       </files>
2343     </component>
2344
2345     <!-- Cortex-M7 -->
2346     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS" isDefaultVariant="true">
2347       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2348       <files>
2349         <!-- include folder / device header file -->
2350         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2351         <!-- startup / system file -->
2352         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
2353         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2354         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2355         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2356         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2357       </files>
2358     </component>
2359     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2360       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2361       <files>
2362         <!-- include folder / device header file -->
2363         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2364         <!-- startup / system file -->
2365         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2366         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.2.0" attr="config" condition="GCC"/>
2367         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2368         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2369         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2370       </files>
2371     </component>
2372
2373     <!-- Cortex-M23 -->
2374     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM23 CMSIS" isDefaultVariant="true">
2375       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2376       <files>
2377         <!-- include folder / device header file -->
2378         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2379         <!-- startup / system file -->
2380         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"             version="2.1.0" attr="config"/>
2381         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2382         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2383         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2384         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2385         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2386         <!-- SAU configuration -->
2387         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2388       </files>
2389     </component>
2390     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM23 CMSIS">
2391       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2392       <files>
2393         <!-- include folder / device header file -->
2394         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2395         <!-- startup / system file -->
2396         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2397         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2398         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2399         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2400         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S"         version="2.2.0" attr="config" condition="GCC"/>
2401         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2402         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.1.0" attr="config" condition="IAR"/>
2403         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2404         <!-- SAU configuration -->
2405         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2406       </files>
2407     </component>
2408
2409     <!-- Cortex-M33 -->
2410     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM33 CMSIS" isDefaultVariant="true">
2411       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2412       <files>
2413         <!-- include folder / device header file -->
2414         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2415         <!-- startup / system file -->
2416         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.1.0" attr="config"/>
2417         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2418         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2419         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2420         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2421         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2422         <!-- SAU configuration -->
2423         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2424       </files>
2425     </component>
2426     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM33 CMSIS">
2427       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2428       <files>
2429         <!-- include folder / device header file -->
2430         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2431         <!-- startup / system file -->
2432         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2433         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2434         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2435         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2436         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.3.0" attr="config" condition="GCC"/>
2437         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2438         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.1.0" attr="config" condition="IAR"/>
2439         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2440         <!-- SAU configuration -->
2441         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2442       </files>
2443     </component>
2444
2445     <!-- Cortex-M35P -->
2446     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM35P CMSIS" isDefaultVariant="true">
2447       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2448       <files>
2449         <!-- include folder / device header file -->
2450         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2451         <!-- startup / system file -->
2452         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.1.0" attr="config"/>
2453         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2454         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2455         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2456         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2457         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2458         <!-- SAU configuration -->
2459         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2460       </files>
2461     </component>
2462     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM35P CMSIS">
2463       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2464       <files>
2465         <!-- include folder / device header file -->
2466         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2467         <!-- startup / system file -->
2468         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2469         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2470         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2471         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2472         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.3.0" attr="config" condition="GCC"/>
2473         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2474         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.1.0" attr="config" condition="IAR"/>
2475         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2476         <!-- SAU configuration -->
2477         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2478       </files>
2479     </component>
2480
2481     <!-- Cortex-M55 -->
2482     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM55 CMSIS" isDefaultVariant="true">
2483       <description>System and Startup for Generic Cortex-M55 device</description>
2484       <files>
2485         <!-- include folder / device header file -->
2486         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2487         <!-- startup / system file -->
2488         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.1.0" attr="config"/>
2489         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2490         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2491         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2492         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2493         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.0.1" attr="config"/>
2494         <!-- SAU configuration -->
2495         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2496       </files>
2497     </component>
2498
2499     <!-- Cortex-SC000 -->
2500     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS" isDefaultVariant="true">
2501       <description>System and Startup for Generic Arm SC000 device</description>
2502       <files>
2503         <!-- include folder / device header file -->
2504         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2505         <!-- startup / system file -->
2506         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
2507         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2508         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2509         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2510         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2511       </files>
2512     </component>
2513     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2514       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2515       <files>
2516         <!-- include folder / device header file -->
2517         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2518         <!-- startup / system file -->
2519         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2520         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.2.0" attr="config" condition="GCC"/>
2521         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2522         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2523         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2524       </files>
2525     </component>
2526
2527     <!-- Cortex-SC300 -->
2528     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS" isDefaultVariant="true">
2529       <description>System and Startup for Generic Arm SC300 device</description>
2530       <files>
2531         <!-- include folder / device header file -->
2532         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2533         <!-- startup / system file -->
2534         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
2535         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2536         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2537         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2538         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2539       </files>
2540     </component>
2541     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2542       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2543       <files>
2544         <!-- include folder / device header file -->
2545         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2546         <!-- startup / system file -->
2547         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2548         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.2.0" attr="config" condition="GCC"/>
2549         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2550         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2551         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2552       </files>
2553     </component>
2554
2555     <!-- ARMv8MBL -->
2556     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MBL CMSIS" isDefaultVariant="true">
2557       <description>System and Startup for Generic Armv8-M Baseline device</description>
2558       <files>
2559         <!-- include folder / device header file -->
2560         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2561         <!-- startup / system file -->
2562         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"             version="2.1.0" attr="config"/>
2563         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2564         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2565         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2566         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2567         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2568         <!-- SAU configuration -->
2569         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2570       </files>
2571     </component>
2572     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMv8MBL CMSIS">
2573       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2574       <files>
2575         <!-- include folder / device header file -->
2576         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2577         <!-- startup / system file -->
2578         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2579         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2580         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2581         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2582         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S"         version="2.2.0" attr="config" condition="GCC"/>
2583         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2584         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2585         <!-- SAU configuration -->
2586         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2587       </files>
2588     </component>
2589
2590     <!-- ARMv8MML -->
2591     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MML CMSIS" isDefaultVariant="true">
2592       <description>System and Startup for Generic Armv8-M Mainline device</description>
2593       <files>
2594         <!-- include folder / device header file -->
2595         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2596         <!-- startup / system file -->
2597         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.1.0" attr="config"/>
2598         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2599         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2600         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2601         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2602         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2603         <!-- SAU configuration -->
2604         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2605       </files>
2606     </component>
2607     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMv8MML CMSIS">
2608       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2609       <files>
2610         <!-- include folder / device header file -->
2611         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2612         <!-- startup / system file -->
2613         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2614         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2615         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2616         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2617         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.3.0" attr="config" condition="GCC"/>
2618         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2619         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2620         <!-- SAU configuration -->
2621         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2622       </files>
2623     </component>
2624
2625     <!-- ARMv81MML -->
2626     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.2.0" condition="ARMv81MML CMSIS" isDefaultVariant="true">
2627       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2628       <files>
2629         <!-- include folder / device header file -->
2630         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2631         <!-- startup / system file -->
2632         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.1.0" attr="config"/>
2633         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2634         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2635         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2636         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.2.0" attr="config" condition="GCC"/>
2637         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
2638         <!-- SAU configuration -->
2639         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
2640       </files>
2641     </component>
2642
2643     <!-- Cortex-A5 -->
2644     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA5 CMSIS">
2645       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2646       <files>
2647         <!-- include folder / device header file -->
2648         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2649         <!-- startup / system / mmu files -->
2650         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2651         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2652         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2653         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2654         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.1" attr="config" condition="GCC"/>
2655         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2656         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2657         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2658         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2659         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2660         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2661         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2662
2663       </files>
2664     </component>
2665
2666     <!-- Cortex-A7 -->
2667     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA7 CMSIS">
2668       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2669       <files>
2670         <!-- include folder / device header file -->
2671         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2672         <!-- startup / system / mmu files -->
2673         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2674         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2675         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2676         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2677         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.1" attr="config" condition="GCC"/>
2678         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2679         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2680         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2681         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2682         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2683         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2684         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2685       </files>
2686     </component>
2687
2688     <!-- Cortex-A9 -->
2689     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.2" condition="ARMCA9 CMSIS">
2690       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2691       <files>
2692         <!-- include folder / device header file -->
2693         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2694         <!-- startup / system / mmu files -->
2695         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2696         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2697         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2698         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2699         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.1" attr="config" condition="GCC"/>
2700         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2701         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2702         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2703         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2704         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2705         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2706         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2707       </files>
2708     </component>
2709
2710     <!-- IRQ Controller -->
2711     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2712       <description>IRQ Controller implementation using GIC</description>
2713       <files>
2714         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2715       </files>
2716     </component>
2717
2718     <!-- OS Tick -->
2719     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2720       <description>OS Tick implementation using Private Timer</description>
2721       <files>
2722         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2723       </files>
2724     </component>
2725
2726     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2727       <description>OS Tick implementation using Generic Physical Timer</description>
2728       <files>
2729         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2730       </files>
2731     </component>
2732
2733     <!-- CMSIS-DSP component -->
2734     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.9.0-dev" isDefaultVariant="true" condition="CMSIS DSP">
2735       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2736       <files>
2737         <!-- CPU independent -->
2738         <file category="doc"      name="CMSIS/Documentation/DSP/html/index.html"/>
2739         <file category="header"   name="CMSIS/DSP/Include/arm_math.h"/>
2740         <file category="header"   name="CMSIS/DSP/Include/arm_math_f16.h"/>
2741         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables.h"/>
2742         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables_f16.h"/>
2743         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs.h"/>
2744         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs_f16.h"/>
2745
2746         <file category="include"  name="CMSIS/DSP/PrivateInclude/"/>
2747         <file category="include"  name="CMSIS/DSP/Include/"/>
2748
2749         <!-- DSP sources (core) -->
2750         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
2751
2752         <file category="source"   name="CMSIS/DSP/Source/QuaternionMathFunctions/QuaternionMathFunctions.c"/>
2753
2754         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
2755         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
2756         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
2757         <file category="source"   name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
2758         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
2759         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
2760         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
2761         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
2762         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
2763         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
2764         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
2765         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
2766
2767         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctions.c"/>
2768
2769         <!-- DSP sources F16 versions -->
2770         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.c"/>
2771         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c"/>
2772         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.c"/>
2773         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTablesF16.c"/>
2774         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctionsF16.c"/>
2775         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctionsF16.c"/>
2776         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.c"/>
2777         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c"/>
2778         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctionsF16.c"/>
2779         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctionsF16.c"/>
2780         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctionsF16.c"/>
2781         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctionsF16.c"/>
2782         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctionsF16.c"/>
2783
2784         <!-- Compute Library for Cortex-A -->
2785         <file category="header"   name="CMSIS/DSP/ComputeLibrary/Include/NEMath.h"        condition="ARMv7-A Device"/>
2786         <file category="source"   name="CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c"  condition="ARMv7-A Device"/>
2787       </files>
2788     </component>
2789
2790     <!-- CMSIS-NN component -->
2791     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="3.0.0" condition="CMSIS NN">
2792       <description>CMSIS-NN Neural Network Library</description>
2793       <files>
2794         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2795         <file category="header" name="CMSIS/NN/Include/arm_nn_types.h"/>
2796         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2797         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
2798         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
2799
2800         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2801         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2802         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2803         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
2804         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
2805         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
2806         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c"/>
2807         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2808         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.c"/>
2809         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2810         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2811         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
2812         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
2813         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
2814         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
2815         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
2816         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
2817         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2818         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2819         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
2820         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c"/>
2821         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2822         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2823         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
2824         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
2825         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2826         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
2827         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
2828         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
2829         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
2830         <file category="source" name="CMSIS/NN/Source/SVDFunctions/arm_svdf_s8.c"/>
2831         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
2832         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
2833         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2834         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
2835         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
2836         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
2837         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2838         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2839         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2840         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2841         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
2842         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
2843         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2844         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
2845         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c"/>
2846         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
2847         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
2848         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
2849         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.c"/>
2850         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
2851         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
2852         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2853         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c"/>
2854         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2855         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
2856         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
2857         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
2858         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
2859         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2860         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2861         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2862         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2863         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2864         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2865         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2866         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
2867         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
2868         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2869         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
2870       </files>
2871     </component>
2872
2873     <!-- CMSIS-RTOS Keil RTX component -->
2874     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2875       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2876       <RTE_Components_h>
2877         <!-- the following content goes into file 'RTE_Components.h' -->
2878         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2879         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2880       </RTE_Components_h>
2881       <files>
2882         <!-- CPU independent -->
2883         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2884         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2885         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2886
2887         <!-- RTX templates -->
2888         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2889         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2890         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2891         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2892         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2893         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2894         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2895         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2896         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2897         <!-- tool-chain specific template file -->
2898         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2899         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2900         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2901
2902         <!-- CPU and Compiler dependent -->
2903         <!-- ARMCC -->
2904         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2905         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2906         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2907         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2908         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2909         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2910         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2911         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2912         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2913         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2914         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2915         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2916         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2917         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2918         <!-- GCC -->
2919         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2920         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2921         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2922         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2923         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2924         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2925         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2926         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2927         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2928         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2929         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2930         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2931         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2932         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2933         <!-- IAR -->
2934         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2935         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2936         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2937         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2938         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2939         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2940         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2941         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2942         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2943         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2944         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2945         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2946         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2947         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2948       </files>
2949     </component>
2950     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2951     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
2952       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2953       <RTE_Components_h>
2954         <!-- the following content goes into file 'RTE_Components.h' -->
2955         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2956         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2957       </RTE_Components_h>
2958       <files>
2959         <!-- CPU independent -->
2960         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2961         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2962         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2963
2964         <!-- RTX templates -->
2965         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2966         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2967         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2968         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2969         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2970         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2971         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2972         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2973         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2974         <!-- tool-chain specific template file -->
2975         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2976         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2977         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2978
2979         <!-- CPU and Compiler dependent -->
2980         <!-- ARMCC -->
2981         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2982         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2983         <!-- GCC -->
2984         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2985         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2986         <!-- IAR -->
2987       </files>
2988     </component>
2989
2990     <!-- CMSIS-RTOS Keil RTX5 component -->
2991     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.3" Capiversion="1.0.0" condition="RTOS RTX5">
2992       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2993       <RTE_Components_h>
2994         <!-- the following content goes into file 'RTE_Components.h' -->
2995         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2996         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2997       </RTE_Components_h>
2998       <files>
2999         <!-- RTX header file -->
3000         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3001         <!-- RTX compatibility module for API V1 -->
3002         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3003       </files>
3004     </component>
3005
3006     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3007     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5">
3008       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
3009       <RTE_Components_h>
3010         <!-- the following content goes into file 'RTE_Components.h' -->
3011         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3012         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3013       </RTE_Components_h>
3014       <files>
3015         <!-- RTX documentation -->
3016         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3017
3018         <!-- RTX header files -->
3019         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3020
3021         <!-- RTX configuration -->
3022         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3023         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3024
3025         <!-- RTX templates -->
3026         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3027         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3028         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3029         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3030         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3031         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3032         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3033         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3034         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3035         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3036
3037         <!-- RTX library configuration -->
3038         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3039
3040         <!-- RTX libraries (CPU and Compiler dependent) -->
3041         <!-- ARMCC -->
3042         <file category="library" condition="CM0_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3043         <file category="library" condition="CM1_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3044         <file category="library" condition="CM3_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3045         <file category="library" condition="CM4_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3046         <file category="library" condition="CM4_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3047         <file category="library" condition="CM7_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3048         <file category="library" condition="CM7_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3049         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3050         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3051         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3052         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3053         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3054         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3055         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3056         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3057         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3058         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3059         <!-- GCC -->
3060         <file category="library" condition="CM0_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3061         <file category="library" condition="CM1_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3062         <file category="library" condition="CM3_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3063         <file category="library" condition="CM4_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3064         <file category="library" condition="CM4_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3065         <file category="library" condition="CM7_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3066         <file category="library" condition="CM7_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3067         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3068         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3069         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3070         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3071         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3072         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3073         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3074         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3075         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3076         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3077         <!-- IAR -->
3078         <file category="library" condition="CM0_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3079         <file category="library" condition="CM1_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3080         <file category="library" condition="CM3_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3081         <file category="library" condition="CM4_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3082         <file category="library" condition="CM4_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3083         <file category="library" condition="CM7_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3084         <file category="library" condition="CM7_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3085         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3086         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3087         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3088         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3089         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3090         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3091         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3092         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3093         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3094         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3095       </files>
3096     </component>
3097     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3098       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
3099       <RTE_Components_h>
3100         <!-- the following content goes into file 'RTE_Components.h' -->
3101         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3102         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3103         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3104       </RTE_Components_h>
3105       <files>
3106         <!-- RTX documentation -->
3107         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3108
3109         <!-- RTX header files -->
3110         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3111
3112         <!-- RTX configuration -->
3113         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3114         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3115
3116         <!-- RTX templates -->
3117         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3118         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3119         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3120         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3121         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3122         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3123         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3124         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3125         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3126         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3127
3128         <!-- RTX library configuration -->
3129         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3130
3131         <!-- RTX libraries (CPU and Compiler dependent) -->
3132         <!-- ARMCC -->
3133         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3134         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3135         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3136         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3137         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3138         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3139         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3140         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3141         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3142         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3143         <!-- GCC -->
3144         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3145         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3146         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3147         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3148         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3149         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3150         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3151         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3152         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3153         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3154         <!-- IAR -->
3155         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3156         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3157         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3158         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3159         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3160         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3161         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3162         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3163         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3164         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3165       </files>
3166     </component>
3167     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5">
3168       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
3169       <RTE_Components_h>
3170         <!-- the following content goes into file 'RTE_Components.h' -->
3171         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3172         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3173         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3174       </RTE_Components_h>
3175       <files>
3176         <!-- RTX documentation -->
3177         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3178
3179         <!-- RTX header files -->
3180         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3181
3182         <!-- RTX configuration -->
3183         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3184         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3185
3186         <!-- RTX templates -->
3187         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3188         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3189         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3190         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3191         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3192         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3193         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3194         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3195         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3196         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3197
3198         <!-- RTX sources (core) -->
3199         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3200         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3201         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3202         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3203         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3204         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3205         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3206         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3207         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3208         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3209         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3210         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3211         <!-- RTX sources (library configuration) -->
3212         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3213         <!-- RTX sources (handlers ARMCC) -->
3214         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="CM0_ARMCC5"/>
3215         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM0_ARMCC6"/>
3216         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="CM1_ARMCC5"/>
3217         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM1_ARMCC6"/>
3218         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM3_ARMCC5"/>
3219         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM3_ARMCC6"/>
3220         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM4_ARMCC5"/>
3221         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_ARMCC6"/>
3222         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM4_FP_ARMCC5"/>
3223         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_FP_ARMCC6"/>
3224         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM7_ARMCC5"/>
3225         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_ARMCC6"/>
3226         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM7_FP_ARMCC5"/>
3227         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_FP_ARMCC6"/>
3228         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_ARMCC"/>
3229         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_ARMCC"/>
3230         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_ARMCC"/>
3231         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_ARMCC"/>
3232         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_ARMCC"/>
3233         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3234         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3235         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3236         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_ARMCC"/>
3237         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_ARMCC"/>
3238         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_ARMCC"/>
3239         <!-- RTX sources (handlers GCC) -->
3240         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM0_GCC"/>
3241         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM1_GCC"/>
3242         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM3_GCC"/>
3243         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_GCC"/>
3244         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_FP_GCC"/>
3245         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_GCC"/>
3246         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_FP_GCC"/>
3247         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3248         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3249         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3250         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3251         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3252         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3253         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3254         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3255         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3256         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3257         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3258         <!-- RTX sources (handlers IAR) -->
3259         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="CM0_IAR"/>
3260         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="CM1_IAR"/>
3261         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM3_IAR"/>
3262         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM4_IAR"/>
3263         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM4_FP_IAR"/>
3264         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM7_IAR"/>
3265         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM7_FP_IAR"/>
3266         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3267         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3268         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3269         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3270         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3271         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3272         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3273         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3274         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3275         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3276         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3277         <!-- OS Tick (SysTick) -->
3278         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3279       </files>
3280     </component>
3281     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3282       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3283       <RTE_Components_h>
3284         <!-- the following content goes into file 'RTE_Components.h' -->
3285         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3286         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3287         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3288       </RTE_Components_h>
3289       <files>
3290         <!-- RTX documentation -->
3291         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3292
3293         <!-- RTX header files -->
3294         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3295
3296         <!-- RTX configuration -->
3297         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3298         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3299
3300         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3301
3302         <!-- RTX templates -->
3303         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3304         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3305         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3306         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3307         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3308         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3309         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3310         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3311         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3312         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3313
3314         <!-- RTX sources (core) -->
3315         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3316         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3317         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3318         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3319         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3320         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3321         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3322         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3323         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3324         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3325         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3326         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3327         <!-- RTX sources (library configuration) -->
3328         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3329         <!-- RTX sources (handlers ARMCC) -->
3330         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7a.s" condition="CA_ARMCC5"/>
3331         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="CA_ARMCC6"/>
3332         <!-- RTX sources (handlers GCC) -->
3333         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="CA_GCC"/>
3334         <!-- RTX sources (handlers IAR) -->
3335         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7a.s" condition="CA_IAR"/>
3336       </files>
3337     </component>
3338     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3339       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
3340       <RTE_Components_h>
3341         <!-- the following content goes into file 'RTE_Components.h' -->
3342         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3343         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3344         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3345         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3346       </RTE_Components_h>
3347       <files>
3348         <!-- RTX documentation -->
3349         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3350
3351         <!-- RTX header files -->
3352         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3353
3354         <!-- RTX configuration -->
3355         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3356         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3357
3358         <!-- RTX templates -->
3359         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3360         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3361         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3362         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3363         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3364         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3365         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3366         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3367         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3368         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3369
3370         <!-- RTX sources (core) -->
3371         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3372         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3373         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3374         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3375         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3376         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3377         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3378         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3379         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3380         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3381         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3382         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3383         <!-- RTX sources (library configuration) -->
3384         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3385         <!-- RTX sources (ARMCC handlers) -->
3386         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_ARMCC"/>
3387         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_ARMCC"/>
3388         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_ARMCC"/>
3389         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_ARMCC"/>
3390         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_ARMCC"/>
3391         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3392         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3393         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3394         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_ARMCC"/>
3395         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_ARMCC"/>
3396         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_ARMCC"/>
3397         <!-- RTX sources (GCC handlers) -->
3398         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3399         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3400         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3401         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3402         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3403         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3404         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3405         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3406         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3407         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3408         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3409         <!-- RTX sources (IAR handlers) -->
3410         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3411         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3412         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3413         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3414         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3415         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3416         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3417         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3418         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3419         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3420         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3421         <!-- OS Tick (SysTick) -->
3422         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3423       </files>
3424     </component>
3425
3426     <!-- CMSIS-Driver Custom components -->
3427     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3428       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3429       <files>
3430         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3431         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3432       </files>
3433     </component>
3434     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3435       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3436       <files>
3437         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3438         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3439       </files>
3440     </component>
3441     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3442       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3443       <files>
3444         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3445         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3446       </files>
3447     </component>
3448     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3449       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3450       <files>
3451         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3452         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3453       </files>
3454     </component>
3455     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3456       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3457       <files>
3458         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3459         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3460       </files>
3461     </component>
3462     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3463       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3464       <files>
3465         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3466         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3467       </files>
3468     </component>
3469     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3470       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3471       <files>
3472         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3473         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3474       </files>
3475     </component>
3476     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3477       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3478       <files>
3479         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3480         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
3481       </files>
3482     </component>
3483     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3484       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3485       <files>
3486         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3487         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3488         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3489         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3490       </files>
3491     </component>
3492     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3493       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3494       <files>
3495         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3496         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3497       </files>
3498     </component>
3499     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3500       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3501       <files>
3502         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3503         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3504       </files>
3505     </component>
3506     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3507       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3508       <files>
3509         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3510         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3511       </files>
3512     </component>
3513     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3514       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3515       <files>
3516         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3517         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3518       </files>
3519     </component>
3520     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3521       <description>Access to #include Driver_WiFi.h file</description>
3522       <files>
3523         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3524         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
3525       </files>
3526     </component>
3527
3528     <!-- VIO components -->
3529     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
3530       <description>Virtual I/O custom implementation template</description>
3531       <files>
3532         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
3533       </files>
3534     </component>
3535     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
3536       <description>Virtual I/O implementation using memory only</description>
3537       <files>
3538         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
3539       </files>
3540     </component>
3541
3542   </components>
3543
3544   <boards>
3545     <board name="uVision Simulator" vendor="Keil">
3546       <description>uVision Simulator</description>
3547       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3548       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3549       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3550       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3551       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3552       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3553       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3554       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3555       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3556       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3557       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3558       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3559       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3560       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3561       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
3562       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3563       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3564       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3565       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3566       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3567       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3568       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3569       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3570       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3571       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3572       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
3573     </board>
3574
3575     <board name="EWARM Simulator" vendor="IAR">
3576       <description>EWARM Simulator</description>
3577       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3578       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3579       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3580       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3581       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3582       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3583       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3584       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3585       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3586       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3587       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3588       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3589       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3590       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3591       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
3592       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3593       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3594       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3595       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3596       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3597       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3598       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3599       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3600       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3601       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3602       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
3603     </board>
3604   </boards>
3605
3606   <examples>
3607     <example name="DSP_Lib Bayes example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_bayes_example">
3608       <description>DSP_Lib Bayes example</description>
3609       <board name="uVision Simulator" vendor="Keil"/>
3610       <project>
3611         <environment name="uv" load="arm_bayes_example.uvprojx"/>
3612       </project>
3613       <attributes>
3614         <component Cclass="CMSIS" Cgroup="CORE"/>
3615         <component Cclass="CMSIS" Cgroup="DSP"/>
3616         <component Cclass="Device" Cgroup="Startup"/>
3617         <category>Getting Started</category>
3618       </attributes>
3619     </example>
3620
3621     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3622       <description>DSP_Lib Class Marks example</description>
3623       <board name="uVision Simulator" vendor="Keil"/>
3624       <project>
3625         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3626       </project>
3627       <attributes>
3628         <component Cclass="CMSIS" Cgroup="CORE"/>
3629         <component Cclass="CMSIS" Cgroup="DSP"/>
3630         <component Cclass="Device" Cgroup="Startup"/>
3631         <category>Getting Started</category>
3632       </attributes>
3633     </example>
3634
3635     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3636       <description>DSP_Lib Convolution example</description>
3637       <board name="uVision Simulator" vendor="Keil"/>
3638       <project>
3639         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3640       </project>
3641       <attributes>
3642         <component Cclass="CMSIS" Cgroup="CORE"/>
3643         <component Cclass="CMSIS" Cgroup="DSP"/>
3644         <component Cclass="Device" Cgroup="Startup"/>
3645         <category>Getting Started</category>
3646       </attributes>
3647     </example>
3648
3649     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3650       <description>DSP_Lib Dotproduct example</description>
3651       <board name="uVision Simulator" vendor="Keil"/>
3652       <project>
3653         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3654       </project>
3655       <attributes>
3656         <component Cclass="CMSIS" Cgroup="CORE"/>
3657         <component Cclass="CMSIS" Cgroup="DSP"/>
3658         <component Cclass="Device" Cgroup="Startup"/>
3659         <category>Getting Started</category>
3660       </attributes>
3661     </example>
3662
3663     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3664       <description>DSP_Lib FFT Bin example</description>
3665       <board name="uVision Simulator" vendor="Keil"/>
3666       <project>
3667         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3668       </project>
3669       <attributes>
3670         <component Cclass="CMSIS" Cgroup="CORE"/>
3671         <component Cclass="CMSIS" Cgroup="DSP"/>
3672         <component Cclass="Device" Cgroup="Startup"/>
3673         <category>Getting Started</category>
3674       </attributes>
3675     </example>
3676
3677     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3678       <description>DSP_Lib FIR example</description>
3679       <board name="uVision Simulator" vendor="Keil"/>
3680       <project>
3681         <environment name="uv" load="arm_fir_example.uvprojx"/>
3682       </project>
3683       <attributes>
3684         <component Cclass="CMSIS" Cgroup="CORE"/>
3685         <component Cclass="CMSIS" Cgroup="DSP"/>
3686         <component Cclass="Device" Cgroup="Startup"/>
3687         <category>Getting Started</category>
3688       </attributes>
3689     </example>
3690
3691     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3692       <description>DSP_Lib Graphic Equalizer example</description>
3693       <board name="uVision Simulator" vendor="Keil"/>
3694       <project>
3695         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3696       </project>
3697       <attributes>
3698         <component Cclass="CMSIS" Cgroup="CORE"/>
3699         <component Cclass="CMSIS" Cgroup="DSP"/>
3700         <component Cclass="Device" Cgroup="Startup"/>
3701         <category>Getting Started</category>
3702       </attributes>
3703     </example>
3704
3705     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3706       <description>DSP_Lib Linear Interpolation example</description>
3707       <board name="uVision Simulator" vendor="Keil"/>
3708       <project>
3709         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3710       </project>
3711       <attributes>
3712         <component Cclass="CMSIS" Cgroup="CORE"/>
3713         <component Cclass="CMSIS" Cgroup="DSP"/>
3714         <component Cclass="Device" Cgroup="Startup"/>
3715         <category>Getting Started</category>
3716       </attributes>
3717     </example>
3718
3719     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3720       <description>DSP_Lib Matrix example</description>
3721       <board name="uVision Simulator" vendor="Keil"/>
3722       <project>
3723         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3724       </project>
3725       <attributes>
3726         <component Cclass="CMSIS" Cgroup="CORE"/>
3727         <component Cclass="CMSIS" Cgroup="DSP"/>
3728         <component Cclass="Device" Cgroup="Startup"/>
3729         <category>Getting Started</category>
3730       </attributes>
3731     </example>
3732
3733     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3734       <description>DSP_Lib Signal Convergence example</description>
3735       <board name="uVision Simulator" vendor="Keil"/>
3736       <project>
3737         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3738       </project>
3739       <attributes>
3740         <component Cclass="CMSIS" Cgroup="CORE"/>
3741         <component Cclass="CMSIS" Cgroup="DSP"/>
3742         <component Cclass="Device" Cgroup="Startup"/>
3743         <category>Getting Started</category>
3744       </attributes>
3745     </example>
3746
3747     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3748       <description>DSP_Lib Sinus/Cosinus example</description>
3749       <board name="uVision Simulator" vendor="Keil"/>
3750       <project>
3751         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3752       </project>
3753       <attributes>
3754         <component Cclass="CMSIS" Cgroup="CORE"/>
3755         <component Cclass="CMSIS" Cgroup="DSP"/>
3756         <component Cclass="Device" Cgroup="Startup"/>
3757         <category>Getting Started</category>
3758       </attributes>
3759     </example>
3760
3761     <example name="DSP_Lib SVM example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_svm_example">
3762       <description>DSP_Lib SVM example</description>
3763       <board name="uVision Simulator" vendor="Keil"/>
3764       <project>
3765         <environment name="uv" load="arm_svm_example.uvprojx"/>
3766       </project>
3767       <attributes>
3768         <component Cclass="CMSIS" Cgroup="CORE"/>
3769         <component Cclass="CMSIS" Cgroup="DSP"/>
3770         <component Cclass="Device" Cgroup="Startup"/>
3771         <category>Getting Started</category>
3772       </attributes>
3773     </example>
3774
3775     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3776       <description>DSP_Lib Variance example</description>
3777       <board name="uVision Simulator" vendor="Keil"/>
3778       <project>
3779         <environment name="uv" load="arm_variance_example.uvprojx"/>
3780       </project>
3781       <attributes>
3782         <component Cclass="CMSIS" Cgroup="CORE"/>
3783         <component Cclass="CMSIS" Cgroup="DSP"/>
3784         <component Cclass="Device" Cgroup="Startup"/>
3785         <category>Getting Started</category>
3786       </attributes>
3787     </example>
3788
3789     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3790       <description>CMSIS-RTOS2 Blinky example</description>
3791       <board name="uVision Simulator" vendor="Keil"/>
3792       <project>
3793         <environment name="uv" load="Blinky.uvprojx"/>
3794       </project>
3795       <attributes>
3796         <component Cclass="CMSIS" Cgroup="CORE"/>
3797         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3798         <component Cclass="Device" Cgroup="Startup"/>
3799         <category>Getting Started</category>
3800       </attributes>
3801     </example>
3802
3803     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3804       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3805       <board name="uVision Simulator" vendor="Keil"/>
3806       <project>
3807         <environment name="uv" load="Blinky.uvprojx"/>
3808       </project>
3809       <attributes>
3810         <component Cclass="CMSIS" Cgroup="CORE"/>
3811         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3812         <component Cclass="Device" Cgroup="Startup"/>
3813         <category>Getting Started</category>
3814       </attributes>
3815     </example>
3816
3817     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3818       <description>CMSIS-RTOS2 Message Queue Example</description>
3819       <board name="uVision Simulator" vendor="Keil"/>
3820       <project>
3821         <environment name="uv" load="MsqQueue.uvprojx"/>
3822       </project>
3823       <attributes>
3824         <component Cclass="CMSIS" Cgroup="CORE"/>
3825         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3826         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3827         <component Cclass="Device" Cgroup="Startup"/>
3828         <category>Getting Started</category>
3829       </attributes>
3830     </example>
3831
3832     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3833       <description>CMSIS-RTOS2 Memory Pool Example</description>
3834       <board name="uVision Simulator" vendor="Keil"/>
3835       <project>
3836         <environment name="uv" load="MemPool.uvprojx"/>
3837       </project>
3838       <attributes>
3839         <component Cclass="CMSIS" Cgroup="CORE"/>
3840         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3841         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3842         <component Cclass="Device" Cgroup="Startup"/>
3843         <category>Getting Started</category>
3844       </attributes>
3845     </example>
3846
3847     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3848       <description>Bare-metal secure/non-secure example without RTOS</description>
3849       <board name="uVision Simulator" vendor="Keil"/>
3850       <project>
3851         <environment name="uv" load="NoRTOS.uvmpw"/>
3852       </project>
3853       <attributes>
3854         <component Cclass="CMSIS" Cgroup="CORE"/>
3855         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3856         <component Cclass="Device" Cgroup="Startup"/>
3857         <category>Getting Started</category>
3858       </attributes>
3859     </example>
3860
3861     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3862       <description>Secure/non-secure RTOS example with thread context management</description>
3863       <board name="uVision Simulator" vendor="Keil"/>
3864       <project>
3865         <environment name="uv" load="RTOS.uvmpw"/>
3866       </project>
3867       <attributes>
3868         <component Cclass="CMSIS" Cgroup="CORE"/>
3869         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3870         <component Cclass="Device" Cgroup="Startup"/>
3871         <category>Getting Started</category>
3872       </attributes>
3873     </example>
3874
3875     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3876       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3877       <board name="uVision Simulator" vendor="Keil"/>
3878       <project>
3879         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3880       </project>
3881       <attributes>
3882         <component Cclass="CMSIS" Cgroup="CORE"/>
3883         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3884         <component Cclass="Device" Cgroup="Startup"/>
3885         <category>Getting Started</category>
3886       </attributes>
3887     </example>
3888
3889     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
3890       <description>CMSIS-RTOS2 Blinky example</description>
3891       <board name="EWARM Simulator" vendor="IAR"/>
3892       <project>
3893         <environment name="iar" load="Blinky/Blinky.ewp"/>
3894       </project>
3895       <attributes>
3896         <component Cclass="CMSIS" Cgroup="CORE"/>
3897         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3898         <component Cclass="Device" Cgroup="Startup"/>
3899         <category>Getting Started</category>
3900       </attributes>
3901     </example>
3902
3903     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
3904       <description>CMSIS-RTOS2 Message Queue Example</description>
3905       <board name="EWARM Simulator" vendor="IAR"/>
3906       <project>
3907         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
3908       </project>
3909       <attributes>
3910         <component Cclass="CMSIS" Cgroup="CORE"/>
3911         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3912         <component Cclass="Device" Cgroup="Startup"/>
3913         <category>Getting Started</category>
3914       </attributes>
3915     </example>
3916
3917   </examples>
3918
3919 </package>