begriffs open source - cmsis/blob - dev/v6.0.0-dev35/Core/html/group__intrinsic__CPU__gr.html

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  59           <span id="MSearchSelect"                onmouseover="return searchBox.OnSearchSelectShow()"                onmouseout="return searchBox.OnSearchSelectHide()">&#160;</span>
  60           <input type="text" id="MSearchField" value="" placeholder="Search" accesskey="S"
  61                onfocus="searchBox.OnSearchFieldFocus(true)"
  62                onblur="searchBox.OnSearchFieldFocus(false)"
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 110      onmouseover="return searchBox.OnSearchSelectShow()"
 111      onmouseout="return searchBox.OnSearchSelectHide()"
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 113 </div>
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 116 <div id="MSearchResultsWindow">
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 118 <div class="SRPage">
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 121 <div class="SRStatus" id="Loading">Loading...</div>
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 123 <div class="SRStatus" id="NoMatches">No Matches</div>
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 130   <div class="summary">
 131 <a href="#func-members">Functions</a>  </div>
 132   <div class="headertitle"><div class="title">Intrinsic Functions for CPU Instructions</div></div>
 133 </div><!--header-->
 134 <div class="contents">
 135
 136 <p>Functions that generate specific Cortex-M CPU Instructions.
 137 <a href="#details">More...</a></p>
 138 <table class="memberdecls">
 139 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
 140 Functions</h2></td></tr>
 141 <tr class="memitem:gac71fad9f0a91980fecafcb450ee0a63e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gac71fad9f0a91980fecafcb450ee0a63e">__NOP</a> (void)</td></tr>
 142 <tr class="memdesc:gac71fad9f0a91980fecafcb450ee0a63e"><td class="mdescLeft">&#160;</td><td class="mdescRight">No Operation.  <br /></td></tr>
 143 <tr class="separator:gac71fad9f0a91980fecafcb450ee0a63e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 144 <tr class="memitem:gaed91dfbf3d7d7b7fba8d912fcbeaad88"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gaed91dfbf3d7d7b7fba8d912fcbeaad88">__WFI</a> (void)</td></tr>
 145 <tr class="memdesc:gaed91dfbf3d7d7b7fba8d912fcbeaad88"><td class="mdescLeft">&#160;</td><td class="mdescRight">Wait For Interrupt.  <br /></td></tr>
 146 <tr class="separator:gaed91dfbf3d7d7b7fba8d912fcbeaad88"><td class="memSeparator" colspan="2">&#160;</td></tr>
 147 <tr class="memitem:gad3efec76c3bfa2b8528ded530386c563"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gad3efec76c3bfa2b8528ded530386c563">__WFE</a> (void)</td></tr>
 148 <tr class="memdesc:gad3efec76c3bfa2b8528ded530386c563"><td class="mdescLeft">&#160;</td><td class="mdescRight">Wait For Event.  <br /></td></tr>
 149 <tr class="separator:gad3efec76c3bfa2b8528ded530386c563"><td class="memSeparator" colspan="2">&#160;</td></tr>
 150 <tr class="memitem:ga3c34da7eb16496ae2668a5b95fa441e7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga3c34da7eb16496ae2668a5b95fa441e7">__SEV</a> (void)</td></tr>
 151 <tr class="memdesc:ga3c34da7eb16496ae2668a5b95fa441e7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send Event.  <br /></td></tr>
 152 <tr class="separator:ga3c34da7eb16496ae2668a5b95fa441e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
 153 <tr class="memitem:ga92f5621626711931da71eaa8bf301af7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga92f5621626711931da71eaa8bf301af7">__BKPT</a> (uint8_t value)</td></tr>
 154 <tr class="memdesc:ga92f5621626711931da71eaa8bf301af7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Breakpoint.  <br /></td></tr>
 155 <tr class="separator:ga92f5621626711931da71eaa8bf301af7"><td class="memSeparator" colspan="2">&#160;</td></tr>
 156 <tr class="memitem:ga93c09b4709394d81977300d5f84950e5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga93c09b4709394d81977300d5f84950e5">__ISB</a> (void)</td></tr>
 157 <tr class="memdesc:ga93c09b4709394d81977300d5f84950e5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Instruction Synchronization Barrier.  <br /></td></tr>
 158 <tr class="separator:ga93c09b4709394d81977300d5f84950e5"><td class="memSeparator" colspan="2">&#160;</td></tr>
 159 <tr class="memitem:gacb2a8ca6eae1ba4b31161578b720c199"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gacb2a8ca6eae1ba4b31161578b720c199">__DSB</a> (void)</td></tr>
 160 <tr class="memdesc:gacb2a8ca6eae1ba4b31161578b720c199"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Synchronization Barrier.  <br /></td></tr>
 161 <tr class="separator:gacb2a8ca6eae1ba4b31161578b720c199"><td class="memSeparator" colspan="2">&#160;</td></tr>
 162 <tr class="memitem:gab1c9b393641dc2d397b3408fdbe72b96"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gab1c9b393641dc2d397b3408fdbe72b96">__DMB</a> (void)</td></tr>
 163 <tr class="memdesc:gab1c9b393641dc2d397b3408fdbe72b96"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Memory Barrier.  <br /></td></tr>
 164 <tr class="separator:gab1c9b393641dc2d397b3408fdbe72b96"><td class="memSeparator" colspan="2">&#160;</td></tr>
 165 <tr class="memitem:ga4717abc17af5ba29b1e4c055e0a0d9b8"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga4717abc17af5ba29b1e4c055e0a0d9b8">__REV</a> (uint32_t value)</td></tr>
 166 <tr class="memdesc:ga4717abc17af5ba29b1e4c055e0a0d9b8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reverse byte order (32 bit)  <br /></td></tr>
 167 <tr class="separator:ga4717abc17af5ba29b1e4c055e0a0d9b8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 168 <tr class="memitem:gaeef6f853b6df3a365c838ee5b49a7a26"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gaeef6f853b6df3a365c838ee5b49a7a26">__REV16</a> (uint32_t value)</td></tr>
 169 <tr class="memdesc:gaeef6f853b6df3a365c838ee5b49a7a26"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reverse byte order (16 bit)  <br /></td></tr>
 170 <tr class="separator:gaeef6f853b6df3a365c838ee5b49a7a26"><td class="memSeparator" colspan="2">&#160;</td></tr>
 171 <tr class="memitem:ga211618c03a0bf3264a7b22ad626d4f0a"><td class="memItemLeft" align="right" valign="top">int16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga211618c03a0bf3264a7b22ad626d4f0a">__REVSH</a> (int16_t value)</td></tr>
 172 <tr class="memdesc:ga211618c03a0bf3264a7b22ad626d4f0a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reverse byte order (16 bit)  <br /></td></tr>
 173 <tr class="separator:ga211618c03a0bf3264a7b22ad626d4f0a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 174 <tr class="memitem:gad6f9f297f6b91a995ee199fbc796b863"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gad6f9f297f6b91a995ee199fbc796b863">__RBIT</a> (uint32_t value)</td></tr>
 175 <tr class="memdesc:gad6f9f297f6b91a995ee199fbc796b863"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reverse bit order of value.  <br /></td></tr>
 176 <tr class="separator:gad6f9f297f6b91a995ee199fbc796b863"><td class="memSeparator" colspan="2">&#160;</td></tr>
 177 <tr class="memitem:gaf66beb577bb9d90424c3d1d7f684c024"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gaf66beb577bb9d90424c3d1d7f684c024">__ROR</a> (uint32_t value, uint32_t shift)</td></tr>
 178 <tr class="memdesc:gaf66beb577bb9d90424c3d1d7f684c024"><td class="mdescLeft">&#160;</td><td class="mdescRight">Rotate a value right by a number of bits.  <br /></td></tr>
 179 <tr class="separator:gaf66beb577bb9d90424c3d1d7f684c024"><td class="memSeparator" colspan="2">&#160;</td></tr>
 180 <tr class="memitem:ga9e3ac13d8dcf4331176b624cf6234a7e"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga9e3ac13d8dcf4331176b624cf6234a7e">__LDREXB</a> (volatile uint8_t *addr)</td></tr>
 181 <tr class="memdesc:ga9e3ac13d8dcf4331176b624cf6234a7e"><td class="mdescLeft">&#160;</td><td class="mdescRight">LDR Exclusive (8 bit) [not for Cortex-M0, Cortex-M0+, or SC000].  <br /></td></tr>
 182 <tr class="separator:ga9e3ac13d8dcf4331176b624cf6234a7e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 183 <tr class="memitem:ga9feffc093d6f68b120d592a7a0d45a15"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga9feffc093d6f68b120d592a7a0d45a15">__LDREXH</a> (volatile uint16_t *addr)</td></tr>
 184 <tr class="memdesc:ga9feffc093d6f68b120d592a7a0d45a15"><td class="mdescLeft">&#160;</td><td class="mdescRight">LDR Exclusive (16 bit) [not for Cortex-M0, Cortex-M0+, or SC000].  <br /></td></tr>
 185 <tr class="separator:ga9feffc093d6f68b120d592a7a0d45a15"><td class="memSeparator" colspan="2">&#160;</td></tr>
 186 <tr class="memitem:gabd78840a0f2464905b7cec791ebc6a4c"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gabd78840a0f2464905b7cec791ebc6a4c">__LDREXW</a> (volatile uint32_t *addr)</td></tr>
 187 <tr class="memdesc:gabd78840a0f2464905b7cec791ebc6a4c"><td class="mdescLeft">&#160;</td><td class="mdescRight">LDR Exclusive (32 bit) [not for Cortex-M0, Cortex-M0+, or SC000].  <br /></td></tr>
 188 <tr class="separator:gabd78840a0f2464905b7cec791ebc6a4c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 189 <tr class="memitem:gaab6482d1f59f59e2b6b7efc1af391c99"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gaab6482d1f59f59e2b6b7efc1af391c99">__STREXB</a> (uint8_t value, volatile uint8_t *addr)</td></tr>
 190 <tr class="memdesc:gaab6482d1f59f59e2b6b7efc1af391c99"><td class="mdescLeft">&#160;</td><td class="mdescRight">STR Exclusive (8 bit) [not for Cortex-M0, Cortex-M0+, or SC000].  <br /></td></tr>
 191 <tr class="separator:gaab6482d1f59f59e2b6b7efc1af391c99"><td class="memSeparator" colspan="2">&#160;</td></tr>
 192 <tr class="memitem:ga0a354bdf71caa52f081a4a54e84c8d2a"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga0a354bdf71caa52f081a4a54e84c8d2a">__STREXH</a> (uint16_t value, volatile uint16_t *addr)</td></tr>
 193 <tr class="memdesc:ga0a354bdf71caa52f081a4a54e84c8d2a"><td class="mdescLeft">&#160;</td><td class="mdescRight">STR Exclusive (16 bit) [not for Cortex-M0, Cortex-M0+, or SC000].  <br /></td></tr>
 194 <tr class="separator:ga0a354bdf71caa52f081a4a54e84c8d2a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 195 <tr class="memitem:ga335deaaa7991490e1450cb7d1e4c5197"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga335deaaa7991490e1450cb7d1e4c5197">__STREXW</a> (uint32_t value, volatile uint32_t *addr)</td></tr>
 196 <tr class="memdesc:ga335deaaa7991490e1450cb7d1e4c5197"><td class="mdescLeft">&#160;</td><td class="mdescRight">STR Exclusive (32 bit) [not for Cortex-M0, Cortex-M0+, or SC000].  <br /></td></tr>
 197 <tr class="separator:ga335deaaa7991490e1450cb7d1e4c5197"><td class="memSeparator" colspan="2">&#160;</td></tr>
 198 <tr class="memitem:ga354c5ac8870cc3dfb823367af9c4b412"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga354c5ac8870cc3dfb823367af9c4b412">__CLREX</a> (void)</td></tr>
 199 <tr class="memdesc:ga354c5ac8870cc3dfb823367af9c4b412"><td class="mdescLeft">&#160;</td><td class="mdescRight">Remove the exclusive lock [not for Cortex-M0, Cortex-M0+, or SC000].  <br /></td></tr>
 200 <tr class="separator:ga354c5ac8870cc3dfb823367af9c4b412"><td class="memSeparator" colspan="2">&#160;</td></tr>
 201 <tr class="memitem:ga8cfeb5ffe0e49ec6b29dafdde92e5118"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga8cfeb5ffe0e49ec6b29dafdde92e5118">__SSAT</a> (int32_t value, uint32_t sat)</td></tr>
 202 <tr class="memdesc:ga8cfeb5ffe0e49ec6b29dafdde92e5118"><td class="mdescLeft">&#160;</td><td class="mdescRight">Signed Saturate.  <br /></td></tr>
 203 <tr class="separator:ga8cfeb5ffe0e49ec6b29dafdde92e5118"><td class="memSeparator" colspan="2">&#160;</td></tr>
 204 <tr class="memitem:ga9ba87371aebd17dd6244ed3458b29b5d"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga9ba87371aebd17dd6244ed3458b29b5d">__USAT</a> (int32_t value, uint32_t sat)</td></tr>
 205 <tr class="memdesc:ga9ba87371aebd17dd6244ed3458b29b5d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Unsigned Saturate.  <br /></td></tr>
 206 <tr class="separator:ga9ba87371aebd17dd6244ed3458b29b5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 207 <tr class="memitem:ga90884c591ac5d73d6069334eba9d6c02"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga90884c591ac5d73d6069334eba9d6c02">__CLZ</a> (uint32_t value)</td></tr>
 208 <tr class="memdesc:ga90884c591ac5d73d6069334eba9d6c02"><td class="mdescLeft">&#160;</td><td class="mdescRight">Count leading zeros.  <br /></td></tr>
 209 <tr class="separator:ga90884c591ac5d73d6069334eba9d6c02"><td class="memSeparator" colspan="2">&#160;</td></tr>
 210 <tr class="memitem:gac09134f1bf9c49db07282001afcc9380"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gac09134f1bf9c49db07282001afcc9380">__RRX</a> (uint32_t value)</td></tr>
 211 <tr class="memdesc:gac09134f1bf9c49db07282001afcc9380"><td class="mdescLeft">&#160;</td><td class="mdescRight">Rotate Right with Extend (32 bit)  <br /></td></tr>
 212 <tr class="separator:gac09134f1bf9c49db07282001afcc9380"><td class="memSeparator" colspan="2">&#160;</td></tr>
 213 <tr class="memitem:ga9464d75db32846aa8295c3c3adfacb41"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga9464d75db32846aa8295c3c3adfacb41">__LDRBT</a> (uint8_t ptr)</td></tr>
 214 <tr class="memdesc:ga9464d75db32846aa8295c3c3adfacb41"><td class="mdescLeft">&#160;</td><td class="mdescRight">LDRT Unprivileged (8 bit)  <br /></td></tr>
 215 <tr class="separator:ga9464d75db32846aa8295c3c3adfacb41"><td class="memSeparator" colspan="2">&#160;</td></tr>
 216 <tr class="memitem:gaa762b8bc5634ce38cb14d62a6b2aee32"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gaa762b8bc5634ce38cb14d62a6b2aee32">__LDRHT</a> (uint16_t ptr)</td></tr>
 217 <tr class="memdesc:gaa762b8bc5634ce38cb14d62a6b2aee32"><td class="mdescLeft">&#160;</td><td class="mdescRight">LDRT Unprivileged (16 bit)  <br /></td></tr>
 218 <tr class="separator:gaa762b8bc5634ce38cb14d62a6b2aee32"><td class="memSeparator" colspan="2">&#160;</td></tr>
 219 <tr class="memitem:ga616504f5da979ba8a073d428d6e8d5c7"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga616504f5da979ba8a073d428d6e8d5c7">__LDRT</a> (uint32_t ptr)</td></tr>
 220 <tr class="memdesc:ga616504f5da979ba8a073d428d6e8d5c7"><td class="mdescLeft">&#160;</td><td class="mdescRight">LDRT Unprivileged (32 bit)  <br /></td></tr>
 221 <tr class="separator:ga616504f5da979ba8a073d428d6e8d5c7"><td class="memSeparator" colspan="2">&#160;</td></tr>
 222 <tr class="memitem:gad41aa59c92c0a165b7f98428d3320cd5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gad41aa59c92c0a165b7f98428d3320cd5">__STRBT</a> (uint8_t value, uint8_t ptr)</td></tr>
 223 <tr class="memdesc:gad41aa59c92c0a165b7f98428d3320cd5"><td class="mdescLeft">&#160;</td><td class="mdescRight">STRT Unprivileged (8 bit)  <br /></td></tr>
 224 <tr class="separator:gad41aa59c92c0a165b7f98428d3320cd5"><td class="memSeparator" colspan="2">&#160;</td></tr>
 225 <tr class="memitem:ga2b5d93b8e461755b1072a03df3f1722e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga2b5d93b8e461755b1072a03df3f1722e">__STRHT</a> (uint16_t value, uint16_t ptr)</td></tr>
 226 <tr class="memdesc:ga2b5d93b8e461755b1072a03df3f1722e"><td class="mdescLeft">&#160;</td><td class="mdescRight">STRT Unprivileged (16 bit)  <br /></td></tr>
 227 <tr class="separator:ga2b5d93b8e461755b1072a03df3f1722e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 228 <tr class="memitem:ga625bc4ac0b1d50de9bcd13d9f050030e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga625bc4ac0b1d50de9bcd13d9f050030e">__STRT</a> (uint32_t value, uint32_t ptr)</td></tr>
 229 <tr class="memdesc:ga625bc4ac0b1d50de9bcd13d9f050030e"><td class="mdescLeft">&#160;</td><td class="mdescRight">STRT Unprivileged (32 bit)  <br /></td></tr>
 230 <tr class="separator:ga625bc4ac0b1d50de9bcd13d9f050030e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 231 <tr class="memitem:ga263b9b2d9c06d731022873acddb6aa3f"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga263b9b2d9c06d731022873acddb6aa3f">__LDAB</a> (volatile uint8_t *ptr)</td></tr>
 232 <tr class="memdesc:ga263b9b2d9c06d731022873acddb6aa3f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Load-Acquire (8 bit)  <br /></td></tr>
 233 <tr class="separator:ga263b9b2d9c06d731022873acddb6aa3f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 234 <tr class="memitem:ga5810ac0b87a37e321c2f909cd3860499"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga5810ac0b87a37e321c2f909cd3860499">__LDAH</a> (volatile uint16_t *ptr)</td></tr>
 235 <tr class="memdesc:ga5810ac0b87a37e321c2f909cd3860499"><td class="mdescLeft">&#160;</td><td class="mdescRight">Load-Acquire (16 bit)  <br /></td></tr>
 236 <tr class="separator:ga5810ac0b87a37e321c2f909cd3860499"><td class="memSeparator" colspan="2">&#160;</td></tr>
 237 <tr class="memitem:ga22a24f416b65c2f5a82d9f1162d9394d"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga22a24f416b65c2f5a82d9f1162d9394d">__LDA</a> (volatile uint32_t *ptr)</td></tr>
 238 <tr class="memdesc:ga22a24f416b65c2f5a82d9f1162d9394d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Load-Acquire (32 bit)  <br /></td></tr>
 239 <tr class="separator:ga22a24f416b65c2f5a82d9f1162d9394d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 240 <tr class="memitem:gace025d3a1f85d2ab9bae7288838d6bc8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gace025d3a1f85d2ab9bae7288838d6bc8">__STLB</a> (uint8_t value, volatile uint8_t *ptr)</td></tr>
 241 <tr class="memdesc:gace025d3a1f85d2ab9bae7288838d6bc8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Store-Release (8 bit)  <br /></td></tr>
 242 <tr class="separator:gace025d3a1f85d2ab9bae7288838d6bc8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 243 <tr class="memitem:ga25691650de536f9b248b15f6dc4a3e70"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga25691650de536f9b248b15f6dc4a3e70">__STLH</a> (uint16_t value, volatile uint16_t *ptr)</td></tr>
 244 <tr class="memdesc:ga25691650de536f9b248b15f6dc4a3e70"><td class="mdescLeft">&#160;</td><td class="mdescRight">Store-Release (16 bit)  <br /></td></tr>
 245 <tr class="separator:ga25691650de536f9b248b15f6dc4a3e70"><td class="memSeparator" colspan="2">&#160;</td></tr>
 246 <tr class="memitem:ga5429d7083fb8d30c43cecd3a861e1672"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga5429d7083fb8d30c43cecd3a861e1672">__STL</a> (uint32_t value, volatile uint32_t *ptr)</td></tr>
 247 <tr class="memdesc:ga5429d7083fb8d30c43cecd3a861e1672"><td class="mdescLeft">&#160;</td><td class="mdescRight">Store-Release (32 bit)  <br /></td></tr>
 248 <tr class="separator:ga5429d7083fb8d30c43cecd3a861e1672"><td class="memSeparator" colspan="2">&#160;</td></tr>
 249 <tr class="memitem:ga513beada40cdd7123281f22482603bcc"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga513beada40cdd7123281f22482603bcc">__LDAEXB</a> (volatile uint32_t *ptr)</td></tr>
 250 <tr class="memdesc:ga513beada40cdd7123281f22482603bcc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Load-Acquire Exclusive (8 bit)  <br /></td></tr>
 251 <tr class="separator:ga513beada40cdd7123281f22482603bcc"><td class="memSeparator" colspan="2">&#160;</td></tr>
 252 <tr class="memitem:ga426b61640fc68f21b21ae4dc2726f3b4"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga426b61640fc68f21b21ae4dc2726f3b4">__LDAEXH</a> (volatile uint32_t *ptr)</td></tr>
 253 <tr class="memdesc:ga426b61640fc68f21b21ae4dc2726f3b4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Load-Acquire Exclusive (16 bit)  <br /></td></tr>
 254 <tr class="separator:ga426b61640fc68f21b21ae4dc2726f3b4"><td class="memSeparator" colspan="2">&#160;</td></tr>
 255 <tr class="memitem:ga3c74d923529f664eda099d1b2668b3c1"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga3c74d923529f664eda099d1b2668b3c1">__LDAEX</a> (volatile uint32_t *ptr)</td></tr>
 256 <tr class="memdesc:ga3c74d923529f664eda099d1b2668b3c1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Load-Acquire Exclusive (32 bit)  <br /></td></tr>
 257 <tr class="separator:ga3c74d923529f664eda099d1b2668b3c1"><td class="memSeparator" colspan="2">&#160;</td></tr>
 258 <tr class="memitem:ga590724a32a229978536fbbbd6cc82536"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga590724a32a229978536fbbbd6cc82536">__STLEXB</a> (uint8_t value, volatile uint8_t *ptr)</td></tr>
 259 <tr class="memdesc:ga590724a32a229978536fbbbd6cc82536"><td class="mdescLeft">&#160;</td><td class="mdescRight">Store-Release Exclusive (8 bit)  <br /></td></tr>
 260 <tr class="separator:ga590724a32a229978536fbbbd6cc82536"><td class="memSeparator" colspan="2">&#160;</td></tr>
 261 <tr class="memitem:ga047c3bebca3d0ae348ab8370a046301d"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga047c3bebca3d0ae348ab8370a046301d">__STLEXH</a> (uint16_t value, volatile uint16_t *ptr)</td></tr>
 262 <tr class="memdesc:ga047c3bebca3d0ae348ab8370a046301d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Store-Release Exclusive (16 bit)  <br /></td></tr>
 263 <tr class="separator:ga047c3bebca3d0ae348ab8370a046301d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 264 <tr class="memitem:gae7f955b91595cfd82a03e4b437c59afe"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gae7f955b91595cfd82a03e4b437c59afe">__STLEX</a> (uint32_t value, volatile uint32_t *ptr)</td></tr>
 265 <tr class="memdesc:gae7f955b91595cfd82a03e4b437c59afe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Store-Release Exclusive (32 bit)  <br /></td></tr>
 266 <tr class="separator:gae7f955b91595cfd82a03e4b437c59afe"><td class="memSeparator" colspan="2">&#160;</td></tr>
 267 </table>
 268 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 269 <p>Functions that generate specific Cortex-M CPU Instructions. </p>
 270 <p>The following functions generate specific Cortex-M instructions that cannot be directly accessed by the C/C++ Compiler. Refer to the <a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> for detailed information about these Cortex-M instructions.</p>
 271 <dl class="section note"><dt>Note</dt><dd>When using the <b>Arm Compiler Version 5 Toolchain</b> the following <a class="el" href="group__intrinsic__CPU__gr.html">Intrinsic Functions for CPU Instructions</a> are implemented using the Embedded Assembler. As the Embedded Assembler may cause side effects (Refer to <b>Arm Compiler v5.xx User Guide - Using the Inline and Embedded Assemblers of the Arm Compiler</b> for more information) it is possible to disable the following intrinsic functions and therefore the usage of the Embedded Assembler with the <b><em>define __NO_EMBEDDED_ASM</em></b>:<ul>
 272 <li><a class="el" href="group__intrinsic__CPU__gr.html#gaeef6f853b6df3a365c838ee5b49a7a26">__REV16</a></li>
 273 <li><a class="el" href="group__intrinsic__CPU__gr.html#ga211618c03a0bf3264a7b22ad626d4f0a">__REVSH</a></li>
 274 <li><a class="el" href="group__intrinsic__CPU__gr.html#gac09134f1bf9c49db07282001afcc9380">__RRX</a> </li>
 275 </ul>
 276 </dd></dl>
 277 <h2 class="groupheader">Function Documentation</h2>
 278 <a id="ga92f5621626711931da71eaa8bf301af7" name="ga92f5621626711931da71eaa8bf301af7"></a>
 279 <h2 class="memtitle"><span class="permalink"><a href="#ga92f5621626711931da71eaa8bf301af7">&#9670;&#160;</a></span>__BKPT()</h2>
 280
 281 <div class="memitem">
 282 <div class="memproto">
 283       <table class="memname">
 284         <tr>
 285           <td class="memname">void __BKPT </td>
 286           <td>(</td>
 287           <td class="paramtype">uint8_t&#160;</td>
 288           <td class="paramname"><em>value</em></td><td>)</td>
 289           <td></td>
 290         </tr>
 291       </table>
 292 </div><div class="memdoc">
 293
 294 <p>Set Breakpoint. </p>
 295 <p>This function causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.</p>
 296 <dl class="params"><dt>Parameters</dt><dd>
 297   <table class="params">
 298     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>is ignored by the processor. If required, a debugger can use it to obtain additional information about the breakpoint. </td></tr>
 299   </table>
 300   </dd>
 301 </dl>
 302
 303 </div>
 304 </div>
 305 <a id="ga354c5ac8870cc3dfb823367af9c4b412" name="ga354c5ac8870cc3dfb823367af9c4b412"></a>
 306 <h2 class="memtitle"><span class="permalink"><a href="#ga354c5ac8870cc3dfb823367af9c4b412">&#9670;&#160;</a></span>__CLREX()</h2>
 307
 308 <div class="memitem">
 309 <div class="memproto">
 310       <table class="memname">
 311         <tr>
 312           <td class="memname">void __CLREX </td>
 313           <td>(</td>
 314           <td class="paramtype">void&#160;</td>
 315           <td class="paramname"></td><td>)</td>
 316           <td></td>
 317         </tr>
 318       </table>
 319 </div><div class="memdoc">
 320
 321 <p>Remove the exclusive lock [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
 322 <p>This function removes the exclusive lock which is created by LDREX [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
 323
 324 </div>
 325 </div>
 326 <a id="ga90884c591ac5d73d6069334eba9d6c02" name="ga90884c591ac5d73d6069334eba9d6c02"></a>
 327 <h2 class="memtitle"><span class="permalink"><a href="#ga90884c591ac5d73d6069334eba9d6c02">&#9670;&#160;</a></span>__CLZ()</h2>
 328
 329 <div class="memitem">
 330 <div class="memproto">
 331       <table class="memname">
 332         <tr>
 333           <td class="memname">uint8_t __CLZ </td>
 334           <td>(</td>
 335           <td class="paramtype">uint32_t&#160;</td>
 336           <td class="paramname"><em>value</em></td><td>)</td>
 337           <td></td>
 338         </tr>
 339       </table>
 340 </div><div class="memdoc">
 341
 342 <p>Count leading zeros. </p>
 343 <p>This function counts the number of leading zeros of a data value.</p>
 344 <p>On Armv6-M (Cortex-M0, Cortex-M0+, and SC000) this function is not available as a core instruction instruction and thus __CLZ is implemented in software.</p>
 345 <dl class="params"><dt>Parameters</dt><dd>
 346   <table class="params">
 347     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to count the leading zeros </td></tr>
 348   </table>
 349   </dd>
 350 </dl>
 351 <dl class="section return"><dt>Returns</dt><dd>number of leading zeros in value </dd></dl>
 352
 353 </div>
 354 </div>
 355 <a id="gab1c9b393641dc2d397b3408fdbe72b96" name="gab1c9b393641dc2d397b3408fdbe72b96"></a>
 356 <h2 class="memtitle"><span class="permalink"><a href="#gab1c9b393641dc2d397b3408fdbe72b96">&#9670;&#160;</a></span>__DMB()</h2>
 357
 358 <div class="memitem">
 359 <div class="memproto">
 360       <table class="memname">
 361         <tr>
 362           <td class="memname">void __DMB </td>
 363           <td>(</td>
 364           <td class="paramtype">void&#160;</td>
 365           <td class="paramname"></td><td>)</td>
 366           <td></td>
 367         </tr>
 368       </table>
 369 </div><div class="memdoc">
 370
 371 <p>Data Memory Barrier. </p>
 372 <p>This function ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion. </p>
 373
 374 </div>
 375 </div>
 376 <a id="gacb2a8ca6eae1ba4b31161578b720c199" name="gacb2a8ca6eae1ba4b31161578b720c199"></a>
 377 <h2 class="memtitle"><span class="permalink"><a href="#gacb2a8ca6eae1ba4b31161578b720c199">&#9670;&#160;</a></span>__DSB()</h2>
 378
 379 <div class="memitem">
 380 <div class="memproto">
 381       <table class="memname">
 382         <tr>
 383           <td class="memname">void __DSB </td>
 384           <td>(</td>
 385           <td class="paramtype">void&#160;</td>
 386           <td class="paramname"></td><td>)</td>
 387           <td></td>
 388         </tr>
 389       </table>
 390 </div><div class="memdoc">
 391
 392 <p>Data Synchronization Barrier. </p>
 393 <p>This function acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. </p>
 394
 395 </div>
 396 </div>
 397 <a id="ga93c09b4709394d81977300d5f84950e5" name="ga93c09b4709394d81977300d5f84950e5"></a>
 398 <h2 class="memtitle"><span class="permalink"><a href="#ga93c09b4709394d81977300d5f84950e5">&#9670;&#160;</a></span>__ISB()</h2>
 399
 400 <div class="memitem">
 401 <div class="memproto">
 402       <table class="memname">
 403         <tr>
 404           <td class="memname">void __ISB </td>
 405           <td>(</td>
 406           <td class="paramtype">void&#160;</td>
 407           <td class="paramname"></td><td>)</td>
 408           <td></td>
 409         </tr>
 410       </table>
 411 </div><div class="memdoc">
 412
 413 <p>Instruction Synchronization Barrier. </p>
 414 <p>Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed. </p>
 415
 416 </div>
 417 </div>
 418 <a id="ga22a24f416b65c2f5a82d9f1162d9394d" name="ga22a24f416b65c2f5a82d9f1162d9394d"></a>
 419 <h2 class="memtitle"><span class="permalink"><a href="#ga22a24f416b65c2f5a82d9f1162d9394d">&#9670;&#160;</a></span>__LDA()</h2>
 420
 421 <div class="memitem">
 422 <div class="memproto">
 423       <table class="memname">
 424         <tr>
 425           <td class="memname">uint32_t __LDA </td>
 426           <td>(</td>
 427           <td class="paramtype">volatile uint32_t *&#160;</td>
 428           <td class="paramname"><em>ptr</em></td><td>)</td>
 429           <td></td>
 430         </tr>
 431       </table>
 432 </div><div class="memdoc">
 433
 434 <p>Load-Acquire (32 bit) </p>
 435 <p>Executes a LDA instruction for 32 bit values. </p><dl class="params"><dt>Parameters</dt><dd>
 436   <table class="params">
 437     <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr>
 438   </table>
 439   </dd>
 440 </dl>
 441 <dl class="section return"><dt>Returns</dt><dd>value of type uint32_t at (*ptr) </dd></dl>
 442 <dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
 443
 444 </div>
 445 </div>
 446 <a id="ga263b9b2d9c06d731022873acddb6aa3f" name="ga263b9b2d9c06d731022873acddb6aa3f"></a>
 447 <h2 class="memtitle"><span class="permalink"><a href="#ga263b9b2d9c06d731022873acddb6aa3f">&#9670;&#160;</a></span>__LDAB()</h2>
 448
 449 <div class="memitem">
 450 <div class="memproto">
 451       <table class="memname">
 452         <tr>
 453           <td class="memname">uint8_t __LDAB </td>
 454           <td>(</td>
 455           <td class="paramtype">volatile uint8_t *&#160;</td>
 456           <td class="paramname"><em>ptr</em></td><td>)</td>
 457           <td></td>
 458         </tr>
 459       </table>
 460 </div><div class="memdoc">
 461
 462 <p>Load-Acquire (8 bit) </p>
 463 <p>Executes a LDAB instruction for 8 bit value. </p><dl class="params"><dt>Parameters</dt><dd>
 464   <table class="params">
 465     <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr>
 466   </table>
 467   </dd>
 468 </dl>
 469 <dl class="section return"><dt>Returns</dt><dd>value of type uint8_t at (*ptr) </dd></dl>
 470 <dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
 471
 472 </div>
 473 </div>
 474 <a id="ga3c74d923529f664eda099d1b2668b3c1" name="ga3c74d923529f664eda099d1b2668b3c1"></a>
 475 <h2 class="memtitle"><span class="permalink"><a href="#ga3c74d923529f664eda099d1b2668b3c1">&#9670;&#160;</a></span>__LDAEX()</h2>
 476
 477 <div class="memitem">
 478 <div class="memproto">
 479       <table class="memname">
 480         <tr>
 481           <td class="memname">uint32_t __LDAEX </td>
 482           <td>(</td>
 483           <td class="paramtype">volatile uint32_t *&#160;</td>
 484           <td class="paramname"><em>ptr</em></td><td>)</td>
 485           <td></td>
 486         </tr>
 487       </table>
 488 </div><div class="memdoc">
 489
 490 <p>Load-Acquire Exclusive (32 bit) </p>
 491 <p>Executes a LDA exclusive instruction for 32 bit values. </p><dl class="params"><dt>Parameters</dt><dd>
 492   <table class="params">
 493     <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr>
 494   </table>
 495   </dd>
 496 </dl>
 497 <dl class="section return"><dt>Returns</dt><dd>value of type uint32_t at (*ptr) </dd></dl>
 498 <dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
 499
 500 </div>
 501 </div>
 502 <a id="ga513beada40cdd7123281f22482603bcc" name="ga513beada40cdd7123281f22482603bcc"></a>
 503 <h2 class="memtitle"><span class="permalink"><a href="#ga513beada40cdd7123281f22482603bcc">&#9670;&#160;</a></span>__LDAEXB()</h2>
 504
 505 <div class="memitem">
 506 <div class="memproto">
 507       <table class="memname">
 508         <tr>
 509           <td class="memname">uint8_t __LDAEXB </td>
 510           <td>(</td>
 511           <td class="paramtype">volatile uint32_t *&#160;</td>
 512           <td class="paramname"><em>ptr</em></td><td>)</td>
 513           <td></td>
 514         </tr>
 515       </table>
 516 </div><div class="memdoc">
 517
 518 <p>Load-Acquire Exclusive (8 bit) </p>
 519 <p>Executes a LDAB exclusive instruction for 8 bit value. </p><dl class="params"><dt>Parameters</dt><dd>
 520   <table class="params">
 521     <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr>
 522   </table>
 523   </dd>
 524 </dl>
 525 <dl class="section return"><dt>Returns</dt><dd>value of type uint8_t at (*ptr) </dd></dl>
 526 <dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
 527
 528 </div>
 529 </div>
 530 <a id="ga426b61640fc68f21b21ae4dc2726f3b4" name="ga426b61640fc68f21b21ae4dc2726f3b4"></a>
 531 <h2 class="memtitle"><span class="permalink"><a href="#ga426b61640fc68f21b21ae4dc2726f3b4">&#9670;&#160;</a></span>__LDAEXH()</h2>
 532
 533 <div class="memitem">
 534 <div class="memproto">
 535       <table class="memname">
 536         <tr>
 537           <td class="memname">uint16_t __LDAEXH </td>
 538           <td>(</td>
 539           <td class="paramtype">volatile uint32_t *&#160;</td>
 540           <td class="paramname"><em>ptr</em></td><td>)</td>
 541           <td></td>
 542         </tr>
 543       </table>
 544 </div><div class="memdoc">
 545
 546 <p>Load-Acquire Exclusive (16 bit) </p>
 547 <p>Executes a LDAH exclusive instruction for 16 bit values. </p><dl class="params"><dt>Parameters</dt><dd>
 548   <table class="params">
 549     <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr>
 550   </table>
 551   </dd>
 552 </dl>
 553 <dl class="section return"><dt>Returns</dt><dd>value of type uint16_t at (*ptr) </dd></dl>
 554 <dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
 555
 556 </div>
 557 </div>
 558 <a id="ga5810ac0b87a37e321c2f909cd3860499" name="ga5810ac0b87a37e321c2f909cd3860499"></a>
 559 <h2 class="memtitle"><span class="permalink"><a href="#ga5810ac0b87a37e321c2f909cd3860499">&#9670;&#160;</a></span>__LDAH()</h2>
 560
 561 <div class="memitem">
 562 <div class="memproto">
 563       <table class="memname">
 564         <tr>
 565           <td class="memname">uint16_t __LDAH </td>
 566           <td>(</td>
 567           <td class="paramtype">volatile uint16_t *&#160;</td>
 568           <td class="paramname"><em>ptr</em></td><td>)</td>
 569           <td></td>
 570         </tr>
 571       </table>
 572 </div><div class="memdoc">
 573
 574 <p>Load-Acquire (16 bit) </p>
 575 <p>Executes a LDAH instruction for 16 bit values. </p><dl class="params"><dt>Parameters</dt><dd>
 576   <table class="params">
 577     <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr>
 578   </table>
 579   </dd>
 580 </dl>
 581 <dl class="section return"><dt>Returns</dt><dd>value of type uint16_t at (*ptr) </dd></dl>
 582 <dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
 583
 584 </div>
 585 </div>
 586 <a id="ga9464d75db32846aa8295c3c3adfacb41" name="ga9464d75db32846aa8295c3c3adfacb41"></a>
 587 <h2 class="memtitle"><span class="permalink"><a href="#ga9464d75db32846aa8295c3c3adfacb41">&#9670;&#160;</a></span>__LDRBT()</h2>
 588
 589 <div class="memitem">
 590 <div class="memproto">
 591       <table class="memname">
 592         <tr>
 593           <td class="memname">uint8_t __LDRBT </td>
 594           <td>(</td>
 595           <td class="paramtype">uint8_t&#160;</td>
 596           <td class="paramname"><em>ptr</em></td><td>)</td>
 597           <td></td>
 598         </tr>
 599       </table>
 600 </div><div class="memdoc">
 601
 602 <p>LDRT Unprivileged (8 bit) </p>
 603 <p>This function executed an Unprivileged LDRT command for 8 bit value.</p>
 604 <dl class="params"><dt>Parameters</dt><dd>
 605   <table class="params">
 606     <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr>
 607   </table>
 608   </dd>
 609 </dl>
 610 <dl class="section return"><dt>Returns</dt><dd>value of type uint8_t at (*ptr) </dd></dl>
 611
 612 </div>
 613 </div>
 614 <a id="ga9e3ac13d8dcf4331176b624cf6234a7e" name="ga9e3ac13d8dcf4331176b624cf6234a7e"></a>
 615 <h2 class="memtitle"><span class="permalink"><a href="#ga9e3ac13d8dcf4331176b624cf6234a7e">&#9670;&#160;</a></span>__LDREXB()</h2>
 616
 617 <div class="memitem">
 618 <div class="memproto">
 619       <table class="memname">
 620         <tr>
 621           <td class="memname">uint8_t __LDREXB </td>
 622           <td>(</td>
 623           <td class="paramtype">volatile uint8_t *&#160;</td>
 624           <td class="paramname"><em>addr</em></td><td>)</td>
 625           <td></td>
 626         </tr>
 627       </table>
 628 </div><div class="memdoc">
 629
 630 <p>LDR Exclusive (8 bit) [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
 631 <p>This function executed an exclusive LDR command for 8 bit value [not for Cortex-M0, Cortex-M0+, or SC000].</p>
 632 <dl class="params"><dt>Parameters</dt><dd>
 633   <table class="params">
 634     <tr><td class="paramdir">[in]</td><td class="paramname">*addr</td><td>Pointer to data </td></tr>
 635   </table>
 636   </dd>
 637 </dl>
 638 <dl class="section return"><dt>Returns</dt><dd>value of type uint8_t at (*addr) </dd></dl>
 639
 640 </div>
 641 </div>
 642 <a id="ga9feffc093d6f68b120d592a7a0d45a15" name="ga9feffc093d6f68b120d592a7a0d45a15"></a>
 643 <h2 class="memtitle"><span class="permalink"><a href="#ga9feffc093d6f68b120d592a7a0d45a15">&#9670;&#160;</a></span>__LDREXH()</h2>
 644
 645 <div class="memitem">
 646 <div class="memproto">
 647       <table class="memname">
 648         <tr>
 649           <td class="memname">uint16_t __LDREXH </td>
 650           <td>(</td>
 651           <td class="paramtype">volatile uint16_t *&#160;</td>
 652           <td class="paramname"><em>addr</em></td><td>)</td>
 653           <td></td>
 654         </tr>
 655       </table>
 656 </div><div class="memdoc">
 657
 658 <p>LDR Exclusive (16 bit) [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
 659 <p>This function executed an exclusive LDR command for 16 bit values [not for Cortex-M0, Cortex-M0+, or SC000].</p>
 660 <dl class="params"><dt>Parameters</dt><dd>
 661   <table class="params">
 662     <tr><td class="paramdir">[in]</td><td class="paramname">*addr</td><td>Pointer to data </td></tr>
 663   </table>
 664   </dd>
 665 </dl>
 666 <dl class="section return"><dt>Returns</dt><dd>value of type uint16_t at (*addr) </dd></dl>
 667
 668 </div>
 669 </div>
 670 <a id="gabd78840a0f2464905b7cec791ebc6a4c" name="gabd78840a0f2464905b7cec791ebc6a4c"></a>
 671 <h2 class="memtitle"><span class="permalink"><a href="#gabd78840a0f2464905b7cec791ebc6a4c">&#9670;&#160;</a></span>__LDREXW()</h2>
 672
 673 <div class="memitem">
 674 <div class="memproto">
 675       <table class="memname">
 676         <tr>
 677           <td class="memname">uint32_t __LDREXW </td>
 678           <td>(</td>
 679           <td class="paramtype">volatile uint32_t *&#160;</td>
 680           <td class="paramname"><em>addr</em></td><td>)</td>
 681           <td></td>
 682         </tr>
 683       </table>
 684 </div><div class="memdoc">
 685
 686 <p>LDR Exclusive (32 bit) [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
 687 <p>This function executed an exclusive LDR command for 32 bit values [not for Cortex-M0, Cortex-M0+, or SC000].</p>
 688 <dl class="params"><dt>Parameters</dt><dd>
 689   <table class="params">
 690     <tr><td class="paramdir">[in]</td><td class="paramname">*addr</td><td>Pointer to data </td></tr>
 691   </table>
 692   </dd>
 693 </dl>
 694 <dl class="section return"><dt>Returns</dt><dd>value of type uint32_t at (*addr) </dd></dl>
 695
 696 </div>
 697 </div>
 698 <a id="gaa762b8bc5634ce38cb14d62a6b2aee32" name="gaa762b8bc5634ce38cb14d62a6b2aee32"></a>
 699 <h2 class="memtitle"><span class="permalink"><a href="#gaa762b8bc5634ce38cb14d62a6b2aee32">&#9670;&#160;</a></span>__LDRHT()</h2>
 700
 701 <div class="memitem">
 702 <div class="memproto">
 703       <table class="memname">
 704         <tr>
 705           <td class="memname">uint16_t __LDRHT </td>
 706           <td>(</td>
 707           <td class="paramtype">uint16_t&#160;</td>
 708           <td class="paramname"><em>ptr</em></td><td>)</td>
 709           <td></td>
 710         </tr>
 711       </table>
 712 </div><div class="memdoc">
 713
 714 <p>LDRT Unprivileged (16 bit) </p>
 715 <p>This function executed an Unprivileged LDRT command for 16 bit values.</p>
 716 <dl class="params"><dt>Parameters</dt><dd>
 717   <table class="params">
 718     <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr>
 719   </table>
 720   </dd>
 721 </dl>
 722 <dl class="section return"><dt>Returns</dt><dd>value of type uint16_t at (*ptr) </dd></dl>
 723
 724 </div>
 725 </div>
 726 <a id="ga616504f5da979ba8a073d428d6e8d5c7" name="ga616504f5da979ba8a073d428d6e8d5c7"></a>
 727 <h2 class="memtitle"><span class="permalink"><a href="#ga616504f5da979ba8a073d428d6e8d5c7">&#9670;&#160;</a></span>__LDRT()</h2>
 728
 729 <div class="memitem">
 730 <div class="memproto">
 731       <table class="memname">
 732         <tr>
 733           <td class="memname">uint32_t __LDRT </td>
 734           <td>(</td>
 735           <td class="paramtype">uint32_t&#160;</td>
 736           <td class="paramname"><em>ptr</em></td><td>)</td>
 737           <td></td>
 738         </tr>
 739       </table>
 740 </div><div class="memdoc">
 741
 742 <p>LDRT Unprivileged (32 bit) </p>
 743 <p>This function executed an Unprivileged LDRT command for 32 bit values.</p>
 744 <dl class="params"><dt>Parameters</dt><dd>
 745   <table class="params">
 746     <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr>
 747   </table>
 748   </dd>
 749 </dl>
 750 <dl class="section return"><dt>Returns</dt><dd>value of type uint32_t at (*ptr) </dd></dl>
 751
 752 </div>
 753 </div>
 754 <a id="gac71fad9f0a91980fecafcb450ee0a63e" name="gac71fad9f0a91980fecafcb450ee0a63e"></a>
 755 <h2 class="memtitle"><span class="permalink"><a href="#gac71fad9f0a91980fecafcb450ee0a63e">&#9670;&#160;</a></span>__NOP()</h2>
 756
 757 <div class="memitem">
 758 <div class="memproto">
 759       <table class="memname">
 760         <tr>
 761           <td class="memname">void __NOP </td>
 762           <td>(</td>
 763           <td class="paramtype">void&#160;</td>
 764           <td class="paramname"></td><td>)</td>
 765           <td></td>
 766         </tr>
 767       </table>
 768 </div><div class="memdoc">
 769
 770 <p>No Operation. </p>
 771 <p>This function does nothing. This instruction can be used for code alignment purposes. </p>
 772
 773 </div>
 774 </div>
 775 <a id="gad6f9f297f6b91a995ee199fbc796b863" name="gad6f9f297f6b91a995ee199fbc796b863"></a>
 776 <h2 class="memtitle"><span class="permalink"><a href="#gad6f9f297f6b91a995ee199fbc796b863">&#9670;&#160;</a></span>__RBIT()</h2>
 777
 778 <div class="memitem">
 779 <div class="memproto">
 780       <table class="memname">
 781         <tr>
 782           <td class="memname">uint32_t __RBIT </td>
 783           <td>(</td>
 784           <td class="paramtype">uint32_t&#160;</td>
 785           <td class="paramname"><em>value</em></td><td>)</td>
 786           <td></td>
 787         </tr>
 788       </table>
 789 </div><div class="memdoc">
 790
 791 <p>Reverse bit order of value. </p>
 792 <dl class="params"><dt>Parameters</dt><dd>
 793   <table class="params">
 794     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to reverse </td></tr>
 795   </table>
 796   </dd>
 797 </dl>
 798 <dl class="section return"><dt>Returns</dt><dd>Reversed value </dd></dl>
 799
 800 </div>
 801 </div>
 802 <a id="ga4717abc17af5ba29b1e4c055e0a0d9b8" name="ga4717abc17af5ba29b1e4c055e0a0d9b8"></a>
 803 <h2 class="memtitle"><span class="permalink"><a href="#ga4717abc17af5ba29b1e4c055e0a0d9b8">&#9670;&#160;</a></span>__REV()</h2>
 804
 805 <div class="memitem">
 806 <div class="memproto">
 807       <table class="memname">
 808         <tr>
 809           <td class="memname">uint32_t __REV </td>
 810           <td>(</td>
 811           <td class="paramtype">uint32_t&#160;</td>
 812           <td class="paramname"><em>value</em></td><td>)</td>
 813           <td></td>
 814         </tr>
 815       </table>
 816 </div><div class="memdoc">
 817
 818 <p>Reverse byte order (32 bit) </p>
 819 <p>Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412. </p><dl class="params"><dt>Parameters</dt><dd>
 820   <table class="params">
 821     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to reverse </td></tr>
 822   </table>
 823   </dd>
 824 </dl>
 825 <dl class="section return"><dt>Returns</dt><dd>Reversed value </dd></dl>
 826
 827 </div>
 828 </div>
 829 <a id="gaeef6f853b6df3a365c838ee5b49a7a26" name="gaeef6f853b6df3a365c838ee5b49a7a26"></a>
 830 <h2 class="memtitle"><span class="permalink"><a href="#gaeef6f853b6df3a365c838ee5b49a7a26">&#9670;&#160;</a></span>__REV16()</h2>
 831
 832 <div class="memitem">
 833 <div class="memproto">
 834       <table class="memname">
 835         <tr>
 836           <td class="memname">uint32_t __REV16 </td>
 837           <td>(</td>
 838           <td class="paramtype">uint32_t&#160;</td>
 839           <td class="paramname"><em>value</em></td><td>)</td>
 840           <td></td>
 841         </tr>
 842       </table>
 843 </div><div class="memdoc">
 844
 845 <p>Reverse byte order (16 bit) </p>
 846 <p>Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856. </p><dl class="params"><dt>Parameters</dt><dd>
 847   <table class="params">
 848     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to reverse </td></tr>
 849   </table>
 850   </dd>
 851 </dl>
 852 <dl class="section return"><dt>Returns</dt><dd>Reversed value </dd></dl>
 853
 854 </div>
 855 </div>
 856 <a id="ga211618c03a0bf3264a7b22ad626d4f0a" name="ga211618c03a0bf3264a7b22ad626d4f0a"></a>
 857 <h2 class="memtitle"><span class="permalink"><a href="#ga211618c03a0bf3264a7b22ad626d4f0a">&#9670;&#160;</a></span>__REVSH()</h2>
 858
 859 <div class="memitem">
 860 <div class="memproto">
 861       <table class="memname">
 862         <tr>
 863           <td class="memname">int16_t __REVSH </td>
 864           <td>(</td>
 865           <td class="paramtype">int16_t&#160;</td>
 866           <td class="paramname"><em>value</em></td><td>)</td>
 867           <td></td>
 868         </tr>
 869       </table>
 870 </div><div class="memdoc">
 871
 872 <p>Reverse byte order (16 bit) </p>
 873 <p>Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000. </p><dl class="params"><dt>Parameters</dt><dd>
 874   <table class="params">
 875     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to reverse </td></tr>
 876   </table>
 877   </dd>
 878 </dl>
 879 <dl class="section return"><dt>Returns</dt><dd>Reversed value </dd></dl>
 880
 881 </div>
 882 </div>
 883 <a id="gaf66beb577bb9d90424c3d1d7f684c024" name="gaf66beb577bb9d90424c3d1d7f684c024"></a>
 884 <h2 class="memtitle"><span class="permalink"><a href="#gaf66beb577bb9d90424c3d1d7f684c024">&#9670;&#160;</a></span>__ROR()</h2>
 885
 886 <div class="memitem">
 887 <div class="memproto">
 888       <table class="memname">
 889         <tr>
 890           <td class="memname">uint32_t __ROR </td>
 891           <td>(</td>
 892           <td class="paramtype">uint32_t&#160;</td>
 893           <td class="paramname"><em>value</em>, </td>
 894         </tr>
 895         <tr>
 896           <td class="paramkey"></td>
 897           <td></td>
 898           <td class="paramtype">uint32_t&#160;</td>
 899           <td class="paramname"><em>shift</em>&#160;</td>
 900         </tr>
 901         <tr>
 902           <td></td>
 903           <td>)</td>
 904           <td></td><td></td>
 905         </tr>
 906       </table>
 907 </div><div class="memdoc">
 908
 909 <p>Rotate a value right by a number of bits. </p>
 910 <p>This function rotates a value right by a specified number of bits.</p>
 911 <dl class="params"><dt>Parameters</dt><dd>
 912   <table class="params">
 913     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to be shifted right </td></tr>
 914     <tr><td class="paramdir">[in]</td><td class="paramname">shift</td><td>Number of bits in the range [1..31] </td></tr>
 915   </table>
 916   </dd>
 917 </dl>
 918 <dl class="section return"><dt>Returns</dt><dd>Rotated value </dd></dl>
 919
 920 </div>
 921 </div>
 922 <a id="gac09134f1bf9c49db07282001afcc9380" name="gac09134f1bf9c49db07282001afcc9380"></a>
 923 <h2 class="memtitle"><span class="permalink"><a href="#gac09134f1bf9c49db07282001afcc9380">&#9670;&#160;</a></span>__RRX()</h2>
 924
 925 <div class="memitem">
 926 <div class="memproto">
 927       <table class="memname">
 928         <tr>
 929           <td class="memname">uint32_t __RRX </td>
 930           <td>(</td>
 931           <td class="paramtype">uint32_t&#160;</td>
 932           <td class="paramname"><em>value</em></td><td>)</td>
 933           <td></td>
 934         </tr>
 935       </table>
 936 </div><div class="memdoc">
 937
 938 <p>Rotate Right with Extend (32 bit) </p>
 939 <p>This function moves each bit of a bitstring right by one bit. The carry input is shifted in at the left end of the bitstring.</p>
 940 <dl class="params"><dt>Parameters</dt><dd>
 941   <table class="params">
 942     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to rotate </td></tr>
 943   </table>
 944   </dd>
 945 </dl>
 946 <dl class="section return"><dt>Returns</dt><dd>Rotated value </dd></dl>
 947
 948 </div>
 949 </div>
 950 <a id="ga3c34da7eb16496ae2668a5b95fa441e7" name="ga3c34da7eb16496ae2668a5b95fa441e7"></a>
 951 <h2 class="memtitle"><span class="permalink"><a href="#ga3c34da7eb16496ae2668a5b95fa441e7">&#9670;&#160;</a></span>__SEV()</h2>
 952
 953 <div class="memitem">
 954 <div class="memproto">
 955       <table class="memname">
 956         <tr>
 957           <td class="memname">void __SEV </td>
 958           <td>(</td>
 959           <td class="paramtype">void&#160;</td>
 960           <td class="paramname"></td><td>)</td>
 961           <td></td>
 962         </tr>
 963       </table>
 964 </div><div class="memdoc">
 965
 966 <p>Send Event. </p>
 967 <p>Send Event is a hint instruction. It causes an event to be signaled to the CPU. </p>
 968
 969 </div>
 970 </div>
 971 <a id="ga8cfeb5ffe0e49ec6b29dafdde92e5118" name="ga8cfeb5ffe0e49ec6b29dafdde92e5118"></a>
 972 <h2 class="memtitle"><span class="permalink"><a href="#ga8cfeb5ffe0e49ec6b29dafdde92e5118">&#9670;&#160;</a></span>__SSAT()</h2>
 973
 974 <div class="memitem">
 975 <div class="memproto">
 976       <table class="memname">
 977         <tr>
 978           <td class="memname">int32_t __SSAT </td>
 979           <td>(</td>
 980           <td class="paramtype">int32_t&#160;</td>
 981           <td class="paramname"><em>value</em>, </td>
 982         </tr>
 983         <tr>
 984           <td class="paramkey"></td>
 985           <td></td>
 986           <td class="paramtype">uint32_t&#160;</td>
 987           <td class="paramname"><em>sat</em>&#160;</td>
 988         </tr>
 989         <tr>
 990           <td></td>
 991           <td>)</td>
 992           <td></td><td></td>
 993         </tr>
 994       </table>
 995 </div><div class="memdoc">
 996
 997 <p>Signed Saturate. </p>
 998 <p>This function saturates a signed value. The Q bit is set if saturation occurs [not for Cortex-M0, Cortex-M0+, or SC000].</p>
 999 <p>On Armv6-M (Cortex-M0, Cortex-M0+, and SC000) this function is not available as a core instruction instruction and thus __SSAT is implemented in software.</p>
1000 <dl class="params"><dt>Parameters</dt><dd>
1001   <table class="params">
1002     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to be saturated </td></tr>
1003     <tr><td class="paramdir">[in]</td><td class="paramname">sat</td><td>Bit position to saturate to [1..32] </td></tr>
1004   </table>
1005   </dd>
1006 </dl>
1007 <dl class="section return"><dt>Returns</dt><dd>Saturated value </dd></dl>
1008
1009 </div>
1010 </div>
1011 <a id="ga5429d7083fb8d30c43cecd3a861e1672" name="ga5429d7083fb8d30c43cecd3a861e1672"></a>
1012 <h2 class="memtitle"><span class="permalink"><a href="#ga5429d7083fb8d30c43cecd3a861e1672">&#9670;&#160;</a></span>__STL()</h2>
1013
1014 <div class="memitem">
1015 <div class="memproto">
1016       <table class="memname">
1017         <tr>
1018           <td class="memname">void __STL </td>
1019           <td>(</td>
1020           <td class="paramtype">uint32_t&#160;</td>
1021           <td class="paramname"><em>value</em>, </td>
1022         </tr>
1023         <tr>
1024           <td class="paramkey"></td>
1025           <td></td>
1026           <td class="paramtype">volatile uint32_t *&#160;</td>
1027           <td class="paramname"><em>ptr</em>&#160;</td>
1028         </tr>
1029         <tr>
1030           <td></td>
1031           <td>)</td>
1032           <td></td><td></td>
1033         </tr>
1034       </table>
1035 </div><div class="memdoc">
1036
1037 <p>Store-Release (32 bit) </p>
1038 <p>Executes a STL instruction for 32 bit values. </p><dl class="params"><dt>Parameters</dt><dd>
1039   <table class="params">
1040     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
1041     <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr>
1042   </table>
1043   </dd>
1044 </dl>
1045 <dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
1046
1047 </div>
1048 </div>
1049 <a id="gace025d3a1f85d2ab9bae7288838d6bc8" name="gace025d3a1f85d2ab9bae7288838d6bc8"></a>
1050 <h2 class="memtitle"><span class="permalink"><a href="#gace025d3a1f85d2ab9bae7288838d6bc8">&#9670;&#160;</a></span>__STLB()</h2>
1051
1052 <div class="memitem">
1053 <div class="memproto">
1054       <table class="memname">
1055         <tr>
1056           <td class="memname">void __STLB </td>
1057           <td>(</td>
1058           <td class="paramtype">uint8_t&#160;</td>
1059           <td class="paramname"><em>value</em>, </td>
1060         </tr>
1061         <tr>
1062           <td class="paramkey"></td>
1063           <td></td>
1064           <td class="paramtype">volatile uint8_t *&#160;</td>
1065           <td class="paramname"><em>ptr</em>&#160;</td>
1066         </tr>
1067         <tr>
1068           <td></td>
1069           <td>)</td>
1070           <td></td><td></td>
1071         </tr>
1072       </table>
1073 </div><div class="memdoc">
1074
1075 <p>Store-Release (8 bit) </p>
1076 <p>Executes a STLB instruction for 8 bit values. </p><dl class="params"><dt>Parameters</dt><dd>
1077   <table class="params">
1078     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
1079     <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr>
1080   </table>
1081   </dd>
1082 </dl>
1083 <dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
1084
1085 </div>
1086 </div>
1087 <a id="gae7f955b91595cfd82a03e4b437c59afe" name="gae7f955b91595cfd82a03e4b437c59afe"></a>
1088 <h2 class="memtitle"><span class="permalink"><a href="#gae7f955b91595cfd82a03e4b437c59afe">&#9670;&#160;</a></span>__STLEX()</h2>
1089
1090 <div class="memitem">
1091 <div class="memproto">
1092       <table class="memname">
1093         <tr>
1094           <td class="memname">uint32_t __STLEX </td>
1095           <td>(</td>
1096           <td class="paramtype">uint32_t&#160;</td>
1097           <td class="paramname"><em>value</em>, </td>
1098         </tr>
1099         <tr>
1100           <td class="paramkey"></td>
1101           <td></td>
1102           <td class="paramtype">volatile uint32_t *&#160;</td>
1103           <td class="paramname"><em>ptr</em>&#160;</td>
1104         </tr>
1105         <tr>
1106           <td></td>
1107           <td>)</td>
1108           <td></td><td></td>
1109         </tr>
1110       </table>
1111 </div><div class="memdoc">
1112
1113 <p>Store-Release Exclusive (32 bit) </p>
1114 <p>Executes a STL exclusive instruction for 32 bit values. </p><dl class="params"><dt>Parameters</dt><dd>
1115   <table class="params">
1116     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
1117     <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr>
1118   </table>
1119   </dd>
1120 </dl>
1121 <dl class="section return"><dt>Returns</dt><dd>0 Function succeeded </dd>
1122 <dd>
1123 1 Function failed </dd></dl>
1124 <dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
1125
1126 </div>
1127 </div>
1128 <a id="ga590724a32a229978536fbbbd6cc82536" name="ga590724a32a229978536fbbbd6cc82536"></a>
1129 <h2 class="memtitle"><span class="permalink"><a href="#ga590724a32a229978536fbbbd6cc82536">&#9670;&#160;</a></span>__STLEXB()</h2>
1130
1131 <div class="memitem">
1132 <div class="memproto">
1133       <table class="memname">
1134         <tr>
1135           <td class="memname">uint32_t __STLEXB </td>
1136           <td>(</td>
1137           <td class="paramtype">uint8_t&#160;</td>
1138           <td class="paramname"><em>value</em>, </td>
1139         </tr>
1140         <tr>
1141           <td class="paramkey"></td>
1142           <td></td>
1143           <td class="paramtype">volatile uint8_t *&#160;</td>
1144           <td class="paramname"><em>ptr</em>&#160;</td>
1145         </tr>
1146         <tr>
1147           <td></td>
1148           <td>)</td>
1149           <td></td><td></td>
1150         </tr>
1151       </table>
1152 </div><div class="memdoc">
1153
1154 <p>Store-Release Exclusive (8 bit) </p>
1155 <p>Executes a STLB exclusive instruction for 8 bit values. </p><dl class="params"><dt>Parameters</dt><dd>
1156   <table class="params">
1157     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
1158     <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr>
1159   </table>
1160   </dd>
1161 </dl>
1162 <dl class="section return"><dt>Returns</dt><dd>0 Function succeeded </dd>
1163 <dd>
1164 1 Function failed </dd></dl>
1165 <dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
1166
1167 </div>
1168 </div>
1169 <a id="ga047c3bebca3d0ae348ab8370a046301d" name="ga047c3bebca3d0ae348ab8370a046301d"></a>
1170 <h2 class="memtitle"><span class="permalink"><a href="#ga047c3bebca3d0ae348ab8370a046301d">&#9670;&#160;</a></span>__STLEXH()</h2>
1171
1172 <div class="memitem">
1173 <div class="memproto">
1174       <table class="memname">
1175         <tr>
1176           <td class="memname">uint32_t __STLEXH </td>
1177           <td>(</td>
1178           <td class="paramtype">uint16_t&#160;</td>
1179           <td class="paramname"><em>value</em>, </td>
1180         </tr>
1181         <tr>
1182           <td class="paramkey"></td>
1183           <td></td>
1184           <td class="paramtype">volatile uint16_t *&#160;</td>
1185           <td class="paramname"><em>ptr</em>&#160;</td>
1186         </tr>
1187         <tr>
1188           <td></td>
1189           <td>)</td>
1190           <td></td><td></td>
1191         </tr>
1192       </table>
1193 </div><div class="memdoc">
1194
1195 <p>Store-Release Exclusive (16 bit) </p>
1196 <p>Executes a STLH exclusive instruction for 16 bit values. </p><dl class="params"><dt>Parameters</dt><dd>
1197   <table class="params">
1198     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
1199     <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr>
1200   </table>
1201   </dd>
1202 </dl>
1203 <dl class="section return"><dt>Returns</dt><dd>0 Function succeeded </dd>
1204 <dd>
1205 1 Function failed </dd></dl>
1206 <dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
1207
1208 </div>
1209 </div>
1210 <a id="ga25691650de536f9b248b15f6dc4a3e70" name="ga25691650de536f9b248b15f6dc4a3e70"></a>
1211 <h2 class="memtitle"><span class="permalink"><a href="#ga25691650de536f9b248b15f6dc4a3e70">&#9670;&#160;</a></span>__STLH()</h2>
1212
1213 <div class="memitem">
1214 <div class="memproto">
1215       <table class="memname">
1216         <tr>
1217           <td class="memname">void __STLH </td>
1218           <td>(</td>
1219           <td class="paramtype">uint16_t&#160;</td>
1220           <td class="paramname"><em>value</em>, </td>
1221         </tr>
1222         <tr>
1223           <td class="paramkey"></td>
1224           <td></td>
1225           <td class="paramtype">volatile uint16_t *&#160;</td>
1226           <td class="paramname"><em>ptr</em>&#160;</td>
1227         </tr>
1228         <tr>
1229           <td></td>
1230           <td>)</td>
1231           <td></td><td></td>
1232         </tr>
1233       </table>
1234 </div><div class="memdoc">
1235
1236 <p>Store-Release (16 bit) </p>
1237 <p>Executes a STLH instruction for 16 bit values. </p><dl class="params"><dt>Parameters</dt><dd>
1238   <table class="params">
1239     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
1240     <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr>
1241   </table>
1242   </dd>
1243 </dl>
1244 <dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
1245
1246 </div>
1247 </div>
1248 <a id="gad41aa59c92c0a165b7f98428d3320cd5" name="gad41aa59c92c0a165b7f98428d3320cd5"></a>
1249 <h2 class="memtitle"><span class="permalink"><a href="#gad41aa59c92c0a165b7f98428d3320cd5">&#9670;&#160;</a></span>__STRBT()</h2>
1250
1251 <div class="memitem">
1252 <div class="memproto">
1253       <table class="memname">
1254         <tr>
1255           <td class="memname">void __STRBT </td>
1256           <td>(</td>
1257           <td class="paramtype">uint8_t&#160;</td>
1258           <td class="paramname"><em>value</em>, </td>
1259         </tr>
1260         <tr>
1261           <td class="paramkey"></td>
1262           <td></td>
1263           <td class="paramtype">uint8_t&#160;</td>
1264           <td class="paramname"><em>ptr</em>&#160;</td>
1265         </tr>
1266         <tr>
1267           <td></td>
1268           <td>)</td>
1269           <td></td><td></td>
1270         </tr>
1271       </table>
1272 </div><div class="memdoc">
1273
1274 <p>STRT Unprivileged (8 bit) </p>
1275 <p>This function executed an Unprivileged STRT command for 8 bit values.</p>
1276 <dl class="params"><dt>Parameters</dt><dd>
1277   <table class="params">
1278     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
1279     <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr>
1280   </table>
1281   </dd>
1282 </dl>
1283
1284 </div>
1285 </div>
1286 <a id="gaab6482d1f59f59e2b6b7efc1af391c99" name="gaab6482d1f59f59e2b6b7efc1af391c99"></a>
1287 <h2 class="memtitle"><span class="permalink"><a href="#gaab6482d1f59f59e2b6b7efc1af391c99">&#9670;&#160;</a></span>__STREXB()</h2>
1288
1289 <div class="memitem">
1290 <div class="memproto">
1291       <table class="memname">
1292         <tr>
1293           <td class="memname">uint32_t __STREXB </td>
1294           <td>(</td>
1295           <td class="paramtype">uint8_t&#160;</td>
1296           <td class="paramname"><em>value</em>, </td>
1297         </tr>
1298         <tr>
1299           <td class="paramkey"></td>
1300           <td></td>
1301           <td class="paramtype">volatile uint8_t *&#160;</td>
1302           <td class="paramname"><em>addr</em>&#160;</td>
1303         </tr>
1304         <tr>
1305           <td></td>
1306           <td>)</td>
1307           <td></td><td></td>
1308         </tr>
1309       </table>
1310 </div><div class="memdoc">
1311
1312 <p>STR Exclusive (8 bit) [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
1313 <p>This function executed an exclusive STR command for 8 bit values [not for Cortex-M0, Cortex-M0+, or SC000].</p>
1314 <dl class="params"><dt>Parameters</dt><dd>
1315   <table class="params">
1316     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
1317     <tr><td class="paramdir">[in]</td><td class="paramname">*addr</td><td>Pointer to location </td></tr>
1318   </table>
1319   </dd>
1320 </dl>
1321 <dl class="section return"><dt>Returns</dt><dd>0 Function succeeded </dd>
1322 <dd>
1323 1 Function failed </dd></dl>
1324
1325 </div>
1326 </div>
1327 <a id="ga0a354bdf71caa52f081a4a54e84c8d2a" name="ga0a354bdf71caa52f081a4a54e84c8d2a"></a>
1328 <h2 class="memtitle"><span class="permalink"><a href="#ga0a354bdf71caa52f081a4a54e84c8d2a">&#9670;&#160;</a></span>__STREXH()</h2>
1329
1330 <div class="memitem">
1331 <div class="memproto">
1332       <table class="memname">
1333         <tr>
1334           <td class="memname">uint32_t __STREXH </td>
1335           <td>(</td>
1336           <td class="paramtype">uint16_t&#160;</td>
1337           <td class="paramname"><em>value</em>, </td>
1338         </tr>
1339         <tr>
1340           <td class="paramkey"></td>
1341           <td></td>
1342           <td class="paramtype">volatile uint16_t *&#160;</td>
1343           <td class="paramname"><em>addr</em>&#160;</td>
1344         </tr>
1345         <tr>
1346           <td></td>
1347           <td>)</td>
1348           <td></td><td></td>
1349         </tr>
1350       </table>
1351 </div><div class="memdoc">
1352
1353 <p>STR Exclusive (16 bit) [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
1354 <p>This function executed an exclusive STR command for 16 bit values [not for Cortex-M0, Cortex-M0+, or SC000].</p>
1355 <dl class="params"><dt>Parameters</dt><dd>
1356   <table class="params">
1357     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
1358     <tr><td class="paramdir">[in]</td><td class="paramname">*addr</td><td>Pointer to location </td></tr>
1359   </table>
1360   </dd>
1361 </dl>
1362 <dl class="section return"><dt>Returns</dt><dd>0 Function succeeded </dd>
1363 <dd>
1364 1 Function failed </dd></dl>
1365
1366 </div>
1367 </div>
1368 <a id="ga335deaaa7991490e1450cb7d1e4c5197" name="ga335deaaa7991490e1450cb7d1e4c5197"></a>
1369 <h2 class="memtitle"><span class="permalink"><a href="#ga335deaaa7991490e1450cb7d1e4c5197">&#9670;&#160;</a></span>__STREXW()</h2>
1370
1371 <div class="memitem">
1372 <div class="memproto">
1373       <table class="memname">
1374         <tr>
1375           <td class="memname">uint32_t __STREXW </td>
1376           <td>(</td>
1377           <td class="paramtype">uint32_t&#160;</td>
1378           <td class="paramname"><em>value</em>, </td>
1379         </tr>
1380         <tr>
1381           <td class="paramkey"></td>
1382           <td></td>
1383           <td class="paramtype">volatile uint32_t *&#160;</td>
1384           <td class="paramname"><em>addr</em>&#160;</td>
1385         </tr>
1386         <tr>
1387           <td></td>
1388           <td>)</td>
1389           <td></td><td></td>
1390         </tr>
1391       </table>
1392 </div><div class="memdoc">
1393
1394 <p>STR Exclusive (32 bit) [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
1395 <p>This function executed an exclusive STR command for 32 bit values [not for Cortex-M0, Cortex-M0+, or SC000].</p>
1396 <dl class="params"><dt>Parameters</dt><dd>
1397   <table class="params">
1398     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
1399     <tr><td class="paramdir">[in]</td><td class="paramname">*addr</td><td>Pointer to location </td></tr>
1400   </table>
1401   </dd>
1402 </dl>
1403 <dl class="section return"><dt>Returns</dt><dd>0 Function succeeded </dd>
1404 <dd>
1405 1 Function failed </dd></dl>
1406
1407 </div>
1408 </div>
1409 <a id="ga2b5d93b8e461755b1072a03df3f1722e" name="ga2b5d93b8e461755b1072a03df3f1722e"></a>
1410 <h2 class="memtitle"><span class="permalink"><a href="#ga2b5d93b8e461755b1072a03df3f1722e">&#9670;&#160;</a></span>__STRHT()</h2>
1411
1412 <div class="memitem">
1413 <div class="memproto">
1414       <table class="memname">
1415         <tr>
1416           <td class="memname">void __STRHT </td>
1417           <td>(</td>
1418           <td class="paramtype">uint16_t&#160;</td>
1419           <td class="paramname"><em>value</em>, </td>
1420         </tr>
1421         <tr>
1422           <td class="paramkey"></td>
1423           <td></td>
1424           <td class="paramtype">uint16_t&#160;</td>
1425           <td class="paramname"><em>ptr</em>&#160;</td>
1426         </tr>
1427         <tr>
1428           <td></td>
1429           <td>)</td>
1430           <td></td><td></td>
1431         </tr>
1432       </table>
1433 </div><div class="memdoc">
1434
1435 <p>STRT Unprivileged (16 bit) </p>
1436 <p>This function executed an Unprivileged STRT command for 16 bit values.</p>
1437 <dl class="params"><dt>Parameters</dt><dd>
1438   <table class="params">
1439     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
1440     <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr>
1441   </table>
1442   </dd>
1443 </dl>
1444
1445 </div>
1446 </div>
1447 <a id="ga625bc4ac0b1d50de9bcd13d9f050030e" name="ga625bc4ac0b1d50de9bcd13d9f050030e"></a>
1448 <h2 class="memtitle"><span class="permalink"><a href="#ga625bc4ac0b1d50de9bcd13d9f050030e">&#9670;&#160;</a></span>__STRT()</h2>
1449
1450 <div class="memitem">
1451 <div class="memproto">
1452       <table class="memname">
1453         <tr>
1454           <td class="memname">void __STRT </td>
1455           <td>(</td>
1456           <td class="paramtype">uint32_t&#160;</td>
1457           <td class="paramname"><em>value</em>, </td>
1458         </tr>
1459         <tr>
1460           <td class="paramkey"></td>
1461           <td></td>
1462           <td class="paramtype">uint32_t&#160;</td>
1463           <td class="paramname"><em>ptr</em>&#160;</td>
1464         </tr>
1465         <tr>
1466           <td></td>
1467           <td>)</td>
1468           <td></td><td></td>
1469         </tr>
1470       </table>
1471 </div><div class="memdoc">
1472
1473 <p>STRT Unprivileged (32 bit) </p>
1474 <p>This function executed an Unprivileged STRT command for 32 bit values.</p>
1475 <dl class="params"><dt>Parameters</dt><dd>
1476   <table class="params">
1477     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
1478     <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr>
1479   </table>
1480   </dd>
1481 </dl>
1482
1483 </div>
1484 </div>
1485 <a id="ga9ba87371aebd17dd6244ed3458b29b5d" name="ga9ba87371aebd17dd6244ed3458b29b5d"></a>
1486 <h2 class="memtitle"><span class="permalink"><a href="#ga9ba87371aebd17dd6244ed3458b29b5d">&#9670;&#160;</a></span>__USAT()</h2>
1487
1488 <div class="memitem">
1489 <div class="memproto">
1490       <table class="memname">
1491         <tr>
1492           <td class="memname">uint32_t __USAT </td>
1493           <td>(</td>
1494           <td class="paramtype">int32_t&#160;</td>
1495           <td class="paramname"><em>value</em>, </td>
1496         </tr>
1497         <tr>
1498           <td class="paramkey"></td>
1499           <td></td>
1500           <td class="paramtype">uint32_t&#160;</td>
1501           <td class="paramname"><em>sat</em>&#160;</td>
1502         </tr>
1503         <tr>
1504           <td></td>
1505           <td>)</td>
1506           <td></td><td></td>
1507         </tr>
1508       </table>
1509 </div><div class="memdoc">
1510
1511 <p>Unsigned Saturate. </p>
1512 <p>This function saturates an unsigned value. The Q bit is set if saturation occurs [not for Cortex-M0, Cortex-M0+, or SC000].</p>
1513 <p>On Armv6-M (Cortex-M0, Cortex-M0+, and SC000) this function is not available as a core instruction instruction and thus __USAT is implemented in software.</p>
1514 <dl class="params"><dt>Parameters</dt><dd>
1515   <table class="params">
1516     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to be saturated </td></tr>
1517     <tr><td class="paramdir">[in]</td><td class="paramname">sat</td><td>Bit position to saturate to [0..31] </td></tr>
1518   </table>
1519   </dd>
1520 </dl>
1521 <dl class="section return"><dt>Returns</dt><dd>Saturated value </dd></dl>
1522
1523 </div>
1524 </div>
1525 <a id="gad3efec76c3bfa2b8528ded530386c563" name="gad3efec76c3bfa2b8528ded530386c563"></a>
1526 <h2 class="memtitle"><span class="permalink"><a href="#gad3efec76c3bfa2b8528ded530386c563">&#9670;&#160;</a></span>__WFE()</h2>
1527
1528 <div class="memitem">
1529 <div class="memproto">
1530       <table class="memname">
1531         <tr>
1532           <td class="memname">void __WFE </td>
1533           <td>(</td>
1534           <td class="paramtype">void&#160;</td>
1535           <td class="paramname"></td><td>)</td>
1536           <td></td>
1537         </tr>
1538       </table>
1539 </div><div class="memdoc">
1540
1541 <p>Wait For Event. </p>
1542 <p>Wait For Event is a hint instruction that permits the processor to enter a low-power state until an events occurs: </p><ul>
1543 <li>If the <b>event register is 0</b>, then WFE suspends execution until one of the following events occurs:<ul>
1544 <li>An exception, unless masked by the exception mask registers or the current priority level.</li>
1545 <li>An exception enters the Pending state, if SEVONPEND in the System Control Register is set.</li>
1546 <li>A Debug Entry request, if Debug is enabled.</li>
1547 <li>An event signaled by a peripheral or another processor in a multiprocessor system using the SEV instruction.</li>
1548 </ul>
1549 </li>
1550 </ul>
1551 <ul>
1552 <li>If the <b>event register is 1</b>, then WFE clears it to 0 and returns immediately. </li>
1553 </ul>
1554
1555 </div>
1556 </div>
1557 <a id="gaed91dfbf3d7d7b7fba8d912fcbeaad88" name="gaed91dfbf3d7d7b7fba8d912fcbeaad88"></a>
1558 <h2 class="memtitle"><span class="permalink"><a href="#gaed91dfbf3d7d7b7fba8d912fcbeaad88">&#9670;&#160;</a></span>__WFI()</h2>
1559
1560 <div class="memitem">
1561 <div class="memproto">
1562       <table class="memname">
1563         <tr>
1564           <td class="memname">void __WFI </td>
1565           <td>(</td>
1566           <td class="paramtype">void&#160;</td>
1567           <td class="paramname"></td><td>)</td>
1568           <td></td>
1569         </tr>
1570       </table>
1571 </div><div class="memdoc">
1572
1573 <p>Wait For Interrupt. </p>
1574 <p>WFI is a hint instruction that suspends execution until one of the following events occurs:</p><ul>
1575 <li>A non-masked interrupt occurs and is taken.</li>
1576 <li>An interrupt masked by PRIMASK becomes pending.</li>
1577 <li>A Debug Entry request. </li>
1578 </ul>
1579
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