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  46    <div id="projectname">CMSIS-Core (Cortex-A)
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 131 <a href="#groups">Content</a> &#124;
 132 <a href="#nested-classes">Data Structures</a> &#124;
 133 <a href="#func-members">Functions</a>  </div>
 134   <div class="headertitle"><div class="title">Current Program Status Register (CPSR)<div class="ingroups"><a class="el" href="group__CMSIS__core__register.html">Core Register Access</a></div></div></div>
 135 </div><!--header-->
 136 <div class="contents">
 137
 138 <p>The Current Program Status Register (CPSR) holds processor status and control information.
 139 <a href="#details">More...</a></p>
 140 <table class="memberdecls">
 141 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="groups" name="groups"></a>
 142 Content</h2></td></tr>
 143 <tr class="memitem:group__CMSIS__CPSR__BITS"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html">CPSR Bits</a></td></tr>
 144 <tr class="memdesc:group__CMSIS__CPSR__BITS"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit position and mask macros. <br /></td></tr>
 145 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 146 <tr class="memitem:group__CMSIS__CPSR__M"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__M.html">CPSR M field values</a></td></tr>
 147 <tr class="memdesc:group__CMSIS__CPSR__M"><td class="mdescLeft">&#160;</td><td class="mdescRight">Valid values for CPSR M field. <br /></td></tr>
 148 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 149 </table><table class="memberdecls">
 150 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="nested-classes" name="nested-classes"></a>
 151 Data Structures</h2></td></tr>
 152 <tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionCPSR__Type.html">CPSR_Type</a></td></tr>
 153 <tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit field declaration for CPSR layout.  <a href="unionCPSR__Type.html#details">More...</a><br /></td></tr>
 154 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 155 </table><table class="memberdecls">
 156 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
 157 Functions</h2></td></tr>
 158 <tr class="memitem:gaa4bddbd2091b8fb234ae43d290e69e78"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armclang__a_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR.html#gaa4bddbd2091b8fb234ae43d290e69e78">__get_CPSR</a> (void)</td></tr>
 159 <tr class="memdesc:gaa4bddbd2091b8fb234ae43d290e69e78"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get CPSR Register.  <br /></td></tr>
 160 <tr class="separator:gaa4bddbd2091b8fb234ae43d290e69e78"><td class="memSeparator" colspan="2">&#160;</td></tr>
 161 <tr class="memitem:ga48f0cfea7413b74bd90986762383c1cd"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armclang__a_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR.html#ga48f0cfea7413b74bd90986762383c1cd">__set_CPSR</a> (uint32_t cpsr)</td></tr>
 162 <tr class="memdesc:ga48f0cfea7413b74bd90986762383c1cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set CPSR Register.  <br /></td></tr>
 163 <tr class="separator:ga48f0cfea7413b74bd90986762383c1cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
 164 </table>
 165 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 166 <p>The Current Program Status Register (CPSR) holds processor status and control information. </p>
 167 <p>The individual register bits have the following meaning:</p>
 168 <table class="markdownTable">
 169 <tr class="markdownTableHead">
 170 <th class="markdownTableHeadLeft">Bits   </th><th class="markdownTableHeadLeft">Name   </th><th class="markdownTableHeadLeft">Function    </th></tr>
 171 <tr class="markdownTableRowOdd">
 172 <td class="markdownTableBodyLeft">[31]   </td><td class="markdownTableBodyLeft">N   </td><td class="markdownTableBodyLeft">Negative condition code flag    </td></tr>
 173 <tr class="markdownTableRowEven">
 174 <td class="markdownTableBodyLeft">[30]   </td><td class="markdownTableBodyLeft">Z   </td><td class="markdownTableBodyLeft">Zero condition code flag    </td></tr>
 175 <tr class="markdownTableRowOdd">
 176 <td class="markdownTableBodyLeft">[29]   </td><td class="markdownTableBodyLeft">C   </td><td class="markdownTableBodyLeft">Carry condition code flag    </td></tr>
 177 <tr class="markdownTableRowEven">
 178 <td class="markdownTableBodyLeft">[28]   </td><td class="markdownTableBodyLeft">V   </td><td class="markdownTableBodyLeft">Overflow condition code flag    </td></tr>
 179 <tr class="markdownTableRowOdd">
 180 <td class="markdownTableBodyLeft">[27]   </td><td class="markdownTableBodyLeft">Q   </td><td class="markdownTableBodyLeft">Cumulative saturation bit    </td></tr>
 181 <tr class="markdownTableRowEven">
 182 <td class="markdownTableBodyLeft">[26:25]   </td><td class="markdownTableBodyLeft">IT[1:0]   </td><td class="markdownTableBodyLeft">If-Then execution state bits for the Thumb IT (If-Then) instruction    </td></tr>
 183 <tr class="markdownTableRowOdd">
 184 <td class="markdownTableBodyLeft">[24]   </td><td class="markdownTableBodyLeft">J   </td><td class="markdownTableBodyLeft">Jazelle bit    </td></tr>
 185 <tr class="markdownTableRowEven">
 186 <td class="markdownTableBodyLeft">[19:16]   </td><td class="markdownTableBodyLeft">GE   </td><td class="markdownTableBodyLeft">Greater than or Equal flags    </td></tr>
 187 <tr class="markdownTableRowOdd">
 188 <td class="markdownTableBodyLeft">[15:10]   </td><td class="markdownTableBodyLeft">IT[7:2]   </td><td class="markdownTableBodyLeft">If-Then execution state bits for the Thumb IT (If-Then) instruction    </td></tr>
 189 <tr class="markdownTableRowEven">
 190 <td class="markdownTableBodyLeft">[9]   </td><td class="markdownTableBodyLeft">E   </td><td class="markdownTableBodyLeft">Endianness execution state bit: 0 - Little-endian, 1 - Big-endian    </td></tr>
 191 <tr class="markdownTableRowOdd">
 192 <td class="markdownTableBodyLeft">[8]   </td><td class="markdownTableBodyLeft">A   </td><td class="markdownTableBodyLeft">Asynchronous abort mask bit    </td></tr>
 193 <tr class="markdownTableRowEven">
 194 <td class="markdownTableBodyLeft">[7]   </td><td class="markdownTableBodyLeft">I   </td><td class="markdownTableBodyLeft">IRQ mask bit    </td></tr>
 195 <tr class="markdownTableRowOdd">
 196 <td class="markdownTableBodyLeft">[6]   </td><td class="markdownTableBodyLeft">F   </td><td class="markdownTableBodyLeft">FIRQ mask bit    </td></tr>
 197 <tr class="markdownTableRowEven">
 198 <td class="markdownTableBodyLeft">[5]   </td><td class="markdownTableBodyLeft">T   </td><td class="markdownTableBodyLeft">Thumb execution state bit    </td></tr>
 199 <tr class="markdownTableRowOdd">
 200 <td class="markdownTableBodyLeft">[4:0]   </td><td class="markdownTableBodyLeft">M   </td><td class="markdownTableBodyLeft"><a class="el" href="group__CMSIS__CPSR__M.html">Mode field</a>   </td></tr>
 201 </table>
 202 <p>Consider using <a class="el" href="group__CMSIS__CPSR.html#gaa4bddbd2091b8fb234ae43d290e69e78">__get_CPSR</a> and <a class="el" href="group__CMSIS__CPSR.html#ga48f0cfea7413b74bd90986762383c1cd">__set_CPSR</a> for accessing this register. </p>
 203 <h2 class="groupheader">Function Documentation</h2>
 204 <a id="gaa4bddbd2091b8fb234ae43d290e69e78" name="gaa4bddbd2091b8fb234ae43d290e69e78"></a>
 205 <h2 class="memtitle"><span class="permalink"><a href="#gaa4bddbd2091b8fb234ae43d290e69e78">&#9670;&#160;</a></span>__get_CPSR()</h2>
 206
 207 <div class="memitem">
 208 <div class="memproto">
 209       <table class="memname">
 210         <tr>
 211           <td class="memname"><a class="el" href="cmsis__armclang__a_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> uint32_t __get_CPSR </td>
 212           <td>(</td>
 213           <td class="paramtype">void&#160;</td>
 214           <td class="paramname"></td><td>)</td>
 215           <td></td>
 216         </tr>
 217       </table>
 218 </div><div class="memdoc">
 219
 220 <p>Get CPSR Register. </p>
 221 <dl class="section return"><dt>Returns</dt><dd>CPSR Register value</dd></dl>
 222 <p>This function returns the content of the <a class="el" href="group__CMSIS__CPSR.html">Current Program Status Register (CPSR)</a>. </p>
 223
 224 </div>
 225 </div>
 226 <a id="ga48f0cfea7413b74bd90986762383c1cd" name="ga48f0cfea7413b74bd90986762383c1cd"></a>
 227 <h2 class="memtitle"><span class="permalink"><a href="#ga48f0cfea7413b74bd90986762383c1cd">&#9670;&#160;</a></span>__set_CPSR()</h2>
 228
 229 <div class="memitem">
 230 <div class="memproto">
 231       <table class="memname">
 232         <tr>
 233           <td class="memname"><a class="el" href="cmsis__armclang__a_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void __set_CPSR </td>
 234           <td>(</td>
 235           <td class="paramtype">uint32_t&#160;</td>
 236           <td class="paramname"><em>cpsr</em></td><td>)</td>
 237           <td></td>
 238         </tr>
 239       </table>
 240 </div><div class="memdoc">
 241
 242 <p>Set CPSR Register. </p>
 243 <dl class="params"><dt>Parameters</dt><dd>
 244   <table class="params">
 245     <tr><td class="paramdir">[in]</td><td class="paramname">cpsr</td><td>CPSR value to set</td></tr>
 246   </table>
 247   </dd>
 248 </dl>
 249 <p>This function assigns the given value to the <a class="el" href="group__CMSIS__CPSR.html">Current Program Status Register (CPSR)</a>. </p>
 250
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