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 132   <div class="headertitle"><div class="title">Interrupts and Exceptions</div></div>
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 135
 136 <p>Generic functions to access the Interrupt Controller.
 137 <a href="#details">More...</a></p>
 138 <table class="memberdecls">
 139 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="groups" name="groups"></a>
 140 Content</h2></td></tr>
 141 <tr class="memitem:group__irq__mode__defs"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__mode__defs.html">IRQ Mode Bit-Masks</a></td></tr>
 142 <tr class="memdesc:group__irq__mode__defs"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure interrupt line mode. <br /></td></tr>
 143 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 144 <tr class="memitem:group__irq__priority__defs"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__irq__priority__defs.html">IRQ Priority Bit-Masks</a></td></tr>
 145 <tr class="memdesc:group__irq__priority__defs"><td class="mdescLeft">&#160;</td><td class="mdescRight">Definitions used by interrupt priority functions. <br /></td></tr>
 146 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 147 </table>
 148 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 149 <p>This section describes the device agnostic interrupt API viable for a wide range of specific interrupt controllers. The IRQ Controller API allows interrupt dependend applications to be easily portable across a wide range of controllers.</p>
 150 <dl class="section note"><dt>Note</dt><dd>The default implementation for <a class="el" href="group__GIC__functions.html">Arm GIC (Generic Interrupt Controller)</a> can be found in irq_ctrl_gic.c. It uses <code>weak</code> functions thus it can easily be overwritten by an alternative user implementation if needed.</dd></dl>
 151 <p>The Armv7-A architecture defines a common set of first level exceptions, see table below.</p>
 152 <table class="markdownTable">
 153 <tr class="markdownTableHead">
 154 <th class="markdownTableHeadNone">Exception   </th><th class="markdownTableHeadNone">CMSIS Handler   </th><th class="markdownTableHeadNone">Offset   </th><th class="markdownTableHeadNone">Description    </th></tr>
 155 <tr class="markdownTableRowOdd">
 156 <td class="markdownTableBodyNone">Reset   </td><td class="markdownTableBodyNone">Reset_Handler   </td><td class="markdownTableBodyNone">0x0000   </td><td class="markdownTableBodyNone">First instruction executed after reset.    </td></tr>
 157 <tr class="markdownTableRowEven">
 158 <td class="markdownTableBodyNone">Undefined Instruction (Undef)   </td><td class="markdownTableBodyNone">Undef_Handler   </td><td class="markdownTableBodyNone">0x0004   </td><td class="markdownTableBodyNone">Signals usage of an illegal instructions.    </td></tr>
 159 <tr class="markdownTableRowOdd">
 160 <td class="markdownTableBodyNone">Supervisor Call (SVC)   </td><td class="markdownTableBodyNone">SVC_Handler   </td><td class="markdownTableBodyNone">0x0008   </td><td class="markdownTableBodyNone">Issued by software using SVC instruction.    </td></tr>
 161 <tr class="markdownTableRowEven">
 162 <td class="markdownTableBodyNone">Prefetch Abort (PAbt)   </td><td class="markdownTableBodyNone">PAbt_Handler   </td><td class="markdownTableBodyNone">0x000C   </td><td class="markdownTableBodyNone">Signals a memory abort on istruction fetch.    </td></tr>
 163 <tr class="markdownTableRowOdd">
 164 <td class="markdownTableBodyNone">Data Abort (DAbt)   </td><td class="markdownTableBodyNone">DAbt_Handler   </td><td class="markdownTableBodyNone">0x0010   </td><td class="markdownTableBodyNone">Signals a memory abort on data read or write.    </td></tr>
 165 <tr class="markdownTableRowEven">
 166 <td class="markdownTableBodyNone">Hyp Trap   </td><td class="markdownTableBodyNone">(NOP)   </td><td class="markdownTableBodyNone">0x0014   </td><td class="markdownTableBodyNone">Hypervisor instruction trap, only available with Virtualization Extensions.    </td></tr>
 167 <tr class="markdownTableRowOdd">
 168 <td class="markdownTableBodyNone">IRQ interrupt   </td><td class="markdownTableBodyNone">IRQ_Handler   </td><td class="markdownTableBodyNone">0x0018   </td><td class="markdownTableBodyNone">Interrupt Request (typically from Interrupt Controller)    </td></tr>
 169 <tr class="markdownTableRowEven">
 170 <td class="markdownTableBodyNone">FIQ interrupt   </td><td class="markdownTableBodyNone">FIQ_Handler   </td><td class="markdownTableBodyNone">0x001C   </td><td class="markdownTableBodyNone">Fast Interrupt Request (typically from Interrupt Controller)   </td></tr>
 171 </table>
 172 <p>By default those handlers are defined as weak empty functions by the <a class="el" href="startup_c_pg.html#startup_c_sec">device specific startup code</a>. Software and peripheral interrupts are all handled by one of the both central interrupt handlers (IRQ and FIQ). These needs to be implemented application specific. If an RTOS is used the interrupt handlers are typically provided by the RTOS, e.g. when using <a href="../../RTOS2/html/rtx5_impl.html">RTX5</a>.</p>
 173 <p>The interrupts available depends on the actual device in use. According to CMSIS specification the interrupts are defined as IRQn_Type in <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a>. Using the generic IRQ API one can easily enable and disable interrupts, set up priorities, modes and preemption rules, and register interrupt callbacks.</p>
 174 <p><b>Example:</b> </p>
 175 <div class="fragment"><div class="line"><span class="keywordtype">void</span> SGI0_Handler() {</div>
 176 <div class="line">  <span class="comment">/* </span></div>
 177 <div class="line"><span class="comment">   * Handle Interrupt </span></div>
 178 <div class="line"><span class="comment">   */</span></div>
 179 <div class="line">  </div>
 180 <div class="line">  IRQ_ClearPending((IRQn_ID_t)SGI0_IRQn);</div>
 181 <div class="line">}</div>
 182 <div class="line"> </div>
 183 <div class="line"><span class="keywordtype">void</span> main() {</div>
 184 <div class="line">  <span class="comment">/* Initialize the Interrupt Controller */</span></div>
 185 <div class="line">  IRQ_Initialize();</div>
 186 <div class="line">  </div>
 187 <div class="line">  <span class="comment">/* Register the user defined handler function */</span></div>
 188 <div class="line">  IRQ_SetHandler((IRQn_ID_t)SGI0_IRQn, SGI0_Handler);  </div>
 189 <div class="line">  </div>
 190 <div class="line">  <span class="comment">/* Set the priority considering the priority grouping */</span></div>
 191 <div class="line">  <span class="keyword">const</span> uint32_t subprio = IRQ_GetPriorityGroupBits();</div>
 192 <div class="line">  IRQ_SetPriority((IRQn_ID_t)SGI0_IRQn, 1u &lt;&lt; subprio);</div>
 193 <div class="line">  </div>
 194 <div class="line">  <span class="comment">/* Set interrupt mode to falling edge */</span></div>
 195 <div class="line">  IRQ_SetMode((IRQn_ID_t)SGI0_IRQn, IRQ_MODE_TYPE_IRQ | IRQ_MODE_CPU_0 | IRQ_MODE_TRIG_EDGE | IRQ_MODE_TRIG_EDGE_FALLING);</div>
 196 <div class="line">  </div>
 197 <div class="line">  IRQ_Enable((IRQn_ID_t)SGI0_IRQn);</div>
 198 <div class="line">  </div>
 199 <div class="line">  <span class="comment">/* Trigger interrupt */</span></div>
 200 <div class="line">  IRQ_SetPending((IRQn_ID_t)SGI0_IRQn);</div>
 201 <div class="line">  </div>
 202 <div class="line">  IRQ_Disable((IRQn_ID_t)SGI0_IRQn);</div>
 203 <div class="line">}</div>
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