begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.7.0-dev0">
  12       Active development...
  13       CMSIS-Core(M): 5.4.0 (see revision history for details)
  14        - Enhanced MVE support for Armv8.1-MML
  15     </release>
  16     <release version="5.6.0" date="2019-07-10">
  17       CMSIS-Core(M): 5.3.0 (see revision history for details)
  18        - Added provisions for compiler-independent C startup code.
  19       CMSIS-Core(A): 1.1.4 (see revision history for details)
  20        - Fixed __FPU_Enable.
  21       CMSIS-DSP: 1.7.0 (see revision history for details)
  22         - New Neon versions of f32 functions
  23         - Python wrapper
  24         - Preliminary cmake build
  25         - Compilation flags for FFTs
  26         - Changes to arm_math.h
  27       CMSIS-NN: 1.2.0 (see revision history for details)
  28         - New function for depthwise convolution with asymmetric quantization.
  29         - New support functions for requantization.
  30       CMSIS-RTOS:
  31         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  32       CMSIS-RTOS2:
  33         - RTX 5.5.1 (see revision history for details)
  34       CMSIS-Driver: 2.7.1
  35         - WiFi Interface API 1.0.0
  36       Devices:
  37        - Generalized C startup code for all Cortex-M familiy devices.
  38        - Updated Cortex-A default memory regions and MMU configurations
  39        - Moved Cortex-A memory and system config files to avoid include path issues
  40     </release>
  41     <release version="5.5.1" date="2019-03-20">
  42       The following folders are deprecated
  43         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  44
  45       CMSIS-Core(M): 5.2.1 (see revision history for details)
  46         - Fixed compilation issue in cmsis_armclang_ltm.h
  47     </release>
  48     <release version="5.5.0" date="2019-03-18">
  49       The following folders have been removed:
  50         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  51         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  52       The following folders are deprecated
  53         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  54
  55       CMSIS-Core(M): 5.2.0 (see revision history for details)
  56         - Reworked Stack/Heap configuration for ARM startup files.
  57         - Added Cortex-M35P device support.
  58         - Added generic Armv8.1-M Mainline device support.
  59       CMSIS-Core(A): 1.1.3 (see revision history for details)
  60       CMSIS-DSP: 1.6.0 (see revision history for details)
  61         - reworked DSP library source files
  62         - reworked DSP library documentation
  63         - Changed DSP folder structure
  64         - moved DSP libraries to folder ./DSP/Lib
  65         - ARM DSP Libraries are built with ARMCLANG
  66         - Added DSP Libraries Source variant
  67       CMSIS-RTOS2:
  68         - RTX 5.5.0 (see revision history for details)
  69       CMSIS-Driver: 2.7.0
  70         - Added WiFi Interface API 1.0.0-beta
  71         - Added components for project specific driver implementations
  72       CMSIS-Pack: 1.6.0 (see revision history for details)
  73       Devices:
  74         - Added Cortex-M35P and ARMv81MML device templates.
  75         - Fixed C-Startup Code for GCC (aligned with other compilers)
  76       Utilities:
  77         - SVDConv 3.3.25
  78         - PackChk 1.3.82
  79     </release>
  80     <release version="5.4.0" date="2018-08-01">
  81       Aligned pack structure with repository.
  82       The following folders are deprecated:
  83         - CMSIS/Include/
  84         - CMSIS/DSP_Lib/
  85
  86       CMSIS-Core(M): 5.1.2 (see revision history for details)
  87         - Added Cortex-M1 support (beta).
  88       CMSIS-Core(A): 1.1.2 (see revision history for details)
  89       CMSIS-NN: 1.1.0
  90         - Added new math functions.
  91       CMSIS-RTOS2:
  92         - API 2.1.3 (see revision history for details)
  93         - RTX 5.4.0 (see revision history for details)
  94           * Updated exception handling on Cortex-A
  95       CMSIS-Driver:
  96         - Flash Driver API V2.2.0
  97       Utilities:
  98         - SVDConv 3.3.21
  99         - PackChk 1.3.71
 100     </release>
 101     <release version="5.3.0" date="2018-02-22">
 102       Updated Arm company brand.
 103       CMSIS-Core(M): 5.1.1 (see revision history for details)
 104       CMSIS-Core(A): 1.1.1 (see revision history for details)
 105       CMSIS-DAP: 2.0.0 (see revision history for details)
 106       CMSIS-NN: 1.0.0
 107         - Initial contribution of the bare metal Neural Network Library.
 108       CMSIS-RTOS2:
 109         - RTX 5.3.0 (see revision history for details)
 110         - OS Tick API 1.0.1
 111     </release>
 112     <release version="5.2.0" date="2017-11-16">
 113       CMSIS-Core(M): 5.1.0 (see revision history for details)
 114         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 115         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 116       CMSIS-Core(A): 1.1.0 (see revision history for details)
 117         - Added compiler_iccarm.h.
 118         - Added additional access functions for physical timer.
 119       CMSIS-DAP: 1.2.0 (see revision history for details)
 120       CMSIS-DSP: 1.5.2 (see revision history for details)
 121       CMSIS-Driver: 2.6.0 (see revision history for details)
 122         - CAN Driver API V1.2.0
 123         - NAND Driver API V2.3.0
 124       CMSIS-RTOS:
 125         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 126       CMSIS-RTOS2:
 127         - API 2.1.2 (see revision history for details)
 128         - RTX 5.2.3 (see revision history for details)
 129       Devices:
 130         - Added GCC startup and linker script for Cortex-A9.
 131         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 132         - Added IAR startup code for Cortex-A9
 133     </release>
 134     <release version="5.1.1" date="2017-09-19">
 135       CMSIS-RTOS2:
 136       - RTX 5.2.1 (see revision history for details)
 137     </release>
 138     <release version="5.1.0" date="2017-08-04">
 139       CMSIS-Core(M): 5.0.2 (see revision history for details)
 140       - Changed Version Control macros to be core agnostic.
 141       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 142       CMSIS-Core(A): 1.0.0 (see revision history for details)
 143       - Initial release
 144       - IRQ Controller API 1.0.0
 145       CMSIS-Driver: 2.05 (see revision history for details)
 146       - All typedefs related to status have been made volatile.
 147       CMSIS-RTOS2:
 148       - API 2.1.1 (see revision history for details)
 149       - RTX 5.2.0 (see revision history for details)
 150       - OS Tick API 1.0.0
 151       CMSIS-DSP: 1.5.2 (see revision history for details)
 152       - Fixed GNU Compiler specific diagnostics.
 153       CMSIS-Pack: 1.5.0 (see revision history for details)
 154       - added System Description File (*.SDF) Format
 155       CMSIS-Zone: 0.0.1 (Preview)
 156       - Initial specification draft
 157     </release>
 158     <release version="5.0.1" date="2017-02-03">
 159       Package Description:
 160       - added taxonomy for Cclass RTOS
 161       CMSIS-RTOS2:
 162       - API 2.1   (see revision history for details)
 163       - RTX 5.1.0 (see revision history for details)
 164       CMSIS-Core: 5.0.1 (see revision history for details)
 165       - Added __PACKED_STRUCT macro
 166       - Added uVisior support
 167       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 168       - Updated template for secure main function (main_s.c)
 169       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 170       CMSIS-DSP: 1.5.1 (see revision history for details)
 171       - added ARMv8M DSP libraries.
 172       CMSIS-Pack:1.4.9 (see revision history for details)
 173       - added Pack Index File specification and schema file
 174     </release>
 175     <release version="5.0.0" date="2016-11-11">
 176       Changed open source license to Apache 2.0
 177       CMSIS_Core:
 178        - Added support for Cortex-M23 and Cortex-M33.
 179        - Added ARMv8-M device configurations for mainline and baseline.
 180        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 181        - Added cmsis_compiler.h to unify compiler behaviour.
 182        - Updated function SCB_EnableICache (for Cortex-M7).
 183        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 184       CMSIS-RTOS:
 185         - bug fix in RTX 4.82 (see revision history for details)
 186       CMSIS-RTOS2:
 187         - new API including compatibility layer to CMSIS-RTOS
 188         - reference implementation based on RTX5
 189         - supports all Cortex-M variants including TrustZone for ARMv8-M
 190       CMSIS-SVD:
 191        - reworked SVD format documentation
 192        - removed SVD file database documentation as SVD files are distributed in packs
 193        - updated SVDConv for Win32 and Linux
 194       CMSIS-DSP:
 195        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 196        - Added DSP libraries build projects to CMSIS pack.
 197     </release>
 198     <release version="4.5.0" date="2015-10-28">
 199       - CMSIS-Core     4.30.0  (see revision history for details)
 200       - CMSIS-DAP      1.1.0   (unchanged)
 201       - CMSIS-Driver   2.04.0  (see revision history for details)
 202       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 203       - CMSIS-Pack     1.4.1   (see revision history for details)
 204       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 205       - CMSIS-SVD      1.3.1   (see revision history for details)
 206     </release>
 207     <release version="4.4.0" date="2015-09-11">
 208       - CMSIS-Core     4.20   (see revision history for details)
 209       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 210       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 211       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 212       - CMSIS-RTOS
 213         -- API         1.02   (unchanged)
 214         -- RTX         4.79   (see revision history for details)
 215       - CMSIS-SVD      1.3.0  (see revision history for details)
 216       - CMSIS-DAP      1.1.0  (extended with SWO support)
 217     </release>
 218     <release version="4.3.0" date="2015-03-20">
 219       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 220       - CMSIS-DSP      1.4.5  (see revision history for details)
 221       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 222       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 223       - CMSIS-RTOS
 224         -- API         1.02   (unchanged)
 225         -- RTX         4.78   (see revision history for details)
 226       - CMSIS-SVD      1.2    (unchanged)
 227     </release>
 228     <release version="4.2.0" date="2014-09-24">
 229       Adding Cortex-M7 support
 230       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 231       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 232       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 233       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 234       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 235     </release>
 236     <release version="4.1.1" date="2014-06-30">
 237       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 238     </release>
 239     <release version="4.1.0" date="2014-06-12">
 240       - CMSIS-Driver   2.02  (incompatible update)
 241       - CMSIS-Pack     1.3   (see revision history for details)
 242       - CMSIS-DSP      1.4.2 (unchanged)
 243       - CMSIS-Core     3.30  (unchanged)
 244       - CMSIS-RTOS RTX 4.74  (unchanged)
 245       - CMSIS-RTOS API 1.02  (unchanged)
 246       - CMSIS-SVD      1.10  (unchanged)
 247       PACK:
 248       - removed G++ specific files from PACK
 249       - added Component Startup variant "C Startup"
 250       - added Pack Checking Utility
 251       - updated conditions to reflect tool-chain dependency
 252       - added Taxonomy for Graphics
 253       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 254     </release>
 255     <!-- release version="4.0.0">
 256       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 257       - CMSIS-Pack     1.1   Preliminary
 258       - CMSIS-DSP      1.4.2 (see revision history for details)
 259       - CMSIS-Core     3.30  (see revision history for details)
 260       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 261       - CMSIS-RTOS API 1.02  (unchanged)
 262       - CMSIS-SVD      1.10  (unchanged)
 263     </release -->
 264     <release version="3.20.4" date="2014-02-20">
 265       - CMSIS-RTOS 4.74 (see revision history for details)
 266       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 267     </release>
 268     <!-- release version="3.20.3">
 269       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 270       - CMSIS-RTOS 4.73 (see revision history for details)
 271     </release -->
 272     <!-- release version="3.20.2">
 273       - CMSIS-Pack documentation has been added
 274       - CMSIS-Drivers header and documentation have been added to PACK
 275       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 276     </release -->
 277     <!-- release version="3.20.1">
 278       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 279       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 280     </release -->
 281     <!-- release version="3.20.0">
 282       The software portions that are deployed in the application program are now under a BSD license which allows usage
 283       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 284       The individual components have been update as listed below:
 285       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 286       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 287       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 288       - CMSIS-SVD is unchanged.
 289     </release -->
 290   </releases>
 291
 292   <taxonomy>
 293     <description Cclass="Audio">Software components for audio processing</description>
 294     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 295     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 296     <description Cclass="Compiler">Compiler Software Extensions</description>
 297     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 298     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 299     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 300     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 301     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 302     <description Cclass="File System">File Drive Support and File System</description>
 303     <description Cclass="IoT Client">IoT cloud client connector</description>
 304     <description Cclass="IoT Service">IoT specific services</description>
 305     <description Cclass="IoT Utility">IoT specific software utility</description>
 306     <description Cclass="Graphics">Graphical User Interface</description>
 307     <description Cclass="Network">Network Stack using Internet Protocols</description>
 308     <description Cclass="RTOS">Real-time Operating System</description>
 309     <description Cclass="Security">Encryption for secure communication or storage</description>
 310     <description Cclass="USB">Universal Serial Bus Stack</description>
 311     <description Cclass="Utility">Generic software utility components</description>
 312   </taxonomy>
 313
 314   <devices>
 315     <!-- ******************************  Cortex-M0  ****************************** -->
 316     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 317       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 318       <description>
 319 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 320 - simple, easy-to-use programmers model
 321 - highly efficient ultra-low power operation
 322 - excellent code density
 323 - deterministic, high-performance interrupt handling
 324 - upward compatibility with the rest of the Cortex-M processor family.
 325       </description>
 326       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 327       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 328       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 329       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 330
 331       <device Dname="ARMCM0">
 332         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 333         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 334       </device>
 335     </family>
 336
 337     <!-- ******************************  Cortex-M0P  ****************************** -->
 338     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 339       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 340       <description>
 341 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 342 - simple, easy-to-use programmers model
 343 - highly efficient ultra-low power operation
 344 - excellent code density
 345 - deterministic, high-performance interrupt handling
 346 - upward compatibility with the rest of the Cortex-M processor family.
 347       </description>
 348       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 349       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 350       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 351       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 352
 353       <device Dname="ARMCM0P">
 354         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 355         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 356       </device>
 357
 358       <device Dname="ARMCM0P_MPU">
 359         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 360         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 361       </device>
 362     </family>
 363
 364     <!-- ******************************  Cortex-M1  ****************************** -->
 365     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 366       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 367       <description>
 368 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 369 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 370       </description>
 371       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 372       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 373       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 374       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 375
 376       <device Dname="ARMCM1">
 377         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 378         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 379       </device>
 380     </family>
 381
 382     <!-- ******************************  Cortex-M3  ****************************** -->
 383     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 384       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 385       <description>
 386 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 387 - simple, easy-to-use programmers model
 388 - highly efficient ultra-low power operation
 389 - excellent code density
 390 - deterministic, high-performance interrupt handling
 391 - upward compatibility with the rest of the Cortex-M processor family.
 392       </description>
 393       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 394       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 395       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 396       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 397
 398       <device Dname="ARMCM3">
 399         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 400         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 401       </device>
 402     </family>
 403
 404     <!-- ******************************  Cortex-M4  ****************************** -->
 405     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 406       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 407       <description>
 408 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 409 - simple, easy-to-use programmers model
 410 - highly efficient ultra-low power operation
 411 - excellent code density
 412 - deterministic, high-performance interrupt handling
 413 - upward compatibility with the rest of the Cortex-M processor family.
 414       </description>
 415       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 416       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 417       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 418       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 419
 420       <device Dname="ARMCM4">
 421         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 422         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 423       </device>
 424
 425       <device Dname="ARMCM4_FP">
 426         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 427         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 428       </device>
 429     </family>
 430
 431     <!-- ******************************  Cortex-M7  ****************************** -->
 432     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 433       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 434       <description>
 435 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 436 - simple, easy-to-use programmers model
 437 - highly efficient ultra-low power operation
 438 - excellent code density
 439 - deterministic, high-performance interrupt handling
 440 - upward compatibility with the rest of the Cortex-M processor family.
 441       </description>
 442       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 443       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 444       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 445       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 446
 447       <device Dname="ARMCM7">
 448         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 449         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 450       </device>
 451
 452       <device Dname="ARMCM7_SP">
 453         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 454         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 455       </device>
 456
 457       <device Dname="ARMCM7_DP">
 458         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 459         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 460       </device>
 461     </family>
 462
 463     <!-- ******************************  Cortex-M23  ********************** -->
 464     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 465       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 466       <description>
 467 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 468 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 469 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 470       </description>
 471       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 472       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 473       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 474       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 475       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 476       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 477
 478       <device Dname="ARMCM23">
 479         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 480         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 481       </device>
 482
 483       <device Dname="ARMCM23_TZ">
 484         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 485         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 486       </device>
 487     </family>
 488
 489     <!-- ******************************  Cortex-M33  ****************************** -->
 490     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 491       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 492       <description>
 493 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 494 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 495       </description>
 496       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 497       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 498       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 499       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 500       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 501       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 502
 503       <device Dname="ARMCM33">
 504         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 505         <description>
 506           no DSP Instructions, no Floating Point Unit, no TrustZone
 507         </description>
 508         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 509       </device>
 510
 511       <device Dname="ARMCM33_TZ">
 512         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 513         <description>
 514           no DSP Instructions, no Floating Point Unit, TrustZone
 515         </description>
 516         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 517       </device>
 518
 519       <device Dname="ARMCM33_DSP_FP">
 520         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 521         <description>
 522           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 523         </description>
 524         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 525       </device>
 526
 527       <device Dname="ARMCM33_DSP_FP_TZ">
 528         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 529         <description>
 530           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 531         </description>
 532         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 533       </device>
 534     </family>
 535
 536     <!-- ******************************  Cortex-M35P  ****************************** -->
 537     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 538       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 539       <description>
 540 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 541 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 542       </description>
 543
 544       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 545       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 546       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 547       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 548       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 549       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 550
 551       <device Dname="ARMCM35P">
 552         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 553         <description>
 554           no DSP Instructions, no Floating Point Unit, no TrustZone
 555         </description>
 556         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 557       </device>
 558
 559       <device Dname="ARMCM35P_TZ">
 560         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 561         <description>
 562           no DSP Instructions, no Floating Point Unit, TrustZone
 563         </description>
 564         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 565       </device>
 566
 567       <device Dname="ARMCM35P_DSP_FP">
 568         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 569         <description>
 570           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 571         </description>
 572         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 573       </device>
 574
 575       <device Dname="ARMCM35P_DSP_FP_TZ">
 576         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 577         <description>
 578           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 579         </description>
 580         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 581       </device>
 582     </family>
 583
 584     <!-- ******************************  ARMSC000  ****************************** -->
 585     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 586       <description>
 587 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 588 - simple, easy-to-use programmers model
 589 - highly efficient ultra-low power operation
 590 - excellent code density
 591 - deterministic, high-performance interrupt handling
 592       </description>
 593       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 594       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 595       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 596       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 597
 598       <device Dname="ARMSC000">
 599         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 600         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 601       </device>
 602     </family>
 603
 604     <!-- ******************************  ARMSC300  ****************************** -->
 605     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 606       <description>
 607 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 608 - simple, easy-to-use programmers model
 609 - highly efficient ultra-low power operation
 610 - excellent code density
 611 - deterministic, high-performance interrupt handling
 612       </description>
 613       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 614       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 615       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 616       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 617
 618       <device Dname="ARMSC300">
 619         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 620         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 621       </device>
 622     </family>
 623
 624     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 625     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 626       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 627       <description>
 628 Armv8-M Baseline based device with TrustZone
 629       </description>
 630       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 631       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 632       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 633       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 634       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 635       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 636
 637       <device Dname="ARMv8MBL">
 638         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 639         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 640       </device>
 641     </family>
 642
 643     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 644     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 645       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 646       <description>
 647 Armv8-M Mainline based device with TrustZone
 648       </description>
 649       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 650       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 651       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 652       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 653       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 654       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 655
 656       <device Dname="ARMv8MML">
 657         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 658         <description>
 659           no DSP Instructions, no Floating Point Unit, TrustZone
 660         </description>
 661         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 662       </device>
 663
 664       <device Dname="ARMv8MML_DSP">
 665         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 666         <description>
 667           DSP Instructions, no Floating Point Unit, TrustZone
 668         </description>
 669         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 670       </device>
 671
 672       <device Dname="ARMv8MML_SP">
 673         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 674         <description>
 675           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 676         </description>
 677         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 678       </device>
 679
 680       <device Dname="ARMv8MML_DSP_SP">
 681         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 682         <description>
 683           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 684         </description>
 685         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 686       </device>
 687
 688       <device Dname="ARMv8MML_DP">
 689         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 690         <description>
 691           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 692         </description>
 693         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 694       </device>
 695
 696       <device Dname="ARMv8MML_DSP_DP">
 697         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 698         <description>
 699           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 700         </description>
 701         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 702       </device>
 703     </family>
 704
 705     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 706     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 707       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 708       <description>
 709 Armv8.1-M Mainline based device with TrustZone and MVE
 710       </description>
 711       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 712       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 713       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 714       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 715       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 716       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 717
 718
 719       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 720         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 721         <description>
 722           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 723         </description>
 724         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 725       </device>
 726     </family>
 727
 728     <!-- ******************************  Cortex-A5  ****************************** -->
 729     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 730       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 731       <description>
 732 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 733 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 734 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 735       </description>
 736
 737       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 738       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 739       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 740       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 741
 742       <device Dname="ARMCA5">
 743         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 744         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 745       </device>
 746     </family>
 747
 748     <!-- ******************************  Cortex-A7  ****************************** -->
 749     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 750       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 751       <description>
 752 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 753 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 754 an optional integrated GIC, and an optional L2 cache controller.
 755       </description>
 756
 757       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 758       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 759       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 760       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 761
 762       <device Dname="ARMCA7">
 763         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 764         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 765       </device>
 766     </family>
 767
 768     <!-- ******************************  Cortex-A9  ****************************** -->
 769     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 770       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 771       <description>
 772 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 773 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 774 and 8-bit Java bytecodes in Jazelle state.
 775       </description>
 776
 777       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 778       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 779       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 780       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 781
 782       <device Dname="ARMCA9">
 783         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 784         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 785       </device>
 786     </family>
 787   </devices>
 788
 789
 790   <apis>
 791     <!-- CMSIS Device API -->
 792     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 793       <description>Device interrupt controller interface</description>
 794       <files>
 795         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 796       </files>
 797     </api>
 798     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 799       <description>RTOS Kernel system tick timer interface</description>
 800       <files>
 801         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 802       </files>
 803     </api>
 804     <!-- CMSIS-RTOS API -->
 805     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 806       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 807       <files>
 808         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 809       </files>
 810     </api>
 811     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 812       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 813       <files>
 814         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 815         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 816       </files>
 817     </api>
 818     <!-- CMSIS Driver API -->
 819     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 820       <description>USART Driver API for Cortex-M</description>
 821       <files>
 822         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 823         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 824       </files>
 825     </api>
 826     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 827       <description>SPI Driver API for Cortex-M</description>
 828       <files>
 829         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 830         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 831       </files>
 832     </api>
 833     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 834       <description>SAI Driver API for Cortex-M</description>
 835       <files>
 836         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 837         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 838       </files>
 839     </api>
 840     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 841       <description>I2C Driver API for Cortex-M</description>
 842       <files>
 843         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 844         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 845       </files>
 846     </api>
 847     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 848       <description>CAN Driver API for Cortex-M</description>
 849       <files>
 850         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 851         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 852       </files>
 853     </api>
 854     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 855       <description>Flash Driver API for Cortex-M</description>
 856       <files>
 857         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 858         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 859       </files>
 860     </api>
 861     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 862       <description>MCI Driver API for Cortex-M</description>
 863       <files>
 864         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 865         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 866       </files>
 867     </api>
 868     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 869       <description>NAND Flash Driver API for Cortex-M</description>
 870       <files>
 871         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 872         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 873       </files>
 874     </api>
 875     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 876       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 877       <files>
 878         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 879         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 880         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 881       </files>
 882     </api>
 883     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 884       <description>Ethernet MAC Driver API for Cortex-M</description>
 885       <files>
 886         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 887         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 888       </files>
 889     </api>
 890     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 891       <description>Ethernet PHY Driver API for Cortex-M</description>
 892       <files>
 893         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 894         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 895       </files>
 896     </api>
 897     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 898       <description>USB Device Driver API for Cortex-M</description>
 899       <files>
 900         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 901         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 902       </files>
 903     </api>
 904     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 905       <description>USB Host Driver API for Cortex-M</description>
 906       <files>
 907         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 908         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 909       </files>
 910     </api>
 911     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.0.0" exclusive="0">
 912       <description>WiFi driver</description>
 913       <files>
 914         <file category="doc"  name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 915         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 916       </files>
 917     </api>
 918   </apis>
 919
 920   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 921   <conditions>
 922     <!-- compiler -->
 923     <condition id="ARMCC6">
 924       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 925       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 926     </condition>
 927     <condition id="ARMCC5">
 928       <require Tcompiler="ARMCC" Toptions="AC5"/>
 929     </condition>
 930     <condition id="ARMCC">
 931       <require Tcompiler="ARMCC"/>
 932     </condition>
 933     <condition id="GCC">
 934       <require Tcompiler="GCC"/>
 935     </condition>
 936     <condition id="IAR">
 937       <require Tcompiler="IAR"/>
 938     </condition>
 939     <condition id="ARMCC GCC">
 940       <accept Tcompiler="ARMCC"/>
 941       <accept Tcompiler="GCC"/>
 942     </condition>
 943     <condition id="ARMCC GCC IAR">
 944       <accept Tcompiler="ARMCC"/>
 945       <accept Tcompiler="GCC"/>
 946       <accept Tcompiler="IAR"/>
 947     </condition>
 948
 949     <!-- Arm architecture -->
 950     <condition id="ARMv6-M Device">
 951       <description>Armv6-M architecture based device</description>
 952       <accept Dcore="Cortex-M0"/>
 953       <accept Dcore="Cortex-M1"/>
 954       <accept Dcore="Cortex-M0+"/>
 955       <accept Dcore="SC000"/>
 956     </condition>
 957     <condition id="ARMv7-M Device">
 958       <description>Armv7-M architecture based device</description>
 959       <accept Dcore="Cortex-M3"/>
 960       <accept Dcore="Cortex-M4"/>
 961       <accept Dcore="Cortex-M7"/>
 962       <accept Dcore="SC300"/>
 963     </condition>
 964     <condition id="ARMv8-M Device">
 965       <description>Armv8-M architecture based device</description>
 966       <accept Dcore="ARMV8MBL"/>
 967       <accept Dcore="ARMV8MML"/>
 968       <accept Dcore="ARMV81MML"/>
 969       <accept Dcore="Cortex-M23"/>
 970       <accept Dcore="Cortex-M33"/>
 971       <accept Dcore="Cortex-M35P"/>
 972     </condition>
 973     <condition id="ARMv8-M TZ Device">
 974       <description>Armv8-M architecture based device with TrustZone</description>
 975       <require condition="ARMv8-M Device"/>
 976       <require Dtz="TZ"/>
 977     </condition>
 978     <condition id="ARMv6_7-M Device">
 979       <description>Armv6_7-M architecture based device</description>
 980       <accept condition="ARMv6-M Device"/>
 981       <accept condition="ARMv7-M Device"/>
 982     </condition>
 983     <condition id="ARMv6_7_8-M Device">
 984       <description>Armv6_7_8-M architecture based device</description>
 985       <accept condition="ARMv6-M Device"/>
 986       <accept condition="ARMv7-M Device"/>
 987       <accept condition="ARMv8-M Device"/>
 988     </condition>
 989     <condition id="ARMv7-A Device">
 990       <description>Armv7-A architecture based device</description>
 991       <accept Dcore="Cortex-A5"/>
 992       <accept Dcore="Cortex-A7"/>
 993       <accept Dcore="Cortex-A9"/>
 994     </condition>
 995
 996     <!-- ARM core -->
 997     <condition id="CM0">
 998       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 999       <accept Dcore="Cortex-M0"/>
1000       <accept Dcore="Cortex-M0+"/>
1001       <accept Dcore="SC000"/>
1002     </condition>
1003     <condition id="CM1">
1004       <description>Cortex-M1</description>
1005       <require Dcore="Cortex-M1"/>
1006     </condition>
1007     <condition id="CM3">
1008       <description>Cortex-M3 or SC300 processor based device</description>
1009       <accept Dcore="Cortex-M3"/>
1010       <accept Dcore="SC300"/>
1011     </condition>
1012     <condition id="CM4">
1013       <description>Cortex-M4 processor based device</description>
1014       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1015     </condition>
1016     <condition id="CM4_FP">
1017       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1018       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1019       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1020       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1021     </condition>
1022     <condition id="CM7">
1023       <description>Cortex-M7 processor based device</description>
1024       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1025     </condition>
1026     <condition id="CM7_FP">
1027       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1028       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1029       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1030     </condition>
1031     <condition id="CM7_SP">
1032       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1033       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1034     </condition>
1035     <condition id="CM7_DP">
1036       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1037       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1038     </condition>
1039     <condition id="CM23">
1040       <description>Cortex-M23 processor based device</description>
1041       <require Dcore="Cortex-M23"/>
1042     </condition>
1043     <condition id="CM33">
1044       <description>Cortex-M33 processor based device</description>
1045       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1046     </condition>
1047     <condition id="CM33_FP">
1048       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1049       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1050     </condition>
1051     <condition id="CM35P">
1052       <description>Cortex-M35P processor based device</description>
1053       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1054     </condition>
1055     <condition id="CM35P_FP">
1056       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1057       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1058     </condition>
1059     <condition id="ARMv8MBL">
1060       <description>Armv8-M Baseline processor based device</description>
1061       <require Dcore="ARMV8MBL"/>
1062     </condition>
1063     <condition id="ARMv8MML">
1064       <description>Armv8-M Mainline processor based device</description>
1065       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1066     </condition>
1067     <condition id="ARMv8MML_FP">
1068       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1069       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1070       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1071     </condition>
1072
1073     <condition id="CM33_NODSP_NOFPU">
1074       <description>CM33, no DSP, no FPU</description>
1075       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1076     </condition>
1077     <condition id="CM33_DSP_NOFPU">
1078       <description>CM33, DSP, no FPU</description>
1079       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1080     </condition>
1081     <condition id="CM33_NODSP_SP">
1082       <description>CM33, no DSP, SP FPU</description>
1083       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1084     </condition>
1085     <condition id="CM33_DSP_SP">
1086       <description>CM33, DSP, SP FPU</description>
1087       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1088     </condition>
1089
1090     <condition id="CM35P_NODSP_NOFPU">
1091       <description>CM35P, no DSP, no FPU</description>
1092       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1093     </condition>
1094     <condition id="CM35P_DSP_NOFPU">
1095       <description>CM35P, DSP, no FPU</description>
1096       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1097     </condition>
1098     <condition id="CM35P_NODSP_SP">
1099       <description>CM35P, no DSP, SP FPU</description>
1100       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1101     </condition>
1102     <condition id="CM35P_DSP_SP">
1103       <description>CM35P, DSP, SP FPU</description>
1104       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1105     </condition>
1106
1107     <condition id="ARMv8MML_NODSP_NOFPU">
1108       <description>Armv8-M Mainline, no DSP, no FPU</description>
1109       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1110     </condition>
1111     <condition id="ARMv8MML_DSP_NOFPU">
1112       <description>Armv8-M Mainline, DSP, no FPU</description>
1113       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1114     </condition>
1115     <condition id="ARMv8MML_NODSP_SP">
1116       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1117       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1118     </condition>
1119     <condition id="ARMv8MML_DSP_SP">
1120       <description>Armv8-M Mainline, DSP, SP FPU</description>
1121       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1122     </condition>
1123
1124     <condition id="CA5_CA9">
1125       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1126       <accept Dcore="Cortex-A5"/>
1127       <accept Dcore="Cortex-A9"/>
1128     </condition>
1129
1130     <condition id="CA7">
1131       <description>Cortex-A7 processor based device</description>
1132       <accept Dcore="Cortex-A7"/>
1133     </condition>
1134
1135     <!-- ARMCC compiler -->
1136     <condition id="CA_ARMCC5">
1137       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1138       <require condition="ARMv7-A Device"/>
1139       <require condition="ARMCC5"/>
1140     </condition>
1141     <condition id="CA_ARMCC6">
1142       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1143       <require condition="ARMv7-A Device"/>
1144       <require condition="ARMCC6"/>
1145     </condition>
1146
1147     <condition id="CM0_ARMCC">
1148       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1149       <require condition="CM0"/>
1150       <require Tcompiler="ARMCC"/>
1151     </condition>
1152     <condition id="CM0_LE_ARMCC">
1153       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1154       <require condition="CM0_ARMCC"/>
1155       <require Dendian="Little-endian"/>
1156     </condition>
1157     <condition id="CM0_BE_ARMCC">
1158       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1159       <require condition="CM0_ARMCC"/>
1160       <require Dendian="Big-endian"/>
1161     </condition>
1162
1163     <condition id="CM1_ARMCC">
1164       <description>Cortex-M1 based device for the Arm Compiler</description>
1165       <require condition="CM1"/>
1166       <require Tcompiler="ARMCC"/>
1167     </condition>
1168     <condition id="CM1_LE_ARMCC">
1169       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1170       <require condition="CM1_ARMCC"/>
1171       <require Dendian="Little-endian"/>
1172     </condition>
1173     <condition id="CM1_BE_ARMCC">
1174       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1175       <require condition="CM1_ARMCC"/>
1176       <require Dendian="Big-endian"/>
1177     </condition>
1178
1179     <condition id="CM3_ARMCC">
1180       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1181       <require condition="CM3"/>
1182       <require Tcompiler="ARMCC"/>
1183     </condition>
1184     <condition id="CM3_LE_ARMCC">
1185       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1186       <require condition="CM3_ARMCC"/>
1187       <require Dendian="Little-endian"/>
1188     </condition>
1189     <condition id="CM3_BE_ARMCC">
1190       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1191       <require condition="CM3_ARMCC"/>
1192       <require Dendian="Big-endian"/>
1193     </condition>
1194
1195     <condition id="CM4_ARMCC">
1196       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1197       <require condition="CM4"/>
1198       <require Tcompiler="ARMCC"/>
1199     </condition>
1200     <condition id="CM4_LE_ARMCC">
1201       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1202       <require condition="CM4_ARMCC"/>
1203       <require Dendian="Little-endian"/>
1204     </condition>
1205     <condition id="CM4_BE_ARMCC">
1206       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1207       <require condition="CM4_ARMCC"/>
1208       <require Dendian="Big-endian"/>
1209     </condition>
1210
1211     <condition id="CM4_FP_ARMCC">
1212       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1213       <require condition="CM4_FP"/>
1214       <require Tcompiler="ARMCC"/>
1215     </condition>
1216     <condition id="CM4_FP_LE_ARMCC">
1217       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1218       <require condition="CM4_FP_ARMCC"/>
1219       <require Dendian="Little-endian"/>
1220     </condition>
1221     <condition id="CM4_FP_BE_ARMCC">
1222       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1223       <require condition="CM4_FP_ARMCC"/>
1224       <require Dendian="Big-endian"/>
1225     </condition>
1226
1227     <condition id="CM7_ARMCC">
1228       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1229       <require condition="CM7"/>
1230       <require Tcompiler="ARMCC"/>
1231     </condition>
1232     <condition id="CM7_LE_ARMCC">
1233       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1234       <require condition="CM7_ARMCC"/>
1235       <require Dendian="Little-endian"/>
1236     </condition>
1237     <condition id="CM7_BE_ARMCC">
1238       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1239       <require condition="CM7_ARMCC"/>
1240       <require Dendian="Big-endian"/>
1241     </condition>
1242
1243     <condition id="CM7_FP_ARMCC">
1244       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1245       <require condition="CM7_FP"/>
1246       <require Tcompiler="ARMCC"/>
1247     </condition>
1248     <condition id="CM7_FP_LE_ARMCC">
1249       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1250       <require condition="CM7_FP_ARMCC"/>
1251       <require Dendian="Little-endian"/>
1252     </condition>
1253     <condition id="CM7_FP_BE_ARMCC">
1254       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1255       <require condition="CM7_FP_ARMCC"/>
1256       <require Dendian="Big-endian"/>
1257     </condition>
1258
1259     <condition id="CM7_SP_ARMCC">
1260       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1261       <require condition="CM7_SP"/>
1262       <require Tcompiler="ARMCC"/>
1263     </condition>
1264     <condition id="CM7_SP_LE_ARMCC">
1265       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1266       <require condition="CM7_SP_ARMCC"/>
1267       <require Dendian="Little-endian"/>
1268     </condition>
1269     <condition id="CM7_SP_BE_ARMCC">
1270       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1271       <require condition="CM7_SP_ARMCC"/>
1272       <require Dendian="Big-endian"/>
1273     </condition>
1274
1275     <condition id="CM7_DP_ARMCC">
1276       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1277       <require condition="CM7_DP"/>
1278       <require Tcompiler="ARMCC"/>
1279     </condition>
1280     <condition id="CM7_DP_LE_ARMCC">
1281       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1282       <require condition="CM7_DP_ARMCC"/>
1283       <require Dendian="Little-endian"/>
1284     </condition>
1285     <condition id="CM7_DP_BE_ARMCC">
1286       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1287       <require condition="CM7_DP_ARMCC"/>
1288       <require Dendian="Big-endian"/>
1289     </condition>
1290
1291     <condition id="CM23_ARMCC">
1292       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1293       <require condition="CM23"/>
1294       <require Tcompiler="ARMCC"/>
1295     </condition>
1296     <condition id="CM23_LE_ARMCC">
1297       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1298       <require condition="CM23_ARMCC"/>
1299       <require Dendian="Little-endian"/>
1300     </condition>
1301
1302     <condition id="CM33_ARMCC">
1303       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1304       <require condition="CM33"/>
1305       <require Tcompiler="ARMCC"/>
1306     </condition>
1307     <condition id="CM33_LE_ARMCC">
1308       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1309       <require condition="CM33_ARMCC"/>
1310       <require Dendian="Little-endian"/>
1311     </condition>
1312
1313     <condition id="CM33_FP_ARMCC">
1314       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1315       <require condition="CM33_FP"/>
1316       <require Tcompiler="ARMCC"/>
1317     </condition>
1318     <condition id="CM33_FP_LE_ARMCC">
1319       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1320       <require condition="CM33_FP_ARMCC"/>
1321       <require Dendian="Little-endian"/>
1322     </condition>
1323
1324     <condition id="CM33_NODSP_NOFPU_ARMCC">
1325       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1326       <require condition="CM33_NODSP_NOFPU"/>
1327       <require Tcompiler="ARMCC"/>
1328     </condition>
1329     <condition id="CM33_DSP_NOFPU_ARMCC">
1330       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1331       <require condition="CM33_DSP_NOFPU"/>
1332       <require Tcompiler="ARMCC"/>
1333     </condition>
1334     <condition id="CM33_NODSP_SP_ARMCC">
1335       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1336       <require condition="CM33_NODSP_SP"/>
1337       <require Tcompiler="ARMCC"/>
1338     </condition>
1339     <condition id="CM33_DSP_SP_ARMCC">
1340       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1341       <require condition="CM33_DSP_SP"/>
1342       <require Tcompiler="ARMCC"/>
1343     </condition>
1344     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1345       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1346       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1347       <require Dendian="Little-endian"/>
1348     </condition>
1349     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1350       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1351       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1352       <require Dendian="Little-endian"/>
1353     </condition>
1354     <condition id="CM33_NODSP_SP_LE_ARMCC">
1355       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1356       <require condition="CM33_NODSP_SP_ARMCC"/>
1357       <require Dendian="Little-endian"/>
1358     </condition>
1359     <condition id="CM33_DSP_SP_LE_ARMCC">
1360       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1361       <require condition="CM33_DSP_SP_ARMCC"/>
1362       <require Dendian="Little-endian"/>
1363     </condition>
1364
1365     <condition id="CM35P_ARMCC">
1366       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1367       <require condition="CM35P"/>
1368       <require Tcompiler="ARMCC"/>
1369     </condition>
1370     <condition id="CM35P_LE_ARMCC">
1371       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1372       <require condition="CM35P_ARMCC"/>
1373       <require Dendian="Little-endian"/>
1374     </condition>
1375
1376     <condition id="CM35P_FP_ARMCC">
1377       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1378       <require condition="CM35P_FP"/>
1379       <require Tcompiler="ARMCC"/>
1380     </condition>
1381     <condition id="CM35P_FP_LE_ARMCC">
1382       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1383       <require condition="CM35P_FP_ARMCC"/>
1384       <require Dendian="Little-endian"/>
1385     </condition>
1386
1387     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1388       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1389       <require condition="CM35P_NODSP_NOFPU"/>
1390       <require Tcompiler="ARMCC"/>
1391     </condition>
1392     <condition id="CM35P_DSP_NOFPU_ARMCC">
1393       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1394       <require condition="CM35P_DSP_NOFPU"/>
1395       <require Tcompiler="ARMCC"/>
1396     </condition>
1397     <condition id="CM35P_NODSP_SP_ARMCC">
1398       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1399       <require condition="CM35P_NODSP_SP"/>
1400       <require Tcompiler="ARMCC"/>
1401     </condition>
1402     <condition id="CM35P_DSP_SP_ARMCC">
1403       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1404       <require condition="CM35P_DSP_SP"/>
1405       <require Tcompiler="ARMCC"/>
1406     </condition>
1407     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1408       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1409       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1410       <require Dendian="Little-endian"/>
1411     </condition>
1412     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1413       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1414       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1415       <require Dendian="Little-endian"/>
1416     </condition>
1417     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1418       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1419       <require condition="CM35P_NODSP_SP_ARMCC"/>
1420       <require Dendian="Little-endian"/>
1421     </condition>
1422     <condition id="CM35P_DSP_SP_LE_ARMCC">
1423       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1424       <require condition="CM35P_DSP_SP_ARMCC"/>
1425       <require Dendian="Little-endian"/>
1426     </condition>
1427
1428     <condition id="ARMv8MBL_ARMCC">
1429       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1430       <require condition="ARMv8MBL"/>
1431       <require Tcompiler="ARMCC"/>
1432     </condition>
1433     <condition id="ARMv8MBL_LE_ARMCC">
1434       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1435       <require condition="ARMv8MBL_ARMCC"/>
1436       <require Dendian="Little-endian"/>
1437     </condition>
1438
1439     <condition id="ARMv8MML_ARMCC">
1440       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1441       <require condition="ARMv8MML"/>
1442       <require Tcompiler="ARMCC"/>
1443     </condition>
1444     <condition id="ARMv8MML_LE_ARMCC">
1445       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1446       <require condition="ARMv8MML_ARMCC"/>
1447       <require Dendian="Little-endian"/>
1448     </condition>
1449
1450     <condition id="ARMv8MML_FP_ARMCC">
1451       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1452       <require condition="ARMv8MML_FP"/>
1453       <require Tcompiler="ARMCC"/>
1454     </condition>
1455     <condition id="ARMv8MML_FP_LE_ARMCC">
1456       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1457       <require condition="ARMv8MML_FP_ARMCC"/>
1458       <require Dendian="Little-endian"/>
1459     </condition>
1460
1461     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1462       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1463       <require condition="ARMv8MML_NODSP_NOFPU"/>
1464       <require Tcompiler="ARMCC"/>
1465     </condition>
1466     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1467       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1468       <require condition="ARMv8MML_DSP_NOFPU"/>
1469       <require Tcompiler="ARMCC"/>
1470     </condition>
1471     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1472       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1473       <require condition="ARMv8MML_NODSP_SP"/>
1474       <require Tcompiler="ARMCC"/>
1475     </condition>
1476     <condition id="ARMv8MML_DSP_SP_ARMCC">
1477       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1478       <require condition="ARMv8MML_DSP_SP"/>
1479       <require Tcompiler="ARMCC"/>
1480     </condition>
1481     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1482       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1483       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1484       <require Dendian="Little-endian"/>
1485     </condition>
1486     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1487       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1488       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1489       <require Dendian="Little-endian"/>
1490     </condition>
1491     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1492       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1493       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1494       <require Dendian="Little-endian"/>
1495     </condition>
1496     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1497       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1498       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1499       <require Dendian="Little-endian"/>
1500     </condition>
1501
1502     <!-- GCC compiler -->
1503     <condition id="CA_GCC">
1504       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1505       <require condition="ARMv7-A Device"/>
1506       <require Tcompiler="GCC"/>
1507     </condition>
1508
1509     <condition id="CM0_GCC">
1510       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1511       <require condition="CM0"/>
1512       <require Tcompiler="GCC"/>
1513     </condition>
1514     <condition id="CM0_LE_GCC">
1515       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1516       <require condition="CM0_GCC"/>
1517       <require Dendian="Little-endian"/>
1518     </condition>
1519     <condition id="CM0_BE_GCC">
1520       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1521       <require condition="CM0_GCC"/>
1522       <require Dendian="Big-endian"/>
1523     </condition>
1524
1525     <condition id="CM1_GCC">
1526       <description>Cortex-M1 based device for the GCC Compiler</description>
1527       <require condition="CM1"/>
1528       <require Tcompiler="GCC"/>
1529     </condition>
1530     <condition id="CM1_LE_GCC">
1531       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1532       <require condition="CM1_GCC"/>
1533       <require Dendian="Little-endian"/>
1534     </condition>
1535     <condition id="CM1_BE_GCC">
1536       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1537       <require condition="CM1_GCC"/>
1538       <require Dendian="Big-endian"/>
1539     </condition>
1540
1541     <condition id="CM3_GCC">
1542       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1543       <require condition="CM3"/>
1544       <require Tcompiler="GCC"/>
1545     </condition>
1546     <condition id="CM3_LE_GCC">
1547       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1548       <require condition="CM3_GCC"/>
1549       <require Dendian="Little-endian"/>
1550     </condition>
1551     <condition id="CM3_BE_GCC">
1552       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1553       <require condition="CM3_GCC"/>
1554       <require Dendian="Big-endian"/>
1555     </condition>
1556
1557     <condition id="CM4_GCC">
1558       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1559       <require condition="CM4"/>
1560       <require Tcompiler="GCC"/>
1561     </condition>
1562     <condition id="CM4_LE_GCC">
1563       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1564       <require condition="CM4_GCC"/>
1565       <require Dendian="Little-endian"/>
1566     </condition>
1567     <condition id="CM4_BE_GCC">
1568       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1569       <require condition="CM4_GCC"/>
1570       <require Dendian="Big-endian"/>
1571     </condition>
1572
1573     <condition id="CM4_FP_GCC">
1574       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1575       <require condition="CM4_FP"/>
1576       <require Tcompiler="GCC"/>
1577     </condition>
1578     <condition id="CM4_FP_LE_GCC">
1579       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1580       <require condition="CM4_FP_GCC"/>
1581       <require Dendian="Little-endian"/>
1582     </condition>
1583     <condition id="CM4_FP_BE_GCC">
1584       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1585       <require condition="CM4_FP_GCC"/>
1586       <require Dendian="Big-endian"/>
1587     </condition>
1588
1589     <condition id="CM7_GCC">
1590       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1591       <require condition="CM7"/>
1592       <require Tcompiler="GCC"/>
1593     </condition>
1594     <condition id="CM7_LE_GCC">
1595       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1596       <require condition="CM7_GCC"/>
1597       <require Dendian="Little-endian"/>
1598     </condition>
1599     <condition id="CM7_BE_GCC">
1600       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1601       <require condition="CM7_GCC"/>
1602       <require Dendian="Big-endian"/>
1603     </condition>
1604
1605     <condition id="CM7_FP_GCC">
1606       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1607       <require condition="CM7_FP"/>
1608       <require Tcompiler="GCC"/>
1609     </condition>
1610     <condition id="CM7_FP_LE_GCC">
1611       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1612       <require condition="CM7_FP_GCC"/>
1613       <require Dendian="Little-endian"/>
1614     </condition>
1615     <condition id="CM7_FP_BE_GCC">
1616       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1617       <require condition="CM7_FP_GCC"/>
1618       <require Dendian="Big-endian"/>
1619     </condition>
1620
1621     <condition id="CM7_SP_GCC">
1622       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1623       <require condition="CM7_SP"/>
1624       <require Tcompiler="GCC"/>
1625     </condition>
1626     <condition id="CM7_SP_LE_GCC">
1627       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1628       <require condition="CM7_SP_GCC"/>
1629       <require Dendian="Little-endian"/>
1630     </condition>
1631
1632     <condition id="CM7_DP_GCC">
1633       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1634       <require condition="CM7_DP"/>
1635       <require Tcompiler="GCC"/>
1636     </condition>
1637     <condition id="CM7_DP_LE_GCC">
1638       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1639       <require condition="CM7_DP_GCC"/>
1640       <require Dendian="Little-endian"/>
1641     </condition>
1642
1643     <condition id="CM23_GCC">
1644       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1645       <require condition="CM23"/>
1646       <require Tcompiler="GCC"/>
1647     </condition>
1648     <condition id="CM23_LE_GCC">
1649       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1650       <require condition="CM23_GCC"/>
1651       <require Dendian="Little-endian"/>
1652     </condition>
1653
1654     <condition id="CM33_GCC">
1655       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1656       <require condition="CM33"/>
1657       <require Tcompiler="GCC"/>
1658     </condition>
1659     <condition id="CM33_LE_GCC">
1660       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1661       <require condition="CM33_GCC"/>
1662       <require Dendian="Little-endian"/>
1663     </condition>
1664
1665     <condition id="CM33_FP_GCC">
1666       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1667       <require condition="CM33_FP"/>
1668       <require Tcompiler="GCC"/>
1669     </condition>
1670     <condition id="CM33_FP_LE_GCC">
1671       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1672       <require condition="CM33_FP_GCC"/>
1673       <require Dendian="Little-endian"/>
1674     </condition>
1675
1676     <condition id="CM33_NODSP_NOFPU_GCC">
1677       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1678       <require condition="CM33_NODSP_NOFPU"/>
1679       <require Tcompiler="GCC"/>
1680     </condition>
1681     <condition id="CM33_DSP_NOFPU_GCC">
1682       <description>CM33, DSP, no FPU, GCC Compiler</description>
1683       <require condition="CM33_DSP_NOFPU"/>
1684       <require Tcompiler="GCC"/>
1685     </condition>
1686     <condition id="CM33_NODSP_SP_GCC">
1687       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1688       <require condition="CM33_NODSP_SP"/>
1689       <require Tcompiler="GCC"/>
1690     </condition>
1691     <condition id="CM33_DSP_SP_GCC">
1692       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1693       <require condition="CM33_DSP_SP"/>
1694       <require Tcompiler="GCC"/>
1695     </condition>
1696     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1697       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1698       <require condition="CM33_NODSP_NOFPU_GCC"/>
1699       <require Dendian="Little-endian"/>
1700     </condition>
1701     <condition id="CM33_DSP_NOFPU_LE_GCC">
1702       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1703       <require condition="CM33_DSP_NOFPU_GCC"/>
1704       <require Dendian="Little-endian"/>
1705     </condition>
1706     <condition id="CM33_NODSP_SP_LE_GCC">
1707       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1708       <require condition="CM33_NODSP_SP_GCC"/>
1709       <require Dendian="Little-endian"/>
1710     </condition>
1711     <condition id="CM33_DSP_SP_LE_GCC">
1712       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1713       <require condition="CM33_DSP_SP_GCC"/>
1714       <require Dendian="Little-endian"/>
1715     </condition>
1716
1717     <condition id="CM35P_GCC">
1718       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1719       <require condition="CM35P"/>
1720       <require Tcompiler="GCC"/>
1721     </condition>
1722     <condition id="CM35P_LE_GCC">
1723       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1724       <require condition="CM35P_GCC"/>
1725       <require Dendian="Little-endian"/>
1726     </condition>
1727
1728     <condition id="CM35P_FP_GCC">
1729       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1730       <require condition="CM35P_FP"/>
1731       <require Tcompiler="GCC"/>
1732     </condition>
1733     <condition id="CM35P_FP_LE_GCC">
1734       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1735       <require condition="CM35P_FP_GCC"/>
1736       <require Dendian="Little-endian"/>
1737     </condition>
1738
1739     <condition id="CM35P_NODSP_NOFPU_GCC">
1740       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1741       <require condition="CM35P_NODSP_NOFPU"/>
1742       <require Tcompiler="GCC"/>
1743     </condition>
1744     <condition id="CM35P_DSP_NOFPU_GCC">
1745       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1746       <require condition="CM35P_DSP_NOFPU"/>
1747       <require Tcompiler="GCC"/>
1748     </condition>
1749     <condition id="CM35P_NODSP_SP_GCC">
1750       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1751       <require condition="CM35P_NODSP_SP"/>
1752       <require Tcompiler="GCC"/>
1753     </condition>
1754     <condition id="CM35P_DSP_SP_GCC">
1755       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1756       <require condition="CM35P_DSP_SP"/>
1757       <require Tcompiler="GCC"/>
1758     </condition>
1759     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1760       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1761       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1762       <require Dendian="Little-endian"/>
1763     </condition>
1764     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1765       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1766       <require condition="CM35P_DSP_NOFPU_GCC"/>
1767       <require Dendian="Little-endian"/>
1768     </condition>
1769     <condition id="CM35P_NODSP_SP_LE_GCC">
1770       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1771       <require condition="CM35P_NODSP_SP_GCC"/>
1772       <require Dendian="Little-endian"/>
1773     </condition>
1774     <condition id="CM35P_DSP_SP_LE_GCC">
1775       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1776       <require condition="CM35P_DSP_SP_GCC"/>
1777       <require Dendian="Little-endian"/>
1778     </condition>
1779
1780     <condition id="ARMv8MBL_GCC">
1781       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1782       <require condition="ARMv8MBL"/>
1783       <require Tcompiler="GCC"/>
1784     </condition>
1785     <condition id="ARMv8MBL_LE_GCC">
1786       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1787       <require condition="ARMv8MBL_GCC"/>
1788       <require Dendian="Little-endian"/>
1789     </condition>
1790
1791     <condition id="ARMv8MML_GCC">
1792       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1793       <require condition="ARMv8MML"/>
1794       <require Tcompiler="GCC"/>
1795     </condition>
1796     <condition id="ARMv8MML_LE_GCC">
1797       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1798       <require condition="ARMv8MML_GCC"/>
1799       <require Dendian="Little-endian"/>
1800     </condition>
1801
1802     <condition id="ARMv8MML_FP_GCC">
1803       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1804       <require condition="ARMv8MML_FP"/>
1805       <require Tcompiler="GCC"/>
1806     </condition>
1807     <condition id="ARMv8MML_FP_LE_GCC">
1808       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1809       <require condition="ARMv8MML_FP_GCC"/>
1810       <require Dendian="Little-endian"/>
1811     </condition>
1812
1813     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1814       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1815       <require condition="ARMv8MML_NODSP_NOFPU"/>
1816       <require Tcompiler="GCC"/>
1817     </condition>
1818     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1819       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1820       <require condition="ARMv8MML_DSP_NOFPU"/>
1821       <require Tcompiler="GCC"/>
1822     </condition>
1823     <condition id="ARMv8MML_NODSP_SP_GCC">
1824       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1825       <require condition="ARMv8MML_NODSP_SP"/>
1826       <require Tcompiler="GCC"/>
1827     </condition>
1828     <condition id="ARMv8MML_DSP_SP_GCC">
1829       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1830       <require condition="ARMv8MML_DSP_SP"/>
1831       <require Tcompiler="GCC"/>
1832     </condition>
1833     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1834       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1835       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1836       <require Dendian="Little-endian"/>
1837     </condition>
1838     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1839       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1840       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1841       <require Dendian="Little-endian"/>
1842     </condition>
1843     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1844       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1845       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1846       <require Dendian="Little-endian"/>
1847     </condition>
1848     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1849       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1850       <require condition="ARMv8MML_DSP_SP_GCC"/>
1851       <require Dendian="Little-endian"/>
1852     </condition>
1853
1854     <!-- IAR compiler -->
1855     <condition id="CA_IAR">
1856       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1857       <require condition="ARMv7-A Device"/>
1858       <require Tcompiler="IAR"/>
1859     </condition>
1860
1861     <condition id="CM0_IAR">
1862       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1863       <require condition="CM0"/>
1864       <require Tcompiler="IAR"/>
1865     </condition>
1866     <condition id="CM0_LE_IAR">
1867       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1868       <require condition="CM0_IAR"/>
1869       <require Dendian="Little-endian"/>
1870     </condition>
1871     <condition id="CM0_BE_IAR">
1872       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1873       <require condition="CM0_IAR"/>
1874       <require Dendian="Big-endian"/>
1875     </condition>
1876
1877     <condition id="CM1_IAR">
1878       <description>Cortex-M1 based device for the IAR Compiler</description>
1879       <require condition="CM1"/>
1880       <require Tcompiler="IAR"/>
1881     </condition>
1882     <condition id="CM1_LE_IAR">
1883       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1884       <require condition="CM1_IAR"/>
1885       <require Dendian="Little-endian"/>
1886     </condition>
1887     <condition id="CM1_BE_IAR">
1888       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1889       <require condition="CM1_IAR"/>
1890       <require Dendian="Big-endian"/>
1891     </condition>
1892
1893     <condition id="CM3_IAR">
1894       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1895       <require condition="CM3"/>
1896       <require Tcompiler="IAR"/>
1897     </condition>
1898     <condition id="CM3_LE_IAR">
1899       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1900       <require condition="CM3_IAR"/>
1901       <require Dendian="Little-endian"/>
1902     </condition>
1903     <condition id="CM3_BE_IAR">
1904       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1905       <require condition="CM3_IAR"/>
1906       <require Dendian="Big-endian"/>
1907     </condition>
1908
1909     <condition id="CM4_IAR">
1910       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1911       <require condition="CM4"/>
1912       <require Tcompiler="IAR"/>
1913     </condition>
1914     <condition id="CM4_LE_IAR">
1915       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1916       <require condition="CM4_IAR"/>
1917       <require Dendian="Little-endian"/>
1918     </condition>
1919     <condition id="CM4_BE_IAR">
1920       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1921       <require condition="CM4_IAR"/>
1922       <require Dendian="Big-endian"/>
1923     </condition>
1924
1925     <condition id="CM4_FP_IAR">
1926       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1927       <require condition="CM4_FP"/>
1928       <require Tcompiler="IAR"/>
1929     </condition>
1930     <condition id="CM4_FP_LE_IAR">
1931       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1932       <require condition="CM4_FP_IAR"/>
1933       <require Dendian="Little-endian"/>
1934     </condition>
1935     <condition id="CM4_FP_BE_IAR">
1936       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1937       <require condition="CM4_FP_IAR"/>
1938       <require Dendian="Big-endian"/>
1939     </condition>
1940
1941     <condition id="CM7_IAR">
1942       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1943       <require condition="CM7"/>
1944       <require Tcompiler="IAR"/>
1945     </condition>
1946     <condition id="CM7_LE_IAR">
1947       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1948       <require condition="CM7_IAR"/>
1949       <require Dendian="Little-endian"/>
1950     </condition>
1951     <condition id="CM7_BE_IAR">
1952       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1953       <require condition="CM7_IAR"/>
1954       <require Dendian="Big-endian"/>
1955     </condition>
1956
1957     <condition id="CM7_FP_IAR">
1958       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1959       <require condition="CM7_FP"/>
1960       <require Tcompiler="IAR"/>
1961     </condition>
1962     <condition id="CM7_FP_LE_IAR">
1963       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1964       <require condition="CM7_FP_IAR"/>
1965       <require Dendian="Little-endian"/>
1966     </condition>
1967     <condition id="CM7_FP_BE_IAR">
1968       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1969       <require condition="CM7_FP_IAR"/>
1970       <require Dendian="Big-endian"/>
1971     </condition>
1972
1973     <condition id="CM7_SP_IAR">
1974       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1975       <require condition="CM7_SP"/>
1976       <require Tcompiler="IAR"/>
1977     </condition>
1978     <condition id="CM7_SP_LE_IAR">
1979       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1980       <require condition="CM7_SP_IAR"/>
1981       <require Dendian="Little-endian"/>
1982     </condition>
1983     <condition id="CM7_SP_BE_IAR">
1984       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1985       <require condition="CM7_SP_IAR"/>
1986       <require Dendian="Big-endian"/>
1987     </condition>
1988
1989     <condition id="CM7_DP_IAR">
1990       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1991       <require condition="CM7_DP"/>
1992       <require Tcompiler="IAR"/>
1993     </condition>
1994     <condition id="CM7_DP_LE_IAR">
1995       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1996       <require condition="CM7_DP_IAR"/>
1997       <require Dendian="Little-endian"/>
1998     </condition>
1999     <condition id="CM7_DP_BE_IAR">
2000       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2001       <require condition="CM7_DP_IAR"/>
2002       <require Dendian="Big-endian"/>
2003     </condition>
2004
2005     <condition id="CM23_IAR">
2006       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2007       <require condition="CM23"/>
2008       <require Tcompiler="IAR"/>
2009     </condition>
2010     <condition id="CM23_LE_IAR">
2011       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2012       <require condition="CM23_IAR"/>
2013       <require Dendian="Little-endian"/>
2014     </condition>
2015
2016     <condition id="CM33_IAR">
2017       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2018       <require condition="CM33"/>
2019       <require Tcompiler="IAR"/>
2020     </condition>
2021     <condition id="CM33_LE_IAR">
2022       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2023       <require condition="CM33_IAR"/>
2024       <require Dendian="Little-endian"/>
2025     </condition>
2026
2027     <condition id="CM33_FP_IAR">
2028       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2029       <require condition="CM33_FP"/>
2030       <require Tcompiler="IAR"/>
2031     </condition>
2032     <condition id="CM33_FP_LE_IAR">
2033       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2034       <require condition="CM33_FP_IAR"/>
2035       <require Dendian="Little-endian"/>
2036     </condition>
2037
2038     <condition id="CM33_NODSP_NOFPU_IAR">
2039       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2040       <require condition="CM33_NODSP_NOFPU"/>
2041       <require Tcompiler="IAR"/>
2042     </condition>
2043     <condition id="CM33_DSP_NOFPU_IAR">
2044       <description>CM33, DSP, no FPU, IAR Compiler</description>
2045       <require condition="CM33_DSP_NOFPU"/>
2046       <require Tcompiler="IAR"/>
2047     </condition>
2048     <condition id="CM33_NODSP_SP_IAR">
2049       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2050       <require condition="CM33_NODSP_SP"/>
2051       <require Tcompiler="IAR"/>
2052     </condition>
2053     <condition id="CM33_DSP_SP_IAR">
2054       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2055       <require condition="CM33_DSP_SP"/>
2056       <require Tcompiler="IAR"/>
2057     </condition>
2058     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2059       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2060       <require condition="CM33_NODSP_NOFPU_IAR"/>
2061       <require Dendian="Little-endian"/>
2062     </condition>
2063     <condition id="CM33_DSP_NOFPU_LE_IAR">
2064       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2065       <require condition="CM33_DSP_NOFPU_IAR"/>
2066       <require Dendian="Little-endian"/>
2067     </condition>
2068     <condition id="CM33_NODSP_SP_LE_IAR">
2069       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2070       <require condition="CM33_NODSP_SP_IAR"/>
2071       <require Dendian="Little-endian"/>
2072     </condition>
2073     <condition id="CM33_DSP_SP_LE_IAR">
2074       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2075       <require condition="CM33_DSP_SP_IAR"/>
2076       <require Dendian="Little-endian"/>
2077     </condition>
2078
2079     <condition id="CM35P_IAR">
2080       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2081       <require condition="CM35P"/>
2082       <require Tcompiler="IAR"/>
2083     </condition>
2084     <condition id="CM35P_LE_IAR">
2085       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2086       <require condition="CM35P_IAR"/>
2087       <require Dendian="Little-endian"/>
2088     </condition>
2089
2090     <condition id="CM35P_FP_IAR">
2091       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2092       <require condition="CM35P_FP"/>
2093       <require Tcompiler="IAR"/>
2094     </condition>
2095     <condition id="CM35P_FP_LE_IAR">
2096       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2097       <require condition="CM35P_FP_IAR"/>
2098       <require Dendian="Little-endian"/>
2099     </condition>
2100
2101     <condition id="CM35P_NODSP_NOFPU_IAR">
2102       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2103       <require condition="CM35P_NODSP_NOFPU"/>
2104       <require Tcompiler="IAR"/>
2105     </condition>
2106     <condition id="CM35P_DSP_NOFPU_IAR">
2107       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2108       <require condition="CM35P_DSP_NOFPU"/>
2109       <require Tcompiler="IAR"/>
2110     </condition>
2111     <condition id="CM35P_NODSP_SP_IAR">
2112       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2113       <require condition="CM35P_NODSP_SP"/>
2114       <require Tcompiler="IAR"/>
2115     </condition>
2116     <condition id="CM35P_DSP_SP_IAR">
2117       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2118       <require condition="CM35P_DSP_SP"/>
2119       <require Tcompiler="IAR"/>
2120     </condition>
2121     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2122       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2123       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2124       <require Dendian="Little-endian"/>
2125     </condition>
2126     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2127       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2128       <require condition="CM35P_DSP_NOFPU_IAR"/>
2129       <require Dendian="Little-endian"/>
2130     </condition>
2131     <condition id="CM35P_NODSP_SP_LE_IAR">
2132       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2133       <require condition="CM35P_NODSP_SP_IAR"/>
2134       <require Dendian="Little-endian"/>
2135     </condition>
2136     <condition id="CM35P_DSP_SP_LE_IAR">
2137       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2138       <require condition="CM35P_DSP_SP_IAR"/>
2139       <require Dendian="Little-endian"/>
2140     </condition>
2141
2142     <condition id="ARMv8MBL_IAR">
2143       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2144       <require condition="ARMv8MBL"/>
2145       <require Tcompiler="IAR"/>
2146     </condition>
2147     <condition id="ARMv8MBL_LE_IAR">
2148       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2149       <require condition="ARMv8MBL_IAR"/>
2150       <require Dendian="Little-endian"/>
2151     </condition>
2152
2153     <condition id="ARMv8MML_IAR">
2154       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2155       <require condition="ARMv8MML"/>
2156       <require Tcompiler="IAR"/>
2157     </condition>
2158     <condition id="ARMv8MML_LE_IAR">
2159       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2160       <require condition="ARMv8MML_IAR"/>
2161       <require Dendian="Little-endian"/>
2162     </condition>
2163
2164     <condition id="ARMv8MML_FP_IAR">
2165       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2166       <require condition="ARMv8MML_FP"/>
2167       <require Tcompiler="IAR"/>
2168     </condition>
2169     <condition id="ARMv8MML_FP_LE_IAR">
2170       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2171       <require condition="ARMv8MML_FP_IAR"/>
2172       <require Dendian="Little-endian"/>
2173     </condition>
2174
2175     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2176       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2177       <require condition="ARMv8MML_NODSP_NOFPU"/>
2178       <require Tcompiler="IAR"/>
2179     </condition>
2180     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2181       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2182       <require condition="ARMv8MML_DSP_NOFPU"/>
2183       <require Tcompiler="IAR"/>
2184     </condition>
2185     <condition id="ARMv8MML_NODSP_SP_IAR">
2186       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2187       <require condition="ARMv8MML_NODSP_SP"/>
2188       <require Tcompiler="IAR"/>
2189     </condition>
2190     <condition id="ARMv8MML_DSP_SP_IAR">
2191       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2192       <require condition="ARMv8MML_DSP_SP"/>
2193       <require Tcompiler="IAR"/>
2194     </condition>
2195     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2196       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2197       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2198       <require Dendian="Little-endian"/>
2199     </condition>
2200     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2201       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2202       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2203       <require Dendian="Little-endian"/>
2204     </condition>
2205     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2206       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2207       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2208       <require Dendian="Little-endian"/>
2209     </condition>
2210     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2211       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2212       <require condition="ARMv8MML_DSP_SP_IAR"/>
2213       <require Dendian="Little-endian"/>
2214     </condition>
2215
2216     <!-- conditions selecting single devices and CMSIS Core -->
2217     <condition id="ARMCM0 CMSIS">
2218       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2219       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2220       <require Cclass="CMSIS" Cgroup="CORE"/>
2221     </condition>
2222
2223     <condition id="ARMCM0+ CMSIS">
2224       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2225       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2226       <require Cclass="CMSIS" Cgroup="CORE"/>
2227     </condition>
2228
2229     <condition id="ARMCM1 CMSIS">
2230       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2231       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2232       <require Cclass="CMSIS" Cgroup="CORE"/>
2233     </condition>
2234
2235     <condition id="ARMCM3 CMSIS">
2236       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2237       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2238       <require Cclass="CMSIS" Cgroup="CORE"/>
2239     </condition>
2240
2241     <condition id="ARMCM4 CMSIS">
2242       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2243       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2244       <require Cclass="CMSIS" Cgroup="CORE"/>
2245     </condition>
2246
2247     <condition id="ARMCM7 CMSIS">
2248       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2249       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2250       <require Cclass="CMSIS" Cgroup="CORE"/>
2251     </condition>
2252
2253     <condition id="ARMCM23 CMSIS">
2254       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2255       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2256       <require Cclass="CMSIS" Cgroup="CORE"/>
2257     </condition>
2258
2259     <condition id="ARMCM33 CMSIS">
2260       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2261       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2262       <require Cclass="CMSIS" Cgroup="CORE"/>
2263     </condition>
2264
2265     <condition id="ARMCM35P CMSIS">
2266       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2267       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2268       <require Cclass="CMSIS" Cgroup="CORE"/>
2269     </condition>
2270
2271     <condition id="ARMSC000 CMSIS">
2272       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2273       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2274       <require Cclass="CMSIS" Cgroup="CORE"/>
2275     </condition>
2276
2277     <condition id="ARMSC300 CMSIS">
2278       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2279       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2280       <require Cclass="CMSIS" Cgroup="CORE"/>
2281     </condition>
2282
2283     <condition id="ARMv8MBL CMSIS">
2284       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2285       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2286       <require Cclass="CMSIS" Cgroup="CORE"/>
2287     </condition>
2288
2289     <condition id="ARMv8MML CMSIS">
2290       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2291       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2292       <require Cclass="CMSIS" Cgroup="CORE"/>
2293     </condition>
2294
2295     <condition id="ARMv81MML CMSIS">
2296       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2297       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2298       <require Cclass="CMSIS" Cgroup="CORE"/>
2299     </condition>
2300
2301     <condition id="ARMCA5 CMSIS">
2302       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2303       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2304       <require Cclass="CMSIS" Cgroup="CORE"/>
2305     </condition>
2306
2307     <condition id="ARMCA7 CMSIS">
2308       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2309       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2310       <require Cclass="CMSIS" Cgroup="CORE"/>
2311     </condition>
2312
2313     <condition id="ARMCA9 CMSIS">
2314       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2315       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2316       <require Cclass="CMSIS" Cgroup="CORE"/>
2317     </condition>
2318
2319     <!-- CMSIS DSP -->
2320     <condition id="CMSIS DSP">
2321       <description>Components required for DSP</description>
2322       <require condition="ARMv6_7_8-M Device"/>
2323       <require condition="ARMCC GCC IAR"/>
2324       <require Cclass="CMSIS" Cgroup="CORE"/>
2325     </condition>
2326
2327     <!-- CMSIS NN -->
2328     <condition id="CMSIS NN">
2329       <description>Components required for NN</description>
2330       <require condition="CMSIS DSP"/>
2331     </condition>
2332
2333     <!-- RTOS RTX -->
2334     <condition id="RTOS RTX">
2335       <description>Components required for RTOS RTX</description>
2336       <require condition="ARMv6_7-M Device"/>
2337       <require condition="ARMCC GCC IAR"/>
2338       <require Cclass="Device" Cgroup="Startup"/>
2339       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2340     </condition>
2341     <condition id="RTOS RTX IFX">
2342       <description>Components required for RTOS RTX IFX</description>
2343       <require condition="ARMv6_7-M Device"/>
2344       <require condition="ARMCC GCC IAR"/>
2345       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2346       <require Cclass="Device" Cgroup="Startup"/>
2347       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2348     </condition>
2349     <condition id="RTOS RTX5">
2350       <description>Components required for RTOS RTX5</description>
2351       <require condition="ARMv6_7_8-M Device"/>
2352       <require condition="ARMCC GCC IAR"/>
2353       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2354     </condition>
2355     <condition id="RTOS2 RTX5">
2356       <description>Components required for RTOS2 RTX5</description>
2357       <require condition="ARMv6_7_8-M Device"/>
2358       <require condition="ARMCC GCC IAR"/>
2359       <require Cclass="CMSIS"  Cgroup="CORE"/>
2360       <require Cclass="Device" Cgroup="Startup"/>
2361     </condition>
2362     <condition id="RTOS2 RTX5 v7-A">
2363       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2364       <require condition="ARMv7-A Device"/>
2365       <require condition="ARMCC GCC IAR"/>
2366       <require Cclass="CMSIS"  Cgroup="CORE"/>
2367       <require Cclass="Device" Cgroup="Startup"/>
2368       <require Cclass="Device" Cgroup="OS Tick"/>
2369       <require Cclass="Device" Cgroup="IRQ Controller"/>
2370     </condition>
2371     <condition id="RTOS2 RTX5 Lib">
2372       <description>Components required for RTOS2 RTX5 Library</description>
2373       <require condition="ARMv6_7_8-M Device"/>
2374       <require condition="ARMCC GCC IAR"/>
2375       <require Cclass="CMSIS"  Cgroup="CORE"/>
2376       <require Cclass="Device" Cgroup="Startup"/>
2377     </condition>
2378     <condition id="RTOS2 RTX5 NS">
2379       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2380       <require condition="ARMv8-M TZ Device"/>
2381       <require condition="ARMCC GCC IAR"/>
2382       <require Cclass="CMSIS"  Cgroup="CORE"/>
2383       <require Cclass="Device" Cgroup="Startup"/>
2384     </condition>
2385
2386     <!-- OS Tick -->
2387     <condition id="OS Tick PTIM">
2388       <description>Components required for OS Tick Private Timer</description>
2389       <require condition="CA5_CA9"/>
2390       <require Cclass="Device" Cgroup="IRQ Controller"/>
2391     </condition>
2392
2393     <condition id="OS Tick GTIM">
2394       <description>Components required for OS Tick Generic Physical Timer</description>
2395       <require condition="CA7"/>
2396       <require Cclass="Device" Cgroup="IRQ Controller"/>
2397     </condition>
2398
2399   </conditions>
2400
2401   <components>
2402     <!-- CMSIS-Core component -->
2403     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.4.0"  condition="ARMv6_7_8-M Device" >
2404       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2405       <files>
2406         <!-- CPU independent -->
2407         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2408         <file category="include" name="CMSIS/Core/Include/"/>
2409         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2410         <!-- Code template -->
2411         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2412         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2413       </files>
2414     </component>
2415
2416     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.4"  condition="ARMv7-A Device" >
2417       <description>CMSIS-CORE for Cortex-A</description>
2418       <files>
2419         <!-- CPU independent -->
2420         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2421         <file category="include" name="CMSIS/Core_A/Include/"/>
2422       </files>
2423     </component>
2424
2425     <!-- CMSIS-Startup components -->
2426     <!-- Cortex-M0 -->
2427     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM0 CMSIS">
2428       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2429       <files>
2430         <!-- include folder / device header file -->
2431         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2432         <!-- startup / system file -->
2433         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.1" attr="config"/>
2434         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2435         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2436         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2437         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2438       </files>
2439     </component>
2440     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM0 CMSIS">
2441       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2442       <files>
2443         <!-- include folder / device header file -->
2444         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2445         <!-- startup / system file -->
2446         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2447         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.0.1" attr="config" condition="GCC"/>
2448         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2449         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2450         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2451       </files>
2452     </component>
2453
2454     <!-- Cortex-M0+ -->
2455     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM0+ CMSIS">
2456       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2457       <files>
2458         <!-- include folder / device header file -->
2459         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2460         <!-- startup / system file -->
2461         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.1" attr="config"/>
2462         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2463         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2464         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2465         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2466       </files>
2467     </component>
2468     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM0+ CMSIS">
2469       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2470       <files>
2471         <!-- include folder / device header file -->
2472         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2473         <!-- startup / system file -->
2474         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2475         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.0.1" attr="config" condition="GCC"/>
2476         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2477         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2478         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2479       </files>
2480     </component>
2481
2482     <!-- Cortex-M1 -->
2483     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM1 CMSIS">
2484       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2485       <files>
2486         <!-- include folder / device header file -->
2487         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2488         <!-- startup / system file -->
2489         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.1" attr="config"/>
2490         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2491         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2492         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2493         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2494       </files>
2495     </component>
2496     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM1 CMSIS">
2497       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2498       <files>
2499         <!-- include folder / device header file -->
2500         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2501         <!-- startup / system file -->
2502         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2503         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.0.1" attr="config" condition="GCC"/>
2504         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2505         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2506         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2507       </files>
2508     </component>
2509
2510     <!-- Cortex-M3 -->
2511     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM3 CMSIS">
2512       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2513       <files>
2514         <!-- include folder / device header file -->
2515         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2516         <!-- startup / system file -->
2517         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.1" attr="config"/>
2518         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2519         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2520         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2521         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2522       </files>
2523     </component>
2524     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM3 CMSIS">
2525       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2526       <files>
2527         <!-- include folder / device header file -->
2528         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2529         <!-- startup / system file -->
2530         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2531         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.0.1" attr="config" condition="GCC"/>
2532         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2533         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2534         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2535       </files>
2536     </component>
2537
2538     <!-- Cortex-M4 -->
2539     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM4 CMSIS">
2540       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2541       <files>
2542         <!-- include folder / device header file -->
2543         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2544         <!-- startup / system file -->
2545         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.1" attr="config"/>
2546         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2547         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2548         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2549        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2550       </files>
2551     </component>
2552     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM4 CMSIS">
2553       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2554       <files>
2555         <!-- include folder / device header file -->
2556         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2557         <!-- startup / system file -->
2558         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2559         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.0.1" attr="config" condition="GCC"/>
2560         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2561         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2562         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2563       </files>
2564     </component>
2565
2566     <!-- Cortex-M7 -->
2567     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM7 CMSIS">
2568       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2569       <files>
2570         <!-- include folder / device header file -->
2571         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2572         <!-- startup / system file -->
2573         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.1" attr="config"/>
2574         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2575         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2576         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2577         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2578       </files>
2579     </component>
2580     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM7 CMSIS">
2581       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2582       <files>
2583         <!-- include folder / device header file -->
2584         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2585         <!-- startup / system file -->
2586         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2587         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.0.1" attr="config" condition="GCC"/>
2588         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2589         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2590         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2591       </files>
2592     </component>
2593
2594     <!-- Cortex-M23 -->
2595     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM23 CMSIS">
2596       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2597       <files>
2598         <!-- include folder / device header file -->
2599         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2600         <!-- startup / system file -->
2601         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.1" attr="config"/>
2602         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
2603         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2604         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.0" attr="config"/>
2605         <!-- SAU configuration -->
2606         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2607       </files>
2608     </component>
2609     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.1" condition="ARMCM23 CMSIS">
2610       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2611       <files>
2612         <!-- include folder / device header file -->
2613         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2614         <!-- startup / system file -->
2615         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.1" attr="config" condition="ARMCC"/>
2616         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.0.1" attr="config" condition="GCC"/>
2617         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.0.0" attr="config" condition="GCC"/>
2618         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2619         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2620         <!-- SAU configuration -->
2621         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2622       </files>
2623     </component>
2624
2625     <!-- Cortex-M33 -->
2626     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM33 CMSIS">
2627       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2628       <files>
2629         <!-- include folder / device header file -->
2630         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2631         <!-- startup / system file -->
2632         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.1" attr="config"/>
2633         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2634         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2635         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2636         <!-- SAU configuration -->
2637         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2638       </files>
2639     </component>
2640     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM33 CMSIS">
2641       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2642       <files>
2643         <!-- include folder / device header file -->
2644         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2645         <!-- startup / system file -->
2646         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2647         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.0.1" attr="config" condition="GCC"/>
2648         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2649         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2650         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2651         <!-- SAU configuration -->
2652         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2653       </files>
2654     </component>
2655
2656     <!-- Cortex-M35P -->
2657     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM35P CMSIS">
2658       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2659       <files>
2660         <!-- include folder / device header file -->
2661         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2662         <!-- startup / system file -->
2663         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.1" attr="config"/>
2664         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2665         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2666         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2667         <!-- SAU configuration -->
2668         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2669       </files>
2670     </component>
2671     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.1" condition="ARMCM35P CMSIS">
2672       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2673       <files>
2674         <!-- include folder / device header file -->
2675         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2676         <!-- startup / system file -->
2677         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2678         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.1" attr="config" condition="GCC"/>
2679         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2680         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
2681         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2682         <!-- SAU configuration -->
2683         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2684       </files>
2685     </component>
2686
2687     <!-- Cortex-SC000 -->
2688     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMSC000 CMSIS">
2689       <description>System and Startup for Generic Arm SC000 device</description>
2690       <files>
2691         <!-- include folder / device header file -->
2692         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2693         <!-- startup / system file -->
2694         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.1" attr="config"/>
2695         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2696         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2697         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2698         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2699       </files>
2700     </component>
2701     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMSC000 CMSIS">
2702       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2703       <files>
2704         <!-- include folder / device header file -->
2705         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2706         <!-- startup / system file -->
2707         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2708         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.0.1" attr="config" condition="GCC"/>
2709         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2710         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2711         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2712       </files>
2713     </component>
2714
2715     <!-- Cortex-SC300 -->
2716     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMSC300 CMSIS">
2717       <description>System and Startup for Generic Arm SC300 device</description>
2718       <files>
2719         <!-- include folder / device header file -->
2720         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2721         <!-- startup / system file -->
2722         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.1" attr="config"/>
2723         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2724         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2725         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2726         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2727       </files>
2728     </component>
2729     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMSC300 CMSIS">
2730       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2731       <files>
2732         <!-- include folder / device header file -->
2733         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2734         <!-- startup / system file -->
2735         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2736         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.0.1" attr="config" condition="GCC"/>
2737         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2738         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2739         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2740       </files>
2741     </component>
2742
2743     <!-- ARMv8MBL -->
2744     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMv8MBL CMSIS">
2745       <description>System and Startup for Generic Armv8-M Baseline device</description>
2746       <files>
2747         <!-- include folder / device header file -->
2748         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2749         <!-- startup / system file -->
2750         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.1" attr="config"/>
2751         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
2752         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2753         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.0" attr="config"/>
2754         <!-- SAU configuration -->
2755         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2756       </files>
2757     </component>
2758     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.1" condition="ARMv8MBL CMSIS">
2759       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2760       <files>
2761         <!-- include folder / device header file -->
2762         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2763         <!-- startup / system file -->
2764         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.1" attr="config" condition="ARMCC"/>
2765         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.0.1" attr="config" condition="GCC"/>
2766         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2767         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2768         <!-- SAU configuration -->
2769         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2770       </files>
2771     </component>
2772
2773     <!-- ARMv8MML -->
2774     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMv8MML CMSIS">
2775       <description>System and Startup for Generic Armv8-M Mainline device</description>
2776       <files>
2777         <!-- include folder / device header file -->
2778         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2779         <!-- startup / system file -->
2780         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.1" attr="config"/>
2781         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2782         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2783         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2784         <!-- SAU configuration -->
2785         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2786       </files>
2787     </component>
2788     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMv8MML CMSIS">
2789       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2790       <files>
2791         <!-- include folder / device header file -->
2792         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2793         <!-- startup / system file -->
2794         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2795         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.0.1" attr="config" condition="GCC"/>
2796         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2797         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2798         <!-- SAU configuration -->
2799         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2800       </files>
2801     </component>
2802
2803     <!-- ARMv81MML -->
2804     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv81MML CMSIS">
2805       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2806       <files>
2807         <!-- include folder / device header file -->
2808         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2809         <!-- startup / system file -->
2810         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.1" attr="config"/>
2811         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2812         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.0.0" attr="config" condition="GCC"/>
2813         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.1.0" attr="config"/>
2814         <!-- SAU configuration -->
2815         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2816       </files>
2817     </component>
2818
2819     <!-- Cortex-A5 -->
2820     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2821       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2822       <files>
2823         <!-- include folder / device header file -->
2824         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2825         <!-- startup / system / mmu files -->
2826         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2827         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2828         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2829         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2830         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2831         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2832         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2833         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2834         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2835         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2836         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2837         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2838
2839       </files>
2840     </component>
2841
2842     <!-- Cortex-A7 -->
2843     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2844       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2845       <files>
2846         <!-- include folder / device header file -->
2847         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2848         <!-- startup / system / mmu files -->
2849         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2850         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2851         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2852         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2853         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2854         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2855         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2856         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2857         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2858         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2859         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2860         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2861       </files>
2862     </component>
2863
2864     <!-- Cortex-A9 -->
2865     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2866       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2867       <files>
2868         <!-- include folder / device header file -->
2869         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2870         <!-- startup / system / mmu files -->
2871         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2872         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2873         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2874         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2875         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2876         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2877         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2878         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2879         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2880         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2881         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2882         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2883       </files>
2884     </component>
2885
2886     <!-- IRQ Controller -->
2887     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2888       <description>IRQ Controller implementation using GIC</description>
2889       <files>
2890         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2891       </files>
2892     </component>
2893
2894     <!-- OS Tick -->
2895     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2896       <description>OS Tick implementation using Private Timer</description>
2897       <files>
2898         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2899       </files>
2900     </component>
2901
2902     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2903       <description>OS Tick implementation using Generic Physical Timer</description>
2904       <files>
2905         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2906       </files>
2907     </component>
2908
2909     <!-- CMSIS-DSP component -->
2910     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.7.0" isDefaultVariant="true" condition="CMSIS DSP">
2911       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2912       <files>
2913         <!-- CPU independent -->
2914         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2915         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
2916
2917         <!-- CPU and Compiler dependent -->
2918         <!-- ARMCC -->
2919         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2920         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2921         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2922         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2923         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2924         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2925         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2926         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2927         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2928         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2929         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2930         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2931         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2932         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2933         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2934         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2935
2936         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2937         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2938         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2939         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2940         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2941         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2942         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2943         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2944         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2945         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2946         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2947         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2948         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2949         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2950         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
2951         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
2952
2953         <!-- GCC -->
2954         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2955         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2956         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2957         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2958         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
2959         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2960         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2961         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2962
2963         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2964         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2965         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2966         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2967         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2968         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2969         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2970         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2971         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2972         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2973         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2974         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2975         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2976         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2977         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
2978         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
2979
2980         <!-- IAR -->
2981         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2982         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2983         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2984         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2985         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2986         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2987         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2988         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2989         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2990         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2991         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2992         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2993         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2994         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2995         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
2996         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
2997
2998         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2999         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3000         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3001         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3002         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3003         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3004         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3005         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3006         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3007         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3008         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3009         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3010         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3011         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3012         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3013         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3014
3015       </files>
3016     </component>
3017     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.7.0" condition="CMSIS DSP">
3018       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3019       <files>
3020         <!-- CPU independent -->
3021         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3022         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3023
3024         <!-- DSP sources (core) -->
3025         <file category="source" name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3026         <file category="source" name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3027         <file category="source" name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3028         <file category="source" name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3029         <file category="source" name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3030         <file category="source" name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3031         <file category="source" name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3032         <file category="source" name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3033         <file category="source" name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3034         <file category="source" name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3035
3036       </files>
3037     </component>
3038
3039     <!-- CMSIS-NN component -->
3040     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.2.0" condition="CMSIS NN">
3041       <description>CMSIS-NN Neural Network Library</description>
3042       <files>
3043         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3044         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3045
3046         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3047         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3048         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3049         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3050
3051         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3052         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3053         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3054         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3055         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3056         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3057         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3058         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3059         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3060         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3061         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3062         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3063         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
3064
3065         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3066         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3067         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3068         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3069         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3070         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3071
3072         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3073         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3074         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3075         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3076         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3077
3078         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3079
3080         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3081         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3082       </files>
3083     </component>
3084
3085     <!-- CMSIS-RTOS Keil RTX component -->
3086     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3087       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3088       <RTE_Components_h>
3089         <!-- the following content goes into file 'RTE_Components.h' -->
3090         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3091         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3092       </RTE_Components_h>
3093       <files>
3094         <!-- CPU independent -->
3095         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3096         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3097         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3098
3099         <!-- RTX templates -->
3100         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3101         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3102         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3103         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3104         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3105         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3106         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3107         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3108         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3109         <!-- tool-chain specific template file -->
3110         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3111         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3112         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3113
3114         <!-- CPU and Compiler dependent -->
3115         <!-- ARMCC -->
3116         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3117         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3118         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3119         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3120         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3121         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3122         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3123         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3124         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3125         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3126         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3127         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3128         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3129         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3130         <!-- GCC -->
3131         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3132         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3133         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3134         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3135         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3136         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3137         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3138         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3139         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3140         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3141         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3142         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3143         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3144         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3145         <!-- IAR -->
3146         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3147         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3148         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3149         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3150         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3151         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3152         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3153         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3154         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3155         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3156         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3157         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3158         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3159         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3160       </files>
3161     </component>
3162     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3163     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3164       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3165       <RTE_Components_h>
3166         <!-- the following content goes into file 'RTE_Components.h' -->
3167         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3168         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3169       </RTE_Components_h>
3170       <files>
3171         <!-- CPU independent -->
3172         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3173         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3174         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3175
3176         <!-- RTX templates -->
3177         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3178         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3179         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3180         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3181         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3182         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3183         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3184         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3185         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3186         <!-- tool-chain specific template file -->
3187         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3188         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3189         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3190
3191         <!-- CPU and Compiler dependent -->
3192         <!-- ARMCC -->
3193         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3194         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3195         <!-- GCC -->
3196         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3197         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3198         <!-- IAR -->
3199       </files>
3200     </component>
3201
3202     <!-- CMSIS-RTOS Keil RTX5 component -->
3203     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.1" Capiversion="1.0.0" condition="RTOS RTX5">
3204       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3205       <RTE_Components_h>
3206         <!-- the following content goes into file 'RTE_Components.h' -->
3207         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3208         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3209       </RTE_Components_h>
3210       <files>
3211         <!-- RTX header file -->
3212         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3213         <!-- RTX compatibility module for API V1 -->
3214         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3215       </files>
3216     </component>
3217
3218     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3219     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
3220       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
3221       <RTE_Components_h>
3222         <!-- the following content goes into file 'RTE_Components.h' -->
3223         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3224         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3225       </RTE_Components_h>
3226       <files>
3227         <!-- RTX documentation -->
3228         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3229
3230         <!-- RTX header files -->
3231         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3232
3233         <!-- RTX configuration -->
3234         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3235         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3236
3237         <!-- RTX templates -->
3238         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3239         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3240         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3241         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3242         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3243         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3244         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3245         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3246         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3247         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3248
3249         <!-- RTX library configuration -->
3250         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3251
3252         <!-- RTX libraries (CPU and Compiler dependent) -->
3253         <!-- ARMCC -->
3254         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3255         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3256         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3257         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3258         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3259         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3260         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3261         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3262         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3263         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3264         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3265         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3266         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3267         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3268         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3269         <!-- GCC -->
3270         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3271         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3272         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3273         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3274         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3275         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3276         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3277         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3278         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3279         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3280         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3281         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3282         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3283         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3284         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3285         <!-- IAR -->
3286         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3287         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3288         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3289         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3290         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3291         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3292         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3293         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3294         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3295         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3296         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3297         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3298         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3299         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3300         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3301       </files>
3302     </component>
3303     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3304       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
3305       <RTE_Components_h>
3306         <!-- the following content goes into file 'RTE_Components.h' -->
3307         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3308         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3309         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3310       </RTE_Components_h>
3311       <files>
3312         <!-- RTX documentation -->
3313         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3314
3315         <!-- RTX header files -->
3316         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3317
3318         <!-- RTX configuration -->
3319         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3320         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3321
3322         <!-- RTX templates -->
3323         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3324         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3325         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3326         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3327         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3328         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3329         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3330         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3331         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3332         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3333
3334         <!-- RTX library configuration -->
3335         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3336
3337         <!-- RTX libraries (CPU and Compiler dependent) -->
3338         <!-- ARMCC -->
3339         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3340         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3341         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3342         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3343         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3344         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3345         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3346         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3347         <!-- GCC -->
3348         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3349         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3350         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3351         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3352         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3353         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3354         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3355         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3356         <!-- IAR -->
3357         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3358         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3359         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3360         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3361         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3362         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3363         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3364         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3365       </files>
3366     </component>
3367     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5">
3368       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3369       <RTE_Components_h>
3370         <!-- the following content goes into file 'RTE_Components.h' -->
3371         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3372         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3373         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3374       </RTE_Components_h>
3375       <files>
3376         <!-- RTX documentation -->
3377         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3378
3379         <!-- RTX header files -->
3380         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3381
3382         <!-- RTX configuration -->
3383         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3384         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3385
3386         <!-- RTX templates -->
3387         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3388         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3389         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3390         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3391         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3392         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3393         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3394         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3395         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3396         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3397
3398         <!-- RTX sources (core) -->
3399         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3400         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3401         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3402         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3403         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3404         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3405         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3406         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3407         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3408         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3409         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3410         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3411         <!-- RTX sources (library configuration) -->
3412         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3413         <!-- RTX sources (handlers ARMCC) -->
3414         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3415         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3416         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3417         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3418         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3419         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3420         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3421         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3422         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3423         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3424         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3425         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3426         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3427         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3428         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3429         <!-- RTX sources (handlers GCC) -->
3430         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3431         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3432         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3433         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3434         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3435         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3436         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3437         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3438         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3439         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3440         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3441         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3442         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3443         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3444         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3445         <!-- RTX sources (handlers IAR) -->
3446         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3447         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3448         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3449         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3450         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3451         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3452         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3453         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3454         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3455         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3456         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3457         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3458         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3459         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3460         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3461         <!-- OS Tick (SysTick) -->
3462         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3463       </files>
3464     </component>
3465     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3466       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3467       <RTE_Components_h>
3468         <!-- the following content goes into file 'RTE_Components.h' -->
3469         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3470         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3471         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3472       </RTE_Components_h>
3473       <files>
3474         <!-- RTX documentation -->
3475         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3476
3477         <!-- RTX header files -->
3478         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3479
3480         <!-- RTX configuration -->
3481         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3482         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3483
3484         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3485
3486         <!-- RTX templates -->
3487         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3488         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3489         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3490         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3491         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3492         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3493         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3494         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3495         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3496         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3497
3498         <!-- RTX sources (core) -->
3499         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3500         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3501         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3502         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3503         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3504         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3505         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3506         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3507         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3508         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3509         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3510         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3511         <!-- RTX sources (library configuration) -->
3512         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3513         <!-- RTX sources (handlers ARMCC) -->
3514         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3515         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3516         <!-- RTX sources (handlers GCC) -->
3517         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3518         <!-- RTX sources (handlers IAR) -->
3519         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3520       </files>
3521     </component>
3522     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3523       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3524       <RTE_Components_h>
3525         <!-- the following content goes into file 'RTE_Components.h' -->
3526         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3527         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3528         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3529         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3530       </RTE_Components_h>
3531       <files>
3532         <!-- RTX documentation -->
3533         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3534
3535         <!-- RTX header files -->
3536         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3537
3538         <!-- RTX configuration -->
3539         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3540         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3541
3542         <!-- RTX templates -->
3543         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3544         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3545         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3546         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3547         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3548         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3549         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3550         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3551         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3552         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3553
3554         <!-- RTX sources (core) -->
3555         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3556         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3557         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3558         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3559         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3560         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3561         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3562         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3563         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3564         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3565         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3566         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3567         <!-- RTX sources (library configuration) -->
3568         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3569         <!-- RTX sources (ARMCC handlers) -->
3570         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3571         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3572         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3573         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3574         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3575         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3576         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3577         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3578         <!-- RTX sources (GCC handlers) -->
3579         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3580         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3581         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3582         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3583         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3584         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3585         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3586         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3587         <!-- RTX sources (IAR handlers) -->
3588         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3589         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3590         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3591         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3592         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3593         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3594         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3595         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3596         <!-- OS Tick (SysTick) -->
3597         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3598       </files>
3599     </component>
3600
3601     <!-- CMSIS-Driver Custom components -->
3602     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3603       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3604       <files>
3605         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3606         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3607       </files>
3608     </component>
3609     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3610       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3611       <files>
3612         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3613         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3614       </files>
3615     </component>
3616     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.1.0" Capiversion="1.1.0">
3617       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3618       <files>
3619         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3620         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3621       </files>
3622     </component>
3623     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3624       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3625       <files>
3626         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3627         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3628       </files>
3629     </component>
3630     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.2.0" Capiversion="1.2.0">
3631       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3632       <files>
3633         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3634         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3635       </files>
3636     </component>
3637     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3638       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3639       <files>
3640         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3641         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3642       </files>
3643     </component>
3644     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3645       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3646       <files>
3647         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3648         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3649       </files>
3650     </component>
3651     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3652       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3653       <files>
3654         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3655         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3656       </files>
3657     </component>
3658     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3659       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3660       <files>
3661         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3662         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3663         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3664         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3665       </files>
3666     </component>
3667     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3668       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3669       <files>
3670         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3671         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3672       </files>
3673     </component>
3674     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3675       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3676       <files>
3677         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3678         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3679       </files>
3680     </component>
3681     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3682       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3683       <files>
3684         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3685         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3686       </files>
3687     </component>
3688     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3689       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3690       <files>
3691         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3692         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3693       </files>
3694     </component>
3695     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.0.0">
3696       <description>Access to #include Driver_WiFi.h file</description>
3697       <files>
3698         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3699         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3700       </files>
3701     </component>
3702   </components>
3703
3704   <boards>
3705     <board name="uVision Simulator" vendor="Keil">
3706       <description>uVision Simulator</description>
3707       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3708       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3709       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3710       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3711       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3712       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3713       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3714       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3715       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3716       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3717       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3718       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3719       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3720       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3721       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3722       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3723       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3724       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3725       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3726       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3727       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3728       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3729       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3730       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3731     </board>
3732
3733     <board name="EWARM Simulator" vendor="IAR">
3734       <description>EWARM Simulator</description>
3735       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3736       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3737       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3738       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3739       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3740       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3741       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3742       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3743       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3744       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3745       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3746       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3747       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3748       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3749       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3750       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3751       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3752       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3753       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3754       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3755       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3756       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3757       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3758       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3759     </board>
3760   </boards>
3761
3762   <examples>
3763     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3764       <description>DSP_Lib Class Marks example</description>
3765       <board name="uVision Simulator" vendor="Keil"/>
3766       <project>
3767         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3768       </project>
3769       <attributes>
3770         <component Cclass="CMSIS" Cgroup="CORE"/>
3771         <component Cclass="CMSIS" Cgroup="DSP"/>
3772         <component Cclass="Device" Cgroup="Startup"/>
3773         <category>Getting Started</category>
3774       </attributes>
3775     </example>
3776
3777     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3778       <description>DSP_Lib Convolution example</description>
3779       <board name="uVision Simulator" vendor="Keil"/>
3780       <project>
3781         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3782       </project>
3783       <attributes>
3784         <component Cclass="CMSIS" Cgroup="CORE"/>
3785         <component Cclass="CMSIS" Cgroup="DSP"/>
3786         <component Cclass="Device" Cgroup="Startup"/>
3787         <category>Getting Started</category>
3788       </attributes>
3789     </example>
3790
3791     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3792       <description>DSP_Lib Dotproduct example</description>
3793       <board name="uVision Simulator" vendor="Keil"/>
3794       <project>
3795         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3796       </project>
3797       <attributes>
3798         <component Cclass="CMSIS" Cgroup="CORE"/>
3799         <component Cclass="CMSIS" Cgroup="DSP"/>
3800         <component Cclass="Device" Cgroup="Startup"/>
3801         <category>Getting Started</category>
3802       </attributes>
3803     </example>
3804
3805     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3806       <description>DSP_Lib FFT Bin example</description>
3807       <board name="uVision Simulator" vendor="Keil"/>
3808       <project>
3809         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3810       </project>
3811       <attributes>
3812         <component Cclass="CMSIS" Cgroup="CORE"/>
3813         <component Cclass="CMSIS" Cgroup="DSP"/>
3814         <component Cclass="Device" Cgroup="Startup"/>
3815         <category>Getting Started</category>
3816       </attributes>
3817     </example>
3818
3819     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3820       <description>DSP_Lib FIR example</description>
3821       <board name="uVision Simulator" vendor="Keil"/>
3822       <project>
3823         <environment name="uv" load="arm_fir_example.uvprojx"/>
3824       </project>
3825       <attributes>
3826         <component Cclass="CMSIS" Cgroup="CORE"/>
3827         <component Cclass="CMSIS" Cgroup="DSP"/>
3828         <component Cclass="Device" Cgroup="Startup"/>
3829         <category>Getting Started</category>
3830       </attributes>
3831     </example>
3832
3833     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3834       <description>DSP_Lib Graphic Equalizer example</description>
3835       <board name="uVision Simulator" vendor="Keil"/>
3836       <project>
3837         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3838       </project>
3839       <attributes>
3840         <component Cclass="CMSIS" Cgroup="CORE"/>
3841         <component Cclass="CMSIS" Cgroup="DSP"/>
3842         <component Cclass="Device" Cgroup="Startup"/>
3843         <category>Getting Started</category>
3844       </attributes>
3845     </example>
3846
3847     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3848       <description>DSP_Lib Linear Interpolation example</description>
3849       <board name="uVision Simulator" vendor="Keil"/>
3850       <project>
3851         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3852       </project>
3853       <attributes>
3854         <component Cclass="CMSIS" Cgroup="CORE"/>
3855         <component Cclass="CMSIS" Cgroup="DSP"/>
3856         <component Cclass="Device" Cgroup="Startup"/>
3857         <category>Getting Started</category>
3858       </attributes>
3859     </example>
3860
3861     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3862       <description>DSP_Lib Matrix example</description>
3863       <board name="uVision Simulator" vendor="Keil"/>
3864       <project>
3865         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3866       </project>
3867       <attributes>
3868         <component Cclass="CMSIS" Cgroup="CORE"/>
3869         <component Cclass="CMSIS" Cgroup="DSP"/>
3870         <component Cclass="Device" Cgroup="Startup"/>
3871         <category>Getting Started</category>
3872       </attributes>
3873     </example>
3874
3875     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3876       <description>DSP_Lib Signal Convergence example</description>
3877       <board name="uVision Simulator" vendor="Keil"/>
3878       <project>
3879         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3880       </project>
3881       <attributes>
3882         <component Cclass="CMSIS" Cgroup="CORE"/>
3883         <component Cclass="CMSIS" Cgroup="DSP"/>
3884         <component Cclass="Device" Cgroup="Startup"/>
3885         <category>Getting Started</category>
3886       </attributes>
3887     </example>
3888
3889     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3890       <description>DSP_Lib Sinus/Cosinus example</description>
3891       <board name="uVision Simulator" vendor="Keil"/>
3892       <project>
3893         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3894       </project>
3895       <attributes>
3896         <component Cclass="CMSIS" Cgroup="CORE"/>
3897         <component Cclass="CMSIS" Cgroup="DSP"/>
3898         <component Cclass="Device" Cgroup="Startup"/>
3899         <category>Getting Started</category>
3900       </attributes>
3901     </example>
3902
3903     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3904       <description>DSP_Lib Variance example</description>
3905       <board name="uVision Simulator" vendor="Keil"/>
3906       <project>
3907         <environment name="uv" load="arm_variance_example.uvprojx"/>
3908       </project>
3909       <attributes>
3910         <component Cclass="CMSIS" Cgroup="CORE"/>
3911         <component Cclass="CMSIS" Cgroup="DSP"/>
3912         <component Cclass="Device" Cgroup="Startup"/>
3913         <category>Getting Started</category>
3914       </attributes>
3915     </example>
3916
3917     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3918       <description>Neural Network CIFAR10 example</description>
3919       <board name="uVision Simulator" vendor="Keil"/>
3920       <project>
3921         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3922       </project>
3923       <attributes>
3924         <component Cclass="CMSIS" Cgroup="CORE"/>
3925         <component Cclass="CMSIS" Cgroup="DSP"/>
3926         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3927         <component Cclass="Device" Cgroup="Startup"/>
3928         <category>Getting Started</category>
3929       </attributes>
3930     </example>
3931
3932     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
3933       <description>Neural Network CIFAR10 example</description>
3934       <board name="EWARM Simulator" vendor="IAR"/>
3935       <project>
3936         <environment name="iar" load="NN-example-cifar10.ewp"/>
3937       </project>
3938       <attributes>
3939         <component Cclass="CMSIS" Cgroup="CORE"/>
3940         <component Cclass="CMSIS" Cgroup="DSP"/>
3941         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3942         <component Cclass="Device" Cgroup="Startup"/>
3943         <category>Getting Started</category>
3944       </attributes>
3945     </example>
3946
3947     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
3948       <description>Neural Network GRU example</description>
3949       <board name="uVision Simulator" vendor="Keil"/>
3950       <project>
3951         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3952       </project>
3953       <attributes>
3954         <component Cclass="CMSIS" Cgroup="CORE"/>
3955         <component Cclass="CMSIS" Cgroup="DSP"/>
3956         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3957         <component Cclass="Device" Cgroup="Startup"/>
3958         <category>Getting Started</category>
3959       </attributes>
3960     </example>
3961
3962     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
3963       <description>Neural Network GRU example</description>
3964       <board name="EWARM Simulator" vendor="IAR"/>
3965       <project>
3966         <environment name="iar" load="NN-example-gru.ewp"/>
3967       </project>
3968       <attributes>
3969         <component Cclass="CMSIS" Cgroup="CORE"/>
3970         <component Cclass="CMSIS" Cgroup="DSP"/>
3971         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3972         <component Cclass="Device" Cgroup="Startup"/>
3973         <category>Getting Started</category>
3974       </attributes>
3975     </example>
3976
3977     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3978       <description>CMSIS-RTOS2 Blinky example</description>
3979       <board name="uVision Simulator" vendor="Keil"/>
3980       <project>
3981         <environment name="uv" load="Blinky.uvprojx"/>
3982       </project>
3983       <attributes>
3984         <component Cclass="CMSIS" Cgroup="CORE"/>
3985         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3986         <component Cclass="Device" Cgroup="Startup"/>
3987         <category>Getting Started</category>
3988       </attributes>
3989     </example>
3990
3991     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3992       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3993       <board name="uVision Simulator" vendor="Keil"/>
3994       <project>
3995         <environment name="uv" load="Blinky.uvprojx"/>
3996       </project>
3997       <attributes>
3998         <component Cclass="CMSIS" Cgroup="CORE"/>
3999         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4000         <component Cclass="Device" Cgroup="Startup"/>
4001         <category>Getting Started</category>
4002       </attributes>
4003     </example>
4004
4005     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4006       <description>CMSIS-RTOS2 Message Queue Example</description>
4007       <board name="uVision Simulator" vendor="Keil"/>
4008       <project>
4009         <environment name="uv" load="MsqQueue.uvprojx"/>
4010       </project>
4011       <attributes>
4012         <component Cclass="CMSIS" Cgroup="CORE"/>
4013         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4014         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4015         <component Cclass="Device" Cgroup="Startup"/>
4016         <category>Getting Started</category>
4017       </attributes>
4018     </example>
4019
4020     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4021       <description>CMSIS-RTOS2 Memory Pool Example</description>
4022       <board name="uVision Simulator" vendor="Keil"/>
4023       <project>
4024         <environment name="uv" load="MemPool.uvprojx"/>
4025       </project>
4026       <attributes>
4027         <component Cclass="CMSIS" Cgroup="CORE"/>
4028         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4029         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4030         <component Cclass="Device" Cgroup="Startup"/>
4031         <category>Getting Started</category>
4032       </attributes>
4033     </example>
4034
4035     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4036       <description>Bare-metal secure/non-secure example without RTOS</description>
4037       <board name="uVision Simulator" vendor="Keil"/>
4038       <project>
4039         <environment name="uv" load="NoRTOS.uvmpw"/>
4040       </project>
4041       <attributes>
4042         <component Cclass="CMSIS" Cgroup="CORE"/>
4043         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4044         <component Cclass="Device" Cgroup="Startup"/>
4045         <category>Getting Started</category>
4046       </attributes>
4047     </example>
4048
4049     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4050       <description>Secure/non-secure RTOS example with thread context management</description>
4051       <board name="uVision Simulator" vendor="Keil"/>
4052       <project>
4053         <environment name="uv" load="RTOS.uvmpw"/>
4054       </project>
4055       <attributes>
4056         <component Cclass="CMSIS" Cgroup="CORE"/>
4057         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4058         <component Cclass="Device" Cgroup="Startup"/>
4059         <category>Getting Started</category>
4060       </attributes>
4061     </example>
4062
4063     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4064       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4065       <board name="uVision Simulator" vendor="Keil"/>
4066       <project>
4067         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4068       </project>
4069       <attributes>
4070         <component Cclass="CMSIS" Cgroup="CORE"/>
4071         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4072         <component Cclass="Device" Cgroup="Startup"/>
4073         <category>Getting Started</category>
4074       </attributes>
4075     </example>
4076
4077   </examples>
4078
4079 </package>