begriffs open source - cmsis/blob - dev/v6.0.0-dev53/Core/html/group__mpu8__functions.html

   1 <!-- HTML header for doxygen 1.9.6-->
   2 <!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "https://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
   3 <html xmlns="http://www.w3.org/1999/xhtml" lang="en-US">
   4 <head>
   5 <meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
   6 <meta http-equiv="X-UA-Compatible" content="IE=11"/>
   7 <meta name="viewport" content="width=device-width, initial-scale=1"/>
   8 <title>CMSIS-Core (Cortex-M): MPU Functions for Armv8-M</title>
   9 <link href="doxygen.css" rel="stylesheet" type="text/css"/>
  10 <link href="tabs.css" rel="stylesheet" type="text/css"/>
  11 <link href="extra_navtree.css" rel="stylesheet" type="text/css"/>
  12 <link href="extra_stylesheet.css" rel="stylesheet" type="text/css"/>
  13 <link href="extra_search.css" rel="stylesheet" type="text/css"/>
  14 <script type="text/javascript" src="jquery.js"></script>
  15 <script type="text/javascript" src="dynsections.js"></script>
  16 <script type="text/javascript" src="printComponentTabs.js"></script>
  17 <script type="text/javascript" src="footer.js"></script>
  18 <script type="text/javascript" src="navtree.js"></script>
  19 <link href="navtree.css" rel="stylesheet" type="text/css"/>
  20 <script type="text/javascript" src="resize.js"></script>
  21 <script type="text/javascript" src="navtreedata.js"></script>
  22 <script type="text/javascript" src="navtree.js"></script>
  23 <link href="search/search.css" rel="stylesheet" type="text/css"/>
  24 <script type="text/javascript" src="search/searchdata.js"></script>
  25 <script type="text/javascript" src="search/search.js"></script>
  26 <script type="text/javascript">
  27 /* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&amp;dn=expat.txt MIT */
  28   $(document).ready(function() { init_search(); });
  29 /* @license-end */
  30 </script>
  31 <script type="text/javascript" src="darkmode_toggle.js"></script>
  32 <link href="extra_stylesheet.css" rel="stylesheet" type="text/css"/>
  33 <link href="extra_navtree.css" rel="stylesheet" type="text/css"/>
  34 <link href="extra_search.css" rel="stylesheet" type="text/css"/>
  35 <link href="version.css" rel="stylesheet" type="text/css" />
  36 <script type="text/javascript" src="../../../version.js"></script>
  37 </head>
  38 <body>
  39 <div id="top"><!-- do not remove this div, it is closed by doxygen! -->
  40 <div id="titlearea">
  41 <table cellspacing="0" cellpadding="0">
  42  <tbody>
  43  <tr style="height: 55px;">
  44   <td id="projectlogo" style="padding: 1.5em;"><img alt="Logo" src="cmsis_logo_white_small.png"/></td>
  45   <td style="padding-left: 1em; padding-bottom: 1em;padding-top: 1em;">
  46    <div id="projectname">CMSIS-Core (Cortex-M)
  47    &#160;<span id="projectnumber"><script type="text/javascript">
  48      <!--
  49      writeHeader.call(this);
  50      writeVersionDropdown.call(this);
  51      //-->
  52     </script>
  53    </span>
  54    </div>
  55    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
  56   </td>
  57    <td>        <div id="MSearchBox" class="MSearchBoxInactive">
  58         <span class="left">
  59           <span id="MSearchSelect"                onmouseover="return searchBox.OnSearchSelectShow()"                onmouseout="return searchBox.OnSearchSelectHide()">&#160;</span>
  60           <input type="text" id="MSearchField" value="" placeholder="Search" accesskey="S"
  61                onfocus="searchBox.OnSearchFieldFocus(true)"
  62                onblur="searchBox.OnSearchFieldFocus(false)"
  63                onkeyup="searchBox.OnSearchFieldChange(event)"/>
  64           </span><span class="right">
  65             <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.svg" alt=""/></a>
  66           </span>
  67         </div>
  68 </td>
  69   <!--END !PROJECT_NAME-->
  70  </tr>
  71  </tbody>
  72 </table>
  73 </div>
  74 <!-- end header part -->
  75 <div id="CMSISnav" class="tabs1">
  76   <ul class="tablist">
  77     <script type="text/javascript">
  78       writeComponentTabs.call(this);
  79     </script>
  80   </ul>
  81 </div>
  82 <script type="text/javascript">
  83   writeSubComponentTabs.call(this);
  84 </script>
  85 <!-- Generated by Doxygen 1.9.6 -->
  86 <script type="text/javascript">
  87 /* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&amp;dn=expat.txt MIT */
  88 var searchBox = new SearchBox("searchBox", "search/",'.html');
  89 /* @license-end */
  90 </script>
  91 </div><!-- top -->
  92 <div id="side-nav" class="ui-resizable side-nav-resizable">
  93   <div id="nav-tree">
  94     <div id="nav-tree-contents">
  95       <div id="nav-sync" class="sync"></div>
  96     </div>
  97   </div>
  98   <div id="splitbar" style="-moz-user-select:none;"
  99        class="ui-resizable-handle">
 100   </div>
 101 </div>
 102 <script type="text/javascript">
 103 /* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&amp;dn=expat.txt MIT */
 104 $(document).ready(function(){initNavTree('group__mpu8__functions.html',''); initResizable(); });
 105 /* @license-end */
 106 </script>
 107 <div id="doc-content">
 108 <!-- window showing the filter options -->
 109 <div id="MSearchSelectWindow"
 110      onmouseover="return searchBox.OnSearchSelectShow()"
 111      onmouseout="return searchBox.OnSearchSelectHide()"
 112      onkeydown="return searchBox.OnSearchSelectKey(event)">
 113 </div>
 114
 115 <!-- iframe showing the search results (closed by default) -->
 116 <div id="MSearchResultsWindow">
 117 <div id="MSearchResults">
 118 <div class="SRPage">
 119 <div id="SRIndex">
 120 <div id="SRResults"></div>
 121 <div class="SRStatus" id="Loading">Loading...</div>
 122 <div class="SRStatus" id="Searching">Searching...</div>
 123 <div class="SRStatus" id="NoMatches">No Matches</div>
 124 </div>
 125 </div>
 126 </div>
 127 </div>
 128
 129 <div class="header">
 130   <div class="summary">
 131 <a href="#nested-classes">Data Structures</a> &#124;
 132 <a href="#define-members">Macros</a> &#124;
 133 <a href="#func-members">Functions</a>  </div>
 134   <div class="headertitle"><div class="title">MPU Functions for Armv8-M</div></div>
 135 </div><!--header-->
 136 <div class="contents">
 137
 138 <p>Functions that relate to the Memory Protection Unit.
 139 <a href="#details">More...</a></p>
 140 <table class="memberdecls">
 141 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="nested-classes" name="nested-classes"></a>
 142 Data Structures</h2></td></tr>
 143 <tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a></td></tr>
 144 <tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Setup information of a single MPU Region.  <a href="structARM__MPU__Region__t.html#details">More...</a><br /></td></tr>
 145 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 146 </table><table class="memberdecls">
 147 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
 148 Macros</h2></td></tr>
 149 <tr class="memitem:gab4bfac6284dc050dc6fa6aeb8e954c2c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gab4bfac6284dc050dc6fa6aeb8e954c2c">ARM_MPU_ATTR_DEVICE</a>&#160;&#160;&#160;( 0U )</td></tr>
 150 <tr class="memdesc:gab4bfac6284dc050dc6fa6aeb8e954c2c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Attribute for device memory (outer only)  <br /></td></tr>
 151 <tr class="separator:gab4bfac6284dc050dc6fa6aeb8e954c2c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 152 <tr class="memitem:ga03266f9660485693eb1baec6ba255ab2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga03266f9660485693eb1baec6ba255ab2">ARM_MPU_ATTR_NON_CACHEABLE</a>&#160;&#160;&#160;( 4U )</td></tr>
 153 <tr class="memdesc:ga03266f9660485693eb1baec6ba255ab2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Attribute for non-cacheable, normal memory.  <br /></td></tr>
 154 <tr class="separator:ga03266f9660485693eb1baec6ba255ab2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 155 <tr class="memitem:gac2f1c567950e3785d75773362b525390"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac2f1c567950e3785d75773362b525390">ARM_MPU_ATTR_MEMORY_</a>(NT,  WB,  RA,  WA)</td></tr>
 156 <tr class="memdesc:gac2f1c567950e3785d75773362b525390"><td class="mdescLeft">&#160;</td><td class="mdescRight">Attribute for Normal memory, Outer and Inner cacheability.  <br /></td></tr>
 157 <tr class="separator:gac2f1c567950e3785d75773362b525390"><td class="memSeparator" colspan="2">&#160;</td></tr>
 158 <tr class="memitem:gabfa9ae279357044cf5b74e77af22a686"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gabfa9ae279357044cf5b74e77af22a686">ARM_MPU_ATTR_DEVICE_nGnRnE</a></td></tr>
 159 <tr class="memdesc:gabfa9ae279357044cf5b74e77af22a686"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement.  <br /></td></tr>
 160 <tr class="separator:gabfa9ae279357044cf5b74e77af22a686"><td class="memSeparator" colspan="2">&#160;</td></tr>
 161 <tr class="memitem:ga6e08ae44fab85e03fea96ae6a5fcdfb0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga6e08ae44fab85e03fea96ae6a5fcdfb0">ARM_MPU_ATTR_DEVICE_nGnRE</a></td></tr>
 162 <tr class="memdesc:ga6e08ae44fab85e03fea96ae6a5fcdfb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement.  <br /></td></tr>
 163 <tr class="separator:ga6e08ae44fab85e03fea96ae6a5fcdfb0"><td class="memSeparator" colspan="2">&#160;</td></tr>
 164 <tr class="memitem:gadcc9977aabb4dc7177d30cbbac1b53d1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gadcc9977aabb4dc7177d30cbbac1b53d1">ARM_MPU_ATTR_DEVICE_nGRE</a></td></tr>
 165 <tr class="memdesc:gadcc9977aabb4dc7177d30cbbac1b53d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device memory type non Gathering, Re-ordering, Early Write Acknowledgement.  <br /></td></tr>
 166 <tr class="separator:gadcc9977aabb4dc7177d30cbbac1b53d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
 167 <tr class="memitem:ga496bcd6a2bbd038d8935049fec9d0fda"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga496bcd6a2bbd038d8935049fec9d0fda">ARM_MPU_ATTR_DEVICE_GRE</a></td></tr>
 168 <tr class="memdesc:ga496bcd6a2bbd038d8935049fec9d0fda"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device memory type Gathering, Re-ordering, Early Write Acknowledgement.  <br /></td></tr>
 169 <tr class="separator:ga496bcd6a2bbd038d8935049fec9d0fda"><td class="memSeparator" colspan="2">&#160;</td></tr>
 170 <tr class="memitem:gab0847e1992e71f74ed5a31316d22b7bd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gab0847e1992e71f74ed5a31316d22b7bd">MPU_ATTR_NORMAL_OUTER_NON_CACHEABLE</a></td></tr>
 171 <tr class="memdesc:gab0847e1992e71f74ed5a31316d22b7bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory outer-cacheable and inner-cacheable attributes WT = Write Through, WB = Write Back, TR = Transient, RA = Read-Allocate, WA = Write Allocate.  <br /></td></tr>
 172 <tr class="separator:gab0847e1992e71f74ed5a31316d22b7bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
 173 <tr class="memitem:ga55c4d3e20300bbbb02b8567ed8f2b4e1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga55c4d3e20300bbbb02b8567ed8f2b4e1">MPU_ATTR_NORMAL_OUTER_WT_TR_RA</a></td></tr>
 174 <tr class="separator:ga55c4d3e20300bbbb02b8567ed8f2b4e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
 175 <tr class="memitem:ga129149491f30c513784a3ffd28b59a48"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga129149491f30c513784a3ffd28b59a48">MPU_ATTR_NORMAL_OUTER_WT_TR_WA</a></td></tr>
 176 <tr class="separator:ga129149491f30c513784a3ffd28b59a48"><td class="memSeparator" colspan="2">&#160;</td></tr>
 177 <tr class="memitem:ga9425e85dc19e840dd303094f79ed38e3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga9425e85dc19e840dd303094f79ed38e3">MPU_ATTR_NORMAL_OUTER_WT_TR_RA_WA</a></td></tr>
 178 <tr class="separator:ga9425e85dc19e840dd303094f79ed38e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 179 <tr class="memitem:gae321b8422975d41ac1c488ad4ea149c0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gae321b8422975d41ac1c488ad4ea149c0">MPU_ATTR_NORMAL_OUTER_WT_RA</a></td></tr>
 180 <tr class="separator:gae321b8422975d41ac1c488ad4ea149c0"><td class="memSeparator" colspan="2">&#160;</td></tr>
 181 <tr class="memitem:ga9d1be17c0bd5895736d4ab352434f61e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga9d1be17c0bd5895736d4ab352434f61e">MPU_ATTR_NORMAL_OUTER_WT_WA</a></td></tr>
 182 <tr class="separator:ga9d1be17c0bd5895736d4ab352434f61e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 183 <tr class="memitem:gaa7643b0faffce08a7e5598d720e1bfa5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gaa7643b0faffce08a7e5598d720e1bfa5">MPU_ATTR_NORMAL_OUTER_WT_RA_WA</a></td></tr>
 184 <tr class="separator:gaa7643b0faffce08a7e5598d720e1bfa5"><td class="memSeparator" colspan="2">&#160;</td></tr>
 185 <tr class="memitem:ga0012b8fe0edfcac50ee368c44ae98123"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga0012b8fe0edfcac50ee368c44ae98123">MPU_ATTR_NORMAL_OUTER_WB_TR_RA</a></td></tr>
 186 <tr class="separator:ga0012b8fe0edfcac50ee368c44ae98123"><td class="memSeparator" colspan="2">&#160;</td></tr>
 187 <tr class="memitem:ga934e2485b0df7a213a99896018786278"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga934e2485b0df7a213a99896018786278">MPU_ATTR_NORMAL_OUTER_WB_TR_WA</a></td></tr>
 188 <tr class="separator:ga934e2485b0df7a213a99896018786278"><td class="memSeparator" colspan="2">&#160;</td></tr>
 189 <tr class="memitem:gac6951446163b7acc7ec945d81e35de5d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac6951446163b7acc7ec945d81e35de5d">MPU_ATTR_NORMAL_OUTER_WB_TR_RA_WA</a></td></tr>
 190 <tr class="separator:gac6951446163b7acc7ec945d81e35de5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 191 <tr class="memitem:gad5312c58ebef6849b86765e276bf614a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gad5312c58ebef6849b86765e276bf614a">MPU_ATTR_NORMAL_OUTER_WB_RA</a></td></tr>
 192 <tr class="separator:gad5312c58ebef6849b86765e276bf614a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 193 <tr class="memitem:ga9e83c355036cda1e65cc64f0dc6ca2a8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga9e83c355036cda1e65cc64f0dc6ca2a8">MPU_ATTR_NORMAL_OUTER_WB_WA</a></td></tr>
 194 <tr class="separator:ga9e83c355036cda1e65cc64f0dc6ca2a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 195 <tr class="memitem:ga72a1da6f37f307e4e7b122bec86bc63a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga72a1da6f37f307e4e7b122bec86bc63a">MPU_ATTR_NORMAL_OUTER_WB_RA_WA</a></td></tr>
 196 <tr class="separator:ga72a1da6f37f307e4e7b122bec86bc63a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 197 <tr class="memitem:ga386cab980b576bc5f61388b659eea9a8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga386cab980b576bc5f61388b659eea9a8">MPU_ATTR_NORMAL_INNER_NON_CACHEABLE</a></td></tr>
 198 <tr class="separator:ga386cab980b576bc5f61388b659eea9a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 199 <tr class="memitem:ga8669f856b6f0132b6c4022916ca1ad94"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga8669f856b6f0132b6c4022916ca1ad94">MPU_ATTR_NORMAL_INNER_WT_TR_RA</a></td></tr>
 200 <tr class="separator:ga8669f856b6f0132b6c4022916ca1ad94"><td class="memSeparator" colspan="2">&#160;</td></tr>
 201 <tr class="memitem:gac41f314de36519d6ebde13a1e997c65f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac41f314de36519d6ebde13a1e997c65f">MPU_ATTR_NORMAL_INNER_WT_TR_WA</a></td></tr>
 202 <tr class="separator:gac41f314de36519d6ebde13a1e997c65f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 203 <tr class="memitem:gac1c0b1a3b22d0c0ea875355039eae4c0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac1c0b1a3b22d0c0ea875355039eae4c0">MPU_ATTR_NORMAL_INNER_WT_TR_RA_WA</a></td></tr>
 204 <tr class="separator:gac1c0b1a3b22d0c0ea875355039eae4c0"><td class="memSeparator" colspan="2">&#160;</td></tr>
 205 <tr class="memitem:gaa865e157ac3fc278d39c5c688165252b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gaa865e157ac3fc278d39c5c688165252b">MPU_ATTR_NORMAL_INNER_WT_RA</a></td></tr>
 206 <tr class="separator:gaa865e157ac3fc278d39c5c688165252b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 207 <tr class="memitem:ga4550de69e30075efc70213a79b929e92"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga4550de69e30075efc70213a79b929e92">MPU_ATTR_NORMAL_INNER_WT_WA</a></td></tr>
 208 <tr class="separator:ga4550de69e30075efc70213a79b929e92"><td class="memSeparator" colspan="2">&#160;</td></tr>
 209 <tr class="memitem:gae871e61119bdab6409a01fd45aa28811"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gae871e61119bdab6409a01fd45aa28811">MPU_ATTR_NORMAL_INNER_WT_RA_WA</a></td></tr>
 210 <tr class="separator:gae871e61119bdab6409a01fd45aa28811"><td class="memSeparator" colspan="2">&#160;</td></tr>
 211 <tr class="memitem:ga9ae76961b518f86ba1d390913f4ee45e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga9ae76961b518f86ba1d390913f4ee45e">MPU_ATTR_NORMAL_INNER_WB_TR_RA</a></td></tr>
 212 <tr class="separator:ga9ae76961b518f86ba1d390913f4ee45e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 213 <tr class="memitem:ga2e30e4ab7f3aee0a16399f6de178e532"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga2e30e4ab7f3aee0a16399f6de178e532">MPU_ATTR_NORMAL_INNER_WB_TR_WA</a></td></tr>
 214 <tr class="separator:ga2e30e4ab7f3aee0a16399f6de178e532"><td class="memSeparator" colspan="2">&#160;</td></tr>
 215 <tr class="memitem:gaf63176f20e4a30bd283463c98c363cf2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gaf63176f20e4a30bd283463c98c363cf2">MPU_ATTR_NORMAL_INNER_WB_TR_RA_WA</a></td></tr>
 216 <tr class="separator:gaf63176f20e4a30bd283463c98c363cf2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 217 <tr class="memitem:ga17b7f3281e42f8507336f709520e9785"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga17b7f3281e42f8507336f709520e9785">MPU_ATTR_NORMAL_INNER_WB_RA</a></td></tr>
 218 <tr class="separator:ga17b7f3281e42f8507336f709520e9785"><td class="memSeparator" colspan="2">&#160;</td></tr>
 219 <tr class="memitem:gacb7962caa69fd238b5d8bbfb60a7a959"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gacb7962caa69fd238b5d8bbfb60a7a959">MPU_ATTR_NORMAL_INNER_WB_WA</a></td></tr>
 220 <tr class="separator:gacb7962caa69fd238b5d8bbfb60a7a959"><td class="memSeparator" colspan="2">&#160;</td></tr>
 221 <tr class="memitem:ga61c99cef4678523dd070d863a7385cec"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga61c99cef4678523dd070d863a7385cec">MPU_ATTR_NORMAL_INNER_WB_RA_WA</a></td></tr>
 222 <tr class="separator:ga61c99cef4678523dd070d863a7385cec"><td class="memSeparator" colspan="2">&#160;</td></tr>
 223 <tr class="memitem:ga2c465cc9429b8233bcb9cd7cbef0e54c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga2c465cc9429b8233bcb9cd7cbef0e54c">ARM_MPU_ATTR</a>(O,  I)</td></tr>
 224 <tr class="memdesc:ga2c465cc9429b8233bcb9cd7cbef0e54c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Memory Attribute.  <br /></td></tr>
 225 <tr class="separator:ga2c465cc9429b8233bcb9cd7cbef0e54c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 226 <tr class="memitem:ga3d0f688198289f72264f73cf72a742e8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a></td></tr>
 227 <tr class="memdesc:ga3d0f688198289f72264f73cf72a742e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory non-shareable <br  />
 228   <br /></td></tr>
 229 <tr class="separator:ga3d0f688198289f72264f73cf72a742e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 230 <tr class="memitem:gac4fddbdb9e1350bce6906de33c1fd500"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac4fddbdb9e1350bce6906de33c1fd500">ARM_MPU_SH_OUTER</a></td></tr>
 231 <tr class="memdesc:gac4fddbdb9e1350bce6906de33c1fd500"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory outer shareable <br  />
 232   <br /></td></tr>
 233 <tr class="separator:gac4fddbdb9e1350bce6906de33c1fd500"><td class="memSeparator" colspan="2">&#160;</td></tr>
 234 <tr class="memitem:ga73c70127f24f34781ad463cbe51d8f6b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga73c70127f24f34781ad463cbe51d8f6b">ARM_MPU_SH_INNER</a></td></tr>
 235 <tr class="memdesc:ga73c70127f24f34781ad463cbe51d8f6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory inner shareable <br  />
 236   <br /></td></tr>
 237 <tr class="separator:ga73c70127f24f34781ad463cbe51d8f6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 238 <tr class="memitem:ga17ea49d510a4e30ff6026eed9302ae54"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga17ea49d510a4e30ff6026eed9302ae54">ARM_MPU_AP_RW</a></td></tr>
 239 <tr class="memdesc:ga17ea49d510a4e30ff6026eed9302ae54"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory, read/write.  <br /></td></tr>
 240 <tr class="separator:ga17ea49d510a4e30ff6026eed9302ae54"><td class="memSeparator" colspan="2">&#160;</td></tr>
 241 <tr class="memitem:ga64e249c7c678144b52493a4b6f8f6b3c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga64e249c7c678144b52493a4b6f8f6b3c">ARM_MPU_AP_RO</a></td></tr>
 242 <tr class="memdesc:ga64e249c7c678144b52493a4b6f8f6b3c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory, read-only.  <br /></td></tr>
 243 <tr class="separator:ga64e249c7c678144b52493a4b6f8f6b3c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 244 <tr class="memitem:gae62d5195b6ab6082a3f4a2584c101fab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a></td></tr>
 245 <tr class="memdesc:gae62d5195b6ab6082a3f4a2584c101fab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory, any privilege level.  <br /></td></tr>
 246 <tr class="separator:gae62d5195b6ab6082a3f4a2584c101fab"><td class="memSeparator" colspan="2">&#160;</td></tr>
 247 <tr class="memitem:ga52386005c0529821308140cf86e6d1a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga52386005c0529821308140cf86e6d1a5">ARM_MPU_AP_PO</a></td></tr>
 248 <tr class="memdesc:ga52386005c0529821308140cf86e6d1a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory, privileged access only.  <br /></td></tr>
 249 <tr class="separator:ga52386005c0529821308140cf86e6d1a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
 250 <tr class="memitem:ga8127782b882cbb8419519fc6c98a0b6b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a></td></tr>
 251 <tr class="memdesc:ga8127782b882cbb8419519fc6c98a0b6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory, Execution only permitted if read permitted.  <br /></td></tr>
 252 <tr class="separator:ga8127782b882cbb8419519fc6c98a0b6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 253 <tr class="memitem:ga613533046759fd317008e9937cda62de"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga613533046759fd317008e9937cda62de">ARM_MPU_EX</a></td></tr>
 254 <tr class="memdesc:ga613533046759fd317008e9937cda62de"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory, Execution only permitted if read permitted.  <br /></td></tr>
 255 <tr class="separator:ga613533046759fd317008e9937cda62de"><td class="memSeparator" colspan="2">&#160;</td></tr>
 256 <tr class="memitem:ga81b2aa3fb55cdd5feadff02da10d391b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga81b2aa3fb55cdd5feadff02da10d391b">ARM_MPU_AP_</a>(RO,  NP)</td></tr>
 257 <tr class="memdesc:ga81b2aa3fb55cdd5feadff02da10d391b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Memory access permissions.  <br /></td></tr>
 258 <tr class="separator:ga81b2aa3fb55cdd5feadff02da10d391b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 259 <tr class="memitem:gafe39c2f98058bcac7e7e0501e64e7a9d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gafe39c2f98058bcac7e7e0501e64e7a9d">ARM_MPU_RBAR</a>(BASE,  SH,  RO,  NP,  XN)</td></tr>
 260 <tr class="memdesc:gafe39c2f98058bcac7e7e0501e64e7a9d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Region Base Address Register value.  <br /></td></tr>
 261 <tr class="separator:gafe39c2f98058bcac7e7e0501e64e7a9d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 262 <tr class="memitem:gaeaaa071276ba7956944e6c3dc05d677e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(LIMIT,  IDX)</td></tr>
 263 <tr class="memdesc:gaeaaa071276ba7956944e6c3dc05d677e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Region Limit Address Register value.  <br /></td></tr>
 264 <tr class="separator:gaeaaa071276ba7956944e6c3dc05d677e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 265 <tr class="memitem:ga5bff4d6cfaa678776b3b1eab4af70f95"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga5bff4d6cfaa678776b3b1eab4af70f95">ARM_MPU_RLAR_PXN</a>(LIMIT,  PXN,  IDX)</td></tr>
 266 <tr class="memdesc:ga5bff4d6cfaa678776b3b1eab4af70f95"><td class="mdescLeft">&#160;</td><td class="mdescRight">Region Limit Address Register with PXN value.  <br /></td></tr>
 267 <tr class="separator:ga5bff4d6cfaa678776b3b1eab4af70f95"><td class="memSeparator" colspan="2">&#160;</td></tr>
 268 </table><table class="memberdecls">
 269 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
 270 Functions</h2></td></tr>
 271 <tr class="memitem:gabd11943b38cdf185dcb8e60e459d5854"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gabd11943b38cdf185dcb8e60e459d5854">ARM_MPU_TYPE</a> ()</td></tr>
 272 <tr class="memdesc:gabd11943b38cdf185dcb8e60e459d5854"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read MPU Type Register.  <br /></td></tr>
 273 <tr class="separator:gabd11943b38cdf185dcb8e60e459d5854"><td class="memSeparator" colspan="2">&#160;</td></tr>
 274 <tr class="memitem:ga5a3f40314553baccdeea551f86d9a997"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga5a3f40314553baccdeea551f86d9a997">ARM_MPU_Enable</a> (uint32_t MPU_Control)</td></tr>
 275 <tr class="memdesc:ga5a3f40314553baccdeea551f86d9a997"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the MPU.  <br /></td></tr>
 276 <tr class="separator:ga5a3f40314553baccdeea551f86d9a997"><td class="memSeparator" colspan="2">&#160;</td></tr>
 277 <tr class="memitem:ga61814eba4652a0fdfb76bbe222086327"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga61814eba4652a0fdfb76bbe222086327">ARM_MPU_Disable</a> (void)</td></tr>
 278 <tr class="separator:ga61814eba4652a0fdfb76bbe222086327"><td class="memSeparator" colspan="2">&#160;</td></tr>
 279 <tr class="memitem:ga5866c75d6deb9148a1e9af6337eec50a"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga5866c75d6deb9148a1e9af6337eec50a">ARM_MPU_Enable_NS</a> (uint32_t MPU_Control)</td></tr>
 280 <tr class="separator:ga5866c75d6deb9148a1e9af6337eec50a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 281 <tr class="memitem:ga389f9b6049d176bc83f9964d3259b712"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga389f9b6049d176bc83f9964d3259b712">ARM_MPU_Disable_NS</a> (void)</td></tr>
 282 <tr class="separator:ga389f9b6049d176bc83f9964d3259b712"><td class="memSeparator" colspan="2">&#160;</td></tr>
 283 <tr class="memitem:ga1799413f08a157d636a1491371c15ce2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga1799413f08a157d636a1491371c15ce2">ARM_MPU_SetMemAttrEx</a> (<a class="el" href="structMPU__Type.html">MPU_Type</a> *mpu, uint8_t idx, uint8_t attr)</td></tr>
 284 <tr class="separator:ga1799413f08a157d636a1491371c15ce2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 285 <tr class="memitem:gab5b3c0a53d19c09a5550f1d9071ae65c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gab5b3c0a53d19c09a5550f1d9071ae65c">ARM_MPU_SetMemAttr</a> (uint8_t idx, uint8_t attr)</td></tr>
 286 <tr class="separator:gab5b3c0a53d19c09a5550f1d9071ae65c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 287 <tr class="memitem:ga5100a150a755902af2455a455a329ef9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga5100a150a755902af2455a455a329ef9">ARM_MPU_SetMemAttr_NS</a> (uint8_t idx, uint8_t attr)</td></tr>
 288 <tr class="separator:ga5100a150a755902af2455a455a329ef9"><td class="memSeparator" colspan="2">&#160;</td></tr>
 289 <tr class="memitem:ga01fa1151c9ec0ba5de76f908c0999316"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga01fa1151c9ec0ba5de76f908c0999316">ARM_MPU_ClrRegionEx</a> (<a class="el" href="structMPU__Type.html">MPU_Type</a> *mpu, uint32_t rnr)</td></tr>
 290 <tr class="separator:ga01fa1151c9ec0ba5de76f908c0999316"><td class="memSeparator" colspan="2">&#160;</td></tr>
 291 <tr class="memitem:ga9dcb0afddf4ac351f33f3c7a5169c62c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga9dcb0afddf4ac351f33f3c7a5169c62c">ARM_MPU_ClrRegion</a> (uint32_t rnr)</td></tr>
 292 <tr class="separator:ga9dcb0afddf4ac351f33f3c7a5169c62c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 293 <tr class="memitem:gac526bc5bfcf048ce57a44c0c0cdadbe4"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac526bc5bfcf048ce57a44c0c0cdadbe4">ARM_MPU_ClrRegion_NS</a> (uint32_t rnr)</td></tr>
 294 <tr class="separator:gac526bc5bfcf048ce57a44c0c0cdadbe4"><td class="memSeparator" colspan="2">&#160;</td></tr>
 295 <tr class="memitem:ga3d50ba8546252bea959e45c8fdf16993"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga3d50ba8546252bea959e45c8fdf16993">ARM_MPU_SetRegionEx</a> (<a class="el" href="structMPU__Type.html">MPU_Type</a> *mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)</td></tr>
 296 <tr class="separator:ga3d50ba8546252bea959e45c8fdf16993"><td class="memSeparator" colspan="2">&#160;</td></tr>
 297 <tr class="memitem:ga6d7f220015c070c0e469948c1775ee3d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga6d7f220015c070c0e469948c1775ee3d">ARM_MPU_SetRegion</a> (uint32_t rnr, uint32_t rbar, uint32_t rlar)</td></tr>
 298 <tr class="separator:ga6d7f220015c070c0e469948c1775ee3d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 299 <tr class="memitem:ga7566931ca9bb9f22d213a67ec5f8c745"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga7566931ca9bb9f22d213a67ec5f8c745">ARM_MPU_SetRegion_NS</a> (uint32_t rnr, uint32_t rbar, uint32_t rlar)</td></tr>
 300 <tr class="separator:ga7566931ca9bb9f22d213a67ec5f8c745"><td class="memSeparator" colspan="2">&#160;</td></tr>
 301 <tr class="memitem:gac1a949403bf84eecaf407003fb553ae7"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac1a949403bf84eecaf407003fb553ae7">ARM_MPU_OrderedMemcpy</a> (volatile uint32_t *dst, const uint32_t *<a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a> src, uint32_t len)</td></tr>
 302 <tr class="separator:gac1a949403bf84eecaf407003fb553ae7"><td class="memSeparator" colspan="2">&#160;</td></tr>
 303 <tr class="memitem:gab6094419f2abd678f1f3b121cd115049"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gab6094419f2abd678f1f3b121cd115049">ARM_MPU_LoadEx</a> (<a class="el" href="structMPU__Type.html">MPU_Type</a> *mpu, uint32_t rnr, <a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *table, uint32_t cnt)</td></tr>
 304 <tr class="separator:gab6094419f2abd678f1f3b121cd115049"><td class="memSeparator" colspan="2">&#160;</td></tr>
 305 <tr class="memitem:gaca76614e3091c7324aa9d60e634621bf"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gaca76614e3091c7324aa9d60e634621bf">ARM_MPU_Load</a> (uint32_t rnr, <a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *table, uint32_t cnt)</td></tr>
 306 <tr class="separator:gaca76614e3091c7324aa9d60e634621bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
 307 <tr class="memitem:ga7f8c6e09be98067d613e4df1832c543d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga7f8c6e09be98067d613e4df1832c543d">ARM_MPU_Load_NS</a> (uint32_t rnr, <a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *table, uint32_t cnt)</td></tr>
 308 <tr class="separator:ga7f8c6e09be98067d613e4df1832c543d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 309 </table>
 310 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 311 <p>Functions that relate to the Memory Protection Unit. </p>
 312 <p>The following functions support the optional Memory Protection Unit (MPU) that is available on the Cortex-M23, M33, M35P processor.</p>
 313 <p>The MPU is used to prevent from illegal memory accesses that are typically caused by errors in an application software.</p>
 314 <p><b>Example:</b> </p><div class="fragment"><div class="line"><span class="keywordtype">int</span> main() </div>
 315 <div class="line">{</div>
 316 <div class="line">  <span class="comment">// Set Region 0 using Attr 0</span></div>
 317 <div class="line">  <a class="code hl_function" href="group__mpu8__functions.html#gab5b3c0a53d19c09a5550f1d9071ae65c">ARM_MPU_SetMemAttr</a>(0UL, <a class="code hl_define" href="group__mpu8__functions.html#ga2c465cc9429b8233bcb9cd7cbef0e54c">ARM_MPU_ATTR</a>( <span class="comment">/* Normal memory */</span></div>
 318 <div class="line">    <a class="code hl_define" href="group__mpu8__functions.html#ga9425e85dc19e840dd303094f79ed38e3">MPU_ATTR_NORMAL_OUTER_WT_TR_RA_WA</a>,  <span class="comment">/* Outer Write-Back transient with read and write allocate */</span></div>
 319 <div class="line">    <a class="code hl_define" href="group__mpu8__functions.html#gac1c0b1a3b22d0c0ea875355039eae4c0">MPU_ATTR_NORMAL_INNER_WT_TR_RA_WA</a>   <span class="comment">/* Inner Write-Through transient with read and write allocate */</span></div>
 320 <div class="line">  ));</div>
 321 <div class="line">  </div>
 322 <div class="line">  <a class="code hl_function" href="group__mpu__functions.html#ga16931f9ad84d7289e8218e169ae6db5d">ARM_MPU_SetRegion</a>(0UL,</div>
 323 <div class="line">    <a class="code hl_define" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x08000000UL, <a class="code hl_define" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga17ea49d510a4e30ff6026eed9302ae54">ARM_MPU_AP_RW</a>, <a class="code hl_define" href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a>),  <span class="comment">/* Non-shareable, read/write, non-privileged, execute-never */</span></div>
 324 <div class="line">    <a class="code hl_define" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x080FFFFFUL, MAIR_ATTR(0))                        <span class="comment">/* 1MB memory block using Attr 0 */</span></div>
 325 <div class="line">  );</div>
 326 <div class="line">  </div>
 327 <div class="line">  <a class="code hl_function" href="group__mpu__functions.html#ga31406efd492ec9a091a70ffa2d8a42fb">ARM_MPU_Enable</a>(0);</div>
 328 <div class="line">  </div>
 329 <div class="line">  <span class="comment">// Execute application code that is access protected by the MPU</span></div>
 330 <div class="line">  </div>
 331 <div class="line">  <a class="code hl_function" href="group__mpu__functions.html#ga7cbc0a4a066ed90e85c8176228235d57">ARM_MPU_Disable</a>();</div>
 332 <div class="line">}</div>
 333 <div class="ttc" id="agroup__mpu8__functions_html_ga17ea49d510a4e30ff6026eed9302ae54"><div class="ttname"><a href="group__mpu8__functions.html#ga17ea49d510a4e30ff6026eed9302ae54">ARM_MPU_AP_RW</a></div><div class="ttdeci">#define ARM_MPU_AP_RW</div><div class="ttdoc">Normal memory, read/write.</div><div class="ttdef"><b>Definition:</b> Ref_MPU8.txt:114</div></div>
 334 <div class="ttc" id="agroup__mpu8__functions_html_ga2c465cc9429b8233bcb9cd7cbef0e54c"><div class="ttname"><a href="group__mpu8__functions.html#ga2c465cc9429b8233bcb9cd7cbef0e54c">ARM_MPU_ATTR</a></div><div class="ttdeci">#define ARM_MPU_ATTR(O, I)</div><div class="ttdoc">Memory Attribute.</div><div class="ttdef"><b>Definition:</b> Ref_MPU8.txt:95</div></div>
 335 <div class="ttc" id="agroup__mpu8__functions_html_ga3d0f688198289f72264f73cf72a742e8"><div class="ttname"><a href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a></div><div class="ttdeci">#define ARM_MPU_SH_NON</div><div class="ttdoc">Normal memory non-shareable</div><div class="ttdef"><b>Definition:</b> Ref_MPU8.txt:101</div></div>
 336 <div class="ttc" id="agroup__mpu8__functions_html_ga8127782b882cbb8419519fc6c98a0b6b"><div class="ttname"><a href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a></div><div class="ttdeci">#define ARM_MPU_XN</div><div class="ttdoc">Normal memory, Execution only permitted if read permitted.</div><div class="ttdef"><b>Definition:</b> Ref_MPU8.txt:130</div></div>
 337 <div class="ttc" id="agroup__mpu8__functions_html_ga9425e85dc19e840dd303094f79ed38e3"><div class="ttname"><a href="group__mpu8__functions.html#ga9425e85dc19e840dd303094f79ed38e3">MPU_ATTR_NORMAL_OUTER_WT_TR_RA_WA</a></div><div class="ttdeci">#define MPU_ATTR_NORMAL_OUTER_WT_TR_RA_WA</div><div class="ttdef"><b>Definition:</b> Ref_MPU8.txt:67</div></div>
 338 <div class="ttc" id="agroup__mpu8__functions_html_gab5b3c0a53d19c09a5550f1d9071ae65c"><div class="ttname"><a href="group__mpu8__functions.html#gab5b3c0a53d19c09a5550f1d9071ae65c">ARM_MPU_SetMemAttr</a></div><div class="ttdeci">__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)</div></div>
 339 <div class="ttc" id="agroup__mpu8__functions_html_gac1c0b1a3b22d0c0ea875355039eae4c0"><div class="ttname"><a href="group__mpu8__functions.html#gac1c0b1a3b22d0c0ea875355039eae4c0">MPU_ATTR_NORMAL_INNER_WT_TR_RA_WA</a></div><div class="ttdeci">#define MPU_ATTR_NORMAL_INNER_WT_TR_RA_WA</div><div class="ttdef"><b>Definition:</b> Ref_MPU8.txt:80</div></div>
 340 <div class="ttc" id="agroup__mpu8__functions_html_gae62d5195b6ab6082a3f4a2584c101fab"><div class="ttname"><a href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a></div><div class="ttdeci">#define ARM_MPU_AP_NP</div><div class="ttdoc">Normal memory, any privilege level.</div><div class="ttdef"><b>Definition:</b> Ref_MPU8.txt:120</div></div>
 341 <div class="ttc" id="agroup__mpu8__functions_html_gaeaaa071276ba7956944e6c3dc05d677e"><div class="ttname"><a href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a></div><div class="ttdeci">#define ARM_MPU_RLAR(LIMIT, IDX)</div><div class="ttdoc">Region Limit Address Register value.</div><div class="ttdef"><b>Definition:</b> Ref_MPU8.txt:154</div></div>
 342 <div class="ttc" id="agroup__mpu__functions_html_ga16931f9ad84d7289e8218e169ae6db5d"><div class="ttname"><a href="group__mpu__functions.html#ga16931f9ad84d7289e8218e169ae6db5d">ARM_MPU_SetRegion</a></div><div class="ttdeci">__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)</div></div>
 343 <div class="ttc" id="agroup__mpu__functions_html_ga31406efd492ec9a091a70ffa2d8a42fb"><div class="ttname"><a href="group__mpu__functions.html#ga31406efd492ec9a091a70ffa2d8a42fb">ARM_MPU_Enable</a></div><div class="ttdeci">__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_CTRL)</div><div class="ttdoc">Enable the memory protection unit (MPU) and.</div></div>
 344 <div class="ttc" id="agroup__mpu__functions_html_ga3fead12dc24a6d00ad53f55a042486ca"><div class="ttname"><a href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a></div><div class="ttdeci">#define ARM_MPU_RBAR(Region, BaseAddress)</div><div class="ttdoc">MPU Region Base Address Register Value.</div><div class="ttdef"><b>Definition:</b> Ref_MPU.txt:41</div></div>
 345 <div class="ttc" id="agroup__mpu__functions_html_ga7cbc0a4a066ed90e85c8176228235d57"><div class="ttname"><a href="group__mpu__functions.html#ga7cbc0a4a066ed90e85c8176228235d57">ARM_MPU_Disable</a></div><div class="ttdeci">__STATIC_INLINE void ARM_MPU_Disable()</div></div>
 346 </div><!-- fragment --> <h2 class="groupheader">Macro Definition Documentation</h2>
 347 <a id="ga81b2aa3fb55cdd5feadff02da10d391b" name="ga81b2aa3fb55cdd5feadff02da10d391b"></a>
 348 <h2 class="memtitle"><span class="permalink"><a href="#ga81b2aa3fb55cdd5feadff02da10d391b">&#9670;&#160;</a></span>ARM_MPU_AP_</h2>
 349
 350 <div class="memitem">
 351 <div class="memproto">
 352       <table class="memname">
 353         <tr>
 354           <td class="memname">#define ARM_MPU_AP_</td>
 355           <td>(</td>
 356           <td class="paramtype">&#160;</td>
 357           <td class="paramname">RO, </td>
 358         </tr>
 359         <tr>
 360           <td class="paramkey"></td>
 361           <td></td>
 362           <td class="paramtype">&#160;</td>
 363           <td class="paramname">NP&#160;</td>
 364         </tr>
 365         <tr>
 366           <td></td>
 367           <td>)</td>
 368           <td></td><td></td>
 369         </tr>
 370       </table>
 371 </div><div class="memdoc">
 372
 373 <p>Memory access permissions. </p>
 374 <dl class="params"><dt>Parameters</dt><dd>
 375   <table class="params">
 376     <tr><td class="paramname">RO</td><td>Read-Only: Set to 1 for read-only memory. </td></tr>
 377     <tr><td class="paramname">NP</td><td>Non-Privileged: Set to 1 for non-privileged memory. </td></tr>
 378   </table>
 379   </dd>
 380 </dl>
 381
 382 </div>
 383 </div>
 384 <a id="gae62d5195b6ab6082a3f4a2584c101fab" name="gae62d5195b6ab6082a3f4a2584c101fab"></a>
 385 <h2 class="memtitle"><span class="permalink"><a href="#gae62d5195b6ab6082a3f4a2584c101fab">&#9670;&#160;</a></span>ARM_MPU_AP_NP</h2>
 386
 387 <div class="memitem">
 388 <div class="memproto">
 389       <table class="memname">
 390         <tr>
 391           <td class="memname">#define ARM_MPU_AP_NP</td>
 392         </tr>
 393       </table>
 394 </div><div class="memdoc">
 395
 396 <p>Normal memory, any privilege level. </p>
 397
 398 </div>
 399 </div>
 400 <a id="ga52386005c0529821308140cf86e6d1a5" name="ga52386005c0529821308140cf86e6d1a5"></a>
 401 <h2 class="memtitle"><span class="permalink"><a href="#ga52386005c0529821308140cf86e6d1a5">&#9670;&#160;</a></span>ARM_MPU_AP_PO</h2>
 402
 403 <div class="memitem">
 404 <div class="memproto">
 405       <table class="memname">
 406         <tr>
 407           <td class="memname">#define ARM_MPU_AP_PO</td>
 408         </tr>
 409       </table>
 410 </div><div class="memdoc">
 411
 412 <p>Normal memory, privileged access only. </p>
 413
 414 </div>
 415 </div>
 416 <a id="ga64e249c7c678144b52493a4b6f8f6b3c" name="ga64e249c7c678144b52493a4b6f8f6b3c"></a>
 417 <h2 class="memtitle"><span class="permalink"><a href="#ga64e249c7c678144b52493a4b6f8f6b3c">&#9670;&#160;</a></span>ARM_MPU_AP_RO</h2>
 418
 419 <div class="memitem">
 420 <div class="memproto">
 421       <table class="memname">
 422         <tr>
 423           <td class="memname">#define ARM_MPU_AP_RO</td>
 424         </tr>
 425       </table>
 426 </div><div class="memdoc">
 427
 428 <p>Normal memory, read-only. </p>
 429
 430 </div>
 431 </div>
 432 <a id="ga17ea49d510a4e30ff6026eed9302ae54" name="ga17ea49d510a4e30ff6026eed9302ae54"></a>
 433 <h2 class="memtitle"><span class="permalink"><a href="#ga17ea49d510a4e30ff6026eed9302ae54">&#9670;&#160;</a></span>ARM_MPU_AP_RW</h2>
 434
 435 <div class="memitem">
 436 <div class="memproto">
 437       <table class="memname">
 438         <tr>
 439           <td class="memname">#define ARM_MPU_AP_RW</td>
 440         </tr>
 441       </table>
 442 </div><div class="memdoc">
 443
 444 <p>Normal memory, read/write. </p>
 445 <p>Access permissions AP = Access permission, RO = Read-only, RW = Read/Write, NP = Any privilege, PO = Privileged code only </p>
 446
 447 </div>
 448 </div>
 449 <a id="ga2c465cc9429b8233bcb9cd7cbef0e54c" name="ga2c465cc9429b8233bcb9cd7cbef0e54c"></a>
 450 <h2 class="memtitle"><span class="permalink"><a href="#ga2c465cc9429b8233bcb9cd7cbef0e54c">&#9670;&#160;</a></span>ARM_MPU_ATTR</h2>
 451
 452 <div class="memitem">
 453 <div class="memproto">
 454       <table class="memname">
 455         <tr>
 456           <td class="memname">#define ARM_MPU_ATTR</td>
 457           <td>(</td>
 458           <td class="paramtype">&#160;</td>
 459           <td class="paramname">O, </td>
 460         </tr>
 461         <tr>
 462           <td class="paramkey"></td>
 463           <td></td>
 464           <td class="paramtype">&#160;</td>
 465           <td class="paramname">I&#160;</td>
 466         </tr>
 467         <tr>
 468           <td></td>
 469           <td>)</td>
 470           <td></td><td></td>
 471         </tr>
 472       </table>
 473 </div><div class="memdoc">
 474
 475 <p>Memory Attribute. </p>
 476 <dl class="params"><dt>Parameters</dt><dd>
 477   <table class="params">
 478     <tr><td class="paramname">O</td><td>Outer memory attributes </td></tr>
 479     <tr><td class="paramname">I</td><td>O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes </td></tr>
 480   </table>
 481   </dd>
 482 </dl>
 483
 484 </div>
 485 </div>
 486 <a id="gab4bfac6284dc050dc6fa6aeb8e954c2c" name="gab4bfac6284dc050dc6fa6aeb8e954c2c"></a>
 487 <h2 class="memtitle"><span class="permalink"><a href="#gab4bfac6284dc050dc6fa6aeb8e954c2c">&#9670;&#160;</a></span>ARM_MPU_ATTR_DEVICE</h2>
 488
 489 <div class="memitem">
 490 <div class="memproto">
 491       <table class="memname">
 492         <tr>
 493           <td class="memname">#define ARM_MPU_ATTR_DEVICE&#160;&#160;&#160;( 0U )</td>
 494         </tr>
 495       </table>
 496 </div><div class="memdoc">
 497
 498 <p>Attribute for device memory (outer only) </p>
 499
 500 </div>
 501 </div>
 502 <a id="ga496bcd6a2bbd038d8935049fec9d0fda" name="ga496bcd6a2bbd038d8935049fec9d0fda"></a>
 503 <h2 class="memtitle"><span class="permalink"><a href="#ga496bcd6a2bbd038d8935049fec9d0fda">&#9670;&#160;</a></span>ARM_MPU_ATTR_DEVICE_GRE</h2>
 504
 505 <div class="memitem">
 506 <div class="memproto">
 507       <table class="memname">
 508         <tr>
 509           <td class="memname">#define ARM_MPU_ATTR_DEVICE_GRE</td>
 510         </tr>
 511       </table>
 512 </div><div class="memdoc">
 513
 514 <p>Device memory type Gathering, Re-ordering, Early Write Acknowledgement. </p>
 515
 516 </div>
 517 </div>
 518 <a id="ga6e08ae44fab85e03fea96ae6a5fcdfb0" name="ga6e08ae44fab85e03fea96ae6a5fcdfb0"></a>
 519 <h2 class="memtitle"><span class="permalink"><a href="#ga6e08ae44fab85e03fea96ae6a5fcdfb0">&#9670;&#160;</a></span>ARM_MPU_ATTR_DEVICE_nGnRE</h2>
 520
 521 <div class="memitem">
 522 <div class="memproto">
 523       <table class="memname">
 524         <tr>
 525           <td class="memname">#define ARM_MPU_ATTR_DEVICE_nGnRE</td>
 526         </tr>
 527       </table>
 528 </div><div class="memdoc">
 529
 530 <p>Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement. </p>
 531
 532 </div>
 533 </div>
 534 <a id="gabfa9ae279357044cf5b74e77af22a686" name="gabfa9ae279357044cf5b74e77af22a686"></a>
 535 <h2 class="memtitle"><span class="permalink"><a href="#gabfa9ae279357044cf5b74e77af22a686">&#9670;&#160;</a></span>ARM_MPU_ATTR_DEVICE_nGnRnE</h2>
 536
 537 <div class="memitem">
 538 <div class="memproto">
 539       <table class="memname">
 540         <tr>
 541           <td class="memname">#define ARM_MPU_ATTR_DEVICE_nGnRnE</td>
 542         </tr>
 543       </table>
 544 </div><div class="memdoc">
 545
 546 <p>Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement. </p>
 547
 548 </div>
 549 </div>
 550 <a id="gadcc9977aabb4dc7177d30cbbac1b53d1" name="gadcc9977aabb4dc7177d30cbbac1b53d1"></a>
 551 <h2 class="memtitle"><span class="permalink"><a href="#gadcc9977aabb4dc7177d30cbbac1b53d1">&#9670;&#160;</a></span>ARM_MPU_ATTR_DEVICE_nGRE</h2>
 552
 553 <div class="memitem">
 554 <div class="memproto">
 555       <table class="memname">
 556         <tr>
 557           <td class="memname">#define ARM_MPU_ATTR_DEVICE_nGRE</td>
 558         </tr>
 559       </table>
 560 </div><div class="memdoc">
 561
 562 <p>Device memory type non Gathering, Re-ordering, Early Write Acknowledgement. </p>
 563
 564 </div>
 565 </div>
 566 <a id="gac2f1c567950e3785d75773362b525390" name="gac2f1c567950e3785d75773362b525390"></a>
 567 <h2 class="memtitle"><span class="permalink"><a href="#gac2f1c567950e3785d75773362b525390">&#9670;&#160;</a></span>ARM_MPU_ATTR_MEMORY_</h2>
 568
 569 <div class="memitem">
 570 <div class="memproto">
 571       <table class="memname">
 572         <tr>
 573           <td class="memname">#define ARM_MPU_ATTR_MEMORY_</td>
 574           <td>(</td>
 575           <td class="paramtype">&#160;</td>
 576           <td class="paramname">NT, </td>
 577         </tr>
 578         <tr>
 579           <td class="paramkey"></td>
 580           <td></td>
 581           <td class="paramtype">&#160;</td>
 582           <td class="paramname">WB, </td>
 583         </tr>
 584         <tr>
 585           <td class="paramkey"></td>
 586           <td></td>
 587           <td class="paramtype">&#160;</td>
 588           <td class="paramname">RA, </td>
 589         </tr>
 590         <tr>
 591           <td class="paramkey"></td>
 592           <td></td>
 593           <td class="paramtype">&#160;</td>
 594           <td class="paramname">WA&#160;</td>
 595         </tr>
 596         <tr>
 597           <td></td>
 598           <td>)</td>
 599           <td></td><td></td>
 600         </tr>
 601       </table>
 602 </div><div class="memdoc">
 603
 604 <p>Attribute for Normal memory, Outer and Inner cacheability. </p>
 605 <dl class="params"><dt>Parameters</dt><dd>
 606   <table class="params">
 607     <tr><td class="paramname">NT</td><td>Non-Transient: Set to 1 for Non-transient data. Set to 0 for Transient data. </td></tr>
 608     <tr><td class="paramname">WB</td><td>Write-Back: Set to 1 to use a Write-Back policy. Set to 0 to use a Write-Through policy. </td></tr>
 609     <tr><td class="paramname">RA</td><td>Read Allocation: Set to 1 to enable cache allocation on read miss. Set to 0 to disable cache allocation on read miss. </td></tr>
 610     <tr><td class="paramname">WA</td><td>Write Allocation: Set to 1 to enable cache allocation on write miss. Set to 0 to disable cache allocation on write miss. </td></tr>
 611   </table>
 612   </dd>
 613 </dl>
 614
 615 </div>
 616 </div>
 617 <a id="ga03266f9660485693eb1baec6ba255ab2" name="ga03266f9660485693eb1baec6ba255ab2"></a>
 618 <h2 class="memtitle"><span class="permalink"><a href="#ga03266f9660485693eb1baec6ba255ab2">&#9670;&#160;</a></span>ARM_MPU_ATTR_NON_CACHEABLE</h2>
 619
 620 <div class="memitem">
 621 <div class="memproto">
 622       <table class="memname">
 623         <tr>
 624           <td class="memname">#define ARM_MPU_ATTR_NON_CACHEABLE&#160;&#160;&#160;( 4U )</td>
 625         </tr>
 626       </table>
 627 </div><div class="memdoc">
 628
 629 <p>Attribute for non-cacheable, normal memory. </p>
 630
 631 </div>
 632 </div>
 633 <a id="ga613533046759fd317008e9937cda62de" name="ga613533046759fd317008e9937cda62de"></a>
 634 <h2 class="memtitle"><span class="permalink"><a href="#ga613533046759fd317008e9937cda62de">&#9670;&#160;</a></span>ARM_MPU_EX</h2>
 635
 636 <div class="memitem">
 637 <div class="memproto">
 638       <table class="memname">
 639         <tr>
 640           <td class="memname">#define ARM_MPU_EX</td>
 641         </tr>
 642       </table>
 643 </div><div class="memdoc">
 644
 645 <p>Normal memory, Execution only permitted if read permitted. </p>
 646
 647 </div>
 648 </div>
 649 <a id="gafe39c2f98058bcac7e7e0501e64e7a9d" name="gafe39c2f98058bcac7e7e0501e64e7a9d"></a>
 650 <h2 class="memtitle"><span class="permalink"><a href="#gafe39c2f98058bcac7e7e0501e64e7a9d">&#9670;&#160;</a></span>ARM_MPU_RBAR</h2>
 651
 652 <div class="memitem">
 653 <div class="memproto">
 654       <table class="memname">
 655         <tr>
 656           <td class="memname">#define ARM_MPU_RBAR</td>
 657           <td>(</td>
 658           <td class="paramtype">&#160;</td>
 659           <td class="paramname">BASE, </td>
 660         </tr>
 661         <tr>
 662           <td class="paramkey"></td>
 663           <td></td>
 664           <td class="paramtype">&#160;</td>
 665           <td class="paramname">SH, </td>
 666         </tr>
 667         <tr>
 668           <td class="paramkey"></td>
 669           <td></td>
 670           <td class="paramtype">&#160;</td>
 671           <td class="paramname">RO, </td>
 672         </tr>
 673         <tr>
 674           <td class="paramkey"></td>
 675           <td></td>
 676           <td class="paramtype">&#160;</td>
 677           <td class="paramname">NP, </td>
 678         </tr>
 679         <tr>
 680           <td class="paramkey"></td>
 681           <td></td>
 682           <td class="paramtype">&#160;</td>
 683           <td class="paramname">XN&#160;</td>
 684         </tr>
 685         <tr>
 686           <td></td>
 687           <td>)</td>
 688           <td></td><td></td>
 689         </tr>
 690       </table>
 691 </div><div class="memdoc">
 692
 693 <p>Region Base Address Register value. </p>
 694 <dl class="params"><dt>Parameters</dt><dd>
 695   <table class="params">
 696     <tr><td class="paramname">BASE</td><td>The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned. </td></tr>
 697     <tr><td class="paramname">SH</td><td>Defines the Shareability domain for this memory region. </td></tr>
 698     <tr><td class="paramname">RO</td><td>Read-Only: Set to 1 for a read-only memory region. Set to 0 for a read/write memory region. </td></tr>
 699     <tr><td class="paramname">NP</td><td>Non-Privileged: Set to 1 for a non-privileged memory region. Set to 0 for privileged memory region. </td></tr>
 700     <tr><td class="paramname">XN</td><td>eXecute Never: Set to 1 for a non-executable memory region. Set to 0 for an executable memory region. </td></tr>
 701   </table>
 702   </dd>
 703 </dl>
 704
 705 </div>
 706 </div>
 707 <a id="gaeaaa071276ba7956944e6c3dc05d677e" name="gaeaaa071276ba7956944e6c3dc05d677e"></a>
 708 <h2 class="memtitle"><span class="permalink"><a href="#gaeaaa071276ba7956944e6c3dc05d677e">&#9670;&#160;</a></span>ARM_MPU_RLAR</h2>
 709
 710 <div class="memitem">
 711 <div class="memproto">
 712       <table class="memname">
 713         <tr>
 714           <td class="memname">#define ARM_MPU_RLAR</td>
 715           <td>(</td>
 716           <td class="paramtype">&#160;</td>
 717           <td class="paramname">LIMIT, </td>
 718         </tr>
 719         <tr>
 720           <td class="paramkey"></td>
 721           <td></td>
 722           <td class="paramtype">&#160;</td>
 723           <td class="paramname">IDX&#160;</td>
 724         </tr>
 725         <tr>
 726           <td></td>
 727           <td>)</td>
 728           <td></td><td></td>
 729         </tr>
 730       </table>
 731 </div><div class="memdoc">
 732
 733 <p>Region Limit Address Register value. </p>
 734 <dl class="params"><dt>Parameters</dt><dd>
 735   <table class="params">
 736     <tr><td class="paramname">LIMIT</td><td>The limit address bits [31:5] for this memory region. The value is one extended. </td></tr>
 737     <tr><td class="paramname">IDX</td><td>The attribute index to be associated with this memory region. </td></tr>
 738   </table>
 739   </dd>
 740 </dl>
 741
 742 </div>
 743 </div>
 744 <a id="ga5bff4d6cfaa678776b3b1eab4af70f95" name="ga5bff4d6cfaa678776b3b1eab4af70f95"></a>
 745 <h2 class="memtitle"><span class="permalink"><a href="#ga5bff4d6cfaa678776b3b1eab4af70f95">&#9670;&#160;</a></span>ARM_MPU_RLAR_PXN</h2>
 746
 747 <div class="memitem">
 748 <div class="memproto">
 749       <table class="memname">
 750         <tr>
 751           <td class="memname">#define ARM_MPU_RLAR_PXN</td>
 752           <td>(</td>
 753           <td class="paramtype">&#160;</td>
 754           <td class="paramname">LIMIT, </td>
 755         </tr>
 756         <tr>
 757           <td class="paramkey"></td>
 758           <td></td>
 759           <td class="paramtype">&#160;</td>
 760           <td class="paramname">PXN, </td>
 761         </tr>
 762         <tr>
 763           <td class="paramkey"></td>
 764           <td></td>
 765           <td class="paramtype">&#160;</td>
 766           <td class="paramname">IDX&#160;</td>
 767         </tr>
 768         <tr>
 769           <td></td>
 770           <td>)</td>
 771           <td></td><td></td>
 772         </tr>
 773       </table>
 774 </div><div class="memdoc">
 775
 776 <p>Region Limit Address Register with PXN value. </p>
 777 <dl class="params"><dt>Parameters</dt><dd>
 778   <table class="params">
 779     <tr><td class="paramname">LIMIT</td><td>The limit address bits [31:5] for this memory region. The value is one extended. </td></tr>
 780     <tr><td class="paramname">PXN</td><td>Privileged execute never. Defines whether code can be executed from this privileged region. </td></tr>
 781     <tr><td class="paramname">IDX</td><td>The attribute index to be associated with this memory region. </td></tr>
 782   </table>
 783   </dd>
 784 </dl>
 785
 786 </div>
 787 </div>
 788 <a id="ga73c70127f24f34781ad463cbe51d8f6b" name="ga73c70127f24f34781ad463cbe51d8f6b"></a>
 789 <h2 class="memtitle"><span class="permalink"><a href="#ga73c70127f24f34781ad463cbe51d8f6b">&#9670;&#160;</a></span>ARM_MPU_SH_INNER</h2>
 790
 791 <div class="memitem">
 792 <div class="memproto">
 793       <table class="memname">
 794         <tr>
 795           <td class="memname">#define ARM_MPU_SH_INNER</td>
 796         </tr>
 797       </table>
 798 </div><div class="memdoc">
 799
 800 <p>Normal memory inner shareable <br  />
 801  </p>
 802
 803 </div>
 804 </div>
 805 <a id="ga3d0f688198289f72264f73cf72a742e8" name="ga3d0f688198289f72264f73cf72a742e8"></a>
 806 <h2 class="memtitle"><span class="permalink"><a href="#ga3d0f688198289f72264f73cf72a742e8">&#9670;&#160;</a></span>ARM_MPU_SH_NON</h2>
 807
 808 <div class="memitem">
 809 <div class="memproto">
 810       <table class="memname">
 811         <tr>
 812           <td class="memname">#define ARM_MPU_SH_NON</td>
 813         </tr>
 814       </table>
 815 </div><div class="memdoc">
 816
 817 <p>Normal memory non-shareable <br  />
 818  </p>
 819 <p>Shareability </p>
 820
 821 </div>
 822 </div>
 823 <a id="gac4fddbdb9e1350bce6906de33c1fd500" name="gac4fddbdb9e1350bce6906de33c1fd500"></a>
 824 <h2 class="memtitle"><span class="permalink"><a href="#gac4fddbdb9e1350bce6906de33c1fd500">&#9670;&#160;</a></span>ARM_MPU_SH_OUTER</h2>
 825
 826 <div class="memitem">
 827 <div class="memproto">
 828       <table class="memname">
 829         <tr>
 830           <td class="memname">#define ARM_MPU_SH_OUTER</td>
 831         </tr>
 832       </table>
 833 </div><div class="memdoc">
 834
 835 <p>Normal memory outer shareable <br  />
 836  </p>
 837
 838 </div>
 839 </div>
 840 <a id="ga8127782b882cbb8419519fc6c98a0b6b" name="ga8127782b882cbb8419519fc6c98a0b6b"></a>
 841 <h2 class="memtitle"><span class="permalink"><a href="#ga8127782b882cbb8419519fc6c98a0b6b">&#9670;&#160;</a></span>ARM_MPU_XN</h2>
 842
 843 <div class="memitem">
 844 <div class="memproto">
 845       <table class="memname">
 846         <tr>
 847           <td class="memname">#define ARM_MPU_XN</td>
 848         </tr>
 849       </table>
 850 </div><div class="memdoc">
 851
 852 <p>Normal memory, Execution only permitted if read permitted. </p>
 853
 854 </div>
 855 </div>
 856 <a id="ga386cab980b576bc5f61388b659eea9a8" name="ga386cab980b576bc5f61388b659eea9a8"></a>
 857 <h2 class="memtitle"><span class="permalink"><a href="#ga386cab980b576bc5f61388b659eea9a8">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_NON_CACHEABLE</h2>
 858
 859 <div class="memitem">
 860 <div class="memproto">
 861       <table class="memname">
 862         <tr>
 863           <td class="memname">#define MPU_ATTR_NORMAL_INNER_NON_CACHEABLE</td>
 864         </tr>
 865       </table>
 866 </div><div class="memdoc">
 867
 868 </div>
 869 </div>
 870 <a id="ga17b7f3281e42f8507336f709520e9785" name="ga17b7f3281e42f8507336f709520e9785"></a>
 871 <h2 class="memtitle"><span class="permalink"><a href="#ga17b7f3281e42f8507336f709520e9785">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_WB_RA</h2>
 872
 873 <div class="memitem">
 874 <div class="memproto">
 875       <table class="memname">
 876         <tr>
 877           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WB_RA</td>
 878         </tr>
 879       </table>
 880 </div><div class="memdoc">
 881
 882 </div>
 883 </div>
 884 <a id="ga61c99cef4678523dd070d863a7385cec" name="ga61c99cef4678523dd070d863a7385cec"></a>
 885 <h2 class="memtitle"><span class="permalink"><a href="#ga61c99cef4678523dd070d863a7385cec">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_WB_RA_WA</h2>
 886
 887 <div class="memitem">
 888 <div class="memproto">
 889       <table class="memname">
 890         <tr>
 891           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WB_RA_WA</td>
 892         </tr>
 893       </table>
 894 </div><div class="memdoc">
 895
 896 </div>
 897 </div>
 898 <a id="ga9ae76961b518f86ba1d390913f4ee45e" name="ga9ae76961b518f86ba1d390913f4ee45e"></a>
 899 <h2 class="memtitle"><span class="permalink"><a href="#ga9ae76961b518f86ba1d390913f4ee45e">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_WB_TR_RA</h2>
 900
 901 <div class="memitem">
 902 <div class="memproto">
 903       <table class="memname">
 904         <tr>
 905           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WB_TR_RA</td>
 906         </tr>
 907       </table>
 908 </div><div class="memdoc">
 909
 910 </div>
 911 </div>
 912 <a id="gaf63176f20e4a30bd283463c98c363cf2" name="gaf63176f20e4a30bd283463c98c363cf2"></a>
 913 <h2 class="memtitle"><span class="permalink"><a href="#gaf63176f20e4a30bd283463c98c363cf2">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_WB_TR_RA_WA</h2>
 914
 915 <div class="memitem">
 916 <div class="memproto">
 917       <table class="memname">
 918         <tr>
 919           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WB_TR_RA_WA</td>
 920         </tr>
 921       </table>
 922 </div><div class="memdoc">
 923
 924 </div>
 925 </div>
 926 <a id="ga2e30e4ab7f3aee0a16399f6de178e532" name="ga2e30e4ab7f3aee0a16399f6de178e532"></a>
 927 <h2 class="memtitle"><span class="permalink"><a href="#ga2e30e4ab7f3aee0a16399f6de178e532">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_WB_TR_WA</h2>
 928
 929 <div class="memitem">
 930 <div class="memproto">
 931       <table class="memname">
 932         <tr>
 933           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WB_TR_WA</td>
 934         </tr>
 935       </table>
 936 </div><div class="memdoc">
 937
 938 </div>
 939 </div>
 940 <a id="gacb7962caa69fd238b5d8bbfb60a7a959" name="gacb7962caa69fd238b5d8bbfb60a7a959"></a>
 941 <h2 class="memtitle"><span class="permalink"><a href="#gacb7962caa69fd238b5d8bbfb60a7a959">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_WB_WA</h2>
 942
 943 <div class="memitem">
 944 <div class="memproto">
 945       <table class="memname">
 946         <tr>
 947           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WB_WA</td>
 948         </tr>
 949       </table>
 950 </div><div class="memdoc">
 951
 952 </div>
 953 </div>
 954 <a id="gaa865e157ac3fc278d39c5c688165252b" name="gaa865e157ac3fc278d39c5c688165252b"></a>
 955 <h2 class="memtitle"><span class="permalink"><a href="#gaa865e157ac3fc278d39c5c688165252b">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_WT_RA</h2>
 956
 957 <div class="memitem">
 958 <div class="memproto">
 959       <table class="memname">
 960         <tr>
 961           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WT_RA</td>
 962         </tr>
 963       </table>
 964 </div><div class="memdoc">
 965
 966 </div>
 967 </div>
 968 <a id="gae871e61119bdab6409a01fd45aa28811" name="gae871e61119bdab6409a01fd45aa28811"></a>
 969 <h2 class="memtitle"><span class="permalink"><a href="#gae871e61119bdab6409a01fd45aa28811">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_WT_RA_WA</h2>
 970
 971 <div class="memitem">
 972 <div class="memproto">
 973       <table class="memname">
 974         <tr>
 975           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WT_RA_WA</td>
 976         </tr>
 977       </table>
 978 </div><div class="memdoc">
 979
 980 </div>
 981 </div>
 982 <a id="ga8669f856b6f0132b6c4022916ca1ad94" name="ga8669f856b6f0132b6c4022916ca1ad94"></a>
 983 <h2 class="memtitle"><span class="permalink"><a href="#ga8669f856b6f0132b6c4022916ca1ad94">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_WT_TR_RA</h2>
 984
 985 <div class="memitem">
 986 <div class="memproto">
 987       <table class="memname">
 988         <tr>
 989           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WT_TR_RA</td>
 990         </tr>
 991       </table>
 992 </div><div class="memdoc">
 993
 994 </div>
 995 </div>
 996 <a id="gac1c0b1a3b22d0c0ea875355039eae4c0" name="gac1c0b1a3b22d0c0ea875355039eae4c0"></a>
 997 <h2 class="memtitle"><span class="permalink"><a href="#gac1c0b1a3b22d0c0ea875355039eae4c0">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_WT_TR_RA_WA</h2>
 998
 999 <div class="memitem">
1000 <div class="memproto">
1001       <table class="memname">
1002         <tr>
1003           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WT_TR_RA_WA</td>
1004         </tr>
1005       </table>
1006 </div><div class="memdoc">
1007
1008 </div>
1009 </div>
1010 <a id="gac41f314de36519d6ebde13a1e997c65f" name="gac41f314de36519d6ebde13a1e997c65f"></a>
1011 <h2 class="memtitle"><span class="permalink"><a href="#gac41f314de36519d6ebde13a1e997c65f">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_WT_TR_WA</h2>
1012
1013 <div class="memitem">
1014 <div class="memproto">
1015       <table class="memname">
1016         <tr>
1017           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WT_TR_WA</td>
1018         </tr>
1019       </table>
1020 </div><div class="memdoc">
1021
1022 </div>
1023 </div>
1024 <a id="ga4550de69e30075efc70213a79b929e92" name="ga4550de69e30075efc70213a79b929e92"></a>
1025 <h2 class="memtitle"><span class="permalink"><a href="#ga4550de69e30075efc70213a79b929e92">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_INNER_WT_WA</h2>
1026
1027 <div class="memitem">
1028 <div class="memproto">
1029       <table class="memname">
1030         <tr>
1031           <td class="memname">#define MPU_ATTR_NORMAL_INNER_WT_WA</td>
1032         </tr>
1033       </table>
1034 </div><div class="memdoc">
1035
1036 </div>
1037 </div>
1038 <a id="gab0847e1992e71f74ed5a31316d22b7bd" name="gab0847e1992e71f74ed5a31316d22b7bd"></a>
1039 <h2 class="memtitle"><span class="permalink"><a href="#gab0847e1992e71f74ed5a31316d22b7bd">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_OUTER_NON_CACHEABLE</h2>
1040
1041 <div class="memitem">
1042 <div class="memproto">
1043       <table class="memname">
1044         <tr>
1045           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_NON_CACHEABLE</td>
1046         </tr>
1047       </table>
1048 </div><div class="memdoc">
1049
1050 <p>Normal memory outer-cacheable and inner-cacheable attributes WT = Write Through, WB = Write Back, TR = Transient, RA = Read-Allocate, WA = Write Allocate. </p>
1051
1052 </div>
1053 </div>
1054 <a id="gad5312c58ebef6849b86765e276bf614a" name="gad5312c58ebef6849b86765e276bf614a"></a>
1055 <h2 class="memtitle"><span class="permalink"><a href="#gad5312c58ebef6849b86765e276bf614a">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_OUTER_WB_RA</h2>
1056
1057 <div class="memitem">
1058 <div class="memproto">
1059       <table class="memname">
1060         <tr>
1061           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WB_RA</td>
1062         </tr>
1063       </table>
1064 </div><div class="memdoc">
1065
1066 </div>
1067 </div>
1068 <a id="ga72a1da6f37f307e4e7b122bec86bc63a" name="ga72a1da6f37f307e4e7b122bec86bc63a"></a>
1069 <h2 class="memtitle"><span class="permalink"><a href="#ga72a1da6f37f307e4e7b122bec86bc63a">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_OUTER_WB_RA_WA</h2>
1070
1071 <div class="memitem">
1072 <div class="memproto">
1073       <table class="memname">
1074         <tr>
1075           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WB_RA_WA</td>
1076         </tr>
1077       </table>
1078 </div><div class="memdoc">
1079
1080 </div>
1081 </div>
1082 <a id="ga0012b8fe0edfcac50ee368c44ae98123" name="ga0012b8fe0edfcac50ee368c44ae98123"></a>
1083 <h2 class="memtitle"><span class="permalink"><a href="#ga0012b8fe0edfcac50ee368c44ae98123">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_OUTER_WB_TR_RA</h2>
1084
1085 <div class="memitem">
1086 <div class="memproto">
1087       <table class="memname">
1088         <tr>
1089           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WB_TR_RA</td>
1090         </tr>
1091       </table>
1092 </div><div class="memdoc">
1093
1094 </div>
1095 </div>
1096 <a id="gac6951446163b7acc7ec945d81e35de5d" name="gac6951446163b7acc7ec945d81e35de5d"></a>
1097 <h2 class="memtitle"><span class="permalink"><a href="#gac6951446163b7acc7ec945d81e35de5d">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_OUTER_WB_TR_RA_WA</h2>
1098
1099 <div class="memitem">
1100 <div class="memproto">
1101       <table class="memname">
1102         <tr>
1103           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WB_TR_RA_WA</td>
1104         </tr>
1105       </table>
1106 </div><div class="memdoc">
1107
1108 </div>
1109 </div>
1110 <a id="ga934e2485b0df7a213a99896018786278" name="ga934e2485b0df7a213a99896018786278"></a>
1111 <h2 class="memtitle"><span class="permalink"><a href="#ga934e2485b0df7a213a99896018786278">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_OUTER_WB_TR_WA</h2>
1112
1113 <div class="memitem">
1114 <div class="memproto">
1115       <table class="memname">
1116         <tr>
1117           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WB_TR_WA</td>
1118         </tr>
1119       </table>
1120 </div><div class="memdoc">
1121
1122 </div>
1123 </div>
1124 <a id="ga9e83c355036cda1e65cc64f0dc6ca2a8" name="ga9e83c355036cda1e65cc64f0dc6ca2a8"></a>
1125 <h2 class="memtitle"><span class="permalink"><a href="#ga9e83c355036cda1e65cc64f0dc6ca2a8">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_OUTER_WB_WA</h2>
1126
1127 <div class="memitem">
1128 <div class="memproto">
1129       <table class="memname">
1130         <tr>
1131           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WB_WA</td>
1132         </tr>
1133       </table>
1134 </div><div class="memdoc">
1135
1136 </div>
1137 </div>
1138 <a id="gae321b8422975d41ac1c488ad4ea149c0" name="gae321b8422975d41ac1c488ad4ea149c0"></a>
1139 <h2 class="memtitle"><span class="permalink"><a href="#gae321b8422975d41ac1c488ad4ea149c0">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_OUTER_WT_RA</h2>
1140
1141 <div class="memitem">
1142 <div class="memproto">
1143       <table class="memname">
1144         <tr>
1145           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WT_RA</td>
1146         </tr>
1147       </table>
1148 </div><div class="memdoc">
1149
1150 </div>
1151 </div>
1152 <a id="gaa7643b0faffce08a7e5598d720e1bfa5" name="gaa7643b0faffce08a7e5598d720e1bfa5"></a>
1153 <h2 class="memtitle"><span class="permalink"><a href="#gaa7643b0faffce08a7e5598d720e1bfa5">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_OUTER_WT_RA_WA</h2>
1154
1155 <div class="memitem">
1156 <div class="memproto">
1157       <table class="memname">
1158         <tr>
1159           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WT_RA_WA</td>
1160         </tr>
1161       </table>
1162 </div><div class="memdoc">
1163
1164 </div>
1165 </div>
1166 <a id="ga55c4d3e20300bbbb02b8567ed8f2b4e1" name="ga55c4d3e20300bbbb02b8567ed8f2b4e1"></a>
1167 <h2 class="memtitle"><span class="permalink"><a href="#ga55c4d3e20300bbbb02b8567ed8f2b4e1">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_OUTER_WT_TR_RA</h2>
1168
1169 <div class="memitem">
1170 <div class="memproto">
1171       <table class="memname">
1172         <tr>
1173           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WT_TR_RA</td>
1174         </tr>
1175       </table>
1176 </div><div class="memdoc">
1177
1178 </div>
1179 </div>
1180 <a id="ga9425e85dc19e840dd303094f79ed38e3" name="ga9425e85dc19e840dd303094f79ed38e3"></a>
1181 <h2 class="memtitle"><span class="permalink"><a href="#ga9425e85dc19e840dd303094f79ed38e3">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_OUTER_WT_TR_RA_WA</h2>
1182
1183 <div class="memitem">
1184 <div class="memproto">
1185       <table class="memname">
1186         <tr>
1187           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WT_TR_RA_WA</td>
1188         </tr>
1189       </table>
1190 </div><div class="memdoc">
1191
1192 </div>
1193 </div>
1194 <a id="ga129149491f30c513784a3ffd28b59a48" name="ga129149491f30c513784a3ffd28b59a48"></a>
1195 <h2 class="memtitle"><span class="permalink"><a href="#ga129149491f30c513784a3ffd28b59a48">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_OUTER_WT_TR_WA</h2>
1196
1197 <div class="memitem">
1198 <div class="memproto">
1199       <table class="memname">
1200         <tr>
1201           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WT_TR_WA</td>
1202         </tr>
1203       </table>
1204 </div><div class="memdoc">
1205
1206 </div>
1207 </div>
1208 <a id="ga9d1be17c0bd5895736d4ab352434f61e" name="ga9d1be17c0bd5895736d4ab352434f61e"></a>
1209 <h2 class="memtitle"><span class="permalink"><a href="#ga9d1be17c0bd5895736d4ab352434f61e">&#9670;&#160;</a></span>MPU_ATTR_NORMAL_OUTER_WT_WA</h2>
1210
1211 <div class="memitem">
1212 <div class="memproto">
1213       <table class="memname">
1214         <tr>
1215           <td class="memname">#define MPU_ATTR_NORMAL_OUTER_WT_WA</td>
1216         </tr>
1217       </table>
1218 </div><div class="memdoc">
1219
1220 </div>
1221 </div>
1222 <h2 class="groupheader">Function Documentation</h2>
1223 <a id="ga9dcb0afddf4ac351f33f3c7a5169c62c" name="ga9dcb0afddf4ac351f33f3c7a5169c62c"></a>
1224 <h2 class="memtitle"><span class="permalink"><a href="#ga9dcb0afddf4ac351f33f3c7a5169c62c">&#9670;&#160;</a></span>ARM_MPU_ClrRegion()</h2>
1225
1226 <div class="memitem">
1227 <div class="memproto">
1228       <table class="memname">
1229         <tr>
1230           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_ClrRegion </td>
1231           <td>(</td>
1232           <td class="paramtype">uint32_t&#160;</td>
1233           <td class="paramname"><em>rnr</em></td><td>)</td>
1234           <td></td>
1235         </tr>
1236       </table>
1237 </div><div class="memdoc">
1238 <p>Clear and disable the given MPU region. </p><dl class="params"><dt>Parameters</dt><dd>
1239   <table class="params">
1240     <tr><td class="paramname">rnr</td><td>Region number to be cleared. </td></tr>
1241   </table>
1242   </dd>
1243 </dl>
1244
1245 </div>
1246 </div>
1247 <a id="gac526bc5bfcf048ce57a44c0c0cdadbe4" name="gac526bc5bfcf048ce57a44c0c0cdadbe4"></a>
1248 <h2 class="memtitle"><span class="permalink"><a href="#gac526bc5bfcf048ce57a44c0c0cdadbe4">&#9670;&#160;</a></span>ARM_MPU_ClrRegion_NS()</h2>
1249
1250 <div class="memitem">
1251 <div class="memproto">
1252       <table class="memname">
1253         <tr>
1254           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_ClrRegion_NS </td>
1255           <td>(</td>
1256           <td class="paramtype">uint32_t&#160;</td>
1257           <td class="paramname"><em>rnr</em></td><td>)</td>
1258           <td></td>
1259         </tr>
1260       </table>
1261 </div><div class="memdoc">
1262 <p>Clear and disable the given Non-secure MPU region. </p><dl class="params"><dt>Parameters</dt><dd>
1263   <table class="params">
1264     <tr><td class="paramname">rnr</td><td>Region number to be cleared. </td></tr>
1265   </table>
1266   </dd>
1267 </dl>
1268
1269 </div>
1270 </div>
1271 <a id="ga01fa1151c9ec0ba5de76f908c0999316" name="ga01fa1151c9ec0ba5de76f908c0999316"></a>
1272 <h2 class="memtitle"><span class="permalink"><a href="#ga01fa1151c9ec0ba5de76f908c0999316">&#9670;&#160;</a></span>ARM_MPU_ClrRegionEx()</h2>
1273
1274 <div class="memitem">
1275 <div class="memproto">
1276       <table class="memname">
1277         <tr>
1278           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_ClrRegionEx </td>
1279           <td>(</td>
1280           <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
1281           <td class="paramname"><em>mpu</em>, </td>
1282         </tr>
1283         <tr>
1284           <td class="paramkey"></td>
1285           <td></td>
1286           <td class="paramtype">uint32_t&#160;</td>
1287           <td class="paramname"><em>rnr</em>&#160;</td>
1288         </tr>
1289         <tr>
1290           <td></td>
1291           <td>)</td>
1292           <td></td><td></td>
1293         </tr>
1294       </table>
1295 </div><div class="memdoc">
1296 <p>Clear and disable the given MPU region of the given MPU. </p><dl class="params"><dt>Parameters</dt><dd>
1297   <table class="params">
1298     <tr><td class="paramname">mpu</td><td>Pointer to MPU to be used. </td></tr>
1299     <tr><td class="paramname">rnr</td><td>Region number to be cleared. </td></tr>
1300   </table>
1301   </dd>
1302 </dl>
1303
1304 </div>
1305 </div>
1306 <a id="ga61814eba4652a0fdfb76bbe222086327" name="ga61814eba4652a0fdfb76bbe222086327"></a>
1307 <h2 class="memtitle"><span class="permalink"><a href="#ga61814eba4652a0fdfb76bbe222086327">&#9670;&#160;</a></span>ARM_MPU_Disable()</h2>
1308
1309 <div class="memitem">
1310 <div class="memproto">
1311       <table class="memname">
1312         <tr>
1313           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Disable </td>
1314           <td>(</td>
1315           <td class="paramtype">void&#160;</td>
1316           <td class="paramname"></td><td>)</td>
1317           <td></td>
1318         </tr>
1319       </table>
1320 </div><div class="memdoc">
1321 <p>Disable the MPU. </p>
1322
1323 </div>
1324 </div>
1325 <a id="ga389f9b6049d176bc83f9964d3259b712" name="ga389f9b6049d176bc83f9964d3259b712"></a>
1326 <h2 class="memtitle"><span class="permalink"><a href="#ga389f9b6049d176bc83f9964d3259b712">&#9670;&#160;</a></span>ARM_MPU_Disable_NS()</h2>
1327
1328 <div class="memitem">
1329 <div class="memproto">
1330       <table class="memname">
1331         <tr>
1332           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Disable_NS </td>
1333           <td>(</td>
1334           <td class="paramtype">void&#160;</td>
1335           <td class="paramname"></td><td>)</td>
1336           <td></td>
1337         </tr>
1338       </table>
1339 </div><div class="memdoc">
1340 <p>Disable the Non-secure MPU. </p>
1341
1342 </div>
1343 </div>
1344 <a id="ga5a3f40314553baccdeea551f86d9a997" name="ga5a3f40314553baccdeea551f86d9a997"></a>
1345 <h2 class="memtitle"><span class="permalink"><a href="#ga5a3f40314553baccdeea551f86d9a997">&#9670;&#160;</a></span>ARM_MPU_Enable()</h2>
1346
1347 <div class="memitem">
1348 <div class="memproto">
1349       <table class="memname">
1350         <tr>
1351           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Enable </td>
1352           <td>(</td>
1353           <td class="paramtype">uint32_t&#160;</td>
1354           <td class="paramname"><em>MPU_Control</em></td><td>)</td>
1355           <td></td>
1356         </tr>
1357       </table>
1358 </div><div class="memdoc">
1359
1360 <p>Enable the MPU. </p>
1361 <dl class="params"><dt>Parameters</dt><dd>
1362   <table class="params">
1363     <tr><td class="paramname">MPU_Control</td><td>Default access permissions for unconfigured regions. </td></tr>
1364   </table>
1365   </dd>
1366 </dl>
1367
1368 </div>
1369 </div>
1370 <a id="ga5866c75d6deb9148a1e9af6337eec50a" name="ga5866c75d6deb9148a1e9af6337eec50a"></a>
1371 <h2 class="memtitle"><span class="permalink"><a href="#ga5866c75d6deb9148a1e9af6337eec50a">&#9670;&#160;</a></span>ARM_MPU_Enable_NS()</h2>
1372
1373 <div class="memitem">
1374 <div class="memproto">
1375       <table class="memname">
1376         <tr>
1377           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> ARM_MPU_Enable_NS </td>
1378           <td>(</td>
1379           <td class="paramtype">uint32_t&#160;</td>
1380           <td class="paramname"><em>MPU_Control</em></td><td>)</td>
1381           <td></td>
1382         </tr>
1383       </table>
1384 </div><div class="memdoc">
1385 <p>Enable the Non-secure MPU. </p><dl class="params"><dt>Parameters</dt><dd>
1386   <table class="params">
1387     <tr><td class="paramname">MPU_Control</td><td>Default access permissions for unconfigured regions. </td></tr>
1388   </table>
1389   </dd>
1390 </dl>
1391
1392 </div>
1393 </div>
1394 <a id="gaca76614e3091c7324aa9d60e634621bf" name="gaca76614e3091c7324aa9d60e634621bf"></a>
1395 <h2 class="memtitle"><span class="permalink"><a href="#gaca76614e3091c7324aa9d60e634621bf">&#9670;&#160;</a></span>ARM_MPU_Load()</h2>
1396
1397 <div class="memitem">
1398 <div class="memproto">
1399       <table class="memname">
1400         <tr>
1401           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Load </td>
1402           <td>(</td>
1403           <td class="paramtype">uint32_t&#160;</td>
1404           <td class="paramname"><em>rnr</em>, </td>
1405         </tr>
1406         <tr>
1407           <td class="paramkey"></td>
1408           <td></td>
1409           <td class="paramtype"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *&#160;</td>
1410           <td class="paramname"><em>table</em>, </td>
1411         </tr>
1412         <tr>
1413           <td class="paramkey"></td>
1414           <td></td>
1415           <td class="paramtype">uint32_t&#160;</td>
1416           <td class="paramname"><em>cnt</em>&#160;</td>
1417         </tr>
1418         <tr>
1419           <td></td>
1420           <td>)</td>
1421           <td></td><td></td>
1422         </tr>
1423       </table>
1424 </div><div class="memdoc">
1425 <p>Load the given number of MPU regions from a table. </p><dl class="params"><dt>Parameters</dt><dd>
1426   <table class="params">
1427     <tr><td class="paramname">rnr</td><td>First region number to be configured. </td></tr>
1428     <tr><td class="paramname">table</td><td>Pointer to the MPU configuration table. </td></tr>
1429     <tr><td class="paramname">cnt</td><td>Amount of regions to be configured.</td></tr>
1430   </table>
1431   </dd>
1432 </dl>
1433 <p><b>Example:</b> </p><div class="fragment"><div class="line"><span class="keyword">const</span> <a class="code hl_struct" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> mpuTable[1][4] = {</div>
1434 <div class="line">  {</div>
1435 <div class="line">    <span class="comment">//                     BASE          SH              RO             NP             XN                                LIMIT         ATTR </span></div>
1436 <div class="line">    { .<a class="code hl_variable" href="structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2">RBAR</a> = <a class="code hl_define" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x08000000UL, <a class="code hl_define" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga64e249c7c678144b52493a4b6f8f6b3c">ARM_MPU_AP_RO</a>, <a class="code hl_define" href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a>), .RLAR = <a class="code hl_define" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x080FFFFFUL, MAIR_ATTR(0)) },</div>
1437 <div class="line">    { .RBAR = <a class="code hl_define" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x20000000UL, <a class="code hl_define" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga64e249c7c678144b52493a4b6f8f6b3c">ARM_MPU_AP_RO</a>, <a class="code hl_define" href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a>), .RLAR = <a class="code hl_define" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x20007FFFUL, MAIR_ATTR(0)) },</div>
1438 <div class="line">    { .RBAR = <a class="code hl_define" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x40020000UL, <a class="code hl_define" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga64e249c7c678144b52493a4b6f8f6b3c">ARM_MPU_AP_RO</a>, <a class="code hl_define" href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a>), .RLAR = <a class="code hl_define" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x40021FFFUL, MAIR_ATTR(1)) },</div>
1439 <div class="line">    { .RBAR = <a class="code hl_define" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x40022000UL, <a class="code hl_define" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga64e249c7c678144b52493a4b6f8f6b3c">ARM_MPU_AP_RO</a>, <a class="code hl_define" href="group__mpu8__functions.html#gae62d5195b6ab6082a3f4a2584c101fab">ARM_MPU_AP_NP</a>, <a class="code hl_define" href="group__mpu8__functions.html#ga8127782b882cbb8419519fc6c98a0b6b">ARM_MPU_XN</a>), .RLAR = <a class="code hl_define" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x40022FFFUL, MAIR_ATTR(1)) }</div>
1440 <div class="line">  }</div>
1441 <div class="line">};</div>
1442 <div class="line"> </div>
1443 <div class="line"><span class="keywordtype">void</span> UpdateMpu(uint32_t idx)</div>
1444 <div class="line">{</div>
1445 <div class="line">   <a class="code hl_function" href="group__mpu__functions.html#gafa27b26d5847fa8e465584e376b6078a">ARM_MPU_Load</a>(0, mpuTable[idx], 4);</div>
1446 <div class="line">}</div>
1447 <div class="ttc" id="agroup__mpu8__functions_html_ga64e249c7c678144b52493a4b6f8f6b3c"><div class="ttname"><a href="group__mpu8__functions.html#ga64e249c7c678144b52493a4b6f8f6b3c">ARM_MPU_AP_RO</a></div><div class="ttdeci">#define ARM_MPU_AP_RO</div><div class="ttdoc">Normal memory, read-only.</div><div class="ttdef"><b>Definition:</b> Ref_MPU8.txt:117</div></div>
1448 <div class="ttc" id="agroup__mpu__functions_html_gafa27b26d5847fa8e465584e376b6078a"><div class="ttname"><a href="group__mpu__functions.html#gafa27b26d5847fa8e465584e376b6078a">ARM_MPU_Load</a></div><div class="ttdeci">__STATIC_INLINE void ARM_MPU_Load(MPU_Region_t const *table, uint32_t cnt)</div></div>
1449 <div class="ttc" id="astructARM__MPU__Region__t_html"><div class="ttname"><a href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a></div><div class="ttdoc">Setup information of a single MPU Region.</div><div class="ttdef"><b>Definition:</b> Ref_MPU.txt:84</div></div>
1450 <div class="ttc" id="astructARM__MPU__Region__t_html_afe7a7721aa08988d915670efa432cdd2"><div class="ttname"><a href="structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2">ARM_MPU_Region_t::RBAR</a></div><div class="ttdeci">uint32_t RBAR</div><div class="ttdoc">The region base address register value (RBAR)</div><div class="ttdef"><b>Definition:</b> Ref_MPU.txt:85</div></div>
1451 </div><!-- fragment -->
1452 </div>
1453 </div>
1454 <a id="ga7f8c6e09be98067d613e4df1832c543d" name="ga7f8c6e09be98067d613e4df1832c543d"></a>
1455 <h2 class="memtitle"><span class="permalink"><a href="#ga7f8c6e09be98067d613e4df1832c543d">&#9670;&#160;</a></span>ARM_MPU_Load_NS()</h2>
1456
1457 <div class="memitem">
1458 <div class="memproto">
1459       <table class="memname">
1460         <tr>
1461           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Load_NS </td>
1462           <td>(</td>
1463           <td class="paramtype">uint32_t&#160;</td>
1464           <td class="paramname"><em>rnr</em>, </td>
1465         </tr>
1466         <tr>
1467           <td class="paramkey"></td>
1468           <td></td>
1469           <td class="paramtype"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *&#160;</td>
1470           <td class="paramname"><em>table</em>, </td>
1471         </tr>
1472         <tr>
1473           <td class="paramkey"></td>
1474           <td></td>
1475           <td class="paramtype">uint32_t&#160;</td>
1476           <td class="paramname"><em>cnt</em>&#160;</td>
1477         </tr>
1478         <tr>
1479           <td></td>
1480           <td>)</td>
1481           <td></td><td></td>
1482         </tr>
1483       </table>
1484 </div><div class="memdoc">
1485 <p>Load the given number of MPU regions from a table to the Non-secure MPU. </p><dl class="params"><dt>Parameters</dt><dd>
1486   <table class="params">
1487     <tr><td class="paramname">rnr</td><td>First region number to be configured. </td></tr>
1488     <tr><td class="paramname">table</td><td>Pointer to the MPU configuration table. </td></tr>
1489     <tr><td class="paramname">cnt</td><td>Amount of regions to be configured. </td></tr>
1490   </table>
1491   </dd>
1492 </dl>
1493
1494 </div>
1495 </div>
1496 <a id="gab6094419f2abd678f1f3b121cd115049" name="gab6094419f2abd678f1f3b121cd115049"></a>
1497 <h2 class="memtitle"><span class="permalink"><a href="#gab6094419f2abd678f1f3b121cd115049">&#9670;&#160;</a></span>ARM_MPU_LoadEx()</h2>
1498
1499 <div class="memitem">
1500 <div class="memproto">
1501       <table class="memname">
1502         <tr>
1503           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_LoadEx </td>
1504           <td>(</td>
1505           <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
1506           <td class="paramname"><em>mpu</em>, </td>
1507         </tr>
1508         <tr>
1509           <td class="paramkey"></td>
1510           <td></td>
1511           <td class="paramtype">uint32_t&#160;</td>
1512           <td class="paramname"><em>rnr</em>, </td>
1513         </tr>
1514         <tr>
1515           <td class="paramkey"></td>
1516           <td></td>
1517           <td class="paramtype"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *&#160;</td>
1518           <td class="paramname"><em>table</em>, </td>
1519         </tr>
1520         <tr>
1521           <td class="paramkey"></td>
1522           <td></td>
1523           <td class="paramtype">uint32_t&#160;</td>
1524           <td class="paramname"><em>cnt</em>&#160;</td>
1525         </tr>
1526         <tr>
1527           <td></td>
1528           <td>)</td>
1529           <td></td><td></td>
1530         </tr>
1531       </table>
1532 </div><div class="memdoc">
1533 <p>Load the given number of MPU regions from a table to the given MPU. </p><dl class="params"><dt>Parameters</dt><dd>
1534   <table class="params">
1535     <tr><td class="paramname">mpu</td><td>Pointer to the MPU registers to be used. </td></tr>
1536     <tr><td class="paramname">rnr</td><td>First region number to be configured. </td></tr>
1537     <tr><td class="paramname">table</td><td>Pointer to the MPU configuration table. </td></tr>
1538     <tr><td class="paramname">cnt</td><td>Amount of regions to be configured. </td></tr>
1539   </table>
1540   </dd>
1541 </dl>
1542
1543 </div>
1544 </div>
1545 <a id="gac1a949403bf84eecaf407003fb553ae7" name="gac1a949403bf84eecaf407003fb553ae7"></a>
1546 <h2 class="memtitle"><span class="permalink"><a href="#gac1a949403bf84eecaf407003fb553ae7">&#9670;&#160;</a></span>ARM_MPU_OrderedMemcpy()</h2>
1547
1548 <div class="memitem">
1549 <div class="memproto">
1550       <table class="memname">
1551         <tr>
1552           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_OrderedMemcpy </td>
1553           <td>(</td>
1554           <td class="paramtype">volatile uint32_t *&#160;</td>
1555           <td class="paramname"><em>dst</em>, </td>
1556         </tr>
1557         <tr>
1558           <td class="paramkey"></td>
1559           <td></td>
1560           <td class="paramtype">const uint32_t *<a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a>&#160;</td>
1561           <td class="paramname"><em>src</em>, </td>
1562         </tr>
1563         <tr>
1564           <td class="paramkey"></td>
1565           <td></td>
1566           <td class="paramtype">uint32_t&#160;</td>
1567           <td class="paramname"><em>len</em>&#160;</td>
1568         </tr>
1569         <tr>
1570           <td></td>
1571           <td>)</td>
1572           <td></td><td></td>
1573         </tr>
1574       </table>
1575 </div><div class="memdoc">
1576 <p>Memcpy with strictly ordered memory access, e.g. used by code in <a class="el" href="group__mpu8__functions.html#gab6094419f2abd678f1f3b121cd115049">ARM_MPU_LoadEx</a>. </p><dl class="params"><dt>Parameters</dt><dd>
1577   <table class="params">
1578     <tr><td class="paramname">dst</td><td>Destination data is copied to. </td></tr>
1579     <tr><td class="paramname">src</td><td>Source data is copied from. </td></tr>
1580     <tr><td class="paramname">len</td><td>Amount of data words to be copied. </td></tr>
1581   </table>
1582   </dd>
1583 </dl>
1584
1585 </div>
1586 </div>
1587 <a id="gab5b3c0a53d19c09a5550f1d9071ae65c" name="gab5b3c0a53d19c09a5550f1d9071ae65c"></a>
1588 <h2 class="memtitle"><span class="permalink"><a href="#gab5b3c0a53d19c09a5550f1d9071ae65c">&#9670;&#160;</a></span>ARM_MPU_SetMemAttr()</h2>
1589
1590 <div class="memitem">
1591 <div class="memproto">
1592       <table class="memname">
1593         <tr>
1594           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetMemAttr </td>
1595           <td>(</td>
1596           <td class="paramtype">uint8_t&#160;</td>
1597           <td class="paramname"><em>idx</em>, </td>
1598         </tr>
1599         <tr>
1600           <td class="paramkey"></td>
1601           <td></td>
1602           <td class="paramtype">uint8_t&#160;</td>
1603           <td class="paramname"><em>attr</em>&#160;</td>
1604         </tr>
1605         <tr>
1606           <td></td>
1607           <td>)</td>
1608           <td></td><td></td>
1609         </tr>
1610       </table>
1611 </div><div class="memdoc">
1612 <p>Set the memory attribute encoding. </p><dl class="params"><dt>Parameters</dt><dd>
1613   <table class="params">
1614     <tr><td class="paramname">idx</td><td>The attribute index to be set [0-7] </td></tr>
1615     <tr><td class="paramname">attr</td><td>The attribute value to be set. </td></tr>
1616   </table>
1617   </dd>
1618 </dl>
1619
1620 </div>
1621 </div>
1622 <a id="ga5100a150a755902af2455a455a329ef9" name="ga5100a150a755902af2455a455a329ef9"></a>
1623 <h2 class="memtitle"><span class="permalink"><a href="#ga5100a150a755902af2455a455a329ef9">&#9670;&#160;</a></span>ARM_MPU_SetMemAttr_NS()</h2>
1624
1625 <div class="memitem">
1626 <div class="memproto">
1627       <table class="memname">
1628         <tr>
1629           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetMemAttr_NS </td>
1630           <td>(</td>
1631           <td class="paramtype">uint8_t&#160;</td>
1632           <td class="paramname"><em>idx</em>, </td>
1633         </tr>
1634         <tr>
1635           <td class="paramkey"></td>
1636           <td></td>
1637           <td class="paramtype">uint8_t&#160;</td>
1638           <td class="paramname"><em>attr</em>&#160;</td>
1639         </tr>
1640         <tr>
1641           <td></td>
1642           <td>)</td>
1643           <td></td><td></td>
1644         </tr>
1645       </table>
1646 </div><div class="memdoc">
1647 <p>Set the memory attribute encoding to the Non-secure MPU. </p><dl class="params"><dt>Parameters</dt><dd>
1648   <table class="params">
1649     <tr><td class="paramname">idx</td><td>The attribute index to be set [0-7] </td></tr>
1650     <tr><td class="paramname">attr</td><td>The attribute value to be set. </td></tr>
1651   </table>
1652   </dd>
1653 </dl>
1654
1655 </div>
1656 </div>
1657 <a id="ga1799413f08a157d636a1491371c15ce2" name="ga1799413f08a157d636a1491371c15ce2"></a>
1658 <h2 class="memtitle"><span class="permalink"><a href="#ga1799413f08a157d636a1491371c15ce2">&#9670;&#160;</a></span>ARM_MPU_SetMemAttrEx()</h2>
1659
1660 <div class="memitem">
1661 <div class="memproto">
1662       <table class="memname">
1663         <tr>
1664           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetMemAttrEx </td>
1665           <td>(</td>
1666           <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
1667           <td class="paramname"><em>mpu</em>, </td>
1668         </tr>
1669         <tr>
1670           <td class="paramkey"></td>
1671           <td></td>
1672           <td class="paramtype">uint8_t&#160;</td>
1673           <td class="paramname"><em>idx</em>, </td>
1674         </tr>
1675         <tr>
1676           <td class="paramkey"></td>
1677           <td></td>
1678           <td class="paramtype">uint8_t&#160;</td>
1679           <td class="paramname"><em>attr</em>&#160;</td>
1680         </tr>
1681         <tr>
1682           <td></td>
1683           <td>)</td>
1684           <td></td><td></td>
1685         </tr>
1686       </table>
1687 </div><div class="memdoc">
1688 <p>Set the memory attribute encoding to the given MPU. </p><dl class="params"><dt>Parameters</dt><dd>
1689   <table class="params">
1690     <tr><td class="paramname">mpu</td><td>Pointer to the MPU to be configured. </td></tr>
1691     <tr><td class="paramname">idx</td><td>The attribute index to be set [0-7] </td></tr>
1692     <tr><td class="paramname">attr</td><td>The attribute value to be set. </td></tr>
1693   </table>
1694   </dd>
1695 </dl>
1696
1697 </div>
1698 </div>
1699 <a id="ga6d7f220015c070c0e469948c1775ee3d" name="ga6d7f220015c070c0e469948c1775ee3d"></a>
1700 <h2 class="memtitle"><span class="permalink"><a href="#ga6d7f220015c070c0e469948c1775ee3d">&#9670;&#160;</a></span>ARM_MPU_SetRegion()</h2>
1701
1702 <div class="memitem">
1703 <div class="memproto">
1704       <table class="memname">
1705         <tr>
1706           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetRegion </td>
1707           <td>(</td>
1708           <td class="paramtype">uint32_t&#160;</td>
1709           <td class="paramname"><em>rnr</em>, </td>
1710         </tr>
1711         <tr>
1712           <td class="paramkey"></td>
1713           <td></td>
1714           <td class="paramtype">uint32_t&#160;</td>
1715           <td class="paramname"><em>rbar</em>, </td>
1716         </tr>
1717         <tr>
1718           <td class="paramkey"></td>
1719           <td></td>
1720           <td class="paramtype">uint32_t&#160;</td>
1721           <td class="paramname"><em>rlar</em>&#160;</td>
1722         </tr>
1723         <tr>
1724           <td></td>
1725           <td>)</td>
1726           <td></td><td></td>
1727         </tr>
1728       </table>
1729 </div><div class="memdoc">
1730 <p>Configure the given MPU region. </p><dl class="params"><dt>Parameters</dt><dd>
1731   <table class="params">
1732     <tr><td class="paramname">rnr</td><td>Region number to be configured. </td></tr>
1733     <tr><td class="paramname">rbar</td><td>Value for RBAR register. </td></tr>
1734     <tr><td class="paramname">rlar</td><td>Value for RLAR register. </td></tr>
1735   </table>
1736   </dd>
1737 </dl>
1738
1739 </div>
1740 </div>
1741 <a id="ga7566931ca9bb9f22d213a67ec5f8c745" name="ga7566931ca9bb9f22d213a67ec5f8c745"></a>
1742 <h2 class="memtitle"><span class="permalink"><a href="#ga7566931ca9bb9f22d213a67ec5f8c745">&#9670;&#160;</a></span>ARM_MPU_SetRegion_NS()</h2>
1743
1744 <div class="memitem">
1745 <div class="memproto">
1746       <table class="memname">
1747         <tr>
1748           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetRegion_NS </td>
1749           <td>(</td>
1750           <td class="paramtype">uint32_t&#160;</td>
1751           <td class="paramname"><em>rnr</em>, </td>
1752         </tr>
1753         <tr>
1754           <td class="paramkey"></td>
1755           <td></td>
1756           <td class="paramtype">uint32_t&#160;</td>
1757           <td class="paramname"><em>rbar</em>, </td>
1758         </tr>
1759         <tr>
1760           <td class="paramkey"></td>
1761           <td></td>
1762           <td class="paramtype">uint32_t&#160;</td>
1763           <td class="paramname"><em>rlar</em>&#160;</td>
1764         </tr>
1765         <tr>
1766           <td></td>
1767           <td>)</td>
1768           <td></td><td></td>
1769         </tr>
1770       </table>
1771 </div><div class="memdoc">
1772 <p>Configure the given Non-secure MPU region. </p><dl class="params"><dt>Parameters</dt><dd>
1773   <table class="params">
1774     <tr><td class="paramname">rnr</td><td>Region number to be configured. </td></tr>
1775     <tr><td class="paramname">rbar</td><td>Value for RBAR register. </td></tr>
1776     <tr><td class="paramname">rlar</td><td>Value for RLAR register. </td></tr>
1777   </table>
1778   </dd>
1779 </dl>
1780
1781 </div>
1782 </div>
1783 <a id="ga3d50ba8546252bea959e45c8fdf16993" name="ga3d50ba8546252bea959e45c8fdf16993"></a>
1784 <h2 class="memtitle"><span class="permalink"><a href="#ga3d50ba8546252bea959e45c8fdf16993">&#9670;&#160;</a></span>ARM_MPU_SetRegionEx()</h2>
1785
1786 <div class="memitem">
1787 <div class="memproto">
1788       <table class="memname">
1789         <tr>
1790           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetRegionEx </td>
1791           <td>(</td>
1792           <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
1793           <td class="paramname"><em>mpu</em>, </td>
1794         </tr>
1795         <tr>
1796           <td class="paramkey"></td>
1797           <td></td>
1798           <td class="paramtype">uint32_t&#160;</td>
1799           <td class="paramname"><em>rnr</em>, </td>
1800         </tr>
1801         <tr>
1802           <td class="paramkey"></td>
1803           <td></td>
1804           <td class="paramtype">uint32_t&#160;</td>
1805           <td class="paramname"><em>rbar</em>, </td>
1806         </tr>
1807         <tr>
1808           <td class="paramkey"></td>
1809           <td></td>
1810           <td class="paramtype">uint32_t&#160;</td>
1811           <td class="paramname"><em>rlar</em>&#160;</td>
1812         </tr>
1813         <tr>
1814           <td></td>
1815           <td>)</td>
1816           <td></td><td></td>
1817         </tr>
1818       </table>
1819 </div><div class="memdoc">
1820 <p>Configure the given MPU region of the given MPU. </p><dl class="params"><dt>Parameters</dt><dd>
1821   <table class="params">
1822     <tr><td class="paramname">mpu</td><td>Pointer to MPU to be used. </td></tr>
1823     <tr><td class="paramname">rnr</td><td>Region number to be configured. </td></tr>
1824     <tr><td class="paramname">rbar</td><td>Value for RBAR register. </td></tr>
1825     <tr><td class="paramname">rlar</td><td>Value for RLAR register. </td></tr>
1826   </table>
1827   </dd>
1828 </dl>
1829
1830 </div>
1831 </div>
1832 <a id="gabd11943b38cdf185dcb8e60e459d5854" name="gabd11943b38cdf185dcb8e60e459d5854"></a>
1833 <h2 class="memtitle"><span class="permalink"><a href="#gabd11943b38cdf185dcb8e60e459d5854">&#9670;&#160;</a></span>ARM_MPU_TYPE()</h2>
1834
1835 <div class="memitem">
1836 <div class="memproto">
1837       <table class="memname">
1838         <tr>
1839           <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t ARM_MPU_TYPE </td>
1840           <td>(</td>
1841           <td class="paramname"></td><td>)</td>
1842           <td></td>
1843         </tr>
1844       </table>
1845 </div><div class="memdoc">
1846
1847 <p>Read MPU Type Register. </p>
1848 <dl class="section return"><dt>Returns</dt><dd>Number of MPU regions </dd></dl>
1849
1850 </div>
1851 </div>
1852 </div><!-- contents -->
1853 </div><!-- doc-content -->
1854 <!-- start footer part -->
1855 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
1856   <ul>
1857     <li class="footer">
1858       <script type="text/javascript">
1859         <!--
1860         writeFooter.call(this);
1861         //-->
1862       </script>
1863     </li>
1864   </ul>
1865 </div>
1866 </body>
1867 </html>