begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.4.1-dev0">
  12       Active development ...
  13     </release>
  14     <release version="5.4.0" date="2018-08-01">
  15       Aligned pack structure with repository.
  16       The following folders are deprecated:
  17         - CMSIS/Include/
  18         - CMSIS/DSP_Lib/
  19
  20       CMSIS-Core(M): 5.1.2 (see revision history for details)
  21         - Added Cortex-M1 support (beta).
  22       CMSIS-Core(A): 1.1.2 (see revision history for details)
  23       CMSIS-NN: 1.1.0
  24         - Added new math functions.
  25       CMSIS-RTOS2:
  26         - API 2.1.3 (see revision history for details)
  27         - RTX 5.4.0 (see revision history for details)
  28           * Updated exception handling on Cortex-A
  29       CMSIS-Driver:
  30         - Flash Driver API V2.2.0
  31       Utilities:
  32         - SVDConv 3.3.21
  33         - PackChk 1.3.71
  34     </release>
  35     <release version="5.3.0" date="2018-02-22">
  36       Updated Arm company brand.
  37       CMSIS-Core(M): 5.1.1 (see revision history for details)
  38       CMSIS-Core(A): 1.1.1 (see revision history for details)
  39       CMSIS-DAP: 2.0.0 (see revision history for details)
  40       CMSIS-NN: 1.0.0
  41         - Initial contribution of the bare metal Neural Network Library.
  42       CMSIS-RTOS2:
  43         - RTX 5.3.0 (see revision history for details)
  44         - OS Tick API 1.0.1
  45     </release>
  46     <release version="5.2.0" date="2017-11-16">
  47       CMSIS-Core(M): 5.1.0 (see revision history for details)
  48         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  49         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  50       CMSIS-Core(A): 1.1.0 (see revision history for details)
  51         - Added compiler_iccarm.h.
  52         - Added additional access functions for physical timer.
  53       CMSIS-DAP: 1.2.0 (see revision history for details)
  54       CMSIS-DSP: 1.5.2 (see revision history for details)
  55       CMSIS-Driver: 2.6.0 (see revision history for details)
  56         - CAN Driver API V1.2.0
  57         - NAND Driver API V2.3.0
  58       CMSIS-RTOS:
  59         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
  60       CMSIS-RTOS2:
  61         - API 2.1.2 (see revision history for details)
  62         - RTX 5.2.3 (see revision history for details)
  63       Devices:
  64         - Added GCC startup and linker script for Cortex-A9.
  65         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
  66         - Added IAR startup code for Cortex-A9
  67     </release>
  68     <release version="5.1.1" date="2017-09-19">
  69       CMSIS-RTOS2:
  70       - RTX 5.2.1 (see revision history for details)
  71     </release>
  72     <release version="5.1.0" date="2017-08-04">
  73       CMSIS-Core(M): 5.0.2 (see revision history for details)
  74       - Changed Version Control macros to be core agnostic.
  75       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  76       CMSIS-Core(A): 1.0.0 (see revision history for details)
  77       - Initial release
  78       - IRQ Controller API 1.0.0
  79       CMSIS-Driver: 2.05 (see revision history for details)
  80       - All typedefs related to status have been made volatile.
  81       CMSIS-RTOS2:
  82       - API 2.1.1 (see revision history for details)
  83       - RTX 5.2.0 (see revision history for details)
  84       - OS Tick API 1.0.0
  85       CMSIS-DSP: 1.5.2 (see revision history for details)
  86       - Fixed GNU Compiler specific diagnostics.
  87       CMSIS-Pack: 1.5.0 (see revision history for details)
  88       - added System Description File (*.SDF) Format
  89       CMSIS-Zone: 0.0.1 (Preview)
  90       - Initial specification draft
  91     </release>
  92     <release version="5.0.1" date="2017-02-03">
  93       Package Description:
  94       - added taxonomy for Cclass RTOS
  95       CMSIS-RTOS2:
  96       - API 2.1   (see revision history for details)
  97       - RTX 5.1.0 (see revision history for details)
  98       CMSIS-Core: 5.0.1 (see revision history for details)
  99       - Added __PACKED_STRUCT macro
 100       - Added uVisior support
 101       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 102       - Updated template for secure main function (main_s.c)
 103       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 104       CMSIS-DSP: 1.5.1 (see revision history for details)
 105       - added ARMv8M DSP libraries.
 106       CMSIS-Pack:1.4.9 (see revision history for details)
 107       - added Pack Index File specification and schema file
 108     </release>
 109     <release version="5.0.0" date="2016-11-11">
 110       Changed open source license to Apache 2.0
 111       CMSIS_Core:
 112        - Added support for Cortex-M23 and Cortex-M33.
 113        - Added ARMv8-M device configurations for mainline and baseline.
 114        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 115        - Added cmsis_compiler.h to unify compiler behaviour.
 116        - Updated function SCB_EnableICache (for Cortex-M7).
 117        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 118       CMSIS-RTOS:
 119         - bug fix in RTX 4.82 (see revision history for details)
 120       CMSIS-RTOS2:
 121         - new API including compatibility layer to CMSIS-RTOS
 122         - reference implementation based on RTX5
 123         - supports all Cortex-M variants including TrustZone for ARMv8-M
 124       CMSIS-SVD:
 125        - reworked SVD format documentation
 126        - removed SVD file database documentation as SVD files are distributed in packs
 127        - updated SVDConv for Win32 and Linux
 128       CMSIS-DSP:
 129        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 130        - Added DSP libraries build projects to CMSIS pack.
 131     </release>
 132     <release version="4.5.0" date="2015-10-28">
 133       - CMSIS-Core     4.30.0  (see revision history for details)
 134       - CMSIS-DAP      1.1.0   (unchanged)
 135       - CMSIS-Driver   2.04.0  (see revision history for details)
 136       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 137       - CMSIS-Pack     1.4.1   (see revision history for details)
 138       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 139       - CMSIS-SVD      1.3.1   (see revision history for details)
 140     </release>
 141     <release version="4.4.0" date="2015-09-11">
 142       - CMSIS-Core     4.20   (see revision history for details)
 143       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 144       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 145       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 146       - CMSIS-RTOS
 147         -- API         1.02   (unchanged)
 148         -- RTX         4.79   (see revision history for details)
 149       - CMSIS-SVD      1.3.0  (see revision history for details)
 150       - CMSIS-DAP      1.1.0  (extended with SWO support)
 151     </release>
 152     <release version="4.3.0" date="2015-03-20">
 153       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 154       - CMSIS-DSP      1.4.5  (see revision history for details)
 155       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 156       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 157       - CMSIS-RTOS
 158         -- API         1.02   (unchanged)
 159         -- RTX         4.78   (see revision history for details)
 160       - CMSIS-SVD      1.2    (unchanged)
 161     </release>
 162     <release version="4.2.0" date="2014-09-24">
 163       Adding Cortex-M7 support
 164       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 165       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 166       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 167       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 168       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 169     </release>
 170     <release version="4.1.1" date="2014-06-30">
 171       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 172     </release>
 173     <release version="4.1.0" date="2014-06-12">
 174       - CMSIS-Driver   2.02  (incompatible update)
 175       - CMSIS-Pack     1.3   (see revision history for details)
 176       - CMSIS-DSP      1.4.2 (unchanged)
 177       - CMSIS-Core     3.30  (unchanged)
 178       - CMSIS-RTOS RTX 4.74  (unchanged)
 179       - CMSIS-RTOS API 1.02  (unchanged)
 180       - CMSIS-SVD      1.10  (unchanged)
 181       PACK:
 182       - removed G++ specific files from PACK
 183       - added Component Startup variant "C Startup"
 184       - added Pack Checking Utility
 185       - updated conditions to reflect tool-chain dependency
 186       - added Taxonomy for Graphics
 187       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 188     </release>
 189     <release version="4.0.0">
 190       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 191       - CMSIS-Pack     1.1   Preliminary
 192       - CMSIS-DSP      1.4.2 (see revision history for details)
 193       - CMSIS-Core     3.30  (see revision history for details)
 194       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 195       - CMSIS-RTOS API 1.02  (unchanged)
 196       - CMSIS-SVD      1.10  (unchanged)
 197     </release>
 198     <release version="3.20.4">
 199       - CMSIS-RTOS 4.74 (see revision history for details)
 200       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 201     </release>
 202     <release version="3.20.3">
 203       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 204       - CMSIS-RTOS 4.73 (see revision history for details)
 205     </release>
 206     <release version="3.20.2">
 207       - CMSIS-Pack documentation has been added
 208       - CMSIS-Drivers header and documentation have been added to PACK
 209       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 210     </release>
 211     <release version="3.20.1">
 212       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 213       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 214     </release>
 215     <release version="3.20.0">
 216       The software portions that are deployed in the application program are now under a BSD license which allows usage
 217       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 218       The individual components have been update as listed below:
 219       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 220       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 221       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 222       - CMSIS-SVD is unchanged.
 223     </release>
 224   </releases>
 225
 226   <taxonomy>
 227     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 228     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 229     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 230     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 231     <description Cclass="File System">File Drive Support and File System</description>
 232     <description Cclass="Graphics">Graphical User Interface</description>
 233     <description Cclass="Network">Network Stack using Internet Protocols</description>
 234     <description Cclass="USB">Universal Serial Bus Stack</description>
 235     <description Cclass="Compiler">Compiler Software Extensions</description>
 236     <description Cclass="RTOS">Real-time Operating System</description>
 237   </taxonomy>
 238
 239   <devices>
 240     <!-- ******************************  Cortex-M0  ****************************** -->
 241     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 242       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 243       <description>
 244 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 245 - simple, easy-to-use programmers model
 246 - highly efficient ultra-low power operation
 247 - excellent code density
 248 - deterministic, high-performance interrupt handling
 249 - upward compatibility with the rest of the Cortex-M processor family.
 250       </description>
 251       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 252       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 253       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 254       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 255
 256       <device Dname="ARMCM0">
 257         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 258         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 259       </device>
 260     </family>
 261
 262     <!-- ******************************  Cortex-M0P  ****************************** -->
 263     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 264       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 265       <description>
 266 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 267 - simple, easy-to-use programmers model
 268 - highly efficient ultra-low power operation
 269 - excellent code density
 270 - deterministic, high-performance interrupt handling
 271 - upward compatibility with the rest of the Cortex-M processor family.
 272       </description>
 273       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 274       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 275       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 276       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 277
 278       <device Dname="ARMCM0P">
 279         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 280         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 281       </device>
 282
 283       <device Dname="ARMCM0P_MPU">
 284         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 285         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 286       </device>
 287     </family>
 288
 289     <!-- ******************************  Cortex-M1  ****************************** -->
 290     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 291       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 292       <description>
 293 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 294 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 295       </description>
 296       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 297       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 298       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 299       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 300
 301       <device Dname="ARMCM1">
 302         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 303         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 304       </device>
 305     </family>
 306
 307     <!-- ******************************  Cortex-M3  ****************************** -->
 308     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 309       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 310       <description>
 311 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 312 - simple, easy-to-use programmers model
 313 - highly efficient ultra-low power operation
 314 - excellent code density
 315 - deterministic, high-performance interrupt handling
 316 - upward compatibility with the rest of the Cortex-M processor family.
 317       </description>
 318       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 319       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 320       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 321       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 322
 323       <device Dname="ARMCM3">
 324         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 325         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 326       </device>
 327     </family>
 328
 329     <!-- ******************************  Cortex-M4  ****************************** -->
 330     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 331       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 332       <description>
 333 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 334 - simple, easy-to-use programmers model
 335 - highly efficient ultra-low power operation
 336 - excellent code density
 337 - deterministic, high-performance interrupt handling
 338 - upward compatibility with the rest of the Cortex-M processor family.
 339       </description>
 340       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 341       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 342       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 343       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 344
 345       <device Dname="ARMCM4">
 346         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 347         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 348       </device>
 349
 350       <device Dname="ARMCM4_FP">
 351         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 352         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 353       </device>
 354     </family>
 355
 356     <!-- ******************************  Cortex-M7  ****************************** -->
 357     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 358       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 359       <description>
 360 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 361 - simple, easy-to-use programmers model
 362 - highly efficient ultra-low power operation
 363 - excellent code density
 364 - deterministic, high-performance interrupt handling
 365 - upward compatibility with the rest of the Cortex-M processor family.
 366       </description>
 367       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 368       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 369       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 370       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 371
 372       <device Dname="ARMCM7">
 373         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 374         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 375       </device>
 376
 377       <device Dname="ARMCM7_SP">
 378         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 379         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 380       </device>
 381
 382       <device Dname="ARMCM7_DP">
 383         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 384         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 385       </device>
 386     </family>
 387
 388     <!-- ******************************  Cortex-M23  ********************** -->
 389     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 390       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 391       <description>
 392 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 393 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 394 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 395       </description>
 396       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 397       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 398       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 399       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 400       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 401       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 402
 403       <device Dname="ARMCM23">
 404         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 405         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 406       </device>
 407
 408       <device Dname="ARMCM23_TZ">
 409         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 410         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 411       </device>
 412     </family>
 413
 414     <!-- ******************************  Cortex-M33  ****************************** -->
 415     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 416       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 417       <description>
 418 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 419 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 420       </description>
 421       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 422       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 423       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 424       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 425       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 426       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 427
 428       <device Dname="ARMCM33">
 429         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 430         <description>
 431           no DSP Instructions, no Floating Point Unit, no TrustZone
 432         </description>
 433         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 434       </device>
 435
 436       <device Dname="ARMCM33_TZ">
 437         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 438         <description>
 439           no DSP Instructions, no Floating Point Unit, TrustZone
 440         </description>
 441         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 442       </device>
 443
 444       <device Dname="ARMCM33_DSP_FP">
 445         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 446         <description>
 447           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 448         </description>
 449         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 450       </device>
 451
 452       <device Dname="ARMCM33_DSP_FP_TZ">
 453         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 454         <description>
 455           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 456         </description>
 457         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 458       </device>
 459     </family>
 460
 461     <!-- ******************************  ARMSC000  ****************************** -->
 462     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 463       <description>
 464 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 465 - simple, easy-to-use programmers model
 466 - highly efficient ultra-low power operation
 467 - excellent code density
 468 - deterministic, high-performance interrupt handling
 469       </description>
 470       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 471       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 472       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 473       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 474
 475       <device Dname="ARMSC000">
 476         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 477         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 478       </device>
 479     </family>
 480
 481     <!-- ******************************  ARMSC300  ****************************** -->
 482     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 483       <description>
 484 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 485 - simple, easy-to-use programmers model
 486 - highly efficient ultra-low power operation
 487 - excellent code density
 488 - deterministic, high-performance interrupt handling
 489       </description>
 490       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 491       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 492       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 493       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 494
 495       <device Dname="ARMSC300">
 496         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 497         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 498       </device>
 499     </family>
 500
 501     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 502     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 503       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 504       <description>
 505 Armv8-M Baseline based device with TrustZone
 506       </description>
 507       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 508       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 509       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 510       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 511       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 512       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 513
 514       <device Dname="ARMv8MBL">
 515         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 516         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 517       </device>
 518     </family>
 519
 520     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 521     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 522       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 523       <description>
 524 Armv8-M Mainline based device with TrustZone
 525       </description>
 526       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 527       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 528       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 529       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 530       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 531       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 532
 533       <device Dname="ARMv8MML">
 534         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 535         <description>
 536           no DSP Instructions, no Floating Point Unit, TrustZone
 537         </description>
 538         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 539       </device>
 540
 541       <device Dname="ARMv8MML_DSP">
 542         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 543         <description>
 544           DSP Instructions, no Floating Point Unit, TrustZone
 545         </description>
 546         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 547       </device>
 548
 549       <device Dname="ARMv8MML_SP">
 550         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 551         <description>
 552           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 553         </description>
 554         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 555       </device>
 556
 557       <device Dname="ARMv8MML_DSP_SP">
 558         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 559         <description>
 560           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 561         </description>
 562         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 563       </device>
 564
 565       <device Dname="ARMv8MML_DP">
 566         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 567         <description>
 568           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 569         </description>
 570         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 571       </device>
 572
 573       <device Dname="ARMv8MML_DSP_DP">
 574         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 575         <description>
 576           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 577         </description>
 578         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 579       </device>
 580     </family>
 581
 582     <!-- ******************************  Cortex-A5  ****************************** -->
 583     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 584       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 585       <description>
 586 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 587 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 588 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 589       </description>
 590
 591       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 592       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 593
 594       <device Dname="ARMCA5">
 595         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 596         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 597       </device>
 598     </family>
 599
 600     <!-- ******************************  Cortex-A7  ****************************** -->
 601     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 602       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 603       <description>
 604 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 605 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 606 an optional integrated GIC, and an optional L2 cache controller.
 607       </description>
 608
 609       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 610       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 611
 612       <device Dname="ARMCA7">
 613         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 614         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 615       </device>
 616     </family>
 617
 618     <!-- ******************************  Cortex-A9  ****************************** -->
 619     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 620       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 621       <description>
 622 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 623 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 624 and 8-bit Java bytecodes in Jazelle state.
 625       </description>
 626
 627       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 628       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 629
 630       <device Dname="ARMCA9">
 631         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 632         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 633       </device>
 634     </family>
 635   </devices>
 636
 637
 638   <apis>
 639     <!-- CMSIS Device API -->
 640     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 641       <description>Device interrupt controller interface</description>
 642       <files>
 643         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 644       </files>
 645     </api>
 646     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 647       <description>RTOS Kernel system tick timer interface</description>
 648       <files>
 649         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 650       </files>
 651     </api>
 652     <!-- CMSIS-RTOS API -->
 653     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 654       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 655       <files>
 656         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 657       </files>
 658     </api>
 659     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 660       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 661       <files>
 662         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 663         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 664       </files>
 665     </api>
 666     <!-- CMSIS Driver API -->
 667     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 668       <description>USART Driver API for Cortex-M</description>
 669       <files>
 670         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 671         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 672       </files>
 673     </api>
 674     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 675       <description>SPI Driver API for Cortex-M</description>
 676       <files>
 677         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 678         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 679       </files>
 680     </api>
 681     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 682       <description>SAI Driver API for Cortex-M</description>
 683       <files>
 684         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 685         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 686       </files>
 687     </api>
 688     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 689       <description>I2C Driver API for Cortex-M</description>
 690       <files>
 691         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 692         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 693       </files>
 694     </api>
 695     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 696       <description>CAN Driver API for Cortex-M</description>
 697       <files>
 698         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 699         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 700       </files>
 701     </api>
 702     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 703       <description>Flash Driver API for Cortex-M</description>
 704       <files>
 705         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 706         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 707       </files>
 708     </api>
 709     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 710       <description>MCI Driver API for Cortex-M</description>
 711       <files>
 712         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 713         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 714       </files>
 715     </api>
 716     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 717       <description>NAND Flash Driver API for Cortex-M</description>
 718       <files>
 719         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 720         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 721       </files>
 722     </api>
 723     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 724       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 725       <files>
 726         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 727         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 728         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 729       </files>
 730     </api>
 731     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 732       <description>Ethernet MAC Driver API for Cortex-M</description>
 733       <files>
 734         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 735         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 736       </files>
 737     </api>
 738     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 739       <description>Ethernet PHY Driver API for Cortex-M</description>
 740       <files>
 741         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 742         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 743       </files>
 744     </api>
 745     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 746       <description>USB Device Driver API for Cortex-M</description>
 747       <files>
 748         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 749         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 750       </files>
 751     </api>
 752     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 753       <description>USB Host Driver API for Cortex-M</description>
 754       <files>
 755         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 756         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 757       </files>
 758     </api>
 759   </apis>
 760
 761   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 762   <conditions>
 763     <!-- compiler -->
 764     <condition id="ARMCC6">
 765       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 766       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 767     </condition>
 768     <condition id="ARMCC5">
 769       <require Tcompiler="ARMCC" Toptions="AC5"/>
 770     </condition>
 771     <condition id="ARMCC">
 772       <require Tcompiler="ARMCC"/>
 773     </condition>
 774     <condition id="GCC">
 775       <require Tcompiler="GCC"/>
 776     </condition>
 777     <condition id="IAR">
 778       <require Tcompiler="IAR"/>
 779     </condition>
 780     <condition id="ARMCC GCC">
 781       <accept Tcompiler="ARMCC"/>
 782       <accept Tcompiler="GCC"/>
 783     </condition>
 784     <condition id="ARMCC GCC IAR">
 785       <accept Tcompiler="ARMCC"/>
 786       <accept Tcompiler="GCC"/>
 787       <accept Tcompiler="IAR"/>
 788     </condition>
 789
 790     <!-- Arm architecture -->
 791     <condition id="ARMv6-M Device">
 792       <description>Armv6-M architecture based device</description>
 793       <accept Dcore="Cortex-M0"/>
 794       <accept Dcore="Cortex-M1"/>
 795       <accept Dcore="Cortex-M0+"/>
 796       <accept Dcore="SC000"/>
 797     </condition>
 798     <condition id="ARMv7-M Device">
 799       <description>Armv7-M architecture based device</description>
 800       <accept Dcore="Cortex-M3"/>
 801       <accept Dcore="Cortex-M4"/>
 802       <accept Dcore="Cortex-M7"/>
 803       <accept Dcore="SC300"/>
 804     </condition>
 805     <condition id="ARMv8-M Device">
 806       <description>Armv8-M architecture based device</description>
 807       <accept Dcore="ARMV8MBL"/>
 808       <accept Dcore="ARMV8MML"/>
 809       <accept Dcore="Cortex-M23"/>
 810       <accept Dcore="Cortex-M33"/>
 811     </condition>
 812     <condition id="ARMv8-M TZ Device">
 813       <description>Armv8-M architecture based device with TrustZone</description>
 814       <require condition="ARMv8-M Device"/>
 815       <require Dtz="TZ"/>
 816     </condition>
 817     <condition id="ARMv6_7-M Device">
 818       <description>Armv6_7-M architecture based device</description>
 819       <accept condition="ARMv6-M Device"/>
 820       <accept condition="ARMv7-M Device"/>
 821     </condition>
 822     <condition id="ARMv6_7_8-M Device">
 823       <description>Armv6_7_8-M architecture based device</description>
 824       <accept condition="ARMv6-M Device"/>
 825       <accept condition="ARMv7-M Device"/>
 826       <accept condition="ARMv8-M Device"/>
 827     </condition>
 828     <condition id="ARMv7-A Device">
 829       <description>Armv7-A architecture based device</description>
 830       <accept Dcore="Cortex-A5"/>
 831       <accept Dcore="Cortex-A7"/>
 832       <accept Dcore="Cortex-A9"/>
 833     </condition>
 834
 835     <!-- ARM core -->
 836     <condition id="CM0">
 837       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 838       <accept Dcore="Cortex-M0"/>
 839       <accept Dcore="Cortex-M0+"/>
 840       <accept Dcore="SC000"/>
 841     </condition>
 842     <condition id="CM1">
 843       <description>Cortex-M1</description>
 844       <require Dcore="Cortex-M1"/>
 845     </condition>
 846     <condition id="CM3">
 847       <description>Cortex-M3 or SC300 processor based device</description>
 848       <accept Dcore="Cortex-M3"/>
 849       <accept Dcore="SC300"/>
 850     </condition>
 851     <condition id="CM4">
 852       <description>Cortex-M4 processor based device</description>
 853       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 854     </condition>
 855     <condition id="CM4_FP">
 856       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 857       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 858       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 859       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 860     </condition>
 861     <condition id="CM7">
 862       <description>Cortex-M7 processor based device</description>
 863       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 864     </condition>
 865     <condition id="CM7_FP">
 866       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 867       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 868       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 869     </condition>
 870     <condition id="CM7_SP">
 871       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 872       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 873     </condition>
 874     <condition id="CM7_DP">
 875       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 876       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 877     </condition>
 878     <condition id="CM23">
 879       <description>Cortex-M23 processor based device</description>
 880       <require Dcore="Cortex-M23"/>
 881     </condition>
 882     <condition id="CM33">
 883       <description>Cortex-M33 processor based device</description>
 884       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 885     </condition>
 886     <condition id="CM33_FP">
 887       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 888       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 889     </condition>
 890     <condition id="ARMv8MBL">
 891       <description>Armv8-M Baseline processor based device</description>
 892       <require Dcore="ARMV8MBL"/>
 893     </condition>
 894     <condition id="ARMv8MML">
 895       <description>Armv8-M Mainline processor based device</description>
 896       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 897     </condition>
 898     <condition id="ARMv8MML_FP">
 899       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
 900       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 901       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 902     </condition>
 903
 904     <condition id="CM33_NODSP_NOFPU">
 905       <description>CM33, no DSP, no FPU</description>
 906       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 907     </condition>
 908     <condition id="CM33_DSP_NOFPU">
 909       <description>CM33, DSP, no FPU</description>
 910       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 911     </condition>
 912     <condition id="CM33_NODSP_SP">
 913       <description>CM33, no DSP, SP FPU</description>
 914       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 915     </condition>
 916     <condition id="CM33_DSP_SP">
 917       <description>CM33, DSP, SP FPU</description>
 918       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 919     </condition>
 920
 921     <condition id="ARMv8MML_NODSP_NOFPU">
 922       <description>Armv8-M Mainline, no DSP, no FPU</description>
 923       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 924     </condition>
 925     <condition id="ARMv8MML_DSP_NOFPU">
 926       <description>Armv8-M Mainline, DSP, no FPU</description>
 927       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 928     </condition>
 929     <condition id="ARMv8MML_NODSP_SP">
 930       <description>Armv8-M Mainline, no DSP, SP FPU</description>
 931       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 932     </condition>
 933     <condition id="ARMv8MML_DSP_SP">
 934       <description>Armv8-M Mainline, DSP, SP FPU</description>
 935       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 936     </condition>
 937
 938     <condition id="CA5_CA9">
 939       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 940       <accept Dcore="Cortex-A5"/>
 941       <accept Dcore="Cortex-A9"/>
 942     </condition>
 943
 944     <condition id="CA7">
 945       <description>Cortex-A7 processor based device</description>
 946       <accept Dcore="Cortex-A7"/>
 947     </condition>
 948
 949     <!-- ARMCC compiler -->
 950     <condition id="CA_ARMCC5">
 951       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
 952       <require condition="ARMv7-A Device"/>
 953       <require condition="ARMCC5"/>
 954     </condition>
 955     <condition id="CA_ARMCC6">
 956       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
 957       <require condition="ARMv7-A Device"/>
 958       <require condition="ARMCC6"/>
 959     </condition>
 960
 961     <condition id="CM0_ARMCC">
 962       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
 963       <require condition="CM0"/>
 964       <require Tcompiler="ARMCC"/>
 965     </condition>
 966     <condition id="CM0_LE_ARMCC">
 967       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
 968       <require condition="CM0_ARMCC"/>
 969       <require Dendian="Little-endian"/>
 970     </condition>
 971     <condition id="CM0_BE_ARMCC">
 972       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
 973       <require condition="CM0_ARMCC"/>
 974       <require Dendian="Big-endian"/>
 975     </condition>
 976
 977     <condition id="CM1_ARMCC">
 978       <description>Cortex-M1 based device for the Arm Compiler</description>
 979       <require condition="CM1"/>
 980       <require Tcompiler="ARMCC"/>
 981     </condition>
 982     <condition id="CM1_LE_ARMCC">
 983       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
 984       <require condition="CM1_ARMCC"/>
 985       <require Dendian="Little-endian"/>
 986     </condition>
 987     <condition id="CM1_BE_ARMCC">
 988       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
 989       <require condition="CM1_ARMCC"/>
 990       <require Dendian="Big-endian"/>
 991     </condition>
 992
 993     <condition id="CM3_ARMCC">
 994       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
 995       <require condition="CM3"/>
 996       <require Tcompiler="ARMCC"/>
 997     </condition>
 998     <condition id="CM3_LE_ARMCC">
 999       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1000       <require condition="CM3_ARMCC"/>
1001       <require Dendian="Little-endian"/>
1002     </condition>
1003     <condition id="CM3_BE_ARMCC">
1004       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1005       <require condition="CM3_ARMCC"/>
1006       <require Dendian="Big-endian"/>
1007     </condition>
1008
1009     <condition id="CM4_ARMCC">
1010       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1011       <require condition="CM4"/>
1012       <require Tcompiler="ARMCC"/>
1013     </condition>
1014     <condition id="CM4_LE_ARMCC">
1015       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1016       <require condition="CM4_ARMCC"/>
1017       <require Dendian="Little-endian"/>
1018     </condition>
1019     <condition id="CM4_BE_ARMCC">
1020       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1021       <require condition="CM4_ARMCC"/>
1022       <require Dendian="Big-endian"/>
1023     </condition>
1024
1025     <condition id="CM4_FP_ARMCC">
1026       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1027       <require condition="CM4_FP"/>
1028       <require Tcompiler="ARMCC"/>
1029     </condition>
1030     <condition id="CM4_FP_LE_ARMCC">
1031       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1032       <require condition="CM4_FP_ARMCC"/>
1033       <require Dendian="Little-endian"/>
1034     </condition>
1035     <condition id="CM4_FP_BE_ARMCC">
1036       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1037       <require condition="CM4_FP_ARMCC"/>
1038       <require Dendian="Big-endian"/>
1039     </condition>
1040
1041     <condition id="CM7_ARMCC">
1042       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1043       <require condition="CM7"/>
1044       <require Tcompiler="ARMCC"/>
1045     </condition>
1046     <condition id="CM7_LE_ARMCC">
1047       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1048       <require condition="CM7_ARMCC"/>
1049       <require Dendian="Little-endian"/>
1050     </condition>
1051     <condition id="CM7_BE_ARMCC">
1052       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1053       <require condition="CM7_ARMCC"/>
1054       <require Dendian="Big-endian"/>
1055     </condition>
1056
1057     <condition id="CM7_FP_ARMCC">
1058       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1059       <require condition="CM7_FP"/>
1060       <require Tcompiler="ARMCC"/>
1061     </condition>
1062     <condition id="CM7_FP_LE_ARMCC">
1063       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1064       <require condition="CM7_FP_ARMCC"/>
1065       <require Dendian="Little-endian"/>
1066     </condition>
1067     <condition id="CM7_FP_BE_ARMCC">
1068       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1069       <require condition="CM7_FP_ARMCC"/>
1070       <require Dendian="Big-endian"/>
1071     </condition>
1072
1073     <condition id="CM7_SP_ARMCC">
1074       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1075       <require condition="CM7_SP"/>
1076       <require Tcompiler="ARMCC"/>
1077     </condition>
1078     <condition id="CM7_SP_LE_ARMCC">
1079       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1080       <require condition="CM7_SP_ARMCC"/>
1081       <require Dendian="Little-endian"/>
1082     </condition>
1083     <condition id="CM7_SP_BE_ARMCC">
1084       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1085       <require condition="CM7_SP_ARMCC"/>
1086       <require Dendian="Big-endian"/>
1087     </condition>
1088
1089     <condition id="CM7_DP_ARMCC">
1090       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1091       <require condition="CM7_DP"/>
1092       <require Tcompiler="ARMCC"/>
1093     </condition>
1094     <condition id="CM7_DP_LE_ARMCC">
1095       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1096       <require condition="CM7_DP_ARMCC"/>
1097       <require Dendian="Little-endian"/>
1098     </condition>
1099     <condition id="CM7_DP_BE_ARMCC">
1100       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1101       <require condition="CM7_DP_ARMCC"/>
1102       <require Dendian="Big-endian"/>
1103     </condition>
1104
1105     <condition id="CM23_ARMCC">
1106       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1107       <require condition="CM23"/>
1108       <require Tcompiler="ARMCC"/>
1109     </condition>
1110     <condition id="CM23_LE_ARMCC">
1111       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1112       <require condition="CM23_ARMCC"/>
1113       <require Dendian="Little-endian"/>
1114     </condition>
1115     <condition id="CM23_BE_ARMCC">
1116       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1117       <require condition="CM23_ARMCC"/>
1118       <require Dendian="Big-endian"/>
1119     </condition>
1120
1121     <condition id="CM33_ARMCC">
1122       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1123       <require condition="CM33"/>
1124       <require Tcompiler="ARMCC"/>
1125     </condition>
1126     <condition id="CM33_LE_ARMCC">
1127       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1128       <require condition="CM33_ARMCC"/>
1129       <require Dendian="Little-endian"/>
1130     </condition>
1131     <condition id="CM33_BE_ARMCC">
1132       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1133       <require condition="CM33_ARMCC"/>
1134       <require Dendian="Big-endian"/>
1135     </condition>
1136
1137     <condition id="CM33_FP_ARMCC">
1138       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1139       <require condition="CM33_FP"/>
1140       <require Tcompiler="ARMCC"/>
1141     </condition>
1142     <condition id="CM33_FP_LE_ARMCC">
1143       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1144       <require condition="CM33_FP_ARMCC"/>
1145       <require Dendian="Little-endian"/>
1146     </condition>
1147     <condition id="CM33_FP_BE_ARMCC">
1148       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1149       <require condition="CM33_FP_ARMCC"/>
1150       <require Dendian="Big-endian"/>
1151     </condition>
1152
1153     <condition id="CM33_NODSP_NOFPU_ARMCC">
1154       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1155       <require condition="CM33_NODSP_NOFPU"/>
1156       <require Tcompiler="ARMCC"/>
1157     </condition>
1158     <condition id="CM33_DSP_NOFPU_ARMCC">
1159       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1160       <require condition="CM33_DSP_NOFPU"/>
1161       <require Tcompiler="ARMCC"/>
1162     </condition>
1163     <condition id="CM33_NODSP_SP_ARMCC">
1164       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1165       <require condition="CM33_NODSP_SP"/>
1166       <require Tcompiler="ARMCC"/>
1167     </condition>
1168     <condition id="CM33_DSP_SP_ARMCC">
1169       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1170       <require condition="CM33_DSP_SP"/>
1171       <require Tcompiler="ARMCC"/>
1172     </condition>
1173     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1174       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1175       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1176       <require Dendian="Little-endian"/>
1177     </condition>
1178     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1179       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1180       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1181       <require Dendian="Little-endian"/>
1182     </condition>
1183     <condition id="CM33_NODSP_SP_LE_ARMCC">
1184       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1185       <require condition="CM33_NODSP_SP_ARMCC"/>
1186       <require Dendian="Little-endian"/>
1187     </condition>
1188     <condition id="CM33_DSP_SP_LE_ARMCC">
1189       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1190       <require condition="CM33_DSP_SP_ARMCC"/>
1191       <require Dendian="Little-endian"/>
1192     </condition>
1193
1194     <condition id="ARMv8MBL_ARMCC">
1195       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1196       <require condition="ARMv8MBL"/>
1197       <require Tcompiler="ARMCC"/>
1198     </condition>
1199     <condition id="ARMv8MBL_LE_ARMCC">
1200       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1201       <require condition="ARMv8MBL_ARMCC"/>
1202       <require Dendian="Little-endian"/>
1203     </condition>
1204     <condition id="ARMv8MBL_BE_ARMCC">
1205       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1206       <require condition="ARMv8MBL_ARMCC"/>
1207       <require Dendian="Big-endian"/>
1208     </condition>
1209
1210     <condition id="ARMv8MML_ARMCC">
1211       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1212       <require condition="ARMv8MML"/>
1213       <require Tcompiler="ARMCC"/>
1214     </condition>
1215     <condition id="ARMv8MML_LE_ARMCC">
1216       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1217       <require condition="ARMv8MML_ARMCC"/>
1218       <require Dendian="Little-endian"/>
1219     </condition>
1220     <condition id="ARMv8MML_BE_ARMCC">
1221       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1222       <require condition="ARMv8MML_ARMCC"/>
1223       <require Dendian="Big-endian"/>
1224     </condition>
1225
1226     <condition id="ARMv8MML_FP_ARMCC">
1227       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1228       <require condition="ARMv8MML_FP"/>
1229       <require Tcompiler="ARMCC"/>
1230     </condition>
1231     <condition id="ARMv8MML_FP_LE_ARMCC">
1232       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1233       <require condition="ARMv8MML_FP_ARMCC"/>
1234       <require Dendian="Little-endian"/>
1235     </condition>
1236     <condition id="ARMv8MML_FP_BE_ARMCC">
1237       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1238       <require condition="ARMv8MML_FP_ARMCC"/>
1239       <require Dendian="Big-endian"/>
1240     </condition>
1241
1242     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1243       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1244       <require condition="ARMv8MML_NODSP_NOFPU"/>
1245       <require Tcompiler="ARMCC"/>
1246     </condition>
1247     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1248       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1249       <require condition="ARMv8MML_DSP_NOFPU"/>
1250       <require Tcompiler="ARMCC"/>
1251     </condition>
1252     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1253       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1254       <require condition="ARMv8MML_NODSP_SP"/>
1255       <require Tcompiler="ARMCC"/>
1256     </condition>
1257     <condition id="ARMv8MML_DSP_SP_ARMCC">
1258       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1259       <require condition="ARMv8MML_DSP_SP"/>
1260       <require Tcompiler="ARMCC"/>
1261     </condition>
1262     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1263       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1264       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1265       <require Dendian="Little-endian"/>
1266     </condition>
1267     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1268       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1269       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1270       <require Dendian="Little-endian"/>
1271     </condition>
1272     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1273       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1274       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1275       <require Dendian="Little-endian"/>
1276     </condition>
1277     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1278       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1279       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1280       <require Dendian="Little-endian"/>
1281     </condition>
1282
1283     <!-- GCC compiler -->
1284     <condition id="CA_GCC">
1285       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1286       <require condition="ARMv7-A Device"/>
1287       <require Tcompiler="GCC"/>
1288     </condition>
1289
1290     <condition id="CM0_GCC">
1291       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1292       <require condition="CM0"/>
1293       <require Tcompiler="GCC"/>
1294     </condition>
1295     <condition id="CM0_LE_GCC">
1296       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1297       <require condition="CM0_GCC"/>
1298       <require Dendian="Little-endian"/>
1299     </condition>
1300     <condition id="CM0_BE_GCC">
1301       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1302       <require condition="CM0_GCC"/>
1303       <require Dendian="Big-endian"/>
1304     </condition>
1305
1306     <condition id="CM1_GCC">
1307       <description>Cortex-M1 based device for the GCC Compiler</description>
1308       <require condition="CM1"/>
1309       <require Tcompiler="GCC"/>
1310     </condition>
1311     <condition id="CM1_LE_GCC">
1312       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1313       <require condition="CM1_GCC"/>
1314       <require Dendian="Little-endian"/>
1315     </condition>
1316     <condition id="CM1_BE_GCC">
1317       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1318       <require condition="CM1_GCC"/>
1319       <require Dendian="Big-endian"/>
1320     </condition>
1321
1322     <condition id="CM3_GCC">
1323       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1324       <require condition="CM3"/>
1325       <require Tcompiler="GCC"/>
1326     </condition>
1327     <condition id="CM3_LE_GCC">
1328       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1329       <require condition="CM3_GCC"/>
1330       <require Dendian="Little-endian"/>
1331     </condition>
1332     <condition id="CM3_BE_GCC">
1333       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1334       <require condition="CM3_GCC"/>
1335       <require Dendian="Big-endian"/>
1336     </condition>
1337
1338     <condition id="CM4_GCC">
1339       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1340       <require condition="CM4"/>
1341       <require Tcompiler="GCC"/>
1342     </condition>
1343     <condition id="CM4_LE_GCC">
1344       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1345       <require condition="CM4_GCC"/>
1346       <require Dendian="Little-endian"/>
1347     </condition>
1348     <condition id="CM4_BE_GCC">
1349       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1350       <require condition="CM4_GCC"/>
1351       <require Dendian="Big-endian"/>
1352     </condition>
1353
1354     <condition id="CM4_FP_GCC">
1355       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1356       <require condition="CM4_FP"/>
1357       <require Tcompiler="GCC"/>
1358     </condition>
1359     <condition id="CM4_FP_LE_GCC">
1360       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1361       <require condition="CM4_FP_GCC"/>
1362       <require Dendian="Little-endian"/>
1363     </condition>
1364     <condition id="CM4_FP_BE_GCC">
1365       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1366       <require condition="CM4_FP_GCC"/>
1367       <require Dendian="Big-endian"/>
1368     </condition>
1369
1370     <condition id="CM7_GCC">
1371       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1372       <require condition="CM7"/>
1373       <require Tcompiler="GCC"/>
1374     </condition>
1375     <condition id="CM7_LE_GCC">
1376       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1377       <require condition="CM7_GCC"/>
1378       <require Dendian="Little-endian"/>
1379     </condition>
1380     <condition id="CM7_BE_GCC">
1381       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1382       <require condition="CM7_GCC"/>
1383       <require Dendian="Big-endian"/>
1384     </condition>
1385
1386     <condition id="CM7_FP_GCC">
1387       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1388       <require condition="CM7_FP"/>
1389       <require Tcompiler="GCC"/>
1390     </condition>
1391     <condition id="CM7_FP_LE_GCC">
1392       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1393       <require condition="CM7_FP_GCC"/>
1394       <require Dendian="Little-endian"/>
1395     </condition>
1396     <condition id="CM7_FP_BE_GCC">
1397       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1398       <require condition="CM7_FP_GCC"/>
1399       <require Dendian="Big-endian"/>
1400     </condition>
1401
1402     <condition id="CM7_SP_GCC">
1403       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1404       <require condition="CM7_SP"/>
1405       <require Tcompiler="GCC"/>
1406     </condition>
1407     <condition id="CM7_SP_LE_GCC">
1408       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1409       <require condition="CM7_SP_GCC"/>
1410       <require Dendian="Little-endian"/>
1411     </condition>
1412     <condition id="CM7_SP_BE_GCC">
1413       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1414       <require condition="CM7_SP_GCC"/>
1415       <require Dendian="Big-endian"/>
1416     </condition>
1417
1418     <condition id="CM7_DP_GCC">
1419       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1420       <require condition="CM7_DP"/>
1421       <require Tcompiler="GCC"/>
1422     </condition>
1423     <condition id="CM7_DP_LE_GCC">
1424       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1425       <require condition="CM7_DP_GCC"/>
1426       <require Dendian="Little-endian"/>
1427     </condition>
1428     <condition id="CM7_DP_BE_GCC">
1429       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1430       <require condition="CM7_DP_GCC"/>
1431       <require Dendian="Big-endian"/>
1432     </condition>
1433
1434     <condition id="CM23_GCC">
1435       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1436       <require condition="CM23"/>
1437       <require Tcompiler="GCC"/>
1438     </condition>
1439     <condition id="CM23_LE_GCC">
1440       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1441       <require condition="CM23_GCC"/>
1442       <require Dendian="Little-endian"/>
1443     </condition>
1444     <condition id="CM23_BE_GCC">
1445       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1446       <require condition="CM23_GCC"/>
1447       <require Dendian="Big-endian"/>
1448     </condition>
1449
1450     <condition id="CM33_GCC">
1451       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1452       <require condition="CM33"/>
1453       <require Tcompiler="GCC"/>
1454     </condition>
1455     <condition id="CM33_LE_GCC">
1456       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1457       <require condition="CM33_GCC"/>
1458       <require Dendian="Little-endian"/>
1459     </condition>
1460     <condition id="CM33_BE_GCC">
1461       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1462       <require condition="CM33_GCC"/>
1463       <require Dendian="Big-endian"/>
1464     </condition>
1465
1466     <condition id="CM33_FP_GCC">
1467       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1468       <require condition="CM33_FP"/>
1469       <require Tcompiler="GCC"/>
1470     </condition>
1471     <condition id="CM33_FP_LE_GCC">
1472       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1473       <require condition="CM33_FP_GCC"/>
1474       <require Dendian="Little-endian"/>
1475     </condition>
1476     <condition id="CM33_FP_BE_GCC">
1477       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1478       <require condition="CM33_FP_GCC"/>
1479       <require Dendian="Big-endian"/>
1480     </condition>
1481
1482     <condition id="CM33_NODSP_NOFPU_GCC">
1483       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1484       <require condition="CM33_NODSP_NOFPU"/>
1485       <require Tcompiler="GCC"/>
1486     </condition>
1487     <condition id="CM33_DSP_NOFPU_GCC">
1488       <description>CM33, DSP, no FPU, GCC Compiler</description>
1489       <require condition="CM33_DSP_NOFPU"/>
1490       <require Tcompiler="GCC"/>
1491     </condition>
1492     <condition id="CM33_NODSP_SP_GCC">
1493       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1494       <require condition="CM33_NODSP_SP"/>
1495       <require Tcompiler="GCC"/>
1496     </condition>
1497     <condition id="CM33_DSP_SP_GCC">
1498       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1499       <require condition="CM33_DSP_SP"/>
1500       <require Tcompiler="GCC"/>
1501     </condition>
1502     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1503       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1504       <require condition="CM33_NODSP_NOFPU_GCC"/>
1505       <require Dendian="Little-endian"/>
1506     </condition>
1507     <condition id="CM33_DSP_NOFPU_LE_GCC">
1508       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1509       <require condition="CM33_DSP_NOFPU_GCC"/>
1510       <require Dendian="Little-endian"/>
1511     </condition>
1512     <condition id="CM33_NODSP_SP_LE_GCC">
1513       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1514       <require condition="CM33_NODSP_SP_GCC"/>
1515       <require Dendian="Little-endian"/>
1516     </condition>
1517     <condition id="CM33_DSP_SP_LE_GCC">
1518       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1519       <require condition="CM33_DSP_SP_GCC"/>
1520       <require Dendian="Little-endian"/>
1521     </condition>
1522
1523     <condition id="ARMv8MBL_GCC">
1524       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1525       <require condition="ARMv8MBL"/>
1526       <require Tcompiler="GCC"/>
1527     </condition>
1528     <condition id="ARMv8MBL_LE_GCC">
1529       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1530       <require condition="ARMv8MBL_GCC"/>
1531       <require Dendian="Little-endian"/>
1532     </condition>
1533     <condition id="ARMv8MBL_BE_GCC">
1534       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1535       <require condition="ARMv8MBL_GCC"/>
1536       <require Dendian="Big-endian"/>
1537     </condition>
1538
1539     <condition id="ARMv8MML_GCC">
1540       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1541       <require condition="ARMv8MML"/>
1542       <require Tcompiler="GCC"/>
1543     </condition>
1544     <condition id="ARMv8MML_LE_GCC">
1545       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1546       <require condition="ARMv8MML_GCC"/>
1547       <require Dendian="Little-endian"/>
1548     </condition>
1549     <condition id="ARMv8MML_BE_GCC">
1550       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1551       <require condition="ARMv8MML_GCC"/>
1552       <require Dendian="Big-endian"/>
1553     </condition>
1554
1555     <condition id="ARMv8MML_FP_GCC">
1556       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1557       <require condition="ARMv8MML_FP"/>
1558       <require Tcompiler="GCC"/>
1559     </condition>
1560     <condition id="ARMv8MML_FP_LE_GCC">
1561       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1562       <require condition="ARMv8MML_FP_GCC"/>
1563       <require Dendian="Little-endian"/>
1564     </condition>
1565     <condition id="ARMv8MML_FP_BE_GCC">
1566       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1567       <require condition="ARMv8MML_FP_GCC"/>
1568       <require Dendian="Big-endian"/>
1569     </condition>
1570
1571     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1572       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1573       <require condition="ARMv8MML_NODSP_NOFPU"/>
1574       <require Tcompiler="GCC"/>
1575     </condition>
1576     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1577       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1578       <require condition="ARMv8MML_DSP_NOFPU"/>
1579       <require Tcompiler="GCC"/>
1580     </condition>
1581     <condition id="ARMv8MML_NODSP_SP_GCC">
1582       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1583       <require condition="ARMv8MML_NODSP_SP"/>
1584       <require Tcompiler="GCC"/>
1585     </condition>
1586     <condition id="ARMv8MML_DSP_SP_GCC">
1587       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1588       <require condition="ARMv8MML_DSP_SP"/>
1589       <require Tcompiler="GCC"/>
1590     </condition>
1591     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1592       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1593       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1594       <require Dendian="Little-endian"/>
1595     </condition>
1596     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1597       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1598       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1599       <require Dendian="Little-endian"/>
1600     </condition>
1601     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1602       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1603       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1604       <require Dendian="Little-endian"/>
1605     </condition>
1606     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1607       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1608       <require condition="ARMv8MML_DSP_SP_GCC"/>
1609       <require Dendian="Little-endian"/>
1610     </condition>
1611
1612     <!-- IAR compiler -->
1613     <condition id="CA_IAR">
1614       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1615       <require condition="ARMv7-A Device"/>
1616       <require Tcompiler="IAR"/>
1617     </condition>
1618
1619     <condition id="CM0_IAR">
1620       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1621       <require condition="CM0"/>
1622       <require Tcompiler="IAR"/>
1623     </condition>
1624     <condition id="CM0_LE_IAR">
1625       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1626       <require condition="CM0_IAR"/>
1627       <require Dendian="Little-endian"/>
1628     </condition>
1629     <condition id="CM0_BE_IAR">
1630       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1631       <require condition="CM0_IAR"/>
1632       <require Dendian="Big-endian"/>
1633     </condition>
1634
1635     <condition id="CM1_IAR">
1636       <description>Cortex-M1 based device for the IAR Compiler</description>
1637       <require condition="CM1"/>
1638       <require Tcompiler="IAR"/>
1639     </condition>
1640     <condition id="CM1_LE_IAR">
1641       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1642       <require condition="CM1_IAR"/>
1643       <require Dendian="Little-endian"/>
1644     </condition>
1645     <condition id="CM1_BE_IAR">
1646       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1647       <require condition="CM1_IAR"/>
1648       <require Dendian="Big-endian"/>
1649     </condition>
1650
1651     <condition id="CM3_IAR">
1652       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1653       <require condition="CM3"/>
1654       <require Tcompiler="IAR"/>
1655     </condition>
1656     <condition id="CM3_LE_IAR">
1657       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1658       <require condition="CM3_IAR"/>
1659       <require Dendian="Little-endian"/>
1660     </condition>
1661     <condition id="CM3_BE_IAR">
1662       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1663       <require condition="CM3_IAR"/>
1664       <require Dendian="Big-endian"/>
1665     </condition>
1666
1667     <condition id="CM4_IAR">
1668       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1669       <require condition="CM4"/>
1670       <require Tcompiler="IAR"/>
1671     </condition>
1672     <condition id="CM4_LE_IAR">
1673       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1674       <require condition="CM4_IAR"/>
1675       <require Dendian="Little-endian"/>
1676     </condition>
1677     <condition id="CM4_BE_IAR">
1678       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1679       <require condition="CM4_IAR"/>
1680       <require Dendian="Big-endian"/>
1681     </condition>
1682
1683     <condition id="CM4_FP_IAR">
1684       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1685       <require condition="CM4_FP"/>
1686       <require Tcompiler="IAR"/>
1687     </condition>
1688     <condition id="CM4_FP_LE_IAR">
1689       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1690       <require condition="CM4_FP_IAR"/>
1691       <require Dendian="Little-endian"/>
1692     </condition>
1693     <condition id="CM4_FP_BE_IAR">
1694       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1695       <require condition="CM4_FP_IAR"/>
1696       <require Dendian="Big-endian"/>
1697     </condition>
1698
1699     <condition id="CM7_IAR">
1700       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1701       <require condition="CM7"/>
1702       <require Tcompiler="IAR"/>
1703     </condition>
1704     <condition id="CM7_LE_IAR">
1705       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1706       <require condition="CM7_IAR"/>
1707       <require Dendian="Little-endian"/>
1708     </condition>
1709     <condition id="CM7_BE_IAR">
1710       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1711       <require condition="CM7_IAR"/>
1712       <require Dendian="Big-endian"/>
1713     </condition>
1714
1715     <condition id="CM7_FP_IAR">
1716       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1717       <require condition="CM7_FP"/>
1718       <require Tcompiler="IAR"/>
1719     </condition>
1720     <condition id="CM7_FP_LE_IAR">
1721       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1722       <require condition="CM7_FP_IAR"/>
1723       <require Dendian="Little-endian"/>
1724     </condition>
1725     <condition id="CM7_FP_BE_IAR">
1726       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1727       <require condition="CM7_FP_IAR"/>
1728       <require Dendian="Big-endian"/>
1729     </condition>
1730
1731     <condition id="CM7_SP_IAR">
1732       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1733       <require condition="CM7_SP"/>
1734       <require Tcompiler="IAR"/>
1735     </condition>
1736     <condition id="CM7_SP_LE_IAR">
1737       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1738       <require condition="CM7_SP_IAR"/>
1739       <require Dendian="Little-endian"/>
1740     </condition>
1741     <condition id="CM7_SP_BE_IAR">
1742       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1743       <require condition="CM7_SP_IAR"/>
1744       <require Dendian="Big-endian"/>
1745     </condition>
1746
1747     <condition id="CM7_DP_IAR">
1748       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1749       <require condition="CM7_DP"/>
1750       <require Tcompiler="IAR"/>
1751     </condition>
1752     <condition id="CM7_DP_LE_IAR">
1753       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1754       <require condition="CM7_DP_IAR"/>
1755       <require Dendian="Little-endian"/>
1756     </condition>
1757     <condition id="CM7_DP_BE_IAR">
1758       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1759       <require condition="CM7_DP_IAR"/>
1760       <require Dendian="Big-endian"/>
1761     </condition>
1762
1763     <condition id="CM23_IAR">
1764       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1765       <require condition="CM23"/>
1766       <require Tcompiler="IAR"/>
1767     </condition>
1768     <condition id="CM23_LE_IAR">
1769       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1770       <require condition="CM23_IAR"/>
1771       <require Dendian="Little-endian"/>
1772     </condition>
1773     <condition id="CM23_BE_IAR">
1774       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
1775       <require condition="CM23_IAR"/>
1776       <require Dendian="Big-endian"/>
1777     </condition>
1778
1779     <condition id="CM33_IAR">
1780       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1781       <require condition="CM33"/>
1782       <require Tcompiler="IAR"/>
1783     </condition>
1784     <condition id="CM33_LE_IAR">
1785       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1786       <require condition="CM33_IAR"/>
1787       <require Dendian="Little-endian"/>
1788     </condition>
1789     <condition id="CM33_BE_IAR">
1790       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
1791       <require condition="CM33_IAR"/>
1792       <require Dendian="Big-endian"/>
1793     </condition>
1794
1795     <condition id="CM33_FP_IAR">
1796       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1797       <require condition="CM33_FP"/>
1798       <require Tcompiler="IAR"/>
1799     </condition>
1800     <condition id="CM33_FP_LE_IAR">
1801       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1802       <require condition="CM33_FP_IAR"/>
1803       <require Dendian="Little-endian"/>
1804     </condition>
1805     <condition id="CM33_FP_BE_IAR">
1806       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1807       <require condition="CM33_FP_IAR"/>
1808       <require Dendian="Big-endian"/>
1809     </condition>
1810
1811     <condition id="CM33_NODSP_NOFPU_IAR">
1812       <description>CM33, no DSP, no FPU, IAR Compiler</description>
1813       <require condition="CM33_NODSP_NOFPU"/>
1814       <require Tcompiler="IAR"/>
1815     </condition>
1816     <condition id="CM33_DSP_NOFPU_IAR">
1817       <description>CM33, DSP, no FPU, IAR Compiler</description>
1818       <require condition="CM33_DSP_NOFPU"/>
1819       <require Tcompiler="IAR"/>
1820     </condition>
1821     <condition id="CM33_NODSP_SP_IAR">
1822       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
1823       <require condition="CM33_NODSP_SP"/>
1824       <require Tcompiler="IAR"/>
1825     </condition>
1826     <condition id="CM33_DSP_SP_IAR">
1827       <description>CM33, DSP, SP FPU, IAR Compiler</description>
1828       <require condition="CM33_DSP_SP"/>
1829       <require Tcompiler="IAR"/>
1830     </condition>
1831     <condition id="CM33_NODSP_NOFPU_LE_IAR">
1832       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
1833       <require condition="CM33_NODSP_NOFPU_IAR"/>
1834       <require Dendian="Little-endian"/>
1835     </condition>
1836     <condition id="CM33_DSP_NOFPU_LE_IAR">
1837       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
1838       <require condition="CM33_DSP_NOFPU_IAR"/>
1839       <require Dendian="Little-endian"/>
1840     </condition>
1841     <condition id="CM33_NODSP_SP_LE_IAR">
1842       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
1843       <require condition="CM33_NODSP_SP_IAR"/>
1844       <require Dendian="Little-endian"/>
1845     </condition>
1846     <condition id="CM33_DSP_SP_LE_IAR">
1847       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
1848       <require condition="CM33_DSP_SP_IAR"/>
1849       <require Dendian="Little-endian"/>
1850     </condition>
1851
1852     <condition id="ARMv8MBL_IAR">
1853       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1854       <require condition="ARMv8MBL"/>
1855       <require Tcompiler="IAR"/>
1856     </condition>
1857     <condition id="ARMv8MBL_LE_IAR">
1858       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1859       <require condition="ARMv8MBL_IAR"/>
1860       <require Dendian="Little-endian"/>
1861     </condition>
1862     <condition id="ARMv8MBL_BE_IAR">
1863       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
1864       <require condition="ARMv8MBL_IAR"/>
1865       <require Dendian="Big-endian"/>
1866     </condition>
1867
1868     <condition id="ARMv8MML_IAR">
1869       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1870       <require condition="ARMv8MML"/>
1871       <require Tcompiler="IAR"/>
1872     </condition>
1873     <condition id="ARMv8MML_LE_IAR">
1874       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1875       <require condition="ARMv8MML_IAR"/>
1876       <require Dendian="Little-endian"/>
1877     </condition>
1878     <condition id="ARMv8MML_BE_IAR">
1879       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
1880       <require condition="ARMv8MML_IAR"/>
1881       <require Dendian="Big-endian"/>
1882     </condition>
1883
1884     <condition id="ARMv8MML_FP_IAR">
1885       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1886       <require condition="ARMv8MML_FP"/>
1887       <require Tcompiler="IAR"/>
1888     </condition>
1889     <condition id="ARMv8MML_FP_LE_IAR">
1890       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1891       <require condition="ARMv8MML_FP_IAR"/>
1892       <require Dendian="Little-endian"/>
1893     </condition>
1894     <condition id="ARMv8MML_FP_BE_IAR">
1895       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1896       <require condition="ARMv8MML_FP_IAR"/>
1897       <require Dendian="Big-endian"/>
1898     </condition>
1899
1900     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
1901       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
1902       <require condition="ARMv8MML_NODSP_NOFPU"/>
1903       <require Tcompiler="IAR"/>
1904     </condition>
1905     <condition id="ARMv8MML_DSP_NOFPU_IAR">
1906       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
1907       <require condition="ARMv8MML_DSP_NOFPU"/>
1908       <require Tcompiler="IAR"/>
1909     </condition>
1910     <condition id="ARMv8MML_NODSP_SP_IAR">
1911       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
1912       <require condition="ARMv8MML_NODSP_SP"/>
1913       <require Tcompiler="IAR"/>
1914     </condition>
1915     <condition id="ARMv8MML_DSP_SP_IAR">
1916       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
1917       <require condition="ARMv8MML_DSP_SP"/>
1918       <require Tcompiler="IAR"/>
1919     </condition>
1920     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
1921       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
1922       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
1923       <require Dendian="Little-endian"/>
1924     </condition>
1925     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
1926       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
1927       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
1928       <require Dendian="Little-endian"/>
1929     </condition>
1930     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
1931       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
1932       <require condition="ARMv8MML_NODSP_SP_IAR"/>
1933       <require Dendian="Little-endian"/>
1934     </condition>
1935     <condition id="ARMv8MML_DSP_SP_LE_IAR">
1936       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
1937       <require condition="ARMv8MML_DSP_SP_IAR"/>
1938       <require Dendian="Little-endian"/>
1939     </condition>
1940
1941     <!-- conditions selecting single devices and CMSIS Core -->
1942     <!-- used for component startup, GCC version is used for C-Startup -->
1943     <condition id="ARMCM0 CMSIS">
1944       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
1945       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1946       <require Cclass="CMSIS" Cgroup="CORE"/>
1947     </condition>
1948     <condition id="ARMCM0 CMSIS GCC">
1949       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1950       <require condition="ARMCM0 CMSIS"/>
1951       <require condition="GCC"/>
1952     </condition>
1953
1954     <condition id="ARMCM0+ CMSIS">
1955       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
1956       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1957       <require Cclass="CMSIS" Cgroup="CORE"/>
1958     </condition>
1959     <condition id="ARMCM0+ CMSIS GCC">
1960       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1961       <require condition="ARMCM0+ CMSIS"/>
1962       <require condition="GCC"/>
1963     </condition>
1964
1965     <condition id="ARMCM1 CMSIS">
1966       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
1967       <require Dvendor="ARM:82" Dname="ARMCM1"/>
1968       <require Cclass="CMSIS" Cgroup="CORE"/>
1969     </condition>
1970     <condition id="ARMCM1 CMSIS GCC">
1971       <description>Generic ARM Cortex-M1 device startup and depends on CMSIS Core requiring GCC</description>
1972       <require condition="ARMCM1 CMSIS"/>
1973       <require condition="GCC"/>
1974     </condition>
1975
1976     <condition id="ARMCM3 CMSIS">
1977       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
1978       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1979       <require Cclass="CMSIS" Cgroup="CORE"/>
1980     </condition>
1981     <condition id="ARMCM3 CMSIS GCC">
1982       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1983       <require condition="ARMCM3 CMSIS"/>
1984       <require condition="GCC"/>
1985     </condition>
1986
1987     <condition id="ARMCM4 CMSIS">
1988       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
1989       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1990       <require Cclass="CMSIS" Cgroup="CORE"/>
1991     </condition>
1992     <condition id="ARMCM4 CMSIS GCC">
1993       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1994       <require condition="ARMCM4 CMSIS"/>
1995       <require condition="GCC"/>
1996     </condition>
1997
1998     <condition id="ARMCM7 CMSIS">
1999       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2000       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2001       <require Cclass="CMSIS" Cgroup="CORE"/>
2002     </condition>
2003     <condition id="ARMCM7 CMSIS GCC">
2004       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
2005       <require condition="ARMCM7 CMSIS"/>
2006       <require condition="GCC"/>
2007     </condition>
2008
2009     <condition id="ARMCM23 CMSIS">
2010       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2011       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2012       <require Cclass="CMSIS" Cgroup="CORE"/>
2013     </condition>
2014     <condition id="ARMCM23 CMSIS GCC">
2015       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
2016       <require condition="ARMCM23 CMSIS"/>
2017       <require condition="GCC"/>
2018     </condition>
2019
2020     <condition id="ARMCM33 CMSIS">
2021       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2022       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2023       <require Cclass="CMSIS" Cgroup="CORE"/>
2024     </condition>
2025     <condition id="ARMCM33 CMSIS GCC">
2026       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
2027       <require condition="ARMCM33 CMSIS"/>
2028       <require condition="GCC"/>
2029     </condition>
2030
2031     <condition id="ARMSC000 CMSIS">
2032       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2033       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2034       <require Cclass="CMSIS" Cgroup="CORE"/>
2035     </condition>
2036     <condition id="ARMSC000 CMSIS GCC">
2037       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
2038       <require condition="ARMSC000 CMSIS"/>
2039       <require condition="GCC"/>
2040     </condition>
2041
2042     <condition id="ARMSC300 CMSIS">
2043       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2044       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2045       <require Cclass="CMSIS" Cgroup="CORE"/>
2046     </condition>
2047     <condition id="ARMSC300 CMSIS GCC">
2048       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
2049       <require condition="ARMSC300 CMSIS"/>
2050       <require condition="GCC"/>
2051     </condition>
2052
2053     <condition id="ARMv8MBL CMSIS">
2054       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2055       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2056       <require Cclass="CMSIS" Cgroup="CORE"/>
2057     </condition>
2058     <condition id="ARMv8MBL CMSIS GCC">
2059       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
2060       <require condition="ARMv8MBL CMSIS"/>
2061       <require condition="GCC"/>
2062     </condition>
2063
2064     <condition id="ARMv8MML CMSIS">
2065       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2066       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2067       <require Cclass="CMSIS" Cgroup="CORE"/>
2068     </condition>
2069     <condition id="ARMv8MML CMSIS GCC">
2070       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2071       <require condition="ARMv8MML CMSIS"/>
2072       <require condition="GCC"/>
2073     </condition>
2074
2075     <condition id="ARMCA5 CMSIS">
2076       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2077       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2078       <require Cclass="CMSIS" Cgroup="CORE"/>
2079     </condition>
2080
2081     <condition id="ARMCA7 CMSIS">
2082       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2083       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2084       <require Cclass="CMSIS" Cgroup="CORE"/>
2085     </condition>
2086
2087     <condition id="ARMCA9 CMSIS">
2088       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2089       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2090       <require Cclass="CMSIS" Cgroup="CORE"/>
2091     </condition>
2092
2093     <!-- CMSIS DSP -->
2094     <condition id="CMSIS DSP">
2095       <description>Components required for DSP</description>
2096       <require condition="ARMv6_7_8-M Device"/>
2097       <require condition="ARMCC GCC IAR"/>
2098       <require Cclass="CMSIS" Cgroup="CORE"/>
2099     </condition>
2100
2101     <!-- CMSIS NN -->
2102     <condition id="CMSIS NN">
2103       <description>Components required for NN</description>
2104       <require condition="CMSIS DSP"/>
2105     </condition>
2106
2107     <!-- RTOS RTX -->
2108     <condition id="RTOS RTX">
2109       <description>Components required for RTOS RTX</description>
2110       <require condition="ARMv6_7-M Device"/>
2111       <require condition="ARMCC GCC IAR"/>
2112       <require Cclass="Device" Cgroup="Startup"/>
2113       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2114     </condition>
2115     <condition id="RTOS RTX IFX">
2116       <description>Components required for RTOS RTX IFX</description>
2117       <require condition="ARMv6_7-M Device"/>
2118       <require condition="ARMCC GCC IAR"/>
2119       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2120       <require Cclass="Device" Cgroup="Startup"/>
2121       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2122     </condition>
2123     <condition id="RTOS RTX5">
2124       <description>Components required for RTOS RTX5</description>
2125       <require condition="ARMv6_7_8-M Device"/>
2126       <require condition="ARMCC GCC IAR"/>
2127       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2128     </condition>
2129     <condition id="RTOS2 RTX5">
2130       <description>Components required for RTOS2 RTX5</description>
2131       <require condition="ARMv6_7_8-M Device"/>
2132       <require condition="ARMCC GCC IAR"/>
2133       <require Cclass="CMSIS"  Cgroup="CORE"/>
2134       <require Cclass="Device" Cgroup="Startup"/>
2135     </condition>
2136     <condition id="RTOS2 RTX5 v7-A">
2137       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2138       <require condition="ARMv7-A Device"/>
2139       <require condition="ARMCC GCC IAR"/>
2140       <require Cclass="CMSIS"  Cgroup="CORE"/>
2141       <require Cclass="Device" Cgroup="Startup"/>
2142       <require Cclass="Device" Cgroup="OS Tick"/>
2143       <require Cclass="Device" Cgroup="IRQ Controller"/>
2144     </condition>
2145     <condition id="RTOS2 RTX5 Lib">
2146       <description>Components required for RTOS2 RTX5 Library</description>
2147       <require condition="ARMv6_7_8-M Device"/>
2148       <require condition="ARMCC GCC IAR"/>
2149       <require Cclass="CMSIS"  Cgroup="CORE"/>
2150       <require Cclass="Device" Cgroup="Startup"/>
2151     </condition>
2152     <condition id="RTOS2 RTX5 NS">
2153       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2154       <require condition="ARMv8-M TZ Device"/>
2155       <require condition="ARMCC GCC IAR"/>
2156       <require Cclass="CMSIS"  Cgroup="CORE"/>
2157       <require Cclass="Device" Cgroup="Startup"/>
2158     </condition>
2159
2160     <!-- OS Tick -->
2161     <condition id="OS Tick PTIM">
2162       <description>Components required for OS Tick Private Timer</description>
2163       <require condition="CA5_CA9"/>
2164       <require Cclass="Device" Cgroup="IRQ Controller"/>
2165     </condition>
2166
2167     <condition id="OS Tick GTIM">
2168       <description>Components required for OS Tick Generic Physical Timer</description>
2169       <require condition="CA7"/>
2170       <require Cclass="Device" Cgroup="IRQ Controller"/>
2171     </condition>
2172
2173   </conditions>
2174
2175   <components>
2176     <!-- CMSIS-Core component -->
2177     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.1.2"  condition="ARMv6_7_8-M Device" >
2178       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
2179       <files>
2180         <!-- CPU independent -->
2181         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2182         <file category="include" name="CMSIS/Core/Include/"/>
2183         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2184         <!-- Code template -->
2185         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
2186         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2187       </files>
2188     </component>
2189
2190     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.2"  condition="ARMv7-A Device" >
2191       <description>CMSIS-CORE for Cortex-A</description>
2192       <files>
2193         <!-- CPU independent -->
2194         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2195         <file category="include" name="CMSIS/Core_A/Include/"/>
2196       </files>
2197     </component>
2198
2199     <!-- CMSIS-Startup components -->
2200     <!-- Cortex-M0 -->
2201     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
2202       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2203       <files>
2204         <!-- include folder / device header file -->
2205         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2206         <!-- startup / system file -->
2207         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2208         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
2209         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2210         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2211         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2212       </files>
2213     </component>
2214     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
2215       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2216       <files>
2217         <!-- include folder / device header file -->
2218         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2219         <!-- startup / system file -->
2220         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
2221         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2222         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2223       </files>
2224     </component>
2225
2226     <!-- Cortex-M0+ -->
2227     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
2228       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2229       <files>
2230         <!-- include folder / device header file -->
2231         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2232         <!-- startup / system file -->
2233         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2234         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
2235         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2236         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2237         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2238       </files>
2239     </component>
2240     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
2241       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2242       <files>
2243         <!-- include folder / device header file -->
2244         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2245         <!-- startup / system file -->
2246         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
2247         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2248         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2249       </files>
2250     </component>
2251
2252     <!-- Cortex-M1 -->
2253     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM1 CMSIS">
2254       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2255       <files>
2256         <!-- include folder / device header file -->
2257         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2258         <!-- startup / system file -->
2259         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.0" attr="config" condition="ARMCC"/>
2260         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="1.0.0" attr="config" condition="GCC"/>
2261         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2262         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2263         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2264       </files>
2265     </component>
2266     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM1 CMSIS GCC">
2267       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2268       <files>
2269         <!-- include folder / device header file -->
2270         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2271         <!-- startup / system file -->
2272         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.c" version="1.0.0" attr="config" condition="GCC"/>
2273         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2274         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2275       </files>
2276     </component>
2277
2278     <!-- Cortex-M3 -->
2279     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
2280       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2281       <files>
2282         <!-- include folder / device header file -->
2283         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2284         <!-- startup / system file -->
2285         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2286         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
2287         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2288         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2289         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2290       </files>
2291     </component>
2292     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
2293       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2294       <files>
2295         <!-- include folder / device header file -->
2296         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2297         <!-- startup / system file -->
2298         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
2299         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2300         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2301       </files>
2302     </component>
2303
2304     <!-- Cortex-M4 -->
2305     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
2306       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2307       <files>
2308         <!-- include folder / device header file -->
2309         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2310         <!-- startup / system file -->
2311         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2312         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2313         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2314         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2315         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2316       </files>
2317     </component>
2318     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2319       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2320       <files>
2321         <!-- include folder / device header file -->
2322         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2323         <!-- startup / system file -->
2324         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2325         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2326         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2327       </files>
2328     </component>
2329
2330     <!-- Cortex-M7 -->
2331     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2332       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2333       <files>
2334         <!-- include folder / device header file -->
2335         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2336         <!-- startup / system file -->
2337         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2338         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2339         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2340         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2341         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2342       </files>
2343     </component>
2344     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2345       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2346       <files>
2347         <!-- include folder / device header file -->
2348         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2349         <!-- startup / system file -->
2350         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2351         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2352         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2353       </files>
2354     </component>
2355
2356     <!-- Cortex-M23 -->
2357     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2358       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2359       <files>
2360         <!-- include folder / device header file -->
2361         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2362         <!-- startup / system file -->
2363         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2364         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2365         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2366         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2367         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2368         <!-- SAU configuration -->
2369         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2370       </files>
2371     </component>
2372     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2373       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2374       <files>
2375         <!-- include folder / device header file -->
2376         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2377         <!-- startup / system file -->
2378         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2379         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2380         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2381         <!-- SAU configuration -->
2382         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2383       </files>
2384     </component>
2385
2386     <!-- Cortex-M33 -->
2387     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2388       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2389       <files>
2390         <!-- include folder / device header file -->
2391         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2392         <!-- startup / system file -->
2393         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2394         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2395         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2396         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2397         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2398         <!-- SAU configuration -->
2399         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2400       </files>
2401     </component>
2402     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2403       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2404       <files>
2405         <!-- include folder / device header file -->
2406         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2407         <!-- startup / system file -->
2408         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2409         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2410         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2411         <!-- SAU configuration -->
2412         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2413       </files>
2414     </component>
2415
2416     <!-- Cortex-SC000 -->
2417     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2418       <description>System and Startup for Generic Arm SC000 device</description>
2419       <files>
2420         <!-- include folder / device header file -->
2421         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2422         <!-- startup / system file -->
2423         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2424         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2425         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2426         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2427         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2428       </files>
2429     </component>
2430     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2431       <description>System and Startup for Generic Arm SC000 device</description>
2432       <files>
2433         <!-- include folder / device header file -->
2434         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2435         <!-- startup / system file -->
2436         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2437         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2438         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2439       </files>
2440     </component>
2441
2442     <!-- Cortex-SC300 -->
2443     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2444       <description>System and Startup for Generic Arm SC300 device</description>
2445       <files>
2446         <!-- include folder / device header file -->
2447         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2448         <!-- startup / system file -->
2449         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2450         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2451         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2452         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2453         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2454       </files>
2455     </component>
2456     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2457       <description>System and Startup for Generic Arm SC300 device</description>
2458       <files>
2459         <!-- include folder / device header file -->
2460         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2461         <!-- startup / system file -->
2462         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2463         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2464         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2465       </files>
2466     </component>
2467
2468     <!-- ARMv8MBL -->
2469     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2470       <description>System and Startup for Generic Armv8-M Baseline device</description>
2471       <files>
2472         <!-- include folder / device header file -->
2473         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2474         <!-- startup / system file -->
2475         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2476         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2477         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2478         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2479         <!-- SAU configuration -->
2480         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2481       </files>
2482     </component>
2483     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2484       <description>System and Startup for Generic Armv8-M Baseline device</description>
2485       <files>
2486         <!-- include folder / device header file -->
2487         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2488         <!-- startup / system file -->
2489         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2490         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2491         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2492         <!-- SAU configuration -->
2493         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2494       </files>
2495     </component>
2496
2497     <!-- ARMv8MML -->
2498     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2499       <description>System and Startup for Generic Armv8-M Mainline device</description>
2500       <files>
2501         <!-- include folder / device header file -->
2502         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2503         <!-- startup / system file -->
2504         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2505         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2506         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2507         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2508         <!-- SAU configuration -->
2509         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2510       </files>
2511     </component>
2512     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2513       <description>System and Startup for Generic Armv8-M Mainline device</description>
2514       <files>
2515         <!-- include folder / device header file -->
2516         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2517         <!-- startup / system file -->
2518         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2519         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2520         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2521         <!-- SAU configuration -->
2522         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2523       </files>
2524     </component>
2525
2526     <!-- Cortex-A5 -->
2527     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2528       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2529       <files>
2530         <!-- include folder / device header file -->
2531         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2532         <!-- startup / system / mmu files -->
2533         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2534         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2535         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2536         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2537         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2538         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2539         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2540         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2541         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2542         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2543         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2544         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2545
2546       </files>
2547     </component>
2548
2549     <!-- Cortex-A7 -->
2550     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2551       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2552       <files>
2553         <!-- include folder / device header file -->
2554         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2555         <!-- startup / system / mmu files -->
2556         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2557         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2558         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2559         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2560         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2561         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2562         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2563         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2564         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2565         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2566         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2567         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2568       </files>
2569     </component>
2570
2571     <!-- Cortex-A9 -->
2572     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2573       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2574       <files>
2575         <!-- include folder / device header file -->
2576         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2577         <!-- startup / system / mmu files -->
2578         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2579         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2580         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2581         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2582         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2583         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2584         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2585         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2586         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2587         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2588         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2589         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2590       </files>
2591     </component>
2592
2593     <!-- IRQ Controller -->
2594     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2595       <description>IRQ Controller implementation using GIC</description>
2596       <files>
2597         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2598       </files>
2599     </component>
2600
2601     <!-- OS Tick -->
2602     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2603       <description>OS Tick implementation using Private Timer</description>
2604       <files>
2605         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2606       </files>
2607     </component>
2608
2609     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2610       <description>OS Tick implementation using Generic Physical Timer</description>
2611       <files>
2612         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2613       </files>
2614     </component>
2615
2616     <!-- CMSIS-DSP component -->
2617     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2618       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2619       <files>
2620         <!-- CPU independent -->
2621         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2622         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
2623
2624         <!-- CPU and Compiler dependent -->
2625         <!-- ARMCC -->
2626         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2627         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2628         <file category="library" condition="CM1_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2629         <file category="library" condition="CM1_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2630         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2631         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2632         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2633         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2634         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2635         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2636         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2637         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2638         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2639         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2640         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2641         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2642
2643         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2644         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2645         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2646         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2647         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2648         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2649         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2650         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2651         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2652         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2653         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
2654         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
2655
2656         <!-- GCC -->
2657         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2658         <file category="library" condition="CM1_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2659         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2660         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2661         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
2662         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2663         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2664         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2665
2666         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2667         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2668         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2669         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2670         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2671         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2672         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2673         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2674         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2675         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2676         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
2677         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
2678
2679         <!-- IAR -->
2680         <file category="library" condition="CM0_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2681         <file category="library" condition="CM0_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2682         <file category="library" condition="CM1_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2683         <file category="library" condition="CM1_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2684         <file category="library" condition="CM3_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2685         <file category="library" condition="CM3_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2686         <file category="library" condition="CM4_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2687         <file category="library" condition="CM4_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2688         <file category="library" condition="CM4_FP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2689         <file category="library" condition="CM4_FP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2690         <file category="library" condition="CM7_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2691         <file category="library" condition="CM7_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2692         <file category="library" condition="CM7_DP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2693         <file category="library" condition="CM7_DP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2694         <file category="library" condition="CM7_SP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
2695         <file category="library" condition="CM7_SP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
2696
2697         <file category="library" condition="CM23_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2698         <file category="library" condition="CM33_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2699         <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2700         <file category="library" condition="CM33_FP_LE_IAR"           name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2701         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"    name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
2702         <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
2703         <!--file category="library" condition="CM33_DSP_DP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
2704         <file category="library" condition="ARMv8MBL_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2705         <file category="library" condition="ARMv8MML_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2706         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2707         <file category="library" condition="ARMv8MML_FP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2708         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
2709         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
2710         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
2711
2712       </files>
2713     </component>
2714
2715     <!-- CMSIS-NN component -->
2716     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.1.0" condition="CMSIS NN">
2717       <description>CMSIS-NN Neural Network Library</description>
2718       <files>
2719         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2720         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2721
2722         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2723         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2724         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2725         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2726
2727         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2728         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2729         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2730         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2731         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2732         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2733         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2734         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2735         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2736         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
2737         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2738         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2739
2740         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2741         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2742         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2743         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2744         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2745         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2746
2747         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2748         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2749         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2750         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
2751         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
2752
2753         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2754
2755         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2756         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2757       </files>
2758     </component>
2759
2760     <!-- CMSIS-RTOS Keil RTX component -->
2761     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2762       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2763       <RTE_Components_h>
2764         <!-- the following content goes into file 'RTE_Components.h' -->
2765         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2766         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2767       </RTE_Components_h>
2768       <files>
2769         <!-- CPU independent -->
2770         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2771         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2772         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2773
2774         <!-- RTX templates -->
2775         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2776         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2777         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2778         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2779         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2780         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2781         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2782         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2783         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2784         <!-- tool-chain specific template file -->
2785         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2786         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2787         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2788
2789         <!-- CPU and Compiler dependent -->
2790         <!-- ARMCC -->
2791         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2792         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2793         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2794         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2795         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2796         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2797         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2798         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2799         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2800         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2801         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2802         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2803         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2804         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2805         <!-- GCC -->
2806         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2807         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2808         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2809         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2810         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2811         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2812         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2813         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2814         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2815         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2816         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2817         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2818         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2819         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2820         <!-- IAR -->
2821         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2822         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2823         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2824         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2825         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2826         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2827         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2828         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2829         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2830         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2831         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2832         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2833         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2834         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2835       </files>
2836     </component>
2837     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2838     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2839       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2840       <RTE_Components_h>
2841         <!-- the following content goes into file 'RTE_Components.h' -->
2842         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2843         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2844       </RTE_Components_h>
2845       <files>
2846         <!-- CPU independent -->
2847         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2848         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2849         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2850
2851         <!-- RTX templates -->
2852         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2853         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2854         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2855         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2856         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2857         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2858         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2859         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2860         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2861         <!-- tool-chain specific template file -->
2862         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2863         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2864         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2865
2866         <!-- CPU and Compiler dependent -->
2867         <!-- ARMCC -->
2868         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2869         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2870         <!-- GCC -->
2871         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2872         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2873         <!-- IAR -->
2874       </files>
2875     </component>
2876
2877     <!-- CMSIS-RTOS Keil RTX5 component -->
2878     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.4.0" Capiversion="1.0.0" condition="RTOS RTX5">
2879       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2880       <RTE_Components_h>
2881         <!-- the following content goes into file 'RTE_Components.h' -->
2882         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2883         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2884       </RTE_Components_h>
2885       <files>
2886         <!-- RTX header file -->
2887         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2888         <!-- RTX compatibility module for API V1 -->
2889         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2890       </files>
2891     </component>
2892
2893     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2894     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
2895       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
2896       <RTE_Components_h>
2897         <!-- the following content goes into file 'RTE_Components.h' -->
2898         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2899         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2900       </RTE_Components_h>
2901       <files>
2902         <!-- RTX documentation -->
2903         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2904
2905         <!-- RTX header files -->
2906         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2907
2908         <!-- RTX configuration -->
2909         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2910         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2911
2912         <!-- RTX templates -->
2913         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2914         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2915         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2916         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2917         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2918         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2919         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2920         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2921         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2922         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2923
2924         <!-- RTX library configuration -->
2925         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2926
2927         <!-- RTX libraries (CPU and Compiler dependent) -->
2928         <!-- ARMCC -->
2929         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2930         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2931         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2932         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2933         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2934         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2935         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2936         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2937         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2938         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2939         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2940         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2941         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2942         <!-- GCC -->
2943         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2944         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2945         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2946         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2947         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2948         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2949         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2950         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2951         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2952         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2953         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2954         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2955         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2956         <!-- IAR -->
2957         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2958         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2959         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2960         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2961         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2962         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2963         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2964       </files>
2965     </component>
2966     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
2967       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
2968       <RTE_Components_h>
2969         <!-- the following content goes into file 'RTE_Components.h' -->
2970         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2971         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2972         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2973       </RTE_Components_h>
2974       <files>
2975         <!-- RTX documentation -->
2976         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2977
2978         <!-- RTX header files -->
2979         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2980
2981         <!-- RTX configuration -->
2982         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2983         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2984
2985         <!-- RTX templates -->
2986         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2987         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2988         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2989         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2990         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2991         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2992         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2993         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2994         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2995         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2996
2997         <!-- RTX library configuration -->
2998         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2999
3000         <!-- RTX libraries (CPU and Compiler dependent) -->
3001         <!-- ARMCC -->
3002         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3003         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3004         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3005         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3006         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3007         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3008         <!-- GCC -->
3009         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3010         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3011         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3012         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3013         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3014         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3015       </files>
3016     </component>
3017     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5">
3018       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3019       <RTE_Components_h>
3020         <!-- the following content goes into file 'RTE_Components.h' -->
3021         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3022         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3023         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3024       </RTE_Components_h>
3025       <files>
3026         <!-- RTX documentation -->
3027         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3028
3029         <!-- RTX header files -->
3030         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3031
3032         <!-- RTX configuration -->
3033         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3034         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3035
3036         <!-- RTX templates -->
3037         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3038         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3039         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3040         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3041         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3042         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3043         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3044         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3045         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3046         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3047
3048         <!-- RTX sources (core) -->
3049         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3050         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3051         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3052         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3053         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3054         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3055         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3056         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3057         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3058         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3059         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3060         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3061         <!-- RTX sources (library configuration) -->
3062         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3063         <!-- RTX sources (handlers ARMCC) -->
3064         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3065         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3066         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3067         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3068         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3069         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3070         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3071         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3072         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3073         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3074         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3075         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3076         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3077         <!-- RTX sources (handlers GCC) -->
3078         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3079         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3080         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3081         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3082         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3083         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3084         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3085         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3086         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3087         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3088         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3089         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3090         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3091         <!-- RTX sources (handlers IAR) -->
3092         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3093         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3094         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3095         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3096         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3097         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3098         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3099         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3100         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3101         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3102         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3103         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3104         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3105         <!-- OS Tick (SysTick) -->
3106         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3107       </files>
3108     </component>
3109     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3110       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3111       <RTE_Components_h>
3112         <!-- the following content goes into file 'RTE_Components.h' -->
3113         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3114         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3115         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3116       </RTE_Components_h>
3117       <files>
3118         <!-- RTX documentation -->
3119         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3120
3121         <!-- RTX header files -->
3122         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3123
3124         <!-- RTX configuration -->
3125         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3126         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3127
3128         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3129
3130         <!-- RTX templates -->
3131         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3132         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3133         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3134         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3135         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3136         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3137         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3138         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3139         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3140         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3141
3142         <!-- RTX sources (core) -->
3143         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3144         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3145         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3146         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3147         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3148         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3149         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3150         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3151         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3152         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3153         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3154         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3155         <!-- RTX sources (library configuration) -->
3156         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3157         <!-- RTX sources (handlers ARMCC) -->
3158         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3159         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3160         <!-- RTX sources (handlers GCC) -->
3161         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3162         <!-- RTX sources (handlers IAR) -->
3163         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3164       </files>
3165     </component>
3166     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3167       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3168       <RTE_Components_h>
3169         <!-- the following content goes into file 'RTE_Components.h' -->
3170         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3171         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3172         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3173         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3174       </RTE_Components_h>
3175       <files>
3176         <!-- RTX documentation -->
3177         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3178
3179         <!-- RTX header files -->
3180         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3181
3182         <!-- RTX configuration -->
3183         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3184         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3185
3186         <!-- RTX templates -->
3187         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3188         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3189         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3190         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3191         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3192         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3193         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3194         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3195         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3196         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3197
3198         <!-- RTX sources (core) -->
3199         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3200         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3201         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3202         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3203         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3204         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3205         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3206         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3207         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3208         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3209         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3210         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3211         <!-- RTX sources (library configuration) -->
3212         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3213         <!-- RTX sources (ARMCC handlers) -->
3214         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3215         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3216         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3217         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3218         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3219         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3220         <!-- RTX sources (GCC handlers) -->
3221         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3222         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3223         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3224         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3225         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3226         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3227         <!-- RTX sources (IAR handlers) -->
3228         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3229         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3230         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3231         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3232         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3233         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3234         <!-- OS Tick (SysTick) -->
3235         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3236       </files>
3237     </component>
3238
3239   </components>
3240
3241   <boards>
3242     <board name="uVision Simulator" vendor="Keil">
3243       <description>uVision Simulator</description>
3244       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3245       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3246       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3247       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3248       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3249       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3250       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3251       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3252       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3253       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3254       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3255       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3256       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3257       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3258       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3259       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3260       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3261       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3262       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3263       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3264     </board>
3265
3266     <board name="Fixed Virtual Platform" vendor="ARM">
3267       <description>Fixed Virtual Platform</description>
3268       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
3269       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
3270       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
3271     </board>
3272   </boards>
3273
3274   <examples>
3275     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3276       <description>DSP_Lib Class Marks example</description>
3277       <board name="uVision Simulator" vendor="Keil"/>
3278       <project>
3279         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3280       </project>
3281       <attributes>
3282         <component Cclass="CMSIS" Cgroup="CORE"/>
3283         <component Cclass="CMSIS" Cgroup="DSP"/>
3284         <component Cclass="Device" Cgroup="Startup"/>
3285         <category>Getting Started</category>
3286       </attributes>
3287     </example>
3288
3289     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3290       <description>DSP_Lib Convolution example</description>
3291       <board name="uVision Simulator" vendor="Keil"/>
3292       <project>
3293         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3294       </project>
3295       <attributes>
3296         <component Cclass="CMSIS" Cgroup="CORE"/>
3297         <component Cclass="CMSIS" Cgroup="DSP"/>
3298         <component Cclass="Device" Cgroup="Startup"/>
3299         <category>Getting Started</category>
3300       </attributes>
3301     </example>
3302
3303     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3304       <description>DSP_Lib Dotproduct example</description>
3305       <board name="uVision Simulator" vendor="Keil"/>
3306       <project>
3307         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3308       </project>
3309       <attributes>
3310         <component Cclass="CMSIS" Cgroup="CORE"/>
3311         <component Cclass="CMSIS" Cgroup="DSP"/>
3312         <component Cclass="Device" Cgroup="Startup"/>
3313         <category>Getting Started</category>
3314       </attributes>
3315     </example>
3316
3317     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3318       <description>DSP_Lib FFT Bin example</description>
3319       <board name="uVision Simulator" vendor="Keil"/>
3320       <project>
3321         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3322       </project>
3323       <attributes>
3324         <component Cclass="CMSIS" Cgroup="CORE"/>
3325         <component Cclass="CMSIS" Cgroup="DSP"/>
3326         <component Cclass="Device" Cgroup="Startup"/>
3327         <category>Getting Started</category>
3328       </attributes>
3329     </example>
3330
3331     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3332       <description>DSP_Lib FIR example</description>
3333       <board name="uVision Simulator" vendor="Keil"/>
3334       <project>
3335         <environment name="uv" load="arm_fir_example.uvprojx"/>
3336       </project>
3337       <attributes>
3338         <component Cclass="CMSIS" Cgroup="CORE"/>
3339         <component Cclass="CMSIS" Cgroup="DSP"/>
3340         <component Cclass="Device" Cgroup="Startup"/>
3341         <category>Getting Started</category>
3342       </attributes>
3343     </example>
3344
3345     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3346       <description>DSP_Lib Graphic Equalizer example</description>
3347       <board name="uVision Simulator" vendor="Keil"/>
3348       <project>
3349         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3350       </project>
3351       <attributes>
3352         <component Cclass="CMSIS" Cgroup="CORE"/>
3353         <component Cclass="CMSIS" Cgroup="DSP"/>
3354         <component Cclass="Device" Cgroup="Startup"/>
3355         <category>Getting Started</category>
3356       </attributes>
3357     </example>
3358
3359     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3360       <description>DSP_Lib Linear Interpolation example</description>
3361       <board name="uVision Simulator" vendor="Keil"/>
3362       <project>
3363         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3364       </project>
3365       <attributes>
3366         <component Cclass="CMSIS" Cgroup="CORE"/>
3367         <component Cclass="CMSIS" Cgroup="DSP"/>
3368         <component Cclass="Device" Cgroup="Startup"/>
3369         <category>Getting Started</category>
3370       </attributes>
3371     </example>
3372
3373     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3374       <description>DSP_Lib Matrix example</description>
3375       <board name="uVision Simulator" vendor="Keil"/>
3376       <project>
3377         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3378       </project>
3379       <attributes>
3380         <component Cclass="CMSIS" Cgroup="CORE"/>
3381         <component Cclass="CMSIS" Cgroup="DSP"/>
3382         <component Cclass="Device" Cgroup="Startup"/>
3383         <category>Getting Started</category>
3384       </attributes>
3385     </example>
3386
3387     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3388       <description>DSP_Lib Signal Convergence example</description>
3389       <board name="uVision Simulator" vendor="Keil"/>
3390       <project>
3391         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3392       </project>
3393       <attributes>
3394         <component Cclass="CMSIS" Cgroup="CORE"/>
3395         <component Cclass="CMSIS" Cgroup="DSP"/>
3396         <component Cclass="Device" Cgroup="Startup"/>
3397         <category>Getting Started</category>
3398       </attributes>
3399     </example>
3400
3401     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3402       <description>DSP_Lib Sinus/Cosinus example</description>
3403       <board name="uVision Simulator" vendor="Keil"/>
3404       <project>
3405         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3406       </project>
3407       <attributes>
3408         <component Cclass="CMSIS" Cgroup="CORE"/>
3409         <component Cclass="CMSIS" Cgroup="DSP"/>
3410         <component Cclass="Device" Cgroup="Startup"/>
3411         <category>Getting Started</category>
3412       </attributes>
3413     </example>
3414
3415     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3416       <description>DSP_Lib Variance example</description>
3417       <board name="uVision Simulator" vendor="Keil"/>
3418       <project>
3419         <environment name="uv" load="arm_variance_example.uvprojx"/>
3420       </project>
3421       <attributes>
3422         <component Cclass="CMSIS" Cgroup="CORE"/>
3423         <component Cclass="CMSIS" Cgroup="DSP"/>
3424         <component Cclass="Device" Cgroup="Startup"/>
3425         <category>Getting Started</category>
3426       </attributes>
3427     </example>
3428
3429     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3430       <description>Neural Network CIFAR10 example</description>
3431       <board name="uVision Simulator" vendor="Keil"/>
3432       <project>
3433         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3434       </project>
3435       <attributes>
3436         <component Cclass="CMSIS" Cgroup="CORE"/>
3437         <component Cclass="CMSIS" Cgroup="DSP"/>
3438         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3439         <component Cclass="Device" Cgroup="Startup"/>
3440         <category>Getting Started</category>
3441       </attributes>
3442     </example>
3443
3444     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
3445       <description>Neural Network GRU example</description>
3446       <board name="uVision Simulator" vendor="Keil"/>
3447       <project>
3448         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3449       </project>
3450       <attributes>
3451         <component Cclass="CMSIS" Cgroup="CORE"/>
3452         <component Cclass="CMSIS" Cgroup="DSP"/>
3453         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3454         <component Cclass="Device" Cgroup="Startup"/>
3455         <category>Getting Started</category>
3456       </attributes>
3457     </example>
3458
3459     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3460       <description>CMSIS-RTOS2 Blinky example</description>
3461       <board name="uVision Simulator" vendor="Keil"/>
3462       <project>
3463         <environment name="uv" load="Blinky.uvprojx"/>
3464       </project>
3465       <attributes>
3466         <component Cclass="CMSIS" Cgroup="CORE"/>
3467         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3468         <component Cclass="Device" Cgroup="Startup"/>
3469         <category>Getting Started</category>
3470       </attributes>
3471     </example>
3472
3473     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3474       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3475       <board name="uVision Simulator" vendor="Keil"/>
3476       <project>
3477         <environment name="uv" load="Blinky.uvprojx"/>
3478       </project>
3479       <attributes>
3480         <component Cclass="CMSIS" Cgroup="CORE"/>
3481         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3482         <component Cclass="Device" Cgroup="Startup"/>
3483         <category>Getting Started</category>
3484       </attributes>
3485     </example>
3486
3487     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3488       <description>CMSIS-RTOS2 Message Queue Example</description>
3489       <board name="uVision Simulator" vendor="Keil"/>
3490       <project>
3491         <environment name="uv" load="MsqQueue.uvprojx"/>
3492       </project>
3493       <attributes>
3494         <component Cclass="CMSIS" Cgroup="CORE"/>
3495         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3496         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3497         <component Cclass="Device" Cgroup="Startup"/>
3498         <category>Getting Started</category>
3499       </attributes>
3500     </example>
3501
3502     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3503       <description>CMSIS-RTOS2 Memory Pool Example</description>
3504       <board name="Fixed Virtual Platform" vendor="ARM"/>
3505       <project>
3506         <environment name="uv" load="MemPool.uvprojx"/>
3507       </project>
3508       <attributes>
3509         <component Cclass="CMSIS" Cgroup="CORE"/>
3510         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3511         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3512         <component Cclass="Device" Cgroup="Startup"/>
3513         <category>Getting Started</category>
3514       </attributes>
3515     </example>
3516
3517     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3518       <description>Bare-metal secure/non-secure example without RTOS</description>
3519       <board name="uVision Simulator" vendor="Keil"/>
3520       <project>
3521         <environment name="uv" load="NoRTOS.uvmpw"/>
3522       </project>
3523       <attributes>
3524         <component Cclass="CMSIS" Cgroup="CORE"/>
3525         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3526         <component Cclass="Device" Cgroup="Startup"/>
3527         <category>Getting Started</category>
3528       </attributes>
3529     </example>
3530
3531     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3532       <description>Secure/non-secure RTOS example with thread context management</description>
3533       <board name="uVision Simulator" vendor="Keil"/>
3534       <project>
3535         <environment name="uv" load="RTOS.uvmpw"/>
3536       </project>
3537       <attributes>
3538         <component Cclass="CMSIS" Cgroup="CORE"/>
3539         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3540         <component Cclass="Device" Cgroup="Startup"/>
3541         <category>Getting Started</category>
3542       </attributes>
3543     </example>
3544
3545     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3546       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3547       <board name="uVision Simulator" vendor="Keil"/>
3548       <project>
3549         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3550       </project>
3551       <attributes>
3552         <component Cclass="CMSIS" Cgroup="CORE"/>
3553         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3554         <component Cclass="Device" Cgroup="Startup"/>
3555         <category>Getting Started</category>
3556       </attributes>
3557     </example>
3558
3559   </examples>
3560
3561 </package>