begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.0.1-dev4">
  12       DSP:
  13        - preparation for ARMv8M DSP libraries.
  14     </release>
  15     <release version="5.0.1-dev3">
  16       Updated ARMv8M Mainline FPU settings in partition*.h
  17     </release>
  18     <release version="5.0.1-dev2">
  19       CMSIS-RTOS2:
  20        - API 2.1   (see revision history for details)
  21        - RTX 5.1.0 (see revision history for details)
  22     </release>
  23     <release version="5.0.1-dev1">
  24       All C module and header files: updated removing 'http://' within license header sections flagged by MISRA as comment within comment
  25       PDSC: added new compatible devices to 'uVision Simulator' generic board description
  26       CMSIS-Pack Schema: adding
  27     </release>
  28     <release version="5.0.1-dev0">
  29       CMSIS-Core:
  30        - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  31        - Updated template for secure main function (main_s.c)
  32        - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  33       CMSIS-RTOS2:
  34        - RTX 5.0.1 (see revision history for details)
  35     </release>
  36     <release version="5.0.0" date="2016-11-11">
  37       Changed open source license to Apache 2.0
  38       CMSIS_Core:
  39        - Added support for Cortex-M23 and Cortex-M33.
  40        - Added ARMv8-M device configurations for mainline and baseline.
  41        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  42        - Added cmsis_compiler.h to unify compiler behaviour.
  43        - Updated function SCB_EnableICache (for Cortex-M7).
  44        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  45       CMSIS-RTOS:
  46         - bug fix in RTX 4.82 (see revision history for details)
  47       CMSIS-RTOS2:
  48         - new API including compatibility layer to CMSIS-RTOS
  49         - reference implementation based on RTX5
  50         - supports all Cortex-M variants including TrustZone for ARMv8-M
  51       CMSIS-SVD:
  52        - reworked SVD format documentation
  53        - removed SVD file database documentation as SVD files are distributed in packs
  54        - updated SVDConv for Win32 and Linux
  55       CMSIS-DSP:
  56        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  57        - Added DSP libraries build projects to CMSIS pack.
  58     </release>
  59     <release version="4.5.0" date="2015-10-28">
  60       - CMSIS-Core     4.30.0  (see revision history for details)
  61       - CMSIS-DAP      1.1.0   (unchanged)
  62       - CMSIS-Driver   2.04.0  (see revision history for details)
  63       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
  64       - CMSIS-PACK     1.4.1   (see revision history for details)
  65       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
  66       - CMSIS-SVD      1.3.1   (see revision history for details)
  67     </release>
  68     <release version="4.4.0" date="2015-09-11">
  69       - CMSIS-Core     4.20   (see revision history for details)
  70       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
  71       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
  72       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
  73       - CMSIS-RTOS
  74         -- API         1.02   (unchanged)
  75         -- RTX         4.79   (see revision history for details)
  76       - CMSIS-SVD      1.3.0  (see revision history for details)
  77       - CMSIS-DAP      1.1.0  (extended with SWO support)
  78     </release>
  79     <release version="4.3.0" date="2015-03-20">
  80       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
  81       - CMSIS-DSP      1.4.5  (see revision history for details)
  82       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
  83       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
  84       - CMSIS-RTOS
  85         -- API         1.02   (unchanged)
  86         -- RTX         4.78   (see revision history for details)
  87       - CMSIS-SVD      1.2    (unchanged)
  88     </release>
  89     <release version="4.2.0" date="2014-09-24">
  90       Adding Cortex-M7 support
  91       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
  92       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
  93       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
  94       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
  95       - CMSIS-RTOS RTX 4.75  (see revision history for details)
  96     </release>
  97     <release version="4.1.1" date="2014-06-30">
  98       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
  99     </release>
 100     <release version="4.1.0" date="2014-06-12">
 101       - CMSIS-Driver   2.02  (incompatible update)
 102       - CMSIS-Pack     1.3   (see revision history for details)
 103       - CMSIS-DSP      1.4.2 (unchanged)
 104       - CMSIS-Core     3.30  (unchanged)
 105       - CMSIS-RTOS RTX 4.74  (unchanged)
 106       - CMSIS-RTOS API 1.02  (unchanged)
 107       - CMSIS-SVD      1.10  (unchanged)
 108       PACK:
 109       - removed G++ specific files from PACK
 110       - added Component Startup variant "C Startup"
 111       - added Pack Checking Utility
 112       - updated conditions to reflect tool-chain dependency
 113       - added Taxonomy for Graphics
 114       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 115     </release>
 116     <release version="4.0.0">
 117       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 118       - CMSIS-Pack     1.1   Preliminary
 119       - CMSIS-DSP      1.4.2 (see revision history for details)
 120       - CMSIS-Core     3.30  (see revision history for details)
 121       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 122       - CMSIS-RTOS API 1.02  (unchanged)
 123       - CMSIS-SVD      1.10  (unchanged)
 124     </release>
 125     <release version="3.20.4">
 126       - CMSIS-RTOS 4.74 (see revision history for details)
 127       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 128     </release>
 129     <release version="3.20.3">
 130       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 131       - CMSIS-RTOS 4.73 (see revision history for details)
 132     </release>
 133     <release version="3.20.2">
 134       - CMSIS-Pack documentation has been added
 135       - CMSIS-Drivers header and documentation have been added to PACK
 136       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 137     </release>
 138     <release version="3.20.1">
 139       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 140       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 141     </release>
 142     <release version="3.20.0">
 143       The software portions that are deployed in the application program are now under a BSD license which allows usage
 144       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 145       The individual components have been update as listed below:
 146       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 147       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 148       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 149       - CMSIS-SVD is unchanged.
 150     </release>
 151   </releases>
 152
 153   <taxonomy>
 154     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 155     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 156     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 157     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 158     <description Cclass="File System">File Drive Support and File System</description>
 159     <description Cclass="Graphics">Graphical User Interface</description>
 160     <description Cclass="Network">Network Stack using Internet Protocols</description>
 161     <description Cclass="USB">Universal Serial Bus Stack</description>
 162     <description Cclass="Compiler">ARM Compiler Software Extensions</description>
 163   </taxonomy>
 164
 165   <devices>
 166     <!-- ******************************  Cortex-M0  ****************************** -->
 167     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 168       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 169       <description>
 170 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 171 - simple, easy-to-use programmers model
 172 - highly efficient ultra-low power operation
 173 - excellent code density
 174 - deterministic, high-performance interrupt handling
 175 - upward compatibility with the rest of the Cortex-M processor family.
 176       </description>
 177       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 178       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 179       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 180       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 181
 182       <device Dname="ARMCM0">
 183         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 184         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 185       </device>
 186     </family>
 187
 188     <!-- ******************************  Cortex-M0P  ****************************** -->
 189     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 190       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 191       <description>
 192 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 193 - simple, easy-to-use programmers model
 194 - highly efficient ultra-low power operation
 195 - excellent code density
 196 - deterministic, high-performance interrupt handling
 197 - upward compatibility with the rest of the Cortex-M processor family.
 198       </description>
 199       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 200       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 201       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 202       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 203
 204       <device Dname="ARMCM0P">
 205         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 206         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 207       </device>
 208     </family>
 209
 210     <!-- ******************************  Cortex-M3  ****************************** -->
 211     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 212       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 213       <description>
 214 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 215 - simple, easy-to-use programmers model
 216 - highly efficient ultra-low power operation
 217 - excellent code density
 218 - deterministic, high-performance interrupt handling
 219 - upward compatibility with the rest of the Cortex-M processor family.
 220       </description>
 221       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 222       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 223       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 224       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 225
 226       <device Dname="ARMCM3">
 227         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 228         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 229       </device>
 230     </family>
 231
 232     <!-- ******************************  Cortex-M4  ****************************** -->
 233     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 234       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 235       <description>
 236 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 237 - simple, easy-to-use programmers model
 238 - highly efficient ultra-low power operation
 239 - excellent code density
 240 - deterministic, high-performance interrupt handling
 241 - upward compatibility with the rest of the Cortex-M processor family.
 242       </description>
 243       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 244       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 245       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 246       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 247
 248       <device Dname="ARMCM4">
 249         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 250         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 251       </device>
 252
 253       <device Dname="ARMCM4_FP">
 254         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 255         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 256       </device>
 257     </family>
 258
 259     <!-- ******************************  Cortex-M7  ****************************** -->
 260     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 261       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 262       <description>
 263 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 264 - simple, easy-to-use programmers model
 265 - highly efficient ultra-low power operation
 266 - excellent code density
 267 - deterministic, high-performance interrupt handling
 268 - upward compatibility with the rest of the Cortex-M processor family.
 269       </description>
 270       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 271       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 272       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 273       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 274
 275       <device Dname="ARMCM7">
 276         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 277         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 278       </device>
 279
 280       <device Dname="ARMCM7_SP">
 281         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 282         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 283       </device>
 284
 285       <device Dname="ARMCM7_DP">
 286         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 287         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 288       </device>
 289     </family>
 290
 291     <!-- ******************************  Cortex-M23  ********************** -->
 292     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 293       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 294       <description>
 295 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 296 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 297 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 298       </description>
 299       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 300       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 301       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 302       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 303       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 304       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 305
 306       <device Dname="ARMCM23">
 307         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 308         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 309       </device>
 310
 311       <device Dname="ARMCM23_TZ">
 312         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 313         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 314       </device>
 315     </family>
 316
 317     <!-- ******************************  Cortex-M33  ****************************** -->
 318     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 319       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 320       <description>
 321 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 322 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 323       </description>
 324       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 325       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 326       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 327       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 328       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 329       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 330
 331       <device Dname="ARMCM33">
 332         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 333         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 334       </device>
 335
 336       <device Dname="ARMCM33_TZ">
 337         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 338         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 339       </device>
 340
 341       <device Dname="ARMCM33_DSP_FP">
 342         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 343         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 344       </device>
 345
 346       <device Dname="ARMCM33_DSP_FP_TZ">
 347         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 348         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 349       </device>
 350     </family>
 351
 352     <!-- ******************************  ARMSC000  ****************************** -->
 353     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 354       <description>
 355 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 356 - simple, easy-to-use programmers model
 357 - highly efficient ultra-low power operation
 358 - excellent code density
 359 - deterministic, high-performance interrupt handling
 360       </description>
 361       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 362       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 363       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 364       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 365
 366       <device Dname="ARMSC000">
 367         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 368         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 369       </device>
 370     </family>
 371
 372     <!-- ******************************  ARMSC300  ****************************** -->
 373     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 374       <description>
 375 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 376 - simple, easy-to-use programmers model
 377 - highly efficient ultra-low power operation
 378 - excellent code density
 379 - deterministic, high-performance interrupt handling
 380       </description>
 381       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 382       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 383       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 384       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 385
 386       <device Dname="ARMSC300">
 387         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 388         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 389       </device>
 390     </family>
 391
 392     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 393     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 394       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 395       <description>
 396 ARMv8-M Baseline based device with TrustZone
 397       </description>
 398       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 399       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 400       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 401       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 402       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 403       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 404
 405       <device Dname="ARMv8MBL">
 406         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 407         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 408       </device>
 409     </family>
 410
 411     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 412     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 413       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 414       <description>
 415 ARMv8-M Mainline based device with TrustZone
 416       </description>
 417       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 418       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 419       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 420       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 421       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 422       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 423
 424       <device Dname="ARMv8MML">
 425         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 426         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 427       </device>
 428
 429       <device Dname="ARMv8MML_DSP">
 430         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 431         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 432       </device>
 433
 434       <device Dname="ARMv8MML_SP">
 435         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 436         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 437       </device>
 438
 439       <device Dname="ARMv8MML_DSP_SP">
 440         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 441         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 442       </device>
 443
 444       <device Dname="ARMv8MML_DP">
 445         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 446         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 447       </device>
 448
 449       <device Dname="ARMv8MML_DSP_DP">
 450         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 451         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 452       </device>
 453     </family>
 454
 455   </devices>
 456
 457
 458   <apis>
 459     <!-- CMSIS-RTOS API -->
 460     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
 461       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 462       <files>
 463         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 464       </files>
 465     </api>
 466     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1" exclusive="1">
 467       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 468       <files>
 469         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 470       </files>
 471     </api>
 472     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
 473       <description>USART Driver API for Cortex-M</description>
 474       <files>
 475         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 476         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 477       </files>
 478     </api>
 479     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
 480       <description>SPI Driver API for Cortex-M</description>
 481       <files>
 482         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 483         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 484       </files>
 485     </api>
 486     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
 487       <description>SAI Driver API for Cortex-M</description>
 488       <files>
 489         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 490         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 491       </files>
 492     </api>
 493     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
 494       <description>I2C Driver API for Cortex-M</description>
 495       <files>
 496         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 497         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 498       </files>
 499     </api>
 500     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
 501       <description>CAN Driver API for Cortex-M</description>
 502       <files>
 503         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 504         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 505       </files>
 506     </api>
 507     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
 508       <description>Flash Driver API for Cortex-M</description>
 509       <files>
 510         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 511         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 512       </files>
 513     </api>
 514     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
 515       <description>MCI Driver API for Cortex-M</description>
 516       <files>
 517         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 518         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 519       </files>
 520     </api>
 521     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
 522       <description>NAND Flash Driver API for Cortex-M</description>
 523       <files>
 524         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 525         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 526       </files>
 527     </api>
 528     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
 529       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 530       <files>
 531         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 532         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 533         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 534       </files>
 535     </api>
 536     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
 537       <description>Ethernet MAC Driver API for Cortex-M</description>
 538       <files>
 539         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 540         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 541       </files>
 542     </api>
 543     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
 544       <description>Ethernet PHY Driver API for Cortex-M</description>
 545       <files>
 546         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 547         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 548       </files>
 549     </api>
 550     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
 551       <description>USB Device Driver API for Cortex-M</description>
 552       <files>
 553         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 554         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 555       </files>
 556     </api>
 557     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
 558       <description>USB Host Driver API for Cortex-M</description>
 559       <files>
 560         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 561         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 562       </files>
 563     </api>
 564   </apis>
 565
 566   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 567   <conditions>
 568     <!-- compiler -->
 569     <condition id="ARMCC">
 570       <require Tcompiler="ARMCC"/>
 571     </condition>
 572     <condition id="GCC">
 573       <require Tcompiler="GCC"/>
 574     </condition>
 575     <condition id="IAR">
 576       <require Tcompiler="IAR"/>
 577     </condition>
 578     <condition id="ARMCC GCC">
 579       <accept Tcompiler="ARMCC"/>
 580       <accept Tcompiler="GCC"/>
 581     </condition>
 582     <condition id="ARMCC GCC IAR">
 583       <accept Tcompiler="ARMCC"/>
 584       <accept Tcompiler="GCC"/>
 585       <accept Tcompiler="IAR"/>
 586     </condition>
 587
 588     <!-- ARM architecture -->
 589     <condition id="ARMv6-M Device">
 590       <description>ARMv6-M architecture based device</description>
 591       <accept Dcore="Cortex-M0"/>
 592       <accept Dcore="Cortex-M0+"/>
 593       <accept Dcore="SC000"/>
 594     </condition>
 595     <condition id="ARMv7-M Device">
 596       <description>ARMv7-M architecture based device</description>
 597       <accept Dcore="Cortex-M3"/>
 598       <accept Dcore="Cortex-M4"/>
 599       <accept Dcore="Cortex-M7"/>
 600       <accept Dcore="SC300"/>
 601     </condition>
 602     <condition id="ARMv8-M Device">
 603       <description>ARMv8-M architecture based device</description>
 604       <accept Dcore="ARMV8MBL"/>
 605       <accept Dcore="ARMV8MML"/>
 606       <accept Dcore="Cortex-M23"/>
 607       <accept Dcore="Cortex-M33"/>
 608     </condition>
 609     <condition id="ARMv8-M TZ Device">
 610       <description>ARMv8-M architecture based device with TrustZone</description>
 611       <require condition="ARMv8-M Device"/>
 612       <require Dtz="TZ"/>
 613     </condition>
 614     <condition id="ARMv6_7-M Device">
 615       <description>ARMv6_7-M architecture based device</description>
 616       <accept condition="ARMv6-M Device"/>
 617       <accept condition="ARMv7-M Device"/>
 618     </condition>
 619     <condition id="ARMv6_7_8-M Device">
 620       <description>ARMv6_7_8-M architecture based device</description>
 621       <accept condition="ARMv6-M Device"/>
 622       <accept condition="ARMv7-M Device"/>
 623       <accept condition="ARMv8-M Device"/>
 624     </condition>
 625
 626     <!-- ARM core -->
 627     <condition id="CM0">
 628       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 629       <accept Dcore="Cortex-M0"/>
 630       <accept Dcore="Cortex-M0+"/>
 631       <accept Dcore="SC000"/>
 632     </condition>
 633     <condition id="CM3">
 634       <description>Cortex-M3 or SC300 processor based device</description>
 635       <accept Dcore="Cortex-M3"/>
 636       <accept Dcore="SC300"/>
 637     </condition>
 638     <condition id="CM4">
 639       <description>Cortex-M4 processor based device</description>
 640       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 641     </condition>
 642     <condition id="CM4_FP">
 643       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 644       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 645     </condition>
 646     <condition id="CM7">
 647       <description>Cortex-M7 processor based device</description>
 648       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 649     </condition>
 650     <condition id="CM7_FP">
 651       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 652       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 653       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 654     </condition>
 655     <condition id="CM7_SP">
 656       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 657       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 658     </condition>
 659     <condition id="CM7_DP">
 660       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 661       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 662     </condition>
 663     <condition id="CM23">
 664       <description>Cortex-M23 processor based device</description>
 665       <require Dcore="Cortex-M23"/>
 666     </condition>
 667     <condition id="CM33">
 668       <description>Cortex-M33 processor based device</description>
 669       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 670     </condition>
 671     <condition id="CM33_DSP">
 672       <description>Cortex-M33 processor based device with DSP extension</description>
 673       <require Dcore="Cortex-M33" Dfpu="NO_FPU" Ddsp="DSP"/>
 674     </condition>
 675     <condition id="CM33_FP">
 676       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 677       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 678     </condition>
 679     <condition id="CM33_SP">
 680       <description>Cortex-M33 processor based device using Floating Point Unit (SP)</description>
 681       <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="NO_DSP"/>
 682     </condition>
 683     <condition id="CM33_DSP_SP">
 684       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP)</description>
 685       <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="DSP"/>
 686     </condition>
 687     <condition id="ARMv8MBL">
 688       <description>ARMv8-M Baseline processor based device</description>
 689       <require Dcore="ARMV8MBL"/>
 690     </condition>
 691     <condition id="ARMv8MML">
 692       <description>ARMv8-M Mainline processor based device</description>
 693       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 694     </condition>
 695     <condition id="ARMv8MML_DSP">
 696       <description>ARMv8-M Mainline processor based device with DSP extension</description>
 697       <require Dcore="ARMV8MML" Dfpu="NO_FPU" Ddsp="DSP"/>
 698     </condition>
 699     <condition id="ARMv8MML_FP">
 700       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 701       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 702       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 703     </condition>
 704     <condition id="ARMv8MML_SP">
 705       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP)</description>
 706       <require Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 707     </condition>
 708     <condition id="ARMv8MML_DSP_SP">
 709       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP)</description>
 710       <require Dcore="ARMV8MML" Dfpu="SP_FPU" Ddsp="DSP"/>
 711     </condition>
 712     <condition id="ARMv8MML_DP">
 713       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP)</description>
 714       <require Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 715     </condition>
 716     <condition id="ARMv8MML_DSP_DP">
 717       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP)</description>
 718       <require Dcore="ARMV8MML" Dfpu="DP_FPU" Ddsp="DSP"/>
 719     </condition>
 720
 721     <!-- ARMCC compiler -->
 722     <condition id="CM0_ARMCC">
 723       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 724       <require condition="CM0"/>
 725       <require Tcompiler="ARMCC"/>
 726     </condition>
 727     <condition id="CM0_LE_ARMCC">
 728       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 729       <require condition="CM0_ARMCC"/>
 730       <require Dendian="Little-endian"/>
 731     </condition>
 732     <condition id="CM0_BE_ARMCC">
 733       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 734       <require condition="CM0_ARMCC"/>
 735       <require Dendian="Big-endian"/>
 736     </condition>
 737
 738     <condition id="CM3_ARMCC">
 739       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 740       <require condition="CM3"/>
 741       <require Tcompiler="ARMCC"/>
 742     </condition>
 743     <condition id="CM3_LE_ARMCC">
 744       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 745       <require condition="CM3_ARMCC"/>
 746       <require Dendian="Little-endian"/>
 747     </condition>
 748     <condition id="CM3_BE_ARMCC">
 749       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 750       <require condition="CM3_ARMCC"/>
 751       <require Dendian="Big-endian"/>
 752     </condition>
 753
 754     <condition id="CM4_ARMCC">
 755       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 756       <require condition="CM4"/>
 757       <require Tcompiler="ARMCC"/>
 758     </condition>
 759     <condition id="CM4_LE_ARMCC">
 760       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 761       <require condition="CM4_ARMCC"/>
 762       <require Dendian="Little-endian"/>
 763     </condition>
 764     <condition id="CM4_BE_ARMCC">
 765       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 766       <require condition="CM4_ARMCC"/>
 767       <require Dendian="Big-endian"/>
 768     </condition>
 769
 770     <condition id="CM4_FP_ARMCC">
 771       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 772       <require condition="CM4_FP"/>
 773       <require Tcompiler="ARMCC"/>
 774     </condition>
 775     <condition id="CM4_FP_LE_ARMCC">
 776       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 777       <require condition="CM4_FP_ARMCC"/>
 778       <require Dendian="Little-endian"/>
 779     </condition>
 780     <condition id="CM4_FP_BE_ARMCC">
 781       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 782       <require condition="CM4_FP_ARMCC"/>
 783       <require Dendian="Big-endian"/>
 784     </condition>
 785
 786     <!-- XMC 4000 Series devices from Infineon require a special library -->
 787     <condition id="CM4_LE_ARMCC_STD">
 788       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
 789       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
 790       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 791       <require Tcompiler="ARMCC"/>
 792     </condition>
 793     <condition id="CM4_LE_ARMCC_IFX">
 794       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
 795       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 796       <require Tcompiler="ARMCC"/>
 797     </condition>
 798     <condition id="CM4_FP_LE_ARMCC_STD">
 799       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
 800       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
 801       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 802       <require Tcompiler="ARMCC"/>
 803     </condition>
 804     <condition id="CM4_FP_LE_ARMCC_IFX">
 805       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
 806       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 807       <require Tcompiler="ARMCC"/>
 808     </condition>
 809
 810     <condition id="CM7_ARMCC">
 811       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 812       <require condition="CM7"/>
 813       <require Tcompiler="ARMCC"/>
 814     </condition>
 815     <condition id="CM7_LE_ARMCC">
 816       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 817       <require condition="CM7_ARMCC"/>
 818       <require Dendian="Little-endian"/>
 819     </condition>
 820     <condition id="CM7_BE_ARMCC">
 821       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 822       <require condition="CM7_ARMCC"/>
 823       <require Dendian="Big-endian"/>
 824     </condition>
 825
 826     <condition id="CM7_FP_ARMCC">
 827       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 828       <require condition="CM7_FP"/>
 829       <require Tcompiler="ARMCC"/>
 830     </condition>
 831     <condition id="CM7_FP_LE_ARMCC">
 832       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 833       <require condition="CM7_FP_ARMCC"/>
 834       <require Dendian="Little-endian"/>
 835     </condition>
 836     <condition id="CM7_FP_BE_ARMCC">
 837       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 838       <require condition="CM7_FP_ARMCC"/>
 839       <require Dendian="Big-endian"/>
 840     </condition>
 841
 842     <condition id="CM7_SP_ARMCC">
 843       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 844       <require condition="CM7_SP"/>
 845       <require Tcompiler="ARMCC"/>
 846     </condition>
 847     <condition id="CM7_SP_LE_ARMCC">
 848       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 849       <require condition="CM7_SP_ARMCC"/>
 850       <require Dendian="Little-endian"/>
 851     </condition>
 852     <condition id="CM7_SP_BE_ARMCC">
 853       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 854       <require condition="CM7_SP_ARMCC"/>
 855       <require Dendian="Big-endian"/>
 856     </condition>
 857
 858     <condition id="CM7_DP_ARMCC">
 859       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
 860       <require condition="CM7_DP"/>
 861       <require Tcompiler="ARMCC"/>
 862     </condition>
 863     <condition id="CM7_DP_LE_ARMCC">
 864       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
 865       <require condition="CM7_DP_ARMCC"/>
 866       <require Dendian="Little-endian"/>
 867     </condition>
 868     <condition id="CM7_DP_BE_ARMCC">
 869       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
 870       <require condition="CM7_DP_ARMCC"/>
 871       <require Dendian="Big-endian"/>
 872     </condition>
 873
 874     <condition id="CM23_ARMCC">
 875       <description>Cortex-M23 processor based device for the ARM Compiler</description>
 876       <require condition="CM23"/>
 877       <require Tcompiler="ARMCC"/>
 878     </condition>
 879     <condition id="CM23_LE_ARMCC">
 880       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
 881       <require condition="CM23_ARMCC"/>
 882       <require Dendian="Little-endian"/>
 883     </condition>
 884     <condition id="CM23_BE_ARMCC">
 885       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
 886       <require condition="CM23_ARMCC"/>
 887       <require Dendian="Big-endian"/>
 888     </condition>
 889
 890     <condition id="CM33_ARMCC">
 891       <description>Cortex-M33 processor based device for the ARM Compiler</description>
 892       <require condition="CM33"/>
 893       <require Tcompiler="ARMCC"/>
 894     </condition>
 895     <condition id="CM33_LE_ARMCC">
 896       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
 897       <require condition="CM33_ARMCC"/>
 898       <require Dendian="Little-endian"/>
 899     </condition>
 900     <condition id="CM33_BE_ARMCC">
 901       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
 902       <require condition="CM33_ARMCC"/>
 903       <require Dendian="Big-endian"/>
 904     </condition>
 905
 906     <condition id="CM33_DSP_ARMCC">
 907       <description>Cortex-M33 processor based device with DSP extension for the ARM Compiler</description>
 908       <require condition="CM33_DSP"/>
 909       <require Tcompiler="ARMCC"/>
 910     </condition>
 911     <condition id="CM33_DSP_LE_ARMCC">
 912       <description>Cortex-M33 processor based device with DSP extension in little endian mode for the ARM Compiler</description>
 913       <require condition="CM33_DSP_ARMCC"/>
 914       <require Dendian="Little-endian"/>
 915     </condition>
 916     <condition id="CM33_DSP_BE_ARMCC">
 917       <description>Cortex-M33 processor based device with DSP extension in big endian mode for the ARM Compiler</description>
 918       <require condition="CM33_DSP_ARMCC"/>
 919       <require Dendian="Big-endian"/>
 920     </condition>
 921
 922     <condition id="CM33_FP_ARMCC">
 923       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
 924       <require condition="CM33_FP"/>
 925       <require Tcompiler="ARMCC"/>
 926     </condition>
 927     <condition id="CM33_FP_LE_ARMCC">
 928       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 929       <require condition="CM33_FP_ARMCC"/>
 930       <require Dendian="Little-endian"/>
 931     </condition>
 932     <condition id="CM33_FP_BE_ARMCC">
 933       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 934       <require condition="CM33_FP_ARMCC"/>
 935       <require Dendian="Big-endian"/>
 936     </condition>
 937
 938     <condition id="CM33_SP_ARMCC">
 939       <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 940       <require condition="CM33_SP"/>
 941       <require Tcompiler="ARMCC"/>
 942     </condition>
 943     <condition id="CM33_SP_LE_ARMCC">
 944       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 945       <require condition="CM33_SP_ARMCC"/>
 946       <require Dendian="Little-endian"/>
 947     </condition>
 948     <condition id="CM33_SP_BE_ARMCC">
 949       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 950       <require condition="CM33_SP_ARMCC"/>
 951       <require Dendian="Big-endian"/>
 952     </condition>
 953
 954     <condition id="CM33_DSP_SP_ARMCC">
 955       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
 956       <require condition="CM33_DSP_SP"/>
 957       <require Tcompiler="ARMCC"/>
 958     </condition>
 959     <condition id="CM33_DSP_SP_LE_ARMCC">
 960       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 961       <require condition="CM33_DSP_SP_ARMCC"/>
 962       <require Dendian="Little-endian"/>
 963     </condition>
 964     <condition id="CM33_DSP_SP_BE_ARMCC">
 965       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 966       <require condition="CM33_DSP_SP_ARMCC"/>
 967       <require Dendian="Big-endian"/>
 968     </condition>
 969
 970     <condition id="ARMv8MBL_ARMCC">
 971       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
 972       <require condition="ARMv8MBL"/>
 973       <require Tcompiler="ARMCC"/>
 974     </condition>
 975     <condition id="ARMv8MBL_LE_ARMCC">
 976       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
 977       <require condition="ARMv8MBL_ARMCC"/>
 978       <require Dendian="Little-endian"/>
 979     </condition>
 980     <condition id="ARMv8MBL_BE_ARMCC">
 981       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
 982       <require condition="ARMv8MBL_ARMCC"/>
 983       <require Dendian="Big-endian"/>
 984     </condition>
 985
 986     <condition id="ARMv8MML_ARMCC">
 987       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
 988       <require condition="ARMv8MML"/>
 989       <require Tcompiler="ARMCC"/>
 990     </condition>
 991     <condition id="ARMv8MML_LE_ARMCC">
 992       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
 993       <require condition="ARMv8MML_ARMCC"/>
 994       <require Dendian="Little-endian"/>
 995     </condition>
 996     <condition id="ARMv8MML_BE_ARMCC">
 997       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
 998       <require condition="ARMv8MML_ARMCC"/>
 999       <require Dendian="Big-endian"/>
1000     </condition>
1001
1002     <condition id="ARMv8MML_DSP_ARMCC">
1003       <description>ARMv8-M Mainline processor based device with DSP extension for the ARM Compiler</description>
1004       <require condition="ARMv8MML_DSP"/>
1005       <require Tcompiler="ARMCC"/>
1006     </condition>
1007     <condition id="ARMv8MML_DSP_LE_ARMCC">
1008       <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the ARM Compiler</description>
1009       <require condition="ARMv8MML_DSP_ARMCC"/>
1010       <require Dendian="Little-endian"/>
1011     </condition>
1012     <condition id="ARMv8MML_DSP_BE_ARMCC">
1013       <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the ARM Compiler</description>
1014       <require condition="ARMv8MML_DSP_ARMCC"/>
1015       <require Dendian="Big-endian"/>
1016     </condition>
1017
1018     <condition id="ARMv8MML_FP_ARMCC">
1019       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1020       <require condition="ARMv8MML_FP"/>
1021       <require Tcompiler="ARMCC"/>
1022     </condition>
1023     <condition id="ARMv8MML_FP_LE_ARMCC">
1024       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1025       <require condition="ARMv8MML_FP_ARMCC"/>
1026       <require Dendian="Little-endian"/>
1027     </condition>
1028     <condition id="ARMv8MML_FP_BE_ARMCC">
1029       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1030       <require condition="ARMv8MML_FP_ARMCC"/>
1031       <require Dendian="Big-endian"/>
1032     </condition>
1033
1034     <condition id="ARMv8MML_SP_ARMCC">
1035       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1036       <require condition="ARMv8MML_SP"/>
1037       <require Tcompiler="ARMCC"/>
1038     </condition>
1039     <condition id="ARMv8MML_SP_LE_ARMCC">
1040       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1041       <require condition="ARMv8MML_SP_ARMCC"/>
1042       <require Dendian="Little-endian"/>
1043     </condition>
1044     <condition id="ARMv8MML_SP_BE_ARMCC">
1045       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1046       <require condition="ARMv8MML_SP_ARMCC"/>
1047       <require Dendian="Big-endian"/>
1048     </condition>
1049
1050     <condition id="ARMv8MML_DSP_SP_ARMCC">
1051       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
1052       <require condition="ARMv8MML_DSP_SP"/>
1053       <require Tcompiler="ARMCC"/>
1054     </condition>
1055     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1056       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1057       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1058       <require Dendian="Little-endian"/>
1059     </condition>
1060     <condition id="ARMv8MML_DSP_SP_BE_ARMCC">
1061       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1062       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1063       <require Dendian="Big-endian"/>
1064     </condition>
1065
1066     <condition id="ARMv8MML_DP_ARMCC">
1067       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1068       <require condition="ARMv8MML_DP"/>
1069       <require Tcompiler="ARMCC"/>
1070     </condition>
1071     <condition id="ARMv8MML_DP_LE_ARMCC">
1072       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1073       <require condition="ARMv8MML_DP_ARMCC"/>
1074       <require Dendian="Little-endian"/>
1075     </condition>
1076     <condition id="ARMv8MML_DP_BE_ARMCC">
1077       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1078       <require condition="ARMv8MML_DP_ARMCC"/>
1079       <require Dendian="Big-endian"/>
1080     </condition>
1081
1082     <condition id="ARMv8MML_DSP_DP_ARMCC">
1083       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the ARM Compiler</description>
1084       <require condition="ARMv8MML_DSP_DP"/>
1085       <require Tcompiler="ARMCC"/>
1086     </condition>
1087     <condition id="ARMv8MML_DSP_DP_LE_ARMCC">
1088       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1089       <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1090       <require Dendian="Little-endian"/>
1091     </condition>
1092     <condition id="ARMv8MML_DSP_DP_BE_ARMCC">
1093       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1094       <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1095       <require Dendian="Big-endian"/>
1096     </condition>
1097
1098     <!-- GCC compiler -->
1099     <condition id="CM0_GCC">
1100       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1101       <require condition="CM0"/>
1102       <require Tcompiler="GCC"/>
1103     </condition>
1104     <condition id="CM0_LE_GCC">
1105       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1106       <require condition="CM0_GCC"/>
1107       <require Dendian="Little-endian"/>
1108     </condition>
1109     <condition id="CM0_BE_GCC">
1110       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1111       <require condition="CM0_GCC"/>
1112       <require Dendian="Big-endian"/>
1113     </condition>
1114
1115     <condition id="CM3_GCC">
1116       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1117       <require condition="CM3"/>
1118       <require Tcompiler="GCC"/>
1119     </condition>
1120     <condition id="CM3_LE_GCC">
1121       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1122       <require condition="CM3_GCC"/>
1123       <require Dendian="Little-endian"/>
1124     </condition>
1125     <condition id="CM3_BE_GCC">
1126       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1127       <require condition="CM3_GCC"/>
1128       <require Dendian="Big-endian"/>
1129     </condition>
1130
1131     <condition id="CM4_GCC">
1132       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1133       <require condition="CM4"/>
1134       <require Tcompiler="GCC"/>
1135     </condition>
1136     <condition id="CM4_LE_GCC">
1137       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1138       <require condition="CM4_GCC"/>
1139       <require Dendian="Little-endian"/>
1140     </condition>
1141     <condition id="CM4_BE_GCC">
1142       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1143       <require condition="CM4_GCC"/>
1144       <require Dendian="Big-endian"/>
1145     </condition>
1146
1147     <condition id="CM4_FP_GCC">
1148       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1149       <require condition="CM4_FP"/>
1150       <require Tcompiler="GCC"/>
1151     </condition>
1152     <condition id="CM4_FP_LE_GCC">
1153       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1154       <require condition="CM4_FP_GCC"/>
1155       <require Dendian="Little-endian"/>
1156     </condition>
1157     <condition id="CM4_FP_BE_GCC">
1158       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1159       <require condition="CM4_FP_GCC"/>
1160       <require Dendian="Big-endian"/>
1161     </condition>
1162
1163     <!-- XMC 4000 Series devices from Infineon require a special library -->
1164     <condition id="CM4_LE_GCC_STD">
1165       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1166       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1167       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1168       <require Tcompiler="GCC"/>
1169     </condition>
1170     <condition id="CM4_LE_GCC_IFX">
1171       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1172       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1173       <require Tcompiler="GCC"/>
1174     </condition>
1175     <condition id="CM4_FP_LE_GCC_STD">
1176       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1177       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1178       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1179       <require Tcompiler="GCC"/>
1180     </condition>
1181     <condition id="CM4_FP_LE_GCC_IFX">
1182       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1183       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1184       <require Tcompiler="GCC"/>
1185     </condition>
1186
1187     <condition id="CM7_GCC">
1188       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1189       <require condition="CM7"/>
1190       <require Tcompiler="GCC"/>
1191     </condition>
1192     <condition id="CM7_LE_GCC">
1193       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1194       <require condition="CM7_GCC"/>
1195       <require Dendian="Little-endian"/>
1196     </condition>
1197     <condition id="CM7_BE_GCC">
1198       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1199       <require condition="CM7_GCC"/>
1200       <require Dendian="Big-endian"/>
1201     </condition>
1202
1203     <condition id="CM7_FP_GCC">
1204       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1205       <require condition="CM7_FP"/>
1206       <require Tcompiler="GCC"/>
1207     </condition>
1208     <condition id="CM7_FP_LE_GCC">
1209       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1210       <require condition="CM7_FP_GCC"/>
1211       <require Dendian="Little-endian"/>
1212     </condition>
1213     <condition id="CM7_FP_BE_GCC">
1214       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1215       <require condition="CM7_FP_GCC"/>
1216       <require Dendian="Big-endian"/>
1217     </condition>
1218
1219     <condition id="CM7_SP_GCC">
1220       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1221       <require condition="CM7_SP"/>
1222       <require Tcompiler="GCC"/>
1223     </condition>
1224     <condition id="CM7_SP_LE_GCC">
1225       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1226       <require condition="CM7_SP_GCC"/>
1227       <require Dendian="Little-endian"/>
1228     </condition>
1229     <condition id="CM7_SP_BE_GCC">
1230       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1231       <require condition="CM7_SP_GCC"/>
1232       <require Dendian="Big-endian"/>
1233     </condition>
1234
1235     <condition id="CM7_DP_GCC">
1236       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1237       <require condition="CM7_DP"/>
1238       <require Tcompiler="GCC"/>
1239     </condition>
1240     <condition id="CM7_DP_LE_GCC">
1241       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1242       <require condition="CM7_DP_GCC"/>
1243       <require Dendian="Little-endian"/>
1244     </condition>
1245     <condition id="CM7_DP_BE_GCC">
1246       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1247       <require condition="CM7_DP_GCC"/>
1248       <require Dendian="Big-endian"/>
1249     </condition>
1250
1251     <condition id="CM23_GCC">
1252       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1253       <require condition="CM23"/>
1254       <require Tcompiler="GCC"/>
1255     </condition>
1256     <condition id="CM23_LE_GCC">
1257       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1258       <require condition="CM23_GCC"/>
1259       <require Dendian="Little-endian"/>
1260     </condition>
1261     <condition id="CM23_BE_GCC">
1262       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1263       <require condition="CM23_GCC"/>
1264       <require Dendian="Big-endian"/>
1265     </condition>
1266
1267     <condition id="CM33_GCC">
1268       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1269       <require condition="CM33"/>
1270       <require Tcompiler="GCC"/>
1271     </condition>
1272     <condition id="CM33_LE_GCC">
1273       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1274       <require condition="CM33_GCC"/>
1275       <require Dendian="Little-endian"/>
1276     </condition>
1277     <condition id="CM33_BE_GCC">
1278       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1279       <require condition="CM33_GCC"/>
1280       <require Dendian="Big-endian"/>
1281     </condition>
1282
1283     <condition id="CM33_DSP_GCC">
1284       <description>Cortex-M33 processor based device with DSP extension for the GCC Compiler</description>
1285       <require condition="CM33_DSP"/>
1286       <require Tcompiler="GCC"/>
1287     </condition>
1288     <condition id="CM33_DSP_LE_GCC">
1289       <description>Cortex-M33 processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1290       <require condition="CM33_DSP_GCC"/>
1291       <require Dendian="Little-endian"/>
1292     </condition>
1293     <condition id="CM33_DSP_BE_GCC">
1294       <description>Cortex-M33 processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1295       <require condition="CM33_DSP_GCC"/>
1296       <require Dendian="Big-endian"/>
1297     </condition>
1298
1299     <condition id="CM33_FP_GCC">
1300       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1301       <require condition="CM33_FP"/>
1302       <require Tcompiler="GCC"/>
1303     </condition>
1304     <condition id="CM33_FP_LE_GCC">
1305       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1306       <require condition="CM33_FP_GCC"/>
1307       <require Dendian="Little-endian"/>
1308     </condition>
1309     <condition id="CM33_FP_BE_GCC">
1310       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1311       <require condition="CM33_FP_GCC"/>
1312       <require Dendian="Big-endian"/>
1313     </condition>
1314
1315     <condition id="CM33_SP_GCC">
1316       <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1317       <require condition="CM33_SP"/>
1318       <require Tcompiler="GCC"/>
1319     </condition>
1320     <condition id="CM33_SP_LE_GCC">
1321       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1322       <require condition="CM33_SP_GCC"/>
1323       <require Dendian="Little-endian"/>
1324     </condition>
1325     <condition id="CM33_SP_BE_GCC">
1326       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1327       <require condition="CM33_SP_GCC"/>
1328       <require Dendian="Big-endian"/>
1329     </condition>
1330
1331     <condition id="CM33_DSP_SP_GCC">
1332       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1333       <require condition="CM33_DSP_SP"/>
1334       <require Tcompiler="GCC"/>
1335     </condition>
1336     <condition id="CM33_DSP_SP_LE_GCC">
1337       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1338       <require condition="CM33_DSP_SP_GCC"/>
1339       <require Dendian="Little-endian"/>
1340     </condition>
1341     <condition id="CM33_DSP_SP_BE_GCC">
1342       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1343       <require condition="CM33_DSP_SP_GCC"/>
1344       <require Dendian="Big-endian"/>
1345     </condition>
1346
1347     <condition id="ARMv8MBL_GCC">
1348       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1349       <require condition="ARMv8MBL"/>
1350       <require Tcompiler="GCC"/>
1351     </condition>
1352     <condition id="ARMv8MBL_LE_GCC">
1353       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1354       <require condition="ARMv8MBL_GCC"/>
1355       <require Dendian="Little-endian"/>
1356     </condition>
1357     <condition id="ARMv8MBL_BE_GCC">
1358       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1359       <require condition="ARMv8MBL_GCC"/>
1360       <require Dendian="Big-endian"/>
1361     </condition>
1362
1363     <condition id="ARMv8MML_GCC">
1364       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1365       <require condition="ARMv8MML"/>
1366       <require Tcompiler="GCC"/>
1367     </condition>
1368     <condition id="ARMv8MML_LE_GCC">
1369       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1370       <require condition="ARMv8MML_GCC"/>
1371       <require Dendian="Little-endian"/>
1372     </condition>
1373     <condition id="ARMv8MML_BE_GCC">
1374       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1375       <require condition="ARMv8MML_GCC"/>
1376       <require Dendian="Big-endian"/>
1377     </condition>
1378
1379     <condition id="ARMv8MML_DSP_GCC">
1380       <description>ARMv8-M Mainline processor based device with DSP extension for the GCC Compiler</description>
1381       <require condition="ARMv8MML_DSP"/>
1382       <require Tcompiler="GCC"/>
1383     </condition>
1384     <condition id="ARMv8MML_DSP_LE_GCC">
1385       <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1386       <require condition="ARMv8MML_DSP_GCC"/>
1387       <require Dendian="Little-endian"/>
1388     </condition>
1389     <condition id="ARMv8MML_DSP_BE_GCC">
1390       <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1391       <require condition="ARMv8MML_DSP_GCC"/>
1392       <require Dendian="Big-endian"/>
1393     </condition>
1394
1395     <condition id="ARMv8MML_FP_GCC">
1396       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1397       <require condition="ARMv8MML_FP"/>
1398       <require Tcompiler="GCC"/>
1399     </condition>
1400     <condition id="ARMv8MML_FP_LE_GCC">
1401       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1402       <require condition="ARMv8MML_FP_GCC"/>
1403       <require Dendian="Little-endian"/>
1404     </condition>
1405     <condition id="ARMv8MML_FP_BE_GCC">
1406       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1407       <require condition="ARMv8MML_FP_GCC"/>
1408       <require Dendian="Big-endian"/>
1409     </condition>
1410
1411     <condition id="ARMv8MML_SP_GCC">
1412       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1413       <require condition="ARMv8MML_SP"/>
1414       <require Tcompiler="GCC"/>
1415     </condition>
1416     <condition id="ARMv8MML_SP_LE_GCC">
1417       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1418       <require condition="ARMv8MML_SP_GCC"/>
1419       <require Dendian="Little-endian"/>
1420     </condition>
1421     <condition id="ARMv8MML_SP_BE_GCC">
1422       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1423       <require condition="ARMv8MML_SP_GCC"/>
1424       <require Dendian="Big-endian"/>
1425     </condition>
1426
1427     <condition id="ARMv8MML_DSP_SP_GCC">
1428       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1429       <require condition="ARMv8MML_DSP_SP"/>
1430       <require Tcompiler="GCC"/>
1431     </condition>
1432     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1433       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1434       <require condition="ARMv8MML_DSP_SP_GCC"/>
1435       <require Dendian="Little-endian"/>
1436     </condition>
1437     <condition id="ARMv8MML_DSP_SP_BE_GCC">
1438       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1439       <require condition="ARMv8MML_DSP_SP_GCC"/>
1440       <require Dendian="Big-endian"/>
1441     </condition>
1442
1443     <condition id="ARMv8MML_DP_GCC">
1444       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1445       <require condition="ARMv8MML_DP"/>
1446       <require Tcompiler="GCC"/>
1447     </condition>
1448     <condition id="ARMv8MML_DP_LE_GCC">
1449       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1450       <require condition="ARMv8MML_DP_GCC"/>
1451       <require Dendian="Little-endian"/>
1452     </condition>
1453     <condition id="ARMv8MML_DP_BE_GCC">
1454       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1455       <require condition="ARMv8MML_DP_GCC"/>
1456       <require Dendian="Big-endian"/>
1457     </condition>
1458
1459     <condition id="ARMv8MML_DSP_DP_GCC">
1460       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the GCC Compiler</description>
1461       <require condition="ARMv8MML_DSP_DP"/>
1462       <require Tcompiler="GCC"/>
1463     </condition>
1464     <condition id="ARMv8MML_DSP_DP_LE_GCC">
1465       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1466       <require condition="ARMv8MML_DSP_DP_GCC"/>
1467       <require Dendian="Little-endian"/>
1468     </condition>
1469     <condition id="ARMv8MML_DSP_DP_BE_GCC">
1470       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1471       <require condition="ARMv8MML_DSP_DP_GCC"/>
1472       <require Dendian="Big-endian"/>
1473     </condition>
1474
1475     <!-- IAR compiler -->
1476     <condition id="CM0_IAR">
1477       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1478       <require condition="CM0"/>
1479       <require Tcompiler="IAR"/>
1480     </condition>
1481     <condition id="CM0_LE_IAR">
1482       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1483       <require condition="CM0_IAR"/>
1484       <require Dendian="Little-endian"/>
1485     </condition>
1486     <condition id="CM0_BE_IAR">
1487       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1488       <require condition="CM0_IAR"/>
1489       <require Dendian="Big-endian"/>
1490     </condition>
1491
1492     <condition id="CM3_IAR">
1493       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1494       <require condition="CM3"/>
1495       <require Tcompiler="IAR"/>
1496     </condition>
1497     <condition id="CM3_LE_IAR">
1498       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1499       <require condition="CM3_IAR"/>
1500       <require Dendian="Little-endian"/>
1501     </condition>
1502     <condition id="CM3_BE_IAR">
1503       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1504       <require condition="CM3_IAR"/>
1505       <require Dendian="Big-endian"/>
1506     </condition>
1507
1508     <condition id="CM4_IAR">
1509       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1510       <require condition="CM4"/>
1511       <require Tcompiler="IAR"/>
1512     </condition>
1513     <condition id="CM4_LE_IAR">
1514       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1515       <require condition="CM4_IAR"/>
1516       <require Dendian="Little-endian"/>
1517     </condition>
1518     <condition id="CM4_BE_IAR">
1519       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1520       <require condition="CM4_IAR"/>
1521       <require Dendian="Big-endian"/>
1522     </condition>
1523
1524     <condition id="CM4_FP_IAR">
1525       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1526       <require condition="CM4_FP"/>
1527       <require Tcompiler="IAR"/>
1528     </condition>
1529     <condition id="CM4_FP_LE_IAR">
1530       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1531       <require condition="CM4_FP_IAR"/>
1532       <require Dendian="Little-endian"/>
1533     </condition>
1534     <condition id="CM4_FP_BE_IAR">
1535       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1536       <require condition="CM4_FP_IAR"/>
1537       <require Dendian="Big-endian"/>
1538     </condition>
1539
1540     <condition id="CM7_IAR">
1541       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1542       <require condition="CM7"/>
1543       <require Tcompiler="IAR"/>
1544     </condition>
1545     <condition id="CM7_LE_IAR">
1546       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1547       <require condition="CM7_IAR"/>
1548       <require Dendian="Little-endian"/>
1549     </condition>
1550     <condition id="CM7_BE_IAR">
1551       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1552       <require condition="CM7_IAR"/>
1553       <require Dendian="Big-endian"/>
1554     </condition>
1555
1556     <condition id="CM7_FP_IAR">
1557       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1558       <require condition="CM7_FP"/>
1559       <require Tcompiler="IAR"/>
1560     </condition>
1561     <condition id="CM7_FP_LE_IAR">
1562       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1563       <require condition="CM7_FP_IAR"/>
1564       <require Dendian="Little-endian"/>
1565     </condition>
1566     <condition id="CM7_FP_BE_IAR">
1567       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1568       <require condition="CM7_FP_IAR"/>
1569       <require Dendian="Big-endian"/>
1570     </condition>
1571
1572     <condition id="CM7_SP_IAR">
1573       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1574       <require condition="CM7_SP"/>
1575       <require Tcompiler="IAR"/>
1576     </condition>
1577     <condition id="CM7_SP_LE_IAR">
1578       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1579       <require condition="CM7_SP_IAR"/>
1580       <require Dendian="Little-endian"/>
1581     </condition>
1582     <condition id="CM7_SP_BE_IAR">
1583       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1584       <require condition="CM7_SP_IAR"/>
1585       <require Dendian="Big-endian"/>
1586     </condition>
1587
1588     <condition id="CM7_DP_IAR">
1589       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1590       <require condition="CM7_DP"/>
1591       <require Tcompiler="IAR"/>
1592     </condition>
1593     <condition id="CM7_DP_LE_IAR">
1594       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1595       <require condition="CM7_DP_IAR"/>
1596       <require Dendian="Little-endian"/>
1597     </condition>
1598     <condition id="CM7_DP_BE_IAR">
1599       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1600       <require condition="CM7_DP_IAR"/>
1601       <require Dendian="Big-endian"/>
1602     </condition>
1603
1604     <!-- conditions selecting single devices and CMSIS Core -->
1605     <!-- used for component startup, GCC version is used for C-Startup -->
1606     <condition id="ARMCM0 CMSIS">
1607       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1608       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1609       <require Cclass="CMSIS" Cgroup="CORE"/>
1610     </condition>
1611     <condition id="ARMCM0 CMSIS GCC">
1612       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1613       <require condition="ARMCM0 CMSIS"/>
1614       <require condition="GCC"/>
1615     </condition>
1616
1617     <condition id="ARMCM0+ CMSIS">
1618       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1619       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1620       <require Cclass="CMSIS" Cgroup="CORE"/>
1621     </condition>
1622     <condition id="ARMCM0+ CMSIS GCC">
1623       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1624       <require condition="ARMCM0+ CMSIS"/>
1625       <require condition="GCC"/>
1626     </condition>
1627
1628     <condition id="ARMCM3 CMSIS">
1629       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1630       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1631       <require Cclass="CMSIS" Cgroup="CORE"/>
1632     </condition>
1633     <condition id="ARMCM3 CMSIS GCC">
1634       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1635       <require condition="ARMCM3 CMSIS"/>
1636       <require condition="GCC"/>
1637     </condition>
1638
1639     <condition id="ARMCM4 CMSIS">
1640       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1641       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1642       <require Cclass="CMSIS" Cgroup="CORE"/>
1643     </condition>
1644     <condition id="ARMCM4 CMSIS GCC">
1645       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1646       <require condition="ARMCM4 CMSIS"/>
1647       <require condition="GCC"/>
1648     </condition>
1649
1650     <condition id="ARMCM7 CMSIS">
1651       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1652       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1653       <require Cclass="CMSIS" Cgroup="CORE"/>
1654     </condition>
1655     <condition id="ARMCM7 CMSIS GCC">
1656       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1657       <require condition="ARMCM7 CMSIS"/>
1658       <require condition="GCC"/>
1659     </condition>
1660
1661     <condition id="ARMCM23 CMSIS">
1662       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1663       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1664       <require Cclass="CMSIS" Cgroup="CORE"/>
1665     </condition>
1666     <condition id="ARMCM23 CMSIS GCC">
1667       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1668       <require condition="ARMCM23 CMSIS"/>
1669       <require condition="GCC"/>
1670     </condition>
1671
1672     <condition id="ARMCM33 CMSIS">
1673       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1674       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1675       <require Cclass="CMSIS" Cgroup="CORE"/>
1676     </condition>
1677     <condition id="ARMCM33 CMSIS GCC">
1678       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1679       <require condition="ARMCM33 CMSIS"/>
1680       <require condition="GCC"/>
1681     </condition>
1682
1683     <condition id="ARMSC000 CMSIS">
1684       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1685       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1686       <require Cclass="CMSIS" Cgroup="CORE"/>
1687     </condition>
1688     <condition id="ARMSC000 CMSIS GCC">
1689       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1690       <require condition="ARMSC000 CMSIS"/>
1691       <require condition="GCC"/>
1692     </condition>
1693
1694     <condition id="ARMSC300 CMSIS">
1695       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1696       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1697       <require Cclass="CMSIS" Cgroup="CORE"/>
1698     </condition>
1699     <condition id="ARMSC300 CMSIS GCC">
1700       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1701       <require condition="ARMSC300 CMSIS"/>
1702       <require condition="GCC"/>
1703     </condition>
1704
1705     <condition id="ARMv8MBL CMSIS">
1706       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1707       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1708       <require Cclass="CMSIS" Cgroup="CORE"/>
1709     </condition>
1710     <condition id="ARMv8MBL CMSIS GCC">
1711       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1712       <require condition="ARMv8MBL CMSIS"/>
1713       <require condition="GCC"/>
1714     </condition>
1715
1716     <condition id="ARMv8MML CMSIS">
1717       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1718       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1719       <require Cclass="CMSIS" Cgroup="CORE"/>
1720     </condition>
1721     <condition id="ARMv8MML CMSIS GCC">
1722       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1723       <require condition="ARMv8MML CMSIS"/>
1724       <require condition="GCC"/>
1725     </condition>
1726
1727     <!-- CMSIS DSP -->
1728     <condition id="CMSIS DSP">
1729       <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
1730       <require condition="ARMv6_7-M Device"/>
1731       <require Cclass="CMSIS" Cgroup="CORE"/>
1732       <require condition="ARMCC GCC"/>
1733     </condition>
1734
1735     <!-- RTOS RTX -->
1736     <condition id="RTOS RTX">
1737       <description>Components required for RTOS RTX</description>
1738       <require condition="ARMv6_7-M Device"/>
1739       <require condition="ARMCC GCC IAR"/>
1740       <require Cclass="Device" Cgroup="Startup"/>
1741       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1742     </condition>
1743     <condition id="RTOS RTX5">
1744       <description>Components required for RTOS RTX5</description>
1745       <require condition="ARMv6_7_8-M Device"/>
1746       <require condition="ARMCC GCC"/>
1747       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1748     </condition>
1749     <condition id="RTOS2 RTX5">
1750       <description>Components required for RTOS2 RTX5</description>
1751       <require condition="ARMv6_7_8-M Device"/>
1752       <require condition="ARMCC GCC"/>
1753       <require Cclass="CMSIS"  Cgroup="CORE"/>
1754       <require Cclass="Device" Cgroup="Startup"/>
1755     </condition>
1756     <condition id="RTOS2 RTX5 NS">
1757       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1758       <require condition="ARMv8-M TZ Device"/>
1759       <require condition="ARMCC GCC"/>
1760       <require Cclass="CMSIS"  Cgroup="CORE"/>
1761       <require Cclass="Device" Cgroup="Startup"/>
1762     </condition>
1763
1764   </conditions>
1765
1766   <components>
1767     <!-- CMSIS-Core component -->
1768     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0"  condition="ARMv6_7_8-M Device" >
1769       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1770       <files>
1771         <!-- CPU independent -->
1772         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1773         <file category="include" name="CMSIS/Include/"/>
1774         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1775         <!-- Code template -->
1776         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1777         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1778       </files>
1779     </component>
1780
1781     <!-- CMSIS-Startup components -->
1782     <!-- Cortex-M0 -->
1783     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1784       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1785       <files>
1786         <!-- include folder / device header file -->
1787         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1788         <!-- startup / system file -->
1789         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1790         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1791         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1792         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1793         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1794       </files>
1795     </component>
1796     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1797       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1798       <files>
1799         <!-- include folder / device header file -->
1800         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1801         <!-- startup / system file -->
1802         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1803         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1804         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1805       </files>
1806     </component>
1807
1808     <!-- Cortex-M0+ -->
1809     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1810       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1811       <files>
1812         <!-- include folder / device header file -->
1813         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1814         <!-- startup / system file -->
1815         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1816         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1817         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1818         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1819         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1820       </files>
1821     </component>
1822     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1823       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1824       <files>
1825         <!-- include folder / device header file -->
1826         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1827         <!-- startup / system file -->
1828         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1829         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1830         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1831       </files>
1832     </component>
1833
1834     <!-- Cortex-M3 -->
1835     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1836       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1837       <files>
1838         <!-- include folder / device header file -->
1839         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1840         <!-- startup / system file -->
1841         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1842         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1843         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1844         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1845         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1846       </files>
1847     </component>
1848     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1849       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1850       <files>
1851         <!-- include folder / device header file -->
1852         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1853         <!-- startup / system file -->
1854         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1855         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1856         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1857       </files>
1858     </component>
1859
1860     <!-- Cortex-M4 -->
1861     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1862       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1863       <files>
1864         <!-- include folder / device header file -->
1865         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1866         <!-- startup / system file -->
1867         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1868         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1869         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1870         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1871         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1872       </files>
1873     </component>
1874     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1875       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1876       <files>
1877         <!-- include folder / device header file -->
1878         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1879         <!-- startup / system file -->
1880         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1881         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1882         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1883       </files>
1884     </component>
1885
1886     <!-- Cortex-M7 -->
1887     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
1888       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1889       <files>
1890         <!-- include folder / device header file -->
1891         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1892         <!-- startup / system file -->
1893         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1894         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1895         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1896         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1897         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1898       </files>
1899     </component>
1900     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1901       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1902       <files>
1903         <!-- include folder / device header file -->
1904         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1905         <!-- startup / system file -->
1906         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1907         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1908         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1909       </files>
1910     </component>
1911
1912     <!-- Cortex-M23 -->
1913     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
1914       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1915       <files>
1916         <!-- include folder / device header file -->
1917         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
1918         <!-- startup / system file -->
1919         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
1920         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
1921         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1922         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1923         <!-- SAU configuration -->
1924         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1925       </files>
1926     </component>
1927     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
1928       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1929       <files>
1930         <!-- include folder / device header file -->
1931         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
1932         <!-- startup / system file -->
1933         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
1934         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1935         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
1936         <!-- SAU configuration -->
1937         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1938       </files>
1939     </component>
1940
1941     <!-- Cortex-M33 -->
1942     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
1943       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1944       <files>
1945         <!-- include folder / device header file -->
1946         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
1947         <!-- startup / system file -->
1948         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
1949         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
1950         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1951         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
1952         <!-- SAU configuration -->
1953         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1954       </files>
1955     </component>
1956     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
1957       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1958       <files>
1959         <!-- include folder / device header file -->
1960         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
1961         <!-- startup / system file -->
1962         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
1963         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1964         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
1965         <!-- SAU configuration -->
1966         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1967       </files>
1968     </component>
1969
1970     <!-- Cortex-SC000 -->
1971     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
1972       <description>System and Startup for Generic ARM SC000 device</description>
1973       <files>
1974         <!-- include folder / device header file -->
1975         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1976         <!-- startup / system file -->
1977         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1978         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1979         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1980         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1981         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1982       </files>
1983     </component>
1984     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1985       <description>System and Startup for Generic ARM SC000 device</description>
1986       <files>
1987         <!-- include folder / device header file -->
1988         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1989         <!-- startup / system file -->
1990         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1991         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1992         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1993       </files>
1994     </component>
1995
1996     <!-- Cortex-SC300 -->
1997     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
1998       <description>System and Startup for Generic ARM SC300 device</description>
1999       <files>
2000         <!-- include folder / device header file -->
2001         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2002         <!-- startup / system file -->
2003         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2004         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2005         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2006         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2007         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2008       </files>
2009     </component>
2010     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2011       <description>System and Startup for Generic ARM SC300 device</description>
2012       <files>
2013         <!-- include folder / device header file -->
2014         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2015         <!-- startup / system file -->
2016         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2017         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2018         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2019       </files>
2020     </component>
2021
2022     <!-- ARMv8MBL -->
2023     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2024       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2025       <files>
2026         <!-- include folder / device header file -->
2027         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2028         <!-- startup / system file -->
2029         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2030         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2031         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2032         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2033         <!-- SAU configuration -->
2034         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2035       </files>
2036     </component>
2037     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2038       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2039       <files>
2040         <!-- include folder / device header file -->
2041         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2042         <!-- startup / system file -->
2043         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2044         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2045         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2046         <!-- SAU configuration -->
2047         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2048       </files>
2049     </component>
2050
2051     <!-- ARMv8MML -->
2052     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2053       <description>System and Startup for Generic ARM ARMv8MML device</description>
2054       <files>
2055         <!-- include folder / device header file -->
2056         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2057         <!-- startup / system file -->
2058         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2059         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2060         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2061         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2062         <!-- SAU configuration -->
2063         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2064       </files>
2065     </component>
2066     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2067       <description>System and Startup for Generic ARM ARMv8MML device</description>
2068       <files>
2069         <!-- include folder / device header file -->
2070         <file category="include"  name="Device/ARM/ARMv8MML/Include/"/>
2071         <!-- startup / system file -->
2072         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2073         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2074         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2075         <!-- SAU configuration -->
2076         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2077       </files>
2078     </component>
2079
2080
2081     <!-- CMSIS-DSP component -->
2082     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
2083       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2084       <files>
2085         <!-- CPU independent -->
2086         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2087         <file category="header" name="CMSIS/Include/arm_math.h"/>
2088
2089         <!-- CPU and Compiler dependent -->
2090         <!-- ARMCC -->
2091         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2092         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2093         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2094         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2095         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2096         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2097         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2098         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2099         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2100         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2101         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2102         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2103         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2104         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2105 <!--
2106         <file category="library" condition="CM23_LE_ARMCC"            name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2107         <file category="library" condition="CM33_LE_ARMCC"            name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2108         <file category="library" condition="CM33_DSP_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2109         <file category="library" condition="CM33_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2110         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2111         <file category="library" condition="ARMv8MBL_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2112         <file category="library" condition="ARMv8MML_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2113         <file category="library" condition="ARMv8MML_DSP_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2114         <file category="library" condition="ARMv8MML_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2115         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2116 -->
2117         <!-- GCC -->
2118         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2119         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2120         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2121         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2122         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2123         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2124         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2125 <!--
2126         <file category="library" condition="CM23_LE_GCC"              name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2127         <file category="library" condition="CM33_LE_GCC"              name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2128         <file category="library" condition="CM33_DSP_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2129         <file category="library" condition="CM33_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2130         <file category="library" condition="CM33_DSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2131         <file category="library" condition="ARMv8MBL_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2132         <file category="library" condition="ARMv8MML_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2133         <file category="library" condition="ARMv8MML_DSP_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2134         <file category="library" condition="ARMv8MML_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2135         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"   name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2136 -->
2137       </files>
2138     </component>
2139
2140     <!-- CMSIS-RTOS Keil RTX component -->
2141     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX">
2142       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2143       <RTE_Components_h>
2144         <!-- the following content goes into file 'RTE_Components.h' -->
2145         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2146         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2147       </RTE_Components_h>
2148       <files>
2149         <!-- CPU independent -->
2150         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2151         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2152         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2153
2154         <!-- RTX templates -->
2155         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2156         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2157         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2158         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2159         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2160         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2161         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2162         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2163         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2164         <!-- tool-chain specific template file -->
2165         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2166         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2167         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2168
2169         <!-- CPU and Compiler dependent -->
2170         <!-- ARMCC -->
2171         <file category="library" condition="CM0_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2172         <file category="library" condition="CM0_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2173         <file category="library" condition="CM3_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2174         <file category="library" condition="CM3_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2175         <file category="library" condition="CM4_LE_ARMCC_STD"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2176         <file category="library" condition="CM4_LE_ARMCC_IFX"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2177         <file category="library" condition="CM4_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2178         <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2179         <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2180         <file category="library" condition="CM4_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2181         <file category="library" condition="CM7_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2182         <file category="library" condition="CM7_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2183         <file category="library" condition="CM7_FP_LE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2184         <file category="library" condition="CM7_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2185         <!-- GCC -->
2186         <file category="library" condition="CM0_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2187         <file category="library" condition="CM0_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2188         <file category="library" condition="CM3_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2189         <file category="library" condition="CM3_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2190         <file category="library" condition="CM4_LE_GCC_STD"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2191         <file category="library" condition="CM4_LE_GCC_IFX"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2192         <file category="library" condition="CM4_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2193         <file category="library" condition="CM4_FP_LE_GCC_STD"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2194         <file category="library" condition="CM4_FP_LE_GCC_IFX"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2195         <file category="library" condition="CM4_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2196         <file category="library" condition="CM7_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2197         <file category="library" condition="CM7_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2198         <file category="library" condition="CM7_FP_LE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2199         <file category="library" condition="CM7_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2200         <!-- IAR -->
2201         <file category="library" condition="CM0_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2202         <file category="library" condition="CM0_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2203         <file category="library" condition="CM3_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2204         <file category="library" condition="CM3_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2205         <file category="library" condition="CM4_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2206         <file category="library" condition="CM4_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2207         <file category="library" condition="CM4_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2208         <file category="library" condition="CM4_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2209         <file category="library" condition="CM7_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2210         <file category="library" condition="CM7_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2211         <file category="library" condition="CM7_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2212         <file category="library" condition="CM7_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2213       </files>
2214     </component>
2215
2216     <!-- CMSIS-RTOS Keil RTX5 component -->
2217     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.1.0" Capiversion="1.0" condition="RTOS RTX5">
2218       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2219       <RTE_Components_h>
2220         <!-- the following content goes into file 'RTE_Components.h' -->
2221         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2222         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2223       </RTE_Components_h>
2224       <files>
2225         <!-- RTX header file -->
2226         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2227         <!-- RTX compatibility module for API V1 -->
2228         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2229       </files>
2230     </component>
2231
2232     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2233     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.1.0" Capiversion="2.1" condition="RTOS2 RTX5">
2234       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2235       <RTE_Components_h>
2236         <!-- the following content goes into file 'RTE_Components.h' -->
2237         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2238         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2239       </RTE_Components_h>
2240       <files>
2241         <!-- RTX documentation -->
2242         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2243
2244         <!-- RTX header files -->
2245         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2246         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2247
2248         <!-- RTX configuration -->
2249         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2250         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2251
2252         <!-- RTX templates -->
2253         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2254         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2255         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2256         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2257         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2258         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2259         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2260         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2261         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2262
2263         <!-- RTX library configuration -->
2264         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2265
2266         <!-- RTX libraries (CPU and Compiler dependent) -->
2267         <!-- ARMCC -->
2268         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2269         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2270         <file category="library" condition="CM4_LE_ARMCC_STD"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2271         <file category="library" condition="CM4_FP_LE_ARMCC_STD"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2272         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2273         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2274         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2275         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2276         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2277         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2278         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2279         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2280         <!-- GCC -->
2281         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2282         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2283         <file category="library" condition="CM4_LE_GCC_STD"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2284         <file category="library" condition="CM4_FP_LE_GCC_STD"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2285         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2286         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2287         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2288         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2289         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2290         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2291         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2292         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2293       </files>
2294     </component>
2295     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.1.0" Capiversion="2.1" condition="RTOS2 RTX5 NS">
2296       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2297       <RTE_Components_h>
2298         <!-- the following content goes into file 'RTE_Components.h' -->
2299         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2300         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2301         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2302       </RTE_Components_h>
2303       <files>
2304         <!-- RTX documentation -->
2305         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2306
2307         <!-- RTX header files -->
2308         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2309         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2310
2311         <!-- RTX configuration -->
2312         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2313         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2314
2315         <!-- RTX templates -->
2316         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2317         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2318         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2319         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2320         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2321         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2322         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2323         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2324         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2325
2326         <!-- RTX library configuration -->
2327         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2328
2329         <!-- RTX libraries (CPU and Compiler dependent) -->
2330         <!-- ARMCC -->
2331         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2332         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2333         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2334         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2335         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2336         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2337         <!-- GCC -->
2338         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2339         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2340         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2341         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2342         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2343         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2344       </files>
2345     </component>
2346     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.1.0" Capiversion="2.1" condition="RTOS2 RTX5">
2347       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2348       <RTE_Components_h>
2349         <!-- the following content goes into file 'RTE_Components.h' -->
2350         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2351         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2352         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2353       </RTE_Components_h>
2354       <files>
2355         <!-- RTX documentation -->
2356         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2357
2358         <!-- RTX header files -->
2359         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2360         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2361
2362         <!-- RTX configuration -->
2363         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2364         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2365
2366         <!-- RTX templates -->
2367         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2368         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2369         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2370         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2371         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2372         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2373         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2374         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2375         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2376
2377         <!-- RTX sources (core) -->
2378         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2379         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2380         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2381         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2382         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2383         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2384         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2385         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2386         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2387         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2388         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2389         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2390         <!-- RTX sources (library configuration) -->
2391         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2392         <!-- RTX sources (handlers ARMCC) -->
2393         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2394         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2395         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2396         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2397         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2398         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2399         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2400         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2401         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2402         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2403         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2404         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2405         <!-- RTX sources (handlers GCC) -->
2406         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2407         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2408         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2409         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2410         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2411         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2412         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2413         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2414         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2415         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2416         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2417         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2418       </files>
2419     </component>
2420     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.1.0" Capiversion="2.1" condition="RTOS2 RTX5 NS">
2421       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2422       <RTE_Components_h>
2423         <!-- the following content goes into file 'RTE_Components.h' -->
2424         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2425         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2426         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2427         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2428       </RTE_Components_h>
2429       <files>
2430         <!-- RTX documentation -->
2431         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2432
2433         <!-- RTX header files -->
2434         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2435         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2436
2437         <!-- RTX configuration -->
2438         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2439         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2440
2441         <!-- RTX templates -->
2442         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2443         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2444         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2445         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2446         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2447         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2448         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2449         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2450         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2451
2452         <!-- RTX sources (core) -->
2453         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2454         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2455         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2456         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2457         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2458         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2459         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2460         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2461         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2462         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2463         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2464         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2465         <!-- RTX sources (library configuration) -->
2466         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2467         <!-- RTX sources (ARMCC handlers) -->
2468         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2469         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2470         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2471         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2472         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2473         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2474         <!-- RTX sources (GCC handlers) -->
2475         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2476         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2477         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2478         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2479         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2480         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2481       </files>
2482     </component>
2483
2484   </components>
2485
2486   <boards>
2487     <board name="uVision Simulator" vendor="Keil">
2488       <description>uVision Simulator</description>
2489       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2490       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2491       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2492       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2493       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2494       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2495       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2496       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2497       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2498       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2499       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2500       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2501       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2502       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2503       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2504       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2505       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2506    </board>
2507   </boards>
2508
2509   <examples>
2510     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2511       <description>DSP_Lib Class Marks example</description>
2512       <board name="uVision Simulator" vendor="Keil"/>
2513       <project>
2514         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2515       </project>
2516       <attributes>
2517         <component Cclass="CMSIS" Cgroup="CORE"/>
2518         <component Cclass="CMSIS" Cgroup="DSP"/>
2519         <component Cclass="Device" Cgroup="Startup"/>
2520         <category>Getting Started</category>
2521       </attributes>
2522     </example>
2523
2524     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2525       <description>DSP_Lib Convolution example</description>
2526       <board name="uVision Simulator" vendor="Keil"/>
2527       <project>
2528         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2529       </project>
2530       <attributes>
2531         <component Cclass="CMSIS" Cgroup="CORE"/>
2532         <component Cclass="CMSIS" Cgroup="DSP"/>
2533         <component Cclass="Device" Cgroup="Startup"/>
2534         <category>Getting Started</category>
2535       </attributes>
2536     </example>
2537
2538     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2539       <description>DSP_Lib Dotproduct example</description>
2540       <board name="uVision Simulator" vendor="Keil"/>
2541       <project>
2542         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2543       </project>
2544       <attributes>
2545         <component Cclass="CMSIS" Cgroup="CORE"/>
2546         <component Cclass="CMSIS" Cgroup="DSP"/>
2547         <component Cclass="Device" Cgroup="Startup"/>
2548         <category>Getting Started</category>
2549       </attributes>
2550     </example>
2551
2552     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2553       <description>DSP_Lib FFT Bin example</description>
2554       <board name="uVision Simulator" vendor="Keil"/>
2555       <project>
2556         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2557       </project>
2558       <attributes>
2559         <component Cclass="CMSIS" Cgroup="CORE"/>
2560         <component Cclass="CMSIS" Cgroup="DSP"/>
2561         <component Cclass="Device" Cgroup="Startup"/>
2562         <category>Getting Started</category>
2563       </attributes>
2564     </example>
2565
2566     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2567       <description>DSP_Lib FIR example</description>
2568       <board name="uVision Simulator" vendor="Keil"/>
2569       <project>
2570         <environment name="uv" load="arm_fir_example.uvprojx"/>
2571       </project>
2572       <attributes>
2573         <component Cclass="CMSIS" Cgroup="CORE"/>
2574         <component Cclass="CMSIS" Cgroup="DSP"/>
2575         <component Cclass="Device" Cgroup="Startup"/>
2576         <category>Getting Started</category>
2577       </attributes>
2578     </example>
2579
2580     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2581       <description>DSP_Lib Graphic Equalizer example</description>
2582       <board name="uVision Simulator" vendor="Keil"/>
2583       <project>
2584         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2585       </project>
2586       <attributes>
2587         <component Cclass="CMSIS" Cgroup="CORE"/>
2588         <component Cclass="CMSIS" Cgroup="DSP"/>
2589         <component Cclass="Device" Cgroup="Startup"/>
2590         <category>Getting Started</category>
2591       </attributes>
2592     </example>
2593
2594     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2595       <description>DSP_Lib Linear Interpolation example</description>
2596       <board name="uVision Simulator" vendor="Keil"/>
2597       <project>
2598         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2599       </project>
2600       <attributes>
2601         <component Cclass="CMSIS" Cgroup="CORE"/>
2602         <component Cclass="CMSIS" Cgroup="DSP"/>
2603         <component Cclass="Device" Cgroup="Startup"/>
2604         <category>Getting Started</category>
2605       </attributes>
2606     </example>
2607
2608     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2609       <description>DSP_Lib Matrix example</description>
2610       <board name="uVision Simulator" vendor="Keil"/>
2611       <project>
2612         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2613       </project>
2614       <attributes>
2615         <component Cclass="CMSIS" Cgroup="CORE"/>
2616         <component Cclass="CMSIS" Cgroup="DSP"/>
2617         <component Cclass="Device" Cgroup="Startup"/>
2618         <category>Getting Started</category>
2619       </attributes>
2620     </example>
2621
2622     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2623       <description>DSP_Lib Signal Convergence example</description>
2624       <board name="uVision Simulator" vendor="Keil"/>
2625       <project>
2626         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2627       </project>
2628       <attributes>
2629         <component Cclass="CMSIS" Cgroup="CORE"/>
2630         <component Cclass="CMSIS" Cgroup="DSP"/>
2631         <component Cclass="Device" Cgroup="Startup"/>
2632         <category>Getting Started</category>
2633       </attributes>
2634     </example>
2635
2636     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2637       <description>DSP_Lib Sinus/Cosinus example</description>
2638       <board name="uVision Simulator" vendor="Keil"/>
2639       <project>
2640         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2641       </project>
2642       <attributes>
2643         <component Cclass="CMSIS" Cgroup="CORE"/>
2644         <component Cclass="CMSIS" Cgroup="DSP"/>
2645         <component Cclass="Device" Cgroup="Startup"/>
2646         <category>Getting Started</category>
2647       </attributes>
2648     </example>
2649
2650     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2651       <description>DSP_Lib Variance example</description>
2652       <board name="uVision Simulator" vendor="Keil"/>
2653       <project>
2654         <environment name="uv" load="arm_variance_example.uvprojx"/>
2655       </project>
2656       <attributes>
2657         <component Cclass="CMSIS" Cgroup="CORE"/>
2658         <component Cclass="CMSIS" Cgroup="DSP"/>
2659         <component Cclass="Device" Cgroup="Startup"/>
2660         <category>Getting Started</category>
2661       </attributes>
2662     </example>
2663
2664     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2665       <description>CMSIS-RTOS2 Blinky example</description>
2666       <board name="uVision Simulator" vendor="Keil"/>
2667       <project>
2668         <environment name="uv" load="Blinky.uvprojx"/>
2669       </project>
2670       <attributes>
2671         <component Cclass="CMSIS" Cgroup="CORE"/>
2672         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2673         <component Cclass="Device" Cgroup="Startup"/>
2674         <category>Getting Started</category>
2675       </attributes>
2676     </example>
2677
2678     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2679       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2680       <board name="uVision Simulator" vendor="Keil"/>
2681       <project>
2682         <environment name="uv" load="Blinky.uvprojx"/>
2683       </project>
2684       <attributes>
2685         <component Cclass="CMSIS" Cgroup="CORE"/>
2686         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2687         <component Cclass="Device" Cgroup="Startup"/>
2688         <category>Getting Started</category>
2689       </attributes>
2690     </example>
2691
2692     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2693       <description>Bare-metal secure/non-secure example without RTOS</description>
2694       <board name="uVision Simulator" vendor="Keil"/>
2695       <project>
2696         <environment name="uv" load="NoRTOS.uvmpw"/>
2697       </project>
2698       <attributes>
2699         <component Cclass="CMSIS" Cgroup="CORE"/>
2700         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2701         <component Cclass="Device" Cgroup="Startup"/>
2702         <category>Getting Started</category>
2703       </attributes>
2704     </example>
2705
2706     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2707       <description>Secure/non-secure RTOS example with thread context management</description>
2708       <board name="uVision Simulator" vendor="Keil"/>
2709       <project>
2710         <environment name="uv" load="RTOS.uvmpw"/>
2711       </project>
2712       <attributes>
2713         <component Cclass="CMSIS" Cgroup="CORE"/>
2714         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2715         <component Cclass="Device" Cgroup="Startup"/>
2716         <category>Getting Started</category>
2717       </attributes>
2718     </example>
2719
2720     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2721       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2722       <board name="uVision Simulator" vendor="Keil"/>
2723       <project>
2724         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2725       </project>
2726       <attributes>
2727         <component Cclass="CMSIS" Cgroup="CORE"/>
2728         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2729         <component Cclass="Device" Cgroup="Startup"/>
2730         <category>Getting Started</category>
2731       </attributes>
2732     </example>
2733
2734   </examples>
2735
2736 </package>