begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.7.0-dev5">
  12       Active development...
  13       CMSIS-NN: 1.3.0 (see revision history for details)
  14         - Added MVE support
  15         - Further optimizations for kernels using DSP extension
  16     </release>
  17     <release version="5.7.0-dev4">
  18       CMSIS-DSP: 1.8.0 (see revision history for details)
  19         - Added new functions and function groups
  20         - Added MVE support
  21     </release>
  22     <release version="5.7.0-dev3">
  23       CMSIS-Core(M):
  24         - L1 Cache functions for Armv7-M and later
  25       Devices:
  26         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  27     </release>
  28     <release version="5.7.0-dev2">
  29       CMSIS-Core(M):
  30         - Cortex-M55 cpu support
  31         - Cortex-M55 core header file
  32         - PMU header file (place holder)
  33       Devices:
  34         - ARMCM55 device
  35     </release>
  36     <release version="5.7.0-dev1">
  37       Active development...
  38       CMSIS-Core(M): 5.4.0 (see revision history for details)
  39          - Enhanced MVE support for Armv8.1-MML
  40       CMSIS-RTOS2:
  41         - RTX 5.5.2 (see revision history for details)
  42       CMSIS-Driver: 2.8.0
  43         - removed volatile from status related typedefs in APIs
  44         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  45       CMSIS-Pack:
  46         - added custom attribute to components that require custom implementation
  47       Devices:
  48         - ARMv81MML startup code recognizing __MVE_USED macro
  49         - Refactored vector table references for all Cortex-M devices
  50     </release>
  51     <release version="5.6.0" date="2019-07-10">
  52       CMSIS-Core(M): 5.3.0 (see revision history for details)
  53         - Added provisions for compiler-independent C startup code.
  54       CMSIS-Core(A): 1.1.4 (see revision history for details)
  55         - Fixed __FPU_Enable.
  56       CMSIS-DSP: 1.7.0 (see revision history for details)
  57         - New Neon versions of f32 functions
  58         - Python wrapper
  59         - Preliminary cmake build
  60         - Compilation flags for FFTs
  61         - Changes to arm_math.h
  62       CMSIS-NN: 1.2.0 (see revision history for details)
  63         - New function for depthwise convolution with asymmetric quantization.
  64         - New support functions for requantization.
  65       CMSIS-RTOS:
  66         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  67       CMSIS-RTOS2:
  68         - RTX 5.5.1 (see revision history for details)
  69       CMSIS-Driver: 2.7.1
  70         - WiFi Interface API 1.0.0
  71       Devices:
  72         - Generalized C startup code for all Cortex-M familiy devices.
  73         - Updated Cortex-A default memory regions and MMU configurations
  74         - Moved Cortex-A memory and system config files to avoid include path issues
  75     </release>
  76     <release version="5.5.1" date="2019-03-20">
  77       The following folders are deprecated
  78         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  79
  80       CMSIS-Core(M): 5.2.1 (see revision history for details)
  81         - Fixed compilation issue in cmsis_armclang_ltm.h
  82     </release>
  83     <release version="5.5.0" date="2019-03-18">
  84       The following folders have been removed:
  85         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  86         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  87       The following folders are deprecated
  88         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  89
  90       CMSIS-Core(M): 5.2.0 (see revision history for details)
  91         - Reworked Stack/Heap configuration for ARM startup files.
  92         - Added Cortex-M35P device support.
  93         - Added generic Armv8.1-M Mainline device support.
  94       CMSIS-Core(A): 1.1.3 (see revision history for details)
  95       CMSIS-DSP: 1.6.0 (see revision history for details)
  96         - reworked DSP library source files
  97         - reworked DSP library documentation
  98         - Changed DSP folder structure
  99         - moved DSP libraries to folder ./DSP/Lib
 100         - ARM DSP Libraries are built with ARMCLANG
 101         - Added DSP Libraries Source variant
 102       CMSIS-RTOS2:
 103         - RTX 5.5.0 (see revision history for details)
 104       CMSIS-Driver: 2.7.0
 105         - Added WiFi Interface API 1.0.0-beta
 106         - Added components for project specific driver implementations
 107       CMSIS-Pack: 1.6.0 (see revision history for details)
 108       Devices:
 109         - Added Cortex-M35P and ARMv81MML device templates.
 110         - Fixed C-Startup Code for GCC (aligned with other compilers)
 111       Utilities:
 112         - SVDConv 3.3.25
 113         - PackChk 1.3.82
 114     </release>
 115     <release version="5.4.0" date="2018-08-01">
 116       Aligned pack structure with repository.
 117       The following folders are deprecated:
 118         - CMSIS/Include/
 119         - CMSIS/DSP_Lib/
 120
 121       CMSIS-Core(M): 5.1.2 (see revision history for details)
 122         - Added Cortex-M1 support (beta).
 123       CMSIS-Core(A): 1.1.2 (see revision history for details)
 124       CMSIS-NN: 1.1.0
 125         - Added new math functions.
 126       CMSIS-RTOS2:
 127         - API 2.1.3 (see revision history for details)
 128         - RTX 5.4.0 (see revision history for details)
 129           * Updated exception handling on Cortex-A
 130       CMSIS-Driver:
 131         - Flash Driver API V2.2.0
 132       Utilities:
 133         - SVDConv 3.3.21
 134         - PackChk 1.3.71
 135     </release>
 136     <release version="5.3.0" date="2018-02-22">
 137       Updated Arm company brand.
 138       CMSIS-Core(M): 5.1.1 (see revision history for details)
 139       CMSIS-Core(A): 1.1.1 (see revision history for details)
 140       CMSIS-DAP: 2.0.0 (see revision history for details)
 141       CMSIS-NN: 1.0.0
 142         - Initial contribution of the bare metal Neural Network Library.
 143       CMSIS-RTOS2:
 144         - RTX 5.3.0 (see revision history for details)
 145         - OS Tick API 1.0.1
 146     </release>
 147     <release version="5.2.0" date="2017-11-16">
 148       CMSIS-Core(M): 5.1.0 (see revision history for details)
 149         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 150         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 151       CMSIS-Core(A): 1.1.0 (see revision history for details)
 152         - Added compiler_iccarm.h.
 153         - Added additional access functions for physical timer.
 154       CMSIS-DAP: 1.2.0 (see revision history for details)
 155       CMSIS-DSP: 1.5.2 (see revision history for details)
 156       CMSIS-Driver: 2.6.0 (see revision history for details)
 157         - CAN Driver API V1.2.0
 158         - NAND Driver API V2.3.0
 159       CMSIS-RTOS:
 160         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 161       CMSIS-RTOS2:
 162         - API 2.1.2 (see revision history for details)
 163         - RTX 5.2.3 (see revision history for details)
 164       Devices:
 165         - Added GCC startup and linker script for Cortex-A9.
 166         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 167         - Added IAR startup code for Cortex-A9
 168     </release>
 169     <release version="5.1.1" date="2017-09-19">
 170       CMSIS-RTOS2:
 171       - RTX 5.2.1 (see revision history for details)
 172     </release>
 173     <release version="5.1.0" date="2017-08-04">
 174       CMSIS-Core(M): 5.0.2 (see revision history for details)
 175       - Changed Version Control macros to be core agnostic.
 176       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 177       CMSIS-Core(A): 1.0.0 (see revision history for details)
 178       - Initial release
 179       - IRQ Controller API 1.0.0
 180       CMSIS-Driver: 2.05 (see revision history for details)
 181       - All typedefs related to status have been made volatile.
 182       CMSIS-RTOS2:
 183       - API 2.1.1 (see revision history for details)
 184       - RTX 5.2.0 (see revision history for details)
 185       - OS Tick API 1.0.0
 186       CMSIS-DSP: 1.5.2 (see revision history for details)
 187       - Fixed GNU Compiler specific diagnostics.
 188       CMSIS-Pack: 1.5.0 (see revision history for details)
 189       - added System Description File (*.SDF) Format
 190       CMSIS-Zone: 0.0.1 (Preview)
 191       - Initial specification draft
 192     </release>
 193     <release version="5.0.1" date="2017-02-03">
 194       Package Description:
 195       - added taxonomy for Cclass RTOS
 196       CMSIS-RTOS2:
 197       - API 2.1   (see revision history for details)
 198       - RTX 5.1.0 (see revision history for details)
 199       CMSIS-Core: 5.0.1 (see revision history for details)
 200       - Added __PACKED_STRUCT macro
 201       - Added uVisior support
 202       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 203       - Updated template for secure main function (main_s.c)
 204       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 205       CMSIS-DSP: 1.5.1 (see revision history for details)
 206       - added ARMv8M DSP libraries.
 207       CMSIS-Pack:1.4.9 (see revision history for details)
 208       - added Pack Index File specification and schema file
 209     </release>
 210     <release version="5.0.0" date="2016-11-11">
 211       Changed open source license to Apache 2.0
 212       CMSIS_Core:
 213        - Added support for Cortex-M23 and Cortex-M33.
 214        - Added ARMv8-M device configurations for mainline and baseline.
 215        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 216        - Added cmsis_compiler.h to unify compiler behaviour.
 217        - Updated function SCB_EnableICache (for Cortex-M7).
 218        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 219       CMSIS-RTOS:
 220         - bug fix in RTX 4.82 (see revision history for details)
 221       CMSIS-RTOS2:
 222         - new API including compatibility layer to CMSIS-RTOS
 223         - reference implementation based on RTX5
 224         - supports all Cortex-M variants including TrustZone for ARMv8-M
 225       CMSIS-SVD:
 226        - reworked SVD format documentation
 227        - removed SVD file database documentation as SVD files are distributed in packs
 228        - updated SVDConv for Win32 and Linux
 229       CMSIS-DSP:
 230        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 231        - Added DSP libraries build projects to CMSIS pack.
 232     </release>
 233     <release version="4.5.0" date="2015-10-28">
 234       - CMSIS-Core     4.30.0  (see revision history for details)
 235       - CMSIS-DAP      1.1.0   (unchanged)
 236       - CMSIS-Driver   2.04.0  (see revision history for details)
 237       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 238       - CMSIS-Pack     1.4.1   (see revision history for details)
 239       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 240       - CMSIS-SVD      1.3.1   (see revision history for details)
 241     </release>
 242     <release version="4.4.0" date="2015-09-11">
 243       - CMSIS-Core     4.20   (see revision history for details)
 244       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 245       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 246       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 247       - CMSIS-RTOS
 248         -- API         1.02   (unchanged)
 249         -- RTX         4.79   (see revision history for details)
 250       - CMSIS-SVD      1.3.0  (see revision history for details)
 251       - CMSIS-DAP      1.1.0  (extended with SWO support)
 252     </release>
 253     <release version="4.3.0" date="2015-03-20">
 254       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 255       - CMSIS-DSP      1.4.5  (see revision history for details)
 256       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 257       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 258       - CMSIS-RTOS
 259         -- API         1.02   (unchanged)
 260         -- RTX         4.78   (see revision history for details)
 261       - CMSIS-SVD      1.2    (unchanged)
 262     </release>
 263     <release version="4.2.0" date="2014-09-24">
 264       Adding Cortex-M7 support
 265       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 266       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 267       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 268       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 269       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 270     </release>
 271     <release version="4.1.1" date="2014-06-30">
 272       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 273     </release>
 274     <release version="4.1.0" date="2014-06-12">
 275       - CMSIS-Driver   2.02  (incompatible update)
 276       - CMSIS-Pack     1.3   (see revision history for details)
 277       - CMSIS-DSP      1.4.2 (unchanged)
 278       - CMSIS-Core     3.30  (unchanged)
 279       - CMSIS-RTOS RTX 4.74  (unchanged)
 280       - CMSIS-RTOS API 1.02  (unchanged)
 281       - CMSIS-SVD      1.10  (unchanged)
 282       PACK:
 283       - removed G++ specific files from PACK
 284       - added Component Startup variant "C Startup"
 285       - added Pack Checking Utility
 286       - updated conditions to reflect tool-chain dependency
 287       - added Taxonomy for Graphics
 288       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 289     </release>
 290     <!-- release version="4.0.0">
 291       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 292       - CMSIS-Pack     1.1   Preliminary
 293       - CMSIS-DSP      1.4.2 (see revision history for details)
 294       - CMSIS-Core     3.30  (see revision history for details)
 295       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 296       - CMSIS-RTOS API 1.02  (unchanged)
 297       - CMSIS-SVD      1.10  (unchanged)
 298     </release -->
 299     <release version="3.20.4" date="2014-02-20">
 300       - CMSIS-RTOS 4.74 (see revision history for details)
 301       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 302     </release>
 303     <!-- release version="3.20.3">
 304       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 305       - CMSIS-RTOS 4.73 (see revision history for details)
 306     </release -->
 307     <!-- release version="3.20.2">
 308       - CMSIS-Pack documentation has been added
 309       - CMSIS-Drivers header and documentation have been added to PACK
 310       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 311     </release -->
 312     <!-- release version="3.20.1">
 313       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 314       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 315     </release -->
 316     <!-- release version="3.20.0">
 317       The software portions that are deployed in the application program are now under a BSD license which allows usage
 318       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 319       The individual components have been update as listed below:
 320       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 321       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 322       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 323       - CMSIS-SVD is unchanged.
 324     </release -->
 325   </releases>
 326
 327   <taxonomy>
 328     <description Cclass="Audio">Software components for audio processing</description>
 329     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 330     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 331     <description Cclass="Compiler">Compiler Software Extensions</description>
 332     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 333     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 334     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 335     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 336     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 337     <description Cclass="File System">File Drive Support and File System</description>
 338     <description Cclass="IoT Client">IoT cloud client connector</description>
 339     <description Cclass="IoT Service">IoT specific services</description>
 340     <description Cclass="IoT Utility">IoT specific software utility</description>
 341     <description Cclass="Graphics">Graphical User Interface</description>
 342     <description Cclass="Network">Network Stack using Internet Protocols</description>
 343     <description Cclass="RTOS">Real-time Operating System</description>
 344     <description Cclass="Security">Encryption for secure communication or storage</description>
 345     <description Cclass="USB">Universal Serial Bus Stack</description>
 346     <description Cclass="Utility">Generic software utility components</description>
 347   </taxonomy>
 348
 349   <devices>
 350     <!-- ******************************  Cortex-M0  ****************************** -->
 351     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 352       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 353       <description>
 354 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 355 - simple, easy-to-use programmers model
 356 - highly efficient ultra-low power operation
 357 - excellent code density
 358 - deterministic, high-performance interrupt handling
 359 - upward compatibility with the rest of the Cortex-M processor family.
 360       </description>
 361       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 362       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 363       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 364       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 365
 366       <device Dname="ARMCM0">
 367         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 368         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 369       </device>
 370     </family>
 371
 372     <!-- ******************************  Cortex-M0P  ****************************** -->
 373     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 374       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 375       <description>
 376 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 377 - simple, easy-to-use programmers model
 378 - highly efficient ultra-low power operation
 379 - excellent code density
 380 - deterministic, high-performance interrupt handling
 381 - upward compatibility with the rest of the Cortex-M processor family.
 382       </description>
 383       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 384       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 385       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 386       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 387
 388       <device Dname="ARMCM0P">
 389         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 390         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 391       </device>
 392
 393       <device Dname="ARMCM0P_MPU">
 394         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 395         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 396       </device>
 397     </family>
 398
 399     <!-- ******************************  Cortex-M1  ****************************** -->
 400     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 401       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 402       <description>
 403 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 404 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 405       </description>
 406       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 407       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 408       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 409       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 410
 411       <device Dname="ARMCM1">
 412         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 413         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 414       </device>
 415     </family>
 416
 417     <!-- ******************************  Cortex-M3  ****************************** -->
 418     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 419       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 420       <description>
 421 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 422 - simple, easy-to-use programmers model
 423 - highly efficient ultra-low power operation
 424 - excellent code density
 425 - deterministic, high-performance interrupt handling
 426 - upward compatibility with the rest of the Cortex-M processor family.
 427       </description>
 428       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 429       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 430       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 431       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 432
 433       <device Dname="ARMCM3">
 434         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 435         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 436       </device>
 437     </family>
 438
 439     <!-- ******************************  Cortex-M4  ****************************** -->
 440     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 441       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 442       <description>
 443 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 444 - simple, easy-to-use programmers model
 445 - highly efficient ultra-low power operation
 446 - excellent code density
 447 - deterministic, high-performance interrupt handling
 448 - upward compatibility with the rest of the Cortex-M processor family.
 449       </description>
 450       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 451       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 452       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 453       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 454
 455       <device Dname="ARMCM4">
 456         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 457         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 458       </device>
 459
 460       <device Dname="ARMCM4_FP">
 461         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 462         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 463       </device>
 464     </family>
 465
 466     <!-- ******************************  Cortex-M7  ****************************** -->
 467     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 468       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 469       <description>
 470 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 471 - simple, easy-to-use programmers model
 472 - highly efficient ultra-low power operation
 473 - excellent code density
 474 - deterministic, high-performance interrupt handling
 475 - upward compatibility with the rest of the Cortex-M processor family.
 476       </description>
 477       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 478       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 479       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 480       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 481
 482       <device Dname="ARMCM7">
 483         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 484         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 485       </device>
 486
 487       <device Dname="ARMCM7_SP">
 488         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 489         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 490       </device>
 491
 492       <device Dname="ARMCM7_DP">
 493         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 494         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 495       </device>
 496     </family>
 497
 498     <!-- ******************************  Cortex-M23  ********************** -->
 499     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 500       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 501       <description>
 502 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 503 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 504 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 505       </description>
 506       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 507       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 508       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 509       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 510       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 511       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 512
 513       <device Dname="ARMCM23">
 514         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 515         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 516       </device>
 517
 518       <device Dname="ARMCM23_TZ">
 519         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 520         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 521       </device>
 522     </family>
 523
 524     <!-- ******************************  Cortex-M33  ****************************** -->
 525     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 526       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 527       <description>
 528 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 529 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 530       </description>
 531       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 532       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 533       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 534       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 535       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 536       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 537
 538       <device Dname="ARMCM33">
 539         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 540         <description>
 541           no DSP Instructions, no Floating Point Unit, no TrustZone
 542         </description>
 543         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 544       </device>
 545
 546       <device Dname="ARMCM33_TZ">
 547         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 548         <description>
 549           no DSP Instructions, no Floating Point Unit, TrustZone
 550         </description>
 551         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 552       </device>
 553
 554       <device Dname="ARMCM33_DSP_FP">
 555         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 556         <description>
 557           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 558         </description>
 559         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 560       </device>
 561
 562       <device Dname="ARMCM33_DSP_FP_TZ">
 563         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 564         <description>
 565           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 566         </description>
 567         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 568       </device>
 569     </family>
 570
 571     <!-- ******************************  Cortex-M35P  ****************************** -->
 572     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 573       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 574       <description>
 575 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 576 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 577       </description>
 578
 579       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 580       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 581       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 582       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 583       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 584       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 585
 586       <device Dname="ARMCM35P">
 587         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 588         <description>
 589           no DSP Instructions, no Floating Point Unit, no TrustZone
 590         </description>
 591         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 592       </device>
 593
 594       <device Dname="ARMCM35P_TZ">
 595         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 596         <description>
 597           no DSP Instructions, no Floating Point Unit, TrustZone
 598         </description>
 599         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 600       </device>
 601
 602       <device Dname="ARMCM35P_DSP_FP">
 603         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 604         <description>
 605           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 606         </description>
 607         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 608       </device>
 609
 610       <device Dname="ARMCM35P_DSP_FP_TZ">
 611         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 612         <description>
 613           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 614         </description>
 615         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 616       </device>
 617     </family>
 618
 619     <!-- ******************************  Cortex-M55  ****************************** -->
 620     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 621       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 622       <description>
 623 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 624 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 625 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 626       </description>
 627
 628       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 629       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 630       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 631       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 632       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 633       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 634
 635       <device Dname="ARMCM55">
 636         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 637         <description>
 638           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 639         </description>
 640         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 641       </device>
 642     </family>
 643
 644     <!-- ******************************  ARMSC000  ****************************** -->
 645     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 646       <description>
 647 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 648 - simple, easy-to-use programmers model
 649 - highly efficient ultra-low power operation
 650 - excellent code density
 651 - deterministic, high-performance interrupt handling
 652       </description>
 653       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 654       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 655       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 656       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 657
 658       <device Dname="ARMSC000">
 659         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 660         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 661       </device>
 662     </family>
 663
 664     <!-- ******************************  ARMSC300  ****************************** -->
 665     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 666       <description>
 667 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 668 - simple, easy-to-use programmers model
 669 - highly efficient ultra-low power operation
 670 - excellent code density
 671 - deterministic, high-performance interrupt handling
 672       </description>
 673       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 674       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 675       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 676       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 677
 678       <device Dname="ARMSC300">
 679         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 680         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 681       </device>
 682     </family>
 683
 684     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 685     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 686       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 687       <description>
 688 Armv8-M Baseline based device with TrustZone
 689       </description>
 690       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 691       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 692       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 693       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 694       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 695       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 696
 697       <device Dname="ARMv8MBL">
 698         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 699         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 700       </device>
 701     </family>
 702
 703     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 704     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 705       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 706       <description>
 707 Armv8-M Mainline based device with TrustZone
 708       </description>
 709       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 710       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 711       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 712       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 713       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 714       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 715
 716       <device Dname="ARMv8MML">
 717         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 718         <description>
 719           no DSP Instructions, no Floating Point Unit, TrustZone
 720         </description>
 721         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 722       </device>
 723
 724       <device Dname="ARMv8MML_DSP">
 725         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 726         <description>
 727           DSP Instructions, no Floating Point Unit, TrustZone
 728         </description>
 729         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 730       </device>
 731
 732       <device Dname="ARMv8MML_SP">
 733         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 734         <description>
 735           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 736         </description>
 737         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 738       </device>
 739
 740       <device Dname="ARMv8MML_DSP_SP">
 741         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 742         <description>
 743           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 744         </description>
 745         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 746       </device>
 747
 748       <device Dname="ARMv8MML_DP">
 749         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 750         <description>
 751           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 752         </description>
 753         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 754       </device>
 755
 756       <device Dname="ARMv8MML_DSP_DP">
 757         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 758         <description>
 759           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 760         </description>
 761         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 762       </device>
 763     </family>
 764
 765     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 766     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 767       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 768       <description>
 769 Armv8.1-M Mainline based device with TrustZone and MVE
 770       </description>
 771       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 772       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 773       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 774       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 775       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 776       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 777
 778
 779       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 780         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 781         <description>
 782           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 783         </description>
 784         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 785       </device>
 786     </family>
 787
 788     <!-- ******************************  Cortex-A5  ****************************** -->
 789     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 790       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 791       <description>
 792 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 793 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 794 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 795       </description>
 796
 797       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 798       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 799       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 800       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 801
 802       <device Dname="ARMCA5">
 803         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 804         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 805       </device>
 806     </family>
 807
 808     <!-- ******************************  Cortex-A7  ****************************** -->
 809     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 810       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 811       <description>
 812 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 813 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 814 an optional integrated GIC, and an optional L2 cache controller.
 815       </description>
 816
 817       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 818       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 819       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 820       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 821
 822       <device Dname="ARMCA7">
 823         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 824         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 825       </device>
 826     </family>
 827
 828     <!-- ******************************  Cortex-A9  ****************************** -->
 829     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 830       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 831       <description>
 832 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 833 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 834 and 8-bit Java bytecodes in Jazelle state.
 835       </description>
 836
 837       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 838       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 839       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 840       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 841
 842       <device Dname="ARMCA9">
 843         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 844         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 845       </device>
 846     </family>
 847   </devices>
 848
 849
 850   <apis>
 851     <!-- CMSIS Device API -->
 852     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 853       <description>Device interrupt controller interface</description>
 854       <files>
 855         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 856       </files>
 857     </api>
 858     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 859       <description>RTOS Kernel system tick timer interface</description>
 860       <files>
 861         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 862       </files>
 863     </api>
 864     <!-- CMSIS-RTOS API -->
 865     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 866       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 867       <files>
 868         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 869       </files>
 870     </api>
 871     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 872       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 873       <files>
 874         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 875         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 876       </files>
 877     </api>
 878     <!-- CMSIS Driver API -->
 879     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 880       <description>USART Driver API for Cortex-M</description>
 881       <files>
 882         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 883         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 884       </files>
 885     </api>
 886     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 887       <description>SPI Driver API for Cortex-M</description>
 888       <files>
 889         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 890         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 891       </files>
 892     </api>
 893     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 894       <description>SAI Driver API for Cortex-M</description>
 895       <files>
 896         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 897         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 898       </files>
 899     </api>
 900     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 901       <description>I2C Driver API for Cortex-M</description>
 902       <files>
 903         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 904         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 905       </files>
 906     </api>
 907     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 908       <description>CAN Driver API for Cortex-M</description>
 909       <files>
 910         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 911         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 912       </files>
 913     </api>
 914     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 915       <description>Flash Driver API for Cortex-M</description>
 916       <files>
 917         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 918         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 919       </files>
 920     </api>
 921     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 922       <description>MCI Driver API for Cortex-M</description>
 923       <files>
 924         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 925         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 926       </files>
 927     </api>
 928     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 929       <description>NAND Flash Driver API for Cortex-M</description>
 930       <files>
 931         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 932         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 933       </files>
 934     </api>
 935     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 936       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 937       <files>
 938         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 939         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 940         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 941       </files>
 942     </api>
 943     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 944       <description>Ethernet MAC Driver API for Cortex-M</description>
 945       <files>
 946         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 947         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 948       </files>
 949     </api>
 950     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 951       <description>Ethernet PHY Driver API for Cortex-M</description>
 952       <files>
 953         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 954         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 955       </files>
 956     </api>
 957     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 958       <description>USB Device Driver API for Cortex-M</description>
 959       <files>
 960         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 961         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 962       </files>
 963     </api>
 964     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
 965       <description>USB Host Driver API for Cortex-M</description>
 966       <files>
 967         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 968         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 969       </files>
 970     </api>
 971     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
 972       <description>WiFi driver</description>
 973       <files>
 974         <file category="doc"  name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 975         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 976       </files>
 977     </api>
 978   </apis>
 979
 980   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 981   <conditions>
 982     <!-- compiler -->
 983     <condition id="ARMCC6">
 984       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 985       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 986     </condition>
 987     <condition id="ARMCC5">
 988       <require Tcompiler="ARMCC" Toptions="AC5"/>
 989     </condition>
 990     <condition id="ARMCC">
 991       <require Tcompiler="ARMCC"/>
 992     </condition>
 993     <condition id="GCC">
 994       <require Tcompiler="GCC"/>
 995     </condition>
 996     <condition id="IAR">
 997       <require Tcompiler="IAR"/>
 998     </condition>
 999     <condition id="ARMCC GCC">
1000       <accept Tcompiler="ARMCC"/>
1001       <accept Tcompiler="GCC"/>
1002     </condition>
1003     <condition id="ARMCC GCC IAR">
1004       <accept Tcompiler="ARMCC"/>
1005       <accept Tcompiler="GCC"/>
1006       <accept Tcompiler="IAR"/>
1007     </condition>
1008
1009     <!-- Arm architecture -->
1010     <condition id="ARMv6-M Device">
1011       <description>Armv6-M architecture based device</description>
1012       <accept Dcore="Cortex-M0"/>
1013       <accept Dcore="Cortex-M1"/>
1014       <accept Dcore="Cortex-M0+"/>
1015       <accept Dcore="SC000"/>
1016     </condition>
1017     <condition id="ARMv7-M Device">
1018       <description>Armv7-M architecture based device</description>
1019       <accept Dcore="Cortex-M3"/>
1020       <accept Dcore="Cortex-M4"/>
1021       <accept Dcore="Cortex-M7"/>
1022       <accept Dcore="SC300"/>
1023     </condition>
1024     <condition id="ARMv8-M Device">
1025       <description>Armv8-M architecture based device</description>
1026       <accept Dcore="ARMV8MBL"/>
1027       <accept Dcore="ARMV8MML"/>
1028       <accept Dcore="ARMV81MML"/>
1029       <accept Dcore="Cortex-M23"/>
1030       <accept Dcore="Cortex-M33"/>
1031       <accept Dcore="Cortex-M35P"/>
1032       <accept Dcore="Cortex-M55"/>
1033     </condition>
1034     <condition id="ARMv6_7-M Device">
1035       <description>Armv6_7-M architecture based device</description>
1036       <accept condition="ARMv6-M Device"/>
1037       <accept condition="ARMv7-M Device"/>
1038     </condition>
1039     <condition id="ARMv6_7_8-M Device">
1040       <description>Armv6_7_8-M architecture based device</description>
1041       <accept condition="ARMv6-M Device"/>
1042       <accept condition="ARMv7-M Device"/>
1043       <accept condition="ARMv8-M Device"/>
1044     </condition>
1045     <condition id="ARMv7-A Device">
1046       <description>Armv7-A architecture based device</description>
1047       <accept Dcore="Cortex-A5"/>
1048       <accept Dcore="Cortex-A7"/>
1049       <accept Dcore="Cortex-A9"/>
1050     </condition>
1051
1052     <condition id="TrustZone">
1053       <description>TrustZone</description>
1054       <require Dtz="TZ"/>
1055     </condition>
1056     <condition id="TZ Secure">
1057       <description>TrustZone (Secure)</description>
1058       <require Dtz="TZ"/>
1059       <require Dsecure="Secure"/>
1060     </condition>
1061     <condition id="TZ Non-secure">
1062       <description>TrustZone (Non-secure)</description>
1063       <require Dtz="TZ"/>
1064       <require Dsecure="Non-secure"/>
1065     </condition>
1066
1067     <!-- ARM core -->
1068     <condition id="CM0">
1069       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1070       <accept Dcore="Cortex-M0"/>
1071       <accept Dcore="Cortex-M0+"/>
1072       <accept Dcore="SC000"/>
1073     </condition>
1074     <condition id="CM1">
1075       <description>Cortex-M1</description>
1076       <require Dcore="Cortex-M1"/>
1077     </condition>
1078     <condition id="CM3">
1079       <description>Cortex-M3 or SC300 processor based device</description>
1080       <accept Dcore="Cortex-M3"/>
1081       <accept Dcore="SC300"/>
1082     </condition>
1083     <condition id="CM4">
1084       <description>Cortex-M4 processor based device</description>
1085       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1086     </condition>
1087     <condition id="CM4_FP">
1088       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1089       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1090       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1091       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1092     </condition>
1093     <condition id="CM7">
1094       <description>Cortex-M7 processor based device</description>
1095       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1096     </condition>
1097     <condition id="CM7_FP">
1098       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1099       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1100       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1101     </condition>
1102     <condition id="CM7_SP">
1103       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1104       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1105     </condition>
1106     <condition id="CM7_DP">
1107       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1108       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1109     </condition>
1110     <condition id="CM23">
1111       <description>Cortex-M23 processor based device</description>
1112       <require Dcore="Cortex-M23"/>
1113     </condition>
1114     <condition id="CM33">
1115       <description>Cortex-M33 processor based device</description>
1116       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1117     </condition>
1118     <condition id="CM33_FP">
1119       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1120       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1121     </condition>
1122     <condition id="CM35P">
1123       <description>Cortex-M35P processor based device</description>
1124       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1125     </condition>
1126     <condition id="CM35P_FP">
1127       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1128       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1129     </condition>
1130     <condition id="CM55">
1131       <description>Cortex-M55 processor based device</description>
1132       <require Dcore="Cortex-M55"/>
1133     </condition>
1134     <condition id="ARMv8MBL">
1135       <description>Armv8-M Baseline processor based device</description>
1136       <require Dcore="ARMV8MBL"/>
1137     </condition>
1138     <condition id="ARMv8MML">
1139       <description>Armv8-M Mainline processor based device</description>
1140       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1141     </condition>
1142     <condition id="ARMv8MML_FP">
1143       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1144       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1145       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1146     </condition>
1147
1148     <condition id="CM33_NODSP_NOFPU">
1149       <description>CM33, no DSP, no FPU</description>
1150       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1151     </condition>
1152     <condition id="CM33_DSP_NOFPU">
1153       <description>CM33, DSP, no FPU</description>
1154       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1155     </condition>
1156     <condition id="CM33_NODSP_SP">
1157       <description>CM33, no DSP, SP FPU</description>
1158       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1159     </condition>
1160     <condition id="CM33_DSP_SP">
1161       <description>CM33, DSP, SP FPU</description>
1162       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1163     </condition>
1164
1165     <condition id="CM35P_NODSP_NOFPU">
1166       <description>CM35P, no DSP, no FPU</description>
1167       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1168     </condition>
1169     <condition id="CM35P_DSP_NOFPU">
1170       <description>CM35P, DSP, no FPU</description>
1171       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1172     </condition>
1173     <condition id="CM35P_NODSP_SP">
1174       <description>CM35P, no DSP, SP FPU</description>
1175       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1176     </condition>
1177     <condition id="CM35P_DSP_SP">
1178       <description>CM35P, DSP, SP FPU</description>
1179       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1180     </condition>
1181
1182     <condition id="ARMv8MML_NODSP_NOFPU">
1183       <description>Armv8-M Mainline, no DSP, no FPU</description>
1184       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1185     </condition>
1186     <condition id="ARMv8MML_DSP_NOFPU">
1187       <description>Armv8-M Mainline, DSP, no FPU</description>
1188       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1189     </condition>
1190     <condition id="ARMv8MML_NODSP_SP">
1191       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1192       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1193     </condition>
1194     <condition id="ARMv8MML_DSP_SP">
1195       <description>Armv8-M Mainline, DSP, SP FPU</description>
1196       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1197     </condition>
1198
1199     <condition id="CA5_CA9">
1200       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1201       <accept Dcore="Cortex-A5"/>
1202       <accept Dcore="Cortex-A9"/>
1203     </condition>
1204
1205     <condition id="CA7">
1206       <description>Cortex-A7 processor based device</description>
1207       <accept Dcore="Cortex-A7"/>
1208     </condition>
1209
1210     <!-- ARMCC compiler -->
1211     <condition id="CA_ARMCC5">
1212       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1213       <require condition="ARMv7-A Device"/>
1214       <require condition="ARMCC5"/>
1215     </condition>
1216     <condition id="CA_ARMCC6">
1217       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1218       <require condition="ARMv7-A Device"/>
1219       <require condition="ARMCC6"/>
1220     </condition>
1221
1222     <condition id="CM0_ARMCC">
1223       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1224       <require condition="CM0"/>
1225       <require Tcompiler="ARMCC"/>
1226     </condition>
1227     <condition id="CM0_LE_ARMCC">
1228       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1229       <require condition="CM0_ARMCC"/>
1230       <require Dendian="Little-endian"/>
1231     </condition>
1232     <condition id="CM0_BE_ARMCC">
1233       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1234       <require condition="CM0_ARMCC"/>
1235       <require Dendian="Big-endian"/>
1236     </condition>
1237
1238     <condition id="CM1_ARMCC">
1239       <description>Cortex-M1 based device for the Arm Compiler</description>
1240       <require condition="CM1"/>
1241       <require Tcompiler="ARMCC"/>
1242     </condition>
1243     <condition id="CM1_LE_ARMCC">
1244       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1245       <require condition="CM1_ARMCC"/>
1246       <require Dendian="Little-endian"/>
1247     </condition>
1248     <condition id="CM1_BE_ARMCC">
1249       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1250       <require condition="CM1_ARMCC"/>
1251       <require Dendian="Big-endian"/>
1252     </condition>
1253
1254     <condition id="CM3_ARMCC">
1255       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1256       <require condition="CM3"/>
1257       <require Tcompiler="ARMCC"/>
1258     </condition>
1259     <condition id="CM3_LE_ARMCC">
1260       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1261       <require condition="CM3_ARMCC"/>
1262       <require Dendian="Little-endian"/>
1263     </condition>
1264     <condition id="CM3_BE_ARMCC">
1265       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1266       <require condition="CM3_ARMCC"/>
1267       <require Dendian="Big-endian"/>
1268     </condition>
1269
1270     <condition id="CM4_ARMCC">
1271       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1272       <require condition="CM4"/>
1273       <require Tcompiler="ARMCC"/>
1274     </condition>
1275     <condition id="CM4_LE_ARMCC">
1276       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1277       <require condition="CM4_ARMCC"/>
1278       <require Dendian="Little-endian"/>
1279     </condition>
1280     <condition id="CM4_BE_ARMCC">
1281       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1282       <require condition="CM4_ARMCC"/>
1283       <require Dendian="Big-endian"/>
1284     </condition>
1285
1286     <condition id="CM4_FP_ARMCC">
1287       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1288       <require condition="CM4_FP"/>
1289       <require Tcompiler="ARMCC"/>
1290     </condition>
1291     <condition id="CM4_FP_LE_ARMCC">
1292       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1293       <require condition="CM4_FP_ARMCC"/>
1294       <require Dendian="Little-endian"/>
1295     </condition>
1296     <condition id="CM4_FP_BE_ARMCC">
1297       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1298       <require condition="CM4_FP_ARMCC"/>
1299       <require Dendian="Big-endian"/>
1300     </condition>
1301
1302     <condition id="CM7_ARMCC">
1303       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1304       <require condition="CM7"/>
1305       <require Tcompiler="ARMCC"/>
1306     </condition>
1307     <condition id="CM7_LE_ARMCC">
1308       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1309       <require condition="CM7_ARMCC"/>
1310       <require Dendian="Little-endian"/>
1311     </condition>
1312     <condition id="CM7_BE_ARMCC">
1313       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1314       <require condition="CM7_ARMCC"/>
1315       <require Dendian="Big-endian"/>
1316     </condition>
1317
1318     <condition id="CM7_FP_ARMCC">
1319       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1320       <require condition="CM7_FP"/>
1321       <require Tcompiler="ARMCC"/>
1322     </condition>
1323     <condition id="CM7_FP_LE_ARMCC">
1324       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1325       <require condition="CM7_FP_ARMCC"/>
1326       <require Dendian="Little-endian"/>
1327     </condition>
1328     <condition id="CM7_FP_BE_ARMCC">
1329       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1330       <require condition="CM7_FP_ARMCC"/>
1331       <require Dendian="Big-endian"/>
1332     </condition>
1333
1334     <condition id="CM7_SP_ARMCC">
1335       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1336       <require condition="CM7_SP"/>
1337       <require Tcompiler="ARMCC"/>
1338     </condition>
1339     <condition id="CM7_SP_LE_ARMCC">
1340       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1341       <require condition="CM7_SP_ARMCC"/>
1342       <require Dendian="Little-endian"/>
1343     </condition>
1344     <condition id="CM7_SP_BE_ARMCC">
1345       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1346       <require condition="CM7_SP_ARMCC"/>
1347       <require Dendian="Big-endian"/>
1348     </condition>
1349
1350     <condition id="CM7_DP_ARMCC">
1351       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1352       <require condition="CM7_DP"/>
1353       <require Tcompiler="ARMCC"/>
1354     </condition>
1355     <condition id="CM7_DP_LE_ARMCC">
1356       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1357       <require condition="CM7_DP_ARMCC"/>
1358       <require Dendian="Little-endian"/>
1359     </condition>
1360     <condition id="CM7_DP_BE_ARMCC">
1361       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1362       <require condition="CM7_DP_ARMCC"/>
1363       <require Dendian="Big-endian"/>
1364     </condition>
1365
1366     <condition id="CM23_ARMCC">
1367       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1368       <require condition="CM23"/>
1369       <require Tcompiler="ARMCC"/>
1370     </condition>
1371     <condition id="CM23_LE_ARMCC">
1372       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1373       <require condition="CM23_ARMCC"/>
1374       <require Dendian="Little-endian"/>
1375     </condition>
1376
1377     <condition id="CM33_ARMCC">
1378       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1379       <require condition="CM33"/>
1380       <require Tcompiler="ARMCC"/>
1381     </condition>
1382     <condition id="CM33_LE_ARMCC">
1383       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1384       <require condition="CM33_ARMCC"/>
1385       <require Dendian="Little-endian"/>
1386     </condition>
1387
1388     <condition id="CM33_FP_ARMCC">
1389       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1390       <require condition="CM33_FP"/>
1391       <require Tcompiler="ARMCC"/>
1392     </condition>
1393     <condition id="CM33_FP_LE_ARMCC">
1394       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1395       <require condition="CM33_FP_ARMCC"/>
1396       <require Dendian="Little-endian"/>
1397     </condition>
1398
1399     <condition id="CM33_NODSP_NOFPU_ARMCC">
1400       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1401       <require condition="CM33_NODSP_NOFPU"/>
1402       <require Tcompiler="ARMCC"/>
1403     </condition>
1404     <condition id="CM33_DSP_NOFPU_ARMCC">
1405       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1406       <require condition="CM33_DSP_NOFPU"/>
1407       <require Tcompiler="ARMCC"/>
1408     </condition>
1409     <condition id="CM33_NODSP_SP_ARMCC">
1410       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1411       <require condition="CM33_NODSP_SP"/>
1412       <require Tcompiler="ARMCC"/>
1413     </condition>
1414     <condition id="CM33_DSP_SP_ARMCC">
1415       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1416       <require condition="CM33_DSP_SP"/>
1417       <require Tcompiler="ARMCC"/>
1418     </condition>
1419     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1420       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1421       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1422       <require Dendian="Little-endian"/>
1423     </condition>
1424     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1425       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1426       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1427       <require Dendian="Little-endian"/>
1428     </condition>
1429     <condition id="CM33_NODSP_SP_LE_ARMCC">
1430       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1431       <require condition="CM33_NODSP_SP_ARMCC"/>
1432       <require Dendian="Little-endian"/>
1433     </condition>
1434     <condition id="CM33_DSP_SP_LE_ARMCC">
1435       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1436       <require condition="CM33_DSP_SP_ARMCC"/>
1437       <require Dendian="Little-endian"/>
1438     </condition>
1439
1440     <condition id="CM35P_ARMCC">
1441       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1442       <require condition="CM35P"/>
1443       <require Tcompiler="ARMCC"/>
1444     </condition>
1445     <condition id="CM35P_LE_ARMCC">
1446       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1447       <require condition="CM35P_ARMCC"/>
1448       <require Dendian="Little-endian"/>
1449     </condition>
1450
1451     <condition id="CM35P_FP_ARMCC">
1452       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1453       <require condition="CM35P_FP"/>
1454       <require Tcompiler="ARMCC"/>
1455     </condition>
1456     <condition id="CM35P_FP_LE_ARMCC">
1457       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1458       <require condition="CM35P_FP_ARMCC"/>
1459       <require Dendian="Little-endian"/>
1460     </condition>
1461
1462     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1463       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1464       <require condition="CM35P_NODSP_NOFPU"/>
1465       <require Tcompiler="ARMCC"/>
1466     </condition>
1467     <condition id="CM35P_DSP_NOFPU_ARMCC">
1468       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1469       <require condition="CM35P_DSP_NOFPU"/>
1470       <require Tcompiler="ARMCC"/>
1471     </condition>
1472     <condition id="CM35P_NODSP_SP_ARMCC">
1473       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1474       <require condition="CM35P_NODSP_SP"/>
1475       <require Tcompiler="ARMCC"/>
1476     </condition>
1477     <condition id="CM35P_DSP_SP_ARMCC">
1478       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1479       <require condition="CM35P_DSP_SP"/>
1480       <require Tcompiler="ARMCC"/>
1481     </condition>
1482     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1483       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1484       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1485       <require Dendian="Little-endian"/>
1486     </condition>
1487     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1488       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1489       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1490       <require Dendian="Little-endian"/>
1491     </condition>
1492     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1493       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1494       <require condition="CM35P_NODSP_SP_ARMCC"/>
1495       <require Dendian="Little-endian"/>
1496     </condition>
1497     <condition id="CM35P_DSP_SP_LE_ARMCC">
1498       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1499       <require condition="CM35P_DSP_SP_ARMCC"/>
1500       <require Dendian="Little-endian"/>
1501     </condition>
1502
1503     <condition id="CM55_ARMCC">
1504       <description>Cortex-M55 processor based device for the Arm Compiler</description>
1505       <require condition="CM55"/>
1506       <require Tcompiler="ARMCC"/>
1507     </condition>
1508     <condition id="CM55_LE_ARMCC">
1509       <description>Cortex-M55 processor based device in little endian mode for the Arm Compiler</description>
1510       <require condition="CM55_ARMCC"/>
1511       <require Dendian="Little-endian"/>
1512     </condition>
1513
1514     <condition id="ARMv8MBL_ARMCC">
1515       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1516       <require condition="ARMv8MBL"/>
1517       <require Tcompiler="ARMCC"/>
1518     </condition>
1519     <condition id="ARMv8MBL_LE_ARMCC">
1520       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1521       <require condition="ARMv8MBL_ARMCC"/>
1522       <require Dendian="Little-endian"/>
1523     </condition>
1524
1525     <condition id="ARMv8MML_ARMCC">
1526       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1527       <require condition="ARMv8MML"/>
1528       <require Tcompiler="ARMCC"/>
1529     </condition>
1530     <condition id="ARMv8MML_LE_ARMCC">
1531       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1532       <require condition="ARMv8MML_ARMCC"/>
1533       <require Dendian="Little-endian"/>
1534     </condition>
1535
1536     <condition id="ARMv8MML_FP_ARMCC">
1537       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1538       <require condition="ARMv8MML_FP"/>
1539       <require Tcompiler="ARMCC"/>
1540     </condition>
1541     <condition id="ARMv8MML_FP_LE_ARMCC">
1542       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1543       <require condition="ARMv8MML_FP_ARMCC"/>
1544       <require Dendian="Little-endian"/>
1545     </condition>
1546
1547     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1548       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1549       <require condition="ARMv8MML_NODSP_NOFPU"/>
1550       <require Tcompiler="ARMCC"/>
1551     </condition>
1552     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1553       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1554       <require condition="ARMv8MML_DSP_NOFPU"/>
1555       <require Tcompiler="ARMCC"/>
1556     </condition>
1557     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1558       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1559       <require condition="ARMv8MML_NODSP_SP"/>
1560       <require Tcompiler="ARMCC"/>
1561     </condition>
1562     <condition id="ARMv8MML_DSP_SP_ARMCC">
1563       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1564       <require condition="ARMv8MML_DSP_SP"/>
1565       <require Tcompiler="ARMCC"/>
1566     </condition>
1567     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1568       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1569       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1570       <require Dendian="Little-endian"/>
1571     </condition>
1572     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1573       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1574       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1575       <require Dendian="Little-endian"/>
1576     </condition>
1577     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1578       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1579       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1580       <require Dendian="Little-endian"/>
1581     </condition>
1582     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1583       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1584       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1585       <require Dendian="Little-endian"/>
1586     </condition>
1587
1588     <!-- GCC compiler -->
1589     <condition id="CA_GCC">
1590       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1591       <require condition="ARMv7-A Device"/>
1592       <require Tcompiler="GCC"/>
1593     </condition>
1594
1595     <condition id="CM0_GCC">
1596       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1597       <require condition="CM0"/>
1598       <require Tcompiler="GCC"/>
1599     </condition>
1600     <condition id="CM0_LE_GCC">
1601       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1602       <require condition="CM0_GCC"/>
1603       <require Dendian="Little-endian"/>
1604     </condition>
1605     <condition id="CM0_BE_GCC">
1606       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1607       <require condition="CM0_GCC"/>
1608       <require Dendian="Big-endian"/>
1609     </condition>
1610
1611     <condition id="CM1_GCC">
1612       <description>Cortex-M1 based device for the GCC Compiler</description>
1613       <require condition="CM1"/>
1614       <require Tcompiler="GCC"/>
1615     </condition>
1616     <condition id="CM1_LE_GCC">
1617       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1618       <require condition="CM1_GCC"/>
1619       <require Dendian="Little-endian"/>
1620     </condition>
1621     <condition id="CM1_BE_GCC">
1622       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1623       <require condition="CM1_GCC"/>
1624       <require Dendian="Big-endian"/>
1625     </condition>
1626
1627     <condition id="CM3_GCC">
1628       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1629       <require condition="CM3"/>
1630       <require Tcompiler="GCC"/>
1631     </condition>
1632     <condition id="CM3_LE_GCC">
1633       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1634       <require condition="CM3_GCC"/>
1635       <require Dendian="Little-endian"/>
1636     </condition>
1637     <condition id="CM3_BE_GCC">
1638       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1639       <require condition="CM3_GCC"/>
1640       <require Dendian="Big-endian"/>
1641     </condition>
1642
1643     <condition id="CM4_GCC">
1644       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1645       <require condition="CM4"/>
1646       <require Tcompiler="GCC"/>
1647     </condition>
1648     <condition id="CM4_LE_GCC">
1649       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1650       <require condition="CM4_GCC"/>
1651       <require Dendian="Little-endian"/>
1652     </condition>
1653     <condition id="CM4_BE_GCC">
1654       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1655       <require condition="CM4_GCC"/>
1656       <require Dendian="Big-endian"/>
1657     </condition>
1658
1659     <condition id="CM4_FP_GCC">
1660       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1661       <require condition="CM4_FP"/>
1662       <require Tcompiler="GCC"/>
1663     </condition>
1664     <condition id="CM4_FP_LE_GCC">
1665       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1666       <require condition="CM4_FP_GCC"/>
1667       <require Dendian="Little-endian"/>
1668     </condition>
1669     <condition id="CM4_FP_BE_GCC">
1670       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1671       <require condition="CM4_FP_GCC"/>
1672       <require Dendian="Big-endian"/>
1673     </condition>
1674
1675     <condition id="CM7_GCC">
1676       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1677       <require condition="CM7"/>
1678       <require Tcompiler="GCC"/>
1679     </condition>
1680     <condition id="CM7_LE_GCC">
1681       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1682       <require condition="CM7_GCC"/>
1683       <require Dendian="Little-endian"/>
1684     </condition>
1685     <condition id="CM7_BE_GCC">
1686       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1687       <require condition="CM7_GCC"/>
1688       <require Dendian="Big-endian"/>
1689     </condition>
1690
1691     <condition id="CM7_FP_GCC">
1692       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1693       <require condition="CM7_FP"/>
1694       <require Tcompiler="GCC"/>
1695     </condition>
1696     <condition id="CM7_FP_LE_GCC">
1697       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1698       <require condition="CM7_FP_GCC"/>
1699       <require Dendian="Little-endian"/>
1700     </condition>
1701     <condition id="CM7_FP_BE_GCC">
1702       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1703       <require condition="CM7_FP_GCC"/>
1704       <require Dendian="Big-endian"/>
1705     </condition>
1706
1707     <condition id="CM7_SP_GCC">
1708       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1709       <require condition="CM7_SP"/>
1710       <require Tcompiler="GCC"/>
1711     </condition>
1712     <condition id="CM7_SP_LE_GCC">
1713       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1714       <require condition="CM7_SP_GCC"/>
1715       <require Dendian="Little-endian"/>
1716     </condition>
1717
1718     <condition id="CM7_DP_GCC">
1719       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1720       <require condition="CM7_DP"/>
1721       <require Tcompiler="GCC"/>
1722     </condition>
1723     <condition id="CM7_DP_LE_GCC">
1724       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1725       <require condition="CM7_DP_GCC"/>
1726       <require Dendian="Little-endian"/>
1727     </condition>
1728
1729     <condition id="CM23_GCC">
1730       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1731       <require condition="CM23"/>
1732       <require Tcompiler="GCC"/>
1733     </condition>
1734     <condition id="CM23_LE_GCC">
1735       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1736       <require condition="CM23_GCC"/>
1737       <require Dendian="Little-endian"/>
1738     </condition>
1739
1740     <condition id="CM33_GCC">
1741       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1742       <require condition="CM33"/>
1743       <require Tcompiler="GCC"/>
1744     </condition>
1745     <condition id="CM33_LE_GCC">
1746       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1747       <require condition="CM33_GCC"/>
1748       <require Dendian="Little-endian"/>
1749     </condition>
1750
1751     <condition id="CM33_FP_GCC">
1752       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1753       <require condition="CM33_FP"/>
1754       <require Tcompiler="GCC"/>
1755     </condition>
1756     <condition id="CM33_FP_LE_GCC">
1757       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1758       <require condition="CM33_FP_GCC"/>
1759       <require Dendian="Little-endian"/>
1760     </condition>
1761
1762     <condition id="CM33_NODSP_NOFPU_GCC">
1763       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1764       <require condition="CM33_NODSP_NOFPU"/>
1765       <require Tcompiler="GCC"/>
1766     </condition>
1767     <condition id="CM33_DSP_NOFPU_GCC">
1768       <description>CM33, DSP, no FPU, GCC Compiler</description>
1769       <require condition="CM33_DSP_NOFPU"/>
1770       <require Tcompiler="GCC"/>
1771     </condition>
1772     <condition id="CM33_NODSP_SP_GCC">
1773       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1774       <require condition="CM33_NODSP_SP"/>
1775       <require Tcompiler="GCC"/>
1776     </condition>
1777     <condition id="CM33_DSP_SP_GCC">
1778       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1779       <require condition="CM33_DSP_SP"/>
1780       <require Tcompiler="GCC"/>
1781     </condition>
1782     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1783       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1784       <require condition="CM33_NODSP_NOFPU_GCC"/>
1785       <require Dendian="Little-endian"/>
1786     </condition>
1787     <condition id="CM33_DSP_NOFPU_LE_GCC">
1788       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1789       <require condition="CM33_DSP_NOFPU_GCC"/>
1790       <require Dendian="Little-endian"/>
1791     </condition>
1792     <condition id="CM33_NODSP_SP_LE_GCC">
1793       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1794       <require condition="CM33_NODSP_SP_GCC"/>
1795       <require Dendian="Little-endian"/>
1796     </condition>
1797     <condition id="CM33_DSP_SP_LE_GCC">
1798       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1799       <require condition="CM33_DSP_SP_GCC"/>
1800       <require Dendian="Little-endian"/>
1801     </condition>
1802
1803     <condition id="CM35P_GCC">
1804       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1805       <require condition="CM35P"/>
1806       <require Tcompiler="GCC"/>
1807     </condition>
1808     <condition id="CM35P_LE_GCC">
1809       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1810       <require condition="CM35P_GCC"/>
1811       <require Dendian="Little-endian"/>
1812     </condition>
1813
1814     <condition id="CM35P_FP_GCC">
1815       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1816       <require condition="CM35P_FP"/>
1817       <require Tcompiler="GCC"/>
1818     </condition>
1819     <condition id="CM35P_FP_LE_GCC">
1820       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1821       <require condition="CM35P_FP_GCC"/>
1822       <require Dendian="Little-endian"/>
1823     </condition>
1824
1825     <condition id="CM35P_NODSP_NOFPU_GCC">
1826       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1827       <require condition="CM35P_NODSP_NOFPU"/>
1828       <require Tcompiler="GCC"/>
1829     </condition>
1830     <condition id="CM35P_DSP_NOFPU_GCC">
1831       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1832       <require condition="CM35P_DSP_NOFPU"/>
1833       <require Tcompiler="GCC"/>
1834     </condition>
1835     <condition id="CM35P_NODSP_SP_GCC">
1836       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1837       <require condition="CM35P_NODSP_SP"/>
1838       <require Tcompiler="GCC"/>
1839     </condition>
1840     <condition id="CM35P_DSP_SP_GCC">
1841       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1842       <require condition="CM35P_DSP_SP"/>
1843       <require Tcompiler="GCC"/>
1844     </condition>
1845     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1846       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1847       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1848       <require Dendian="Little-endian"/>
1849     </condition>
1850     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1851       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1852       <require condition="CM35P_DSP_NOFPU_GCC"/>
1853       <require Dendian="Little-endian"/>
1854     </condition>
1855     <condition id="CM35P_NODSP_SP_LE_GCC">
1856       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1857       <require condition="CM35P_NODSP_SP_GCC"/>
1858       <require Dendian="Little-endian"/>
1859     </condition>
1860     <condition id="CM35P_DSP_SP_LE_GCC">
1861       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1862       <require condition="CM35P_DSP_SP_GCC"/>
1863       <require Dendian="Little-endian"/>
1864     </condition>
1865
1866     <condition id="CM55_GCC">
1867       <description>Cortex-M55 processor based device for the GCC Compiler</description>
1868       <require condition="CM55"/>
1869       <require Tcompiler="GCC"/>
1870     </condition>
1871     <condition id="CM55_LE_GCC">
1872       <description>Cortex-M55 processor based device in little endian mode for the GCC Compiler</description>
1873       <require condition="CM55_GCC"/>
1874       <require Dendian="Little-endian"/>
1875     </condition>
1876
1877     <condition id="ARMv8MBL_GCC">
1878       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1879       <require condition="ARMv8MBL"/>
1880       <require Tcompiler="GCC"/>
1881     </condition>
1882     <condition id="ARMv8MBL_LE_GCC">
1883       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1884       <require condition="ARMv8MBL_GCC"/>
1885       <require Dendian="Little-endian"/>
1886     </condition>
1887
1888     <condition id="ARMv8MML_GCC">
1889       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1890       <require condition="ARMv8MML"/>
1891       <require Tcompiler="GCC"/>
1892     </condition>
1893     <condition id="ARMv8MML_LE_GCC">
1894       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1895       <require condition="ARMv8MML_GCC"/>
1896       <require Dendian="Little-endian"/>
1897     </condition>
1898
1899     <condition id="ARMv8MML_FP_GCC">
1900       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1901       <require condition="ARMv8MML_FP"/>
1902       <require Tcompiler="GCC"/>
1903     </condition>
1904     <condition id="ARMv8MML_FP_LE_GCC">
1905       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1906       <require condition="ARMv8MML_FP_GCC"/>
1907       <require Dendian="Little-endian"/>
1908     </condition>
1909
1910     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1911       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1912       <require condition="ARMv8MML_NODSP_NOFPU"/>
1913       <require Tcompiler="GCC"/>
1914     </condition>
1915     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1916       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1917       <require condition="ARMv8MML_DSP_NOFPU"/>
1918       <require Tcompiler="GCC"/>
1919     </condition>
1920     <condition id="ARMv8MML_NODSP_SP_GCC">
1921       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1922       <require condition="ARMv8MML_NODSP_SP"/>
1923       <require Tcompiler="GCC"/>
1924     </condition>
1925     <condition id="ARMv8MML_DSP_SP_GCC">
1926       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1927       <require condition="ARMv8MML_DSP_SP"/>
1928       <require Tcompiler="GCC"/>
1929     </condition>
1930     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1931       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1932       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1933       <require Dendian="Little-endian"/>
1934     </condition>
1935     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1936       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1937       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1938       <require Dendian="Little-endian"/>
1939     </condition>
1940     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1941       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1942       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1943       <require Dendian="Little-endian"/>
1944     </condition>
1945     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1946       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1947       <require condition="ARMv8MML_DSP_SP_GCC"/>
1948       <require Dendian="Little-endian"/>
1949     </condition>
1950
1951     <!-- IAR compiler -->
1952     <condition id="CA_IAR">
1953       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1954       <require condition="ARMv7-A Device"/>
1955       <require Tcompiler="IAR"/>
1956     </condition>
1957
1958     <condition id="CM0_IAR">
1959       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1960       <require condition="CM0"/>
1961       <require Tcompiler="IAR"/>
1962     </condition>
1963     <condition id="CM0_LE_IAR">
1964       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1965       <require condition="CM0_IAR"/>
1966       <require Dendian="Little-endian"/>
1967     </condition>
1968     <condition id="CM0_BE_IAR">
1969       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1970       <require condition="CM0_IAR"/>
1971       <require Dendian="Big-endian"/>
1972     </condition>
1973
1974     <condition id="CM1_IAR">
1975       <description>Cortex-M1 based device for the IAR Compiler</description>
1976       <require condition="CM1"/>
1977       <require Tcompiler="IAR"/>
1978     </condition>
1979     <condition id="CM1_LE_IAR">
1980       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1981       <require condition="CM1_IAR"/>
1982       <require Dendian="Little-endian"/>
1983     </condition>
1984     <condition id="CM1_BE_IAR">
1985       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1986       <require condition="CM1_IAR"/>
1987       <require Dendian="Big-endian"/>
1988     </condition>
1989
1990     <condition id="CM3_IAR">
1991       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1992       <require condition="CM3"/>
1993       <require Tcompiler="IAR"/>
1994     </condition>
1995     <condition id="CM3_LE_IAR">
1996       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1997       <require condition="CM3_IAR"/>
1998       <require Dendian="Little-endian"/>
1999     </condition>
2000     <condition id="CM3_BE_IAR">
2001       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
2002       <require condition="CM3_IAR"/>
2003       <require Dendian="Big-endian"/>
2004     </condition>
2005
2006     <condition id="CM4_IAR">
2007       <description>Cortex-M4 processor based device for the IAR Compiler</description>
2008       <require condition="CM4"/>
2009       <require Tcompiler="IAR"/>
2010     </condition>
2011     <condition id="CM4_LE_IAR">
2012       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
2013       <require condition="CM4_IAR"/>
2014       <require Dendian="Little-endian"/>
2015     </condition>
2016     <condition id="CM4_BE_IAR">
2017       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
2018       <require condition="CM4_IAR"/>
2019       <require Dendian="Big-endian"/>
2020     </condition>
2021
2022     <condition id="CM4_FP_IAR">
2023       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
2024       <require condition="CM4_FP"/>
2025       <require Tcompiler="IAR"/>
2026     </condition>
2027     <condition id="CM4_FP_LE_IAR">
2028       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2029       <require condition="CM4_FP_IAR"/>
2030       <require Dendian="Little-endian"/>
2031     </condition>
2032     <condition id="CM4_FP_BE_IAR">
2033       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2034       <require condition="CM4_FP_IAR"/>
2035       <require Dendian="Big-endian"/>
2036     </condition>
2037
2038     <condition id="CM7_IAR">
2039       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2040       <require condition="CM7"/>
2041       <require Tcompiler="IAR"/>
2042     </condition>
2043     <condition id="CM7_LE_IAR">
2044       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2045       <require condition="CM7_IAR"/>
2046       <require Dendian="Little-endian"/>
2047     </condition>
2048     <condition id="CM7_BE_IAR">
2049       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2050       <require condition="CM7_IAR"/>
2051       <require Dendian="Big-endian"/>
2052     </condition>
2053
2054     <condition id="CM7_FP_IAR">
2055       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2056       <require condition="CM7_FP"/>
2057       <require Tcompiler="IAR"/>
2058     </condition>
2059     <condition id="CM7_FP_LE_IAR">
2060       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2061       <require condition="CM7_FP_IAR"/>
2062       <require Dendian="Little-endian"/>
2063     </condition>
2064     <condition id="CM7_FP_BE_IAR">
2065       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2066       <require condition="CM7_FP_IAR"/>
2067       <require Dendian="Big-endian"/>
2068     </condition>
2069
2070     <condition id="CM7_SP_IAR">
2071       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2072       <require condition="CM7_SP"/>
2073       <require Tcompiler="IAR"/>
2074     </condition>
2075     <condition id="CM7_SP_LE_IAR">
2076       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2077       <require condition="CM7_SP_IAR"/>
2078       <require Dendian="Little-endian"/>
2079     </condition>
2080     <condition id="CM7_SP_BE_IAR">
2081       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2082       <require condition="CM7_SP_IAR"/>
2083       <require Dendian="Big-endian"/>
2084     </condition>
2085
2086     <condition id="CM7_DP_IAR">
2087       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2088       <require condition="CM7_DP"/>
2089       <require Tcompiler="IAR"/>
2090     </condition>
2091     <condition id="CM7_DP_LE_IAR">
2092       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2093       <require condition="CM7_DP_IAR"/>
2094       <require Dendian="Little-endian"/>
2095     </condition>
2096     <condition id="CM7_DP_BE_IAR">
2097       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2098       <require condition="CM7_DP_IAR"/>
2099       <require Dendian="Big-endian"/>
2100     </condition>
2101
2102     <condition id="CM23_IAR">
2103       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2104       <require condition="CM23"/>
2105       <require Tcompiler="IAR"/>
2106     </condition>
2107     <condition id="CM23_LE_IAR">
2108       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2109       <require condition="CM23_IAR"/>
2110       <require Dendian="Little-endian"/>
2111     </condition>
2112
2113     <condition id="CM33_IAR">
2114       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2115       <require condition="CM33"/>
2116       <require Tcompiler="IAR"/>
2117     </condition>
2118     <condition id="CM33_LE_IAR">
2119       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2120       <require condition="CM33_IAR"/>
2121       <require Dendian="Little-endian"/>
2122     </condition>
2123
2124     <condition id="CM33_FP_IAR">
2125       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2126       <require condition="CM33_FP"/>
2127       <require Tcompiler="IAR"/>
2128     </condition>
2129     <condition id="CM33_FP_LE_IAR">
2130       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2131       <require condition="CM33_FP_IAR"/>
2132       <require Dendian="Little-endian"/>
2133     </condition>
2134
2135     <condition id="CM33_NODSP_NOFPU_IAR">
2136       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2137       <require condition="CM33_NODSP_NOFPU"/>
2138       <require Tcompiler="IAR"/>
2139     </condition>
2140     <condition id="CM33_DSP_NOFPU_IAR">
2141       <description>CM33, DSP, no FPU, IAR Compiler</description>
2142       <require condition="CM33_DSP_NOFPU"/>
2143       <require Tcompiler="IAR"/>
2144     </condition>
2145     <condition id="CM33_NODSP_SP_IAR">
2146       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2147       <require condition="CM33_NODSP_SP"/>
2148       <require Tcompiler="IAR"/>
2149     </condition>
2150     <condition id="CM33_DSP_SP_IAR">
2151       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2152       <require condition="CM33_DSP_SP"/>
2153       <require Tcompiler="IAR"/>
2154     </condition>
2155     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2156       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2157       <require condition="CM33_NODSP_NOFPU_IAR"/>
2158       <require Dendian="Little-endian"/>
2159     </condition>
2160     <condition id="CM33_DSP_NOFPU_LE_IAR">
2161       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2162       <require condition="CM33_DSP_NOFPU_IAR"/>
2163       <require Dendian="Little-endian"/>
2164     </condition>
2165     <condition id="CM33_NODSP_SP_LE_IAR">
2166       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2167       <require condition="CM33_NODSP_SP_IAR"/>
2168       <require Dendian="Little-endian"/>
2169     </condition>
2170     <condition id="CM33_DSP_SP_LE_IAR">
2171       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2172       <require condition="CM33_DSP_SP_IAR"/>
2173       <require Dendian="Little-endian"/>
2174     </condition>
2175
2176     <condition id="CM35P_IAR">
2177       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2178       <require condition="CM35P"/>
2179       <require Tcompiler="IAR"/>
2180     </condition>
2181     <condition id="CM35P_LE_IAR">
2182       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2183       <require condition="CM35P_IAR"/>
2184       <require Dendian="Little-endian"/>
2185     </condition>
2186
2187     <condition id="CM35P_FP_IAR">
2188       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2189       <require condition="CM35P_FP"/>
2190       <require Tcompiler="IAR"/>
2191     </condition>
2192     <condition id="CM35P_FP_LE_IAR">
2193       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2194       <require condition="CM35P_FP_IAR"/>
2195       <require Dendian="Little-endian"/>
2196     </condition>
2197
2198     <condition id="CM35P_NODSP_NOFPU_IAR">
2199       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2200       <require condition="CM35P_NODSP_NOFPU"/>
2201       <require Tcompiler="IAR"/>
2202     </condition>
2203     <condition id="CM35P_DSP_NOFPU_IAR">
2204       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2205       <require condition="CM35P_DSP_NOFPU"/>
2206       <require Tcompiler="IAR"/>
2207     </condition>
2208     <condition id="CM35P_NODSP_SP_IAR">
2209       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2210       <require condition="CM35P_NODSP_SP"/>
2211       <require Tcompiler="IAR"/>
2212     </condition>
2213     <condition id="CM35P_DSP_SP_IAR">
2214       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2215       <require condition="CM35P_DSP_SP"/>
2216       <require Tcompiler="IAR"/>
2217     </condition>
2218     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2219       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2220       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2221       <require Dendian="Little-endian"/>
2222     </condition>
2223     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2224       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2225       <require condition="CM35P_DSP_NOFPU_IAR"/>
2226       <require Dendian="Little-endian"/>
2227     </condition>
2228     <condition id="CM35P_NODSP_SP_LE_IAR">
2229       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2230       <require condition="CM35P_NODSP_SP_IAR"/>
2231       <require Dendian="Little-endian"/>
2232     </condition>
2233     <condition id="CM35P_DSP_SP_LE_IAR">
2234       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2235       <require condition="CM35P_DSP_SP_IAR"/>
2236       <require Dendian="Little-endian"/>
2237     </condition>
2238
2239     <condition id="CM55_IAR">
2240       <description>Cortex-M55 processor based device for the IAR Compiler</description>
2241       <require condition="CM55"/>
2242       <require Tcompiler="IAR"/>
2243     </condition>
2244     <condition id="CM55_LE_IAR">
2245       <description>Cortex-M55 processor based device in little endian mode for the IAR Compiler</description>
2246       <require condition="CM55_IAR"/>
2247       <require Dendian="Little-endian"/>
2248     </condition>
2249
2250     <condition id="ARMv8MBL_IAR">
2251       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2252       <require condition="ARMv8MBL"/>
2253       <require Tcompiler="IAR"/>
2254     </condition>
2255     <condition id="ARMv8MBL_LE_IAR">
2256       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2257       <require condition="ARMv8MBL_IAR"/>
2258       <require Dendian="Little-endian"/>
2259     </condition>
2260
2261     <condition id="ARMv8MML_IAR">
2262       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2263       <require condition="ARMv8MML"/>
2264       <require Tcompiler="IAR"/>
2265     </condition>
2266     <condition id="ARMv8MML_LE_IAR">
2267       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2268       <require condition="ARMv8MML_IAR"/>
2269       <require Dendian="Little-endian"/>
2270     </condition>
2271
2272     <condition id="ARMv8MML_FP_IAR">
2273       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2274       <require condition="ARMv8MML_FP"/>
2275       <require Tcompiler="IAR"/>
2276     </condition>
2277     <condition id="ARMv8MML_FP_LE_IAR">
2278       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2279       <require condition="ARMv8MML_FP_IAR"/>
2280       <require Dendian="Little-endian"/>
2281     </condition>
2282
2283     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2284       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2285       <require condition="ARMv8MML_NODSP_NOFPU"/>
2286       <require Tcompiler="IAR"/>
2287     </condition>
2288     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2289       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2290       <require condition="ARMv8MML_DSP_NOFPU"/>
2291       <require Tcompiler="IAR"/>
2292     </condition>
2293     <condition id="ARMv8MML_NODSP_SP_IAR">
2294       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2295       <require condition="ARMv8MML_NODSP_SP"/>
2296       <require Tcompiler="IAR"/>
2297     </condition>
2298     <condition id="ARMv8MML_DSP_SP_IAR">
2299       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2300       <require condition="ARMv8MML_DSP_SP"/>
2301       <require Tcompiler="IAR"/>
2302     </condition>
2303     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2304       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2305       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2306       <require Dendian="Little-endian"/>
2307     </condition>
2308     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2309       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2310       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2311       <require Dendian="Little-endian"/>
2312     </condition>
2313     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2314       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2315       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2316       <require Dendian="Little-endian"/>
2317     </condition>
2318     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2319       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2320       <require condition="ARMv8MML_DSP_SP_IAR"/>
2321       <require Dendian="Little-endian"/>
2322     </condition>
2323
2324     <!-- conditions selecting single devices and CMSIS Core -->
2325     <condition id="ARMCM0 CMSIS">
2326       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2327       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2328       <require Cclass="CMSIS" Cgroup="CORE"/>
2329     </condition>
2330
2331     <condition id="ARMCM0+ CMSIS">
2332       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2333       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2334       <require Cclass="CMSIS" Cgroup="CORE"/>
2335     </condition>
2336
2337     <condition id="ARMCM1 CMSIS">
2338       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2339       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2340       <require Cclass="CMSIS" Cgroup="CORE"/>
2341     </condition>
2342
2343     <condition id="ARMCM3 CMSIS">
2344       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2345       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2346       <require Cclass="CMSIS" Cgroup="CORE"/>
2347     </condition>
2348
2349     <condition id="ARMCM4 CMSIS">
2350       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2351       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2352       <require Cclass="CMSIS" Cgroup="CORE"/>
2353     </condition>
2354
2355     <condition id="ARMCM7 CMSIS">
2356       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2357       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2358       <require Cclass="CMSIS" Cgroup="CORE"/>
2359     </condition>
2360
2361     <condition id="ARMCM23 CMSIS">
2362       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2363       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2364       <require Cclass="CMSIS" Cgroup="CORE"/>
2365     </condition>
2366
2367     <condition id="ARMCM33 CMSIS">
2368       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2369       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2370       <require Cclass="CMSIS" Cgroup="CORE"/>
2371     </condition>
2372
2373     <condition id="ARMCM35P CMSIS">
2374       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2375       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2376       <require Cclass="CMSIS" Cgroup="CORE"/>
2377     </condition>
2378
2379     <condition id="ARMCM55 CMSIS">
2380       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2381       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2382       <require Cclass="CMSIS" Cgroup="CORE"/>
2383     </condition>
2384
2385     <condition id="ARMSC000 CMSIS">
2386       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2387       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2388       <require Cclass="CMSIS" Cgroup="CORE"/>
2389     </condition>
2390
2391     <condition id="ARMSC300 CMSIS">
2392       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2393       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2394       <require Cclass="CMSIS" Cgroup="CORE"/>
2395     </condition>
2396
2397     <condition id="ARMv8MBL CMSIS">
2398       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2399       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2400       <require Cclass="CMSIS" Cgroup="CORE"/>
2401     </condition>
2402
2403     <condition id="ARMv8MML CMSIS">
2404       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2405       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2406       <require Cclass="CMSIS" Cgroup="CORE"/>
2407     </condition>
2408
2409     <condition id="ARMv81MML CMSIS">
2410       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2411       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2412       <require Cclass="CMSIS" Cgroup="CORE"/>
2413     </condition>
2414
2415     <condition id="ARMCA5 CMSIS">
2416       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2417       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2418       <require Cclass="CMSIS" Cgroup="CORE"/>
2419     </condition>
2420
2421     <condition id="ARMCA7 CMSIS">
2422       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2423       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2424       <require Cclass="CMSIS" Cgroup="CORE"/>
2425     </condition>
2426
2427     <condition id="ARMCA9 CMSIS">
2428       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2429       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2430       <require Cclass="CMSIS" Cgroup="CORE"/>
2431     </condition>
2432
2433     <!-- CMSIS DSP -->
2434     <condition id="CMSIS DSP">
2435       <description>Components required for DSP</description>
2436       <require condition="ARMv6_7_8-M Device"/>
2437       <require condition="ARMCC GCC IAR"/>
2438       <require Cclass="CMSIS" Cgroup="CORE"/>
2439     </condition>
2440
2441     <!-- CMSIS NN -->
2442     <condition id="CMSIS NN">
2443       <description>Components required for NN</description>
2444       <require Cclass="CMSIS" Cgroup="DSP"/>
2445     </condition>
2446
2447     <!-- RTOS RTX -->
2448     <condition id="RTOS RTX">
2449       <description>Components required for RTOS RTX</description>
2450       <require condition="ARMv6_7-M Device"/>
2451       <require condition="ARMCC GCC IAR"/>
2452       <require Cclass="Device" Cgroup="Startup"/>
2453       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2454     </condition>
2455     <condition id="RTOS RTX IFX">
2456       <description>Components required for RTOS RTX IFX</description>
2457       <require condition="ARMv6_7-M Device"/>
2458       <require condition="ARMCC GCC IAR"/>
2459       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2460       <require Cclass="Device" Cgroup="Startup"/>
2461       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2462     </condition>
2463     <condition id="RTOS RTX5">
2464       <description>Components required for RTOS RTX5</description>
2465       <require condition="ARMv6_7_8-M Device"/>
2466       <require condition="ARMCC GCC IAR"/>
2467       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2468     </condition>
2469     <condition id="RTOS2 RTX5">
2470       <description>Components required for RTOS2 RTX5</description>
2471       <require condition="ARMv6_7_8-M Device"/>
2472       <require condition="ARMCC GCC IAR"/>
2473       <require Cclass="CMSIS"  Cgroup="CORE"/>
2474       <require Cclass="Device" Cgroup="Startup"/>
2475     </condition>
2476     <condition id="RTOS2 RTX5 v7-A">
2477       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2478       <require condition="ARMv7-A Device"/>
2479       <require condition="ARMCC GCC IAR"/>
2480       <require Cclass="CMSIS"  Cgroup="CORE"/>
2481       <require Cclass="Device" Cgroup="Startup"/>
2482       <require Cclass="Device" Cgroup="OS Tick"/>
2483       <require Cclass="Device" Cgroup="IRQ Controller"/>
2484     </condition>
2485     <condition id="RTOS2 RTX5 Lib">
2486       <description>Components required for RTOS2 RTX5 Library</description>
2487       <require condition="ARMv6_7_8-M Device"/>
2488       <require condition="ARMCC GCC IAR"/>
2489       <require Cclass="CMSIS"  Cgroup="CORE"/>
2490       <require Cclass="Device" Cgroup="Startup"/>
2491     </condition>
2492     <condition id="RTOS2 RTX5 NS">
2493       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2494       <require condition="ARMv8-M Device"/>
2495       <require condition="TZ Non-secure"/>
2496       <require condition="ARMCC GCC IAR"/>
2497       <require Cclass="CMSIS"  Cgroup="CORE"/>
2498       <require Cclass="Device" Cgroup="Startup"/>
2499     </condition>
2500
2501     <!-- OS Tick -->
2502     <condition id="OS Tick PTIM">
2503       <description>Components required for OS Tick Private Timer</description>
2504       <require condition="CA5_CA9"/>
2505       <require Cclass="Device" Cgroup="IRQ Controller"/>
2506     </condition>
2507
2508     <condition id="OS Tick GTIM">
2509       <description>Components required for OS Tick Generic Physical Timer</description>
2510       <require condition="CA7"/>
2511       <require Cclass="Device" Cgroup="IRQ Controller"/>
2512     </condition>
2513
2514   </conditions>
2515
2516   <components>
2517     <!-- CMSIS-Core component -->
2518     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.4.0"  condition="ARMv6_7_8-M Device" >
2519       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2520       <files>
2521         <!-- CPU independent -->
2522         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2523         <file category="include" name="CMSIS/Core/Include/"/>
2524         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
2525         <!-- Code template -->
2526         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2527         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2528       </files>
2529     </component>
2530
2531     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.4"  condition="ARMv7-A Device" >
2532       <description>CMSIS-CORE for Cortex-A</description>
2533       <files>
2534         <!-- CPU independent -->
2535         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2536         <file category="include" name="CMSIS/Core_A/Include/"/>
2537       </files>
2538     </component>
2539
2540     <!-- CMSIS-Startup components -->
2541     <!-- Cortex-M0 -->
2542     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM0 CMSIS">
2543       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2544       <files>
2545         <!-- include folder / device header file -->
2546         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2547         <!-- startup / system file -->
2548         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.2" attr="config"/>
2549         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2550         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2551         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2552         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2553       </files>
2554     </component>
2555     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2556       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2557       <files>
2558         <!-- include folder / device header file -->
2559         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2560         <!-- startup / system file -->
2561         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2562         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.0.1" attr="config" condition="GCC"/>
2563         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2564         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2565         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2566       </files>
2567     </component>
2568
2569     <!-- Cortex-M0+ -->
2570     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM0+ CMSIS">
2571       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2572       <files>
2573         <!-- include folder / device header file -->
2574         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2575         <!-- startup / system file -->
2576         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.2" attr="config"/>
2577         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2578         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2579         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2580         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2581       </files>
2582     </component>
2583     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0+ CMSIS">
2584       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2585       <files>
2586         <!-- include folder / device header file -->
2587         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2588         <!-- startup / system file -->
2589         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2590         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.0.1" attr="config" condition="GCC"/>
2591         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2592         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2593         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2594       </files>
2595     </component>
2596
2597     <!-- Cortex-M1 -->
2598     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM1 CMSIS">
2599       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2600       <files>
2601         <!-- include folder / device header file -->
2602         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2603         <!-- startup / system file -->
2604         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.2" attr="config"/>
2605         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2606         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2607         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2608         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2609       </files>
2610     </component>
2611     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2612       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2613       <files>
2614         <!-- include folder / device header file -->
2615         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2616         <!-- startup / system file -->
2617         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2618         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.0.1" attr="config" condition="GCC"/>
2619         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2620         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2621         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2622       </files>
2623     </component>
2624
2625     <!-- Cortex-M3 -->
2626     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM3 CMSIS">
2627       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2628       <files>
2629         <!-- include folder / device header file -->
2630         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2631         <!-- startup / system file -->
2632         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.2" attr="config"/>
2633         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2634         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2635         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2636         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2637       </files>
2638     </component>
2639     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2640       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2641       <files>
2642         <!-- include folder / device header file -->
2643         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2644         <!-- startup / system file -->
2645         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2646         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.0.1" attr="config" condition="GCC"/>
2647         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2648         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2649         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2650       </files>
2651     </component>
2652
2653     <!-- Cortex-M4 -->
2654     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM4 CMSIS">
2655       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2656       <files>
2657         <!-- include folder / device header file -->
2658         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2659         <!-- startup / system file -->
2660         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.2" attr="config"/>
2661         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2662         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2663         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2664        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2665       </files>
2666     </component>
2667     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2668       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2669       <files>
2670         <!-- include folder / device header file -->
2671         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2672         <!-- startup / system file -->
2673         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2674         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.0.1" attr="config" condition="GCC"/>
2675         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2676         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2677         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2678       </files>
2679     </component>
2680
2681     <!-- Cortex-M7 -->
2682     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM7 CMSIS">
2683       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2684       <files>
2685         <!-- include folder / device header file -->
2686         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2687         <!-- startup / system file -->
2688         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.2" attr="config"/>
2689         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2690         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2691         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2692         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2693       </files>
2694     </component>
2695     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2696       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2697       <files>
2698         <!-- include folder / device header file -->
2699         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2700         <!-- startup / system file -->
2701         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2702         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.0.1" attr="config" condition="GCC"/>
2703         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2704         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2705         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2706       </files>
2707     </component>
2708
2709     <!-- Cortex-M23 -->
2710     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM23 CMSIS">
2711       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2712       <files>
2713         <!-- include folder / device header file -->
2714         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2715         <!-- startup / system file -->
2716         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.2" attr="config"/>
2717         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
2718         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2719         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2720         <!-- SAU configuration -->
2721         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2722       </files>
2723     </component>
2724     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM23 CMSIS">
2725       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2726       <files>
2727         <!-- include folder / device header file -->
2728         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2729         <!-- startup / system file -->
2730         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.1" attr="config" condition="ARMCC"/>
2731         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.0.1" attr="config" condition="GCC"/>
2732         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.0.0" attr="config" condition="GCC"/>
2733         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2734         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2735         <!-- SAU configuration -->
2736         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2737       </files>
2738     </component>
2739
2740     <!-- Cortex-M33 -->
2741     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM33 CMSIS">
2742       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2743       <files>
2744         <!-- include folder / device header file -->
2745         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2746         <!-- startup / system file -->
2747         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.2" attr="config"/>
2748         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2749         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2750         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2751         <!-- SAU configuration -->
2752         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2753       </files>
2754     </component>
2755     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM33 CMSIS">
2756       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2757       <files>
2758         <!-- include folder / device header file -->
2759         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2760         <!-- startup / system file -->
2761         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2762         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.0.1" attr="config" condition="GCC"/>
2763         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2764         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2765         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2766         <!-- SAU configuration -->
2767         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2768       </files>
2769     </component>
2770
2771     <!-- Cortex-M35P -->
2772     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM35P CMSIS">
2773       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2774       <files>
2775         <!-- include folder / device header file -->
2776         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2777         <!-- startup / system file -->
2778         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.2" attr="config"/>
2779         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2780         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2781         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2782         <!-- SAU configuration -->
2783         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2784       </files>
2785     </component>
2786     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM35P CMSIS">
2787       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2788       <files>
2789         <!-- include folder / device header file -->
2790         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2791         <!-- startup / system file -->
2792         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2793         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.1" attr="config" condition="GCC"/>
2794         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2795         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
2796         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2797         <!-- SAU configuration -->
2798         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2799       </files>
2800     </component>
2801
2802     <!-- Cortex-M55 -->
2803     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM55 CMSIS">
2804       <description>System and Startup for Generic Cortex-M55 device</description>
2805       <files>
2806         <!-- include folder / device header file -->
2807         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2808         <!-- startup / system file -->
2809         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="2.0.2" attr="config"/>
2810         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2811         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2812         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.2.0" attr="config"/>
2813         <!-- SAU configuration -->
2814         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2815       </files>
2816     </component>
2817
2818     <!-- Cortex-SC000 -->
2819     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS">
2820       <description>System and Startup for Generic Arm SC000 device</description>
2821       <files>
2822         <!-- include folder / device header file -->
2823         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2824         <!-- startup / system file -->
2825         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.2" attr="config"/>
2826         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2827         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2828         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2829         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2830       </files>
2831     </component>
2832     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2833       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2834       <files>
2835         <!-- include folder / device header file -->
2836         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2837         <!-- startup / system file -->
2838         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2839         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.0.1" attr="config" condition="GCC"/>
2840         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2841         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2842         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2843       </files>
2844     </component>
2845
2846     <!-- Cortex-SC300 -->
2847     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS">
2848       <description>System and Startup for Generic Arm SC300 device</description>
2849       <files>
2850         <!-- include folder / device header file -->
2851         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2852         <!-- startup / system file -->
2853         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.2" attr="config"/>
2854         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2855         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2856         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2857         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2858       </files>
2859     </component>
2860     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2861       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2862       <files>
2863         <!-- include folder / device header file -->
2864         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2865         <!-- startup / system file -->
2866         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2867         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.0.1" attr="config" condition="GCC"/>
2868         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2869         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2870         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2871       </files>
2872     </component>
2873
2874     <!-- ARMv8MBL -->
2875     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMv8MBL CMSIS">
2876       <description>System and Startup for Generic Armv8-M Baseline device</description>
2877       <files>
2878         <!-- include folder / device header file -->
2879         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2880         <!-- startup / system file -->
2881         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.2" attr="config"/>
2882         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
2883         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2884         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2885         <!-- SAU configuration -->
2886         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2887       </files>
2888     </component>
2889     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMv8MBL CMSIS">
2890       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2891       <files>
2892         <!-- include folder / device header file -->
2893         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2894         <!-- startup / system file -->
2895         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.1" attr="config" condition="ARMCC"/>
2896         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.0.1" attr="config" condition="GCC"/>
2897         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2898         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2899         <!-- SAU configuration -->
2900         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2901       </files>
2902     </component>
2903
2904     <!-- ARMv8MML -->
2905     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMv8MML CMSIS">
2906       <description>System and Startup for Generic Armv8-M Mainline device</description>
2907       <files>
2908         <!-- include folder / device header file -->
2909         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2910         <!-- startup / system file -->
2911         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.2" attr="config"/>
2912         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2913         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2914         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2915         <!-- SAU configuration -->
2916         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2917       </files>
2918     </component>
2919     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMv8MML CMSIS">
2920       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2921       <files>
2922         <!-- include folder / device header file -->
2923         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2924         <!-- startup / system file -->
2925         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2926         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.0.1" attr="config" condition="GCC"/>
2927         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2928         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2929         <!-- SAU configuration -->
2930         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2931       </files>
2932     </component>
2933
2934     <!-- ARMv81MML -->
2935     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv81MML CMSIS">
2936       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2937       <files>
2938         <!-- include folder / device header file -->
2939         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2940         <!-- startup / system file -->
2941         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.2" attr="config"/>
2942         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2943         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.0.0" attr="config" condition="GCC"/>
2944         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.0" attr="config"/>
2945         <!-- SAU configuration -->
2946         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2947       </files>
2948     </component>
2949
2950     <!-- Cortex-A5 -->
2951     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2952       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2953       <files>
2954         <!-- include folder / device header file -->
2955         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2956         <!-- startup / system / mmu files -->
2957         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2958         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2959         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2960         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2961         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2962         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2963         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2964         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2965         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2966         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2967         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2968         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2969
2970       </files>
2971     </component>
2972
2973     <!-- Cortex-A7 -->
2974     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2975       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2976       <files>
2977         <!-- include folder / device header file -->
2978         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2979         <!-- startup / system / mmu files -->
2980         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2981         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2982         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2983         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2984         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2985         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2986         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2987         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2988         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2989         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2990         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2991         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2992       </files>
2993     </component>
2994
2995     <!-- Cortex-A9 -->
2996     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2997       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2998       <files>
2999         <!-- include folder / device header file -->
3000         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3001         <!-- startup / system / mmu files -->
3002         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3003         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3004         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3005         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3006         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3007         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3008         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3009         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3010         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
3011         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
3012         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
3013         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
3014       </files>
3015     </component>
3016
3017     <!-- IRQ Controller -->
3018     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3019       <description>IRQ Controller implementation using GIC</description>
3020       <files>
3021         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3022       </files>
3023     </component>
3024
3025     <!-- OS Tick -->
3026     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3027       <description>OS Tick implementation using Private Timer</description>
3028       <files>
3029         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3030       </files>
3031     </component>
3032
3033     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3034       <description>OS Tick implementation using Generic Physical Timer</description>
3035       <files>
3036         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3037       </files>
3038     </component>
3039
3040     <!-- CMSIS-DSP component -->
3041     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.7.0" isDefaultVariant="true" condition="CMSIS DSP">
3042       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3043       <files>
3044         <!-- CPU independent -->
3045         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3046         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3047
3048         <!-- CPU and Compiler dependent -->
3049         <!-- ARMCC -->
3050         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3051         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3052         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3053         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3054         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3055         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3056         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3057         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3058         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3059         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3060         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3061         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3062         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3063         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3064         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3065         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3066
3067         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3068         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3069         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3070         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3071         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3072         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3073         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3074         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3075         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3076         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3077         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3078         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3079         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3080         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3081         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3082         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3083
3084         <!-- GCC -->
3085         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3086         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3087         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3088         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3089         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3090         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3091         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3092         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3093
3094         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3095         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3096         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3097         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3098         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3099         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3100         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3101         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3102         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3103         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3104         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3105         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3106         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3107         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3108         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3109         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3110
3111         <!-- IAR -->
3112         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3113         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3114         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3115         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3116         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3117         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3118         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3119         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3120         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3121         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3122         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3123         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3124         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3125         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3126         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3127         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3128
3129         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3130         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3131         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3132         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3133         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3134         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3135         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3136         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3137         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3138         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3139         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3140         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3141         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3142         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3143         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3144         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3145
3146       </files>
3147     </component>
3148     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.8.0" condition="CMSIS DSP">
3149       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3150       <files>
3151         <!-- CPU independent -->
3152         <file category="doc"      name="CMSIS/Documentation/DSP/html/index.html"/>
3153         <file category="header"   name="CMSIS/DSP/Include/arm_math.h"/>
3154         <file category="include"  name="CMSIS/DSP/PrivateInclude/"/>
3155
3156         <!-- DSP sources (core) -->
3157         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3158         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
3159         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3160         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3161         <file category="source"   name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3162         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
3163         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3164         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3165         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3166         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3167         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3168         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
3169         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3170
3171         <!-- Compute Library for Cortex-A -->
3172         <file category="header"   name="CMSIS/DSP/ComputeLibrary/Include/NEMath.h"        condition="ARMv7-A Device"/>
3173         <file category="source"   name="CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c"  condition="ARMv7-A Device"/>
3174       </files>
3175     </component>
3176
3177     <!-- CMSIS-NN component -->
3178     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.2.0" condition="CMSIS NN">
3179       <description>CMSIS-NN Neural Network Library</description>
3180       <files>
3181         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3182         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3183         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
3184         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
3185
3186         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3187         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3188         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3189         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
3190         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
3191         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
3192         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c"/>
3193         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3194         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3195         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3196         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
3197         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
3198         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
3199         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
3200         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
3201         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
3202         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3203         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3204         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
3205         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3206         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3207         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
3208         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3209         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3210         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
3211         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
3212         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
3213         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
3214         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8_opt.c"/>
3215         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
3216         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
3217         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3218         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
3219         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
3220         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
3221         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3222         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3223         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3224         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3225         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
3226         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3227         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3228         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
3229         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
3230         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
3231         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
3232         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
3233         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
3234         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3235         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3236         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
3237         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3238         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
3239         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
3240         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3241         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3242         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3243         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3244         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3245         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3246         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3247         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
3248         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
3249         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3250         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
3251       </files>
3252     </component>
3253
3254     <!-- CMSIS-RTOS Keil RTX component -->
3255     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3256       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3257       <RTE_Components_h>
3258         <!-- the following content goes into file 'RTE_Components.h' -->
3259         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3260         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3261       </RTE_Components_h>
3262       <files>
3263         <!-- CPU independent -->
3264         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3265         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3266         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3267
3268         <!-- RTX templates -->
3269         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3270         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3271         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3272         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3273         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3274         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3275         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3276         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3277         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3278         <!-- tool-chain specific template file -->
3279         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3280         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3281         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3282
3283         <!-- CPU and Compiler dependent -->
3284         <!-- ARMCC -->
3285         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3286         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3287         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3288         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3289         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3290         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3291         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3292         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3293         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3294         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3295         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3296         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3297         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3298         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3299         <!-- GCC -->
3300         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3301         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3302         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3303         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3304         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3305         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3306         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3307         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3308         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3309         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3310         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3311         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3312         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3313         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3314         <!-- IAR -->
3315         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3316         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3317         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3318         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3319         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3320         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3321         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3322         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3323         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3324         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3325         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3326         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3327         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3328         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3329       </files>
3330     </component>
3331     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3332     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3333       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3334       <RTE_Components_h>
3335         <!-- the following content goes into file 'RTE_Components.h' -->
3336         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3337         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3338       </RTE_Components_h>
3339       <files>
3340         <!-- CPU independent -->
3341         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3342         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3343         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3344
3345         <!-- RTX templates -->
3346         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3347         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3348         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3349         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3350         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3351         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3352         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3353         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3354         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3355         <!-- tool-chain specific template file -->
3356         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3357         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3358         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3359
3360         <!-- CPU and Compiler dependent -->
3361         <!-- ARMCC -->
3362         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3363         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3364         <!-- GCC -->
3365         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3366         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3367         <!-- IAR -->
3368       </files>
3369     </component>
3370
3371     <!-- CMSIS-RTOS Keil RTX5 component -->
3372     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.2" Capiversion="1.0.0" condition="RTOS RTX5">
3373       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3374       <RTE_Components_h>
3375         <!-- the following content goes into file 'RTE_Components.h' -->
3376         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3377         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3378       </RTE_Components_h>
3379       <files>
3380         <!-- RTX header file -->
3381         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3382         <!-- RTX compatibility module for API V1 -->
3383         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3384       </files>
3385     </component>
3386
3387     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3388     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
3389       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
3390       <RTE_Components_h>
3391         <!-- the following content goes into file 'RTE_Components.h' -->
3392         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3393         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3394       </RTE_Components_h>
3395       <files>
3396         <!-- RTX documentation -->
3397         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3398
3399         <!-- RTX header files -->
3400         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3401
3402         <!-- RTX configuration -->
3403         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3404         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3405
3406         <!-- RTX templates -->
3407         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3408         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3409         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3410         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3411         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3412         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3413         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3414         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3415         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3416         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3417
3418         <!-- RTX library configuration -->
3419         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3420
3421         <!-- RTX libraries (CPU and Compiler dependent) -->
3422         <!-- ARMCC -->
3423         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3424         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3425         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3426         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3427         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3428         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3429         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3430         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3431         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3432         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3433         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3434         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3435         <file category="library" condition="CM55_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3436         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3437         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3438         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3439         <!-- GCC -->
3440         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3441         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3442         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3443         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3444         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3445         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3446         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3447         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3448         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3449         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3450         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3451         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3452         <file category="library" condition="CM55_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3453         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3454         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3455         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3456         <!-- IAR -->
3457         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3458         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3459         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3460         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3461         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3462         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3463         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3464         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3465         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3466         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3467         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3468         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3469         <file category="library" condition="CM55_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3470         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3471         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3472         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3473       </files>
3474     </component>
3475     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3476       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
3477       <RTE_Components_h>
3478         <!-- the following content goes into file 'RTE_Components.h' -->
3479         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3480         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3481         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3482       </RTE_Components_h>
3483       <files>
3484         <!-- RTX documentation -->
3485         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3486
3487         <!-- RTX header files -->
3488         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3489
3490         <!-- RTX configuration -->
3491         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3492         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3493
3494         <!-- RTX templates -->
3495         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3496         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3497         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3498         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3499         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3500         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3501         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3502         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3503         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3504         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3505
3506         <!-- RTX library configuration -->
3507         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3508
3509         <!-- RTX libraries (CPU and Compiler dependent) -->
3510         <!-- ARMCC -->
3511         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3512         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3513         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3514         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3515         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3516         <file category="library" condition="CM55_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3517         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3518         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3519         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3520         <!-- GCC -->
3521         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3522         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3523         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3524         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3525         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3526         <file category="library" condition="CM55_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3527         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3528         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3529         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3530         <!-- IAR -->
3531         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3532         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3533         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3534         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3535         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3536         <file category="library" condition="CM55_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3537         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3538         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3539         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3540       </files>
3541     </component>
3542     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3543       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3544       <RTE_Components_h>
3545         <!-- the following content goes into file 'RTE_Components.h' -->
3546         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3547         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3548         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3549       </RTE_Components_h>
3550       <files>
3551         <!-- RTX documentation -->
3552         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3553
3554         <!-- RTX header files -->
3555         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3556
3557         <!-- RTX configuration -->
3558         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3559         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3560
3561         <!-- RTX templates -->
3562         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3563         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3564         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3565         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3566         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3567         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3568         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3569         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3570         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3571         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3572
3573         <!-- RTX sources (core) -->
3574         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3575         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3576         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3577         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3578         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3579         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3580         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3581         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3582         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3583         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3584         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3585         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3586         <!-- RTX sources (library configuration) -->
3587         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3588         <!-- RTX sources (handlers ARMCC) -->
3589         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3590         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3591         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3592         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3593         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3594         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3595         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3596         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3597         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3598         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3599         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3600         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3601         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM55_ARMCC"/>
3602         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3603         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3604         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3605         <!-- RTX sources (handlers GCC) -->
3606         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3607         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3608         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3609         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3610         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3611         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3612         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3613         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3614         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3615         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3616         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3617         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3618         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM55_GCC"/>
3619         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3620         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3621         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3622         <!-- RTX sources (handlers IAR) -->
3623         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3624         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3625         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3626         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3627         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3628         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3629         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3630         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3631         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3632         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3633         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3634         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3635         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM55_IAR"/>
3636         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3637         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3638         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3639         <!-- OS Tick (SysTick) -->
3640         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3641       </files>
3642     </component>
3643     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3644       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3645       <RTE_Components_h>
3646         <!-- the following content goes into file 'RTE_Components.h' -->
3647         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3648         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3649         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3650       </RTE_Components_h>
3651       <files>
3652         <!-- RTX documentation -->
3653         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3654
3655         <!-- RTX header files -->
3656         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3657
3658         <!-- RTX configuration -->
3659         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3660         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3661
3662         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3663
3664         <!-- RTX templates -->
3665         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3666         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3667         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3668         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3669         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3670         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3671         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3672         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3673         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3674         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3675
3676         <!-- RTX sources (core) -->
3677         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3678         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3679         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3680         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3681         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3682         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3683         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3684         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3685         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3686         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3687         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3688         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3689         <!-- RTX sources (library configuration) -->
3690         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3691         <!-- RTX sources (handlers ARMCC) -->
3692         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3693         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3694         <!-- RTX sources (handlers GCC) -->
3695         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3696         <!-- RTX sources (handlers IAR) -->
3697         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3698       </files>
3699     </component>
3700     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3701       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3702       <RTE_Components_h>
3703         <!-- the following content goes into file 'RTE_Components.h' -->
3704         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3705         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3706         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3707         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3708       </RTE_Components_h>
3709       <files>
3710         <!-- RTX documentation -->
3711         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3712
3713         <!-- RTX header files -->
3714         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3715
3716         <!-- RTX configuration -->
3717         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3718         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3719
3720         <!-- RTX templates -->
3721         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3722         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3723         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3724         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3725         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3726         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3727         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3728         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3729         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3730         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3731
3732         <!-- RTX sources (core) -->
3733         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3734         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3735         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3736         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3737         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3738         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3739         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3740         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3741         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3742         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3743         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3744         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3745         <!-- RTX sources (library configuration) -->
3746         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3747         <!-- RTX sources (ARMCC handlers) -->
3748         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3749         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3750         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3751         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3752         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3753         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM55_ARMCC"/>
3754         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3755         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3756         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3757         <!-- RTX sources (GCC handlers) -->
3758         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3759         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3760         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3761         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3762         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3763         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM55_GCC"/>
3764         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3765         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3766         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3767         <!-- RTX sources (IAR handlers) -->
3768         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3769         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3770         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3771         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3772         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3773         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM55_IAR"/>
3774         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3775         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3776         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3777         <!-- OS Tick (SysTick) -->
3778         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3779       </files>
3780     </component>
3781
3782     <!-- CMSIS-Driver Custom components -->
3783     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3784       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3785       <files>
3786         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3787         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3788       </files>
3789     </component>
3790     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3791       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3792       <files>
3793         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3794         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3795       </files>
3796     </component>
3797     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3798       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3799       <files>
3800         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3801         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3802       </files>
3803     </component>
3804     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3805       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3806       <files>
3807         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3808         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3809       </files>
3810     </component>
3811     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3812       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3813       <files>
3814         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3815         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3816       </files>
3817     </component>
3818     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3819       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3820       <files>
3821         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3822         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3823       </files>
3824     </component>
3825     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3826       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3827       <files>
3828         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3829         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3830       </files>
3831     </component>
3832     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3833       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3834       <files>
3835         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3836         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3837       </files>
3838     </component>
3839     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3840       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3841       <files>
3842         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3843         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3844         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3845         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3846       </files>
3847     </component>
3848     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3849       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3850       <files>
3851         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3852         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3853       </files>
3854     </component>
3855     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3856       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3857       <files>
3858         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3859         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3860       </files>
3861     </component>
3862     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3863       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3864       <files>
3865         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3866         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3867       </files>
3868     </component>
3869     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3870       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3871       <files>
3872         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3873         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3874       </files>
3875     </component>
3876     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3877       <description>Access to #include Driver_WiFi.h file</description>
3878       <files>
3879         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3880         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3881       </files>
3882     </component>
3883   </components>
3884
3885   <boards>
3886     <board name="uVision Simulator" vendor="Keil">
3887       <description>uVision Simulator</description>
3888       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3889       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3890       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3891       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3892       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3893       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3894       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3895       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3896       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3897       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3898       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3899       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3900       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3901       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3902       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3903       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3904       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3905       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3906       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3907       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3908       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3909       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3910       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3911       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3912     </board>
3913
3914     <board name="EWARM Simulator" vendor="IAR">
3915       <description>EWARM Simulator</description>
3916       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3917       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3918       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3919       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3920       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3921       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3922       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3923       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3924       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3925       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3926       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3927       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3928       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3929       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3930       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3931       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3932       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3933       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3934       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3935       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3936       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3937       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3938       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3939       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3940     </board>
3941   </boards>
3942
3943   <examples>
3944     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3945       <description>DSP_Lib Class Marks example</description>
3946       <board name="uVision Simulator" vendor="Keil"/>
3947       <project>
3948         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3949       </project>
3950       <attributes>
3951         <component Cclass="CMSIS" Cgroup="CORE"/>
3952         <component Cclass="CMSIS" Cgroup="DSP"/>
3953         <component Cclass="Device" Cgroup="Startup"/>
3954         <category>Getting Started</category>
3955       </attributes>
3956     </example>
3957
3958     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3959       <description>DSP_Lib Convolution example</description>
3960       <board name="uVision Simulator" vendor="Keil"/>
3961       <project>
3962         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3963       </project>
3964       <attributes>
3965         <component Cclass="CMSIS" Cgroup="CORE"/>
3966         <component Cclass="CMSIS" Cgroup="DSP"/>
3967         <component Cclass="Device" Cgroup="Startup"/>
3968         <category>Getting Started</category>
3969       </attributes>
3970     </example>
3971
3972     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3973       <description>DSP_Lib Dotproduct example</description>
3974       <board name="uVision Simulator" vendor="Keil"/>
3975       <project>
3976         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3977       </project>
3978       <attributes>
3979         <component Cclass="CMSIS" Cgroup="CORE"/>
3980         <component Cclass="CMSIS" Cgroup="DSP"/>
3981         <component Cclass="Device" Cgroup="Startup"/>
3982         <category>Getting Started</category>
3983       </attributes>
3984     </example>
3985
3986     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3987       <description>DSP_Lib FFT Bin example</description>
3988       <board name="uVision Simulator" vendor="Keil"/>
3989       <project>
3990         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3991       </project>
3992       <attributes>
3993         <component Cclass="CMSIS" Cgroup="CORE"/>
3994         <component Cclass="CMSIS" Cgroup="DSP"/>
3995         <component Cclass="Device" Cgroup="Startup"/>
3996         <category>Getting Started</category>
3997       </attributes>
3998     </example>
3999
4000     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
4001       <description>DSP_Lib FIR example</description>
4002       <board name="uVision Simulator" vendor="Keil"/>
4003       <project>
4004         <environment name="uv" load="arm_fir_example.uvprojx"/>
4005       </project>
4006       <attributes>
4007         <component Cclass="CMSIS" Cgroup="CORE"/>
4008         <component Cclass="CMSIS" Cgroup="DSP"/>
4009         <component Cclass="Device" Cgroup="Startup"/>
4010         <category>Getting Started</category>
4011       </attributes>
4012     </example>
4013
4014     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
4015       <description>DSP_Lib Graphic Equalizer example</description>
4016       <board name="uVision Simulator" vendor="Keil"/>
4017       <project>
4018         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
4019       </project>
4020       <attributes>
4021         <component Cclass="CMSIS" Cgroup="CORE"/>
4022         <component Cclass="CMSIS" Cgroup="DSP"/>
4023         <component Cclass="Device" Cgroup="Startup"/>
4024         <category>Getting Started</category>
4025       </attributes>
4026     </example>
4027
4028     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4029       <description>DSP_Lib Linear Interpolation example</description>
4030       <board name="uVision Simulator" vendor="Keil"/>
4031       <project>
4032         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4033       </project>
4034       <attributes>
4035         <component Cclass="CMSIS" Cgroup="CORE"/>
4036         <component Cclass="CMSIS" Cgroup="DSP"/>
4037         <component Cclass="Device" Cgroup="Startup"/>
4038         <category>Getting Started</category>
4039       </attributes>
4040     </example>
4041
4042     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4043       <description>DSP_Lib Matrix example</description>
4044       <board name="uVision Simulator" vendor="Keil"/>
4045       <project>
4046         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4047       </project>
4048       <attributes>
4049         <component Cclass="CMSIS" Cgroup="CORE"/>
4050         <component Cclass="CMSIS" Cgroup="DSP"/>
4051         <component Cclass="Device" Cgroup="Startup"/>
4052         <category>Getting Started</category>
4053       </attributes>
4054     </example>
4055
4056     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4057       <description>DSP_Lib Signal Convergence example</description>
4058       <board name="uVision Simulator" vendor="Keil"/>
4059       <project>
4060         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4061       </project>
4062       <attributes>
4063         <component Cclass="CMSIS" Cgroup="CORE"/>
4064         <component Cclass="CMSIS" Cgroup="DSP"/>
4065         <component Cclass="Device" Cgroup="Startup"/>
4066         <category>Getting Started</category>
4067       </attributes>
4068     </example>
4069
4070     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4071       <description>DSP_Lib Sinus/Cosinus example</description>
4072       <board name="uVision Simulator" vendor="Keil"/>
4073       <project>
4074         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4075       </project>
4076       <attributes>
4077         <component Cclass="CMSIS" Cgroup="CORE"/>
4078         <component Cclass="CMSIS" Cgroup="DSP"/>
4079         <component Cclass="Device" Cgroup="Startup"/>
4080         <category>Getting Started</category>
4081       </attributes>
4082     </example>
4083
4084     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4085       <description>DSP_Lib Variance example</description>
4086       <board name="uVision Simulator" vendor="Keil"/>
4087       <project>
4088         <environment name="uv" load="arm_variance_example.uvprojx"/>
4089       </project>
4090       <attributes>
4091         <component Cclass="CMSIS" Cgroup="CORE"/>
4092         <component Cclass="CMSIS" Cgroup="DSP"/>
4093         <component Cclass="Device" Cgroup="Startup"/>
4094         <category>Getting Started</category>
4095       </attributes>
4096     </example>
4097
4098     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4099       <description>Neural Network CIFAR10 example</description>
4100       <board name="uVision Simulator" vendor="Keil"/>
4101       <project>
4102         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4103       </project>
4104       <attributes>
4105         <component Cclass="CMSIS" Cgroup="CORE"/>
4106         <component Cclass="CMSIS" Cgroup="DSP"/>
4107         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4108         <component Cclass="Device" Cgroup="Startup"/>
4109         <category>Getting Started</category>
4110       </attributes>
4111     </example>
4112
4113     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4114       <description>Neural Network CIFAR10 example</description>
4115       <board name="EWARM Simulator" vendor="IAR"/>
4116       <project>
4117         <environment name="iar" load="NN-example-cifar10.ewp"/>
4118       </project>
4119       <attributes>
4120         <component Cclass="CMSIS" Cgroup="CORE"/>
4121         <component Cclass="CMSIS" Cgroup="DSP"/>
4122         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4123         <component Cclass="Device" Cgroup="Startup"/>
4124         <category>Getting Started</category>
4125       </attributes>
4126     </example>
4127
4128     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4129       <description>Neural Network GRU example</description>
4130       <board name="uVision Simulator" vendor="Keil"/>
4131       <project>
4132         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4133       </project>
4134       <attributes>
4135         <component Cclass="CMSIS" Cgroup="CORE"/>
4136         <component Cclass="CMSIS" Cgroup="DSP"/>
4137         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4138         <component Cclass="Device" Cgroup="Startup"/>
4139         <category>Getting Started</category>
4140       </attributes>
4141     </example>
4142
4143     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4144       <description>Neural Network GRU example</description>
4145       <board name="EWARM Simulator" vendor="IAR"/>
4146       <project>
4147         <environment name="iar" load="NN-example-gru.ewp"/>
4148       </project>
4149       <attributes>
4150         <component Cclass="CMSIS" Cgroup="CORE"/>
4151         <component Cclass="CMSIS" Cgroup="DSP"/>
4152         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4153         <component Cclass="Device" Cgroup="Startup"/>
4154         <category>Getting Started</category>
4155       </attributes>
4156     </example>
4157
4158     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4159       <description>CMSIS-RTOS2 Blinky example</description>
4160       <board name="uVision Simulator" vendor="Keil"/>
4161       <project>
4162         <environment name="uv" load="Blinky.uvprojx"/>
4163       </project>
4164       <attributes>
4165         <component Cclass="CMSIS" Cgroup="CORE"/>
4166         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4167         <component Cclass="Device" Cgroup="Startup"/>
4168         <category>Getting Started</category>
4169       </attributes>
4170     </example>
4171
4172     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4173       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4174       <board name="uVision Simulator" vendor="Keil"/>
4175       <project>
4176         <environment name="uv" load="Blinky.uvprojx"/>
4177       </project>
4178       <attributes>
4179         <component Cclass="CMSIS" Cgroup="CORE"/>
4180         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4181         <component Cclass="Device" Cgroup="Startup"/>
4182         <category>Getting Started</category>
4183       </attributes>
4184     </example>
4185
4186     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4187       <description>CMSIS-RTOS2 Message Queue Example</description>
4188       <board name="uVision Simulator" vendor="Keil"/>
4189       <project>
4190         <environment name="uv" load="MsqQueue.uvprojx"/>
4191       </project>
4192       <attributes>
4193         <component Cclass="CMSIS" Cgroup="CORE"/>
4194         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4195         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4196         <component Cclass="Device" Cgroup="Startup"/>
4197         <category>Getting Started</category>
4198       </attributes>
4199     </example>
4200
4201     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4202       <description>CMSIS-RTOS2 Memory Pool Example</description>
4203       <board name="uVision Simulator" vendor="Keil"/>
4204       <project>
4205         <environment name="uv" load="MemPool.uvprojx"/>
4206       </project>
4207       <attributes>
4208         <component Cclass="CMSIS" Cgroup="CORE"/>
4209         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4210         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4211         <component Cclass="Device" Cgroup="Startup"/>
4212         <category>Getting Started</category>
4213       </attributes>
4214     </example>
4215
4216     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4217       <description>Bare-metal secure/non-secure example without RTOS</description>
4218       <board name="uVision Simulator" vendor="Keil"/>
4219       <project>
4220         <environment name="uv" load="NoRTOS.uvmpw"/>
4221       </project>
4222       <attributes>
4223         <component Cclass="CMSIS" Cgroup="CORE"/>
4224         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4225         <component Cclass="Device" Cgroup="Startup"/>
4226         <category>Getting Started</category>
4227       </attributes>
4228     </example>
4229
4230     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4231       <description>Secure/non-secure RTOS example with thread context management</description>
4232       <board name="uVision Simulator" vendor="Keil"/>
4233       <project>
4234         <environment name="uv" load="RTOS.uvmpw"/>
4235       </project>
4236       <attributes>
4237         <component Cclass="CMSIS" Cgroup="CORE"/>
4238         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4239         <component Cclass="Device" Cgroup="Startup"/>
4240         <category>Getting Started</category>
4241       </attributes>
4242     </example>
4243
4244     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4245       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4246       <board name="uVision Simulator" vendor="Keil"/>
4247       <project>
4248         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4249       </project>
4250       <attributes>
4251         <component Cclass="CMSIS" Cgroup="CORE"/>
4252         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4253         <component Cclass="Device" Cgroup="Startup"/>
4254         <category>Getting Started</category>
4255       </attributes>
4256     </example>
4257
4258   </examples>
4259
4260 </package>