begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.7.7" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="https://raw.githubusercontent.com/Open-CMSIS-Pack/Open-CMSIS-Pack-Spec/v1.7.7/schema/PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Common Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>https://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.9.1">
  12       Active development ...
  13       CMSIS-DSP: Moved into separate pack!
  14       CMSIS-NN: 4.0.0 (see revision history for details)
  15        - Changed return types of all API's
  16        - Support for int16 average pooling DSP implementation
  17        - Support for DSP extension optimization for int16 depthwise_conv
  18        - Support for MVEI extension optimization for int16 max pooling
  19     </release>
  20     <release version="5.9.0" date="2022-05-02">
  21       CMSIS-Core(M): 5.6.0
  22        - Arm Cortex-M85 cpu support
  23        - Arm China STAR-MC1 cpu support
  24        - Updated system_ARMCM55.c
  25       CMSIS-DSP: 1.10.0 (see revision history for details)
  26       CMSIS-NN: 3.1.0 (see revision history for details)
  27        - Support for int16 convolution and fully connected for reference implementation
  28        - Support for DSP extension optimization for int16 convolution and fully connected
  29        - Support dilation for int8 convolution
  30        - Support dilation for int8 depthwise convolution
  31        - Support for int16 depthwise conv for reference implementation including dilation
  32        - Support for int16 average and max pooling for reference implementation
  33        - Support for elementwise add and mul int16 scalar version
  34        - Support for softmax int16 scalar version
  35        - Support for SVDF with 8 bit state tensor
  36       CMSIS-RTOS2: 2.1.3 (unchanged)
  37         - RTX 5.5.4 (see revision history for details)
  38       CMSIS-Pack: deprecated (moved to Open-CMSIS-Pack)
  39       CMSIS-SVD: 1.3.9 (see revision history for details)
  40       CMSIS-DAP: 2.1.1 (see revision history for details)
  41        - Allow default clock frequency to use fast clock mode
  42       Devices
  43        - Support for Cortex-M85
  44       Utilities
  45         - SVDConv 3.3.42
  46         - PackChk 1.3.95
  47     </release>
  48     <release version="5.8.0" date="2021-06-24">
  49       CMSIS-Core(M): 5.5.0 (see revision history for details)
  50         - Updated GCC LinkerDescription, GCC Assembler startup
  51         - Added Armv8-M Stack Sealing (to linker, startup) for toolchain ARM, GCC
  52         - Changed C-Startup to default Startup.
  53         - Updated Armv8-M Assembler startup to use GAS syntax
  54           Note: Updating existing projects may need manual user interaction!
  55       CMSIS-Core(A): 1.2.1 (see revision history for details)
  56         - Bugfixes for Cortex-A32
  57       CMSIS-DAP: 2.1.0 (see revision history for details)
  58         - Enhanced DAP_Info
  59         - Added extra UART support
  60       CMSIS-DSP: 1.9.0 (see revision history for details)
  61         - Purged pre-built libs from Git
  62         - Enhanced support for f16 datatype
  63         - Fixed couple of GCC issues
  64       CMSIS-NN: 3.0.0 (see revision history for details including version 2.0.0)
  65         - Major interface change for functions compatible with TensorFlow Lite for Microcontroller
  66         - Added optimization for SVDF kernel
  67         - Improved MVE performance for fully Connected and max pool operator
  68         - NULL bias support for fully connected operator in non-MVE case(Can affect performance)
  69         - Expanded existing unit test suite along with support for FVP
  70         - Removed Examples folder
  71       CMSIS-RTOS2:
  72         - RTX 5.5.3 (see revision history for details)
  73           - CVE-2021-27431 vulnerability mitigation.
  74           - Enhanced stack overrun checking.
  75           - Various bug fixes and improvements.
  76       CMSIS-Pack: 1.7.2 (see revision history for details)
  77         - Support for Microchip XC32 compiler
  78         - Support for Custom Datapath Extension
  79     </release>
  80     <release version="5.7.0" date="2020-04-09">
  81       CMSIS-Build: 0.9.0 (beta)
  82         - Draft for CMSIS Project description (CPRJ)
  83       CMSIS-Core(M): 5.4.0 (see revision history for details)
  84         - Cortex-M55 cpu support
  85         - Enhanced MVE support for Armv8.1-MML
  86         - Fixed device config define checks.
  87         - L1 Cache functions for Armv7-M and later
  88       CMSIS-Core(A): 1.2.0 (see revision history for details)
  89         - Fixed GIC_SetPendingIRQ to use GICD_SGIR
  90         - Added missing DSP intrinsics
  91         - Reworked assembly intrinsics: volatile, barriers and clobber
  92       CMSIS-DSP: 1.8.0 (see revision history for details)
  93         - Added new functions and function groups
  94         - Added MVE support
  95       CMSIS-NN: 1.3.0 (see revision history for details)
  96         - Added MVE support
  97         - Further optimizations for kernels using DSP extension
  98       CMSIS-RTOS2:
  99         - RTX 5.5.2 (see revision history for details)
 100       CMSIS-Driver: 2.8.0
 101         - Added VIO API 0.1.0 (Preview)
 102         - removed volatile from status related typedefs in APIs
 103         - enhanced WiFi Interface API with support for polling Socket Receive/Send
 104       CMSIS-Pack: 1.6.3 (see revision history for details)
 105         - deprecating all types specific to cpdsc format. Cpdsc is replaced by Cprj with dedicated schema.
 106       Devices:
 107         - ARMCM55 device
 108         - ARMv81MML startup code recognizing __MVE_USED macro
 109         - Refactored vector table references for all Cortex-M devices
 110         - Reworked ARMCM* C-StartUp files.
 111         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
 112       Utilities:
 113         Attention: Linux binaries moved to Linux64 folder!
 114         - SVDConv 3.3.35
 115         - PackChk 1.3.89
 116     </release>
 117     <release version="5.6.0" date="2019-07-10">
 118       CMSIS-Core(M): 5.3.0 (see revision history for details)
 119         - Added provisions for compiler-independent C startup code.
 120       CMSIS-Core(A): 1.1.4 (see revision history for details)
 121         - Fixed __FPU_Enable.
 122       CMSIS-DSP: 1.7.0 (see revision history for details)
 123         - New Neon versions of f32 functions
 124         - Python wrapper
 125         - Preliminary cmake build
 126         - Compilation flags for FFTs
 127         - Changes to arm_math.h
 128       CMSIS-NN: 1.2.0 (see revision history for details)
 129         - New function for depthwise convolution with asymmetric quantization.
 130         - New support functions for requantization.
 131       CMSIS-RTOS:
 132         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
 133       CMSIS-RTOS2:
 134         - RTX 5.5.1 (see revision history for details)
 135       CMSIS-Driver: 2.7.1
 136         - WiFi Interface API 1.0.0
 137       Devices:
 138         - Generalized C startup code for all Cortex-M family devices.
 139         - Updated Cortex-A default memory regions and MMU configurations
 140         - Moved Cortex-A memory and system config files to avoid include path issues
 141     </release>
 142     <release version="5.5.1" date="2019-03-20">
 143       The following folders are deprecated
 144         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 145
 146       CMSIS-Core(M): 5.2.1 (see revision history for details)
 147         - Fixed compilation issue in cmsis_armclang_ltm.h
 148     </release>
 149     <release version="5.5.0" date="2019-03-18">
 150       The following folders have been removed:
 151         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
 152         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
 153       The following folders are deprecated
 154         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 155
 156       CMSIS-Core(M): 5.2.0 (see revision history for details)
 157         - Reworked Stack/Heap configuration for ARM startup files.
 158         - Added Cortex-M35P device support.
 159         - Added generic Armv8.1-M Mainline device support.
 160       CMSIS-Core(A): 1.1.3 (see revision history for details)
 161       CMSIS-DSP: 1.6.0 (see revision history for details)
 162         - reworked DSP library source files
 163         - reworked DSP library documentation
 164         - Changed DSP folder structure
 165         - moved DSP libraries to folder ./DSP/Lib
 166         - ARM DSP Libraries are built with ARMCLANG
 167         - Added DSP Libraries Source variant
 168       CMSIS-RTOS2:
 169         - RTX 5.5.0 (see revision history for details)
 170       CMSIS-Driver: 2.7.0
 171         - Added WiFi Interface API 1.0.0-beta
 172         - Added components for project specific driver implementations
 173       CMSIS-Pack: 1.6.0 (see revision history for details)
 174       Devices:
 175         - Added Cortex-M35P and ARMv81MML device templates.
 176         - Fixed C-Startup Code for GCC (aligned with other compilers)
 177       Utilities:
 178         - SVDConv 3.3.25
 179         - PackChk 1.3.82
 180     </release>
 181     <release version="5.4.0" date="2018-08-01">
 182       Aligned pack structure with repository.
 183       The following folders are deprecated:
 184         - CMSIS/Include/
 185         - CMSIS/DSP_Lib/
 186
 187       CMSIS-Core(M): 5.1.2 (see revision history for details)
 188         - Added Cortex-M1 support (beta).
 189       CMSIS-Core(A): 1.1.2 (see revision history for details)
 190       CMSIS-NN: 1.1.0
 191         - Added new math functions.
 192       CMSIS-RTOS2:
 193         - API 2.1.3 (see revision history for details)
 194         - RTX 5.4.0 (see revision history for details)
 195           * Updated exception handling on Cortex-A
 196       CMSIS-Driver:
 197         - Flash Driver API V2.2.0
 198       Utilities:
 199         - SVDConv 3.3.21
 200         - PackChk 1.3.71
 201     </release>
 202     <release version="5.3.0" date="2018-02-22">
 203       Updated Arm company brand.
 204       CMSIS-Core(M): 5.1.1 (see revision history for details)
 205       CMSIS-Core(A): 1.1.1 (see revision history for details)
 206       CMSIS-DAP: 2.0.0 (see revision history for details)
 207       CMSIS-NN: 1.0.0
 208         - Initial contribution of the bare metal Neural Network Library.
 209       CMSIS-RTOS2:
 210         - RTX 5.3.0 (see revision history for details)
 211         - OS Tick API 1.0.1
 212     </release>
 213     <release version="5.2.0" date="2017-11-16">
 214       CMSIS-Core(M): 5.1.0 (see revision history for details)
 215         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 216         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 217       CMSIS-Core(A): 1.1.0 (see revision history for details)
 218         - Added compiler_iccarm.h.
 219         - Added additional access functions for physical timer.
 220       CMSIS-DAP: 1.2.0 (see revision history for details)
 221       CMSIS-DSP: 1.5.2 (see revision history for details)
 222       CMSIS-Driver: 2.6.0 (see revision history for details)
 223         - CAN Driver API V1.2.0
 224         - NAND Driver API V2.3.0
 225       CMSIS-RTOS:
 226         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 227       CMSIS-RTOS2:
 228         - API 2.1.2 (see revision history for details)
 229         - RTX 5.2.3 (see revision history for details)
 230       Devices:
 231         - Added GCC startup and linker script for Cortex-A9.
 232         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 233         - Added IAR startup code for Cortex-A9
 234     </release>
 235     <release version="5.1.1" date="2017-09-19">
 236       CMSIS-RTOS2:
 237       - RTX 5.2.1 (see revision history for details)
 238     </release>
 239     <release version="5.1.0" date="2017-08-04">
 240       CMSIS-Core(M): 5.0.2 (see revision history for details)
 241       - Changed Version Control macros to be core agnostic.
 242       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 243       CMSIS-Core(A): 1.0.0 (see revision history for details)
 244       - Initial release
 245       - IRQ Controller API 1.0.0
 246       CMSIS-Driver: 2.05 (see revision history for details)
 247       - All typedefs related to status have been made volatile.
 248       CMSIS-RTOS2:
 249       - API 2.1.1 (see revision history for details)
 250       - RTX 5.2.0 (see revision history for details)
 251       - OS Tick API 1.0.0
 252       CMSIS-DSP: 1.5.2 (see revision history for details)
 253       - Fixed GNU Compiler specific diagnostics.
 254       CMSIS-Pack: 1.5.0 (see revision history for details)
 255       - added System Description File (*.SDF) Format
 256       CMSIS-Zone: 0.0.1 (Preview)
 257       - Initial specification draft
 258     </release>
 259     <release version="5.0.1" date="2017-02-03">
 260       Package Description:
 261       - added taxonomy for Cclass RTOS
 262       CMSIS-RTOS2:
 263       - API 2.1   (see revision history for details)
 264       - RTX 5.1.0 (see revision history for details)
 265       CMSIS-Core: 5.0.1 (see revision history for details)
 266       - Added __PACKED_STRUCT macro
 267       - Added uVisior support
 268       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 269       - Updated template for secure main function (main_s.c)
 270       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 271       CMSIS-DSP: 1.5.1 (see revision history for details)
 272       - added ARMv8M DSP libraries.
 273       CMSIS-Pack:1.4.9 (see revision history for details)
 274       - added Pack Index File specification and schema file
 275     </release>
 276     <release version="5.0.0" date="2016-11-11">
 277       Changed open source license to Apache 2.0
 278       CMSIS_Core:
 279        - Added support for Cortex-M23 and Cortex-M33.
 280        - Added ARMv8-M device configurations for mainline and baseline.
 281        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 282        - Added cmsis_compiler.h to unify compiler behaviour.
 283        - Updated function SCB_EnableICache (for Cortex-M7).
 284        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 285       CMSIS-RTOS:
 286         - bug fix in RTX 4.82 (see revision history for details)
 287       CMSIS-RTOS2:
 288         - new API including compatibility layer to CMSIS-RTOS
 289         - reference implementation based on RTX5
 290         - supports all Cortex-M variants including TrustZone for ARMv8-M
 291       CMSIS-SVD:
 292        - reworked SVD format documentation
 293        - removed SVD file database documentation as SVD files are distributed in packs
 294        - updated SVDConv for Win32 and Linux
 295       CMSIS-DSP:
 296        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 297        - Added DSP libraries build projects to CMSIS pack.
 298     </release>
 299     <release version="4.5.0" date="2015-10-28">
 300       - CMSIS-Core     4.30.0  (see revision history for details)
 301       - CMSIS-DAP      1.1.0   (unchanged)
 302       - CMSIS-Driver   2.04.0  (see revision history for details)
 303       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 304       - CMSIS-Pack     1.4.1   (see revision history for details)
 305       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 306       - CMSIS-SVD      1.3.1   (see revision history for details)
 307     </release>
 308     <release version="4.4.0" date="2015-09-11">
 309       - CMSIS-Core     4.20   (see revision history for details)
 310       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 311       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 312       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 313       - CMSIS-RTOS
 314         -- API         1.02   (unchanged)
 315         -- RTX         4.79   (see revision history for details)
 316       - CMSIS-SVD      1.3.0  (see revision history for details)
 317       - CMSIS-DAP      1.1.0  (extended with SWO support)
 318     </release>
 319     <release version="4.3.0" date="2015-03-20">
 320       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 321       - CMSIS-DSP      1.4.5  (see revision history for details)
 322       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 323       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 324       - CMSIS-RTOS
 325         -- API         1.02   (unchanged)
 326         -- RTX         4.78   (see revision history for details)
 327       - CMSIS-SVD      1.2    (unchanged)
 328     </release>
 329     <release version="4.2.0" date="2014-09-24">
 330       Adding Cortex-M7 support
 331       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 332       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 333       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 334       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 335       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 336     </release>
 337     <release version="4.1.1" date="2014-06-30">
 338       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 339     </release>
 340     <release version="4.1.0" date="2014-06-12">
 341       - CMSIS-Driver   2.02  (incompatible update)
 342       - CMSIS-Pack     1.3   (see revision history for details)
 343       - CMSIS-DSP      1.4.2 (unchanged)
 344       - CMSIS-Core     3.30  (unchanged)
 345       - CMSIS-RTOS RTX 4.74  (unchanged)
 346       - CMSIS-RTOS API 1.02  (unchanged)
 347       - CMSIS-SVD      1.10  (unchanged)
 348       PACK:
 349       - removed G++ specific files from PACK
 350       - added Component Startup variant "C Startup"
 351       - added Pack Checking Utility
 352       - updated conditions to reflect tool-chain dependency
 353       - added Taxonomy for Graphics
 354       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 355     </release>
 356     <!-- release version="4.0.0">
 357       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 358       - CMSIS-Pack     1.1   Preliminary
 359       - CMSIS-DSP      1.4.2 (see revision history for details)
 360       - CMSIS-Core     3.30  (see revision history for details)
 361       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 362       - CMSIS-RTOS API 1.02  (unchanged)
 363       - CMSIS-SVD      1.10  (unchanged)
 364     </release -->
 365     <release version="3.20.4" date="2014-02-20">
 366       - CMSIS-RTOS 4.74 (see revision history for details)
 367       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 368     </release>
 369     <!-- release version="3.20.3">
 370       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 371       - CMSIS-RTOS 4.73 (see revision history for details)
 372     </release -->
 373     <!-- release version="3.20.2">
 374       - CMSIS-Pack documentation has been added
 375       - CMSIS-Drivers header and documentation have been added to PACK
 376       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 377     </release -->
 378     <!-- release version="3.20.1">
 379       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 380       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 381     </release -->
 382     <!-- release version="3.20.0">
 383       The software portions that are deployed in the application program are now under a BSD license which allows usage
 384       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 385       The individual components have been update as listed below:
 386       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 387       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 388       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 389       - CMSIS-SVD is unchanged.
 390     </release -->
 391   </releases>
 392
 393   <taxonomy>
 394     <description Cclass="Audio">Software components for audio processing</description>
 395     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 396     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 397     <description Cclass="Compiler">Compiler Software Extensions</description>
 398     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 399     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 400     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 401     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 402     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 403     <description Cclass="File System">File Drive Support and File System</description>
 404     <description Cclass="IoT Client">IoT cloud client connector</description>
 405     <description Cclass="IoT Service">IoT specific services</description>
 406     <description Cclass="IoT Utility">IoT specific software utility</description>
 407     <description Cclass="Graphics">Graphical User Interface</description>
 408     <description Cclass="Network">Network Stack using Internet Protocols</description>
 409     <description Cclass="RTOS">Real-time Operating System</description>
 410     <description Cclass="Security">Encryption for secure communication or storage</description>
 411     <description Cclass="USB">Universal Serial Bus Stack</description>
 412     <description Cclass="Utility">Generic software utility components</description>
 413   </taxonomy>
 414
 415   <devices>
 416     <!-- ******************************  Cortex-M0  ****************************** -->
 417     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 418       <book name="https://developer.arm.com/documentation/dui0497" title="Cortex-M0 Processor Devices Generic Users Guide"/>
 419       <description>
 420 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 421 - simple, easy-to-use programmers model
 422 - highly efficient ultra-low power operation
 423 - excellent code density
 424 - deterministic, high-performance interrupt handling
 425 - upward compatibility with the rest of the Cortex-M processor family.
 426       </description>
 427       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 428       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 429       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 430       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 431
 432       <device Dname="ARMCM0">
 433         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 434         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 435       </device>
 436     </family>
 437
 438     <!-- ******************************  Cortex-M0P  ****************************** -->
 439     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 440       <book name="https://developer.arm.com/documentation/dui0662" title="Cortex-M0+ Processor Devices Generic Users Guide"/>
 441       <description>
 442 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 443 - simple, easy-to-use programmers model
 444 - highly efficient ultra-low power operation
 445 - excellent code density
 446 - deterministic, high-performance interrupt handling
 447 - upward compatibility with the rest of the Cortex-M processor family.
 448       </description>
 449       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 450       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 451       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 452       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 453
 454       <device Dname="ARMCM0P">
 455         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 456         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 457       </device>
 458
 459       <device Dname="ARMCM0P_MPU">
 460         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 461         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 462       </device>
 463     </family>
 464
 465     <!-- ******************************  Cortex-M1  ****************************** -->
 466     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 467       <!--book name="https://developer.arm.com/documentation/dui0497" title="Cortex-M0 Processor Devices Generic Users Guide"/-->
 468       <description>
 469 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 470 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 471       </description>
 472       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 473       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 474       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 475       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 476
 477       <device Dname="ARMCM1">
 478         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 479         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 480       </device>
 481     </family>
 482
 483     <!-- ******************************  Cortex-M3  ****************************** -->
 484     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 485       <book name="https://developer.arm.com/documentation/dui0552" title="Cortex-M3 Processor Devices Generic Users Guide"/>
 486       <description>
 487 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 488 - simple, easy-to-use programmers model
 489 - highly efficient ultra-low power operation
 490 - excellent code density
 491 - deterministic, high-performance interrupt handling
 492 - upward compatibility with the rest of the Cortex-M processor family.
 493       </description>
 494       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 495       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 496       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 497       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 498
 499       <device Dname="ARMCM3">
 500         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 501         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 502       </device>
 503     </family>
 504
 505     <!-- ******************************  Cortex-M4  ****************************** -->
 506     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 507       <book name="https://developer.arm.com/documentation/dui0553" title="Cortex-M4 Processor Devices Generic Users Guide"/>
 508       <description>
 509 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 510 - simple, easy-to-use programmers model
 511 - highly efficient ultra-low power operation
 512 - excellent code density
 513 - deterministic, high-performance interrupt handling
 514 - upward compatibility with the rest of the Cortex-M processor family.
 515       </description>
 516       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 517       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 518       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 519       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 520
 521       <device Dname="ARMCM4">
 522         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 523         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 524       </device>
 525
 526       <device Dname="ARMCM4_FP">
 527         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 528         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 529       </device>
 530     </family>
 531
 532     <!-- ******************************  Cortex-M7  ****************************** -->
 533     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 534       <book name="https://developer.arm.com/documentation/dui0646" title="Cortex-M7 Processor Devices Generic Users Guide"/>
 535       <description>
 536 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 537 - simple, easy-to-use programmers model
 538 - highly efficient ultra-low power operation
 539 - excellent code density
 540 - deterministic, high-performance interrupt handling
 541 - upward compatibility with the rest of the Cortex-M processor family.
 542       </description>
 543       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 544       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 545       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 546       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 547
 548       <device Dname="ARMCM7">
 549         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 550         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 551       </device>
 552
 553       <device Dname="ARMCM7_SP">
 554         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 555         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 556       </device>
 557
 558       <device Dname="ARMCM7_DP">
 559         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 560         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 561       </device>
 562     </family>
 563
 564     <!-- ******************************  Cortex-M23  ********************** -->
 565     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 566       <book name="https://developer.arm.com/documentation/dui1095"       title="Cortex-M23 Processor Devices Generic Users Guide"/>
 567       <description>
 568 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 569 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 570 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 571       </description>
 572       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 573       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 574       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 575       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 576       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 577       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 578
 579       <device Dname="ARMCM23">
 580         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 581         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 582       </device>
 583
 584       <device Dname="ARMCM23_TZ">
 585         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 586         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 587       </device>
 588     </family>
 589
 590     <!-- ******************************  Cortex-M33  ****************************** -->
 591     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 592       <book name="https://developer.arm.com/documentation/100235"       title="Cortex-M33 Processor Devices Generic Users Guide"/>
 593       <description>
 594 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 595 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 596       </description>
 597       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 598       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 599       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 600       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 601       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 602       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 603
 604       <device Dname="ARMCM33">
 605         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 606         <description>
 607           no DSP Instructions, no Floating Point Unit, no TrustZone
 608         </description>
 609         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 610       </device>
 611
 612       <device Dname="ARMCM33_TZ">
 613         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 614         <description>
 615           no DSP Instructions, no Floating Point Unit, TrustZone
 616         </description>
 617         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 618       </device>
 619
 620       <device Dname="ARMCM33_DSP_FP">
 621         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 622         <description>
 623           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 624         </description>
 625         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 626       </device>
 627
 628       <device Dname="ARMCM33_DSP_FP_TZ">
 629         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 630         <description>
 631           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 632         </description>
 633         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 634       </device>
 635     </family>
 636
 637     <!-- ******************************  Cortex-M35P  ****************************** -->
 638     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 639       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 640       <description>
 641 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 642 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 643       </description>
 644
 645       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 646       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 647       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 648       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 649       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 650       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 651
 652       <device Dname="ARMCM35P">
 653         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 654         <description>
 655           no DSP Instructions, no Floating Point Unit, no TrustZone
 656         </description>
 657         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 658       </device>
 659
 660       <device Dname="ARMCM35P_TZ">
 661         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 662         <description>
 663           no DSP Instructions, no Floating Point Unit, TrustZone
 664         </description>
 665         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 666       </device>
 667
 668       <device Dname="ARMCM35P_DSP_FP">
 669         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 670         <description>
 671           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 672         </description>
 673         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 674       </device>
 675
 676       <device Dname="ARMCM35P_DSP_FP_TZ">
 677         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 678         <description>
 679           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 680         </description>
 681         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 682       </device>
 683     </family>
 684
 685     <!-- ******************************  Cortex-M55  ****************************** -->
 686     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 687       <book name="https://developer.arm.com/documentation/101273"       title="Cortex-M55 Processor Devices Generic Users Guide"/>
 688       <description>
 689 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 690 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 691 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 692       </description>
 693
 694       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 695       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 696       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 697       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 698       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 699       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 700
 701       <device Dname="ARMCM55">
 702         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 703         <description>
 704           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 705         </description>
 706         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 707       </device>
 708     </family>
 709
 710     <!-- ******************************  Cortex-M85  ****************************** -->
 711     <family Dfamily="ARM Cortex M85" Dvendor="ARM:82">
 712       <book name="https://developer.arm.com/documentation/1019283"       title="Cortex-M85 Processor Devices Generic Users Guide"/>
 713       <description>
 714 The Arm Cortex-M85 processor is a fully synthesizable high-performance microcontroller class processor that implements the Armv8.1-M Mainline architecture which includes support for the M-profile Vector Extension (MVE).
 715 The processor also supports previous Armv8-M architectural features.
 716 The design is focused on compute applications such as Digital Signal Processing (DSP) and machine learning.
 717 The Arm Cortex-M85 processor is energy efficient and achieves high compute performance across scalar and vector operations while maintaining low power consumption.
 718       </description>
 719
 720       <!-- debug svd="Device/ARM/SVD/ARMCM85.svd"/ SVD files do not contain any peripheral -->
 721       <memory name="ROM_NS" access="rxn"  start="0x00000000" size="0x00200000" startup="1" default="1" alias="ROM_S"/>
 722       <memory name="RAM_NS" access="rwxn" start="0x20000000" size="0x00020000" init   ="0" default="1" alias="RAM_S"/>
 723       <memory name="ROM_S"  access="rxn"  start="0x10000000" size="0x00200000" startup="1" default="1"/>
 724       <memory name="RAM_S"  access="rwxn" start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 725       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 726
 727       <device Dname="ARMCM85">
 728         <processor Dcore="Cortex-M85" DcoreVersion="r0p0" Dpacbti="PACBTI" Dmpu="MPU" Dfpu="DP_FPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 729         <description>
 730           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone, PACBTI
 731         </description>
 732         <compile header="Device/ARM/ARMCM85/Include/ARMCM85.h" define="ARMCM85"/>
 733       </device>
 734     </family>
 735
 736     <!-- ******************************  ARMSC000  ****************************** -->
 737     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 738       <description>
 739 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 740 - simple, easy-to-use programmers model
 741 - highly efficient ultra-low power operation
 742 - excellent code density
 743 - deterministic, high-performance interrupt handling
 744       </description>
 745       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 746       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 747       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 748       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 749
 750       <device Dname="ARMSC000">
 751         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 752         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 753       </device>
 754     </family>
 755
 756     <!-- ******************************  ARMSC300  ****************************** -->
 757     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 758       <description>
 759 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 760 - simple, easy-to-use programmers model
 761 - highly efficient ultra-low power operation
 762 - excellent code density
 763 - deterministic, high-performance interrupt handling
 764       </description>
 765       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 766       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 767       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 768       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 769
 770       <device Dname="ARMSC300">
 771         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 772         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 773       </device>
 774     </family>
 775
 776     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 777     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 778       <book name="https://developer.arm.com/documentation/ddi0553"       title="Armv8-M Architecture Reference Manual"/>
 779       <description>
 780 Armv8-M Baseline based device with TrustZone
 781       </description>
 782       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 783       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 784       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 785       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 786       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 787       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 788
 789       <device Dname="ARMv8MBL">
 790         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 791         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 792       </device>
 793     </family>
 794
 795     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 796     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 797       <book name="https://developer.arm.com/documentation/ddi0553"       title="Armv8-M Architecture Reference Manual"/>
 798       <description>
 799 Armv8-M Mainline based device with TrustZone
 800       </description>
 801       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 802       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 803       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 804       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 805       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 806       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 807
 808       <device Dname="ARMv8MML">
 809         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 810         <description>
 811           no DSP Instructions, no Floating Point Unit, TrustZone
 812         </description>
 813         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 814       </device>
 815
 816       <device Dname="ARMv8MML_DSP">
 817         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 818         <description>
 819           DSP Instructions, no Floating Point Unit, TrustZone
 820         </description>
 821         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 822       </device>
 823
 824       <device Dname="ARMv8MML_SP">
 825         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 826         <description>
 827           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 828         </description>
 829         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 830       </device>
 831
 832       <device Dname="ARMv8MML_DSP_SP">
 833         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 834         <description>
 835           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 836         </description>
 837         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 838       </device>
 839
 840       <device Dname="ARMv8MML_DP">
 841         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 842         <description>
 843           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 844         </description>
 845         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 846       </device>
 847
 848       <device Dname="ARMv8MML_DSP_DP">
 849         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 850         <description>
 851           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 852         </description>
 853         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 854       </device>
 855     </family>
 856
 857     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 858     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 859       <book name="https://developer.arm.com/documentation/ddi0553"       title="Armv8-M Architecture Reference Manual"/>
 860       <description>
 861 Armv8.1-M Mainline based device with TrustZone and MVE
 862       </description>
 863       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 864       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 865       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 866       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 867       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 868       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 869
 870
 871       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 872         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 873         <description>
 874           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 875         </description>
 876         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 877       </device>
 878     </family>
 879
 880     <!-- ******************************  Cortex-A5  ****************************** -->
 881     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 882       <book name="https://developer.arm.com/documentation/ddi0433" title="Cortex-A5 Technical Reference Manual"/>
 883       <description>
 884 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 885 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 886 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 887       </description>
 888
 889       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 890       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 891       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 892       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 893
 894       <device Dname="ARMCA5">
 895         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 896         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 897       </device>
 898     </family>
 899
 900     <!-- ******************************  Cortex-A7  ****************************** -->
 901     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 902       <book name="https://developer.arm.com/documentation/ddi0464" title="Cortex-A7 MPCore Technical Reference Manual"/>
 903       <description>
 904 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 905 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 906 an optional integrated GIC, and an optional L2 cache controller.
 907       </description>
 908
 909       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 910       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 911       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 912       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 913
 914       <device Dname="ARMCA7">
 915         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 916         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 917       </device>
 918     </family>
 919
 920     <!-- ******************************  Cortex-A9  ****************************** -->
 921     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 922       <book name="https://developer.arm.com/documentation/100511" title="Cortex-A9 Technical Reference Manual"/>
 923       <description>
 924 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 925 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 926 and 8-bit Java bytecodes in Jazelle state.
 927       </description>
 928
 929       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 930       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 931       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 932       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 933
 934       <device Dname="ARMCA9">
 935         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 936         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 937       </device>
 938     </family>
 939   </devices>
 940
 941
 942   <apis>
 943     <!-- CMSIS Device API -->
 944     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 945       <description>Device interrupt controller interface</description>
 946       <files>
 947         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 948       </files>
 949     </api>
 950     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 951       <description>RTOS Kernel system tick timer interface</description>
 952       <files>
 953         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 954       </files>
 955     </api>
 956     <!-- CMSIS-RTOS API -->
 957     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 958       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 959       <files>
 960         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 961       </files>
 962     </api>
 963     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 964       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 965       <files>
 966         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 967         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 968       </files>
 969     </api>
 970     <!-- CMSIS Driver API -->
 971     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 972       <description>USART Driver API for Cortex-M</description>
 973       <files>
 974         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 975         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 976       </files>
 977     </api>
 978     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 979       <description>SPI Driver API for Cortex-M</description>
 980       <files>
 981         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 982         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 983       </files>
 984     </api>
 985     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 986       <description>SAI Driver API for Cortex-M</description>
 987       <files>
 988         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 989         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 990       </files>
 991     </api>
 992     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 993       <description>I2C Driver API for Cortex-M</description>
 994       <files>
 995         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 996         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 997       </files>
 998     </api>
 999     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
1000       <description>CAN Driver API for Cortex-M</description>
1001       <files>
1002         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
1003         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
1004       </files>
1005     </api>
1006     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
1007       <description>Flash Driver API for Cortex-M</description>
1008       <files>
1009         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
1010         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
1011       </files>
1012     </api>
1013     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
1014       <description>MCI Driver API for Cortex-M</description>
1015       <files>
1016         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
1017         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
1018       </files>
1019     </api>
1020     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
1021       <description>NAND Flash Driver API for Cortex-M</description>
1022       <files>
1023         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
1024         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
1025       </files>
1026     </api>
1027     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
1028       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
1029       <files>
1030         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
1031         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
1032         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
1033       </files>
1034     </api>
1035     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
1036       <description>Ethernet MAC Driver API for Cortex-M</description>
1037       <files>
1038         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
1039         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
1040       </files>
1041     </api>
1042     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
1043       <description>Ethernet PHY Driver API for Cortex-M</description>
1044       <files>
1045         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
1046         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
1047       </files>
1048     </api>
1049     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
1050       <description>USB Device Driver API for Cortex-M</description>
1051       <files>
1052         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
1053         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
1054       </files>
1055     </api>
1056     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
1057       <description>USB Host Driver API for Cortex-M</description>
1058       <files>
1059         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
1060         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
1061       </files>
1062     </api>
1063     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
1064       <description>WiFi driver</description>
1065       <files>
1066         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
1067         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
1068       </files>
1069     </api>
1070     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
1071       <description>Virtual I/O</description>
1072       <files>
1073         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
1074         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
1075         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
1076       </files>
1077     </api>
1078   </apis>
1079
1080   <!-- conditions are dependency rules that can apply to a component or an individual file -->
1081   <conditions>
1082     <!-- compiler -->
1083     <condition id="ARMCC6">
1084       <accept Tcompiler="ARMCC" Toptions="AC6"/>
1085       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1086     </condition>
1087     <condition id="ARMCC5">
1088       <require Tcompiler="ARMCC" Toptions="AC5"/>
1089     </condition>
1090     <condition id="ARMCC">
1091       <require Tcompiler="ARMCC"/>
1092     </condition>
1093     <condition id="GCC">
1094       <require Tcompiler="GCC"/>
1095     </condition>
1096     <condition id="IAR">
1097       <require Tcompiler="IAR"/>
1098     </condition>
1099     <condition id="ARMCC GCC">
1100       <accept Tcompiler="ARMCC"/>
1101       <accept Tcompiler="GCC"/>
1102     </condition>
1103     <condition id="ARMCC GCC IAR">
1104       <accept Tcompiler="ARMCC"/>
1105       <accept Tcompiler="GCC"/>
1106       <accept Tcompiler="IAR"/>
1107     </condition>
1108
1109     <!-- Arm architecture -->
1110     <condition id="ARMv6-M Device">
1111       <description>Armv6-M architecture based device</description>
1112       <accept Dcore="Cortex-M0"/>
1113       <accept Dcore="Cortex-M1"/>
1114       <accept Dcore="Cortex-M0+"/>
1115       <accept Dcore="SC000"/>
1116     </condition>
1117     <condition id="ARMv7-M Device">
1118       <description>Armv7-M architecture based device</description>
1119       <accept Dcore="Cortex-M3"/>
1120       <accept Dcore="Cortex-M4"/>
1121       <accept Dcore="Cortex-M7"/>
1122       <accept Dcore="SC300"/>
1123     </condition>
1124     <condition id="ARMv8-MBL Device">
1125       <description>Armv8-M base line architecture based device</description>
1126       <accept Dcore="ARMV8MBL"/>
1127       <accept Dcore="Cortex-M23"/>
1128     </condition>
1129     <condition id="ARMv8-MML Device">
1130       <description>Armv8-M main line architecture based device</description>
1131       <accept Dcore="ARMV8MML"/>
1132       <accept Dcore="Cortex-M33"/>
1133       <accept Dcore="Cortex-M35P"/>
1134       <accept Dcore="Star-MC1"/>
1135     </condition>
1136     <condition id="ARMv81-MML Device">
1137       <description>Armv8.1-M main line architecture based device</description>
1138       <accept Dcore="ARMV81MML"/>
1139       <accept Dcore="Cortex-M55"/>
1140       <accept Dcore="Cortex-M85"/>
1141     </condition>
1142     <condition id="ARMv8x-MML Device">
1143       <description>Armv8-M/Armv8.1-M architecture based device</description>
1144       <accept condition="ARMv8-MML Device"/>
1145       <accept condition="ARMv81-MML Device"/>
1146     </condition>
1147     <condition id="ARMv8-M Device">
1148       <description>Armv8-M architecture based device</description>
1149       <accept condition="ARMv8-MBL Device"/>
1150       <accept condition="ARMv8-MML Device"/>
1151       <accept condition="ARMv81-MML Device"/>
1152     </condition>
1153     <condition id="ARMv6_7-M Device">
1154       <description>Armv6_7-M architecture based device</description>
1155       <accept condition="ARMv6-M Device"/>
1156       <accept condition="ARMv7-M Device"/>
1157     </condition>
1158     <condition id="ARMv6_7_8-M Device">
1159       <description>Armv6_7_8-M architecture based device</description>
1160       <accept condition="ARMv6-M Device"/>
1161       <accept condition="ARMv7-M Device"/>
1162       <accept condition="ARMv8-M Device"/>
1163     </condition>
1164     <condition id="ARMv7-A Device">
1165       <description>Armv7-A architecture based device</description>
1166       <accept Dcore="Cortex-A5"/>
1167       <accept Dcore="Cortex-A7"/>
1168       <accept Dcore="Cortex-A9"/>
1169     </condition>
1170
1171     <condition id="TrustZone">
1172       <description>TrustZone</description>
1173       <require Dtz="TZ"/>
1174     </condition>
1175     <condition id="TZ Secure">
1176       <description>TrustZone (Secure)</description>
1177       <require Dtz="TZ"/>
1178       <require Dsecure="Secure"/>
1179     </condition>
1180     <condition id="TZ Non-secure">
1181       <description>TrustZone (Non-secure)</description>
1182       <require Dtz="TZ"/>
1183       <accept Dsecure="Non-secure"/>
1184       <accept Dsecure="TZ-disabled"/>
1185     </condition>
1186
1187     <!-- Startup -->
1188     <condition id="Startup ARMCC6 Secure">
1189       <description>Startup files for Arm Compiler 6 targeting TrustZone secure mode</description>
1190       <require condition="ARMCC6"/>
1191       <require condition="TZ Secure"/>
1192     </condition>
1193     <condition id="Startup ARMCC6 Unsecure">
1194       <description>Startup files for Arm Compiler 6 targeting non-TrustZone or TrustZone non-secure mode</description>
1195       <require condition="ARMCC6"/>
1196       <deny condition="TZ Secure"/>
1197     </condition>
1198
1199     <!-- CMSIS-Core -->
1200     <condition id="ARMCM0 CMSIS">
1201       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
1202       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1203       <require Cclass="CMSIS" Cgroup="CORE"/>
1204     </condition>
1205
1206     <condition id="ARMCM0+ CMSIS">
1207       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
1208       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1209       <require Cclass="CMSIS" Cgroup="CORE"/>
1210     </condition>
1211
1212     <condition id="ARMCM1 CMSIS">
1213       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
1214       <require Dvendor="ARM:82" Dname="ARMCM1"/>
1215       <require Cclass="CMSIS" Cgroup="CORE"/>
1216     </condition>
1217
1218     <condition id="ARMCM3 CMSIS">
1219       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
1220       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1221       <require Cclass="CMSIS" Cgroup="CORE"/>
1222     </condition>
1223
1224     <condition id="ARMCM4 CMSIS">
1225       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
1226       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1227       <require Cclass="CMSIS" Cgroup="CORE"/>
1228     </condition>
1229
1230     <condition id="ARMCM7 CMSIS">
1231       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
1232       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1233       <require Cclass="CMSIS" Cgroup="CORE"/>
1234     </condition>
1235
1236     <condition id="ARMCM23 CMSIS">
1237       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
1238       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1239       <require Cclass="CMSIS" Cgroup="CORE"/>
1240     </condition>
1241
1242     <condition id="ARMCM33 CMSIS">
1243       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
1244       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1245       <require Cclass="CMSIS" Cgroup="CORE"/>
1246     </condition>
1247
1248     <condition id="ARMCM35P CMSIS">
1249       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
1250       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
1251       <require Cclass="CMSIS" Cgroup="CORE"/>
1252     </condition>
1253
1254     <condition id="ARMCM55 CMSIS">
1255       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
1256       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
1257       <require Cclass="CMSIS" Cgroup="CORE"/>
1258     </condition>
1259
1260     <condition id="ARMCM85 CMSIS">
1261       <description>Generic Arm Cortex-M85 device startup and depends on CMSIS Core</description>
1262       <require Dvendor="ARM:82" Dname="ARMCM85*"/>
1263       <require Cclass="CMSIS" Cgroup="CORE"/>
1264     </condition>
1265
1266     <condition id="ARMSC000 CMSIS">
1267       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
1268       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1269       <require Cclass="CMSIS" Cgroup="CORE"/>
1270     </condition>
1271
1272     <condition id="ARMSC300 CMSIS">
1273       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
1274       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1275       <require Cclass="CMSIS" Cgroup="CORE"/>
1276     </condition>
1277
1278     <condition id="ARMv8MBL CMSIS">
1279       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
1280       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1281       <require Cclass="CMSIS" Cgroup="CORE"/>
1282     </condition>
1283
1284     <condition id="ARMv8MML CMSIS">
1285       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
1286       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1287       <require Cclass="CMSIS" Cgroup="CORE"/>
1288     </condition>
1289
1290     <condition id="ARMv81MML CMSIS">
1291       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
1292       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
1293       <require Cclass="CMSIS" Cgroup="CORE"/>
1294     </condition>
1295
1296     <condition id="ARMCA5 CMSIS">
1297       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
1298       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1299       <require Cclass="CMSIS" Cgroup="CORE"/>
1300     </condition>
1301
1302     <condition id="ARMCA7 CMSIS">
1303       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
1304       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1305       <require Cclass="CMSIS" Cgroup="CORE"/>
1306     </condition>
1307
1308     <condition id="ARMCA9 CMSIS">
1309       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
1310       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1311       <require Cclass="CMSIS" Cgroup="CORE"/>
1312     </condition>
1313
1314     <!-- CMSIS NN -->
1315     <condition id="CMSIS NN">
1316       <description>Components required for NN</description>
1317       <require condition="ARMCC GCC IAR"/>
1318       <require Cclass="CMSIS" Cgroup="CORE"/>
1319     </condition>
1320
1321     <!-- RTOS RTX -->
1322     <condition id="RTOS RTX">
1323       <description>Components required for RTOS RTX</description>
1324       <require condition="ARMv6_7-M Device"/>
1325       <require condition="ARMCC GCC IAR"/>
1326       <require Cclass="Device" Cgroup="Startup"/>
1327       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1328     </condition>
1329     <condition id="RTOS RTX IFX">
1330       <description>Components required for RTOS RTX IFX</description>
1331       <require condition="ARMv6_7-M Device"/>
1332       <require condition="ARMCC GCC IAR"/>
1333       <require Dvendor="Infineon:7" Dname="XMC4*"/>
1334       <require Cclass="Device" Cgroup="Startup"/>
1335       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1336     </condition>
1337     <condition id="RTOS RTX5">
1338       <description>Components required for RTOS RTX5</description>
1339       <require condition="ARMv6_7_8-M Device"/>
1340       <require condition="ARMCC GCC IAR"/>
1341       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1342     </condition>
1343     <condition id="RTOS2 RTX5">
1344       <description>Components required for RTOS2 RTX5</description>
1345       <require condition="ARMv6_7_8-M Device"/>
1346       <require condition="ARMCC GCC IAR"/>
1347       <require Cclass="CMSIS"  Cgroup="CORE"/>
1348       <require Cclass="Device" Cgroup="Startup"/>
1349     </condition>
1350     <condition id="RTOS2 RTX5 v7-A">
1351       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
1352       <require condition="ARMv7-A Device"/>
1353       <require condition="ARMCC GCC IAR"/>
1354       <require Cclass="CMSIS"  Cgroup="CORE"/>
1355       <require Cclass="Device" Cgroup="Startup"/>
1356       <require Cclass="Device" Cgroup="OS Tick"/>
1357       <require Cclass="Device" Cgroup="IRQ Controller"/>
1358     </condition>
1359     <condition id="RTOS2 RTX5 NS">
1360       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1361       <require condition="ARMv8-M Device"/>
1362       <require condition="TZ Non-secure"/>
1363       <require condition="ARMCC GCC IAR"/>
1364       <require Cclass="CMSIS"  Cgroup="CORE"/>
1365       <require Cclass="Device" Cgroup="Startup"/>
1366     </condition>
1367
1368     <condition id="ARMCC ARMv6-M LE">
1369         <description>Arm Compiler for Armv6-M architecture (little endian)</description>
1370         <require condition="ARMCC"/>
1371         <require condition="ARMv6-M Device"/>
1372         <require Dendian="Little-endian"/>
1373     </condition>
1374     <condition id="ARMCC ARMv6-M BE">
1375         <description>Arm Compiler for Armv6-M architecture (big endian)</description>
1376         <require condition="ARMCC"/>
1377         <require condition="ARMv6-M Device"/>
1378         <require Dendian="Big-endian"/>
1379     </condition>
1380     <condition id="ARMCC ARMv7-M NOFP LE">
1381         <description>Arm Compiler for Armv7-M architecture without FPU (little endian)</description>
1382         <require condition="ARMCC"/>
1383         <require condition="ARMv7-M Device"/>
1384         <require Dendian="Little-endian"/>
1385         <require Dfpu="NO_FPU"/>
1386     </condition>
1387     <condition id="ARMCC ARMv7-M NOFP BE">
1388         <description>Arm Compiler for Armv7-M architecture without FPU (big endian)</description>
1389         <require condition="ARMCC"/>
1390         <require condition="ARMv7-M Device"/>
1391         <require Dendian="Big-endian"/>
1392         <require Dfpu="NO_FPU"/>
1393     </condition>
1394     <condition id="ARMCC ARMv7-M FP LE">
1395         <description>Arm Compiler for Armv7-M architecture with FPU (little endian)</description>
1396         <require condition="ARMCC"/>
1397         <require condition="ARMv7-M Device"/>
1398         <require Dendian="Little-endian"/>
1399         <accept Dfpu="SP_FPU"/>
1400         <accept Dfpu="DP_FPU"/>
1401     </condition>
1402     <condition id="ARMCC ARMv7-M FP BE">
1403         <description>Arm Compiler for Armv7-M architecture with FPU (big endian)</description>
1404         <require condition="ARMCC"/>
1405         <require condition="ARMv7-M Device"/>
1406         <require Dendian="Big-endian"/>
1407         <accept Dfpu="SP_FPU"/>
1408         <accept Dfpu="DP_FPU"/>
1409     </condition>
1410     <condition id="ARMCC ARMv8-MBL LE">
1411         <description>Arm Compiler for Armv8-M base line architecture (little endian)</description>
1412         <require condition="ARMCC"/>
1413         <require condition="ARMv8-MBL Device"/>
1414         <require Dendian="Little-endian"/>
1415     </condition>
1416     <condition id="ARMCC ARMv8-MML NOFP LE">
1417         <description>Arm Compiler for Armv8-M/Armv8.1-M main line architecture without FPU/MVE (little endian)</description>
1418         <require condition="ARMCC"/>
1419         <require condition="ARMv8x-MML Device"/>
1420         <require Dendian="Little-endian"/>
1421         <require Dfpu="NO_FPU"/>
1422         <require Dmve="NO_MVE"/>
1423     </condition>
1424      <condition id="ARMCC ARMv8-MML FP LE">
1425         <description>Arm Compiler for Armv8-M/Armv8.1-M main line architecture with FPU/MVE (little endian)</description>
1426         <require condition="ARMCC"/>
1427         <require condition="ARMv8x-MML Device"/>
1428         <require Dendian="Little-endian"/>
1429         <accept Dfpu="SP_FPU"/>
1430         <accept Dfpu="DP_FPU"/>
1431         <accept Dmve="MVE"/>
1432         <accept Dmve="FP_MVE"/>
1433     </condition>
1434
1435     <condition id="GCC ARMv6-M LE">
1436         <description>GNU Compiler for Armv6-M architecture (little endian)</description>
1437         <require condition="GCC"/>
1438         <require condition="ARMv6-M Device"/>
1439         <require Dendian="Little-endian"/>
1440     </condition>
1441     <condition id="GCC ARMv6-M BE">
1442         <description>GNU Compiler for Armv6-M architecture (big endian)</description>
1443         <require condition="GCC"/>
1444         <require condition="ARMv6-M Device"/>
1445         <require Dendian="Big-endian"/>
1446     </condition>
1447     <condition id="GCC ARMv7-M NOFP LE">
1448         <description>GNU Compiler for Armv7-M architecture without FPU (little endian)</description>
1449         <require condition="GCC"/>
1450         <require condition="ARMv7-M Device"/>
1451         <require Dendian="Little-endian"/>
1452         <require Dfpu="NO_FPU"/>
1453     </condition>
1454     <condition id="GCC ARMv7-M NOFP BE">
1455         <description>GNU Compiler for Armv7-M architecture without FPU (big endian)</description>
1456         <require condition="GCC"/>
1457         <require condition="ARMv7-M Device"/>
1458         <require Dendian="Big-endian"/>
1459         <require Dfpu="NO_FPU"/>
1460     </condition>
1461     <condition id="GCC ARMv7-M FP LE">
1462         <description>GNU Compiler for Armv7-M architecture with FPU (little endian)</description>
1463         <require condition="GCC"/>
1464         <require condition="ARMv7-M Device"/>
1465         <require Dendian="Little-endian"/>
1466         <accept Dfpu="SP_FPU"/>
1467         <accept Dfpu="DP_FPU"/>
1468     </condition>
1469     <condition id="GCC ARMv7-M FP BE">
1470         <description>GNU Compiler for Armv7-M architecture with FPU (big endian)</description>
1471         <require condition="GCC"/>
1472         <require condition="ARMv7-M Device"/>
1473         <require Dendian="Big-endian"/>
1474         <accept Dfpu="SP_FPU"/>
1475         <accept Dfpu="DP_FPU"/>
1476     </condition>
1477     <condition id="GCC ARMv8-MBL LE">
1478         <description>GNU Compiler for Armv8-M base line architecture (little endian)</description>
1479         <require condition="GCC"/>
1480         <require condition="ARMv8-MBL Device"/>
1481         <require Dendian="Little-endian"/>
1482     </condition>
1483     <condition id="GCC ARMv8-MML NOFP LE">
1484         <description>GNU Compiler for Armv8-M/Armv8.1-M main line architecture without FPU/MVE (little endian)</description>
1485         <require condition="GCC"/>
1486         <require condition="ARMv8x-MML Device"/>
1487         <require Dendian="Little-endian"/>
1488         <require Dfpu="NO_FPU"/>
1489         <require Dmve="NO_MVE"/>
1490     </condition>
1491      <condition id="GCC ARMv8-MML FP LE">
1492         <description>GNU Compiler for Armv8-M/Armv8.1-M main line architecture with FPU/MVE (little endian)</description>
1493         <require condition="GCC"/>
1494         <require condition="ARMv8x-MML Device"/>
1495         <require Dendian="Little-endian"/>
1496         <accept Dfpu="SP_FPU"/>
1497         <accept Dfpu="DP_FPU"/>
1498         <accept Dmve="MVE"/>
1499         <accept Dmve="FP_MVE"/>
1500     </condition>
1501
1502     <condition id="IARCC ARMv6-M LE">
1503         <description>IAR Compiler for Armv6-M architecture (little endian)</description>
1504         <require condition="IAR"/>
1505         <require condition="ARMv6-M Device"/>
1506         <require Dendian="Little-endian"/>
1507     </condition>
1508     <condition id="IARCC ARMv6-M BE">
1509         <description>IAR Compiler for Armv6-M architecture (big endian)</description>
1510         <require condition="IAR"/>
1511         <require condition="ARMv6-M Device"/>
1512         <require Dendian="Big-endian"/>
1513     </condition>
1514     <condition id="IARCC ARMv7-M NOFP LE">
1515         <description>IAR Compiler for Armv7-M architecture without FPU (little endian)</description>
1516         <require condition="IAR"/>
1517         <require condition="ARMv7-M Device"/>
1518         <require Dendian="Little-endian"/>
1519         <require Dfpu="NO_FPU"/>
1520     </condition>
1521     <condition id="IARCC ARMv7-M NOFP BE">
1522         <description>IAR Compiler for Armv7-M architecture without FPU (big endian)</description>
1523         <require condition="IAR"/>
1524         <require condition="ARMv7-M Device"/>
1525         <require Dendian="Big-endian"/>
1526         <require Dfpu="NO_FPU"/>
1527     </condition>
1528     <condition id="IARCC ARMv7-M FP LE">
1529         <description>IAR Compiler for Armv7-M architecture with FPU (little endian)</description>
1530         <require condition="IAR"/>
1531         <require condition="ARMv7-M Device"/>
1532         <require Dendian="Little-endian"/>
1533         <accept Dfpu="SP_FPU"/>
1534         <accept Dfpu="DP_FPU"/>
1535     </condition>
1536     <condition id="IARCC ARMv7-M FP BE">
1537         <description>IAR Compiler for Armv7-M architecture with FPU (big endian)</description>
1538         <require condition="IAR"/>
1539         <require condition="ARMv7-M Device"/>
1540         <require Dendian="Big-endian"/>
1541         <accept Dfpu="SP_FPU"/>
1542         <accept Dfpu="DP_FPU"/>
1543     </condition>
1544     <condition id="IARCC ARMv8-MBL LE">
1545         <description>IAR Compiler for Armv8-M base line architecture (little endian)</description>
1546         <require condition="IAR"/>
1547         <require condition="ARMv8-MBL Device"/>
1548         <require Dendian="Little-endian"/>
1549     </condition>
1550     <condition id="IARCC ARMv8-MML NOFP LE">
1551         <description>IAR Compiler for Armv8-M main line architecture without FPU (little endian)</description>
1552         <require condition="IAR"/>
1553         <require condition="ARMv8-MML Device"/>
1554         <require Dendian="Little-endian"/>
1555         <require Dfpu="NO_FPU"/>
1556     </condition>
1557     <condition id="IARCC ARMv8-MML FP LE">
1558         <description>IAR Compiler for Armv8-M main line architecture with FPU (little endian)</description>
1559         <require condition="IAR"/>
1560         <require condition="ARMv8-MML Device"/>
1561         <require Dendian="Little-endian"/>
1562         <accept Dfpu="SP_FPU"/>
1563         <accept Dfpu="DP_FPU"/>
1564     </condition>
1565     <condition id="IARCC ARMv81-MML NOFP LE">
1566         <description>IAR Compiler for Armv8.1-M main line architecture without FPU/MVE (little endian)</description>
1567         <require condition="IAR"/>
1568         <require condition="ARMv81-MML Device"/>
1569         <require Dendian="Little-endian"/>
1570         <require Dfpu="NO_FPU"/>
1571         <require Dmve="NO_MVE"/>
1572     </condition>
1573      <condition id="IARCC ARMv81-MML FP LE">
1574         <description>IAR Compiler for Armv8.1-M main line architecture with FPU/MVE (little endian)</description>
1575         <require condition="IAR"/>
1576         <require condition="ARMv81-MML Device"/>
1577         <require Dendian="Little-endian"/>
1578         <accept Dfpu="SP_FPU"/>
1579         <accept Dfpu="DP_FPU"/>
1580         <accept Dmve="MVE"/>
1581         <accept Dmve="FP_MVE"/>
1582     </condition>
1583
1584     <condition id="ARMASM ARMv6-M">
1585         <description>Arm Assembler for Armv6-M architecture</description>
1586         <require condition="ARMCC5"/>
1587         <require condition="ARMv6-M Device"/>
1588     </condition>
1589     <condition id="GNUASM ARMv6-M">
1590         <description>GNU Assembler for Armv6-M architecture</description>
1591         <accept condition="ARMCC6"/>
1592         <accept condition="GCC"/>
1593         <require condition="ARMv6-M Device"/>
1594     </condition>
1595     <condition id="IARASM ARMv6-M">
1596         <description>IAR Assembler for Armv6-M architecture</description>
1597         <require condition="IAR"/>
1598         <require condition="ARMv6-M Device"/>
1599     </condition>
1600
1601     <condition id="ARMASM ARMv7-M">
1602         <description>Arm Assembler for Armv7-M architecture</description>
1603         <require condition="ARMCC5"/>
1604         <require condition="ARMv7-M Device"/>
1605     </condition>
1606     <condition id="GNUASM ARMv7-M">
1607         <description>GNU Assembler for Armv7-M architecture</description>
1608         <accept condition="ARMCC6"/>
1609         <accept condition="GCC"/>
1610         <require condition="ARMv7-M Device"/>
1611     </condition>
1612     <condition id="IARASM ARMv7-M">
1613         <description>IAR Assembler for Armv7-M architecture</description>
1614         <require condition="IAR"/>
1615         <require condition="ARMv7-M Device"/>
1616     </condition>
1617
1618     <condition id="GNUASM ARMv8-MBL">
1619         <description>GNU Assembler for Armv8-M base line architecture</description>
1620         <require condition="ARMCC GCC"/>
1621         <require condition="ARMv8-MBL Device"/>
1622     </condition>
1623     <condition id="GNUASM ARMv8-MML">
1624         <description>GNU Assembler for Armv8-M/Armv8.1-M main line architecture</description>
1625         <require condition="ARMCC GCC"/>
1626         <require condition="ARMv8x-MML Device"/>
1627     </condition>
1628     <condition id="IARASM ARMv8-MBL">
1629         <description>IAR Assembler for Armv8-M base line architecture</description>
1630         <require condition="IAR"/>
1631         <require condition="ARMv8-MBL Device"/>
1632     </condition>
1633     <condition id="IARASM ARMv8-MML">
1634         <description>IAR Assembler for Armv8-M main line architecture</description>
1635         <require condition="IAR"/>
1636         <require condition="ARMv8x-MML Device"/>
1637     </condition>
1638
1639     <condition id="ARMASM ARMv7-A">
1640         <description>Arm Assembler for Armv7-A architecture</description>
1641         <require condition="ARMCC5"/>
1642         <require condition="ARMv7-A Device"/>
1643     </condition>
1644     <condition id="GNUASM ARMv7-A">
1645         <description>GNU Assembler for Armv7-A architecture</description>
1646         <accept condition="ARMCC6"/>
1647         <accept condition="GCC"/>
1648         <require condition="ARMv7-A Device"/>
1649     </condition>
1650     <condition id="IARASM ARMv7-A">
1651         <description>IAR Assembler for Armv7-A architecture</description>
1652         <require condition="IAR"/>
1653         <require condition="ARMv7-A Device"/>
1654     </condition>
1655
1656     <!-- OS Tick -->
1657     <condition id="OS Tick PTIM">
1658       <description>Components required for OS Tick Private Timer</description>
1659       <accept Dcore="Cortex-A5"/>
1660       <accept Dcore="Cortex-A9"/>
1661       <require Cclass="Device" Cgroup="IRQ Controller"/>
1662     </condition>
1663
1664     <condition id="OS Tick GTIM">
1665       <description>Components required for OS Tick Generic Physical Timer</description>
1666       <accept Dcore="Cortex-A7"/>
1667       <require Cclass="Device" Cgroup="IRQ Controller"/>
1668     </condition>
1669
1670   </conditions>
1671
1672   <components>
1673     <!-- CMSIS-Core component -->
1674     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.6.0"  condition="ARMv6_7_8-M Device" >
1675       <description>CMSIS-CORE for Cortex-M, SC000, SC300, Star-MC1, ARMv8-M, ARMv8.1-M</description>
1676       <files>
1677         <!-- CPU independent -->
1678         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1679         <file category="include" name="CMSIS/Core/Include/"/>
1680         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
1681         <!-- Code template -->
1682         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
1683         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1684       </files>
1685     </component>
1686
1687     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.2.1"  condition="ARMv7-A Device" >
1688       <description>CMSIS-CORE for Cortex-A</description>
1689       <files>
1690         <!-- CPU independent -->
1691         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
1692         <file category="include" name="CMSIS/Core_A/Include/"/>
1693       </files>
1694     </component>
1695
1696     <!-- CMSIS-Startup components -->
1697     <!-- Cortex-M0 -->
1698     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS" isDefaultVariant="true">
1699       <description>System and Startup for Generic Arm Cortex-M0 device</description>
1700       <files>
1701         <!-- include folder / device header file -->
1702         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1703         <!-- startup / system file -->
1704         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
1705         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1706         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1707         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1708         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1709       </files>
1710     </component>
1711     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
1712       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
1713       <files>
1714         <!-- include folder / device header file -->
1715         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1716         <!-- startup / system file -->
1717         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
1718         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.2.0" attr="config" condition="GCC"/>
1719         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1720         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1721         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1722       </files>
1723     </component>
1724
1725     <!-- Cortex-M0+ -->
1726     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS" isDefaultVariant="true">
1727       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
1728       <files>
1729         <!-- include folder / device header file -->
1730         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1731         <!-- startup / system file -->
1732         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
1733         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1734         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1735         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
1736         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1737       </files>
1738     </component>
1739     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM0+ CMSIS">
1740       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
1741       <files>
1742         <!-- include folder / device header file -->
1743         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1744         <!-- startup / system file -->
1745         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
1746         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.2.0" attr="config" condition="GCC"/>
1747         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
1748         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1749         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1750       </files>
1751     </component>
1752
1753     <!-- Cortex-M1 -->
1754     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS" isDefaultVariant="true">
1755       <description>System and Startup for Generic Arm Cortex-M1 device</description>
1756       <files>
1757         <!-- include folder / device header file -->
1758         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
1759         <!-- startup / system file -->
1760         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
1761         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1762         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1763         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1764         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
1765       </files>
1766     </component>
1767     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
1768       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
1769       <files>
1770         <!-- include folder / device header file -->
1771         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
1772         <!-- startup / system file -->
1773         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
1774         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.2.0" attr="config" condition="GCC"/>
1775         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1776         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
1777         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
1778       </files>
1779     </component>
1780
1781     <!-- Cortex-M3 -->
1782     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="true">
1783       <description>System and Startup for Generic Arm Cortex-M3 device</description>
1784       <files>
1785         <!-- include folder / device header file -->
1786         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1787         <!-- startup / system file -->
1788         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
1789         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1790         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1791         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1792         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
1793       </files>
1794     </component>
1795     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
1796       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
1797       <files>
1798         <!-- include folder / device header file -->
1799         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1800         <!-- startup / system file -->
1801         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
1802         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.2.0" attr="config" condition="GCC"/>
1803         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1804         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1805         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
1806       </files>
1807     </component>
1808
1809     <!-- Cortex-M4 -->
1810     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS" isDefaultVariant="true">
1811       <description>System and Startup for Generic Arm Cortex-M4 device</description>
1812       <files>
1813         <!-- include folder / device header file -->
1814         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1815         <!-- startup / system file -->
1816         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
1817         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1818         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1819         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1820        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
1821       </files>
1822     </component>
1823     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
1824       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
1825       <files>
1826         <!-- include folder / device header file -->
1827         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1828         <!-- startup / system file -->
1829         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
1830         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.2.0" attr="config" condition="GCC"/>
1831         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1832         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1833         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
1834       </files>
1835     </component>
1836
1837     <!-- Cortex-M7 -->
1838     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS" isDefaultVariant="true">
1839       <description>System and Startup for Generic Arm Cortex-M7 device</description>
1840       <files>
1841         <!-- include folder / device header file -->
1842         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1843         <!-- startup / system file -->
1844         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
1845         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
1846         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
1847         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1848         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
1849       </files>
1850     </component>
1851     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
1852       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
1853       <files>
1854         <!-- include folder / device header file -->
1855         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1856         <!-- startup / system file -->
1857         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
1858         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.2.0" attr="config" condition="GCC"/>
1859         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
1860         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1861         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
1862       </files>
1863     </component>
1864
1865     <!-- Cortex-M23 -->
1866     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM23 CMSIS" isDefaultVariant="true">
1867       <description>System and Startup for Generic Arm Cortex-M23 device</description>
1868       <files>
1869         <!-- include folder / device header file -->
1870         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
1871         <!-- startup / system file -->
1872         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"             version="2.1.0" attr="config"/>
1873         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1874         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1875         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1876         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
1877         <!-- SAU configuration -->
1878         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1879       </files>
1880     </component>
1881     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM23 CMSIS">
1882       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
1883       <files>
1884         <!-- include folder / device header file -->
1885         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
1886         <!-- startup / system file -->
1887         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
1888         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1889         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1890         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S"         version="2.2.0" attr="config" condition="GCC"/>
1891         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1892         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.1.0" attr="config" condition="IAR"/>
1893         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
1894         <!-- SAU configuration -->
1895         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1896       </files>
1897     </component>
1898
1899     <!-- Cortex-M33 -->
1900     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM33 CMSIS" isDefaultVariant="true">
1901       <description>System and Startup for Generic Arm Cortex-M33 device</description>
1902       <files>
1903         <!-- include folder / device header file -->
1904         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
1905         <!-- startup / system file -->
1906         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.1.0" attr="config"/>
1907         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1908         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1909         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1910         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
1911         <!-- SAU configuration -->
1912         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
1913       </files>
1914     </component>
1915     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM33 CMSIS">
1916       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
1917       <files>
1918         <!-- include folder / device header file -->
1919         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
1920         <!-- startup / system file -->
1921         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
1922         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1923         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1924         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.3.0" attr="config" condition="GCC"/>
1925         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1926         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.1.0" attr="config" condition="IAR"/>
1927         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
1928         <!-- SAU configuration -->
1929         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
1930       </files>
1931     </component>
1932
1933     <!-- Cortex-M35P -->
1934     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM35P CMSIS" isDefaultVariant="true">
1935       <description>System and Startup for Generic Arm Cortex-M35P device</description>
1936       <files>
1937         <!-- include folder / device header file -->
1938         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
1939         <!-- startup / system file -->
1940         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.1.0" attr="config"/>
1941         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1942         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1943         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
1944         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
1945         <!-- SAU configuration -->
1946         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1947       </files>
1948     </component>
1949     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM35P CMSIS">
1950       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
1951       <files>
1952         <!-- include folder / device header file -->
1953         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
1954         <!-- startup / system file -->
1955         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
1956         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1957         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1958         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.3.0" attr="config" condition="GCC"/>
1959         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
1960         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.1.0" attr="config" condition="IAR"/>
1961         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
1962         <!-- SAU configuration -->
1963         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1964       </files>
1965     </component>
1966
1967     <!-- Cortex-M55 -->
1968     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM55 CMSIS" isDefaultVariant="true">
1969       <description>System and Startup for Generic Cortex-M55 device</description>
1970       <files>
1971         <!-- include folder / device header file -->
1972         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
1973         <!-- startup / system file -->
1974         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.1.0" attr="config"/>
1975         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
1976         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1977         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
1978         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.1.0" attr="config"/>
1979         <!-- SAU configuration -->
1980         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1981       </files>
1982     </component>
1983
1984     <!-- Cortex-M85 -->
1985     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM85 CMSIS" isDefaultVariant="true">
1986       <description>System and Startup for Generic Cortex-M85 device</description>
1987       <files>
1988         <!-- include folder / device header file -->
1989         <file category="include"      name="Device/ARM/ARMCM85/Include/"/>
1990         <!-- startup / system file -->
1991         <file category="sourceC"      name="Device/ARM/ARMCM85/Source/startup_ARMCM85.c"             version="1.0.0" attr="config"/>
1992         <file category="linkerScript" name="Device/ARM/ARMCM85/Source/ARM/ARMCM85_ac6_s.sct"         version="1.0.0" attr="config" condition="Startup ARMCC6 Secure"/>
1993         <file category="linkerScript" name="Device/ARM/ARMCM85/Source/ARM/ARMCM85_ac6.sct"           version="1.0.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
1994         <file category="linkerScript" name="Device/ARM/ARMCM85/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1995         <file category="sourceC"      name="Device/ARM/ARMCM85/Source/system_ARMCM85.c"              version="1.0.0" attr="config"/>
1996         <!-- SAU configuration -->
1997         <file category="header"       name="Device/ARM/ARMCM85/Include/Template/partition_ARMCM85.h" version="1.0.0" attr="config" condition="TZ Secure"/>
1998       </files>
1999     </component>
2000
2001     <!-- Cortex-SC000 -->
2002     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS" isDefaultVariant="true">
2003       <description>System and Startup for Generic Arm SC000 device</description>
2004       <files>
2005         <!-- include folder / device header file -->
2006         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2007         <!-- startup / system file -->
2008         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
2009         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2010         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2011         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2012         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2013       </files>
2014     </component>
2015     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2016       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2017       <files>
2018         <!-- include folder / device header file -->
2019         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2020         <!-- startup / system file -->
2021         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2022         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.2.0" attr="config" condition="GCC"/>
2023         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2024         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2025         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2026       </files>
2027     </component>
2028
2029     <!-- Cortex-SC300 -->
2030     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS" isDefaultVariant="true">
2031       <description>System and Startup for Generic Arm SC300 device</description>
2032       <files>
2033         <!-- include folder / device header file -->
2034         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2035         <!-- startup / system file -->
2036         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
2037         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2038         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2039         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2040         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2041       </files>
2042     </component>
2043     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2044       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2045       <files>
2046         <!-- include folder / device header file -->
2047         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2048         <!-- startup / system file -->
2049         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2050         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.2.0" attr="config" condition="GCC"/>
2051         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2052         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2053         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2054       </files>
2055     </component>
2056
2057     <!-- ARMv8MBL -->
2058     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MBL CMSIS" isDefaultVariant="true">
2059       <description>System and Startup for Generic Armv8-M Baseline device</description>
2060       <files>
2061         <!-- include folder / device header file -->
2062         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2063         <!-- startup / system file -->
2064         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"             version="2.1.0" attr="config"/>
2065         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2066         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2067         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2068         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2069         <!-- SAU configuration -->
2070         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2071       </files>
2072     </component>
2073     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMv8MBL CMSIS">
2074       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2075       <files>
2076         <!-- include folder / device header file -->
2077         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2078         <!-- startup / system file -->
2079         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2080         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2081         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2082         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S"         version="2.2.0" attr="config" condition="GCC"/>
2083         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2084         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2085         <!-- SAU configuration -->
2086         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2087       </files>
2088     </component>
2089
2090     <!-- ARMv8MML -->
2091     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MML CMSIS" isDefaultVariant="true">
2092       <description>System and Startup for Generic Armv8-M Mainline device</description>
2093       <files>
2094         <!-- include folder / device header file -->
2095         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2096         <!-- startup / system file -->
2097         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.1.0" attr="config"/>
2098         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2099         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2100         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2101         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2102         <!-- SAU configuration -->
2103         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2104       </files>
2105     </component>
2106     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMv8MML CMSIS">
2107       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2108       <files>
2109         <!-- include folder / device header file -->
2110         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2111         <!-- startup / system file -->
2112         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2113         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2114         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2115         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.3.0" attr="config" condition="GCC"/>
2116         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2117         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2118         <!-- SAU configuration -->
2119         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2120       </files>
2121     </component>
2122
2123     <!-- ARMv81MML -->
2124     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.2.0" condition="ARMv81MML CMSIS" isDefaultVariant="true">
2125       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2126       <files>
2127         <!-- include folder / device header file -->
2128         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2129         <!-- startup / system file -->
2130         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.1.0" attr="config"/>
2131         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct"         version="1.1.0" attr="config" condition="Startup ARMCC6 Secure"/>
2132         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="Startup ARMCC6 Unsecure"/>
2133         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.2.0" attr="config" condition="GCC"/>
2134         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
2135         <!-- SAU configuration -->
2136         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
2137       </files>
2138     </component>
2139
2140     <!-- Cortex-A5 -->
2141     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA5 CMSIS">
2142       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2143       <files>
2144         <!-- include folder / device header file -->
2145         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2146         <!-- startup / system / mmu files -->
2147         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2148         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2149         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2150         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2151         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.1" attr="config" condition="GCC"/>
2152         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2153         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2154         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2155         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2156         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2157         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2158         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2159
2160       </files>
2161     </component>
2162
2163     <!-- Cortex-A7 -->
2164     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA7 CMSIS">
2165       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2166       <files>
2167         <!-- include folder / device header file -->
2168         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2169         <!-- startup / system / mmu files -->
2170         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2171         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2172         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2173         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2174         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.1" attr="config" condition="GCC"/>
2175         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2176         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2177         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2178         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2179         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2180         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2181         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2182       </files>
2183     </component>
2184
2185     <!-- Cortex-A9 -->
2186     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.2" condition="ARMCA9 CMSIS">
2187       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2188       <files>
2189         <!-- include folder / device header file -->
2190         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2191         <!-- startup / system / mmu files -->
2192         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2193         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2194         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2195         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2196         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.1" attr="config" condition="GCC"/>
2197         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2198         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2199         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2200         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2201         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2202         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2203         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2204       </files>
2205     </component>
2206
2207     <!-- IRQ Controller -->
2208     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2209       <description>IRQ Controller implementation using GIC</description>
2210       <files>
2211         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2212       </files>
2213     </component>
2214
2215     <!-- OS Tick -->
2216     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2217       <description>OS Tick implementation using Private Timer</description>
2218       <files>
2219         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2220       </files>
2221     </component>
2222
2223     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2224       <description>OS Tick implementation using Generic Physical Timer</description>
2225       <files>
2226         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2227       </files>
2228     </component>
2229
2230     <!-- CMSIS-NN component -->
2231     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="3.1.0" condition="CMSIS NN">
2232       <description>CMSIS-NN Neural Network Library</description>
2233       <files>
2234         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2235         <file category="header" name="CMSIS/NN/Include/arm_nn_types.h"/>
2236         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2237         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
2238         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
2239
2240         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2241         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2242         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2243         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
2244         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
2245         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
2246         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2247         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.c"/>
2248         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2249         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2250         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
2251         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
2252         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s16.c"/>
2253         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_fast_s16.c"/>
2254         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s16.c"/>
2255         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_fast_s16.c"/>
2256         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
2257         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
2258         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s16.c"/>
2259         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
2260         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
2261         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2262         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2263         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
2264         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c"/>
2265         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s16.c"/>
2266         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2267         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2268         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
2269         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
2270         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2271         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
2272         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
2273         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
2274         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
2275         <file category="source" name="CMSIS/NN/Source/SVDFunctions/arm_svdf_s8.c"/>
2276         <file category="source" name="CMSIS/NN/Source/SVDFunctions/arm_svdf_state_s16_s8.c"/>
2277         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
2278         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s16.c"/>
2279         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
2280         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s16.c"/>
2281         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2282         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
2283         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s16.c"/>
2284         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
2285         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s16.c"/>
2286         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
2287         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2288         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2289         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2290         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2291         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
2292         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
2293         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2294         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
2295         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s16.c"/>
2296         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c"/>
2297         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
2298         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
2299         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
2300         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_kernel_s16.c"/>
2301         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.c"/>
2302         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
2303         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
2304         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2305         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c"/>
2306         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2307         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
2308         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
2309         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
2310         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
2311         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s16.c"/>
2312         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2313         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2314         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2315         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2316         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2317         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2318         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2319         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
2320         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8_s16.c"/>
2321         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s16.c"/>
2322         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
2323         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2324         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
2325       </files>
2326     </component>
2327
2328     <!-- CMSIS-RTOS Keil RTX component -->
2329     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2330       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2331       <RTE_Components_h>
2332         <!-- the following content goes into file 'RTE_Components.h' -->
2333         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2334         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2335       </RTE_Components_h>
2336       <files>
2337         <!-- CPU independent -->
2338         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2339         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2340         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2341
2342         <!-- RTX templates -->
2343         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2344         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2345         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2346         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2347         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2348         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2349         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2350         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2351         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2352         <!-- tool-chain specific template file -->
2353         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2354         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2355         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2356
2357         <!-- CPU and Compiler dependent -->
2358         <!-- ARMCC -->
2359         <file category="library" condition="ARMCC ARMv6-M LE"      name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2360         <file category="library" condition="ARMCC ARMv6-M BE"      name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2361         <file category="library" condition="ARMCC ARMv7-M NOFP LE" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2362         <file category="library" condition="ARMCC ARMv7-M NOFP BE" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2363         <file category="library" condition="ARMCC ARMv7-M FP LE"   name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2364         <file category="library" condition="ARMCC ARMv7-M FP BE"   name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2365         <!-- GCC -->
2366         <file category="library" condition="GCC ARMv6-M LE"        name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2367         <file category="library" condition="GCC ARMv6-M BE"        name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2368         <file category="library" condition="GCC ARMv7-M NOFP LE"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2369         <file category="library" condition="GCC ARMv7-M NOFP BE"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2370         <file category="library" condition="GCC ARMv7-M FP LE"     name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2371         <file category="library" condition="GCC ARMv7-M FP BE"     name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2372         <!-- IAR -->
2373         <file category="library" condition="IARCC ARMv6-M LE"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2374         <file category="library" condition="IARCC ARMv6-M BE"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2375         <file category="library" condition="IARCC ARMv7-M NOFP LE" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2376         <file category="library" condition="IARCC ARMv7-M NOFP BE" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2377         <file category="library" condition="IARCC ARMv7-M FP LE"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2378         <file category="library" condition="IARCC ARMv7-M FP BE"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2379       </files>
2380     </component>
2381     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2382     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
2383       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2384       <RTE_Components_h>
2385         <!-- the following content goes into file 'RTE_Components.h' -->
2386         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2387         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2388       </RTE_Components_h>
2389       <files>
2390         <!-- CPU independent -->
2391         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2392         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2393         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2394
2395         <!-- RTX templates -->
2396         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2397         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2398         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2399         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2400         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2401         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2402         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2403         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2404         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2405         <!-- tool-chain specific template file -->
2406         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2407         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2408         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2409
2410         <!-- CPU and Compiler dependent -->
2411         <!-- ARMCC -->
2412         <file category="library" condition="ARMCC ARMv7-M NOFP LE" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2413         <file category="library" condition="ARMCC ARMv7-M FP LE"   name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2414         <!-- GCC -->
2415         <file category="library" condition="GCC ARMv7-M NOFP LE"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2416         <file category="library" condition="GCC ARMv7-M FP LE"     name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2417         <!-- IAR -->
2418       </files>
2419     </component>
2420
2421     <!-- CMSIS-RTOS Keil RTX5 component -->
2422     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.4" Capiversion="1.0.0" condition="RTOS RTX5">
2423       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2424       <RTE_Components_h>
2425         <!-- the following content goes into file 'RTE_Components.h' -->
2426         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2427         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2428       </RTE_Components_h>
2429       <files>
2430         <!-- RTX header file -->
2431         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2432         <!-- RTX compatibility module for API V1 -->
2433         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2434       </files>
2435     </component>
2436
2437     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2438     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5">
2439       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
2440       <RTE_Components_h>
2441         <!-- the following content goes into file 'RTE_Components.h' -->
2442         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2443         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2444       </RTE_Components_h>
2445       <files>
2446         <!-- RTX documentation -->
2447         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2448
2449         <!-- RTX header files -->
2450         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2451
2452         <!-- RTX configuration -->
2453         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
2454         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
2455
2456         <!-- RTX templates -->
2457         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2458         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2459         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2460         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2461         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2462         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2463         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2464         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2465         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2466         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2467
2468         <!-- RTX library configuration -->
2469         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2470
2471         <!-- RTX libraries (CPU and Compiler dependent) -->
2472         <!-- ARMCC -->
2473         <file category="library" condition="ARMCC ARMv6-M LE"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2474         <file category="library" condition="ARMCC ARMv7-M NOFP LE"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2475         <file category="library" condition="ARMCC ARMv7-M FP LE"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2476         <file category="library" condition="ARMCC ARMv8-MBL LE"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2477         <file category="library" condition="ARMCC ARMv8-MML NOFP LE"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2478         <file category="library" condition="ARMCC ARMv8-MML FP LE"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2479         <!-- GCC -->
2480         <file category="library" condition="GCC ARMv6-M LE"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2481         <file category="library" condition="GCC ARMv7-M NOFP LE"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2482         <file category="library" condition="GCC ARMv7-M FP LE"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2483         <file category="library" condition="GCC ARMv8-MBL LE"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2484         <file category="library" condition="GCC ARMv8-MML NOFP LE"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2485         <file category="library" condition="GCC ARMv8-MML FP LE"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2486         <!-- IAR -->
2487         <file category="library" condition="IARCC ARMv6-M LE"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2488         <file category="library" condition="IARCC ARMv7-M NOFP LE"    name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2489         <file category="library" condition="IARCC ARMv7-M FP LE"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2490         <file category="library" condition="IARCC ARMv8-MBL LE"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
2491         <file category="library" condition="IARCC ARMv8-MML NOFP LE"  name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
2492         <file category="library" condition="IARCC ARMv8-MML FP LE"    name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
2493         <file category="library" condition="IARCC ARMv81-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MM.a"    src="CMSIS/RTOS2/RTX/Source"/>
2494         <file category="library" condition="IARCC ARMv81-MML FP LE"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MMF.a"   src="CMSIS/RTOS2/RTX/Source"/>
2495       </files>
2496     </component>
2497     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
2498       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
2499       <RTE_Components_h>
2500         <!-- the following content goes into file 'RTE_Components.h' -->
2501         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2502         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2503         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2504       </RTE_Components_h>
2505       <files>
2506         <!-- RTX documentation -->
2507         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2508
2509         <!-- RTX header files -->
2510         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2511
2512         <!-- RTX configuration -->
2513         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
2514         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
2515
2516         <!-- RTX templates -->
2517         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2518         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2519         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2520         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2521         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2522         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2523         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2524         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2525         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2526         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2527
2528         <!-- RTX library configuration -->
2529         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2530
2531         <!-- RTX libraries (CPU and Compiler dependent) -->
2532         <!-- ARMCC -->
2533         <file category="library" condition="ARMCC ARMv8-MBL LE"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2534         <file category="library" condition="ARMCC ARMv8-MML NOFP LE"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2535         <file category="library" condition="ARMCC ARMv8-MML FP LE"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2536         <!-- GCC -->
2537         <file category="library" condition="GCC ARMv8-MBL LE"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2538         <file category="library" condition="GCC ARMv8-MML NOFP LE"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2539         <file category="library" condition="GCC ARMv8-MML FP LE"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2540         <!-- IAR -->
2541         <file category="library" condition="IARCC ARMv8-MBL LE"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
2542         <file category="library" condition="IARCC ARMv8-MML NOFP LE"  name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
2543         <file category="library" condition="IARCC ARMv8-MML FP LE"    name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
2544         <file category="library" condition="IARCC ARMv81-MML NOFP LE" name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MMN.a"    src="CMSIS/RTOS2/RTX/Source"/>
2545         <file category="library" condition="IARCC ARMv81-MML FP LE"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V81MMFN.a"   src="CMSIS/RTOS2/RTX/Source"/>
2546       </files>
2547     </component>
2548     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5">
2549       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
2550       <RTE_Components_h>
2551         <!-- the following content goes into file 'RTE_Components.h' -->
2552         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2553         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2554         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2555       </RTE_Components_h>
2556       <files>
2557         <!-- RTX documentation -->
2558         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2559
2560         <!-- RTX header files -->
2561         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2562
2563         <!-- RTX configuration -->
2564         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
2565         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
2566
2567         <!-- RTX templates -->
2568         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2569         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2570         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2571         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2572         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2573         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2574         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2575         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2576         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2577         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2578
2579         <!-- RTX sources (core) -->
2580         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2581         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2582         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2583         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2584         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2585         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2586         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2587         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2588         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2589         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2590         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2591         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2592         <!-- RTX sources (library configuration) -->
2593         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2594         <!-- RTX sources (handlers ARMASM) -->
2595         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="ARMASM ARMv6-M"/>
2596         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="ARMASM ARMv7-M"/>
2597         <!-- RTX sources (handlers GAS) -->
2598         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="GNUASM ARMv6-M"/>
2599         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="GNUASM ARMv7-M"/>
2600         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="GNUASM ARMv8-MBL"/>
2601         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="GNUASM ARMv8-MML"/>
2602         <!-- RTX sources (handlers IAR) -->
2603         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="IARASM ARMv6-M"/>
2604         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="IARASM ARMv7-M"/>
2605         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="IARASM ARMv8-MBL"/>
2606         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="IARASM ARMv8-MML"/>
2607         <!-- OS Tick (SysTick) -->
2608         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2609       </files>
2610     </component>
2611     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
2612       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
2613       <RTE_Components_h>
2614         <!-- the following content goes into file 'RTE_Components.h' -->
2615         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2616         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2617         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2618       </RTE_Components_h>
2619       <files>
2620         <!-- RTX documentation -->
2621         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2622
2623         <!-- RTX header files -->
2624         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2625
2626         <!-- RTX configuration -->
2627         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
2628         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
2629
2630         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2631
2632         <!-- RTX templates -->
2633         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2634         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2635         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2636         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2637         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2638         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2639         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2640         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2641         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2642         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2643
2644         <!-- RTX sources (core) -->
2645         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2646         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2647         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2648         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2649         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2650         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2651         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2652         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2653         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2654         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2655         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2656         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2657         <!-- RTX sources (library configuration) -->
2658         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2659         <!-- RTX sources (handlers ARMASM) -->
2660         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7a.s" condition="ARMASM ARMv7-A"/>
2661         <!-- RTX sources (handlers GAS) -->
2662         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="GNUASM ARMv7-A"/>
2663         <!-- RTX sources (handlers IAR) -->
2664         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7a.s" condition="IARASM ARMv7-A"/>
2665       </files>
2666     </component>
2667     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
2668       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
2669       <RTE_Components_h>
2670         <!-- the following content goes into file 'RTE_Components.h' -->
2671         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2672         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2673         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2674         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2675       </RTE_Components_h>
2676       <files>
2677         <!-- RTX documentation -->
2678         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2679
2680         <!-- RTX header files -->
2681         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2682
2683         <!-- RTX configuration -->
2684         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
2685         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
2686
2687         <!-- RTX templates -->
2688         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
2689         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2690         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2691         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2692         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2693         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2694         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2695         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2696         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2697         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2698
2699         <!-- RTX sources (core) -->
2700         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2701         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2702         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2703         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2704         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2705         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2706         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2707         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2708         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2709         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2710         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2711         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2712         <!-- RTX sources (library configuration) -->
2713         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2714         <!-- RTX sources (GAS handlers) -->
2715         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="GNUASM ARMv8-MBL"/>
2716         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="GNUASM ARMv8-MML"/>
2717         <!-- RTX sources (IAR handlers) -->
2718         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="IARASM ARMv8-MBL"/>
2719         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="IARASM ARMv8-MML"/>
2720         <!-- OS Tick (SysTick) -->
2721         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2722       </files>
2723     </component>
2724
2725     <!-- CMSIS-Driver Custom components -->
2726     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
2727       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
2728       <files>
2729         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
2730         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
2731       </files>
2732     </component>
2733     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
2734       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
2735       <files>
2736         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
2737         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
2738       </files>
2739     </component>
2740     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
2741       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
2742       <files>
2743         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
2744         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
2745       </files>
2746     </component>
2747     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
2748       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
2749       <files>
2750         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
2751         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
2752       </files>
2753     </component>
2754     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
2755       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
2756       <files>
2757         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
2758         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
2759       </files>
2760     </component>
2761     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
2762       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
2763       <files>
2764         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
2765         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
2766       </files>
2767     </component>
2768     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
2769       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
2770       <files>
2771         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
2772         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
2773       </files>
2774     </component>
2775     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
2776       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
2777       <files>
2778         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
2779         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
2780       </files>
2781     </component>
2782     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
2783       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
2784       <files>
2785         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
2786         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
2787         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
2788         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
2789       </files>
2790     </component>
2791     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
2792       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
2793       <files>
2794         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
2795         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
2796       </files>
2797     </component>
2798     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
2799       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
2800       <files>
2801         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
2802         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
2803       </files>
2804     </component>
2805     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
2806       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
2807       <files>
2808         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
2809         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
2810       </files>
2811     </component>
2812     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
2813       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
2814       <files>
2815         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
2816         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
2817       </files>
2818     </component>
2819     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
2820       <description>Access to #include Driver_WiFi.h file</description>
2821       <files>
2822         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
2823         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
2824       </files>
2825     </component>
2826
2827     <!-- VIO components -->
2828     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
2829       <description>Virtual I/O custom implementation template</description>
2830       <files>
2831         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
2832       </files>
2833     </component>
2834     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
2835       <description>Virtual I/O implementation using memory only</description>
2836       <files>
2837         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
2838       </files>
2839     </component>
2840
2841   </components>
2842
2843   <boards>
2844     <board name="uVision Simulator" vendor="Keil">
2845       <description>uVision Simulator</description>
2846       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2847       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2848       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
2849       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
2850       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2851       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2852       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2853       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2854       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2855       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2856       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2857       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2858       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2859       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2860       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
2861       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2862       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2863       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2864       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2865       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2866       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2867       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
2868       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
2869       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
2870       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
2871       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
2872     </board>
2873
2874     <board name="EWARM Simulator" vendor="IAR">
2875       <description>EWARM Simulator</description>
2876       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2877       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2878       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
2879       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
2880       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2881       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2882       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2883       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2884       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2885       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2886       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2887       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2888       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2889       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2890       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
2891       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2892       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2893       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2894       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2895       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2896       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2897       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
2898       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
2899       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
2900       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
2901       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
2902     </board>
2903   </boards>
2904
2905   <examples>
2906     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2907       <description>CMSIS-RTOS2 Blinky example</description>
2908       <board name="uVision Simulator" vendor="Keil"/>
2909       <project>
2910         <environment name="uv" load="Blinky.uvprojx"/>
2911       </project>
2912       <attributes>
2913         <component Cclass="CMSIS" Cgroup="CORE"/>
2914         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2915         <component Cclass="Device" Cgroup="Startup"/>
2916         <category>Getting Started</category>
2917       </attributes>
2918     </example>
2919
2920     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2921       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2922       <board name="uVision Simulator" vendor="Keil"/>
2923       <project>
2924         <environment name="uv" load="Blinky.uvprojx"/>
2925       </project>
2926       <attributes>
2927         <component Cclass="CMSIS" Cgroup="CORE"/>
2928         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2929         <component Cclass="Device" Cgroup="Startup"/>
2930         <category>Getting Started</category>
2931       </attributes>
2932     </example>
2933
2934     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
2935       <description>CMSIS-RTOS2 Message Queue Example</description>
2936       <board name="uVision Simulator" vendor="Keil"/>
2937       <project>
2938         <environment name="uv" load="MsqQueue.uvprojx"/>
2939       </project>
2940       <attributes>
2941         <component Cclass="CMSIS" Cgroup="CORE"/>
2942         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2943         <component Cclass="Compiler" Cgroup="EventRecorder"/>
2944         <component Cclass="Device" Cgroup="Startup"/>
2945         <category>Getting Started</category>
2946       </attributes>
2947     </example>
2948
2949     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
2950       <description>CMSIS-RTOS2 Memory Pool Example</description>
2951       <board name="uVision Simulator" vendor="Keil"/>
2952       <project>
2953         <environment name="uv" load="MemPool.uvprojx"/>
2954       </project>
2955       <attributes>
2956         <component Cclass="CMSIS" Cgroup="CORE"/>
2957         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2958         <component Cclass="Compiler" Cgroup="EventRecorder"/>
2959         <component Cclass="Device" Cgroup="Startup"/>
2960         <category>Getting Started</category>
2961       </attributes>
2962     </example>
2963
2964     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2965       <description>Bare-metal secure/non-secure example without RTOS</description>
2966       <board name="uVision Simulator" vendor="Keil"/>
2967       <project>
2968         <environment name="uv" load="NoRTOS.uvmpw"/>
2969       </project>
2970       <attributes>
2971         <component Cclass="CMSIS" Cgroup="CORE"/>
2972         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2973         <component Cclass="Device" Cgroup="Startup"/>
2974         <category>Getting Started</category>
2975       </attributes>
2976     </example>
2977
2978     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2979       <description>Secure/non-secure RTOS example with thread context management</description>
2980       <board name="uVision Simulator" vendor="Keil"/>
2981       <project>
2982         <environment name="uv" load="RTOS.uvmpw"/>
2983       </project>
2984       <attributes>
2985         <component Cclass="CMSIS" Cgroup="CORE"/>
2986         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2987         <component Cclass="Device" Cgroup="Startup"/>
2988         <category>Getting Started</category>
2989       </attributes>
2990     </example>
2991
2992     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2993       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2994       <board name="uVision Simulator" vendor="Keil"/>
2995       <project>
2996         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2997       </project>
2998       <attributes>
2999         <component Cclass="CMSIS" Cgroup="CORE"/>
3000         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3001         <component Cclass="Device" Cgroup="Startup"/>
3002         <category>Getting Started</category>
3003       </attributes>
3004     </example>
3005
3006     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
3007       <description>CMSIS-RTOS2 Blinky example</description>
3008       <board name="EWARM Simulator" vendor="IAR"/>
3009       <project>
3010         <environment name="iar" load="Blinky/Blinky.ewp"/>
3011       </project>
3012       <attributes>
3013         <component Cclass="CMSIS" Cgroup="CORE"/>
3014         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3015         <component Cclass="Device" Cgroup="Startup"/>
3016         <category>Getting Started</category>
3017       </attributes>
3018     </example>
3019
3020     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
3021       <description>CMSIS-RTOS2 Message Queue Example</description>
3022       <board name="EWARM Simulator" vendor="IAR"/>
3023       <project>
3024         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
3025       </project>
3026       <attributes>
3027         <component Cclass="CMSIS" Cgroup="CORE"/>
3028         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3029         <component Cclass="Device" Cgroup="Startup"/>
3030         <category>Getting Started</category>
3031       </attributes>
3032     </example>
3033
3034   </examples>
3035
3036 </package>