begriffs open source - cmsis/blob - main/Core_A/group__CMSIS__ACTLR__BITS.html

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  46    <div id="projectname">CMSIS-Core (Cortex-A)
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  55    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
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 131 <a href="#define-members">Macros</a>  </div>
 132   <div class="headertitle"><div class="title">ACTLR Bits<div class="ingroups"><a class="el" href="group__CMSIS__core__register.html">Core Register Access</a> &raquo; <a class="el" href="group__CMSIS__ACTLR.html">Auxiliary Control Register (ACTLR)</a></div></div></div>
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 135
 136 <p>Bit position and mask macros.
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 138 <table class="memberdecls">
 139 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
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 193 <tr class="memdesc:ga6aafd83ca6c02f705def8edc8c064c04"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: L1RADIS Mask.  <br /></td></tr>
 194 <tr class="separator:ga6aafd83ca6c02f705def8edc8c064c04"><td class="memSeparator" colspan="2">&#160;</td></tr>
 195 <tr class="memitem:ga4ca2a9236b157d3f9405cf8c398897a2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga4ca2a9236b157d3f9405cf8c398897a2">ACTLR_DWBST_Pos</a>&#160;&#160;&#160;11U</td></tr>
 196 <tr class="memdesc:ga4ca2a9236b157d3f9405cf8c398897a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: DWBST Position.  <br /></td></tr>
 197 <tr class="separator:ga4ca2a9236b157d3f9405cf8c398897a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 198 <tr class="memitem:gab948ab9af88a9357e2e383d948e9dc7e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gab948ab9af88a9357e2e383d948e9dc7e">ACTLR_DWBST_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga4ca2a9236b157d3f9405cf8c398897a2">ACTLR_DWBST_Pos</a>)</td></tr>
 199 <tr class="memdesc:gab948ab9af88a9357e2e383d948e9dc7e"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: DWBST Mask.  <br /></td></tr>
 200 <tr class="separator:gab948ab9af88a9357e2e383d948e9dc7e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 201 <tr class="memitem:ga505f33bbe45bbcaa9fcb738cb30daf4e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga505f33bbe45bbcaa9fcb738cb30daf4e">ACTLR_L2RADIS_Pos</a>&#160;&#160;&#160;11U</td></tr>
 202 <tr class="memdesc:ga505f33bbe45bbcaa9fcb738cb30daf4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: L2RADIS Position.  <br /></td></tr>
 203 <tr class="separator:ga505f33bbe45bbcaa9fcb738cb30daf4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 204 <tr class="memitem:gad84b20f4f5d1979bb000a14a582cad12"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gad84b20f4f5d1979bb000a14a582cad12">ACTLR_L2RADIS_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga505f33bbe45bbcaa9fcb738cb30daf4e">ACTLR_L2RADIS_Pos</a>)</td></tr>
 205 <tr class="memdesc:gad84b20f4f5d1979bb000a14a582cad12"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: L2RADIS Mask.  <br /></td></tr>
 206 <tr class="separator:gad84b20f4f5d1979bb000a14a582cad12"><td class="memSeparator" colspan="2">&#160;</td></tr>
 207 <tr class="memitem:ga96eb411770c8e2b87f5e62b95e50ee02"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga96eb411770c8e2b87f5e62b95e50ee02">ACTLR_DODMBS_Pos</a>&#160;&#160;&#160;10U</td></tr>
 208 <tr class="memdesc:ga96eb411770c8e2b87f5e62b95e50ee02"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: DODMBS Position.  <br /></td></tr>
 209 <tr class="separator:ga96eb411770c8e2b87f5e62b95e50ee02"><td class="memSeparator" colspan="2">&#160;</td></tr>
 210 <tr class="memitem:ga88a85e6310334edb190a6e9298ae98b7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga88a85e6310334edb190a6e9298ae98b7">ACTLR_DODMBS_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga96eb411770c8e2b87f5e62b95e50ee02">ACTLR_DODMBS_Pos</a>)</td></tr>
 211 <tr class="memdesc:ga88a85e6310334edb190a6e9298ae98b7"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: DODMBS Mask.  <br /></td></tr>
 212 <tr class="separator:ga88a85e6310334edb190a6e9298ae98b7"><td class="memSeparator" colspan="2">&#160;</td></tr>
 213 <tr class="memitem:ga8300a65b41aa3f5c69c7cc713c847749"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8300a65b41aa3f5c69c7cc713c847749">ACTLR_PARITY_Pos</a>&#160;&#160;&#160;9U</td></tr>
 214 <tr class="memdesc:ga8300a65b41aa3f5c69c7cc713c847749"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: PARITY Position.  <br /></td></tr>
 215 <tr class="separator:ga8300a65b41aa3f5c69c7cc713c847749"><td class="memSeparator" colspan="2">&#160;</td></tr>
 216 <tr class="memitem:gadec8e5d68791dc4749bf3f075a3559fb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gadec8e5d68791dc4749bf3f075a3559fb">ACTLR_PARITY_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8300a65b41aa3f5c69c7cc713c847749">ACTLR_PARITY_Pos</a>)</td></tr>
 217 <tr class="memdesc:gadec8e5d68791dc4749bf3f075a3559fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: PARITY Mask.  <br /></td></tr>
 218 <tr class="separator:gadec8e5d68791dc4749bf3f075a3559fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
 219 <tr class="memitem:ga633ee6b129f8668593687ab8537aeb7f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga633ee6b129f8668593687ab8537aeb7f">ACTLR_AOW_Pos</a>&#160;&#160;&#160;8U</td></tr>
 220 <tr class="memdesc:ga633ee6b129f8668593687ab8537aeb7f"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: AOW Position.  <br /></td></tr>
 221 <tr class="separator:ga633ee6b129f8668593687ab8537aeb7f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 222 <tr class="memitem:ga5ca6754c31f90c7e5d1822dddfb4135c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga5ca6754c31f90c7e5d1822dddfb4135c">ACTLR_AOW_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga633ee6b129f8668593687ab8537aeb7f">ACTLR_AOW_Pos</a>)</td></tr>
 223 <tr class="memdesc:ga5ca6754c31f90c7e5d1822dddfb4135c"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: AOW Mask.  <br /></td></tr>
 224 <tr class="separator:ga5ca6754c31f90c7e5d1822dddfb4135c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 225 <tr class="memitem:ga17dcfbcdf5db82900354db5440699701"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga17dcfbcdf5db82900354db5440699701">ACTLR_EXCL_Pos</a>&#160;&#160;&#160;7U</td></tr>
 226 <tr class="memdesc:ga17dcfbcdf5db82900354db5440699701"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: EXCL Position.  <br /></td></tr>
 227 <tr class="separator:ga17dcfbcdf5db82900354db5440699701"><td class="memSeparator" colspan="2">&#160;</td></tr>
 228 <tr class="memitem:ga8b704419a7ed130ecbee00de9fd72d55"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8b704419a7ed130ecbee00de9fd72d55">ACTLR_EXCL_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga17dcfbcdf5db82900354db5440699701">ACTLR_EXCL_Pos</a>)</td></tr>
 229 <tr class="memdesc:ga8b704419a7ed130ecbee00de9fd72d55"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: EXCL Mask.  <br /></td></tr>
 230 <tr class="separator:ga8b704419a7ed130ecbee00de9fd72d55"><td class="memSeparator" colspan="2">&#160;</td></tr>
 231 <tr class="memitem:ga8cb19db067cca1e064189b27b1f1bcbf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8cb19db067cca1e064189b27b1f1bcbf">ACTLR_SMP_Pos</a>&#160;&#160;&#160;6U</td></tr>
 232 <tr class="memdesc:ga8cb19db067cca1e064189b27b1f1bcbf"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: SMP Position.  <br /></td></tr>
 233 <tr class="separator:ga8cb19db067cca1e064189b27b1f1bcbf"><td class="memSeparator" colspan="2">&#160;</td></tr>
 234 <tr class="memitem:gac6dcc315f6c4527434b9b0e4106771d8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gac6dcc315f6c4527434b9b0e4106771d8">ACTLR_SMP_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8cb19db067cca1e064189b27b1f1bcbf">ACTLR_SMP_Pos</a>)</td></tr>
 235 <tr class="memdesc:gac6dcc315f6c4527434b9b0e4106771d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: SMP Mask.  <br /></td></tr>
 236 <tr class="separator:gac6dcc315f6c4527434b9b0e4106771d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 237 <tr class="memitem:ga104112fe1d88dde49635e9b0f9530306"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga104112fe1d88dde49635e9b0f9530306">ACTLR_WFLZM_Pos</a>&#160;&#160;&#160;3U</td></tr>
 238 <tr class="memdesc:ga104112fe1d88dde49635e9b0f9530306"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: WFLZM Position.  <br /></td></tr>
 239 <tr class="separator:ga104112fe1d88dde49635e9b0f9530306"><td class="memSeparator" colspan="2">&#160;</td></tr>
 240 <tr class="memitem:gae5a89cb553773b10e86a9c826f11179f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#gae5a89cb553773b10e86a9c826f11179f">ACTLR_WFLZM_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga104112fe1d88dde49635e9b0f9530306">ACTLR_WFLZM_Pos</a>)</td></tr>
 241 <tr class="memdesc:gae5a89cb553773b10e86a9c826f11179f"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: WFLZM Mask.  <br /></td></tr>
 242 <tr class="separator:gae5a89cb553773b10e86a9c826f11179f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 243 <tr class="memitem:ga65c3c81261a2aa26022f6bb967c4e56b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga65c3c81261a2aa26022f6bb967c4e56b">ACTLR_L1PE_Pos</a>&#160;&#160;&#160;2U</td></tr>
 244 <tr class="memdesc:ga65c3c81261a2aa26022f6bb967c4e56b"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: L1PE Position.  <br /></td></tr>
 245 <tr class="separator:ga65c3c81261a2aa26022f6bb967c4e56b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 246 <tr class="memitem:ga969c20495fe3e50e8c2a73454688a674"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga969c20495fe3e50e8c2a73454688a674">ACTLR_L1PE_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga65c3c81261a2aa26022f6bb967c4e56b">ACTLR_L1PE_Pos</a>)</td></tr>
 247 <tr class="memdesc:ga969c20495fe3e50e8c2a73454688a674"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: L1PE Mask.  <br /></td></tr>
 248 <tr class="separator:ga969c20495fe3e50e8c2a73454688a674"><td class="memSeparator" colspan="2">&#160;</td></tr>
 249 <tr class="memitem:ga89b1a661668534177bc9679149a692ce"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga89b1a661668534177bc9679149a692ce">ACTLR_FW_Pos</a>&#160;&#160;&#160;0U</td></tr>
 250 <tr class="memdesc:ga89b1a661668534177bc9679149a692ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: FW Position.  <br /></td></tr>
 251 <tr class="separator:ga89b1a661668534177bc9679149a692ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
 252 <tr class="memitem:ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ACTLR__BITS.html#ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1">ACTLR_FW_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga89b1a661668534177bc9679149a692ce">ACTLR_FW_Pos</a>)</td></tr>
 253 <tr class="memdesc:ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1"><td class="mdescLeft">&#160;</td><td class="mdescRight">ACTLR: FW Mask.  <br /></td></tr>
 254 <tr class="separator:ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1"><td class="memSeparator" colspan="2">&#160;</td></tr>
 255 </table>
 256 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 257 <p>Bit position and mask macros. </p>
 258 <h2 class="groupheader">Macro Definition Documentation</h2>
 259 <a id="ga5ca6754c31f90c7e5d1822dddfb4135c" name="ga5ca6754c31f90c7e5d1822dddfb4135c"></a>
 260 <h2 class="memtitle"><span class="permalink"><a href="#ga5ca6754c31f90c7e5d1822dddfb4135c">&#9670;&#160;</a></span>ACTLR_AOW_Msk</h2>
 261
 262 <div class="memitem">
 263 <div class="memproto">
 264       <table class="memname">
 265         <tr>
 266           <td class="memname">#define ACTLR_AOW_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga633ee6b129f8668593687ab8537aeb7f">ACTLR_AOW_Pos</a>)</td>
 267         </tr>
 268       </table>
 269 </div><div class="memdoc">
 270
 271 <p>ACTLR: AOW Mask. </p>
 272
 273 </div>
 274 </div>
 275 <a id="ga633ee6b129f8668593687ab8537aeb7f" name="ga633ee6b129f8668593687ab8537aeb7f"></a>
 276 <h2 class="memtitle"><span class="permalink"><a href="#ga633ee6b129f8668593687ab8537aeb7f">&#9670;&#160;</a></span>ACTLR_AOW_Pos</h2>
 277
 278 <div class="memitem">
 279 <div class="memproto">
 280       <table class="memname">
 281         <tr>
 282           <td class="memname">#define ACTLR_AOW_Pos&#160;&#160;&#160;8U</td>
 283         </tr>
 284       </table>
 285 </div><div class="memdoc">
 286
 287 <p>ACTLR: AOW Position. </p>
 288
 289 </div>
 290 </div>
 291 <a id="ga677211818d8a2c7b118115361fbef2e7" name="ga677211818d8a2c7b118115361fbef2e7"></a>
 292 <h2 class="memtitle"><span class="permalink"><a href="#ga677211818d8a2c7b118115361fbef2e7">&#9670;&#160;</a></span>ACTLR_BP_Msk</h2>
 293
 294 <div class="memitem">
 295 <div class="memproto">
 296       <table class="memname">
 297         <tr>
 298           <td class="memname">#define ACTLR_BP_Msk&#160;&#160;&#160;(3UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga120f5d653af52bd711c27c2495ce78f6">ACTLR_BP_Pos</a>)</td>
 299         </tr>
 300       </table>
 301 </div><div class="memdoc">
 302
 303 <p>ACTLR: BP Mask. </p>
 304
 305 </div>
 306 </div>
 307 <a id="ga120f5d653af52bd711c27c2495ce78f6" name="ga120f5d653af52bd711c27c2495ce78f6"></a>
 308 <h2 class="memtitle"><span class="permalink"><a href="#ga120f5d653af52bd711c27c2495ce78f6">&#9670;&#160;</a></span>ACTLR_BP_Pos</h2>
 309
 310 <div class="memitem">
 311 <div class="memproto">
 312       <table class="memname">
 313         <tr>
 314           <td class="memname">#define ACTLR_BP_Pos&#160;&#160;&#160;15U</td>
 315         </tr>
 316       </table>
 317 </div><div class="memdoc">
 318
 319 <p>ACTLR: BP Position. </p>
 320
 321 </div>
 322 </div>
 323 <a id="gad48e0a1c1e59e6721547b45f37baa48b" name="gad48e0a1c1e59e6721547b45f37baa48b"></a>
 324 <h2 class="memtitle"><span class="permalink"><a href="#gad48e0a1c1e59e6721547b45f37baa48b">&#9670;&#160;</a></span>ACTLR_BTDIS_Msk</h2>
 325
 326 <div class="memitem">
 327 <div class="memproto">
 328       <table class="memname">
 329         <tr>
 330           <td class="memname">#define ACTLR_BTDIS_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8c81a1e1522400322f215c52ca80d47d">ACTLR_BTDIS_Pos</a>)</td>
 331         </tr>
 332       </table>
 333 </div><div class="memdoc">
 334
 335 <p>ACTLR: BTDIS Mask. </p>
 336
 337 </div>
 338 </div>
 339 <a id="ga8c81a1e1522400322f215c52ca80d47d" name="ga8c81a1e1522400322f215c52ca80d47d"></a>
 340 <h2 class="memtitle"><span class="permalink"><a href="#ga8c81a1e1522400322f215c52ca80d47d">&#9670;&#160;</a></span>ACTLR_BTDIS_Pos</h2>
 341
 342 <div class="memitem">
 343 <div class="memproto">
 344       <table class="memname">
 345         <tr>
 346           <td class="memname">#define ACTLR_BTDIS_Pos&#160;&#160;&#160;18U</td>
 347         </tr>
 348       </table>
 349 </div><div class="memdoc">
 350
 351 <p>ACTLR: BTDIS Position. </p>
 352
 353 </div>
 354 </div>
 355 <a id="ga0a3d58754927731758c53bd945ac35fe" name="ga0a3d58754927731758c53bd945ac35fe"></a>
 356 <h2 class="memtitle"><span class="permalink"><a href="#ga0a3d58754927731758c53bd945ac35fe">&#9670;&#160;</a></span>ACTLR_DBDI_Msk</h2>
 357
 358 <div class="memitem">
 359 <div class="memproto">
 360       <table class="memname">
 361         <tr>
 362           <td class="memname">#define ACTLR_DBDI_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga0367a8413c0a37d6c1de7b90f3a56aee">ACTLR_DBDI_Pos</a>)</td>
 363         </tr>
 364       </table>
 365 </div><div class="memdoc">
 366
 367 <p>ACTLR: DBDI Mask. </p>
 368
 369 </div>
 370 </div>
 371 <a id="ga0367a8413c0a37d6c1de7b90f3a56aee" name="ga0367a8413c0a37d6c1de7b90f3a56aee"></a>
 372 <h2 class="memtitle"><span class="permalink"><a href="#ga0367a8413c0a37d6c1de7b90f3a56aee">&#9670;&#160;</a></span>ACTLR_DBDI_Pos</h2>
 373
 374 <div class="memitem">
 375 <div class="memproto">
 376       <table class="memname">
 377         <tr>
 378           <td class="memname">#define ACTLR_DBDI_Pos&#160;&#160;&#160;28U</td>
 379         </tr>
 380       </table>
 381 </div><div class="memdoc">
 382
 383 <p>ACTLR: DBDI Position. </p>
 384
 385 </div>
 386 </div>
 387 <a id="gaeee8e0fc7b28f2a405b234e7d2c7486e" name="gaeee8e0fc7b28f2a405b234e7d2c7486e"></a>
 388 <h2 class="memtitle"><span class="permalink"><a href="#gaeee8e0fc7b28f2a405b234e7d2c7486e">&#9670;&#160;</a></span>ACTLR_DDI_Msk</h2>
 389
 390 <div class="memitem">
 391 <div class="memproto">
 392       <table class="memname">
 393         <tr>
 394           <td class="memname">#define ACTLR_DDI_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga5468e93550ce28af7114cbc1e19474c0">ACTLR_DDI_Pos</a>)</td>
 395         </tr>
 396       </table>
 397 </div><div class="memdoc">
 398
 399 <p>ACTLR: DDI Mask. </p>
 400
 401 </div>
 402 </div>
 403 <a id="ga5468e93550ce28af7114cbc1e19474c0" name="ga5468e93550ce28af7114cbc1e19474c0"></a>
 404 <h2 class="memtitle"><span class="permalink"><a href="#ga5468e93550ce28af7114cbc1e19474c0">&#9670;&#160;</a></span>ACTLR_DDI_Pos</h2>
 405
 406 <div class="memitem">
 407 <div class="memproto">
 408       <table class="memname">
 409         <tr>
 410           <td class="memname">#define ACTLR_DDI_Pos&#160;&#160;&#160;28U</td>
 411         </tr>
 412       </table>
 413 </div><div class="memdoc">
 414
 415 <p>ACTLR: DDI Position. </p>
 416
 417 </div>
 418 </div>
 419 <a id="ga4565f2632e5c4be5e1d3eb90fa6f2ac6" name="ga4565f2632e5c4be5e1d3eb90fa6f2ac6"></a>
 420 <h2 class="memtitle"><span class="permalink"><a href="#ga4565f2632e5c4be5e1d3eb90fa6f2ac6">&#9670;&#160;</a></span>ACTLR_DDVM_Msk</h2>
 421
 422 <div class="memitem">
 423 <div class="memproto">
 424       <table class="memname">
 425         <tr>
 426           <td class="memname">#define ACTLR_DDVM_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#gaa9fe7651aa9bb48eea4f5301c69ee54d">ACTLR_DDVM_Pos</a>)</td>
 427         </tr>
 428       </table>
 429 </div><div class="memdoc">
 430
 431 <p>ACTLR: DDVM Mask. </p>
 432
 433 </div>
 434 </div>
 435 <a id="gaa9fe7651aa9bb48eea4f5301c69ee54d" name="gaa9fe7651aa9bb48eea4f5301c69ee54d"></a>
 436 <h2 class="memtitle"><span class="permalink"><a href="#gaa9fe7651aa9bb48eea4f5301c69ee54d">&#9670;&#160;</a></span>ACTLR_DDVM_Pos</h2>
 437
 438 <div class="memitem">
 439 <div class="memproto">
 440       <table class="memname">
 441         <tr>
 442           <td class="memname">#define ACTLR_DDVM_Pos&#160;&#160;&#160;15U</td>
 443         </tr>
 444       </table>
 445 </div><div class="memdoc">
 446
 447 <p>ACTLR: DDVM Position. </p>
 448
 449 </div>
 450 </div>
 451 <a id="ga88a85e6310334edb190a6e9298ae98b7" name="ga88a85e6310334edb190a6e9298ae98b7"></a>
 452 <h2 class="memtitle"><span class="permalink"><a href="#ga88a85e6310334edb190a6e9298ae98b7">&#9670;&#160;</a></span>ACTLR_DODMBS_Msk</h2>
 453
 454 <div class="memitem">
 455 <div class="memproto">
 456       <table class="memname">
 457         <tr>
 458           <td class="memname">#define ACTLR_DODMBS_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga96eb411770c8e2b87f5e62b95e50ee02">ACTLR_DODMBS_Pos</a>)</td>
 459         </tr>
 460       </table>
 461 </div><div class="memdoc">
 462
 463 <p>ACTLR: DODMBS Mask. </p>
 464
 465 </div>
 466 </div>
 467 <a id="ga96eb411770c8e2b87f5e62b95e50ee02" name="ga96eb411770c8e2b87f5e62b95e50ee02"></a>
 468 <h2 class="memtitle"><span class="permalink"><a href="#ga96eb411770c8e2b87f5e62b95e50ee02">&#9670;&#160;</a></span>ACTLR_DODMBS_Pos</h2>
 469
 470 <div class="memitem">
 471 <div class="memproto">
 472       <table class="memname">
 473         <tr>
 474           <td class="memname">#define ACTLR_DODMBS_Pos&#160;&#160;&#160;10U</td>
 475         </tr>
 476       </table>
 477 </div><div class="memdoc">
 478
 479 <p>ACTLR: DODMBS Position. </p>
 480
 481 </div>
 482 </div>
 483 <a id="gab948ab9af88a9357e2e383d948e9dc7e" name="gab948ab9af88a9357e2e383d948e9dc7e"></a>
 484 <h2 class="memtitle"><span class="permalink"><a href="#gab948ab9af88a9357e2e383d948e9dc7e">&#9670;&#160;</a></span>ACTLR_DWBST_Msk</h2>
 485
 486 <div class="memitem">
 487 <div class="memproto">
 488       <table class="memname">
 489         <tr>
 490           <td class="memname">#define ACTLR_DWBST_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga4ca2a9236b157d3f9405cf8c398897a2">ACTLR_DWBST_Pos</a>)</td>
 491         </tr>
 492       </table>
 493 </div><div class="memdoc">
 494
 495 <p>ACTLR: DWBST Mask. </p>
 496
 497 </div>
 498 </div>
 499 <a id="ga4ca2a9236b157d3f9405cf8c398897a2" name="ga4ca2a9236b157d3f9405cf8c398897a2"></a>
 500 <h2 class="memtitle"><span class="permalink"><a href="#ga4ca2a9236b157d3f9405cf8c398897a2">&#9670;&#160;</a></span>ACTLR_DWBST_Pos</h2>
 501
 502 <div class="memitem">
 503 <div class="memproto">
 504       <table class="memname">
 505         <tr>
 506           <td class="memname">#define ACTLR_DWBST_Pos&#160;&#160;&#160;11U</td>
 507         </tr>
 508       </table>
 509 </div><div class="memdoc">
 510
 511 <p>ACTLR: DWBST Position. </p>
 512
 513 </div>
 514 </div>
 515 <a id="ga8b704419a7ed130ecbee00de9fd72d55" name="ga8b704419a7ed130ecbee00de9fd72d55"></a>
 516 <h2 class="memtitle"><span class="permalink"><a href="#ga8b704419a7ed130ecbee00de9fd72d55">&#9670;&#160;</a></span>ACTLR_EXCL_Msk</h2>
 517
 518 <div class="memitem">
 519 <div class="memproto">
 520       <table class="memname">
 521         <tr>
 522           <td class="memname">#define ACTLR_EXCL_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga17dcfbcdf5db82900354db5440699701">ACTLR_EXCL_Pos</a>)</td>
 523         </tr>
 524       </table>
 525 </div><div class="memdoc">
 526
 527 <p>ACTLR: EXCL Mask. </p>
 528
 529 </div>
 530 </div>
 531 <a id="ga17dcfbcdf5db82900354db5440699701" name="ga17dcfbcdf5db82900354db5440699701"></a>
 532 <h2 class="memtitle"><span class="permalink"><a href="#ga17dcfbcdf5db82900354db5440699701">&#9670;&#160;</a></span>ACTLR_EXCL_Pos</h2>
 533
 534 <div class="memitem">
 535 <div class="memproto">
 536       <table class="memname">
 537         <tr>
 538           <td class="memname">#define ACTLR_EXCL_Pos&#160;&#160;&#160;7U</td>
 539         </tr>
 540       </table>
 541 </div><div class="memdoc">
 542
 543 <p>ACTLR: EXCL Position. </p>
 544
 545 </div>
 546 </div>
 547 <a id="ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1" name="ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1"></a>
 548 <h2 class="memtitle"><span class="permalink"><a href="#ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1">&#9670;&#160;</a></span>ACTLR_FW_Msk</h2>
 549
 550 <div class="memitem">
 551 <div class="memproto">
 552       <table class="memname">
 553         <tr>
 554           <td class="memname">#define ACTLR_FW_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga89b1a661668534177bc9679149a692ce">ACTLR_FW_Pos</a>)</td>
 555         </tr>
 556       </table>
 557 </div><div class="memdoc">
 558
 559 <p>ACTLR: FW Mask. </p>
 560
 561 </div>
 562 </div>
 563 <a id="ga89b1a661668534177bc9679149a692ce" name="ga89b1a661668534177bc9679149a692ce"></a>
 564 <h2 class="memtitle"><span class="permalink"><a href="#ga89b1a661668534177bc9679149a692ce">&#9670;&#160;</a></span>ACTLR_FW_Pos</h2>
 565
 566 <div class="memitem">
 567 <div class="memproto">
 568       <table class="memname">
 569         <tr>
 570           <td class="memname">#define ACTLR_FW_Pos&#160;&#160;&#160;0U</td>
 571         </tr>
 572       </table>
 573 </div><div class="memdoc">
 574
 575 <p>ACTLR: FW Position. </p>
 576
 577 </div>
 578 </div>
 579 <a id="gad701fa3ff69b89ba185b7482e81cb6fd" name="gad701fa3ff69b89ba185b7482e81cb6fd"></a>
 580 <h2 class="memtitle"><span class="permalink"><a href="#gad701fa3ff69b89ba185b7482e81cb6fd">&#9670;&#160;</a></span>ACTLR_L1PCTL_Msk</h2>
 581
 582 <div class="memitem">
 583 <div class="memproto">
 584       <table class="memname">
 585         <tr>
 586           <td class="memname">#define ACTLR_L1PCTL_Msk&#160;&#160;&#160;(3UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga546f1f2bbf7344bad6522205257f17ae">ACTLR_L1PCTL_Pos</a>)</td>
 587         </tr>
 588       </table>
 589 </div><div class="memdoc">
 590
 591 <p>ACTLR: L1PCTL Mask. </p>
 592
 593 </div>
 594 </div>
 595 <a id="ga546f1f2bbf7344bad6522205257f17ae" name="ga546f1f2bbf7344bad6522205257f17ae"></a>
 596 <h2 class="memtitle"><span class="permalink"><a href="#ga546f1f2bbf7344bad6522205257f17ae">&#9670;&#160;</a></span>ACTLR_L1PCTL_Pos</h2>
 597
 598 <div class="memitem">
 599 <div class="memproto">
 600       <table class="memname">
 601         <tr>
 602           <td class="memname">#define ACTLR_L1PCTL_Pos&#160;&#160;&#160;13U</td>
 603         </tr>
 604       </table>
 605 </div><div class="memdoc">
 606
 607 <p>ACTLR: L1PCTL Position. </p>
 608
 609 </div>
 610 </div>
 611 <a id="ga969c20495fe3e50e8c2a73454688a674" name="ga969c20495fe3e50e8c2a73454688a674"></a>
 612 <h2 class="memtitle"><span class="permalink"><a href="#ga969c20495fe3e50e8c2a73454688a674">&#9670;&#160;</a></span>ACTLR_L1PE_Msk</h2>
 613
 614 <div class="memitem">
 615 <div class="memproto">
 616       <table class="memname">
 617         <tr>
 618           <td class="memname">#define ACTLR_L1PE_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga65c3c81261a2aa26022f6bb967c4e56b">ACTLR_L1PE_Pos</a>)</td>
 619         </tr>
 620       </table>
 621 </div><div class="memdoc">
 622
 623 <p>ACTLR: L1PE Mask. </p>
 624
 625 </div>
 626 </div>
 627 <a id="ga65c3c81261a2aa26022f6bb967c4e56b" name="ga65c3c81261a2aa26022f6bb967c4e56b"></a>
 628 <h2 class="memtitle"><span class="permalink"><a href="#ga65c3c81261a2aa26022f6bb967c4e56b">&#9670;&#160;</a></span>ACTLR_L1PE_Pos</h2>
 629
 630 <div class="memitem">
 631 <div class="memproto">
 632       <table class="memname">
 633         <tr>
 634           <td class="memname">#define ACTLR_L1PE_Pos&#160;&#160;&#160;2U</td>
 635         </tr>
 636       </table>
 637 </div><div class="memdoc">
 638
 639 <p>ACTLR: L1PE Position. </p>
 640
 641 </div>
 642 </div>
 643 <a id="ga6aafd83ca6c02f705def8edc8c064c04" name="ga6aafd83ca6c02f705def8edc8c064c04"></a>
 644 <h2 class="memtitle"><span class="permalink"><a href="#ga6aafd83ca6c02f705def8edc8c064c04">&#9670;&#160;</a></span>ACTLR_L1RADIS_Msk</h2>
 645
 646 <div class="memitem">
 647 <div class="memproto">
 648       <table class="memname">
 649         <tr>
 650           <td class="memname">#define ACTLR_L1RADIS_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#gaf8b306b854ecd78110cf944d414644a1">ACTLR_L1RADIS_Pos</a>)</td>
 651         </tr>
 652       </table>
 653 </div><div class="memdoc">
 654
 655 <p>ACTLR: L1RADIS Mask. </p>
 656
 657 </div>
 658 </div>
 659 <a id="gaf8b306b854ecd78110cf944d414644a1" name="gaf8b306b854ecd78110cf944d414644a1"></a>
 660 <h2 class="memtitle"><span class="permalink"><a href="#gaf8b306b854ecd78110cf944d414644a1">&#9670;&#160;</a></span>ACTLR_L1RADIS_Pos</h2>
 661
 662 <div class="memitem">
 663 <div class="memproto">
 664       <table class="memname">
 665         <tr>
 666           <td class="memname">#define ACTLR_L1RADIS_Pos&#160;&#160;&#160;12U</td>
 667         </tr>
 668       </table>
 669 </div><div class="memdoc">
 670
 671 <p>ACTLR: L1RADIS Position. </p>
 672
 673 </div>
 674 </div>
 675 <a id="gad84b20f4f5d1979bb000a14a582cad12" name="gad84b20f4f5d1979bb000a14a582cad12"></a>
 676 <h2 class="memtitle"><span class="permalink"><a href="#gad84b20f4f5d1979bb000a14a582cad12">&#9670;&#160;</a></span>ACTLR_L2RADIS_Msk</h2>
 677
 678 <div class="memitem">
 679 <div class="memproto">
 680       <table class="memname">
 681         <tr>
 682           <td class="memname">#define ACTLR_L2RADIS_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga505f33bbe45bbcaa9fcb738cb30daf4e">ACTLR_L2RADIS_Pos</a>)</td>
 683         </tr>
 684       </table>
 685 </div><div class="memdoc">
 686
 687 <p>ACTLR: L2RADIS Mask. </p>
 688
 689 </div>
 690 </div>
 691 <a id="ga505f33bbe45bbcaa9fcb738cb30daf4e" name="ga505f33bbe45bbcaa9fcb738cb30daf4e"></a>
 692 <h2 class="memtitle"><span class="permalink"><a href="#ga505f33bbe45bbcaa9fcb738cb30daf4e">&#9670;&#160;</a></span>ACTLR_L2RADIS_Pos</h2>
 693
 694 <div class="memitem">
 695 <div class="memproto">
 696       <table class="memname">
 697         <tr>
 698           <td class="memname">#define ACTLR_L2RADIS_Pos&#160;&#160;&#160;11U</td>
 699         </tr>
 700       </table>
 701 </div><div class="memdoc">
 702
 703 <p>ACTLR: L2RADIS Position. </p>
 704
 705 </div>
 706 </div>
 707 <a id="gadec8e5d68791dc4749bf3f075a3559fb" name="gadec8e5d68791dc4749bf3f075a3559fb"></a>
 708 <h2 class="memtitle"><span class="permalink"><a href="#gadec8e5d68791dc4749bf3f075a3559fb">&#9670;&#160;</a></span>ACTLR_PARITY_Msk</h2>
 709
 710 <div class="memitem">
 711 <div class="memproto">
 712       <table class="memname">
 713         <tr>
 714           <td class="memname">#define ACTLR_PARITY_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8300a65b41aa3f5c69c7cc713c847749">ACTLR_PARITY_Pos</a>)</td>
 715         </tr>
 716       </table>
 717 </div><div class="memdoc">
 718
 719 <p>ACTLR: PARITY Mask. </p>
 720
 721 </div>
 722 </div>
 723 <a id="ga8300a65b41aa3f5c69c7cc713c847749" name="ga8300a65b41aa3f5c69c7cc713c847749"></a>
 724 <h2 class="memtitle"><span class="permalink"><a href="#ga8300a65b41aa3f5c69c7cc713c847749">&#9670;&#160;</a></span>ACTLR_PARITY_Pos</h2>
 725
 726 <div class="memitem">
 727 <div class="memproto">
 728       <table class="memname">
 729         <tr>
 730           <td class="memname">#define ACTLR_PARITY_Pos&#160;&#160;&#160;9U</td>
 731         </tr>
 732       </table>
 733 </div><div class="memdoc">
 734
 735 <p>ACTLR: PARITY Position. </p>
 736
 737 </div>
 738 </div>
 739 <a id="gac6aea849e5320c0e93321d5d8b0c117c" name="gac6aea849e5320c0e93321d5d8b0c117c"></a>
 740 <h2 class="memtitle"><span class="permalink"><a href="#gac6aea849e5320c0e93321d5d8b0c117c">&#9670;&#160;</a></span>ACTLR_RADIS_Msk</h2>
 741
 742 <div class="memitem">
 743 <div class="memproto">
 744       <table class="memname">
 745         <tr>
 746           <td class="memname">#define ACTLR_RADIS_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#gaf7a424f7f8c4f46592ce8f47f4bced44">ACTLR_RADIS_Pos</a>)</td>
 747         </tr>
 748       </table>
 749 </div><div class="memdoc">
 750
 751 <p>ACTLR: RADIS Mask. </p>
 752
 753 </div>
 754 </div>
 755 <a id="gaf7a424f7f8c4f46592ce8f47f4bced44" name="gaf7a424f7f8c4f46592ce8f47f4bced44"></a>
 756 <h2 class="memtitle"><span class="permalink"><a href="#gaf7a424f7f8c4f46592ce8f47f4bced44">&#9670;&#160;</a></span>ACTLR_RADIS_Pos</h2>
 757
 758 <div class="memitem">
 759 <div class="memproto">
 760       <table class="memname">
 761         <tr>
 762           <td class="memname">#define ACTLR_RADIS_Pos&#160;&#160;&#160;12U</td>
 763         </tr>
 764       </table>
 765 </div><div class="memdoc">
 766
 767 <p>ACTLR: RADIS Position. </p>
 768
 769 </div>
 770 </div>
 771 <a id="ga8487babc3514e2bb8f3d524e5f80d95f" name="ga8487babc3514e2bb8f3d524e5f80d95f"></a>
 772 <h2 class="memtitle"><span class="permalink"><a href="#ga8487babc3514e2bb8f3d524e5f80d95f">&#9670;&#160;</a></span>ACTLR_RSDIS_Msk</h2>
 773
 774 <div class="memitem">
 775 <div class="memproto">
 776       <table class="memname">
 777         <tr>
 778           <td class="memname">#define ACTLR_RSDIS_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga4412a55ce52db3c5a4f035fcd0e350c6">ACTLR_RSDIS_Pos</a>)</td>
 779         </tr>
 780       </table>
 781 </div><div class="memdoc">
 782
 783 <p>ACTLR: RSDIS Mask. </p>
 784
 785 </div>
 786 </div>
 787 <a id="ga4412a55ce52db3c5a4f035fcd0e350c6" name="ga4412a55ce52db3c5a4f035fcd0e350c6"></a>
 788 <h2 class="memtitle"><span class="permalink"><a href="#ga4412a55ce52db3c5a4f035fcd0e350c6">&#9670;&#160;</a></span>ACTLR_RSDIS_Pos</h2>
 789
 790 <div class="memitem">
 791 <div class="memproto">
 792       <table class="memname">
 793         <tr>
 794           <td class="memname">#define ACTLR_RSDIS_Pos&#160;&#160;&#160;17U</td>
 795         </tr>
 796       </table>
 797 </div><div class="memdoc">
 798
 799 <p>ACTLR: RSDIS Position. </p>
 800
 801 </div>
 802 </div>
 803 <a id="gac6dcc315f6c4527434b9b0e4106771d8" name="gac6dcc315f6c4527434b9b0e4106771d8"></a>
 804 <h2 class="memtitle"><span class="permalink"><a href="#gac6dcc315f6c4527434b9b0e4106771d8">&#9670;&#160;</a></span>ACTLR_SMP_Msk</h2>
 805
 806 <div class="memitem">
 807 <div class="memproto">
 808       <table class="memname">
 809         <tr>
 810           <td class="memname">#define ACTLR_SMP_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8cb19db067cca1e064189b27b1f1bcbf">ACTLR_SMP_Pos</a>)</td>
 811         </tr>
 812       </table>
 813 </div><div class="memdoc">
 814
 815 <p>ACTLR: SMP Mask. </p>
 816
 817 </div>
 818 </div>
 819 <a id="ga8cb19db067cca1e064189b27b1f1bcbf" name="ga8cb19db067cca1e064189b27b1f1bcbf"></a>
 820 <h2 class="memtitle"><span class="permalink"><a href="#ga8cb19db067cca1e064189b27b1f1bcbf">&#9670;&#160;</a></span>ACTLR_SMP_Pos</h2>
 821
 822 <div class="memitem">
 823 <div class="memproto">
 824       <table class="memname">
 825         <tr>
 826           <td class="memname">#define ACTLR_SMP_Pos&#160;&#160;&#160;6U</td>
 827         </tr>
 828       </table>
 829 </div><div class="memdoc">
 830
 831 <p>ACTLR: SMP Position. </p>
 832
 833 </div>
 834 </div>
 835 <a id="gae5a89cb553773b10e86a9c826f11179f" name="gae5a89cb553773b10e86a9c826f11179f"></a>
 836 <h2 class="memtitle"><span class="permalink"><a href="#gae5a89cb553773b10e86a9c826f11179f">&#9670;&#160;</a></span>ACTLR_WFLZM_Msk</h2>
 837
 838 <div class="memitem">
 839 <div class="memproto">
 840       <table class="memname">
 841         <tr>
 842           <td class="memname">#define ACTLR_WFLZM_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga104112fe1d88dde49635e9b0f9530306">ACTLR_WFLZM_Pos</a>)</td>
 843         </tr>
 844       </table>
 845 </div><div class="memdoc">
 846
 847 <p>ACTLR: WFLZM Mask. </p>
 848
 849 </div>
 850 </div>
 851 <a id="ga104112fe1d88dde49635e9b0f9530306" name="ga104112fe1d88dde49635e9b0f9530306"></a>
 852 <h2 class="memtitle"><span class="permalink"><a href="#ga104112fe1d88dde49635e9b0f9530306">&#9670;&#160;</a></span>ACTLR_WFLZM_Pos</h2>
 853
 854 <div class="memitem">
 855 <div class="memproto">
 856       <table class="memname">
 857         <tr>
 858           <td class="memname">#define ACTLR_WFLZM_Pos&#160;&#160;&#160;3U</td>
 859         </tr>
 860       </table>
 861 </div><div class="memdoc">
 862
 863 <p>ACTLR: WFLZM Position. </p>
 864
 865 </div>
 866 </div>
 867 </div><!-- contents -->
 868 </div><!-- doc-content -->
 869 <!-- start footer part -->
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 874         <!--
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