begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.7.0-rc2">
  12       CMSIS-Build: 0.9.0 (beta)
  13         - Draft for CMSIS Project description (CPRJ)
  14       CMSIS-Core(M): 5.4.0 (see revision history for details)
  15         - Cortex-M55 cpu support
  16         - Enhanced MVE support for Armv8.1-MML
  17         - Fixed device config define checks.
  18         - L1 Cache functions for Armv7-M and later
  19       CMSIS-Core(A): 1.2.0 (see revision history for details)
  20         - Fixed GIC_SetPendingIRQ to use GICD_SGIR
  21         - Added missing DSP intrinsics
  22         - Reworked assembly intrinsics: volatile, barriers and clobber
  23       CMSIS-DSP: 1.8.0 (see revision history for details)
  24         - Added new functions and function groups
  25         - Added MVE support
  26       CMSIS-NN: 1.3.0 (see revision history for details)
  27         - Added MVE support
  28         - Further optimizations for kernels using DSP extension
  29       CMSIS-RTOS2:
  30         - RTX 5.5.2 (see revision history for details)
  31       CMSIS-Driver: 2.8.0
  32         - Added VIO API 0.1.0 (Preview)
  33         - removed volatile from status related typedefs in APIs
  34         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  35       CMSIS-Pack: 1.6.3 (see revision history for details)
  36         - deprecating all types specific to cpdsc format. Cpdsc is replaced by Cprj with dedicated schema.
  37       Devices:
  38         - ARMCM55 device
  39         - ARMv81MML startup code recognizing __MVE_USED macro
  40         - Refactored vector table references for all Cortex-M devices
  41         - Reworked ARMCM* C-StartUp files.
  42         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  43       Utilities:
  44         Attention: Linux binaries moved to Linux64 folder!
  45         - SVDConv 3.3.35
  46         - PackChk 1.3.89
  47     </release>
  48     <release version="5.6.0" date="2019-07-10">
  49       CMSIS-Core(M): 5.3.0 (see revision history for details)
  50         - Added provisions for compiler-independent C startup code.
  51       CMSIS-Core(A): 1.1.4 (see revision history for details)
  52         - Fixed __FPU_Enable.
  53       CMSIS-DSP: 1.7.0 (see revision history for details)
  54         - New Neon versions of f32 functions
  55         - Python wrapper
  56         - Preliminary cmake build
  57         - Compilation flags for FFTs
  58         - Changes to arm_math.h
  59       CMSIS-NN: 1.2.0 (see revision history for details)
  60         - New function for depthwise convolution with asymmetric quantization.
  61         - New support functions for requantization.
  62       CMSIS-RTOS:
  63         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  64       CMSIS-RTOS2:
  65         - RTX 5.5.1 (see revision history for details)
  66       CMSIS-Driver: 2.7.1
  67         - WiFi Interface API 1.0.0
  68       Devices:
  69         - Generalized C startup code for all Cortex-M family devices.
  70         - Updated Cortex-A default memory regions and MMU configurations
  71         - Moved Cortex-A memory and system config files to avoid include path issues
  72     </release>
  73     <release version="5.5.1" date="2019-03-20">
  74       The following folders are deprecated
  75         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  76
  77       CMSIS-Core(M): 5.2.1 (see revision history for details)
  78         - Fixed compilation issue in cmsis_armclang_ltm.h
  79     </release>
  80     <release version="5.5.0" date="2019-03-18">
  81       The following folders have been removed:
  82         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  83         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  84       The following folders are deprecated
  85         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  86
  87       CMSIS-Core(M): 5.2.0 (see revision history for details)
  88         - Reworked Stack/Heap configuration for ARM startup files.
  89         - Added Cortex-M35P device support.
  90         - Added generic Armv8.1-M Mainline device support.
  91       CMSIS-Core(A): 1.1.3 (see revision history for details)
  92       CMSIS-DSP: 1.6.0 (see revision history for details)
  93         - reworked DSP library source files
  94         - reworked DSP library documentation
  95         - Changed DSP folder structure
  96         - moved DSP libraries to folder ./DSP/Lib
  97         - ARM DSP Libraries are built with ARMCLANG
  98         - Added DSP Libraries Source variant
  99       CMSIS-RTOS2:
 100         - RTX 5.5.0 (see revision history for details)
 101       CMSIS-Driver: 2.7.0
 102         - Added WiFi Interface API 1.0.0-beta
 103         - Added components for project specific driver implementations
 104       CMSIS-Pack: 1.6.0 (see revision history for details)
 105       Devices:
 106         - Added Cortex-M35P and ARMv81MML device templates.
 107         - Fixed C-Startup Code for GCC (aligned with other compilers)
 108       Utilities:
 109         - SVDConv 3.3.25
 110         - PackChk 1.3.82
 111     </release>
 112     <release version="5.4.0" date="2018-08-01">
 113       Aligned pack structure with repository.
 114       The following folders are deprecated:
 115         - CMSIS/Include/
 116         - CMSIS/DSP_Lib/
 117
 118       CMSIS-Core(M): 5.1.2 (see revision history for details)
 119         - Added Cortex-M1 support (beta).
 120       CMSIS-Core(A): 1.1.2 (see revision history for details)
 121       CMSIS-NN: 1.1.0
 122         - Added new math functions.
 123       CMSIS-RTOS2:
 124         - API 2.1.3 (see revision history for details)
 125         - RTX 5.4.0 (see revision history for details)
 126           * Updated exception handling on Cortex-A
 127       CMSIS-Driver:
 128         - Flash Driver API V2.2.0
 129       Utilities:
 130         - SVDConv 3.3.21
 131         - PackChk 1.3.71
 132     </release>
 133     <release version="5.3.0" date="2018-02-22">
 134       Updated Arm company brand.
 135       CMSIS-Core(M): 5.1.1 (see revision history for details)
 136       CMSIS-Core(A): 1.1.1 (see revision history for details)
 137       CMSIS-DAP: 2.0.0 (see revision history for details)
 138       CMSIS-NN: 1.0.0
 139         - Initial contribution of the bare metal Neural Network Library.
 140       CMSIS-RTOS2:
 141         - RTX 5.3.0 (see revision history for details)
 142         - OS Tick API 1.0.1
 143     </release>
 144     <release version="5.2.0" date="2017-11-16">
 145       CMSIS-Core(M): 5.1.0 (see revision history for details)
 146         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 147         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 148       CMSIS-Core(A): 1.1.0 (see revision history for details)
 149         - Added compiler_iccarm.h.
 150         - Added additional access functions for physical timer.
 151       CMSIS-DAP: 1.2.0 (see revision history for details)
 152       CMSIS-DSP: 1.5.2 (see revision history for details)
 153       CMSIS-Driver: 2.6.0 (see revision history for details)
 154         - CAN Driver API V1.2.0
 155         - NAND Driver API V2.3.0
 156       CMSIS-RTOS:
 157         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 158       CMSIS-RTOS2:
 159         - API 2.1.2 (see revision history for details)
 160         - RTX 5.2.3 (see revision history for details)
 161       Devices:
 162         - Added GCC startup and linker script for Cortex-A9.
 163         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 164         - Added IAR startup code for Cortex-A9
 165     </release>
 166     <release version="5.1.1" date="2017-09-19">
 167       CMSIS-RTOS2:
 168       - RTX 5.2.1 (see revision history for details)
 169     </release>
 170     <release version="5.1.0" date="2017-08-04">
 171       CMSIS-Core(M): 5.0.2 (see revision history for details)
 172       - Changed Version Control macros to be core agnostic.
 173       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 174       CMSIS-Core(A): 1.0.0 (see revision history for details)
 175       - Initial release
 176       - IRQ Controller API 1.0.0
 177       CMSIS-Driver: 2.05 (see revision history for details)
 178       - All typedefs related to status have been made volatile.
 179       CMSIS-RTOS2:
 180       - API 2.1.1 (see revision history for details)
 181       - RTX 5.2.0 (see revision history for details)
 182       - OS Tick API 1.0.0
 183       CMSIS-DSP: 1.5.2 (see revision history for details)
 184       - Fixed GNU Compiler specific diagnostics.
 185       CMSIS-Pack: 1.5.0 (see revision history for details)
 186       - added System Description File (*.SDF) Format
 187       CMSIS-Zone: 0.0.1 (Preview)
 188       - Initial specification draft
 189     </release>
 190     <release version="5.0.1" date="2017-02-03">
 191       Package Description:
 192       - added taxonomy for Cclass RTOS
 193       CMSIS-RTOS2:
 194       - API 2.1   (see revision history for details)
 195       - RTX 5.1.0 (see revision history for details)
 196       CMSIS-Core: 5.0.1 (see revision history for details)
 197       - Added __PACKED_STRUCT macro
 198       - Added uVisior support
 199       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 200       - Updated template for secure main function (main_s.c)
 201       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 202       CMSIS-DSP: 1.5.1 (see revision history for details)
 203       - added ARMv8M DSP libraries.
 204       CMSIS-Pack:1.4.9 (see revision history for details)
 205       - added Pack Index File specification and schema file
 206     </release>
 207     <release version="5.0.0" date="2016-11-11">
 208       Changed open source license to Apache 2.0
 209       CMSIS_Core:
 210        - Added support for Cortex-M23 and Cortex-M33.
 211        - Added ARMv8-M device configurations for mainline and baseline.
 212        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 213        - Added cmsis_compiler.h to unify compiler behaviour.
 214        - Updated function SCB_EnableICache (for Cortex-M7).
 215        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 216       CMSIS-RTOS:
 217         - bug fix in RTX 4.82 (see revision history for details)
 218       CMSIS-RTOS2:
 219         - new API including compatibility layer to CMSIS-RTOS
 220         - reference implementation based on RTX5
 221         - supports all Cortex-M variants including TrustZone for ARMv8-M
 222       CMSIS-SVD:
 223        - reworked SVD format documentation
 224        - removed SVD file database documentation as SVD files are distributed in packs
 225        - updated SVDConv for Win32 and Linux
 226       CMSIS-DSP:
 227        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 228        - Added DSP libraries build projects to CMSIS pack.
 229     </release>
 230     <release version="4.5.0" date="2015-10-28">
 231       - CMSIS-Core     4.30.0  (see revision history for details)
 232       - CMSIS-DAP      1.1.0   (unchanged)
 233       - CMSIS-Driver   2.04.0  (see revision history for details)
 234       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 235       - CMSIS-Pack     1.4.1   (see revision history for details)
 236       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 237       - CMSIS-SVD      1.3.1   (see revision history for details)
 238     </release>
 239     <release version="4.4.0" date="2015-09-11">
 240       - CMSIS-Core     4.20   (see revision history for details)
 241       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 242       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 243       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 244       - CMSIS-RTOS
 245         -- API         1.02   (unchanged)
 246         -- RTX         4.79   (see revision history for details)
 247       - CMSIS-SVD      1.3.0  (see revision history for details)
 248       - CMSIS-DAP      1.1.0  (extended with SWO support)
 249     </release>
 250     <release version="4.3.0" date="2015-03-20">
 251       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 252       - CMSIS-DSP      1.4.5  (see revision history for details)
 253       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 254       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 255       - CMSIS-RTOS
 256         -- API         1.02   (unchanged)
 257         -- RTX         4.78   (see revision history for details)
 258       - CMSIS-SVD      1.2    (unchanged)
 259     </release>
 260     <release version="4.2.0" date="2014-09-24">
 261       Adding Cortex-M7 support
 262       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 263       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 264       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 265       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 266       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 267     </release>
 268     <release version="4.1.1" date="2014-06-30">
 269       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 270     </release>
 271     <release version="4.1.0" date="2014-06-12">
 272       - CMSIS-Driver   2.02  (incompatible update)
 273       - CMSIS-Pack     1.3   (see revision history for details)
 274       - CMSIS-DSP      1.4.2 (unchanged)
 275       - CMSIS-Core     3.30  (unchanged)
 276       - CMSIS-RTOS RTX 4.74  (unchanged)
 277       - CMSIS-RTOS API 1.02  (unchanged)
 278       - CMSIS-SVD      1.10  (unchanged)
 279       PACK:
 280       - removed G++ specific files from PACK
 281       - added Component Startup variant "C Startup"
 282       - added Pack Checking Utility
 283       - updated conditions to reflect tool-chain dependency
 284       - added Taxonomy for Graphics
 285       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 286     </release>
 287     <!-- release version="4.0.0">
 288       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 289       - CMSIS-Pack     1.1   Preliminary
 290       - CMSIS-DSP      1.4.2 (see revision history for details)
 291       - CMSIS-Core     3.30  (see revision history for details)
 292       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 293       - CMSIS-RTOS API 1.02  (unchanged)
 294       - CMSIS-SVD      1.10  (unchanged)
 295     </release -->
 296     <release version="3.20.4" date="2014-02-20">
 297       - CMSIS-RTOS 4.74 (see revision history for details)
 298       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 299     </release>
 300     <!-- release version="3.20.3">
 301       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 302       - CMSIS-RTOS 4.73 (see revision history for details)
 303     </release -->
 304     <!-- release version="3.20.2">
 305       - CMSIS-Pack documentation has been added
 306       - CMSIS-Drivers header and documentation have been added to PACK
 307       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 308     </release -->
 309     <!-- release version="3.20.1">
 310       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 311       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 312     </release -->
 313     <!-- release version="3.20.0">
 314       The software portions that are deployed in the application program are now under a BSD license which allows usage
 315       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 316       The individual components have been update as listed below:
 317       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 318       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 319       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 320       - CMSIS-SVD is unchanged.
 321     </release -->
 322   </releases>
 323
 324   <taxonomy>
 325     <description Cclass="Audio">Software components for audio processing</description>
 326     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 327     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 328     <description Cclass="Compiler">Compiler Software Extensions</description>
 329     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 330     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 331     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 332     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 333     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 334     <description Cclass="File System">File Drive Support and File System</description>
 335     <description Cclass="IoT Client">IoT cloud client connector</description>
 336     <description Cclass="IoT Service">IoT specific services</description>
 337     <description Cclass="IoT Utility">IoT specific software utility</description>
 338     <description Cclass="Graphics">Graphical User Interface</description>
 339     <description Cclass="Network">Network Stack using Internet Protocols</description>
 340     <description Cclass="RTOS">Real-time Operating System</description>
 341     <description Cclass="Security">Encryption for secure communication or storage</description>
 342     <description Cclass="USB">Universal Serial Bus Stack</description>
 343     <description Cclass="Utility">Generic software utility components</description>
 344   </taxonomy>
 345
 346   <devices>
 347     <!-- ******************************  Cortex-M0  ****************************** -->
 348     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 349       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 350       <description>
 351 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 352 - simple, easy-to-use programmers model
 353 - highly efficient ultra-low power operation
 354 - excellent code density
 355 - deterministic, high-performance interrupt handling
 356 - upward compatibility with the rest of the Cortex-M processor family.
 357       </description>
 358       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 359       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 360       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 361       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 362
 363       <device Dname="ARMCM0">
 364         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 365         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 366       </device>
 367     </family>
 368
 369     <!-- ******************************  Cortex-M0P  ****************************** -->
 370     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 371       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 372       <description>
 373 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 374 - simple, easy-to-use programmers model
 375 - highly efficient ultra-low power operation
 376 - excellent code density
 377 - deterministic, high-performance interrupt handling
 378 - upward compatibility with the rest of the Cortex-M processor family.
 379       </description>
 380       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 381       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 382       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 383       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 384
 385       <device Dname="ARMCM0P">
 386         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 387         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 388       </device>
 389
 390       <device Dname="ARMCM0P_MPU">
 391         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 392         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 393       </device>
 394     </family>
 395
 396     <!-- ******************************  Cortex-M1  ****************************** -->
 397     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 398       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 399       <description>
 400 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 401 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 402       </description>
 403       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 404       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 405       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 406       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 407
 408       <device Dname="ARMCM1">
 409         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 410         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 411       </device>
 412     </family>
 413
 414     <!-- ******************************  Cortex-M3  ****************************** -->
 415     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 416       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 417       <description>
 418 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 419 - simple, easy-to-use programmers model
 420 - highly efficient ultra-low power operation
 421 - excellent code density
 422 - deterministic, high-performance interrupt handling
 423 - upward compatibility with the rest of the Cortex-M processor family.
 424       </description>
 425       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 426       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 427       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 428       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 429
 430       <device Dname="ARMCM3">
 431         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 432         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 433       </device>
 434     </family>
 435
 436     <!-- ******************************  Cortex-M4  ****************************** -->
 437     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 438       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 439       <description>
 440 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 441 - simple, easy-to-use programmers model
 442 - highly efficient ultra-low power operation
 443 - excellent code density
 444 - deterministic, high-performance interrupt handling
 445 - upward compatibility with the rest of the Cortex-M processor family.
 446       </description>
 447       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 448       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 449       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 450       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 451
 452       <device Dname="ARMCM4">
 453         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 454         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 455       </device>
 456
 457       <device Dname="ARMCM4_FP">
 458         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 459         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 460       </device>
 461     </family>
 462
 463     <!-- ******************************  Cortex-M7  ****************************** -->
 464     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 465       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 466       <description>
 467 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 468 - simple, easy-to-use programmers model
 469 - highly efficient ultra-low power operation
 470 - excellent code density
 471 - deterministic, high-performance interrupt handling
 472 - upward compatibility with the rest of the Cortex-M processor family.
 473       </description>
 474       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 475       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 476       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 477       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 478
 479       <device Dname="ARMCM7">
 480         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 481         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 482       </device>
 483
 484       <device Dname="ARMCM7_SP">
 485         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 486         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 487       </device>
 488
 489       <device Dname="ARMCM7_DP">
 490         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 491         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 492       </device>
 493     </family>
 494
 495     <!-- ******************************  Cortex-M23  ********************** -->
 496     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 497       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 498       <description>
 499 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 500 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 501 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 502       </description>
 503       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 504       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 505       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 506       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 507       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 508       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 509
 510       <device Dname="ARMCM23">
 511         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 512         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 513       </device>
 514
 515       <device Dname="ARMCM23_TZ">
 516         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 517         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 518       </device>
 519     </family>
 520
 521     <!-- ******************************  Cortex-M33  ****************************** -->
 522     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 523       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 524       <description>
 525 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 526 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 527       </description>
 528       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 529       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 530       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 531       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 532       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 533       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 534
 535       <device Dname="ARMCM33">
 536         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 537         <description>
 538           no DSP Instructions, no Floating Point Unit, no TrustZone
 539         </description>
 540         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 541       </device>
 542
 543       <device Dname="ARMCM33_TZ">
 544         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 545         <description>
 546           no DSP Instructions, no Floating Point Unit, TrustZone
 547         </description>
 548         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 549       </device>
 550
 551       <device Dname="ARMCM33_DSP_FP">
 552         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 553         <description>
 554           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 555         </description>
 556         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 557       </device>
 558
 559       <device Dname="ARMCM33_DSP_FP_TZ">
 560         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 561         <description>
 562           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 563         </description>
 564         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 565       </device>
 566     </family>
 567
 568     <!-- ******************************  Cortex-M35P  ****************************** -->
 569     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 570       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 571       <description>
 572 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 573 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 574       </description>
 575
 576       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 577       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 578       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 579       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 580       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 581       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 582
 583       <device Dname="ARMCM35P">
 584         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 585         <description>
 586           no DSP Instructions, no Floating Point Unit, no TrustZone
 587         </description>
 588         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 589       </device>
 590
 591       <device Dname="ARMCM35P_TZ">
 592         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 593         <description>
 594           no DSP Instructions, no Floating Point Unit, TrustZone
 595         </description>
 596         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 597       </device>
 598
 599       <device Dname="ARMCM35P_DSP_FP">
 600         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 601         <description>
 602           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 603         </description>
 604         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 605       </device>
 606
 607       <device Dname="ARMCM35P_DSP_FP_TZ">
 608         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 609         <description>
 610           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 611         </description>
 612         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 613       </device>
 614     </family>
 615
 616     <!-- ******************************  Cortex-M55  ****************************** -->
 617     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 618       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 619       <description>
 620 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 621 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 622 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 623       </description>
 624
 625       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 626       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 627       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 628       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 629       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 630       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 631
 632       <device Dname="ARMCM55">
 633         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 634         <description>
 635           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 636         </description>
 637         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 638       </device>
 639     </family>
 640
 641     <!-- ******************************  ARMSC000  ****************************** -->
 642     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 643       <description>
 644 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 645 - simple, easy-to-use programmers model
 646 - highly efficient ultra-low power operation
 647 - excellent code density
 648 - deterministic, high-performance interrupt handling
 649       </description>
 650       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 651       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 652       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 653       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 654
 655       <device Dname="ARMSC000">
 656         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 657         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 658       </device>
 659     </family>
 660
 661     <!-- ******************************  ARMSC300  ****************************** -->
 662     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 663       <description>
 664 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 665 - simple, easy-to-use programmers model
 666 - highly efficient ultra-low power operation
 667 - excellent code density
 668 - deterministic, high-performance interrupt handling
 669       </description>
 670       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 671       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 672       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 673       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 674
 675       <device Dname="ARMSC300">
 676         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 677         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 678       </device>
 679     </family>
 680
 681     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 682     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 683       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 684       <description>
 685 Armv8-M Baseline based device with TrustZone
 686       </description>
 687       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 688       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 689       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 690       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 691       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 692       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 693
 694       <device Dname="ARMv8MBL">
 695         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 696         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 697       </device>
 698     </family>
 699
 700     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 701     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 702       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 703       <description>
 704 Armv8-M Mainline based device with TrustZone
 705       </description>
 706       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 707       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 708       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 709       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 710       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 711       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 712
 713       <device Dname="ARMv8MML">
 714         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 715         <description>
 716           no DSP Instructions, no Floating Point Unit, TrustZone
 717         </description>
 718         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 719       </device>
 720
 721       <device Dname="ARMv8MML_DSP">
 722         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 723         <description>
 724           DSP Instructions, no Floating Point Unit, TrustZone
 725         </description>
 726         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 727       </device>
 728
 729       <device Dname="ARMv8MML_SP">
 730         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 731         <description>
 732           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 733         </description>
 734         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 735       </device>
 736
 737       <device Dname="ARMv8MML_DSP_SP">
 738         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 739         <description>
 740           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 741         </description>
 742         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 743       </device>
 744
 745       <device Dname="ARMv8MML_DP">
 746         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 747         <description>
 748           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 749         </description>
 750         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 751       </device>
 752
 753       <device Dname="ARMv8MML_DSP_DP">
 754         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 755         <description>
 756           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 757         </description>
 758         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 759       </device>
 760     </family>
 761
 762     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 763     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 764       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 765       <description>
 766 Armv8.1-M Mainline based device with TrustZone and MVE
 767       </description>
 768       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 769       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 770       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 771       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 772       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 773       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 774
 775
 776       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 777         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 778         <description>
 779           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 780         </description>
 781         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 782       </device>
 783     </family>
 784
 785     <!-- ******************************  Cortex-A5  ****************************** -->
 786     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 787       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 788       <description>
 789 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 790 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 791 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 792       </description>
 793
 794       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 795       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 796       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 797       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 798
 799       <device Dname="ARMCA5">
 800         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 801         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 802       </device>
 803     </family>
 804
 805     <!-- ******************************  Cortex-A7  ****************************** -->
 806     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 807       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 808       <description>
 809 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 810 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 811 an optional integrated GIC, and an optional L2 cache controller.
 812       </description>
 813
 814       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 815       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 816       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 817       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 818
 819       <device Dname="ARMCA7">
 820         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 821         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 822       </device>
 823     </family>
 824
 825     <!-- ******************************  Cortex-A9  ****************************** -->
 826     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 827       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 828       <description>
 829 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 830 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 831 and 8-bit Java bytecodes in Jazelle state.
 832       </description>
 833
 834       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 835       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 836       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 837       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 838
 839       <device Dname="ARMCA9">
 840         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 841         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 842       </device>
 843     </family>
 844   </devices>
 845
 846
 847   <apis>
 848     <!-- CMSIS Device API -->
 849     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 850       <description>Device interrupt controller interface</description>
 851       <files>
 852         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 853       </files>
 854     </api>
 855     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 856       <description>RTOS Kernel system tick timer interface</description>
 857       <files>
 858         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 859       </files>
 860     </api>
 861     <!-- CMSIS-RTOS API -->
 862     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 863       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 864       <files>
 865         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 866       </files>
 867     </api>
 868     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 869       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 870       <files>
 871         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 872         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 873       </files>
 874     </api>
 875     <!-- CMSIS Driver API -->
 876     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 877       <description>USART Driver API for Cortex-M</description>
 878       <files>
 879         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 880         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 881       </files>
 882     </api>
 883     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 884       <description>SPI Driver API for Cortex-M</description>
 885       <files>
 886         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 887         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 888       </files>
 889     </api>
 890     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 891       <description>SAI Driver API for Cortex-M</description>
 892       <files>
 893         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 894         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 895       </files>
 896     </api>
 897     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 898       <description>I2C Driver API for Cortex-M</description>
 899       <files>
 900         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 901         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 902       </files>
 903     </api>
 904     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 905       <description>CAN Driver API for Cortex-M</description>
 906       <files>
 907         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 908         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 909       </files>
 910     </api>
 911     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 912       <description>Flash Driver API for Cortex-M</description>
 913       <files>
 914         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 915         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 916       </files>
 917     </api>
 918     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 919       <description>MCI Driver API for Cortex-M</description>
 920       <files>
 921         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 922         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 923       </files>
 924     </api>
 925     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 926       <description>NAND Flash Driver API for Cortex-M</description>
 927       <files>
 928         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 929         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 930       </files>
 931     </api>
 932     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 933       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 934       <files>
 935         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 936         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 937         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 938       </files>
 939     </api>
 940     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 941       <description>Ethernet MAC Driver API for Cortex-M</description>
 942       <files>
 943         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 944         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 945       </files>
 946     </api>
 947     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 948       <description>Ethernet PHY Driver API for Cortex-M</description>
 949       <files>
 950         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 951         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 952       </files>
 953     </api>
 954     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 955       <description>USB Device Driver API for Cortex-M</description>
 956       <files>
 957         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 958         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 959       </files>
 960     </api>
 961     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
 962       <description>USB Host Driver API for Cortex-M</description>
 963       <files>
 964         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 965         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 966       </files>
 967     </api>
 968     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
 969       <description>WiFi driver</description>
 970       <files>
 971         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 972         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 973       </files>
 974     </api>
 975     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
 976       <description>Virtual I/O</description>
 977       <files>
 978         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
 979         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
 980         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
 981       </files>
 982     </api>
 983   </apis>
 984
 985   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 986   <conditions>
 987     <!-- compiler -->
 988     <condition id="ARMCC6">
 989       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 990       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 991     </condition>
 992     <condition id="ARMCC5">
 993       <require Tcompiler="ARMCC" Toptions="AC5"/>
 994     </condition>
 995     <condition id="ARMCC">
 996       <require Tcompiler="ARMCC"/>
 997     </condition>
 998     <condition id="GCC">
 999       <require Tcompiler="GCC"/>
1000     </condition>
1001     <condition id="IAR">
1002       <require Tcompiler="IAR"/>
1003     </condition>
1004     <condition id="ARMCC GCC">
1005       <accept Tcompiler="ARMCC"/>
1006       <accept Tcompiler="GCC"/>
1007     </condition>
1008     <condition id="ARMCC GCC IAR">
1009       <accept Tcompiler="ARMCC"/>
1010       <accept Tcompiler="GCC"/>
1011       <accept Tcompiler="IAR"/>
1012     </condition>
1013
1014     <!-- Arm architecture -->
1015     <condition id="ARMv6-M Device">
1016       <description>Armv6-M architecture based device</description>
1017       <accept Dcore="Cortex-M0"/>
1018       <accept Dcore="Cortex-M1"/>
1019       <accept Dcore="Cortex-M0+"/>
1020       <accept Dcore="SC000"/>
1021     </condition>
1022     <condition id="ARMv7-M Device">
1023       <description>Armv7-M architecture based device</description>
1024       <accept Dcore="Cortex-M3"/>
1025       <accept Dcore="Cortex-M4"/>
1026       <accept Dcore="Cortex-M7"/>
1027       <accept Dcore="SC300"/>
1028     </condition>
1029     <condition id="ARMv8-M Device">
1030       <description>Armv8-M architecture based device</description>
1031       <accept Dcore="ARMV8MBL"/>
1032       <accept Dcore="ARMV8MML"/>
1033       <accept Dcore="ARMV81MML"/>
1034       <accept Dcore="Cortex-M23"/>
1035       <accept Dcore="Cortex-M33"/>
1036       <accept Dcore="Cortex-M35P"/>
1037       <accept Dcore="Cortex-M55"/>
1038     </condition>
1039     <condition id="ARMv6_7-M Device">
1040       <description>Armv6_7-M architecture based device</description>
1041       <accept condition="ARMv6-M Device"/>
1042       <accept condition="ARMv7-M Device"/>
1043     </condition>
1044     <condition id="ARMv6_7_8-M Device">
1045       <description>Armv6_7_8-M architecture based device</description>
1046       <accept condition="ARMv6-M Device"/>
1047       <accept condition="ARMv7-M Device"/>
1048       <accept condition="ARMv8-M Device"/>
1049     </condition>
1050     <condition id="ARMv7-A Device">
1051       <description>Armv7-A architecture based device</description>
1052       <accept Dcore="Cortex-A5"/>
1053       <accept Dcore="Cortex-A7"/>
1054       <accept Dcore="Cortex-A9"/>
1055     </condition>
1056
1057     <condition id="TrustZone">
1058       <description>TrustZone</description>
1059       <require Dtz="TZ"/>
1060     </condition>
1061     <condition id="TZ Secure">
1062       <description>TrustZone (Secure)</description>
1063       <require Dtz="TZ"/>
1064       <require Dsecure="Secure"/>
1065     </condition>
1066     <condition id="TZ Non-secure">
1067       <description>TrustZone (Non-secure)</description>
1068       <require Dtz="TZ"/>
1069       <require Dsecure="Non-secure"/>
1070     </condition>
1071
1072     <!-- ARM core -->
1073     <condition id="CM0">
1074       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1075       <accept Dcore="Cortex-M0"/>
1076       <accept Dcore="Cortex-M0+"/>
1077       <accept Dcore="SC000"/>
1078     </condition>
1079     <condition id="CM1">
1080       <description>Cortex-M1</description>
1081       <require Dcore="Cortex-M1"/>
1082     </condition>
1083     <condition id="CM3">
1084       <description>Cortex-M3 or SC300 processor based device</description>
1085       <accept Dcore="Cortex-M3"/>
1086       <accept Dcore="SC300"/>
1087     </condition>
1088     <condition id="CM4">
1089       <description>Cortex-M4 processor based device</description>
1090       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1091     </condition>
1092     <condition id="CM4_FP">
1093       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1094       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1095       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1096       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1097     </condition>
1098     <condition id="CM7">
1099       <description>Cortex-M7 processor based device</description>
1100       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1101     </condition>
1102     <condition id="CM7_FP">
1103       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1104       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1105       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1106     </condition>
1107     <condition id="CM7_SP">
1108       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1109       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1110     </condition>
1111     <condition id="CM7_DP">
1112       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1113       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1114     </condition>
1115     <condition id="CM23">
1116       <description>Cortex-M23 processor based device</description>
1117       <require Dcore="Cortex-M23"/>
1118     </condition>
1119     <condition id="CM33">
1120       <description>Cortex-M33 processor based device</description>
1121       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1122     </condition>
1123     <condition id="CM33_FP">
1124       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1125       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1126     </condition>
1127     <condition id="CM35P">
1128       <description>Cortex-M35P processor based device</description>
1129       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1130     </condition>
1131     <condition id="CM35P_FP">
1132       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1133       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1134     </condition>
1135     <condition id="ARMv8MBL">
1136       <description>Armv8-M Baseline processor based device</description>
1137       <require Dcore="ARMV8MBL"/>
1138     </condition>
1139     <condition id="ARMv8MML">
1140       <description>Armv8-M Mainline processor based device</description>
1141       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1142     </condition>
1143     <condition id="ARMv8MML_FP">
1144       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1145       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1146       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1147     </condition>
1148
1149     <condition id="CM33_NODSP_NOFPU">
1150       <description>CM33, no DSP, no FPU</description>
1151       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1152     </condition>
1153     <condition id="CM33_DSP_NOFPU">
1154       <description>CM33, DSP, no FPU</description>
1155       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1156     </condition>
1157     <condition id="CM33_NODSP_SP">
1158       <description>CM33, no DSP, SP FPU</description>
1159       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1160     </condition>
1161     <condition id="CM33_DSP_SP">
1162       <description>CM33, DSP, SP FPU</description>
1163       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1164     </condition>
1165
1166     <condition id="CM35P_NODSP_NOFPU">
1167       <description>CM35P, no DSP, no FPU</description>
1168       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1169     </condition>
1170     <condition id="CM35P_DSP_NOFPU">
1171       <description>CM35P, DSP, no FPU</description>
1172       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1173     </condition>
1174     <condition id="CM35P_NODSP_SP">
1175       <description>CM35P, no DSP, SP FPU</description>
1176       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1177     </condition>
1178     <condition id="CM35P_DSP_SP">
1179       <description>CM35P, DSP, SP FPU</description>
1180       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1181     </condition>
1182
1183     <condition id="CM55_NOFPU_NOMVE">
1184       <description>Cortex-M55, no FPU, no MVE</description>
1185       <require Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="NO_MVE"/>
1186     </condition>
1187     <condition id="CM55_NOFPU_MVE">
1188       <description>Cortex-M55, no FPU, MVE</description>
1189       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="MVE"/>
1190       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="FP_MVE"/>
1191     </condition>
1192     <condition id="CM55_FPU">
1193       <description>Cortex-M55, FPU</description>
1194       <accept  Dcore="Cortex-M55" Dfpu="SP_FPU"/>
1195       <accept  Dcore="Cortex-M55" Dfpu="DP_FPU"/>
1196     </condition>
1197
1198     <condition id="ARMv8MML_NODSP_NOFPU">
1199       <description>Armv8-M Mainline, no DSP, no FPU</description>
1200       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1201     </condition>
1202     <condition id="ARMv8MML_DSP_NOFPU">
1203       <description>Armv8-M Mainline, DSP, no FPU</description>
1204       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1205     </condition>
1206     <condition id="ARMv8MML_NODSP_SP">
1207       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1208       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1209     </condition>
1210     <condition id="ARMv8MML_DSP_SP">
1211       <description>Armv8-M Mainline, DSP, SP FPU</description>
1212       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1213     </condition>
1214
1215     <condition id="CA5_CA9">
1216       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1217       <accept Dcore="Cortex-A5"/>
1218       <accept Dcore="Cortex-A9"/>
1219     </condition>
1220
1221     <condition id="CA7">
1222       <description>Cortex-A7 processor based device</description>
1223       <accept Dcore="Cortex-A7"/>
1224     </condition>
1225
1226     <!-- ARMCC compiler -->
1227     <condition id="CA_ARMCC5">
1228       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1229       <require condition="ARMv7-A Device"/>
1230       <require condition="ARMCC5"/>
1231     </condition>
1232     <condition id="CA_ARMCC6">
1233       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1234       <require condition="ARMv7-A Device"/>
1235       <require condition="ARMCC6"/>
1236     </condition>
1237
1238     <condition id="CM0_ARMCC">
1239       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1240       <require condition="CM0"/>
1241       <require Tcompiler="ARMCC"/>
1242     </condition>
1243     <condition id="CM0_LE_ARMCC">
1244       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1245       <require condition="CM0_ARMCC"/>
1246       <require Dendian="Little-endian"/>
1247     </condition>
1248     <condition id="CM0_BE_ARMCC">
1249       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1250       <require condition="CM0_ARMCC"/>
1251       <require Dendian="Big-endian"/>
1252     </condition>
1253
1254     <condition id="CM1_ARMCC">
1255       <description>Cortex-M1 based device for the Arm Compiler</description>
1256       <require condition="CM1"/>
1257       <require Tcompiler="ARMCC"/>
1258     </condition>
1259     <condition id="CM1_LE_ARMCC">
1260       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1261       <require condition="CM1_ARMCC"/>
1262       <require Dendian="Little-endian"/>
1263     </condition>
1264     <condition id="CM1_BE_ARMCC">
1265       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1266       <require condition="CM1_ARMCC"/>
1267       <require Dendian="Big-endian"/>
1268     </condition>
1269
1270     <condition id="CM3_ARMCC">
1271       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1272       <require condition="CM3"/>
1273       <require Tcompiler="ARMCC"/>
1274     </condition>
1275     <condition id="CM3_LE_ARMCC">
1276       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1277       <require condition="CM3_ARMCC"/>
1278       <require Dendian="Little-endian"/>
1279     </condition>
1280     <condition id="CM3_BE_ARMCC">
1281       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1282       <require condition="CM3_ARMCC"/>
1283       <require Dendian="Big-endian"/>
1284     </condition>
1285
1286     <condition id="CM4_ARMCC">
1287       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1288       <require condition="CM4"/>
1289       <require Tcompiler="ARMCC"/>
1290     </condition>
1291     <condition id="CM4_LE_ARMCC">
1292       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1293       <require condition="CM4_ARMCC"/>
1294       <require Dendian="Little-endian"/>
1295     </condition>
1296     <condition id="CM4_BE_ARMCC">
1297       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1298       <require condition="CM4_ARMCC"/>
1299       <require Dendian="Big-endian"/>
1300     </condition>
1301
1302     <condition id="CM4_FP_ARMCC">
1303       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1304       <require condition="CM4_FP"/>
1305       <require Tcompiler="ARMCC"/>
1306     </condition>
1307     <condition id="CM4_FP_LE_ARMCC">
1308       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1309       <require condition="CM4_FP_ARMCC"/>
1310       <require Dendian="Little-endian"/>
1311     </condition>
1312     <condition id="CM4_FP_BE_ARMCC">
1313       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1314       <require condition="CM4_FP_ARMCC"/>
1315       <require Dendian="Big-endian"/>
1316     </condition>
1317
1318     <condition id="CM7_ARMCC">
1319       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1320       <require condition="CM7"/>
1321       <require Tcompiler="ARMCC"/>
1322     </condition>
1323     <condition id="CM7_LE_ARMCC">
1324       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1325       <require condition="CM7_ARMCC"/>
1326       <require Dendian="Little-endian"/>
1327     </condition>
1328     <condition id="CM7_BE_ARMCC">
1329       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1330       <require condition="CM7_ARMCC"/>
1331       <require Dendian="Big-endian"/>
1332     </condition>
1333
1334     <condition id="CM7_FP_ARMCC">
1335       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1336       <require condition="CM7_FP"/>
1337       <require Tcompiler="ARMCC"/>
1338     </condition>
1339     <condition id="CM7_FP_LE_ARMCC">
1340       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1341       <require condition="CM7_FP_ARMCC"/>
1342       <require Dendian="Little-endian"/>
1343     </condition>
1344     <condition id="CM7_FP_BE_ARMCC">
1345       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1346       <require condition="CM7_FP_ARMCC"/>
1347       <require Dendian="Big-endian"/>
1348     </condition>
1349
1350     <condition id="CM7_SP_ARMCC">
1351       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1352       <require condition="CM7_SP"/>
1353       <require Tcompiler="ARMCC"/>
1354     </condition>
1355     <condition id="CM7_SP_LE_ARMCC">
1356       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1357       <require condition="CM7_SP_ARMCC"/>
1358       <require Dendian="Little-endian"/>
1359     </condition>
1360     <condition id="CM7_SP_BE_ARMCC">
1361       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1362       <require condition="CM7_SP_ARMCC"/>
1363       <require Dendian="Big-endian"/>
1364     </condition>
1365
1366     <condition id="CM7_DP_ARMCC">
1367       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1368       <require condition="CM7_DP"/>
1369       <require Tcompiler="ARMCC"/>
1370     </condition>
1371     <condition id="CM7_DP_LE_ARMCC">
1372       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1373       <require condition="CM7_DP_ARMCC"/>
1374       <require Dendian="Little-endian"/>
1375     </condition>
1376     <condition id="CM7_DP_BE_ARMCC">
1377       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1378       <require condition="CM7_DP_ARMCC"/>
1379       <require Dendian="Big-endian"/>
1380     </condition>
1381
1382     <condition id="CM23_ARMCC">
1383       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1384       <require condition="CM23"/>
1385       <require Tcompiler="ARMCC"/>
1386     </condition>
1387     <condition id="CM23_LE_ARMCC">
1388       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1389       <require condition="CM23_ARMCC"/>
1390       <require Dendian="Little-endian"/>
1391     </condition>
1392
1393     <condition id="CM33_ARMCC">
1394       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1395       <require condition="CM33"/>
1396       <require Tcompiler="ARMCC"/>
1397     </condition>
1398     <condition id="CM33_LE_ARMCC">
1399       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1400       <require condition="CM33_ARMCC"/>
1401       <require Dendian="Little-endian"/>
1402     </condition>
1403
1404     <condition id="CM33_FP_ARMCC">
1405       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1406       <require condition="CM33_FP"/>
1407       <require Tcompiler="ARMCC"/>
1408     </condition>
1409     <condition id="CM33_FP_LE_ARMCC">
1410       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1411       <require condition="CM33_FP_ARMCC"/>
1412       <require Dendian="Little-endian"/>
1413     </condition>
1414
1415     <condition id="CM33_NODSP_NOFPU_ARMCC">
1416       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1417       <require condition="CM33_NODSP_NOFPU"/>
1418       <require Tcompiler="ARMCC"/>
1419     </condition>
1420     <condition id="CM33_DSP_NOFPU_ARMCC">
1421       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1422       <require condition="CM33_DSP_NOFPU"/>
1423       <require Tcompiler="ARMCC"/>
1424     </condition>
1425     <condition id="CM33_NODSP_SP_ARMCC">
1426       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1427       <require condition="CM33_NODSP_SP"/>
1428       <require Tcompiler="ARMCC"/>
1429     </condition>
1430     <condition id="CM33_DSP_SP_ARMCC">
1431       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1432       <require condition="CM33_DSP_SP"/>
1433       <require Tcompiler="ARMCC"/>
1434     </condition>
1435     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1436       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1437       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1438       <require Dendian="Little-endian"/>
1439     </condition>
1440     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1441       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1442       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1443       <require Dendian="Little-endian"/>
1444     </condition>
1445     <condition id="CM33_NODSP_SP_LE_ARMCC">
1446       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1447       <require condition="CM33_NODSP_SP_ARMCC"/>
1448       <require Dendian="Little-endian"/>
1449     </condition>
1450     <condition id="CM33_DSP_SP_LE_ARMCC">
1451       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1452       <require condition="CM33_DSP_SP_ARMCC"/>
1453       <require Dendian="Little-endian"/>
1454     </condition>
1455
1456     <condition id="CM35P_ARMCC">
1457       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1458       <require condition="CM35P"/>
1459       <require Tcompiler="ARMCC"/>
1460     </condition>
1461     <condition id="CM35P_LE_ARMCC">
1462       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1463       <require condition="CM35P_ARMCC"/>
1464       <require Dendian="Little-endian"/>
1465     </condition>
1466
1467     <condition id="CM35P_FP_ARMCC">
1468       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1469       <require condition="CM35P_FP"/>
1470       <require Tcompiler="ARMCC"/>
1471     </condition>
1472     <condition id="CM35P_FP_LE_ARMCC">
1473       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1474       <require condition="CM35P_FP_ARMCC"/>
1475       <require Dendian="Little-endian"/>
1476     </condition>
1477
1478     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1479       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1480       <require condition="CM35P_NODSP_NOFPU"/>
1481       <require Tcompiler="ARMCC"/>
1482     </condition>
1483     <condition id="CM35P_DSP_NOFPU_ARMCC">
1484       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1485       <require condition="CM35P_DSP_NOFPU"/>
1486       <require Tcompiler="ARMCC"/>
1487     </condition>
1488     <condition id="CM35P_NODSP_SP_ARMCC">
1489       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1490       <require condition="CM35P_NODSP_SP"/>
1491       <require Tcompiler="ARMCC"/>
1492     </condition>
1493     <condition id="CM35P_DSP_SP_ARMCC">
1494       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1495       <require condition="CM35P_DSP_SP"/>
1496       <require Tcompiler="ARMCC"/>
1497     </condition>
1498     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1499       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1500       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1501       <require Dendian="Little-endian"/>
1502     </condition>
1503     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1504       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1505       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1506       <require Dendian="Little-endian"/>
1507     </condition>
1508     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1509       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1510       <require condition="CM35P_NODSP_SP_ARMCC"/>
1511       <require Dendian="Little-endian"/>
1512     </condition>
1513     <condition id="CM35P_DSP_SP_LE_ARMCC">
1514       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1515       <require condition="CM35P_DSP_SP_ARMCC"/>
1516       <require Dendian="Little-endian"/>
1517     </condition>
1518
1519     <condition id="CM55_NOFPU_NOMVE_ARMCC">
1520       <description>Cortex-M55 processor, no FPU, no MVE, Arm Compiler</description>
1521       <require condition="CM55_NOFPU_NOMVE"/>
1522       <require Tcompiler="ARMCC"/>
1523     </condition>
1524     <condition id="CM55_NOFPU_MVE_ARMCC">
1525       <description>Cortex-M55 processor, no FPU, MVE, Arm Compiler</description>
1526       <require condition="CM55_NOFPU_MVE"/>
1527       <require Tcompiler="ARMCC"/>
1528     </condition>
1529     <condition id="CM55_FPU_ARMCC">
1530       <description>Cortex-M55 processor, FPU, Arm Compiler</description>
1531       <require condition="CM55_FPU"/>
1532       <require Tcompiler="ARMCC"/>
1533     </condition>
1534     <condition id="CM55_NOFPU_NOMVE_LE_ARMCC">
1535       <description>Cortex-M55 processor, little endian, no FPU, no MVE, Arm Compiler</description>
1536       <require condition="CM55_NOFPU_NOMVE_ARMCC"/>
1537       <require Dendian="Little-endian"/>
1538     </condition>
1539     <condition id="CM55_FPU_LE_ARMCC">
1540       <description>Cortex-M55 processor, little endian, FPU, Arm Compiler</description>
1541       <require condition="CM55_FPU_ARMCC"/>
1542       <require Dendian="Little-endian"/>
1543     </condition>
1544
1545     <condition id="ARMv8MBL_ARMCC">
1546       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1547       <require condition="ARMv8MBL"/>
1548       <require Tcompiler="ARMCC"/>
1549     </condition>
1550     <condition id="ARMv8MBL_LE_ARMCC">
1551       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1552       <require condition="ARMv8MBL_ARMCC"/>
1553       <require Dendian="Little-endian"/>
1554     </condition>
1555
1556     <condition id="ARMv8MML_ARMCC">
1557       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1558       <require condition="ARMv8MML"/>
1559       <require Tcompiler="ARMCC"/>
1560     </condition>
1561     <condition id="ARMv8MML_LE_ARMCC">
1562       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1563       <require condition="ARMv8MML_ARMCC"/>
1564       <require Dendian="Little-endian"/>
1565     </condition>
1566
1567     <condition id="ARMv8MML_FP_ARMCC">
1568       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1569       <require condition="ARMv8MML_FP"/>
1570       <require Tcompiler="ARMCC"/>
1571     </condition>
1572     <condition id="ARMv8MML_FP_LE_ARMCC">
1573       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1574       <require condition="ARMv8MML_FP_ARMCC"/>
1575       <require Dendian="Little-endian"/>
1576     </condition>
1577
1578     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1579       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1580       <require condition="ARMv8MML_NODSP_NOFPU"/>
1581       <require Tcompiler="ARMCC"/>
1582     </condition>
1583     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1584       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1585       <require condition="ARMv8MML_DSP_NOFPU"/>
1586       <require Tcompiler="ARMCC"/>
1587     </condition>
1588     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1589       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1590       <require condition="ARMv8MML_NODSP_SP"/>
1591       <require Tcompiler="ARMCC"/>
1592     </condition>
1593     <condition id="ARMv8MML_DSP_SP_ARMCC">
1594       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1595       <require condition="ARMv8MML_DSP_SP"/>
1596       <require Tcompiler="ARMCC"/>
1597     </condition>
1598     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1599       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1600       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1601       <require Dendian="Little-endian"/>
1602     </condition>
1603     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1604       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1605       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1606       <require Dendian="Little-endian"/>
1607     </condition>
1608     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1609       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1610       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1611       <require Dendian="Little-endian"/>
1612     </condition>
1613     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1614       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1615       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1616       <require Dendian="Little-endian"/>
1617     </condition>
1618
1619     <!-- GCC compiler -->
1620     <condition id="CA_GCC">
1621       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1622       <require condition="ARMv7-A Device"/>
1623       <require Tcompiler="GCC"/>
1624     </condition>
1625
1626     <condition id="CM0_GCC">
1627       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1628       <require condition="CM0"/>
1629       <require Tcompiler="GCC"/>
1630     </condition>
1631     <condition id="CM0_LE_GCC">
1632       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1633       <require condition="CM0_GCC"/>
1634       <require Dendian="Little-endian"/>
1635     </condition>
1636     <condition id="CM0_BE_GCC">
1637       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1638       <require condition="CM0_GCC"/>
1639       <require Dendian="Big-endian"/>
1640     </condition>
1641
1642     <condition id="CM1_GCC">
1643       <description>Cortex-M1 based device for the GCC Compiler</description>
1644       <require condition="CM1"/>
1645       <require Tcompiler="GCC"/>
1646     </condition>
1647     <condition id="CM1_LE_GCC">
1648       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1649       <require condition="CM1_GCC"/>
1650       <require Dendian="Little-endian"/>
1651     </condition>
1652     <condition id="CM1_BE_GCC">
1653       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1654       <require condition="CM1_GCC"/>
1655       <require Dendian="Big-endian"/>
1656     </condition>
1657
1658     <condition id="CM3_GCC">
1659       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1660       <require condition="CM3"/>
1661       <require Tcompiler="GCC"/>
1662     </condition>
1663     <condition id="CM3_LE_GCC">
1664       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1665       <require condition="CM3_GCC"/>
1666       <require Dendian="Little-endian"/>
1667     </condition>
1668     <condition id="CM3_BE_GCC">
1669       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1670       <require condition="CM3_GCC"/>
1671       <require Dendian="Big-endian"/>
1672     </condition>
1673
1674     <condition id="CM4_GCC">
1675       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1676       <require condition="CM4"/>
1677       <require Tcompiler="GCC"/>
1678     </condition>
1679     <condition id="CM4_LE_GCC">
1680       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1681       <require condition="CM4_GCC"/>
1682       <require Dendian="Little-endian"/>
1683     </condition>
1684     <condition id="CM4_BE_GCC">
1685       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1686       <require condition="CM4_GCC"/>
1687       <require Dendian="Big-endian"/>
1688     </condition>
1689
1690     <condition id="CM4_FP_GCC">
1691       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1692       <require condition="CM4_FP"/>
1693       <require Tcompiler="GCC"/>
1694     </condition>
1695     <condition id="CM4_FP_LE_GCC">
1696       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1697       <require condition="CM4_FP_GCC"/>
1698       <require Dendian="Little-endian"/>
1699     </condition>
1700     <condition id="CM4_FP_BE_GCC">
1701       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1702       <require condition="CM4_FP_GCC"/>
1703       <require Dendian="Big-endian"/>
1704     </condition>
1705
1706     <condition id="CM7_GCC">
1707       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1708       <require condition="CM7"/>
1709       <require Tcompiler="GCC"/>
1710     </condition>
1711     <condition id="CM7_LE_GCC">
1712       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1713       <require condition="CM7_GCC"/>
1714       <require Dendian="Little-endian"/>
1715     </condition>
1716     <condition id="CM7_BE_GCC">
1717       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1718       <require condition="CM7_GCC"/>
1719       <require Dendian="Big-endian"/>
1720     </condition>
1721
1722     <condition id="CM7_FP_GCC">
1723       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1724       <require condition="CM7_FP"/>
1725       <require Tcompiler="GCC"/>
1726     </condition>
1727     <condition id="CM7_FP_LE_GCC">
1728       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1729       <require condition="CM7_FP_GCC"/>
1730       <require Dendian="Little-endian"/>
1731     </condition>
1732     <condition id="CM7_FP_BE_GCC">
1733       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1734       <require condition="CM7_FP_GCC"/>
1735       <require Dendian="Big-endian"/>
1736     </condition>
1737
1738     <condition id="CM7_SP_GCC">
1739       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1740       <require condition="CM7_SP"/>
1741       <require Tcompiler="GCC"/>
1742     </condition>
1743     <condition id="CM7_SP_LE_GCC">
1744       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1745       <require condition="CM7_SP_GCC"/>
1746       <require Dendian="Little-endian"/>
1747     </condition>
1748
1749     <condition id="CM7_DP_GCC">
1750       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1751       <require condition="CM7_DP"/>
1752       <require Tcompiler="GCC"/>
1753     </condition>
1754     <condition id="CM7_DP_LE_GCC">
1755       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1756       <require condition="CM7_DP_GCC"/>
1757       <require Dendian="Little-endian"/>
1758     </condition>
1759
1760     <condition id="CM23_GCC">
1761       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1762       <require condition="CM23"/>
1763       <require Tcompiler="GCC"/>
1764     </condition>
1765     <condition id="CM23_LE_GCC">
1766       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1767       <require condition="CM23_GCC"/>
1768       <require Dendian="Little-endian"/>
1769     </condition>
1770
1771     <condition id="CM33_GCC">
1772       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1773       <require condition="CM33"/>
1774       <require Tcompiler="GCC"/>
1775     </condition>
1776     <condition id="CM33_LE_GCC">
1777       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1778       <require condition="CM33_GCC"/>
1779       <require Dendian="Little-endian"/>
1780     </condition>
1781
1782     <condition id="CM33_FP_GCC">
1783       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1784       <require condition="CM33_FP"/>
1785       <require Tcompiler="GCC"/>
1786     </condition>
1787     <condition id="CM33_FP_LE_GCC">
1788       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1789       <require condition="CM33_FP_GCC"/>
1790       <require Dendian="Little-endian"/>
1791     </condition>
1792
1793     <condition id="CM33_NODSP_NOFPU_GCC">
1794       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1795       <require condition="CM33_NODSP_NOFPU"/>
1796       <require Tcompiler="GCC"/>
1797     </condition>
1798     <condition id="CM33_DSP_NOFPU_GCC">
1799       <description>CM33, DSP, no FPU, GCC Compiler</description>
1800       <require condition="CM33_DSP_NOFPU"/>
1801       <require Tcompiler="GCC"/>
1802     </condition>
1803     <condition id="CM33_NODSP_SP_GCC">
1804       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1805       <require condition="CM33_NODSP_SP"/>
1806       <require Tcompiler="GCC"/>
1807     </condition>
1808     <condition id="CM33_DSP_SP_GCC">
1809       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1810       <require condition="CM33_DSP_SP"/>
1811       <require Tcompiler="GCC"/>
1812     </condition>
1813     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1814       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1815       <require condition="CM33_NODSP_NOFPU_GCC"/>
1816       <require Dendian="Little-endian"/>
1817     </condition>
1818     <condition id="CM33_DSP_NOFPU_LE_GCC">
1819       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1820       <require condition="CM33_DSP_NOFPU_GCC"/>
1821       <require Dendian="Little-endian"/>
1822     </condition>
1823     <condition id="CM33_NODSP_SP_LE_GCC">
1824       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1825       <require condition="CM33_NODSP_SP_GCC"/>
1826       <require Dendian="Little-endian"/>
1827     </condition>
1828     <condition id="CM33_DSP_SP_LE_GCC">
1829       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1830       <require condition="CM33_DSP_SP_GCC"/>
1831       <require Dendian="Little-endian"/>
1832     </condition>
1833
1834     <condition id="CM35P_GCC">
1835       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1836       <require condition="CM35P"/>
1837       <require Tcompiler="GCC"/>
1838     </condition>
1839     <condition id="CM35P_LE_GCC">
1840       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1841       <require condition="CM35P_GCC"/>
1842       <require Dendian="Little-endian"/>
1843     </condition>
1844
1845     <condition id="CM35P_FP_GCC">
1846       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1847       <require condition="CM35P_FP"/>
1848       <require Tcompiler="GCC"/>
1849     </condition>
1850     <condition id="CM35P_FP_LE_GCC">
1851       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1852       <require condition="CM35P_FP_GCC"/>
1853       <require Dendian="Little-endian"/>
1854     </condition>
1855
1856     <condition id="CM35P_NODSP_NOFPU_GCC">
1857       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1858       <require condition="CM35P_NODSP_NOFPU"/>
1859       <require Tcompiler="GCC"/>
1860     </condition>
1861     <condition id="CM35P_DSP_NOFPU_GCC">
1862       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1863       <require condition="CM35P_DSP_NOFPU"/>
1864       <require Tcompiler="GCC"/>
1865     </condition>
1866     <condition id="CM35P_NODSP_SP_GCC">
1867       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1868       <require condition="CM35P_NODSP_SP"/>
1869       <require Tcompiler="GCC"/>
1870     </condition>
1871     <condition id="CM35P_DSP_SP_GCC">
1872       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1873       <require condition="CM35P_DSP_SP"/>
1874       <require Tcompiler="GCC"/>
1875     </condition>
1876     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1877       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1878       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1879       <require Dendian="Little-endian"/>
1880     </condition>
1881     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1882       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1883       <require condition="CM35P_DSP_NOFPU_GCC"/>
1884       <require Dendian="Little-endian"/>
1885     </condition>
1886     <condition id="CM35P_NODSP_SP_LE_GCC">
1887       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1888       <require condition="CM35P_NODSP_SP_GCC"/>
1889       <require Dendian="Little-endian"/>
1890     </condition>
1891     <condition id="CM35P_DSP_SP_LE_GCC">
1892       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1893       <require condition="CM35P_DSP_SP_GCC"/>
1894       <require Dendian="Little-endian"/>
1895     </condition>
1896
1897     <condition id="CM55_NOFPU_NOMVE_GCC">
1898       <description>Cortex-M55 processor, no FPU, no MVE, GCC Compiler</description>
1899       <require condition="CM55_NOFPU_NOMVE"/>
1900       <require Tcompiler="GCC"/>
1901     </condition>
1902     <condition id="CM55_NOFPU_MVE_GCC">
1903       <description>Cortex-M55 processor, no FPU, MVE, GCC Compiler</description>
1904       <require condition="CM55_NOFPU_MVE"/>
1905       <require Tcompiler="GCC"/>
1906     </condition>
1907     <condition id="CM55_FPU_GCC">
1908       <description>Cortex-M55 processor, FPU, GCC Compiler</description>
1909       <require condition="CM55_FPU"/>
1910       <require Tcompiler="GCC"/>
1911     </condition>
1912     <condition id="CM55_NOFPU_NOMVE_LE_GCC">
1913       <description>Cortex-M55 processor, little endian, no FPU, no MVE, GCC Compiler</description>
1914       <require condition="CM55_NOFPU_NOMVE_GCC"/>
1915       <require Dendian="Little-endian"/>
1916     </condition>
1917     <condition id="CM55_FPU_LE_GCC">
1918       <description>Cortex-M55 processor, little endian, FPU, GCC Compiler</description>
1919       <require condition="CM55_FPU_GCC"/>
1920       <require Dendian="Little-endian"/>
1921     </condition>
1922
1923     <condition id="ARMv8MBL_GCC">
1924       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1925       <require condition="ARMv8MBL"/>
1926       <require Tcompiler="GCC"/>
1927     </condition>
1928     <condition id="ARMv8MBL_LE_GCC">
1929       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1930       <require condition="ARMv8MBL_GCC"/>
1931       <require Dendian="Little-endian"/>
1932     </condition>
1933
1934     <condition id="ARMv8MML_GCC">
1935       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1936       <require condition="ARMv8MML"/>
1937       <require Tcompiler="GCC"/>
1938     </condition>
1939     <condition id="ARMv8MML_LE_GCC">
1940       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1941       <require condition="ARMv8MML_GCC"/>
1942       <require Dendian="Little-endian"/>
1943     </condition>
1944
1945     <condition id="ARMv8MML_FP_GCC">
1946       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1947       <require condition="ARMv8MML_FP"/>
1948       <require Tcompiler="GCC"/>
1949     </condition>
1950     <condition id="ARMv8MML_FP_LE_GCC">
1951       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1952       <require condition="ARMv8MML_FP_GCC"/>
1953       <require Dendian="Little-endian"/>
1954     </condition>
1955
1956     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1957       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1958       <require condition="ARMv8MML_NODSP_NOFPU"/>
1959       <require Tcompiler="GCC"/>
1960     </condition>
1961     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1962       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1963       <require condition="ARMv8MML_DSP_NOFPU"/>
1964       <require Tcompiler="GCC"/>
1965     </condition>
1966     <condition id="ARMv8MML_NODSP_SP_GCC">
1967       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1968       <require condition="ARMv8MML_NODSP_SP"/>
1969       <require Tcompiler="GCC"/>
1970     </condition>
1971     <condition id="ARMv8MML_DSP_SP_GCC">
1972       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1973       <require condition="ARMv8MML_DSP_SP"/>
1974       <require Tcompiler="GCC"/>
1975     </condition>
1976     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1977       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1978       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1979       <require Dendian="Little-endian"/>
1980     </condition>
1981     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1982       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1983       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1984       <require Dendian="Little-endian"/>
1985     </condition>
1986     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1987       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1988       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1989       <require Dendian="Little-endian"/>
1990     </condition>
1991     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1992       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1993       <require condition="ARMv8MML_DSP_SP_GCC"/>
1994       <require Dendian="Little-endian"/>
1995     </condition>
1996
1997     <!-- IAR compiler -->
1998     <condition id="CA_IAR">
1999       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
2000       <require condition="ARMv7-A Device"/>
2001       <require Tcompiler="IAR"/>
2002     </condition>
2003
2004     <condition id="CM0_IAR">
2005       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
2006       <require condition="CM0"/>
2007       <require Tcompiler="IAR"/>
2008     </condition>
2009     <condition id="CM0_LE_IAR">
2010       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
2011       <require condition="CM0_IAR"/>
2012       <require Dendian="Little-endian"/>
2013     </condition>
2014     <condition id="CM0_BE_IAR">
2015       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
2016       <require condition="CM0_IAR"/>
2017       <require Dendian="Big-endian"/>
2018     </condition>
2019
2020     <condition id="CM1_IAR">
2021       <description>Cortex-M1 based device for the IAR Compiler</description>
2022       <require condition="CM1"/>
2023       <require Tcompiler="IAR"/>
2024     </condition>
2025     <condition id="CM1_LE_IAR">
2026       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
2027       <require condition="CM1_IAR"/>
2028       <require Dendian="Little-endian"/>
2029     </condition>
2030     <condition id="CM1_BE_IAR">
2031       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
2032       <require condition="CM1_IAR"/>
2033       <require Dendian="Big-endian"/>
2034     </condition>
2035
2036     <condition id="CM3_IAR">
2037       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
2038       <require condition="CM3"/>
2039       <require Tcompiler="IAR"/>
2040     </condition>
2041     <condition id="CM3_LE_IAR">
2042       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
2043       <require condition="CM3_IAR"/>
2044       <require Dendian="Little-endian"/>
2045     </condition>
2046     <condition id="CM3_BE_IAR">
2047       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
2048       <require condition="CM3_IAR"/>
2049       <require Dendian="Big-endian"/>
2050     </condition>
2051
2052     <condition id="CM4_IAR">
2053       <description>Cortex-M4 processor based device for the IAR Compiler</description>
2054       <require condition="CM4"/>
2055       <require Tcompiler="IAR"/>
2056     </condition>
2057     <condition id="CM4_LE_IAR">
2058       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
2059       <require condition="CM4_IAR"/>
2060       <require Dendian="Little-endian"/>
2061     </condition>
2062     <condition id="CM4_BE_IAR">
2063       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
2064       <require condition="CM4_IAR"/>
2065       <require Dendian="Big-endian"/>
2066     </condition>
2067
2068     <condition id="CM4_FP_IAR">
2069       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
2070       <require condition="CM4_FP"/>
2071       <require Tcompiler="IAR"/>
2072     </condition>
2073     <condition id="CM4_FP_LE_IAR">
2074       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2075       <require condition="CM4_FP_IAR"/>
2076       <require Dendian="Little-endian"/>
2077     </condition>
2078     <condition id="CM4_FP_BE_IAR">
2079       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2080       <require condition="CM4_FP_IAR"/>
2081       <require Dendian="Big-endian"/>
2082     </condition>
2083
2084     <condition id="CM7_IAR">
2085       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2086       <require condition="CM7"/>
2087       <require Tcompiler="IAR"/>
2088     </condition>
2089     <condition id="CM7_LE_IAR">
2090       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2091       <require condition="CM7_IAR"/>
2092       <require Dendian="Little-endian"/>
2093     </condition>
2094     <condition id="CM7_BE_IAR">
2095       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2096       <require condition="CM7_IAR"/>
2097       <require Dendian="Big-endian"/>
2098     </condition>
2099
2100     <condition id="CM7_FP_IAR">
2101       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2102       <require condition="CM7_FP"/>
2103       <require Tcompiler="IAR"/>
2104     </condition>
2105     <condition id="CM7_FP_LE_IAR">
2106       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2107       <require condition="CM7_FP_IAR"/>
2108       <require Dendian="Little-endian"/>
2109     </condition>
2110     <condition id="CM7_FP_BE_IAR">
2111       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2112       <require condition="CM7_FP_IAR"/>
2113       <require Dendian="Big-endian"/>
2114     </condition>
2115
2116     <condition id="CM7_SP_IAR">
2117       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2118       <require condition="CM7_SP"/>
2119       <require Tcompiler="IAR"/>
2120     </condition>
2121     <condition id="CM7_SP_LE_IAR">
2122       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2123       <require condition="CM7_SP_IAR"/>
2124       <require Dendian="Little-endian"/>
2125     </condition>
2126     <condition id="CM7_SP_BE_IAR">
2127       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2128       <require condition="CM7_SP_IAR"/>
2129       <require Dendian="Big-endian"/>
2130     </condition>
2131
2132     <condition id="CM7_DP_IAR">
2133       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2134       <require condition="CM7_DP"/>
2135       <require Tcompiler="IAR"/>
2136     </condition>
2137     <condition id="CM7_DP_LE_IAR">
2138       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2139       <require condition="CM7_DP_IAR"/>
2140       <require Dendian="Little-endian"/>
2141     </condition>
2142     <condition id="CM7_DP_BE_IAR">
2143       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2144       <require condition="CM7_DP_IAR"/>
2145       <require Dendian="Big-endian"/>
2146     </condition>
2147
2148     <condition id="CM23_IAR">
2149       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2150       <require condition="CM23"/>
2151       <require Tcompiler="IAR"/>
2152     </condition>
2153     <condition id="CM23_LE_IAR">
2154       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2155       <require condition="CM23_IAR"/>
2156       <require Dendian="Little-endian"/>
2157     </condition>
2158
2159     <condition id="CM33_IAR">
2160       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2161       <require condition="CM33"/>
2162       <require Tcompiler="IAR"/>
2163     </condition>
2164     <condition id="CM33_LE_IAR">
2165       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2166       <require condition="CM33_IAR"/>
2167       <require Dendian="Little-endian"/>
2168     </condition>
2169
2170     <condition id="CM33_FP_IAR">
2171       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2172       <require condition="CM33_FP"/>
2173       <require Tcompiler="IAR"/>
2174     </condition>
2175     <condition id="CM33_FP_LE_IAR">
2176       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2177       <require condition="CM33_FP_IAR"/>
2178       <require Dendian="Little-endian"/>
2179     </condition>
2180
2181     <condition id="CM33_NODSP_NOFPU_IAR">
2182       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2183       <require condition="CM33_NODSP_NOFPU"/>
2184       <require Tcompiler="IAR"/>
2185     </condition>
2186     <condition id="CM33_DSP_NOFPU_IAR">
2187       <description>CM33, DSP, no FPU, IAR Compiler</description>
2188       <require condition="CM33_DSP_NOFPU"/>
2189       <require Tcompiler="IAR"/>
2190     </condition>
2191     <condition id="CM33_NODSP_SP_IAR">
2192       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2193       <require condition="CM33_NODSP_SP"/>
2194       <require Tcompiler="IAR"/>
2195     </condition>
2196     <condition id="CM33_DSP_SP_IAR">
2197       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2198       <require condition="CM33_DSP_SP"/>
2199       <require Tcompiler="IAR"/>
2200     </condition>
2201     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2202       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2203       <require condition="CM33_NODSP_NOFPU_IAR"/>
2204       <require Dendian="Little-endian"/>
2205     </condition>
2206     <condition id="CM33_DSP_NOFPU_LE_IAR">
2207       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2208       <require condition="CM33_DSP_NOFPU_IAR"/>
2209       <require Dendian="Little-endian"/>
2210     </condition>
2211     <condition id="CM33_NODSP_SP_LE_IAR">
2212       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2213       <require condition="CM33_NODSP_SP_IAR"/>
2214       <require Dendian="Little-endian"/>
2215     </condition>
2216     <condition id="CM33_DSP_SP_LE_IAR">
2217       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2218       <require condition="CM33_DSP_SP_IAR"/>
2219       <require Dendian="Little-endian"/>
2220     </condition>
2221
2222     <condition id="CM35P_IAR">
2223       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2224       <require condition="CM35P"/>
2225       <require Tcompiler="IAR"/>
2226     </condition>
2227     <condition id="CM35P_LE_IAR">
2228       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2229       <require condition="CM35P_IAR"/>
2230       <require Dendian="Little-endian"/>
2231     </condition>
2232
2233     <condition id="CM35P_FP_IAR">
2234       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2235       <require condition="CM35P_FP"/>
2236       <require Tcompiler="IAR"/>
2237     </condition>
2238     <condition id="CM35P_FP_LE_IAR">
2239       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2240       <require condition="CM35P_FP_IAR"/>
2241       <require Dendian="Little-endian"/>
2242     </condition>
2243
2244     <condition id="CM35P_NODSP_NOFPU_IAR">
2245       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2246       <require condition="CM35P_NODSP_NOFPU"/>
2247       <require Tcompiler="IAR"/>
2248     </condition>
2249     <condition id="CM35P_DSP_NOFPU_IAR">
2250       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2251       <require condition="CM35P_DSP_NOFPU"/>
2252       <require Tcompiler="IAR"/>
2253     </condition>
2254     <condition id="CM35P_NODSP_SP_IAR">
2255       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2256       <require condition="CM35P_NODSP_SP"/>
2257       <require Tcompiler="IAR"/>
2258     </condition>
2259     <condition id="CM35P_DSP_SP_IAR">
2260       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2261       <require condition="CM35P_DSP_SP"/>
2262       <require Tcompiler="IAR"/>
2263     </condition>
2264     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2265       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2266       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2267       <require Dendian="Little-endian"/>
2268     </condition>
2269     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2270       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2271       <require condition="CM35P_DSP_NOFPU_IAR"/>
2272       <require Dendian="Little-endian"/>
2273     </condition>
2274     <condition id="CM35P_NODSP_SP_LE_IAR">
2275       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2276       <require condition="CM35P_NODSP_SP_IAR"/>
2277       <require Dendian="Little-endian"/>
2278     </condition>
2279     <condition id="CM35P_DSP_SP_LE_IAR">
2280       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2281       <require condition="CM35P_DSP_SP_IAR"/>
2282       <require Dendian="Little-endian"/>
2283     </condition>
2284
2285     <condition id="CM55_NOFPU_NOMVE_IAR">
2286       <description>Cortex-M55 processor, no FPU, no MVE, IAR Compiler</description>
2287       <require condition="CM55_NOFPU_NOMVE"/>
2288       <require Tcompiler="IAR"/>
2289     </condition>
2290     <condition id="CM55_NOFPU_MVE_IAR">
2291       <description>Cortex-M55 processor, no FPU, MVE, IAR Compiler</description>
2292       <require condition="CM55_NOFPU_MVE"/>
2293       <require Tcompiler="IAR"/>
2294     </condition>
2295     <condition id="CM55_FPU_IAR">
2296       <description>Cortex-M55 processor, FPU, IAR Compiler</description>
2297       <require condition="CM55_FPU"/>
2298       <require Tcompiler="IAR"/>
2299     </condition>
2300     <condition id="CM55_NOFPU_NOMVE_LE_IAR">
2301       <description>Cortex-M55 processor, little endian, no FPU, no MVE, IAR Compiler</description>
2302       <require condition="CM55_NOFPU_NOMVE_IAR"/>
2303       <require Dendian="Little-endian"/>
2304     </condition>
2305     <condition id="CM55_FPU_LE_IAR">
2306       <description>Cortex-M55 processor, little endian, FPU, IAR Compiler</description>
2307       <require condition="CM55_FPU_IAR"/>
2308       <require Dendian="Little-endian"/>
2309     </condition>
2310
2311     <condition id="ARMv8MBL_IAR">
2312       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2313       <require condition="ARMv8MBL"/>
2314       <require Tcompiler="IAR"/>
2315     </condition>
2316     <condition id="ARMv8MBL_LE_IAR">
2317       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2318       <require condition="ARMv8MBL_IAR"/>
2319       <require Dendian="Little-endian"/>
2320     </condition>
2321
2322     <condition id="ARMv8MML_IAR">
2323       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2324       <require condition="ARMv8MML"/>
2325       <require Tcompiler="IAR"/>
2326     </condition>
2327     <condition id="ARMv8MML_LE_IAR">
2328       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2329       <require condition="ARMv8MML_IAR"/>
2330       <require Dendian="Little-endian"/>
2331     </condition>
2332
2333     <condition id="ARMv8MML_FP_IAR">
2334       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2335       <require condition="ARMv8MML_FP"/>
2336       <require Tcompiler="IAR"/>
2337     </condition>
2338     <condition id="ARMv8MML_FP_LE_IAR">
2339       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2340       <require condition="ARMv8MML_FP_IAR"/>
2341       <require Dendian="Little-endian"/>
2342     </condition>
2343
2344     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2345       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2346       <require condition="ARMv8MML_NODSP_NOFPU"/>
2347       <require Tcompiler="IAR"/>
2348     </condition>
2349     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2350       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2351       <require condition="ARMv8MML_DSP_NOFPU"/>
2352       <require Tcompiler="IAR"/>
2353     </condition>
2354     <condition id="ARMv8MML_NODSP_SP_IAR">
2355       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2356       <require condition="ARMv8MML_NODSP_SP"/>
2357       <require Tcompiler="IAR"/>
2358     </condition>
2359     <condition id="ARMv8MML_DSP_SP_IAR">
2360       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2361       <require condition="ARMv8MML_DSP_SP"/>
2362       <require Tcompiler="IAR"/>
2363     </condition>
2364     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2365       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2366       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2367       <require Dendian="Little-endian"/>
2368     </condition>
2369     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2370       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2371       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2372       <require Dendian="Little-endian"/>
2373     </condition>
2374     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2375       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2376       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2377       <require Dendian="Little-endian"/>
2378     </condition>
2379     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2380       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2381       <require condition="ARMv8MML_DSP_SP_IAR"/>
2382       <require Dendian="Little-endian"/>
2383     </condition>
2384
2385     <!-- conditions selecting single devices and CMSIS Core -->
2386     <condition id="ARMCM0 CMSIS">
2387       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2388       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2389       <require Cclass="CMSIS" Cgroup="CORE"/>
2390     </condition>
2391
2392     <condition id="ARMCM0+ CMSIS">
2393       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2394       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2395       <require Cclass="CMSIS" Cgroup="CORE"/>
2396     </condition>
2397
2398     <condition id="ARMCM1 CMSIS">
2399       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2400       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2401       <require Cclass="CMSIS" Cgroup="CORE"/>
2402     </condition>
2403
2404     <condition id="ARMCM3 CMSIS">
2405       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2406       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2407       <require Cclass="CMSIS" Cgroup="CORE"/>
2408     </condition>
2409
2410     <condition id="ARMCM4 CMSIS">
2411       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2412       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2413       <require Cclass="CMSIS" Cgroup="CORE"/>
2414     </condition>
2415
2416     <condition id="ARMCM7 CMSIS">
2417       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2418       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2419       <require Cclass="CMSIS" Cgroup="CORE"/>
2420     </condition>
2421
2422     <condition id="ARMCM23 CMSIS">
2423       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2424       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2425       <require Cclass="CMSIS" Cgroup="CORE"/>
2426     </condition>
2427
2428     <condition id="ARMCM33 CMSIS">
2429       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2430       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2431       <require Cclass="CMSIS" Cgroup="CORE"/>
2432     </condition>
2433
2434     <condition id="ARMCM35P CMSIS">
2435       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2436       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2437       <require Cclass="CMSIS" Cgroup="CORE"/>
2438     </condition>
2439
2440     <condition id="ARMCM55 CMSIS">
2441       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2442       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2443       <require Cclass="CMSIS" Cgroup="CORE"/>
2444     </condition>
2445
2446     <condition id="ARMSC000 CMSIS">
2447       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2448       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2449       <require Cclass="CMSIS" Cgroup="CORE"/>
2450     </condition>
2451
2452     <condition id="ARMSC300 CMSIS">
2453       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2454       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2455       <require Cclass="CMSIS" Cgroup="CORE"/>
2456     </condition>
2457
2458     <condition id="ARMv8MBL CMSIS">
2459       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2460       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2461       <require Cclass="CMSIS" Cgroup="CORE"/>
2462     </condition>
2463
2464     <condition id="ARMv8MML CMSIS">
2465       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2466       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2467       <require Cclass="CMSIS" Cgroup="CORE"/>
2468     </condition>
2469
2470     <condition id="ARMv81MML CMSIS">
2471       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2472       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2473       <require Cclass="CMSIS" Cgroup="CORE"/>
2474     </condition>
2475
2476     <condition id="ARMCA5 CMSIS">
2477       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2478       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2479       <require Cclass="CMSIS" Cgroup="CORE"/>
2480     </condition>
2481
2482     <condition id="ARMCA7 CMSIS">
2483       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2484       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2485       <require Cclass="CMSIS" Cgroup="CORE"/>
2486     </condition>
2487
2488     <condition id="ARMCA9 CMSIS">
2489       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2490       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2491       <require Cclass="CMSIS" Cgroup="CORE"/>
2492     </condition>
2493
2494     <!-- CMSIS DSP -->
2495     <condition id="CMSIS DSP">
2496       <description>Components required for DSP</description>
2497       <require condition="ARMv6_7_8-M Device"/>
2498       <require condition="ARMCC GCC IAR"/>
2499       <require Cclass="CMSIS" Cgroup="CORE"/>
2500     </condition>
2501
2502     <!-- CMSIS NN -->
2503     <condition id="CMSIS NN">
2504       <description>Components required for NN</description>
2505       <require Cclass="CMSIS" Cgroup="DSP"/>
2506     </condition>
2507
2508     <!-- RTOS RTX -->
2509     <condition id="RTOS RTX">
2510       <description>Components required for RTOS RTX</description>
2511       <require condition="ARMv6_7-M Device"/>
2512       <require condition="ARMCC GCC IAR"/>
2513       <require Cclass="Device" Cgroup="Startup"/>
2514       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2515     </condition>
2516     <condition id="RTOS RTX IFX">
2517       <description>Components required for RTOS RTX IFX</description>
2518       <require condition="ARMv6_7-M Device"/>
2519       <require condition="ARMCC GCC IAR"/>
2520       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2521       <require Cclass="Device" Cgroup="Startup"/>
2522       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2523     </condition>
2524     <condition id="RTOS RTX5">
2525       <description>Components required for RTOS RTX5</description>
2526       <require condition="ARMv6_7_8-M Device"/>
2527       <require condition="ARMCC GCC IAR"/>
2528       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2529     </condition>
2530     <condition id="RTOS2 RTX5">
2531       <description>Components required for RTOS2 RTX5</description>
2532       <require condition="ARMv6_7_8-M Device"/>
2533       <require condition="ARMCC GCC IAR"/>
2534       <require Cclass="CMSIS"  Cgroup="CORE"/>
2535       <require Cclass="Device" Cgroup="Startup"/>
2536     </condition>
2537     <condition id="RTOS2 RTX5 v7-A">
2538       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2539       <require condition="ARMv7-A Device"/>
2540       <require condition="ARMCC GCC IAR"/>
2541       <require Cclass="CMSIS"  Cgroup="CORE"/>
2542       <require Cclass="Device" Cgroup="Startup"/>
2543       <require Cclass="Device" Cgroup="OS Tick"/>
2544       <require Cclass="Device" Cgroup="IRQ Controller"/>
2545     </condition>
2546     <condition id="RTOS2 RTX5 NS">
2547       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2548       <require condition="ARMv8-M Device"/>
2549       <require condition="TZ Non-secure"/>
2550       <require condition="ARMCC GCC IAR"/>
2551       <require Cclass="CMSIS"  Cgroup="CORE"/>
2552       <require Cclass="Device" Cgroup="Startup"/>
2553     </condition>
2554
2555     <!-- OS Tick -->
2556     <condition id="OS Tick PTIM">
2557       <description>Components required for OS Tick Private Timer</description>
2558       <require condition="CA5_CA9"/>
2559       <require Cclass="Device" Cgroup="IRQ Controller"/>
2560     </condition>
2561
2562     <condition id="OS Tick GTIM">
2563       <description>Components required for OS Tick Generic Physical Timer</description>
2564       <require condition="CA7"/>
2565       <require Cclass="Device" Cgroup="IRQ Controller"/>
2566     </condition>
2567
2568   </conditions>
2569
2570   <components>
2571     <!-- CMSIS-Core component -->
2572     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.4.0"  condition="ARMv6_7_8-M Device" >
2573       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2574       <files>
2575         <!-- CPU independent -->
2576         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2577         <file category="include" name="CMSIS/Core/Include/"/>
2578         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
2579         <!-- Code template -->
2580         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2581         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2582       </files>
2583     </component>
2584
2585     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.2.0"  condition="ARMv7-A Device" >
2586       <description>CMSIS-CORE for Cortex-A</description>
2587       <files>
2588         <!-- CPU independent -->
2589         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2590         <file category="include" name="CMSIS/Core_A/Include/"/>
2591       </files>
2592     </component>
2593
2594     <!-- CMSIS-Startup components -->
2595     <!-- Cortex-M0 -->
2596     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS">
2597       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2598       <files>
2599         <!-- include folder / device header file -->
2600         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2601         <!-- startup / system file -->
2602         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
2603         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2604         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2605         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2606         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2607       </files>
2608     </component>
2609     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2610       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2611       <files>
2612         <!-- include folder / device header file -->
2613         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2614         <!-- startup / system file -->
2615         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2616         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.0.1" attr="config" condition="GCC"/>
2617         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2618         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2619         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2620       </files>
2621     </component>
2622
2623     <!-- Cortex-M0+ -->
2624     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS">
2625       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2626       <files>
2627         <!-- include folder / device header file -->
2628         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2629         <!-- startup / system file -->
2630         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
2631         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2632         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2633         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2634         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2635       </files>
2636     </component>
2637     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0+ CMSIS">
2638       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2639       <files>
2640         <!-- include folder / device header file -->
2641         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2642         <!-- startup / system file -->
2643         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2644         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.0.1" attr="config" condition="GCC"/>
2645         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2646         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2647         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2648       </files>
2649     </component>
2650
2651     <!-- Cortex-M1 -->
2652     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS">
2653       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2654       <files>
2655         <!-- include folder / device header file -->
2656         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2657         <!-- startup / system file -->
2658         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
2659         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2660         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2661         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2662         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2663       </files>
2664     </component>
2665     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2666       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2667       <files>
2668         <!-- include folder / device header file -->
2669         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2670         <!-- startup / system file -->
2671         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2672         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.0.1" attr="config" condition="GCC"/>
2673         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2674         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2675         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2676       </files>
2677     </component>
2678
2679     <!-- Cortex-M3 -->
2680     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS">
2681       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2682       <files>
2683         <!-- include folder / device header file -->
2684         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2685         <!-- startup / system file -->
2686         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
2687         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2688         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2689         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2690         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2691       </files>
2692     </component>
2693     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2694       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2695       <files>
2696         <!-- include folder / device header file -->
2697         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2698         <!-- startup / system file -->
2699         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2700         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.0.1" attr="config" condition="GCC"/>
2701         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2702         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2703         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2704       </files>
2705     </component>
2706
2707     <!-- Cortex-M4 -->
2708     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS">
2709       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2710       <files>
2711         <!-- include folder / device header file -->
2712         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2713         <!-- startup / system file -->
2714         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
2715         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2716         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2717         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2718        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2719       </files>
2720     </component>
2721     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2722       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2723       <files>
2724         <!-- include folder / device header file -->
2725         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2726         <!-- startup / system file -->
2727         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2728         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.0.1" attr="config" condition="GCC"/>
2729         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2730         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2731         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2732       </files>
2733     </component>
2734
2735     <!-- Cortex-M7 -->
2736     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS">
2737       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2738       <files>
2739         <!-- include folder / device header file -->
2740         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2741         <!-- startup / system file -->
2742         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
2743         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2744         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2745         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2746         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2747       </files>
2748     </component>
2749     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2750       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2751       <files>
2752         <!-- include folder / device header file -->
2753         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2754         <!-- startup / system file -->
2755         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2756         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.0.1" attr="config" condition="GCC"/>
2757         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2758         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2759         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2760       </files>
2761     </component>
2762
2763     <!-- Cortex-M23 -->
2764     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM23 CMSIS">
2765       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2766       <files>
2767         <!-- include folder / device header file -->
2768         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2769         <!-- startup / system file -->
2770         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.3" attr="config"/>
2771         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
2772         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2773         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2774         <!-- SAU configuration -->
2775         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2776       </files>
2777     </component>
2778     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM23 CMSIS">
2779       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2780       <files>
2781         <!-- include folder / device header file -->
2782         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2783         <!-- startup / system file -->
2784         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.1" attr="config" condition="ARMCC"/>
2785         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.0.1" attr="config" condition="GCC"/>
2786         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.0.0" attr="config" condition="GCC"/>
2787         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2788         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2789         <!-- SAU configuration -->
2790         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2791       </files>
2792     </component>
2793
2794     <!-- Cortex-M33 -->
2795     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM33 CMSIS">
2796       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2797       <files>
2798         <!-- include folder / device header file -->
2799         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2800         <!-- startup / system file -->
2801         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.3" attr="config"/>
2802         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2803         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2804         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2805         <!-- SAU configuration -->
2806         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2807       </files>
2808     </component>
2809     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM33 CMSIS">
2810       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2811       <files>
2812         <!-- include folder / device header file -->
2813         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2814         <!-- startup / system file -->
2815         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2816         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.0.1" attr="config" condition="GCC"/>
2817         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2818         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2819         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2820         <!-- SAU configuration -->
2821         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2822       </files>
2823     </component>
2824
2825     <!-- Cortex-M35P -->
2826     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM35P CMSIS">
2827       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2828       <files>
2829         <!-- include folder / device header file -->
2830         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2831         <!-- startup / system file -->
2832         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.3" attr="config"/>
2833         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2834         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2835         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2836         <!-- SAU configuration -->
2837         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2838       </files>
2839     </component>
2840     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM35P CMSIS">
2841       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2842       <files>
2843         <!-- include folder / device header file -->
2844         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2845         <!-- startup / system file -->
2846         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2847         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.1" attr="config" condition="GCC"/>
2848         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2849         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
2850         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2851         <!-- SAU configuration -->
2852         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2853       </files>
2854     </component>
2855
2856     <!-- Cortex-M55 -->
2857     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM55 CMSIS">
2858       <description>System and Startup for Generic Cortex-M55 device</description>
2859       <files>
2860         <!-- include folder / device header file -->
2861         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2862         <!-- startup / system file -->
2863         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.0.0" attr="config"/>
2864         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2865         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2866         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.0.0" attr="config"/>
2867         <!-- SAU configuration -->
2868         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2869       </files>
2870     </component>
2871
2872     <!-- Cortex-SC000 -->
2873     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS">
2874       <description>System and Startup for Generic Arm SC000 device</description>
2875       <files>
2876         <!-- include folder / device header file -->
2877         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2878         <!-- startup / system file -->
2879         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
2880         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2881         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2882         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2883         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2884       </files>
2885     </component>
2886     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2887       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2888       <files>
2889         <!-- include folder / device header file -->
2890         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2891         <!-- startup / system file -->
2892         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2893         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.0.1" attr="config" condition="GCC"/>
2894         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2895         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2896         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2897       </files>
2898     </component>
2899
2900     <!-- Cortex-SC300 -->
2901     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS">
2902       <description>System and Startup for Generic Arm SC300 device</description>
2903       <files>
2904         <!-- include folder / device header file -->
2905         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2906         <!-- startup / system file -->
2907         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
2908         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2909         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2910         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2911         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2912       </files>
2913     </component>
2914     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2915       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2916       <files>
2917         <!-- include folder / device header file -->
2918         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2919         <!-- startup / system file -->
2920         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2921         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.0.1" attr="config" condition="GCC"/>
2922         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2923         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2924         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2925       </files>
2926     </component>
2927
2928     <!-- ARMv8MBL -->
2929     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMv8MBL CMSIS">
2930       <description>System and Startup for Generic Armv8-M Baseline device</description>
2931       <files>
2932         <!-- include folder / device header file -->
2933         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2934         <!-- startup / system file -->
2935         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.3" attr="config"/>
2936         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
2937         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2938         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2939         <!-- SAU configuration -->
2940         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2941       </files>
2942     </component>
2943     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMv8MBL CMSIS">
2944       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2945       <files>
2946         <!-- include folder / device header file -->
2947         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2948         <!-- startup / system file -->
2949         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.1" attr="config" condition="ARMCC"/>
2950         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.0.1" attr="config" condition="GCC"/>
2951         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2952         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2953         <!-- SAU configuration -->
2954         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2955       </files>
2956     </component>
2957
2958     <!-- ARMv8MML -->
2959     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMv8MML CMSIS">
2960       <description>System and Startup for Generic Armv8-M Mainline device</description>
2961       <files>
2962         <!-- include folder / device header file -->
2963         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2964         <!-- startup / system file -->
2965         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.3" attr="config"/>
2966         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2967         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2968         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2969         <!-- SAU configuration -->
2970         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2971       </files>
2972     </component>
2973     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMv8MML CMSIS">
2974       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2975       <files>
2976         <!-- include folder / device header file -->
2977         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2978         <!-- startup / system file -->
2979         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2980         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.0.1" attr="config" condition="GCC"/>
2981         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2982         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2983         <!-- SAU configuration -->
2984         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2985       </files>
2986     </component>
2987
2988     <!-- ARMv81MML -->
2989     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.1" condition="ARMv81MML CMSIS">
2990       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2991       <files>
2992         <!-- include folder / device header file -->
2993         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2994         <!-- startup / system file -->
2995         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.3" attr="config"/>
2996         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2997         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.0.1" attr="config" condition="GCC"/>
2998         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
2999         <!-- SAU configuration -->
3000         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
3001       </files>
3002     </component>
3003
3004     <!-- Cortex-A5 -->
3005     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
3006       <description>System and Startup for Generic Arm Cortex-A5 device</description>
3007       <files>
3008         <!-- include folder / device header file -->
3009         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
3010         <!-- startup / system / mmu files -->
3011         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3012         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3013         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3014         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3015         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
3016         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
3017         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
3018         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
3019         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
3020         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
3021         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
3022         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
3023
3024       </files>
3025     </component>
3026
3027     <!-- Cortex-A7 -->
3028     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
3029       <description>System and Startup for Generic Arm Cortex-A7 device</description>
3030       <files>
3031         <!-- include folder / device header file -->
3032         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
3033         <!-- startup / system / mmu files -->
3034         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3035         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3036         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3037         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3038         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
3039         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
3040         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
3041         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
3042         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
3043         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
3044         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
3045         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
3046       </files>
3047     </component>
3048
3049     <!-- Cortex-A9 -->
3050     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
3051       <description>System and Startup for Generic Arm Cortex-A9 device</description>
3052       <files>
3053         <!-- include folder / device header file -->
3054         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3055         <!-- startup / system / mmu files -->
3056         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3057         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3058         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3059         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3060         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3061         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3062         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3063         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3064         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
3065         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
3066         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
3067         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
3068       </files>
3069     </component>
3070
3071     <!-- IRQ Controller -->
3072     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3073       <description>IRQ Controller implementation using GIC</description>
3074       <files>
3075         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3076       </files>
3077     </component>
3078
3079     <!-- OS Tick -->
3080     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3081       <description>OS Tick implementation using Private Timer</description>
3082       <files>
3083         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3084       </files>
3085     </component>
3086
3087     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3088       <description>OS Tick implementation using Generic Physical Timer</description>
3089       <files>
3090         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3091       </files>
3092     </component>
3093
3094     <!-- CMSIS-DSP component -->
3095     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.8.0" condition="CMSIS DSP">
3096       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3097       <files>
3098         <!-- CPU independent -->
3099         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3100         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3101
3102         <!-- CPU and Compiler dependent -->
3103         <!-- ARMCC -->
3104         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3105         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3106         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3107         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3108         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3109         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3110         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3111         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3112         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3113         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3114         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3115         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3116         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3117         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3118         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3119         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3120
3121         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3122         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3123         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3124         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3125         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3126         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3127         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3128         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3129         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3130         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3131         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3132         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3133         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3134         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3135         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3136         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3137
3138         <!-- GCC -->
3139         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3140         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3141         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3142         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3143         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3144         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3145         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3146         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3147
3148         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3149         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3150         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3151         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3152         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3153         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3154         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3155         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3156         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3157         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3158         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3159         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3160         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3161         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3162         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3163         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3164
3165         <!-- IAR -->
3166         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3167         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3168         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3169         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3170         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3171         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3172         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3173         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3174         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3175         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3176         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3177         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3178         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3179         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3180         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3181         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3182
3183         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3184         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3185         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3186         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3187         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3188         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3189         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3190         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3191         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3192         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3193         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3194         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3195         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3196         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3197         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3198         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3199
3200       </files>
3201     </component>
3202     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.8.0" isDefaultVariant="true" condition="CMSIS DSP">
3203       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3204       <files>
3205         <!-- CPU independent -->
3206         <file category="doc"      name="CMSIS/Documentation/DSP/html/index.html"/>
3207         <file category="header"   name="CMSIS/DSP/Include/arm_math.h"/>
3208         <file category="include"  name="CMSIS/DSP/PrivateInclude/"/>
3209
3210         <!-- DSP sources (core) -->
3211         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3212         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
3213         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3214         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3215         <file category="source"   name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3216         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
3217         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3218         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3219         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3220         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3221         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3222         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
3223         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3224
3225         <!-- Compute Library for Cortex-A -->
3226         <file category="header"   name="CMSIS/DSP/ComputeLibrary/Include/NEMath.h"        condition="ARMv7-A Device"/>
3227         <file category="source"   name="CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c"  condition="ARMv7-A Device"/>
3228       </files>
3229     </component>
3230
3231     <!-- CMSIS-NN component -->
3232     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.3.0" condition="CMSIS NN">
3233       <description>CMSIS-NN Neural Network Library</description>
3234       <files>
3235         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3236         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3237         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
3238         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
3239
3240         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3241         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3242         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3243         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
3244         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
3245         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
3246         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c"/>
3247         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3248         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3249         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3250         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
3251         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
3252         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
3253         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
3254         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
3255         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
3256         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3257         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3258         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
3259         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3260         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3261         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
3262         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3263         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3264         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
3265         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
3266         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
3267         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
3268         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8_opt.c"/>
3269         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
3270         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
3271         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3272         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
3273         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
3274         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
3275         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3276         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3277         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3278         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3279         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
3280         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3281         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3282         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
3283         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
3284         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
3285         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
3286         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
3287         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
3288         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3289         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3290         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
3291         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3292         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
3293         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
3294         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3295         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3296         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3297         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3298         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3299         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3300         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3301         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
3302         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
3303         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3304         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
3305       </files>
3306     </component>
3307
3308     <!-- CMSIS-RTOS Keil RTX component -->
3309     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3310       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3311       <RTE_Components_h>
3312         <!-- the following content goes into file 'RTE_Components.h' -->
3313         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3314         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3315       </RTE_Components_h>
3316       <files>
3317         <!-- CPU independent -->
3318         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3319         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3320         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3321
3322         <!-- RTX templates -->
3323         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3324         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3325         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3326         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3327         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3328         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3329         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3330         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3331         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3332         <!-- tool-chain specific template file -->
3333         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3334         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3335         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3336
3337         <!-- CPU and Compiler dependent -->
3338         <!-- ARMCC -->
3339         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3340         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3341         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3342         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3343         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3344         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3345         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3346         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3347         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3348         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3349         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3350         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3351         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3352         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3353         <!-- GCC -->
3354         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3355         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3356         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3357         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3358         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3359         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3360         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3361         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3362         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3363         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3364         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3365         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3366         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3367         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3368         <!-- IAR -->
3369         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3370         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3371         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3372         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3373         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3374         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3375         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3376         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3377         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3378         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3379         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3380         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3381         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3382         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3383       </files>
3384     </component>
3385     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3386     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3387       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3388       <RTE_Components_h>
3389         <!-- the following content goes into file 'RTE_Components.h' -->
3390         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3391         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3392       </RTE_Components_h>
3393       <files>
3394         <!-- CPU independent -->
3395         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3396         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3397         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3398
3399         <!-- RTX templates -->
3400         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3401         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3402         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3403         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3404         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3405         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3406         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3407         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3408         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3409         <!-- tool-chain specific template file -->
3410         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3411         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3412         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3413
3414         <!-- CPU and Compiler dependent -->
3415         <!-- ARMCC -->
3416         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3417         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3418         <!-- GCC -->
3419         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3420         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3421         <!-- IAR -->
3422       </files>
3423     </component>
3424
3425     <!-- CMSIS-RTOS Keil RTX5 component -->
3426     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.2" Capiversion="1.0.0" condition="RTOS RTX5">
3427       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3428       <RTE_Components_h>
3429         <!-- the following content goes into file 'RTE_Components.h' -->
3430         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3431         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3432       </RTE_Components_h>
3433       <files>
3434         <!-- RTX header file -->
3435         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3436         <!-- RTX compatibility module for API V1 -->
3437         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3438       </files>
3439     </component>
3440
3441     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3442     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3443       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
3444       <RTE_Components_h>
3445         <!-- the following content goes into file 'RTE_Components.h' -->
3446         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3447         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3448       </RTE_Components_h>
3449       <files>
3450         <!-- RTX documentation -->
3451         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3452
3453         <!-- RTX header files -->
3454         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3455
3456         <!-- RTX configuration -->
3457         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3458         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3459
3460         <!-- RTX templates -->
3461         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3462         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3463         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3464         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3465         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3466         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3467         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3468         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3469         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3470         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3471
3472         <!-- RTX library configuration -->
3473         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3474
3475         <!-- RTX libraries (CPU and Compiler dependent) -->
3476         <!-- ARMCC -->
3477         <file category="library" condition="CM0_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3478         <file category="library" condition="CM1_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3479         <file category="library" condition="CM3_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3480         <file category="library" condition="CM4_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3481         <file category="library" condition="CM4_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3482         <file category="library" condition="CM7_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3483         <file category="library" condition="CM7_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3484         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3485         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3486         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3487         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3488         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3489         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3490         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3491         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3492         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3493         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3494         <!-- GCC -->
3495         <file category="library" condition="CM0_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3496         <file category="library" condition="CM1_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3497         <file category="library" condition="CM3_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3498         <file category="library" condition="CM4_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3499         <file category="library" condition="CM4_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3500         <file category="library" condition="CM7_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3501         <file category="library" condition="CM7_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3502         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3503         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3504         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3505         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3506         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3507         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3508         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3509         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3510         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3511         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3512         <!-- IAR -->
3513         <file category="library" condition="CM0_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3514         <file category="library" condition="CM1_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3515         <file category="library" condition="CM3_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3516         <file category="library" condition="CM4_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3517         <file category="library" condition="CM4_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3518         <file category="library" condition="CM7_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3519         <file category="library" condition="CM7_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3520         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3521         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3522         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3523         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3524         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3525         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3526         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3527         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3528         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3529         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3530       </files>
3531     </component>
3532     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3533       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
3534       <RTE_Components_h>
3535         <!-- the following content goes into file 'RTE_Components.h' -->
3536         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3537         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3538         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3539       </RTE_Components_h>
3540       <files>
3541         <!-- RTX documentation -->
3542         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3543
3544         <!-- RTX header files -->
3545         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3546
3547         <!-- RTX configuration -->
3548         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3549         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3550
3551         <!-- RTX templates -->
3552         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3553         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3554         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3555         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3556         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3557         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3558         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3559         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3560         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3561         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3562
3563         <!-- RTX library configuration -->
3564         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3565
3566         <!-- RTX libraries (CPU and Compiler dependent) -->
3567         <!-- ARMCC -->
3568         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3569         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3570         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3571         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3572         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3573         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3574         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3575         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3576         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3577         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3578         <!-- GCC -->
3579         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3580         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3581         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3582         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3583         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3584         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3585         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3586         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3587         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3588         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3589         <!-- IAR -->
3590         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3591         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3592         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3593         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3594         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3595         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3596         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3597         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3598         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3599         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3600       </files>
3601     </component>
3602     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3603       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
3604       <RTE_Components_h>
3605         <!-- the following content goes into file 'RTE_Components.h' -->
3606         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3607         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3608         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3609       </RTE_Components_h>
3610       <files>
3611         <!-- RTX documentation -->
3612         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3613
3614         <!-- RTX header files -->
3615         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3616
3617         <!-- RTX configuration -->
3618         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3619         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3620
3621         <!-- RTX templates -->
3622         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3623         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3624         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3625         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3626         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3627         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3628         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3629         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3630         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3631         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3632
3633         <!-- RTX sources (core) -->
3634         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3635         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3636         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3637         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3638         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3639         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3640         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3641         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3642         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3643         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3644         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3645         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3646         <!-- RTX sources (library configuration) -->
3647         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3648         <!-- RTX sources (handlers ARMCC) -->
3649         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"      condition="CM0_ARMCC"/>
3650         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"      condition="CM1_ARMCC"/>
3651         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM3_ARMCC"/>
3652         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM4_ARMCC"/>
3653         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"     condition="CM4_FP_ARMCC"/>
3654         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM7_ARMCC"/>
3655         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"     condition="CM7_FP_ARMCC"/>
3656         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
3657         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
3658         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
3659         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM35P_ARMCC"/>
3660         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM35P_FP_ARMCC"/>
3661         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3662         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3663         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3664         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
3665         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
3666         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
3667         <!-- RTX sources (handlers GCC) -->
3668         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"      condition="CM0_GCC"/>
3669         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"      condition="CM1_GCC"/>
3670         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM3_GCC"/>
3671         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM4_GCC"/>
3672         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"     condition="CM4_FP_GCC"/>
3673         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM7_GCC"/>
3674         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"     condition="CM7_FP_GCC"/>
3675         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3676         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3677         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3678         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3679         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3680         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3681         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3682         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3683         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3684         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3685         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3686         <!-- RTX sources (handlers IAR) -->
3687         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"      condition="CM0_IAR"/>
3688         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"      condition="CM1_IAR"/>
3689         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM3_IAR"/>
3690         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM4_IAR"/>
3691         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"     condition="CM4_FP_IAR"/>
3692         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM7_IAR"/>
3693         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"     condition="CM7_FP_IAR"/>
3694         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3695         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3696         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3697         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3698         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3699         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3700         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3701         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3702         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3703         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3704         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3705         <!-- OS Tick (SysTick) -->
3706         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3707       </files>
3708     </component>
3709     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3710       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3711       <RTE_Components_h>
3712         <!-- the following content goes into file 'RTE_Components.h' -->
3713         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3714         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3715         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3716       </RTE_Components_h>
3717       <files>
3718         <!-- RTX documentation -->
3719         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3720
3721         <!-- RTX header files -->
3722         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3723
3724         <!-- RTX configuration -->
3725         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3726         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3727
3728         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3729
3730         <!-- RTX templates -->
3731         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3732         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3733         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3734         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3735         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3736         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3737         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3738         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3739         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3740         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3741
3742         <!-- RTX sources (core) -->
3743         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3744         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3745         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3746         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3747         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3748         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3749         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3750         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3751         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3752         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3753         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3754         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3755         <!-- RTX sources (library configuration) -->
3756         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3757         <!-- RTX sources (handlers ARMCC) -->
3758         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3759         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3760         <!-- RTX sources (handlers GCC) -->
3761         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3762         <!-- RTX sources (handlers IAR) -->
3763         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3764       </files>
3765     </component>
3766     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3767       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
3768       <RTE_Components_h>
3769         <!-- the following content goes into file 'RTE_Components.h' -->
3770         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3771         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3772         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3773         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3774       </RTE_Components_h>
3775       <files>
3776         <!-- RTX documentation -->
3777         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3778
3779         <!-- RTX header files -->
3780         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3781
3782         <!-- RTX configuration -->
3783         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3784         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3785
3786         <!-- RTX templates -->
3787         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3788         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3789         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3790         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3791         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3792         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3793         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3794         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3795         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3796         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3797
3798         <!-- RTX sources (core) -->
3799         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3800         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3801         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3802         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3803         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3804         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3805         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3806         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3807         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3808         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3809         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3810         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3811         <!-- RTX sources (library configuration) -->
3812         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3813         <!-- RTX sources (ARMCC handlers) -->
3814         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
3815         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
3816         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
3817         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM35P_ARMCC"/>
3818         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM35P_FP_ARMCC"/>
3819         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_NOMVE_ARMCC"/>
3820         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_MVE_ARMCC"/>
3821         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_FPU_ARMCC"/>
3822         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
3823         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
3824         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
3825         <!-- RTX sources (GCC handlers) -->
3826         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3827         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3828         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_FP_GCC"/>
3829         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3830         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_FP_GCC"/>
3831         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_NOMVE_GCC"/>
3832         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_MVE_GCC"/>
3833         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_FPU_GCC"/>
3834         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3835         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3836         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_FP_GCC"/>
3837         <!-- RTX sources (IAR handlers) -->
3838         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="CM23_IAR"/>
3839         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_IAR"/>
3840         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_FP_IAR"/>
3841         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM35P_IAR"/>
3842         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM35P_FP_IAR"/>
3843         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3844         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_NOFPU_MVE_IAR"/>
3845         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_FPU_IAR"/>
3846         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="ARMv8MBL_IAR"/>
3847         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_IAR"/>
3848         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_FP_IAR"/>
3849         <!-- OS Tick (SysTick) -->
3850         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3851       </files>
3852     </component>
3853
3854     <!-- CMSIS-Driver Custom components -->
3855     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3856       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3857       <files>
3858         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3859         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3860       </files>
3861     </component>
3862     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3863       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3864       <files>
3865         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3866         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3867       </files>
3868     </component>
3869     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3870       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3871       <files>
3872         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3873         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3874       </files>
3875     </component>
3876     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3877       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3878       <files>
3879         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3880         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3881       </files>
3882     </component>
3883     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3884       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3885       <files>
3886         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3887         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3888       </files>
3889     </component>
3890     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3891       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3892       <files>
3893         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3894         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3895       </files>
3896     </component>
3897     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3898       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3899       <files>
3900         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3901         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3902       </files>
3903     </component>
3904     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3905       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3906       <files>
3907         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3908         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
3909       </files>
3910     </component>
3911     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3912       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3913       <files>
3914         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3915         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3916         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3917         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3918       </files>
3919     </component>
3920     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3921       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3922       <files>
3923         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3924         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3925       </files>
3926     </component>
3927     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3928       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3929       <files>
3930         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3931         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3932       </files>
3933     </component>
3934     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3935       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3936       <files>
3937         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3938         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3939       </files>
3940     </component>
3941     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3942       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3943       <files>
3944         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3945         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3946       </files>
3947     </component>
3948     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3949       <description>Access to #include Driver_WiFi.h file</description>
3950       <files>
3951         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3952         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
3953       </files>
3954     </component>
3955
3956     <!-- VIO components -->
3957     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
3958       <description>Virtual I/O custom implementation template</description>
3959       <files>
3960         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
3961       </files>
3962     </component>
3963     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
3964       <description>Virtual I/O implementation using memory only</description>
3965       <files>
3966         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
3967       </files>
3968     </component>
3969
3970   </components>
3971
3972   <boards>
3973     <board name="uVision Simulator" vendor="Keil">
3974       <description>uVision Simulator</description>
3975       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3976       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3977       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3978       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3979       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3980       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3981       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3982       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3983       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3984       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3985       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3986       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3987       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3988       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3989       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
3990       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3991       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3992       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3993       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3994       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3995       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3996       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3997       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3998       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3999       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
4000       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
4001     </board>
4002
4003     <board name="EWARM Simulator" vendor="IAR">
4004       <description>EWARM Simulator</description>
4005       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
4006       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
4007       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
4008       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
4009       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
4010       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
4011       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
4012       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
4013       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
4014       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
4015       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
4016       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
4017       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
4018       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
4019       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
4020       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
4021       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
4022       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
4023       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
4024       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
4025       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
4026       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
4027       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
4028       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
4029       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
4030       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
4031     </board>
4032   </boards>
4033
4034   <examples>
4035     <example name="DSP_Lib Bayes example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_bayes_example">
4036       <description>DSP_Lib Bayes example</description>
4037       <board name="uVision Simulator" vendor="Keil"/>
4038       <project>
4039         <environment name="uv" load="arm_bayes_example.uvprojx"/>
4040       </project>
4041       <attributes>
4042         <component Cclass="CMSIS" Cgroup="CORE"/>
4043         <component Cclass="CMSIS" Cgroup="DSP"/>
4044         <component Cclass="Device" Cgroup="Startup"/>
4045         <category>Getting Started</category>
4046       </attributes>
4047     </example>
4048
4049     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
4050       <description>DSP_Lib Class Marks example</description>
4051       <board name="uVision Simulator" vendor="Keil"/>
4052       <project>
4053         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
4054       </project>
4055       <attributes>
4056         <component Cclass="CMSIS" Cgroup="CORE"/>
4057         <component Cclass="CMSIS" Cgroup="DSP"/>
4058         <component Cclass="Device" Cgroup="Startup"/>
4059         <category>Getting Started</category>
4060       </attributes>
4061     </example>
4062
4063     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
4064       <description>DSP_Lib Convolution example</description>
4065       <board name="uVision Simulator" vendor="Keil"/>
4066       <project>
4067         <environment name="uv" load="arm_convolution_example.uvprojx"/>
4068       </project>
4069       <attributes>
4070         <component Cclass="CMSIS" Cgroup="CORE"/>
4071         <component Cclass="CMSIS" Cgroup="DSP"/>
4072         <component Cclass="Device" Cgroup="Startup"/>
4073         <category>Getting Started</category>
4074       </attributes>
4075     </example>
4076
4077     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
4078       <description>DSP_Lib Dotproduct example</description>
4079       <board name="uVision Simulator" vendor="Keil"/>
4080       <project>
4081         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
4082       </project>
4083       <attributes>
4084         <component Cclass="CMSIS" Cgroup="CORE"/>
4085         <component Cclass="CMSIS" Cgroup="DSP"/>
4086         <component Cclass="Device" Cgroup="Startup"/>
4087         <category>Getting Started</category>
4088       </attributes>
4089     </example>
4090
4091     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
4092       <description>DSP_Lib FFT Bin example</description>
4093       <board name="uVision Simulator" vendor="Keil"/>
4094       <project>
4095         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
4096       </project>
4097       <attributes>
4098         <component Cclass="CMSIS" Cgroup="CORE"/>
4099         <component Cclass="CMSIS" Cgroup="DSP"/>
4100         <component Cclass="Device" Cgroup="Startup"/>
4101         <category>Getting Started</category>
4102       </attributes>
4103     </example>
4104
4105     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
4106       <description>DSP_Lib FIR example</description>
4107       <board name="uVision Simulator" vendor="Keil"/>
4108       <project>
4109         <environment name="uv" load="arm_fir_example.uvprojx"/>
4110       </project>
4111       <attributes>
4112         <component Cclass="CMSIS" Cgroup="CORE"/>
4113         <component Cclass="CMSIS" Cgroup="DSP"/>
4114         <component Cclass="Device" Cgroup="Startup"/>
4115         <category>Getting Started</category>
4116       </attributes>
4117     </example>
4118
4119     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
4120       <description>DSP_Lib Graphic Equalizer example</description>
4121       <board name="uVision Simulator" vendor="Keil"/>
4122       <project>
4123         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
4124       </project>
4125       <attributes>
4126         <component Cclass="CMSIS" Cgroup="CORE"/>
4127         <component Cclass="CMSIS" Cgroup="DSP"/>
4128         <component Cclass="Device" Cgroup="Startup"/>
4129         <category>Getting Started</category>
4130       </attributes>
4131     </example>
4132
4133     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4134       <description>DSP_Lib Linear Interpolation example</description>
4135       <board name="uVision Simulator" vendor="Keil"/>
4136       <project>
4137         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4138       </project>
4139       <attributes>
4140         <component Cclass="CMSIS" Cgroup="CORE"/>
4141         <component Cclass="CMSIS" Cgroup="DSP"/>
4142         <component Cclass="Device" Cgroup="Startup"/>
4143         <category>Getting Started</category>
4144       </attributes>
4145     </example>
4146
4147     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4148       <description>DSP_Lib Matrix example</description>
4149       <board name="uVision Simulator" vendor="Keil"/>
4150       <project>
4151         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4152       </project>
4153       <attributes>
4154         <component Cclass="CMSIS" Cgroup="CORE"/>
4155         <component Cclass="CMSIS" Cgroup="DSP"/>
4156         <component Cclass="Device" Cgroup="Startup"/>
4157         <category>Getting Started</category>
4158       </attributes>
4159     </example>
4160
4161     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4162       <description>DSP_Lib Signal Convergence example</description>
4163       <board name="uVision Simulator" vendor="Keil"/>
4164       <project>
4165         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4166       </project>
4167       <attributes>
4168         <component Cclass="CMSIS" Cgroup="CORE"/>
4169         <component Cclass="CMSIS" Cgroup="DSP"/>
4170         <component Cclass="Device" Cgroup="Startup"/>
4171         <category>Getting Started</category>
4172       </attributes>
4173     </example>
4174
4175     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4176       <description>DSP_Lib Sinus/Cosinus example</description>
4177       <board name="uVision Simulator" vendor="Keil"/>
4178       <project>
4179         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4180       </project>
4181       <attributes>
4182         <component Cclass="CMSIS" Cgroup="CORE"/>
4183         <component Cclass="CMSIS" Cgroup="DSP"/>
4184         <component Cclass="Device" Cgroup="Startup"/>
4185         <category>Getting Started</category>
4186       </attributes>
4187     </example>
4188
4189     <example name="DSP_Lib SVM example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_svm_example">
4190       <description>DSP_Lib SVM example</description>
4191       <board name="uVision Simulator" vendor="Keil"/>
4192       <project>
4193         <environment name="uv" load="arm_svm_example.uvprojx"/>
4194       </project>
4195       <attributes>
4196         <component Cclass="CMSIS" Cgroup="CORE"/>
4197         <component Cclass="CMSIS" Cgroup="DSP"/>
4198         <component Cclass="Device" Cgroup="Startup"/>
4199         <category>Getting Started</category>
4200       </attributes>
4201     </example>
4202
4203     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4204       <description>DSP_Lib Variance example</description>
4205       <board name="uVision Simulator" vendor="Keil"/>
4206       <project>
4207         <environment name="uv" load="arm_variance_example.uvprojx"/>
4208       </project>
4209       <attributes>
4210         <component Cclass="CMSIS" Cgroup="CORE"/>
4211         <component Cclass="CMSIS" Cgroup="DSP"/>
4212         <component Cclass="Device" Cgroup="Startup"/>
4213         <category>Getting Started</category>
4214       </attributes>
4215     </example>
4216
4217     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4218       <description>Neural Network CIFAR10 example</description>
4219       <board name="uVision Simulator" vendor="Keil"/>
4220       <project>
4221         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4222       </project>
4223       <attributes>
4224         <component Cclass="CMSIS" Cgroup="CORE"/>
4225         <component Cclass="CMSIS" Cgroup="DSP"/>
4226         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4227         <component Cclass="Device" Cgroup="Startup"/>
4228         <category>Getting Started</category>
4229       </attributes>
4230     </example>
4231
4232     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4233       <description>Neural Network CIFAR10 example</description>
4234       <board name="EWARM Simulator" vendor="IAR"/>
4235       <project>
4236         <environment name="iar" load="NN-example-cifar10.ewp"/>
4237       </project>
4238       <attributes>
4239         <component Cclass="CMSIS" Cgroup="CORE"/>
4240         <component Cclass="CMSIS" Cgroup="DSP"/>
4241         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4242         <component Cclass="Device" Cgroup="Startup"/>
4243         <category>Getting Started</category>
4244       </attributes>
4245     </example>
4246
4247     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4248       <description>Neural Network GRU example</description>
4249       <board name="uVision Simulator" vendor="Keil"/>
4250       <project>
4251         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4252       </project>
4253       <attributes>
4254         <component Cclass="CMSIS" Cgroup="CORE"/>
4255         <component Cclass="CMSIS" Cgroup="DSP"/>
4256         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4257         <component Cclass="Device" Cgroup="Startup"/>
4258         <category>Getting Started</category>
4259       </attributes>
4260     </example>
4261
4262     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4263       <description>Neural Network GRU example</description>
4264       <board name="EWARM Simulator" vendor="IAR"/>
4265       <project>
4266         <environment name="iar" load="NN-example-gru.ewp"/>
4267       </project>
4268       <attributes>
4269         <component Cclass="CMSIS" Cgroup="CORE"/>
4270         <component Cclass="CMSIS" Cgroup="DSP"/>
4271         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4272         <component Cclass="Device" Cgroup="Startup"/>
4273         <category>Getting Started</category>
4274       </attributes>
4275     </example>
4276
4277     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4278       <description>CMSIS-RTOS2 Blinky example</description>
4279       <board name="uVision Simulator" vendor="Keil"/>
4280       <project>
4281         <environment name="uv" load="Blinky.uvprojx"/>
4282       </project>
4283       <attributes>
4284         <component Cclass="CMSIS" Cgroup="CORE"/>
4285         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4286         <component Cclass="Device" Cgroup="Startup"/>
4287         <category>Getting Started</category>
4288       </attributes>
4289     </example>
4290
4291     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4292       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4293       <board name="uVision Simulator" vendor="Keil"/>
4294       <project>
4295         <environment name="uv" load="Blinky.uvprojx"/>
4296       </project>
4297       <attributes>
4298         <component Cclass="CMSIS" Cgroup="CORE"/>
4299         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4300         <component Cclass="Device" Cgroup="Startup"/>
4301         <category>Getting Started</category>
4302       </attributes>
4303     </example>
4304
4305     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4306       <description>CMSIS-RTOS2 Message Queue Example</description>
4307       <board name="uVision Simulator" vendor="Keil"/>
4308       <project>
4309         <environment name="uv" load="MsqQueue.uvprojx"/>
4310       </project>
4311       <attributes>
4312         <component Cclass="CMSIS" Cgroup="CORE"/>
4313         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4314         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4315         <component Cclass="Device" Cgroup="Startup"/>
4316         <category>Getting Started</category>
4317       </attributes>
4318     </example>
4319
4320     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4321       <description>CMSIS-RTOS2 Memory Pool Example</description>
4322       <board name="uVision Simulator" vendor="Keil"/>
4323       <project>
4324         <environment name="uv" load="MemPool.uvprojx"/>
4325       </project>
4326       <attributes>
4327         <component Cclass="CMSIS" Cgroup="CORE"/>
4328         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4329         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4330         <component Cclass="Device" Cgroup="Startup"/>
4331         <category>Getting Started</category>
4332       </attributes>
4333     </example>
4334
4335     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4336       <description>Bare-metal secure/non-secure example without RTOS</description>
4337       <board name="uVision Simulator" vendor="Keil"/>
4338       <project>
4339         <environment name="uv" load="NoRTOS.uvmpw"/>
4340       </project>
4341       <attributes>
4342         <component Cclass="CMSIS" Cgroup="CORE"/>
4343         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4344         <component Cclass="Device" Cgroup="Startup"/>
4345         <category>Getting Started</category>
4346       </attributes>
4347     </example>
4348
4349     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4350       <description>Secure/non-secure RTOS example with thread context management</description>
4351       <board name="uVision Simulator" vendor="Keil"/>
4352       <project>
4353         <environment name="uv" load="RTOS.uvmpw"/>
4354       </project>
4355       <attributes>
4356         <component Cclass="CMSIS" Cgroup="CORE"/>
4357         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4358         <component Cclass="Device" Cgroup="Startup"/>
4359         <category>Getting Started</category>
4360       </attributes>
4361     </example>
4362
4363     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4364       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4365       <board name="uVision Simulator" vendor="Keil"/>
4366       <project>
4367         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4368       </project>
4369       <attributes>
4370         <component Cclass="CMSIS" Cgroup="CORE"/>
4371         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4372         <component Cclass="Device" Cgroup="Startup"/>
4373         <category>Getting Started</category>
4374       </attributes>
4375     </example>
4376
4377     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
4378       <description>CMSIS-RTOS2 Blinky example</description>
4379       <board name="EWARM Simulator" vendor="IAR"/>
4380       <project>
4381         <environment name="iar" load="Blinky/Blinky.ewp"/>
4382       </project>
4383       <attributes>
4384         <component Cclass="CMSIS" Cgroup="CORE"/>
4385         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4386         <component Cclass="Device" Cgroup="Startup"/>
4387         <category>Getting Started</category>
4388       </attributes>
4389     </example>
4390
4391     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
4392       <description>CMSIS-RTOS2 Message Queue Example</description>
4393       <board name="EWARM Simulator" vendor="IAR"/>
4394       <project>
4395         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
4396       </project>
4397       <attributes>
4398         <component Cclass="CMSIS" Cgroup="CORE"/>
4399         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4400         <component Cclass="Device" Cgroup="Startup"/>
4401         <category>Getting Started</category>
4402       </attributes>
4403     </example>
4404
4405   </examples>
4406
4407 </package>