begriffs open source - cmsis/blob - main/Core_A/html/group__CMSIS__CPSR__BITS.html

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  46    <div id="projectname">CMSIS-Core (Cortex-A)
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  55    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
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 131 <a href="#define-members">Macros</a>  </div>
 132   <div class="headertitle"><div class="title">CPSR Bits<div class="ingroups"><a class="el" href="group__CMSIS__core__register.html">Core Register Access</a> &raquo; <a class="el" href="group__CMSIS__CPSR.html">Current Program Status Register (CPSR)</a></div></div></div>
 133 </div><!--header-->
 134 <div class="contents">
 135
 136 <p>Bit position and mask macros.
 137 <a href="#details">More...</a></p>
 138 <table class="memberdecls">
 139 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
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 151 <tr class="memdesc:gab091112988009fb8360b01c79d993f67"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: Z Mask.  <br /></td></tr>
 152 <tr class="separator:gab091112988009fb8360b01c79d993f67"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 154 <tr class="memdesc:ga8565df3cf054dc09506e1c0ea4790131"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: C Position.  <br /></td></tr>
 155 <tr class="separator:ga8565df3cf054dc09506e1c0ea4790131"><td class="memSeparator" colspan="2">&#160;</td></tr>
 156 <tr class="memitem:ga3bc30b14b9b0bf113600eb882304244c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga3bc30b14b9b0bf113600eb882304244c">CPSR_C_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga8565df3cf054dc09506e1c0ea4790131">CPSR_C_Pos</a>)</td></tr>
 157 <tr class="memdesc:ga3bc30b14b9b0bf113600eb882304244c"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: C Mask.  <br /></td></tr>
 158 <tr class="separator:ga3bc30b14b9b0bf113600eb882304244c"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 160 <tr class="memdesc:ga5685fa5745113b4ff61181ee439bc2a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: V Position.  <br /></td></tr>
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 162 <tr class="memitem:ga9b9fe5c1da5e922cbff18215b70b4252"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga9b9fe5c1da5e922cbff18215b70b4252">CPSR_V_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga5685fa5745113b4ff61181ee439bc2a5">CPSR_V_Pos</a>)</td></tr>
 163 <tr class="memdesc:ga9b9fe5c1da5e922cbff18215b70b4252"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: V Mask.  <br /></td></tr>
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 169 <tr class="memdesc:gaba36b1ac0438594afdc6eef220d2e146"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: Q Mask.  <br /></td></tr>
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 184 <tr class="memdesc:ga37aa76465f6c6055395790e74169d760"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: GE Position.  <br /></td></tr>
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 187 <tr class="memdesc:ga9a3a6a87437892954cb37662ff27521a"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: GE Mask.  <br /></td></tr>
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 190 <tr class="memdesc:gaa2ab21d87052b439c06f058fb65036a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: IT1 Position.  <br /></td></tr>
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 193 <tr class="memdesc:ga791263c8a9707795b5824dae5485cd39"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: IT1 Mask.  <br /></td></tr>
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 195 <tr class="memitem:ga6a5e065d9ea93489105c3d62c1d3c08f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga6a5e065d9ea93489105c3d62c1d3c08f">CPSR_E_Pos</a>&#160;&#160;&#160;9U</td></tr>
 196 <tr class="memdesc:ga6a5e065d9ea93489105c3d62c1d3c08f"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: E Position.  <br /></td></tr>
 197 <tr class="separator:ga6a5e065d9ea93489105c3d62c1d3c08f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 198 <tr class="memitem:ga6661712dd33a50ce4a42e13bf72aa35b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga6661712dd33a50ce4a42e13bf72aa35b">CPSR_E_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga6a5e065d9ea93489105c3d62c1d3c08f">CPSR_E_Pos</a>)</td></tr>
 199 <tr class="memdesc:ga6661712dd33a50ce4a42e13bf72aa35b"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: E Mask.  <br /></td></tr>
 200 <tr class="separator:ga6661712dd33a50ce4a42e13bf72aa35b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 201 <tr class="memitem:ga6f8aa35ca07825d6b4498ae6e2ab616b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga6f8aa35ca07825d6b4498ae6e2ab616b">CPSR_A_Pos</a>&#160;&#160;&#160;8U</td></tr>
 202 <tr class="memdesc:ga6f8aa35ca07825d6b4498ae6e2ab616b"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: A Position.  <br /></td></tr>
 203 <tr class="separator:ga6f8aa35ca07825d6b4498ae6e2ab616b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 204 <tr class="memitem:ga002803fa282333e0ead5c9b4cf748cb1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga002803fa282333e0ead5c9b4cf748cb1">CPSR_A_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga6f8aa35ca07825d6b4498ae6e2ab616b">CPSR_A_Pos</a>)</td></tr>
 205 <tr class="memdesc:ga002803fa282333e0ead5c9b4cf748cb1"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: A Mask.  <br /></td></tr>
 206 <tr class="separator:ga002803fa282333e0ead5c9b4cf748cb1"><td class="memSeparator" colspan="2">&#160;</td></tr>
 207 <tr class="memitem:gad1d9be2f731f5400fc87076ce3495e59"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#gad1d9be2f731f5400fc87076ce3495e59">CPSR_I_Pos</a>&#160;&#160;&#160;7U</td></tr>
 208 <tr class="memdesc:gad1d9be2f731f5400fc87076ce3495e59"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: I Position.  <br /></td></tr>
 209 <tr class="separator:gad1d9be2f731f5400fc87076ce3495e59"><td class="memSeparator" colspan="2">&#160;</td></tr>
 210 <tr class="memitem:gad9abe93ba1179e254a70e325cb1a5834"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#gad9abe93ba1179e254a70e325cb1a5834">CPSR_I_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#gad1d9be2f731f5400fc87076ce3495e59">CPSR_I_Pos</a>)</td></tr>
 211 <tr class="memdesc:gad9abe93ba1179e254a70e325cb1a5834"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: I Mask.  <br /></td></tr>
 212 <tr class="separator:gad9abe93ba1179e254a70e325cb1a5834"><td class="memSeparator" colspan="2">&#160;</td></tr>
 213 <tr class="memitem:ga5e9868fdea8e65374b25ddd2fde1bf62"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga5e9868fdea8e65374b25ddd2fde1bf62">CPSR_F_Pos</a>&#160;&#160;&#160;6U</td></tr>
 214 <tr class="memdesc:ga5e9868fdea8e65374b25ddd2fde1bf62"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: F Position.  <br /></td></tr>
 215 <tr class="separator:ga5e9868fdea8e65374b25ddd2fde1bf62"><td class="memSeparator" colspan="2">&#160;</td></tr>
 216 <tr class="memitem:ga4df09481ffd9dfb17823a8e9895b1566"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga4df09481ffd9dfb17823a8e9895b1566">CPSR_F_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga5e9868fdea8e65374b25ddd2fde1bf62">CPSR_F_Pos</a>)</td></tr>
 217 <tr class="memdesc:ga4df09481ffd9dfb17823a8e9895b1566"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: F Mask.  <br /></td></tr>
 218 <tr class="separator:ga4df09481ffd9dfb17823a8e9895b1566"><td class="memSeparator" colspan="2">&#160;</td></tr>
 219 <tr class="memitem:gaa1134ff3e774b1354a43227b798a707c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#gaa1134ff3e774b1354a43227b798a707c">CPSR_T_Pos</a>&#160;&#160;&#160;5U</td></tr>
 220 <tr class="memdesc:gaa1134ff3e774b1354a43227b798a707c"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: T Position.  <br /></td></tr>
 221 <tr class="separator:gaa1134ff3e774b1354a43227b798a707c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 222 <tr class="memitem:ga23ed422711cbd2f9a5dcbe6c05b2a720"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga23ed422711cbd2f9a5dcbe6c05b2a720">CPSR_T_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#gaa1134ff3e774b1354a43227b798a707c">CPSR_T_Pos</a>)</td></tr>
 223 <tr class="memdesc:ga23ed422711cbd2f9a5dcbe6c05b2a720"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: T Mask.  <br /></td></tr>
 224 <tr class="separator:ga23ed422711cbd2f9a5dcbe6c05b2a720"><td class="memSeparator" colspan="2">&#160;</td></tr>
 225 <tr class="memitem:ga4e9e49c9a75cf3e7d696fc77de7d44d1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#ga4e9e49c9a75cf3e7d696fc77de7d44d1">CPSR_M_Pos</a>&#160;&#160;&#160;0U</td></tr>
 226 <tr class="memdesc:ga4e9e49c9a75cf3e7d696fc77de7d44d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: M Position.  <br /></td></tr>
 227 <tr class="separator:ga4e9e49c9a75cf3e7d696fc77de7d44d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
 228 <tr class="memitem:gadce47959b814f70f802a139250daa04c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPSR__BITS.html#gadce47959b814f70f802a139250daa04c">CPSR_M_Msk</a>&#160;&#160;&#160;(0x1FUL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga4e9e49c9a75cf3e7d696fc77de7d44d1">CPSR_M_Pos</a>)</td></tr>
 229 <tr class="memdesc:gadce47959b814f70f802a139250daa04c"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPSR: M Mask.  <br /></td></tr>
 230 <tr class="separator:gadce47959b814f70f802a139250daa04c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 231 </table>
 232 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 233 <p>Bit position and mask macros. </p>
 234 <h2 class="groupheader">Macro Definition Documentation</h2>
 235 <a id="ga002803fa282333e0ead5c9b4cf748cb1" name="ga002803fa282333e0ead5c9b4cf748cb1"></a>
 236 <h2 class="memtitle"><span class="permalink"><a href="#ga002803fa282333e0ead5c9b4cf748cb1">&#9670;&#160;</a></span>CPSR_A_Msk</h2>
 237
 238 <div class="memitem">
 239 <div class="memproto">
 240       <table class="memname">
 241         <tr>
 242           <td class="memname">#define CPSR_A_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga6f8aa35ca07825d6b4498ae6e2ab616b">CPSR_A_Pos</a>)</td>
 243         </tr>
 244       </table>
 245 </div><div class="memdoc">
 246
 247 <p>CPSR: A Mask. </p>
 248
 249 </div>
 250 </div>
 251 <a id="ga6f8aa35ca07825d6b4498ae6e2ab616b" name="ga6f8aa35ca07825d6b4498ae6e2ab616b"></a>
 252 <h2 class="memtitle"><span class="permalink"><a href="#ga6f8aa35ca07825d6b4498ae6e2ab616b">&#9670;&#160;</a></span>CPSR_A_Pos</h2>
 253
 254 <div class="memitem">
 255 <div class="memproto">
 256       <table class="memname">
 257         <tr>
 258           <td class="memname">#define CPSR_A_Pos&#160;&#160;&#160;8U</td>
 259         </tr>
 260       </table>
 261 </div><div class="memdoc">
 262
 263 <p>CPSR: A Position. </p>
 264
 265 </div>
 266 </div>
 267 <a id="ga3bc30b14b9b0bf113600eb882304244c" name="ga3bc30b14b9b0bf113600eb882304244c"></a>
 268 <h2 class="memtitle"><span class="permalink"><a href="#ga3bc30b14b9b0bf113600eb882304244c">&#9670;&#160;</a></span>CPSR_C_Msk</h2>
 269
 270 <div class="memitem">
 271 <div class="memproto">
 272       <table class="memname">
 273         <tr>
 274           <td class="memname">#define CPSR_C_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga8565df3cf054dc09506e1c0ea4790131">CPSR_C_Pos</a>)</td>
 275         </tr>
 276       </table>
 277 </div><div class="memdoc">
 278
 279 <p>CPSR: C Mask. </p>
 280
 281 </div>
 282 </div>
 283 <a id="ga8565df3cf054dc09506e1c0ea4790131" name="ga8565df3cf054dc09506e1c0ea4790131"></a>
 284 <h2 class="memtitle"><span class="permalink"><a href="#ga8565df3cf054dc09506e1c0ea4790131">&#9670;&#160;</a></span>CPSR_C_Pos</h2>
 285
 286 <div class="memitem">
 287 <div class="memproto">
 288       <table class="memname">
 289         <tr>
 290           <td class="memname">#define CPSR_C_Pos&#160;&#160;&#160;29U</td>
 291         </tr>
 292       </table>
 293 </div><div class="memdoc">
 294
 295 <p>CPSR: C Position. </p>
 296
 297 </div>
 298 </div>
 299 <a id="ga6661712dd33a50ce4a42e13bf72aa35b" name="ga6661712dd33a50ce4a42e13bf72aa35b"></a>
 300 <h2 class="memtitle"><span class="permalink"><a href="#ga6661712dd33a50ce4a42e13bf72aa35b">&#9670;&#160;</a></span>CPSR_E_Msk</h2>
 301
 302 <div class="memitem">
 303 <div class="memproto">
 304       <table class="memname">
 305         <tr>
 306           <td class="memname">#define CPSR_E_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga6a5e065d9ea93489105c3d62c1d3c08f">CPSR_E_Pos</a>)</td>
 307         </tr>
 308       </table>
 309 </div><div class="memdoc">
 310
 311 <p>CPSR: E Mask. </p>
 312
 313 </div>
 314 </div>
 315 <a id="ga6a5e065d9ea93489105c3d62c1d3c08f" name="ga6a5e065d9ea93489105c3d62c1d3c08f"></a>
 316 <h2 class="memtitle"><span class="permalink"><a href="#ga6a5e065d9ea93489105c3d62c1d3c08f">&#9670;&#160;</a></span>CPSR_E_Pos</h2>
 317
 318 <div class="memitem">
 319 <div class="memproto">
 320       <table class="memname">
 321         <tr>
 322           <td class="memname">#define CPSR_E_Pos&#160;&#160;&#160;9U</td>
 323         </tr>
 324       </table>
 325 </div><div class="memdoc">
 326
 327 <p>CPSR: E Position. </p>
 328
 329 </div>
 330 </div>
 331 <a id="ga4df09481ffd9dfb17823a8e9895b1566" name="ga4df09481ffd9dfb17823a8e9895b1566"></a>
 332 <h2 class="memtitle"><span class="permalink"><a href="#ga4df09481ffd9dfb17823a8e9895b1566">&#9670;&#160;</a></span>CPSR_F_Msk</h2>
 333
 334 <div class="memitem">
 335 <div class="memproto">
 336       <table class="memname">
 337         <tr>
 338           <td class="memname">#define CPSR_F_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga5e9868fdea8e65374b25ddd2fde1bf62">CPSR_F_Pos</a>)</td>
 339         </tr>
 340       </table>
 341 </div><div class="memdoc">
 342
 343 <p>CPSR: F Mask. </p>
 344
 345 </div>
 346 </div>
 347 <a id="ga5e9868fdea8e65374b25ddd2fde1bf62" name="ga5e9868fdea8e65374b25ddd2fde1bf62"></a>
 348 <h2 class="memtitle"><span class="permalink"><a href="#ga5e9868fdea8e65374b25ddd2fde1bf62">&#9670;&#160;</a></span>CPSR_F_Pos</h2>
 349
 350 <div class="memitem">
 351 <div class="memproto">
 352       <table class="memname">
 353         <tr>
 354           <td class="memname">#define CPSR_F_Pos&#160;&#160;&#160;6U</td>
 355         </tr>
 356       </table>
 357 </div><div class="memdoc">
 358
 359 <p>CPSR: F Position. </p>
 360
 361 </div>
 362 </div>
 363 <a id="ga9a3a6a87437892954cb37662ff27521a" name="ga9a3a6a87437892954cb37662ff27521a"></a>
 364 <h2 class="memtitle"><span class="permalink"><a href="#ga9a3a6a87437892954cb37662ff27521a">&#9670;&#160;</a></span>CPSR_GE_Msk</h2>
 365
 366 <div class="memitem">
 367 <div class="memproto">
 368       <table class="memname">
 369         <tr>
 370           <td class="memname">#define CPSR_GE_Msk&#160;&#160;&#160;(0xFUL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga37aa76465f6c6055395790e74169d760">CPSR_GE_Pos</a>)</td>
 371         </tr>
 372       </table>
 373 </div><div class="memdoc">
 374
 375 <p>CPSR: GE Mask. </p>
 376
 377 </div>
 378 </div>
 379 <a id="ga37aa76465f6c6055395790e74169d760" name="ga37aa76465f6c6055395790e74169d760"></a>
 380 <h2 class="memtitle"><span class="permalink"><a href="#ga37aa76465f6c6055395790e74169d760">&#9670;&#160;</a></span>CPSR_GE_Pos</h2>
 381
 382 <div class="memitem">
 383 <div class="memproto">
 384       <table class="memname">
 385         <tr>
 386           <td class="memname">#define CPSR_GE_Pos&#160;&#160;&#160;16U</td>
 387         </tr>
 388       </table>
 389 </div><div class="memdoc">
 390
 391 <p>CPSR: GE Position. </p>
 392
 393 </div>
 394 </div>
 395 <a id="gad9abe93ba1179e254a70e325cb1a5834" name="gad9abe93ba1179e254a70e325cb1a5834"></a>
 396 <h2 class="memtitle"><span class="permalink"><a href="#gad9abe93ba1179e254a70e325cb1a5834">&#9670;&#160;</a></span>CPSR_I_Msk</h2>
 397
 398 <div class="memitem">
 399 <div class="memproto">
 400       <table class="memname">
 401         <tr>
 402           <td class="memname">#define CPSR_I_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#gad1d9be2f731f5400fc87076ce3495e59">CPSR_I_Pos</a>)</td>
 403         </tr>
 404       </table>
 405 </div><div class="memdoc">
 406
 407 <p>CPSR: I Mask. </p>
 408
 409 </div>
 410 </div>
 411 <a id="gad1d9be2f731f5400fc87076ce3495e59" name="gad1d9be2f731f5400fc87076ce3495e59"></a>
 412 <h2 class="memtitle"><span class="permalink"><a href="#gad1d9be2f731f5400fc87076ce3495e59">&#9670;&#160;</a></span>CPSR_I_Pos</h2>
 413
 414 <div class="memitem">
 415 <div class="memproto">
 416       <table class="memname">
 417         <tr>
 418           <td class="memname">#define CPSR_I_Pos&#160;&#160;&#160;7U</td>
 419         </tr>
 420       </table>
 421 </div><div class="memdoc">
 422
 423 <p>CPSR: I Position. </p>
 424
 425 </div>
 426 </div>
 427 <a id="ga128366788d0f94d52fbe4610162c97e5" name="ga128366788d0f94d52fbe4610162c97e5"></a>
 428 <h2 class="memtitle"><span class="permalink"><a href="#ga128366788d0f94d52fbe4610162c97e5">&#9670;&#160;</a></span>CPSR_IT0_Msk</h2>
 429
 430 <div class="memitem">
 431 <div class="memproto">
 432       <table class="memname">
 433         <tr>
 434           <td class="memname">#define CPSR_IT0_Msk&#160;&#160;&#160;(3UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga450f3fff0642431fd3478a04b70c3d87">CPSR_IT0_Pos</a>)</td>
 435         </tr>
 436       </table>
 437 </div><div class="memdoc">
 438
 439 <p>CPSR: IT0 Mask. </p>
 440
 441 </div>
 442 </div>
 443 <a id="ga450f3fff0642431fd3478a04b70c3d87" name="ga450f3fff0642431fd3478a04b70c3d87"></a>
 444 <h2 class="memtitle"><span class="permalink"><a href="#ga450f3fff0642431fd3478a04b70c3d87">&#9670;&#160;</a></span>CPSR_IT0_Pos</h2>
 445
 446 <div class="memitem">
 447 <div class="memproto">
 448       <table class="memname">
 449         <tr>
 450           <td class="memname">#define CPSR_IT0_Pos&#160;&#160;&#160;25U</td>
 451         </tr>
 452       </table>
 453 </div><div class="memdoc">
 454
 455 <p>CPSR: IT0 Position. </p>
 456
 457 </div>
 458 </div>
 459 <a id="ga791263c8a9707795b5824dae5485cd39" name="ga791263c8a9707795b5824dae5485cd39"></a>
 460 <h2 class="memtitle"><span class="permalink"><a href="#ga791263c8a9707795b5824dae5485cd39">&#9670;&#160;</a></span>CPSR_IT1_Msk</h2>
 461
 462 <div class="memitem">
 463 <div class="memproto">
 464       <table class="memname">
 465         <tr>
 466           <td class="memname">#define CPSR_IT1_Msk&#160;&#160;&#160;(0x3FUL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#gaa2ab21d87052b439c06f058fb65036a5">CPSR_IT1_Pos</a>)</td>
 467         </tr>
 468       </table>
 469 </div><div class="memdoc">
 470
 471 <p>CPSR: IT1 Mask. </p>
 472
 473 </div>
 474 </div>
 475 <a id="gaa2ab21d87052b439c06f058fb65036a5" name="gaa2ab21d87052b439c06f058fb65036a5"></a>
 476 <h2 class="memtitle"><span class="permalink"><a href="#gaa2ab21d87052b439c06f058fb65036a5">&#9670;&#160;</a></span>CPSR_IT1_Pos</h2>
 477
 478 <div class="memitem">
 479 <div class="memproto">
 480       <table class="memname">
 481         <tr>
 482           <td class="memname">#define CPSR_IT1_Pos&#160;&#160;&#160;10U</td>
 483         </tr>
 484       </table>
 485 </div><div class="memdoc">
 486
 487 <p>CPSR: IT1 Position. </p>
 488
 489 </div>
 490 </div>
 491 <a id="ga6b52a05ec2e95ade71b65090f19285c2" name="ga6b52a05ec2e95ade71b65090f19285c2"></a>
 492 <h2 class="memtitle"><span class="permalink"><a href="#ga6b52a05ec2e95ade71b65090f19285c2">&#9670;&#160;</a></span>CPSR_J_Msk</h2>
 493
 494 <div class="memitem">
 495 <div class="memproto">
 496       <table class="memname">
 497         <tr>
 498           <td class="memname">#define CPSR_J_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga6b49ddfb770143a51aa682b56be2e990">CPSR_J_Pos</a>)</td>
 499         </tr>
 500       </table>
 501 </div><div class="memdoc">
 502
 503 <p>CPSR: J Mask. </p>
 504
 505 </div>
 506 </div>
 507 <a id="ga6b49ddfb770143a51aa682b56be2e990" name="ga6b49ddfb770143a51aa682b56be2e990"></a>
 508 <h2 class="memtitle"><span class="permalink"><a href="#ga6b49ddfb770143a51aa682b56be2e990">&#9670;&#160;</a></span>CPSR_J_Pos</h2>
 509
 510 <div class="memitem">
 511 <div class="memproto">
 512       <table class="memname">
 513         <tr>
 514           <td class="memname">#define CPSR_J_Pos&#160;&#160;&#160;24U</td>
 515         </tr>
 516       </table>
 517 </div><div class="memdoc">
 518
 519 <p>CPSR: J Position. </p>
 520
 521 </div>
 522 </div>
 523 <a id="gadce47959b814f70f802a139250daa04c" name="gadce47959b814f70f802a139250daa04c"></a>
 524 <h2 class="memtitle"><span class="permalink"><a href="#gadce47959b814f70f802a139250daa04c">&#9670;&#160;</a></span>CPSR_M_Msk</h2>
 525
 526 <div class="memitem">
 527 <div class="memproto">
 528       <table class="memname">
 529         <tr>
 530           <td class="memname">#define CPSR_M_Msk&#160;&#160;&#160;(0x1FUL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga4e9e49c9a75cf3e7d696fc77de7d44d1">CPSR_M_Pos</a>)</td>
 531         </tr>
 532       </table>
 533 </div><div class="memdoc">
 534
 535 <p>CPSR: M Mask. </p>
 536
 537 </div>
 538 </div>
 539 <a id="ga4e9e49c9a75cf3e7d696fc77de7d44d1" name="ga4e9e49c9a75cf3e7d696fc77de7d44d1"></a>
 540 <h2 class="memtitle"><span class="permalink"><a href="#ga4e9e49c9a75cf3e7d696fc77de7d44d1">&#9670;&#160;</a></span>CPSR_M_Pos</h2>
 541
 542 <div class="memitem">
 543 <div class="memproto">
 544       <table class="memname">
 545         <tr>
 546           <td class="memname">#define CPSR_M_Pos&#160;&#160;&#160;0U</td>
 547         </tr>
 548       </table>
 549 </div><div class="memdoc">
 550
 551 <p>CPSR: M Position. </p>
 552
 553 </div>
 554 </div>
 555 <a id="ga6c4a636a3b5ec71e0f2eb021ac353544" name="ga6c4a636a3b5ec71e0f2eb021ac353544"></a>
 556 <h2 class="memtitle"><span class="permalink"><a href="#ga6c4a636a3b5ec71e0f2eb021ac353544">&#9670;&#160;</a></span>CPSR_N_Msk</h2>
 557
 558 <div class="memitem">
 559 <div class="memproto">
 560       <table class="memname">
 561         <tr>
 562           <td class="memname">#define CPSR_N_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#gaaedc00ebe496885524daac4190742f84">CPSR_N_Pos</a>)</td>
 563         </tr>
 564       </table>
 565 </div><div class="memdoc">
 566
 567 <p>CPSR: N Mask. </p>
 568
 569 </div>
 570 </div>
 571 <a id="gaaedc00ebe496885524daac4190742f84" name="gaaedc00ebe496885524daac4190742f84"></a>
 572 <h2 class="memtitle"><span class="permalink"><a href="#gaaedc00ebe496885524daac4190742f84">&#9670;&#160;</a></span>CPSR_N_Pos</h2>
 573
 574 <div class="memitem">
 575 <div class="memproto">
 576       <table class="memname">
 577         <tr>
 578           <td class="memname">#define CPSR_N_Pos&#160;&#160;&#160;31U</td>
 579         </tr>
 580       </table>
 581 </div><div class="memdoc">
 582
 583 <p>CPSR: N Position. </p>
 584
 585 </div>
 586 </div>
 587 <a id="gaba36b1ac0438594afdc6eef220d2e146" name="gaba36b1ac0438594afdc6eef220d2e146"></a>
 588 <h2 class="memtitle"><span class="permalink"><a href="#gaba36b1ac0438594afdc6eef220d2e146">&#9670;&#160;</a></span>CPSR_Q_Msk</h2>
 589
 590 <div class="memitem">
 591 <div class="memproto">
 592       <table class="memname">
 593         <tr>
 594           <td class="memname">#define CPSR_Q_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga84c8427c30fdce15f7191bd4f93d7ab7">CPSR_Q_Pos</a>)</td>
 595         </tr>
 596       </table>
 597 </div><div class="memdoc">
 598
 599 <p>CPSR: Q Mask. </p>
 600
 601 </div>
 602 </div>
 603 <a id="ga84c8427c30fdce15f7191bd4f93d7ab7" name="ga84c8427c30fdce15f7191bd4f93d7ab7"></a>
 604 <h2 class="memtitle"><span class="permalink"><a href="#ga84c8427c30fdce15f7191bd4f93d7ab7">&#9670;&#160;</a></span>CPSR_Q_Pos</h2>
 605
 606 <div class="memitem">
 607 <div class="memproto">
 608       <table class="memname">
 609         <tr>
 610           <td class="memname">#define CPSR_Q_Pos&#160;&#160;&#160;27U</td>
 611         </tr>
 612       </table>
 613 </div><div class="memdoc">
 614
 615 <p>CPSR: Q Position. </p>
 616
 617 </div>
 618 </div>
 619 <a id="ga23ed422711cbd2f9a5dcbe6c05b2a720" name="ga23ed422711cbd2f9a5dcbe6c05b2a720"></a>
 620 <h2 class="memtitle"><span class="permalink"><a href="#ga23ed422711cbd2f9a5dcbe6c05b2a720">&#9670;&#160;</a></span>CPSR_T_Msk</h2>
 621
 622 <div class="memitem">
 623 <div class="memproto">
 624       <table class="memname">
 625         <tr>
 626           <td class="memname">#define CPSR_T_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#gaa1134ff3e774b1354a43227b798a707c">CPSR_T_Pos</a>)</td>
 627         </tr>
 628       </table>
 629 </div><div class="memdoc">
 630
 631 <p>CPSR: T Mask. </p>
 632
 633 </div>
 634 </div>
 635 <a id="gaa1134ff3e774b1354a43227b798a707c" name="gaa1134ff3e774b1354a43227b798a707c"></a>
 636 <h2 class="memtitle"><span class="permalink"><a href="#gaa1134ff3e774b1354a43227b798a707c">&#9670;&#160;</a></span>CPSR_T_Pos</h2>
 637
 638 <div class="memitem">
 639 <div class="memproto">
 640       <table class="memname">
 641         <tr>
 642           <td class="memname">#define CPSR_T_Pos&#160;&#160;&#160;5U</td>
 643         </tr>
 644       </table>
 645 </div><div class="memdoc">
 646
 647 <p>CPSR: T Position. </p>
 648
 649 </div>
 650 </div>
 651 <a id="ga9b9fe5c1da5e922cbff18215b70b4252" name="ga9b9fe5c1da5e922cbff18215b70b4252"></a>
 652 <h2 class="memtitle"><span class="permalink"><a href="#ga9b9fe5c1da5e922cbff18215b70b4252">&#9670;&#160;</a></span>CPSR_V_Msk</h2>
 653
 654 <div class="memitem">
 655 <div class="memproto">
 656       <table class="memname">
 657         <tr>
 658           <td class="memname">#define CPSR_V_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga5685fa5745113b4ff61181ee439bc2a5">CPSR_V_Pos</a>)</td>
 659         </tr>
 660       </table>
 661 </div><div class="memdoc">
 662
 663 <p>CPSR: V Mask. </p>
 664
 665 </div>
 666 </div>
 667 <a id="ga5685fa5745113b4ff61181ee439bc2a5" name="ga5685fa5745113b4ff61181ee439bc2a5"></a>
 668 <h2 class="memtitle"><span class="permalink"><a href="#ga5685fa5745113b4ff61181ee439bc2a5">&#9670;&#160;</a></span>CPSR_V_Pos</h2>
 669
 670 <div class="memitem">
 671 <div class="memproto">
 672       <table class="memname">
 673         <tr>
 674           <td class="memname">#define CPSR_V_Pos&#160;&#160;&#160;28U</td>
 675         </tr>
 676       </table>
 677 </div><div class="memdoc">
 678
 679 <p>CPSR: V Position. </p>
 680
 681 </div>
 682 </div>
 683 <a id="gab091112988009fb8360b01c79d993f67" name="gab091112988009fb8360b01c79d993f67"></a>
 684 <h2 class="memtitle"><span class="permalink"><a href="#gab091112988009fb8360b01c79d993f67">&#9670;&#160;</a></span>CPSR_Z_Msk</h2>
 685
 686 <div class="memitem">
 687 <div class="memproto">
 688       <table class="memname">
 689         <tr>
 690           <td class="memname">#define CPSR_Z_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPSR__BITS.html#ga18e9f21fcda9d385d23a4de0ef860cd4">CPSR_Z_Pos</a>)</td>
 691         </tr>
 692       </table>
 693 </div><div class="memdoc">
 694
 695 <p>CPSR: Z Mask. </p>
 696
 697 </div>
 698 </div>
 699 <a id="ga18e9f21fcda9d385d23a4de0ef860cd4" name="ga18e9f21fcda9d385d23a4de0ef860cd4"></a>
 700 <h2 class="memtitle"><span class="permalink"><a href="#ga18e9f21fcda9d385d23a4de0ef860cd4">&#9670;&#160;</a></span>CPSR_Z_Pos</h2>
 701
 702 <div class="memitem">
 703 <div class="memproto">
 704       <table class="memname">
 705         <tr>
 706           <td class="memname">#define CPSR_Z_Pos&#160;&#160;&#160;30U</td>
 707         </tr>
 708       </table>
 709 </div><div class="memdoc">
 710
 711 <p>CPSR: Z Position. </p>
 712
 713 </div>
 714 </div>
 715 </div><!-- contents -->
 716 </div><!-- doc-content -->
 717 <!-- start footer part -->
 718 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
 719   <ul>
 720     <li class="footer">
 721       <script type="text/javascript">
 722         <!--
 723         writeFooter.call(this);
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 725       </script>
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