begriffs open source - cmsis/blob - dev/v6.0.0-dev84/Core_A/group__CMSIS__DFSR__BITS.html

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  43    <div id="projectname">CMSIS-Core (Cortex-A)
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  52    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
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 126 <div class="header">
 127   <div class="summary">
 128 <a href="#define-members">Macros</a>  </div>
 129   <div class="headertitle"><div class="title">ACTLR Bits<div class="ingroups"><a class="el" href="group__CMSIS__core__register.html">Core Register Access</a> &raquo; <a class="el" href="group__CMSIS__DFSR.html">Data Fault Status Register (DFSR)</a></div></div></div>
 130 </div><!--header-->
 131 <div class="contents">
 132
 133 <p>Bit position and mask macros.
 134 <a href="#details">More...</a></p>
 135 <table class="memberdecls">
 136 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
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 158 <tr class="separator:ga10f7b48c4f128c9be07c377bb60cfa7a"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 181 <tr class="memdesc:gacb6fae1908b12c4900e2cdcc320c6c11"><td class="mdescLeft">&#160;</td><td class="mdescRight">DFSR: STATUS Position.  <br /></td></tr>
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 184 <tr class="memdesc:ga7541052737038d737fd9fe00b9815140"><td class="mdescLeft">&#160;</td><td class="mdescRight">DFSR: STATUS Mask.  <br /></td></tr>
 185 <tr class="separator:ga7541052737038d737fd9fe00b9815140"><td class="memSeparator" colspan="2">&#160;</td></tr>
 186 </table>
 187 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 188 <p>Bit position and mask macros. </p>
 189 <h2 class="groupheader">Macro Definition Documentation</h2>
 190 <a id="ga91cf285dc43beda62ae72f043e83238c" name="ga91cf285dc43beda62ae72f043e83238c"></a>
 191 <h2 class="memtitle"><span class="permalink"><a href="#ga91cf285dc43beda62ae72f043e83238c">&#9670;&#160;</a></span>DFSR_CM_Msk</h2>
 192
 193 <div class="memitem">
 194 <div class="memproto">
 195       <table class="memname">
 196         <tr>
 197           <td class="memname">#define DFSR_CM_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__DFSR__BITS.html#gac1c7d8f30e77bd1fe395d6e9a5a63a3e">DFSR_CM_Pos</a>)</td>
 198         </tr>
 199       </table>
 200 </div><div class="memdoc">
 201
 202 <p>DFSR: CM Mask. </p>
 203
 204 </div>
 205 </div>
 206 <a id="gac1c7d8f30e77bd1fe395d6e9a5a63a3e" name="gac1c7d8f30e77bd1fe395d6e9a5a63a3e"></a>
 207 <h2 class="memtitle"><span class="permalink"><a href="#gac1c7d8f30e77bd1fe395d6e9a5a63a3e">&#9670;&#160;</a></span>DFSR_CM_Pos</h2>
 208
 209 <div class="memitem">
 210 <div class="memproto">
 211       <table class="memname">
 212         <tr>
 213           <td class="memname">#define DFSR_CM_Pos&#160;&#160;&#160;13U</td>
 214         </tr>
 215       </table>
 216 </div><div class="memdoc">
 217
 218 <p>DFSR: CM Position. </p>
 219
 220 </div>
 221 </div>
 222 <a id="ga59949776e069a5af7231ef63156f17cf" name="ga59949776e069a5af7231ef63156f17cf"></a>
 223 <h2 class="memtitle"><span class="permalink"><a href="#ga59949776e069a5af7231ef63156f17cf">&#9670;&#160;</a></span>DFSR_Domain_Msk</h2>
 224
 225 <div class="memitem">
 226 <div class="memproto">
 227       <table class="memname">
 228         <tr>
 229           <td class="memname">#define DFSR_Domain_Msk&#160;&#160;&#160;(0xFUL &lt;&lt; <a class="el" href="group__CMSIS__DFSR__BITS.html#gac5a7afc43963dbc429792fb5a1569e15">DFSR_Domain_Pos</a>)</td>
 230         </tr>
 231       </table>
 232 </div><div class="memdoc">
 233
 234 <p>DFSR: Domain Mask. </p>
 235
 236 </div>
 237 </div>
 238 <a id="gac5a7afc43963dbc429792fb5a1569e15" name="gac5a7afc43963dbc429792fb5a1569e15"></a>
 239 <h2 class="memtitle"><span class="permalink"><a href="#gac5a7afc43963dbc429792fb5a1569e15">&#9670;&#160;</a></span>DFSR_Domain_Pos</h2>
 240
 241 <div class="memitem">
 242 <div class="memproto">
 243       <table class="memname">
 244         <tr>
 245           <td class="memname">#define DFSR_Domain_Pos&#160;&#160;&#160;4U</td>
 246         </tr>
 247       </table>
 248 </div><div class="memdoc">
 249
 250 <p>DFSR: Domain Position. </p>
 251
 252 </div>
 253 </div>
 254 <a id="gad3a97b4eb87f45df8ae539e59592f21b" name="gad3a97b4eb87f45df8ae539e59592f21b"></a>
 255 <h2 class="memtitle"><span class="permalink"><a href="#gad3a97b4eb87f45df8ae539e59592f21b">&#9670;&#160;</a></span>DFSR_Ext_Msk</h2>
 256
 257 <div class="memitem">
 258 <div class="memproto">
 259       <table class="memname">
 260         <tr>
 261           <td class="memname">#define DFSR_Ext_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__DFSR__BITS.html#ga8cc8dcb1b3a971a13b0575bf9083acf5">DFSR_Ext_Pos</a>)</td>
 262         </tr>
 263       </table>
 264 </div><div class="memdoc">
 265
 266 <p>DFSR: Ext Mask. </p>
 267
 268 </div>
 269 </div>
 270 <a id="ga8cc8dcb1b3a971a13b0575bf9083acf5" name="ga8cc8dcb1b3a971a13b0575bf9083acf5"></a>
 271 <h2 class="memtitle"><span class="permalink"><a href="#ga8cc8dcb1b3a971a13b0575bf9083acf5">&#9670;&#160;</a></span>DFSR_Ext_Pos</h2>
 272
 273 <div class="memitem">
 274 <div class="memproto">
 275       <table class="memname">
 276         <tr>
 277           <td class="memname">#define DFSR_Ext_Pos&#160;&#160;&#160;12U</td>
 278         </tr>
 279       </table>
 280 </div><div class="memdoc">
 281
 282 <p>DFSR: Ext Position. </p>
 283
 284 </div>
 285 </div>
 286 <a id="ga23b688e81c0378b5cd75acb53896bb5e" name="ga23b688e81c0378b5cd75acb53896bb5e"></a>
 287 <h2 class="memtitle"><span class="permalink"><a href="#ga23b688e81c0378b5cd75acb53896bb5e">&#9670;&#160;</a></span>DFSR_FS0_Msk</h2>
 288
 289 <div class="memitem">
 290 <div class="memproto">
 291       <table class="memname">
 292         <tr>
 293           <td class="memname">#define DFSR_FS0_Msk&#160;&#160;&#160;(0xFUL &lt;&lt; <a class="el" href="group__CMSIS__DFSR__BITS.html#gae5d9bc62e71693bd9dc2a84bb4c82082">DFSR_FS0_Pos</a>)</td>
 294         </tr>
 295       </table>
 296 </div><div class="memdoc">
 297
 298 <p>DFSR: FS0 Mask. </p>
 299
 300 </div>
 301 </div>
 302 <a id="gae5d9bc62e71693bd9dc2a84bb4c82082" name="gae5d9bc62e71693bd9dc2a84bb4c82082"></a>
 303 <h2 class="memtitle"><span class="permalink"><a href="#gae5d9bc62e71693bd9dc2a84bb4c82082">&#9670;&#160;</a></span>DFSR_FS0_Pos</h2>
 304
 305 <div class="memitem">
 306 <div class="memproto">
 307       <table class="memname">
 308         <tr>
 309           <td class="memname">#define DFSR_FS0_Pos&#160;&#160;&#160;0U</td>
 310         </tr>
 311       </table>
 312 </div><div class="memdoc">
 313
 314 <p>DFSR: FS0 Position. </p>
 315
 316 </div>
 317 </div>
 318 <a id="ga6540a3ca5b2dcf8f81bb37fbdbe9d746" name="ga6540a3ca5b2dcf8f81bb37fbdbe9d746"></a>
 319 <h2 class="memtitle"><span class="permalink"><a href="#ga6540a3ca5b2dcf8f81bb37fbdbe9d746">&#9670;&#160;</a></span>DFSR_FS1_Msk</h2>
 320
 321 <div class="memitem">
 322 <div class="memproto">
 323       <table class="memname">
 324         <tr>
 325           <td class="memname">#define DFSR_FS1_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__DFSR__BITS.html#ga3faee10970931cadf7ff16069ce65a1a">DFSR_FS1_Pos</a>)</td>
 326         </tr>
 327       </table>
 328 </div><div class="memdoc">
 329
 330 <p>DFSR: FS1 Mask. </p>
 331
 332 </div>
 333 </div>
 334 <a id="ga3faee10970931cadf7ff16069ce65a1a" name="ga3faee10970931cadf7ff16069ce65a1a"></a>
 335 <h2 class="memtitle"><span class="permalink"><a href="#ga3faee10970931cadf7ff16069ce65a1a">&#9670;&#160;</a></span>DFSR_FS1_Pos</h2>
 336
 337 <div class="memitem">
 338 <div class="memproto">
 339       <table class="memname">
 340         <tr>
 341           <td class="memname">#define DFSR_FS1_Pos&#160;&#160;&#160;10U</td>
 342         </tr>
 343       </table>
 344 </div><div class="memdoc">
 345
 346 <p>DFSR: FS1 Position. </p>
 347
 348 </div>
 349 </div>
 350 <a id="ga104bfa1e333340616fdbdc804948276f" name="ga104bfa1e333340616fdbdc804948276f"></a>
 351 <h2 class="memtitle"><span class="permalink"><a href="#ga104bfa1e333340616fdbdc804948276f">&#9670;&#160;</a></span>DFSR_LPAE_Msk</h2>
 352
 353 <div class="memitem">
 354 <div class="memproto">
 355       <table class="memname">
 356         <tr>
 357           <td class="memname">#define DFSR_LPAE_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__DFSR__BITS.html#ga10f7b48c4f128c9be07c377bb60cfa7a">DFSR_LPAE_Pos</a>)</td>
 358         </tr>
 359       </table>
 360 </div><div class="memdoc">
 361
 362 <p>DFSR: LPAE Mask. </p>
 363
 364 </div>
 365 </div>
 366 <a id="ga10f7b48c4f128c9be07c377bb60cfa7a" name="ga10f7b48c4f128c9be07c377bb60cfa7a"></a>
 367 <h2 class="memtitle"><span class="permalink"><a href="#ga10f7b48c4f128c9be07c377bb60cfa7a">&#9670;&#160;</a></span>DFSR_LPAE_Pos</h2>
 368
 369 <div class="memitem">
 370 <div class="memproto">
 371       <table class="memname">
 372         <tr>
 373           <td class="memname">#define DFSR_LPAE_Pos&#160;&#160;&#160;9U</td>
 374         </tr>
 375       </table>
 376 </div><div class="memdoc">
 377
 378 <p>DFSR: LPAE Position. </p>
 379
 380 </div>
 381 </div>
 382 <a id="ga7541052737038d737fd9fe00b9815140" name="ga7541052737038d737fd9fe00b9815140"></a>
 383 <h2 class="memtitle"><span class="permalink"><a href="#ga7541052737038d737fd9fe00b9815140">&#9670;&#160;</a></span>DFSR_STATUS_Msk</h2>
 384
 385 <div class="memitem">
 386 <div class="memproto">
 387       <table class="memname">
 388         <tr>
 389           <td class="memname">#define DFSR_STATUS_Msk&#160;&#160;&#160;(0x3FUL &lt;&lt; <a class="el" href="group__CMSIS__DFSR__BITS.html#gacb6fae1908b12c4900e2cdcc320c6c11">DFSR_STATUS_Pos</a>)</td>
 390         </tr>
 391       </table>
 392 </div><div class="memdoc">
 393
 394 <p>DFSR: STATUS Mask. </p>
 395
 396 </div>
 397 </div>
 398 <a id="gacb6fae1908b12c4900e2cdcc320c6c11" name="gacb6fae1908b12c4900e2cdcc320c6c11"></a>
 399 <h2 class="memtitle"><span class="permalink"><a href="#gacb6fae1908b12c4900e2cdcc320c6c11">&#9670;&#160;</a></span>DFSR_STATUS_Pos</h2>
 400
 401 <div class="memitem">
 402 <div class="memproto">
 403       <table class="memname">
 404         <tr>
 405           <td class="memname">#define DFSR_STATUS_Pos&#160;&#160;&#160;0U</td>
 406         </tr>
 407       </table>
 408 </div><div class="memdoc">
 409
 410 <p>DFSR: STATUS Position. </p>
 411
 412 </div>
 413 </div>
 414 <a id="gabfbf482895e7620fe6727b54378c0f2a" name="gabfbf482895e7620fe6727b54378c0f2a"></a>
 415 <h2 class="memtitle"><span class="permalink"><a href="#gabfbf482895e7620fe6727b54378c0f2a">&#9670;&#160;</a></span>DFSR_WnR_Msk</h2>
 416
 417 <div class="memitem">
 418 <div class="memproto">
 419       <table class="memname">
 420         <tr>
 421           <td class="memname">#define DFSR_WnR_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__DFSR__BITS.html#ga410420633e9ba47cdd1ae2d3df146866">DFSR_WnR_Pos</a>)</td>
 422         </tr>
 423       </table>
 424 </div><div class="memdoc">
 425
 426 <p>DFSR: WnR Mask. </p>
 427
 428 </div>
 429 </div>
 430 <a id="ga410420633e9ba47cdd1ae2d3df146866" name="ga410420633e9ba47cdd1ae2d3df146866"></a>
 431 <h2 class="memtitle"><span class="permalink"><a href="#ga410420633e9ba47cdd1ae2d3df146866">&#9670;&#160;</a></span>DFSR_WnR_Pos</h2>
 432
 433 <div class="memitem">
 434 <div class="memproto">
 435       <table class="memname">
 436         <tr>
 437           <td class="memname">#define DFSR_WnR_Pos&#160;&#160;&#160;11U</td>
 438         </tr>
 439       </table>
 440 </div><div class="memdoc">
 441
 442 <p>DFSR: WnR Position. </p>
 443
 444 </div>
 445 </div>
 446 </div><!-- contents -->
 447 </div><!-- doc-content -->
 448 <!-- start footer part -->
 449 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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