begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.3.1-dev5">
  12       Aligned pack structure with repository.
  13       The following folders are deprecated:
  14       - CMSIS/Include/
  15       - CMSIS/DSP_Lib/
  16     </release>
  17     <release version="5.3.1-dev4">
  18       CMSIS-RTOS2:
  19         - API 2.1.3 (see revision history for details)
  20     </release>
  21     <release version="5.3.1-dev3">
  22       RTX5 (Cortex-A): updated exception handling
  23     </release>
  24     <release version="5.3.1-dev2">
  25       CMSIS-RTOS2:
  26         - RTX 5.4.0 (see revision history for details)
  27     </release>
  28     <release version="5.3.1-dev1">
  29       CMSIS-Core(M): 5.1.2 (see revision history for details)
  30       CMSIS-Core(A): 1.1.2 (see revision history for details)
  31       CMSIS-RTOS2:
  32         - RTX 5.3.1 (see revision history for details)
  33       CMSIS-Driver:
  34         - Flash Driver API V2.2.0
  35     </release>
  36     <release version="5.3.1-dev0">
  37       Patch release scheduled for after EW18.
  38     </release>
  39     <release version="5.3.0" date="2018-02-22">
  40       Updated Arm company brand.
  41       CMSIS-Core(M): 5.1.1 (see revision history for details)
  42       CMSIS-Core(A): 1.1.1 (see revision history for details)
  43       CMSIS-DAP: 2.0.0 (see revision history for details)
  44       CMSIS-NN: 1.0.0
  45         - Initial contribution of the bare metal Neural Network Library.
  46       CMSIS-RTOS2:
  47         - RTX 5.3.0 (see revision history for details)
  48         - OS Tick API 1.0.1
  49     </release>
  50     <release version="5.2.0" date="2017-11-16">
  51       CMSIS-Core(M): 5.1.0 (see revision history for details)
  52         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  53         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  54       CMSIS-Core(A): 1.1.0 (see revision history for details)
  55         - Added compiler_iccarm.h.
  56         - Added additional access functions for physical timer.
  57       CMSIS-DAP: 1.2.0 (see revision history for details)
  58       CMSIS-DSP: 1.5.2 (see revision history for details)
  59       CMSIS-Driver: 2.6.0 (see revision history for details)
  60         - CAN Driver API V1.2.0
  61         - NAND Driver API V2.3.0
  62       CMSIS-RTOS:
  63         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
  64       CMSIS-RTOS2:
  65         - API 2.1.2 (see revision history for details)
  66         - RTX 5.2.3 (see revision history for details)
  67       Devices:
  68         - Added GCC startup and linker script for Cortex-A9.
  69         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
  70         - Added IAR startup code for Cortex-A9
  71     </release>
  72     <release version="5.1.1" date="2017-09-19">
  73       CMSIS-RTOS2:
  74       - RTX 5.2.1 (see revision history for details)
  75     </release>
  76     <release version="5.1.0" date="2017-08-04">
  77       CMSIS-Core(M): 5.0.2 (see revision history for details)
  78       - Changed Version Control macros to be core agnostic.
  79       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  80       CMSIS-Core(A): 1.0.0 (see revision history for details)
  81       - Initial release
  82       - IRQ Controller API 1.0.0
  83       CMSIS-Driver: 2.05 (see revision history for details)
  84       - All typedefs related to status have been made volatile.
  85       CMSIS-RTOS2:
  86       - API 2.1.1 (see revision history for details)
  87       - RTX 5.2.0 (see revision history for details)
  88       - OS Tick API 1.0.0
  89       CMSIS-DSP: 1.5.2 (see revision history for details)
  90       - Fixed GNU Compiler specific diagnostics.
  91       CMSIS-PACK: 1.5.0 (see revision history for details)
  92       - added System Description File (*.SDF) Format
  93       CMSIS-Zone: 0.0.1 (Preview)
  94       - Initial specification draft
  95     </release>
  96     <release version="5.0.1" date="2017-02-03">
  97       Package Description:
  98       - added taxonomy for Cclass RTOS
  99       CMSIS-RTOS2:
 100       - API 2.1   (see revision history for details)
 101       - RTX 5.1.0 (see revision history for details)
 102       CMSIS-Core: 5.0.1 (see revision history for details)
 103       - Added __PACKED_STRUCT macro
 104       - Added uVisior support
 105       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 106       - Updated template for secure main function (main_s.c)
 107       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 108       CMSIS-DSP: 1.5.1 (see revision history for details)
 109       - added ARMv8M DSP libraries.
 110       CMSIS-PACK:1.4.9 (see revision history for details)
 111       - added Pack Index File specification and schema file
 112     </release>
 113     <release version="5.0.0" date="2016-11-11">
 114       Changed open source license to Apache 2.0
 115       CMSIS_Core:
 116        - Added support for Cortex-M23 and Cortex-M33.
 117        - Added ARMv8-M device configurations for mainline and baseline.
 118        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 119        - Added cmsis_compiler.h to unify compiler behaviour.
 120        - Updated function SCB_EnableICache (for Cortex-M7).
 121        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 122       CMSIS-RTOS:
 123         - bug fix in RTX 4.82 (see revision history for details)
 124       CMSIS-RTOS2:
 125         - new API including compatibility layer to CMSIS-RTOS
 126         - reference implementation based on RTX5
 127         - supports all Cortex-M variants including TrustZone for ARMv8-M
 128       CMSIS-SVD:
 129        - reworked SVD format documentation
 130        - removed SVD file database documentation as SVD files are distributed in packs
 131        - updated SVDConv for Win32 and Linux
 132       CMSIS-DSP:
 133        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 134        - Added DSP libraries build projects to CMSIS pack.
 135     </release>
 136     <release version="4.5.0" date="2015-10-28">
 137       - CMSIS-Core     4.30.0  (see revision history for details)
 138       - CMSIS-DAP      1.1.0   (unchanged)
 139       - CMSIS-Driver   2.04.0  (see revision history for details)
 140       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 141       - CMSIS-PACK     1.4.1   (see revision history for details)
 142       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 143       - CMSIS-SVD      1.3.1   (see revision history for details)
 144     </release>
 145     <release version="4.4.0" date="2015-09-11">
 146       - CMSIS-Core     4.20   (see revision history for details)
 147       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 148       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 149       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 150       - CMSIS-RTOS
 151         -- API         1.02   (unchanged)
 152         -- RTX         4.79   (see revision history for details)
 153       - CMSIS-SVD      1.3.0  (see revision history for details)
 154       - CMSIS-DAP      1.1.0  (extended with SWO support)
 155     </release>
 156     <release version="4.3.0" date="2015-03-20">
 157       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 158       - CMSIS-DSP      1.4.5  (see revision history for details)
 159       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 160       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 161       - CMSIS-RTOS
 162         -- API         1.02   (unchanged)
 163         -- RTX         4.78   (see revision history for details)
 164       - CMSIS-SVD      1.2    (unchanged)
 165     </release>
 166     <release version="4.2.0" date="2014-09-24">
 167       Adding Cortex-M7 support
 168       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 169       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 170       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 171       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 172       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 173     </release>
 174     <release version="4.1.1" date="2014-06-30">
 175       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 176     </release>
 177     <release version="4.1.0" date="2014-06-12">
 178       - CMSIS-Driver   2.02  (incompatible update)
 179       - CMSIS-Pack     1.3   (see revision history for details)
 180       - CMSIS-DSP      1.4.2 (unchanged)
 181       - CMSIS-Core     3.30  (unchanged)
 182       - CMSIS-RTOS RTX 4.74  (unchanged)
 183       - CMSIS-RTOS API 1.02  (unchanged)
 184       - CMSIS-SVD      1.10  (unchanged)
 185       PACK:
 186       - removed G++ specific files from PACK
 187       - added Component Startup variant "C Startup"
 188       - added Pack Checking Utility
 189       - updated conditions to reflect tool-chain dependency
 190       - added Taxonomy for Graphics
 191       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 192     </release>
 193     <release version="4.0.0">
 194       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 195       - CMSIS-Pack     1.1   Preliminary
 196       - CMSIS-DSP      1.4.2 (see revision history for details)
 197       - CMSIS-Core     3.30  (see revision history for details)
 198       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 199       - CMSIS-RTOS API 1.02  (unchanged)
 200       - CMSIS-SVD      1.10  (unchanged)
 201     </release>
 202     <release version="3.20.4">
 203       - CMSIS-RTOS 4.74 (see revision history for details)
 204       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 205     </release>
 206     <release version="3.20.3">
 207       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 208       - CMSIS-RTOS 4.73 (see revision history for details)
 209     </release>
 210     <release version="3.20.2">
 211       - CMSIS-Pack documentation has been added
 212       - CMSIS-Drivers header and documentation have been added to PACK
 213       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 214     </release>
 215     <release version="3.20.1">
 216       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 217       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 218     </release>
 219     <release version="3.20.0">
 220       The software portions that are deployed in the application program are now under a BSD license which allows usage
 221       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 222       The individual components have been update as listed below:
 223       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 224       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 225       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 226       - CMSIS-SVD is unchanged.
 227     </release>
 228   </releases>
 229
 230   <taxonomy>
 231     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 232     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 233     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 234     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 235     <description Cclass="File System">File Drive Support and File System</description>
 236     <description Cclass="Graphics">Graphical User Interface</description>
 237     <description Cclass="Network">Network Stack using Internet Protocols</description>
 238     <description Cclass="USB">Universal Serial Bus Stack</description>
 239     <description Cclass="Compiler">Compiler Software Extensions</description>
 240     <description Cclass="RTOS">Real-time Operating System</description>
 241   </taxonomy>
 242
 243   <devices>
 244     <!-- ******************************  Cortex-M0  ****************************** -->
 245     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 246       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 247       <description>
 248 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 249 - simple, easy-to-use programmers model
 250 - highly efficient ultra-low power operation
 251 - excellent code density
 252 - deterministic, high-performance interrupt handling
 253 - upward compatibility with the rest of the Cortex-M processor family.
 254       </description>
 255       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 256       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 257       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 258       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 259
 260       <device Dname="ARMCM0">
 261         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 262         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 263       </device>
 264     </family>
 265
 266     <!-- ******************************  Cortex-M0P  ****************************** -->
 267     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 268       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 269       <description>
 270 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 271 - simple, easy-to-use programmers model
 272 - highly efficient ultra-low power operation
 273 - excellent code density
 274 - deterministic, high-performance interrupt handling
 275 - upward compatibility with the rest of the Cortex-M processor family.
 276       </description>
 277       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 278       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 279       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 280       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 281
 282       <device Dname="ARMCM0P">
 283         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 284         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 285       </device>
 286
 287       <device Dname="ARMCM0P_MPU">
 288         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 289         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 290       </device>
 291     </family>
 292
 293     <!-- ******************************  Cortex-M3  ****************************** -->
 294     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 295       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 296       <description>
 297 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 298 - simple, easy-to-use programmers model
 299 - highly efficient ultra-low power operation
 300 - excellent code density
 301 - deterministic, high-performance interrupt handling
 302 - upward compatibility with the rest of the Cortex-M processor family.
 303       </description>
 304       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 305       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 306       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 307       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 308
 309       <device Dname="ARMCM3">
 310         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 311         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 312       </device>
 313     </family>
 314
 315     <!-- ******************************  Cortex-M4  ****************************** -->
 316     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 317       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 318       <description>
 319 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 320 - simple, easy-to-use programmers model
 321 - highly efficient ultra-low power operation
 322 - excellent code density
 323 - deterministic, high-performance interrupt handling
 324 - upward compatibility with the rest of the Cortex-M processor family.
 325       </description>
 326       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 327       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 328       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 329       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 330
 331       <device Dname="ARMCM4">
 332         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 333         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 334       </device>
 335
 336       <device Dname="ARMCM4_FP">
 337         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 338         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 339       </device>
 340     </family>
 341
 342     <!-- ******************************  Cortex-M7  ****************************** -->
 343     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 344       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 345       <description>
 346 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 347 - simple, easy-to-use programmers model
 348 - highly efficient ultra-low power operation
 349 - excellent code density
 350 - deterministic, high-performance interrupt handling
 351 - upward compatibility with the rest of the Cortex-M processor family.
 352       </description>
 353       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 354       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 355       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 356       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 357
 358       <device Dname="ARMCM7">
 359         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 360         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 361       </device>
 362
 363       <device Dname="ARMCM7_SP">
 364         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 365         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 366       </device>
 367
 368       <device Dname="ARMCM7_DP">
 369         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 370         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 371       </device>
 372     </family>
 373
 374     <!-- ******************************  Cortex-M23  ********************** -->
 375     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 376       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 377       <description>
 378 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 379 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 380 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 381       </description>
 382       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 383       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 384       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 385       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 386       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 387       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 388
 389       <device Dname="ARMCM23">
 390         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 391         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 392       </device>
 393
 394       <device Dname="ARMCM23_TZ">
 395         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 396         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 397       </device>
 398     </family>
 399
 400     <!-- ******************************  Cortex-M33  ****************************** -->
 401     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 402       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 403       <description>
 404 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 405 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 406       </description>
 407       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 408       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 409       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 410       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 411       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 412       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 413
 414       <device Dname="ARMCM33">
 415         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 416         <description>
 417           no DSP Instructions, no Floating Point Unit, no TrustZone
 418         </description>
 419         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 420       </device>
 421
 422       <device Dname="ARMCM33_TZ">
 423         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 424         <description>
 425           no DSP Instructions, no Floating Point Unit, TrustZone
 426         </description>
 427         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 428       </device>
 429
 430       <device Dname="ARMCM33_DSP_FP">
 431         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 432         <description>
 433           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 434         </description>
 435         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 436       </device>
 437
 438       <device Dname="ARMCM33_DSP_FP_TZ">
 439         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 440         <description>
 441           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 442         </description>
 443         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 444       </device>
 445     </family>
 446
 447     <!-- ******************************  ARMSC000  ****************************** -->
 448     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 449       <description>
 450 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 451 - simple, easy-to-use programmers model
 452 - highly efficient ultra-low power operation
 453 - excellent code density
 454 - deterministic, high-performance interrupt handling
 455       </description>
 456       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 457       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 458       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 459       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 460
 461       <device Dname="ARMSC000">
 462         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 463         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 464       </device>
 465     </family>
 466
 467     <!-- ******************************  ARMSC300  ****************************** -->
 468     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 469       <description>
 470 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 471 - simple, easy-to-use programmers model
 472 - highly efficient ultra-low power operation
 473 - excellent code density
 474 - deterministic, high-performance interrupt handling
 475       </description>
 476       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 477       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 478       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 479       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 480
 481       <device Dname="ARMSC300">
 482         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 483         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 484       </device>
 485     </family>
 486
 487     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 488     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 489       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 490       <description>
 491 Armv8-M Baseline based device with TrustZone
 492       </description>
 493       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 494       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 495       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 496       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 497       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 498       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 499
 500       <device Dname="ARMv8MBL">
 501         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 502         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 503       </device>
 504     </family>
 505
 506     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 507     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 508       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 509       <description>
 510 Armv8-M Mainline based device with TrustZone
 511       </description>
 512       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 513       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 514       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 515       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 516       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 517       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 518
 519       <device Dname="ARMv8MML">
 520         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 521         <description>
 522           no DSP Instructions, no Floating Point Unit, TrustZone
 523         </description>
 524         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 525       </device>
 526
 527       <device Dname="ARMv8MML_DSP">
 528         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 529         <description>
 530           DSP Instructions, no Floating Point Unit, TrustZone
 531         </description>
 532         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 533       </device>
 534
 535       <device Dname="ARMv8MML_SP">
 536         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 537         <description>
 538           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 539         </description>
 540         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 541       </device>
 542
 543       <device Dname="ARMv8MML_DSP_SP">
 544         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 545         <description>
 546           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 547         </description>
 548         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 549       </device>
 550
 551       <device Dname="ARMv8MML_DP">
 552         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 553         <description>
 554           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 555         </description>
 556         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 557       </device>
 558
 559       <device Dname="ARMv8MML_DSP_DP">
 560         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 561         <description>
 562           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 563         </description>
 564         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 565       </device>
 566     </family>
 567
 568     <!-- ******************************  Cortex-A5  ****************************** -->
 569     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 570       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 571       <description>
 572 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 573 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 574 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 575       </description>
 576
 577       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 578       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 579
 580       <device Dname="ARMCA5">
 581         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 582         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 583       </device>
 584     </family>
 585
 586     <!-- ******************************  Cortex-A7  ****************************** -->
 587     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 588       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 589       <description>
 590 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 591 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 592 an optional integrated GIC, and an optional L2 cache controller.
 593       </description>
 594
 595       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 596       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 597
 598       <device Dname="ARMCA7">
 599         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 600         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 601       </device>
 602     </family>
 603
 604     <!-- ******************************  Cortex-A9  ****************************** -->
 605     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 606       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 607       <description>
 608 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 609 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 610 and 8-bit Java bytecodes in Jazelle state.
 611       </description>
 612
 613       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 614       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 615
 616       <device Dname="ARMCA9">
 617         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 618         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 619       </device>
 620     </family>
 621   </devices>
 622
 623
 624   <apis>
 625     <!-- CMSIS Device API -->
 626     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 627       <description>Device interrupt controller interface</description>
 628       <files>
 629         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 630       </files>
 631     </api>
 632     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 633       <description>RTOS Kernel system tick timer interface</description>
 634       <files>
 635         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 636       </files>
 637     </api>
 638     <!-- CMSIS-RTOS API -->
 639     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 640       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 641       <files>
 642         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 643       </files>
 644     </api>
 645     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 646       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 647       <files>
 648         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 649         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 650       </files>
 651     </api>
 652     <!-- CMSIS Driver API -->
 653     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 654       <description>USART Driver API for Cortex-M</description>
 655       <files>
 656         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 657         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 658       </files>
 659     </api>
 660     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 661       <description>SPI Driver API for Cortex-M</description>
 662       <files>
 663         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 664         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 665       </files>
 666     </api>
 667     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 668       <description>SAI Driver API for Cortex-M</description>
 669       <files>
 670         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 671         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 672       </files>
 673     </api>
 674     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 675       <description>I2C Driver API for Cortex-M</description>
 676       <files>
 677         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 678         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 679       </files>
 680     </api>
 681     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 682       <description>CAN Driver API for Cortex-M</description>
 683       <files>
 684         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 685         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 686       </files>
 687     </api>
 688     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 689       <description>Flash Driver API for Cortex-M</description>
 690       <files>
 691         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 692         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 693       </files>
 694     </api>
 695     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 696       <description>MCI Driver API for Cortex-M</description>
 697       <files>
 698         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 699         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 700       </files>
 701     </api>
 702     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 703       <description>NAND Flash Driver API for Cortex-M</description>
 704       <files>
 705         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 706         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 707       </files>
 708     </api>
 709     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 710       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 711       <files>
 712         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 713         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 714         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 715       </files>
 716     </api>
 717     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 718       <description>Ethernet MAC Driver API for Cortex-M</description>
 719       <files>
 720         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 721         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 722       </files>
 723     </api>
 724     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 725       <description>Ethernet PHY Driver API for Cortex-M</description>
 726       <files>
 727         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 728         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 729       </files>
 730     </api>
 731     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 732       <description>USB Device Driver API for Cortex-M</description>
 733       <files>
 734         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 735         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 736       </files>
 737     </api>
 738     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 739       <description>USB Host Driver API for Cortex-M</description>
 740       <files>
 741         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 742         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 743       </files>
 744     </api>
 745   </apis>
 746
 747   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 748   <conditions>
 749     <!-- compiler -->
 750     <condition id="ARMCC6">
 751       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 752       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 753     </condition>
 754     <condition id="ARMCC5">
 755       <require Tcompiler="ARMCC" Toptions="AC5"/>
 756     </condition>
 757     <condition id="ARMCC">
 758       <require Tcompiler="ARMCC"/>
 759     </condition>
 760     <condition id="GCC">
 761       <require Tcompiler="GCC"/>
 762     </condition>
 763     <condition id="IAR">
 764       <require Tcompiler="IAR"/>
 765     </condition>
 766     <condition id="ARMCC GCC">
 767       <accept Tcompiler="ARMCC"/>
 768       <accept Tcompiler="GCC"/>
 769     </condition>
 770     <condition id="ARMCC GCC IAR">
 771       <accept Tcompiler="ARMCC"/>
 772       <accept Tcompiler="GCC"/>
 773       <accept Tcompiler="IAR"/>
 774     </condition>
 775
 776     <!-- Arm architecture -->
 777     <condition id="ARMv6-M Device">
 778       <description>Armv6-M architecture based device</description>
 779       <accept Dcore="Cortex-M0"/>
 780       <accept Dcore="Cortex-M0+"/>
 781       <accept Dcore="SC000"/>
 782     </condition>
 783     <condition id="ARMv7-M Device">
 784       <description>Armv7-M architecture based device</description>
 785       <accept Dcore="Cortex-M3"/>
 786       <accept Dcore="Cortex-M4"/>
 787       <accept Dcore="Cortex-M7"/>
 788       <accept Dcore="SC300"/>
 789     </condition>
 790     <condition id="ARMv8-M Device">
 791       <description>Armv8-M architecture based device</description>
 792       <accept Dcore="ARMV8MBL"/>
 793       <accept Dcore="ARMV8MML"/>
 794       <accept Dcore="Cortex-M23"/>
 795       <accept Dcore="Cortex-M33"/>
 796     </condition>
 797     <condition id="ARMv8-M TZ Device">
 798       <description>Armv8-M architecture based device with TrustZone</description>
 799       <require condition="ARMv8-M Device"/>
 800       <require Dtz="TZ"/>
 801     </condition>
 802     <condition id="ARMv6_7-M Device">
 803       <description>Armv6_7-M architecture based device</description>
 804       <accept condition="ARMv6-M Device"/>
 805       <accept condition="ARMv7-M Device"/>
 806     </condition>
 807     <condition id="ARMv6_7_8-M Device">
 808       <description>Armv6_7_8-M architecture based device</description>
 809       <accept condition="ARMv6-M Device"/>
 810       <accept condition="ARMv7-M Device"/>
 811       <accept condition="ARMv8-M Device"/>
 812     </condition>
 813     <condition id="ARMv7-A Device">
 814       <description>Armv7-A architecture based device</description>
 815       <accept Dcore="Cortex-A5"/>
 816       <accept Dcore="Cortex-A7"/>
 817       <accept Dcore="Cortex-A9"/>
 818     </condition>
 819
 820     <!-- ARM core -->
 821     <condition id="CM0">
 822       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 823       <accept Dcore="Cortex-M0"/>
 824       <accept Dcore="Cortex-M0+"/>
 825       <accept Dcore="SC000"/>
 826     </condition>
 827     <condition id="CM3">
 828       <description>Cortex-M3 or SC300 processor based device</description>
 829       <accept Dcore="Cortex-M3"/>
 830       <accept Dcore="SC300"/>
 831     </condition>
 832     <condition id="CM4">
 833       <description>Cortex-M4 processor based device</description>
 834       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 835     </condition>
 836     <condition id="CM4_FP">
 837       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 838       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 839       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 840       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 841     </condition>
 842     <condition id="CM7">
 843       <description>Cortex-M7 processor based device</description>
 844       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 845     </condition>
 846     <condition id="CM7_FP">
 847       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 848       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 849       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 850     </condition>
 851     <condition id="CM7_SP">
 852       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 853       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 854     </condition>
 855     <condition id="CM7_DP">
 856       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 857       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 858     </condition>
 859     <condition id="CM23">
 860       <description>Cortex-M23 processor based device</description>
 861       <require Dcore="Cortex-M23"/>
 862     </condition>
 863     <condition id="CM33">
 864       <description>Cortex-M33 processor based device</description>
 865       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 866     </condition>
 867     <condition id="CM33_FP">
 868       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 869       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 870     </condition>
 871     <condition id="ARMv8MBL">
 872       <description>Armv8-M Baseline processor based device</description>
 873       <require Dcore="ARMV8MBL"/>
 874     </condition>
 875     <condition id="ARMv8MML">
 876       <description>Armv8-M Mainline processor based device</description>
 877       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 878     </condition>
 879     <condition id="ARMv8MML_FP">
 880       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
 881       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 882       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 883     </condition>
 884
 885     <condition id="CM33_NODSP_NOFPU">
 886       <description>CM33, no DSP, no FPU</description>
 887       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 888     </condition>
 889     <condition id="CM33_DSP_NOFPU">
 890       <description>CM33, DSP, no FPU</description>
 891       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 892     </condition>
 893     <condition id="CM33_NODSP_SP">
 894       <description>CM33, no DSP, SP FPU</description>
 895       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 896     </condition>
 897     <condition id="CM33_DSP_SP">
 898       <description>CM33, DSP, SP FPU</description>
 899       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 900     </condition>
 901
 902     <condition id="ARMv8MML_NODSP_NOFPU">
 903       <description>Armv8-M Mainline, no DSP, no FPU</description>
 904       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 905     </condition>
 906     <condition id="ARMv8MML_DSP_NOFPU">
 907       <description>Armv8-M Mainline, DSP, no FPU</description>
 908       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 909     </condition>
 910     <condition id="ARMv8MML_NODSP_SP">
 911       <description>Armv8-M Mainline, no DSP, SP FPU</description>
 912       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 913     </condition>
 914     <condition id="ARMv8MML_DSP_SP">
 915       <description>Armv8-M Mainline, DSP, SP FPU</description>
 916       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 917     </condition>
 918
 919     <condition id="CA5_CA9">
 920       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 921       <accept Dcore="Cortex-A5"/>
 922       <accept Dcore="Cortex-A9"/>
 923     </condition>
 924
 925     <condition id="CA7">
 926       <description>Cortex-A7 processor based device</description>
 927       <accept Dcore="Cortex-A7"/>
 928     </condition>
 929
 930     <!-- ARMCC compiler -->
 931     <condition id="CA_ARMCC5">
 932       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
 933       <require condition="ARMv7-A Device"/>
 934       <require condition="ARMCC5"/>
 935     </condition>
 936     <condition id="CA_ARMCC6">
 937       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
 938       <require condition="ARMv7-A Device"/>
 939       <require condition="ARMCC6"/>
 940     </condition>
 941
 942     <condition id="CM0_ARMCC">
 943       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
 944       <require condition="CM0"/>
 945       <require Tcompiler="ARMCC"/>
 946     </condition>
 947     <condition id="CM0_LE_ARMCC">
 948       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
 949       <require condition="CM0_ARMCC"/>
 950       <require Dendian="Little-endian"/>
 951     </condition>
 952     <condition id="CM0_BE_ARMCC">
 953       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
 954       <require condition="CM0_ARMCC"/>
 955       <require Dendian="Big-endian"/>
 956     </condition>
 957
 958     <condition id="CM3_ARMCC">
 959       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
 960       <require condition="CM3"/>
 961       <require Tcompiler="ARMCC"/>
 962     </condition>
 963     <condition id="CM3_LE_ARMCC">
 964       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
 965       <require condition="CM3_ARMCC"/>
 966       <require Dendian="Little-endian"/>
 967     </condition>
 968     <condition id="CM3_BE_ARMCC">
 969       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
 970       <require condition="CM3_ARMCC"/>
 971       <require Dendian="Big-endian"/>
 972     </condition>
 973
 974     <condition id="CM4_ARMCC">
 975       <description>Cortex-M4 processor based device for the Arm Compiler</description>
 976       <require condition="CM4"/>
 977       <require Tcompiler="ARMCC"/>
 978     </condition>
 979     <condition id="CM4_LE_ARMCC">
 980       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
 981       <require condition="CM4_ARMCC"/>
 982       <require Dendian="Little-endian"/>
 983     </condition>
 984     <condition id="CM4_BE_ARMCC">
 985       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
 986       <require condition="CM4_ARMCC"/>
 987       <require Dendian="Big-endian"/>
 988     </condition>
 989
 990     <condition id="CM4_FP_ARMCC">
 991       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
 992       <require condition="CM4_FP"/>
 993       <require Tcompiler="ARMCC"/>
 994     </condition>
 995     <condition id="CM4_FP_LE_ARMCC">
 996       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
 997       <require condition="CM4_FP_ARMCC"/>
 998       <require Dendian="Little-endian"/>
 999     </condition>
1000     <condition id="CM4_FP_BE_ARMCC">
1001       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1002       <require condition="CM4_FP_ARMCC"/>
1003       <require Dendian="Big-endian"/>
1004     </condition>
1005
1006     <condition id="CM7_ARMCC">
1007       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1008       <require condition="CM7"/>
1009       <require Tcompiler="ARMCC"/>
1010     </condition>
1011     <condition id="CM7_LE_ARMCC">
1012       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1013       <require condition="CM7_ARMCC"/>
1014       <require Dendian="Little-endian"/>
1015     </condition>
1016     <condition id="CM7_BE_ARMCC">
1017       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1018       <require condition="CM7_ARMCC"/>
1019       <require Dendian="Big-endian"/>
1020     </condition>
1021
1022     <condition id="CM7_FP_ARMCC">
1023       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1024       <require condition="CM7_FP"/>
1025       <require Tcompiler="ARMCC"/>
1026     </condition>
1027     <condition id="CM7_FP_LE_ARMCC">
1028       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1029       <require condition="CM7_FP_ARMCC"/>
1030       <require Dendian="Little-endian"/>
1031     </condition>
1032     <condition id="CM7_FP_BE_ARMCC">
1033       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1034       <require condition="CM7_FP_ARMCC"/>
1035       <require Dendian="Big-endian"/>
1036     </condition>
1037
1038     <condition id="CM7_SP_ARMCC">
1039       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1040       <require condition="CM7_SP"/>
1041       <require Tcompiler="ARMCC"/>
1042     </condition>
1043     <condition id="CM7_SP_LE_ARMCC">
1044       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1045       <require condition="CM7_SP_ARMCC"/>
1046       <require Dendian="Little-endian"/>
1047     </condition>
1048     <condition id="CM7_SP_BE_ARMCC">
1049       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1050       <require condition="CM7_SP_ARMCC"/>
1051       <require Dendian="Big-endian"/>
1052     </condition>
1053
1054     <condition id="CM7_DP_ARMCC">
1055       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1056       <require condition="CM7_DP"/>
1057       <require Tcompiler="ARMCC"/>
1058     </condition>
1059     <condition id="CM7_DP_LE_ARMCC">
1060       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1061       <require condition="CM7_DP_ARMCC"/>
1062       <require Dendian="Little-endian"/>
1063     </condition>
1064     <condition id="CM7_DP_BE_ARMCC">
1065       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1066       <require condition="CM7_DP_ARMCC"/>
1067       <require Dendian="Big-endian"/>
1068     </condition>
1069
1070     <condition id="CM23_ARMCC">
1071       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1072       <require condition="CM23"/>
1073       <require Tcompiler="ARMCC"/>
1074     </condition>
1075     <condition id="CM23_LE_ARMCC">
1076       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1077       <require condition="CM23_ARMCC"/>
1078       <require Dendian="Little-endian"/>
1079     </condition>
1080     <condition id="CM23_BE_ARMCC">
1081       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1082       <require condition="CM23_ARMCC"/>
1083       <require Dendian="Big-endian"/>
1084     </condition>
1085
1086     <condition id="CM33_ARMCC">
1087       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1088       <require condition="CM33"/>
1089       <require Tcompiler="ARMCC"/>
1090     </condition>
1091     <condition id="CM33_LE_ARMCC">
1092       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1093       <require condition="CM33_ARMCC"/>
1094       <require Dendian="Little-endian"/>
1095     </condition>
1096     <condition id="CM33_BE_ARMCC">
1097       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1098       <require condition="CM33_ARMCC"/>
1099       <require Dendian="Big-endian"/>
1100     </condition>
1101
1102     <condition id="CM33_FP_ARMCC">
1103       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1104       <require condition="CM33_FP"/>
1105       <require Tcompiler="ARMCC"/>
1106     </condition>
1107     <condition id="CM33_FP_LE_ARMCC">
1108       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1109       <require condition="CM33_FP_ARMCC"/>
1110       <require Dendian="Little-endian"/>
1111     </condition>
1112     <condition id="CM33_FP_BE_ARMCC">
1113       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1114       <require condition="CM33_FP_ARMCC"/>
1115       <require Dendian="Big-endian"/>
1116     </condition>
1117
1118     <condition id="CM33_NODSP_NOFPU_ARMCC">
1119       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1120       <require condition="CM33_NODSP_NOFPU"/>
1121       <require Tcompiler="ARMCC"/>
1122     </condition>
1123     <condition id="CM33_DSP_NOFPU_ARMCC">
1124       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1125       <require condition="CM33_DSP_NOFPU"/>
1126       <require Tcompiler="ARMCC"/>
1127     </condition>
1128     <condition id="CM33_NODSP_SP_ARMCC">
1129       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1130       <require condition="CM33_NODSP_SP"/>
1131       <require Tcompiler="ARMCC"/>
1132     </condition>
1133     <condition id="CM33_DSP_SP_ARMCC">
1134       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1135       <require condition="CM33_DSP_SP"/>
1136       <require Tcompiler="ARMCC"/>
1137     </condition>
1138     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1139       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1140       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1141       <require Dendian="Little-endian"/>
1142     </condition>
1143     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1144       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1145       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1146       <require Dendian="Little-endian"/>
1147     </condition>
1148     <condition id="CM33_NODSP_SP_LE_ARMCC">
1149       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1150       <require condition="CM33_NODSP_SP_ARMCC"/>
1151       <require Dendian="Little-endian"/>
1152     </condition>
1153     <condition id="CM33_DSP_SP_LE_ARMCC">
1154       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1155       <require condition="CM33_DSP_SP_ARMCC"/>
1156       <require Dendian="Little-endian"/>
1157     </condition>
1158
1159     <condition id="ARMv8MBL_ARMCC">
1160       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1161       <require condition="ARMv8MBL"/>
1162       <require Tcompiler="ARMCC"/>
1163     </condition>
1164     <condition id="ARMv8MBL_LE_ARMCC">
1165       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1166       <require condition="ARMv8MBL_ARMCC"/>
1167       <require Dendian="Little-endian"/>
1168     </condition>
1169     <condition id="ARMv8MBL_BE_ARMCC">
1170       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1171       <require condition="ARMv8MBL_ARMCC"/>
1172       <require Dendian="Big-endian"/>
1173     </condition>
1174
1175     <condition id="ARMv8MML_ARMCC">
1176       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1177       <require condition="ARMv8MML"/>
1178       <require Tcompiler="ARMCC"/>
1179     </condition>
1180     <condition id="ARMv8MML_LE_ARMCC">
1181       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1182       <require condition="ARMv8MML_ARMCC"/>
1183       <require Dendian="Little-endian"/>
1184     </condition>
1185     <condition id="ARMv8MML_BE_ARMCC">
1186       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1187       <require condition="ARMv8MML_ARMCC"/>
1188       <require Dendian="Big-endian"/>
1189     </condition>
1190
1191     <condition id="ARMv8MML_FP_ARMCC">
1192       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1193       <require condition="ARMv8MML_FP"/>
1194       <require Tcompiler="ARMCC"/>
1195     </condition>
1196     <condition id="ARMv8MML_FP_LE_ARMCC">
1197       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1198       <require condition="ARMv8MML_FP_ARMCC"/>
1199       <require Dendian="Little-endian"/>
1200     </condition>
1201     <condition id="ARMv8MML_FP_BE_ARMCC">
1202       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1203       <require condition="ARMv8MML_FP_ARMCC"/>
1204       <require Dendian="Big-endian"/>
1205     </condition>
1206
1207     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1208       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1209       <require condition="ARMv8MML_NODSP_NOFPU"/>
1210       <require Tcompiler="ARMCC"/>
1211     </condition>
1212     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1213       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1214       <require condition="ARMv8MML_DSP_NOFPU"/>
1215       <require Tcompiler="ARMCC"/>
1216     </condition>
1217     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1218       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1219       <require condition="ARMv8MML_NODSP_SP"/>
1220       <require Tcompiler="ARMCC"/>
1221     </condition>
1222     <condition id="ARMv8MML_DSP_SP_ARMCC">
1223       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1224       <require condition="ARMv8MML_DSP_SP"/>
1225       <require Tcompiler="ARMCC"/>
1226     </condition>
1227     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1228       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1229       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1230       <require Dendian="Little-endian"/>
1231     </condition>
1232     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1233       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1234       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1235       <require Dendian="Little-endian"/>
1236     </condition>
1237     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1238       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1239       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1240       <require Dendian="Little-endian"/>
1241     </condition>
1242     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1243       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1244       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1245       <require Dendian="Little-endian"/>
1246     </condition>
1247
1248     <!-- GCC compiler -->
1249     <condition id="CA_GCC">
1250       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1251       <require condition="ARMv7-A Device"/>
1252       <require Tcompiler="GCC"/>
1253     </condition>
1254
1255     <condition id="CM0_GCC">
1256       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1257       <require condition="CM0"/>
1258       <require Tcompiler="GCC"/>
1259     </condition>
1260     <condition id="CM0_LE_GCC">
1261       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1262       <require condition="CM0_GCC"/>
1263       <require Dendian="Little-endian"/>
1264     </condition>
1265     <condition id="CM0_BE_GCC">
1266       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1267       <require condition="CM0_GCC"/>
1268       <require Dendian="Big-endian"/>
1269     </condition>
1270
1271     <condition id="CM3_GCC">
1272       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1273       <require condition="CM3"/>
1274       <require Tcompiler="GCC"/>
1275     </condition>
1276     <condition id="CM3_LE_GCC">
1277       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1278       <require condition="CM3_GCC"/>
1279       <require Dendian="Little-endian"/>
1280     </condition>
1281     <condition id="CM3_BE_GCC">
1282       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1283       <require condition="CM3_GCC"/>
1284       <require Dendian="Big-endian"/>
1285     </condition>
1286
1287     <condition id="CM4_GCC">
1288       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1289       <require condition="CM4"/>
1290       <require Tcompiler="GCC"/>
1291     </condition>
1292     <condition id="CM4_LE_GCC">
1293       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1294       <require condition="CM4_GCC"/>
1295       <require Dendian="Little-endian"/>
1296     </condition>
1297     <condition id="CM4_BE_GCC">
1298       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1299       <require condition="CM4_GCC"/>
1300       <require Dendian="Big-endian"/>
1301     </condition>
1302
1303     <condition id="CM4_FP_GCC">
1304       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1305       <require condition="CM4_FP"/>
1306       <require Tcompiler="GCC"/>
1307     </condition>
1308     <condition id="CM4_FP_LE_GCC">
1309       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1310       <require condition="CM4_FP_GCC"/>
1311       <require Dendian="Little-endian"/>
1312     </condition>
1313     <condition id="CM4_FP_BE_GCC">
1314       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1315       <require condition="CM4_FP_GCC"/>
1316       <require Dendian="Big-endian"/>
1317     </condition>
1318
1319     <condition id="CM7_GCC">
1320       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1321       <require condition="CM7"/>
1322       <require Tcompiler="GCC"/>
1323     </condition>
1324     <condition id="CM7_LE_GCC">
1325       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1326       <require condition="CM7_GCC"/>
1327       <require Dendian="Little-endian"/>
1328     </condition>
1329     <condition id="CM7_BE_GCC">
1330       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1331       <require condition="CM7_GCC"/>
1332       <require Dendian="Big-endian"/>
1333     </condition>
1334
1335     <condition id="CM7_FP_GCC">
1336       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1337       <require condition="CM7_FP"/>
1338       <require Tcompiler="GCC"/>
1339     </condition>
1340     <condition id="CM7_FP_LE_GCC">
1341       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1342       <require condition="CM7_FP_GCC"/>
1343       <require Dendian="Little-endian"/>
1344     </condition>
1345     <condition id="CM7_FP_BE_GCC">
1346       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1347       <require condition="CM7_FP_GCC"/>
1348       <require Dendian="Big-endian"/>
1349     </condition>
1350
1351     <condition id="CM7_SP_GCC">
1352       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1353       <require condition="CM7_SP"/>
1354       <require Tcompiler="GCC"/>
1355     </condition>
1356     <condition id="CM7_SP_LE_GCC">
1357       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1358       <require condition="CM7_SP_GCC"/>
1359       <require Dendian="Little-endian"/>
1360     </condition>
1361     <condition id="CM7_SP_BE_GCC">
1362       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1363       <require condition="CM7_SP_GCC"/>
1364       <require Dendian="Big-endian"/>
1365     </condition>
1366
1367     <condition id="CM7_DP_GCC">
1368       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1369       <require condition="CM7_DP"/>
1370       <require Tcompiler="GCC"/>
1371     </condition>
1372     <condition id="CM7_DP_LE_GCC">
1373       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1374       <require condition="CM7_DP_GCC"/>
1375       <require Dendian="Little-endian"/>
1376     </condition>
1377     <condition id="CM7_DP_BE_GCC">
1378       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1379       <require condition="CM7_DP_GCC"/>
1380       <require Dendian="Big-endian"/>
1381     </condition>
1382
1383     <condition id="CM23_GCC">
1384       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1385       <require condition="CM23"/>
1386       <require Tcompiler="GCC"/>
1387     </condition>
1388     <condition id="CM23_LE_GCC">
1389       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1390       <require condition="CM23_GCC"/>
1391       <require Dendian="Little-endian"/>
1392     </condition>
1393     <condition id="CM23_BE_GCC">
1394       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1395       <require condition="CM23_GCC"/>
1396       <require Dendian="Big-endian"/>
1397     </condition>
1398
1399     <condition id="CM33_GCC">
1400       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1401       <require condition="CM33"/>
1402       <require Tcompiler="GCC"/>
1403     </condition>
1404     <condition id="CM33_LE_GCC">
1405       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1406       <require condition="CM33_GCC"/>
1407       <require Dendian="Little-endian"/>
1408     </condition>
1409     <condition id="CM33_BE_GCC">
1410       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1411       <require condition="CM33_GCC"/>
1412       <require Dendian="Big-endian"/>
1413     </condition>
1414
1415     <condition id="CM33_FP_GCC">
1416       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1417       <require condition="CM33_FP"/>
1418       <require Tcompiler="GCC"/>
1419     </condition>
1420     <condition id="CM33_FP_LE_GCC">
1421       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1422       <require condition="CM33_FP_GCC"/>
1423       <require Dendian="Little-endian"/>
1424     </condition>
1425     <condition id="CM33_FP_BE_GCC">
1426       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1427       <require condition="CM33_FP_GCC"/>
1428       <require Dendian="Big-endian"/>
1429     </condition>
1430
1431     <condition id="CM33_NODSP_NOFPU_GCC">
1432       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1433       <require condition="CM33_NODSP_NOFPU"/>
1434       <require Tcompiler="GCC"/>
1435     </condition>
1436     <condition id="CM33_DSP_NOFPU_GCC">
1437       <description>CM33, DSP, no FPU, GCC Compiler</description>
1438       <require condition="CM33_DSP_NOFPU"/>
1439       <require Tcompiler="GCC"/>
1440     </condition>
1441     <condition id="CM33_NODSP_SP_GCC">
1442       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1443       <require condition="CM33_NODSP_SP"/>
1444       <require Tcompiler="GCC"/>
1445     </condition>
1446     <condition id="CM33_DSP_SP_GCC">
1447       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1448       <require condition="CM33_DSP_SP"/>
1449       <require Tcompiler="GCC"/>
1450     </condition>
1451     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1452       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1453       <require condition="CM33_NODSP_NOFPU_GCC"/>
1454       <require Dendian="Little-endian"/>
1455     </condition>
1456     <condition id="CM33_DSP_NOFPU_LE_GCC">
1457       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1458       <require condition="CM33_DSP_NOFPU_GCC"/>
1459       <require Dendian="Little-endian"/>
1460     </condition>
1461     <condition id="CM33_NODSP_SP_LE_GCC">
1462       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1463       <require condition="CM33_NODSP_SP_GCC"/>
1464       <require Dendian="Little-endian"/>
1465     </condition>
1466     <condition id="CM33_DSP_SP_LE_GCC">
1467       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1468       <require condition="CM33_DSP_SP_GCC"/>
1469       <require Dendian="Little-endian"/>
1470     </condition>
1471
1472     <condition id="ARMv8MBL_GCC">
1473       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1474       <require condition="ARMv8MBL"/>
1475       <require Tcompiler="GCC"/>
1476     </condition>
1477     <condition id="ARMv8MBL_LE_GCC">
1478       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1479       <require condition="ARMv8MBL_GCC"/>
1480       <require Dendian="Little-endian"/>
1481     </condition>
1482     <condition id="ARMv8MBL_BE_GCC">
1483       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1484       <require condition="ARMv8MBL_GCC"/>
1485       <require Dendian="Big-endian"/>
1486     </condition>
1487
1488     <condition id="ARMv8MML_GCC">
1489       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1490       <require condition="ARMv8MML"/>
1491       <require Tcompiler="GCC"/>
1492     </condition>
1493     <condition id="ARMv8MML_LE_GCC">
1494       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1495       <require condition="ARMv8MML_GCC"/>
1496       <require Dendian="Little-endian"/>
1497     </condition>
1498     <condition id="ARMv8MML_BE_GCC">
1499       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1500       <require condition="ARMv8MML_GCC"/>
1501       <require Dendian="Big-endian"/>
1502     </condition>
1503
1504     <condition id="ARMv8MML_FP_GCC">
1505       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1506       <require condition="ARMv8MML_FP"/>
1507       <require Tcompiler="GCC"/>
1508     </condition>
1509     <condition id="ARMv8MML_FP_LE_GCC">
1510       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1511       <require condition="ARMv8MML_FP_GCC"/>
1512       <require Dendian="Little-endian"/>
1513     </condition>
1514     <condition id="ARMv8MML_FP_BE_GCC">
1515       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1516       <require condition="ARMv8MML_FP_GCC"/>
1517       <require Dendian="Big-endian"/>
1518     </condition>
1519
1520     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1521       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1522       <require condition="ARMv8MML_NODSP_NOFPU"/>
1523       <require Tcompiler="GCC"/>
1524     </condition>
1525     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1526       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1527       <require condition="ARMv8MML_DSP_NOFPU"/>
1528       <require Tcompiler="GCC"/>
1529     </condition>
1530     <condition id="ARMv8MML_NODSP_SP_GCC">
1531       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1532       <require condition="ARMv8MML_NODSP_SP"/>
1533       <require Tcompiler="GCC"/>
1534     </condition>
1535     <condition id="ARMv8MML_DSP_SP_GCC">
1536       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1537       <require condition="ARMv8MML_DSP_SP"/>
1538       <require Tcompiler="GCC"/>
1539     </condition>
1540     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1541       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1542       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1543       <require Dendian="Little-endian"/>
1544     </condition>
1545     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1546       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1547       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1548       <require Dendian="Little-endian"/>
1549     </condition>
1550     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1551       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1552       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1553       <require Dendian="Little-endian"/>
1554     </condition>
1555     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1556       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1557       <require condition="ARMv8MML_DSP_SP_GCC"/>
1558       <require Dendian="Little-endian"/>
1559     </condition>
1560
1561     <!-- IAR compiler -->
1562     <condition id="CA_IAR">
1563       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1564       <require condition="ARMv7-A Device"/>
1565       <require Tcompiler="IAR"/>
1566     </condition>
1567
1568     <condition id="CM0_IAR">
1569       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1570       <require condition="CM0"/>
1571       <require Tcompiler="IAR"/>
1572     </condition>
1573     <condition id="CM0_LE_IAR">
1574       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1575       <require condition="CM0_IAR"/>
1576       <require Dendian="Little-endian"/>
1577     </condition>
1578     <condition id="CM0_BE_IAR">
1579       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1580       <require condition="CM0_IAR"/>
1581       <require Dendian="Big-endian"/>
1582     </condition>
1583
1584     <condition id="CM3_IAR">
1585       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1586       <require condition="CM3"/>
1587       <require Tcompiler="IAR"/>
1588     </condition>
1589     <condition id="CM3_LE_IAR">
1590       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1591       <require condition="CM3_IAR"/>
1592       <require Dendian="Little-endian"/>
1593     </condition>
1594     <condition id="CM3_BE_IAR">
1595       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1596       <require condition="CM3_IAR"/>
1597       <require Dendian="Big-endian"/>
1598     </condition>
1599
1600     <condition id="CM4_IAR">
1601       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1602       <require condition="CM4"/>
1603       <require Tcompiler="IAR"/>
1604     </condition>
1605     <condition id="CM4_LE_IAR">
1606       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1607       <require condition="CM4_IAR"/>
1608       <require Dendian="Little-endian"/>
1609     </condition>
1610     <condition id="CM4_BE_IAR">
1611       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1612       <require condition="CM4_IAR"/>
1613       <require Dendian="Big-endian"/>
1614     </condition>
1615
1616     <condition id="CM4_FP_IAR">
1617       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1618       <require condition="CM4_FP"/>
1619       <require Tcompiler="IAR"/>
1620     </condition>
1621     <condition id="CM4_FP_LE_IAR">
1622       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1623       <require condition="CM4_FP_IAR"/>
1624       <require Dendian="Little-endian"/>
1625     </condition>
1626     <condition id="CM4_FP_BE_IAR">
1627       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1628       <require condition="CM4_FP_IAR"/>
1629       <require Dendian="Big-endian"/>
1630     </condition>
1631
1632     <condition id="CM7_IAR">
1633       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1634       <require condition="CM7"/>
1635       <require Tcompiler="IAR"/>
1636     </condition>
1637     <condition id="CM7_LE_IAR">
1638       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1639       <require condition="CM7_IAR"/>
1640       <require Dendian="Little-endian"/>
1641     </condition>
1642     <condition id="CM7_BE_IAR">
1643       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1644       <require condition="CM7_IAR"/>
1645       <require Dendian="Big-endian"/>
1646     </condition>
1647
1648     <condition id="CM7_FP_IAR">
1649       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1650       <require condition="CM7_FP"/>
1651       <require Tcompiler="IAR"/>
1652     </condition>
1653     <condition id="CM7_FP_LE_IAR">
1654       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1655       <require condition="CM7_FP_IAR"/>
1656       <require Dendian="Little-endian"/>
1657     </condition>
1658     <condition id="CM7_FP_BE_IAR">
1659       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1660       <require condition="CM7_FP_IAR"/>
1661       <require Dendian="Big-endian"/>
1662     </condition>
1663
1664     <condition id="CM7_SP_IAR">
1665       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1666       <require condition="CM7_SP"/>
1667       <require Tcompiler="IAR"/>
1668     </condition>
1669     <condition id="CM7_SP_LE_IAR">
1670       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1671       <require condition="CM7_SP_IAR"/>
1672       <require Dendian="Little-endian"/>
1673     </condition>
1674     <condition id="CM7_SP_BE_IAR">
1675       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1676       <require condition="CM7_SP_IAR"/>
1677       <require Dendian="Big-endian"/>
1678     </condition>
1679
1680     <condition id="CM7_DP_IAR">
1681       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1682       <require condition="CM7_DP"/>
1683       <require Tcompiler="IAR"/>
1684     </condition>
1685     <condition id="CM7_DP_LE_IAR">
1686       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1687       <require condition="CM7_DP_IAR"/>
1688       <require Dendian="Little-endian"/>
1689     </condition>
1690     <condition id="CM7_DP_BE_IAR">
1691       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1692       <require condition="CM7_DP_IAR"/>
1693       <require Dendian="Big-endian"/>
1694     </condition>
1695
1696     <condition id="CM23_IAR">
1697       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1698       <require condition="CM23"/>
1699       <require Tcompiler="IAR"/>
1700     </condition>
1701     <condition id="CM23_LE_IAR">
1702       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1703       <require condition="CM23_IAR"/>
1704       <require Dendian="Little-endian"/>
1705     </condition>
1706     <condition id="CM23_BE_IAR">
1707       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
1708       <require condition="CM23_IAR"/>
1709       <require Dendian="Big-endian"/>
1710     </condition>
1711
1712     <condition id="CM33_IAR">
1713       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1714       <require condition="CM33"/>
1715       <require Tcompiler="IAR"/>
1716     </condition>
1717     <condition id="CM33_LE_IAR">
1718       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1719       <require condition="CM33_IAR"/>
1720       <require Dendian="Little-endian"/>
1721     </condition>
1722     <condition id="CM33_BE_IAR">
1723       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
1724       <require condition="CM33_IAR"/>
1725       <require Dendian="Big-endian"/>
1726     </condition>
1727
1728     <condition id="CM33_FP_IAR">
1729       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1730       <require condition="CM33_FP"/>
1731       <require Tcompiler="IAR"/>
1732     </condition>
1733     <condition id="CM33_FP_LE_IAR">
1734       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1735       <require condition="CM33_FP_IAR"/>
1736       <require Dendian="Little-endian"/>
1737     </condition>
1738     <condition id="CM33_FP_BE_IAR">
1739       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1740       <require condition="CM33_FP_IAR"/>
1741       <require Dendian="Big-endian"/>
1742     </condition>
1743
1744     <condition id="CM33_NODSP_NOFPU_IAR">
1745       <description>CM33, no DSP, no FPU, IAR Compiler</description>
1746       <require condition="CM33_NODSP_NOFPU"/>
1747       <require Tcompiler="IAR"/>
1748     </condition>
1749     <condition id="CM33_DSP_NOFPU_IAR">
1750       <description>CM33, DSP, no FPU, IAR Compiler</description>
1751       <require condition="CM33_DSP_NOFPU"/>
1752       <require Tcompiler="IAR"/>
1753     </condition>
1754     <condition id="CM33_NODSP_SP_IAR">
1755       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
1756       <require condition="CM33_NODSP_SP"/>
1757       <require Tcompiler="IAR"/>
1758     </condition>
1759     <condition id="CM33_DSP_SP_IAR">
1760       <description>CM33, DSP, SP FPU, IAR Compiler</description>
1761       <require condition="CM33_DSP_SP"/>
1762       <require Tcompiler="IAR"/>
1763     </condition>
1764     <condition id="CM33_NODSP_NOFPU_LE_IAR">
1765       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
1766       <require condition="CM33_NODSP_NOFPU_IAR"/>
1767       <require Dendian="Little-endian"/>
1768     </condition>
1769     <condition id="CM33_DSP_NOFPU_LE_IAR">
1770       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
1771       <require condition="CM33_DSP_NOFPU_IAR"/>
1772       <require Dendian="Little-endian"/>
1773     </condition>
1774     <condition id="CM33_NODSP_SP_LE_IAR">
1775       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
1776       <require condition="CM33_NODSP_SP_IAR"/>
1777       <require Dendian="Little-endian"/>
1778     </condition>
1779     <condition id="CM33_DSP_SP_LE_IAR">
1780       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
1781       <require condition="CM33_DSP_SP_IAR"/>
1782       <require Dendian="Little-endian"/>
1783     </condition>
1784
1785     <condition id="ARMv8MBL_IAR">
1786       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1787       <require condition="ARMv8MBL"/>
1788       <require Tcompiler="IAR"/>
1789     </condition>
1790     <condition id="ARMv8MBL_LE_IAR">
1791       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1792       <require condition="ARMv8MBL_IAR"/>
1793       <require Dendian="Little-endian"/>
1794     </condition>
1795     <condition id="ARMv8MBL_BE_IAR">
1796       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
1797       <require condition="ARMv8MBL_IAR"/>
1798       <require Dendian="Big-endian"/>
1799     </condition>
1800
1801     <condition id="ARMv8MML_IAR">
1802       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1803       <require condition="ARMv8MML"/>
1804       <require Tcompiler="IAR"/>
1805     </condition>
1806     <condition id="ARMv8MML_LE_IAR">
1807       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1808       <require condition="ARMv8MML_IAR"/>
1809       <require Dendian="Little-endian"/>
1810     </condition>
1811     <condition id="ARMv8MML_BE_IAR">
1812       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
1813       <require condition="ARMv8MML_IAR"/>
1814       <require Dendian="Big-endian"/>
1815     </condition>
1816
1817     <condition id="ARMv8MML_FP_IAR">
1818       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1819       <require condition="ARMv8MML_FP"/>
1820       <require Tcompiler="IAR"/>
1821     </condition>
1822     <condition id="ARMv8MML_FP_LE_IAR">
1823       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1824       <require condition="ARMv8MML_FP_IAR"/>
1825       <require Dendian="Little-endian"/>
1826     </condition>
1827     <condition id="ARMv8MML_FP_BE_IAR">
1828       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1829       <require condition="ARMv8MML_FP_IAR"/>
1830       <require Dendian="Big-endian"/>
1831     </condition>
1832
1833     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
1834       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
1835       <require condition="ARMv8MML_NODSP_NOFPU"/>
1836       <require Tcompiler="IAR"/>
1837     </condition>
1838     <condition id="ARMv8MML_DSP_NOFPU_IAR">
1839       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
1840       <require condition="ARMv8MML_DSP_NOFPU"/>
1841       <require Tcompiler="IAR"/>
1842     </condition>
1843     <condition id="ARMv8MML_NODSP_SP_IAR">
1844       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
1845       <require condition="ARMv8MML_NODSP_SP"/>
1846       <require Tcompiler="IAR"/>
1847     </condition>
1848     <condition id="ARMv8MML_DSP_SP_IAR">
1849       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
1850       <require condition="ARMv8MML_DSP_SP"/>
1851       <require Tcompiler="IAR"/>
1852     </condition>
1853     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
1854       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
1855       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
1856       <require Dendian="Little-endian"/>
1857     </condition>
1858     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
1859       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
1860       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
1861       <require Dendian="Little-endian"/>
1862     </condition>
1863     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
1864       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
1865       <require condition="ARMv8MML_NODSP_SP_IAR"/>
1866       <require Dendian="Little-endian"/>
1867     </condition>
1868     <condition id="ARMv8MML_DSP_SP_LE_IAR">
1869       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
1870       <require condition="ARMv8MML_DSP_SP_IAR"/>
1871       <require Dendian="Little-endian"/>
1872     </condition>
1873
1874     <!-- conditions selecting single devices and CMSIS Core -->
1875     <!-- used for component startup, GCC version is used for C-Startup -->
1876     <condition id="ARMCM0 CMSIS">
1877       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
1878       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1879       <require Cclass="CMSIS" Cgroup="CORE"/>
1880     </condition>
1881     <condition id="ARMCM0 CMSIS GCC">
1882       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1883       <require condition="ARMCM0 CMSIS"/>
1884       <require condition="GCC"/>
1885     </condition>
1886
1887     <condition id="ARMCM0+ CMSIS">
1888       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
1889       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1890       <require Cclass="CMSIS" Cgroup="CORE"/>
1891     </condition>
1892     <condition id="ARMCM0+ CMSIS GCC">
1893       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1894       <require condition="ARMCM0+ CMSIS"/>
1895       <require condition="GCC"/>
1896     </condition>
1897
1898     <condition id="ARMCM3 CMSIS">
1899       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
1900       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1901       <require Cclass="CMSIS" Cgroup="CORE"/>
1902     </condition>
1903     <condition id="ARMCM3 CMSIS GCC">
1904       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1905       <require condition="ARMCM3 CMSIS"/>
1906       <require condition="GCC"/>
1907     </condition>
1908
1909     <condition id="ARMCM4 CMSIS">
1910       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
1911       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1912       <require Cclass="CMSIS" Cgroup="CORE"/>
1913     </condition>
1914     <condition id="ARMCM4 CMSIS GCC">
1915       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1916       <require condition="ARMCM4 CMSIS"/>
1917       <require condition="GCC"/>
1918     </condition>
1919
1920     <condition id="ARMCM7 CMSIS">
1921       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
1922       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1923       <require Cclass="CMSIS" Cgroup="CORE"/>
1924     </condition>
1925     <condition id="ARMCM7 CMSIS GCC">
1926       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1927       <require condition="ARMCM7 CMSIS"/>
1928       <require condition="GCC"/>
1929     </condition>
1930
1931     <condition id="ARMCM23 CMSIS">
1932       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
1933       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1934       <require Cclass="CMSIS" Cgroup="CORE"/>
1935     </condition>
1936     <condition id="ARMCM23 CMSIS GCC">
1937       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1938       <require condition="ARMCM23 CMSIS"/>
1939       <require condition="GCC"/>
1940     </condition>
1941
1942     <condition id="ARMCM33 CMSIS">
1943       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
1944       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1945       <require Cclass="CMSIS" Cgroup="CORE"/>
1946     </condition>
1947     <condition id="ARMCM33 CMSIS GCC">
1948       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1949       <require condition="ARMCM33 CMSIS"/>
1950       <require condition="GCC"/>
1951     </condition>
1952
1953     <condition id="ARMSC000 CMSIS">
1954       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
1955       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1956       <require Cclass="CMSIS" Cgroup="CORE"/>
1957     </condition>
1958     <condition id="ARMSC000 CMSIS GCC">
1959       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
1960       <require condition="ARMSC000 CMSIS"/>
1961       <require condition="GCC"/>
1962     </condition>
1963
1964     <condition id="ARMSC300 CMSIS">
1965       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
1966       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1967       <require Cclass="CMSIS" Cgroup="CORE"/>
1968     </condition>
1969     <condition id="ARMSC300 CMSIS GCC">
1970       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
1971       <require condition="ARMSC300 CMSIS"/>
1972       <require condition="GCC"/>
1973     </condition>
1974
1975     <condition id="ARMv8MBL CMSIS">
1976       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
1977       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1978       <require Cclass="CMSIS" Cgroup="CORE"/>
1979     </condition>
1980     <condition id="ARMv8MBL CMSIS GCC">
1981       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
1982       <require condition="ARMv8MBL CMSIS"/>
1983       <require condition="GCC"/>
1984     </condition>
1985
1986     <condition id="ARMv8MML CMSIS">
1987       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
1988       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1989       <require Cclass="CMSIS" Cgroup="CORE"/>
1990     </condition>
1991     <condition id="ARMv8MML CMSIS GCC">
1992       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
1993       <require condition="ARMv8MML CMSIS"/>
1994       <require condition="GCC"/>
1995     </condition>
1996
1997     <condition id="ARMCA5 CMSIS">
1998       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
1999       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2000       <require Cclass="CMSIS" Cgroup="CORE"/>
2001     </condition>
2002
2003     <condition id="ARMCA7 CMSIS">
2004       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2005       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2006       <require Cclass="CMSIS" Cgroup="CORE"/>
2007     </condition>
2008
2009     <condition id="ARMCA9 CMSIS">
2010       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2011       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2012       <require Cclass="CMSIS" Cgroup="CORE"/>
2013     </condition>
2014
2015     <!-- CMSIS DSP -->
2016     <condition id="CMSIS DSP">
2017       <description>Components required for DSP</description>
2018       <require condition="ARMv6_7_8-M Device"/>
2019       <require condition="ARMCC GCC IAR"/>
2020       <require Cclass="CMSIS" Cgroup="CORE"/>
2021     </condition>
2022
2023     <!-- CMSIS NN -->
2024     <condition id="CMSIS NN">
2025       <description>Components required for NN</description>
2026       <require condition="CMSIS DSP"/>
2027     </condition>
2028
2029     <!-- RTOS RTX -->
2030     <condition id="RTOS RTX">
2031       <description>Components required for RTOS RTX</description>
2032       <require condition="ARMv6_7-M Device"/>
2033       <require condition="ARMCC GCC IAR"/>
2034       <require Cclass="Device" Cgroup="Startup"/>
2035       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2036     </condition>
2037     <condition id="RTOS RTX IFX">
2038       <description>Components required for RTOS RTX IFX</description>
2039       <require condition="ARMv6_7-M Device"/>
2040       <require condition="ARMCC GCC IAR"/>
2041       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2042       <require Cclass="Device" Cgroup="Startup"/>
2043       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2044     </condition>
2045     <condition id="RTOS RTX5">
2046       <description>Components required for RTOS RTX5</description>
2047       <require condition="ARMv6_7_8-M Device"/>
2048       <require condition="ARMCC GCC IAR"/>
2049       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2050     </condition>
2051     <condition id="RTOS2 RTX5">
2052       <description>Components required for RTOS2 RTX5</description>
2053       <require condition="ARMv6_7_8-M Device"/>
2054       <require condition="ARMCC GCC IAR"/>
2055       <require Cclass="CMSIS"  Cgroup="CORE"/>
2056       <require Cclass="Device" Cgroup="Startup"/>
2057     </condition>
2058     <condition id="RTOS2 RTX5 v7-A">
2059       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2060       <require condition="ARMv7-A Device"/>
2061       <require condition="ARMCC GCC IAR"/>
2062       <require Cclass="CMSIS"  Cgroup="CORE"/>
2063       <require Cclass="Device" Cgroup="Startup"/>
2064       <require Cclass="Device" Cgroup="OS Tick"/>
2065       <require Cclass="Device" Cgroup="IRQ Controller"/>
2066     </condition>
2067     <condition id="RTOS2 RTX5 Lib">
2068       <description>Components required for RTOS2 RTX5 Library</description>
2069       <require condition="ARMv6_7_8-M Device"/>
2070       <require condition="ARMCC GCC IAR"/>
2071       <require Cclass="CMSIS"  Cgroup="CORE"/>
2072       <require Cclass="Device" Cgroup="Startup"/>
2073     </condition>
2074     <condition id="RTOS2 RTX5 NS">
2075       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2076       <require condition="ARMv8-M TZ Device"/>
2077       <require condition="ARMCC GCC IAR"/>
2078       <require Cclass="CMSIS"  Cgroup="CORE"/>
2079       <require Cclass="Device" Cgroup="Startup"/>
2080     </condition>
2081
2082     <!-- OS Tick -->
2083     <condition id="OS Tick PTIM">
2084       <description>Components required for OS Tick Private Timer</description>
2085       <require condition="CA5_CA9"/>
2086       <require Cclass="Device" Cgroup="IRQ Controller"/>
2087     </condition>
2088
2089     <condition id="OS Tick GTIM">
2090       <description>Components required for OS Tick Generic Physical Timer</description>
2091       <require condition="CA7"/>
2092       <require Cclass="Device" Cgroup="IRQ Controller"/>
2093     </condition>
2094
2095   </conditions>
2096
2097   <components>
2098     <!-- CMSIS-Core component -->
2099     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.1.1"  condition="ARMv6_7_8-M Device" >
2100       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
2101       <files>
2102         <!-- CPU independent -->
2103         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2104         <file category="include" name="CMSIS/Core/Include/"/>
2105         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2106         <!-- Code template -->
2107         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
2108         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2109       </files>
2110     </component>
2111
2112     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.1"  condition="ARMv7-A Device" >
2113       <description>CMSIS-CORE for Cortex-A</description>
2114       <files>
2115         <!-- CPU independent -->
2116         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2117         <file category="include" name="CMSIS/Core_A/Include/"/>
2118       </files>
2119     </component>
2120
2121     <!-- CMSIS-Startup components -->
2122     <!-- Cortex-M0 -->
2123     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
2124       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2125       <files>
2126         <!-- include folder / device header file -->
2127         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2128         <!-- startup / system file -->
2129         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2130         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
2131         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2132         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2133         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2134       </files>
2135     </component>
2136     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
2137       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2138       <files>
2139         <!-- include folder / device header file -->
2140         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2141         <!-- startup / system file -->
2142         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
2143         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2144         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2145       </files>
2146     </component>
2147
2148     <!-- Cortex-M0+ -->
2149     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
2150       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2151       <files>
2152         <!-- include folder / device header file -->
2153         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2154         <!-- startup / system file -->
2155         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2156         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
2157         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2158         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2159         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2160       </files>
2161     </component>
2162     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
2163       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2164       <files>
2165         <!-- include folder / device header file -->
2166         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2167         <!-- startup / system file -->
2168         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
2169         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2170         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2171       </files>
2172     </component>
2173
2174     <!-- Cortex-M3 -->
2175     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
2176       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2177       <files>
2178         <!-- include folder / device header file -->
2179         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2180         <!-- startup / system file -->
2181         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2182         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
2183         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2184         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2185         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2186       </files>
2187     </component>
2188     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
2189       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2190       <files>
2191         <!-- include folder / device header file -->
2192         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2193         <!-- startup / system file -->
2194         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
2195         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2196         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2197       </files>
2198     </component>
2199
2200     <!-- Cortex-M4 -->
2201     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
2202       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2203       <files>
2204         <!-- include folder / device header file -->
2205         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2206         <!-- startup / system file -->
2207         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2208         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2209         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2210         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2211         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2212       </files>
2213     </component>
2214     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2215       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2216       <files>
2217         <!-- include folder / device header file -->
2218         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2219         <!-- startup / system file -->
2220         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2221         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2222         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2223       </files>
2224     </component>
2225
2226     <!-- Cortex-M7 -->
2227     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2228       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2229       <files>
2230         <!-- include folder / device header file -->
2231         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2232         <!-- startup / system file -->
2233         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2234         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2235         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2236         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2237         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2238       </files>
2239     </component>
2240     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2241       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2242       <files>
2243         <!-- include folder / device header file -->
2244         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2245         <!-- startup / system file -->
2246         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2247         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2248         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2249       </files>
2250     </component>
2251
2252     <!-- Cortex-M23 -->
2253     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2254       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2255       <files>
2256         <!-- include folder / device header file -->
2257         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2258         <!-- startup / system file -->
2259         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2260         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2261         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2262         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2263         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2264         <!-- SAU configuration -->
2265         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2266       </files>
2267     </component>
2268     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2269       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2270       <files>
2271         <!-- include folder / device header file -->
2272         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2273         <!-- startup / system file -->
2274         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2275         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2276         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2277         <!-- SAU configuration -->
2278         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2279       </files>
2280     </component>
2281
2282     <!-- Cortex-M33 -->
2283     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2284       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2285       <files>
2286         <!-- include folder / device header file -->
2287         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2288         <!-- startup / system file -->
2289         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2290         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2291         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2292         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2293         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2294         <!-- SAU configuration -->
2295         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2296       </files>
2297     </component>
2298     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2299       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2300       <files>
2301         <!-- include folder / device header file -->
2302         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2303         <!-- startup / system file -->
2304         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2305         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2306         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2307         <!-- SAU configuration -->
2308         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2309       </files>
2310     </component>
2311
2312     <!-- Cortex-SC000 -->
2313     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2314       <description>System and Startup for Generic Arm SC000 device</description>
2315       <files>
2316         <!-- include folder / device header file -->
2317         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2318         <!-- startup / system file -->
2319         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2320         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2321         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2322         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2323         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2324       </files>
2325     </component>
2326     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2327       <description>System and Startup for Generic Arm SC000 device</description>
2328       <files>
2329         <!-- include folder / device header file -->
2330         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2331         <!-- startup / system file -->
2332         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2333         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2334         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2335       </files>
2336     </component>
2337
2338     <!-- Cortex-SC300 -->
2339     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2340       <description>System and Startup for Generic Arm SC300 device</description>
2341       <files>
2342         <!-- include folder / device header file -->
2343         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2344         <!-- startup / system file -->
2345         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2346         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2347         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2348         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2349         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2350       </files>
2351     </component>
2352     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2353       <description>System and Startup for Generic Arm SC300 device</description>
2354       <files>
2355         <!-- include folder / device header file -->
2356         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2357         <!-- startup / system file -->
2358         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2359         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2360         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2361       </files>
2362     </component>
2363
2364     <!-- ARMv8MBL -->
2365     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2366       <description>System and Startup for Generic Armv8-M Baseline device</description>
2367       <files>
2368         <!-- include folder / device header file -->
2369         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2370         <!-- startup / system file -->
2371         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2372         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2373         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2374         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2375         <!-- SAU configuration -->
2376         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2377       </files>
2378     </component>
2379     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2380       <description>System and Startup for Generic Armv8-M Baseline device</description>
2381       <files>
2382         <!-- include folder / device header file -->
2383         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2384         <!-- startup / system file -->
2385         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2386         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2387         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2388         <!-- SAU configuration -->
2389         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2390       </files>
2391     </component>
2392
2393     <!-- ARMv8MML -->
2394     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2395       <description>System and Startup for Generic Armv8-M Mainline device</description>
2396       <files>
2397         <!-- include folder / device header file -->
2398         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2399         <!-- startup / system file -->
2400         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2401         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2402         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2403         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2404         <!-- SAU configuration -->
2405         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2406       </files>
2407     </component>
2408     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2409       <description>System and Startup for Generic Armv8-M Mainline device</description>
2410       <files>
2411         <!-- include folder / device header file -->
2412         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2413         <!-- startup / system file -->
2414         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2415         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2416         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2417         <!-- SAU configuration -->
2418         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2419       </files>
2420     </component>
2421
2422     <!-- Cortex-A5 -->
2423     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2424       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2425       <files>
2426         <!-- include folder / device header file -->
2427         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2428         <!-- startup / system / mmu files -->
2429         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2430         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2431         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2432         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2433         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2434         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2435         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2436         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2437         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2438         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2439         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2440         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2441
2442       </files>
2443     </component>
2444
2445     <!-- Cortex-A7 -->
2446     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2447       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2448       <files>
2449         <!-- include folder / device header file -->
2450         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2451         <!-- startup / system / mmu files -->
2452         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2453         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2454         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2455         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2456         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2457         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2458         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2459         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2460         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2461         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2462         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2463         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2464       </files>
2465     </component>
2466
2467     <!-- Cortex-A9 -->
2468     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2469       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2470       <files>
2471         <!-- include folder / device header file -->
2472         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2473         <!-- startup / system / mmu files -->
2474         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2475         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2476         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2477         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2478         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2479         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2480         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2481         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2482         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2483         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2484         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2485         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2486       </files>
2487     </component>
2488
2489     <!-- IRQ Controller -->
2490     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2491       <description>IRQ Controller implementation using GIC</description>
2492       <files>
2493         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2494       </files>
2495     </component>
2496
2497     <!-- OS Tick -->
2498     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2499       <description>OS Tick implementation using Private Timer</description>
2500       <files>
2501         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2502       </files>
2503     </component>
2504
2505     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2506       <description>OS Tick implementation using Generic Physical Timer</description>
2507       <files>
2508         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2509       </files>
2510     </component>
2511
2512     <!-- CMSIS-DSP component -->
2513     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2514       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2515       <files>
2516         <!-- CPU independent -->
2517         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2518         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
2519
2520         <!-- CPU and Compiler dependent -->
2521         <!-- ARMCC -->
2522         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2523         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2524         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2525         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2526         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2527         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2528         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2529         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2530         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2531         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2532         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2533         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2534         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2535         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2536
2537         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2538         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2539         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2540         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2541         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2542         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2543         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2544         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2545         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2546         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2547         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
2548         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
2549
2550         <!-- GCC -->
2551         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2552         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2553         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2554         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
2555         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2556         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2557         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2558
2559         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2560         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2561         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2562         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2563         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2564         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2565         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2566         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2567         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2568         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2569         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
2570         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
2571
2572         <!-- IAR -->
2573         <file category="library" condition="CM0_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2574         <file category="library" condition="CM0_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2575         <file category="library" condition="CM3_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2576         <file category="library" condition="CM3_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2577         <file category="library" condition="CM4_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2578         <file category="library" condition="CM4_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2579         <file category="library" condition="CM4_FP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2580         <file category="library" condition="CM4_FP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2581         <file category="library" condition="CM7_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2582         <file category="library" condition="CM7_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2583         <file category="library" condition="CM7_DP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2584         <file category="library" condition="CM7_DP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2585         <file category="library" condition="CM7_SP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
2586         <file category="library" condition="CM7_SP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
2587
2588         <file category="library" condition="CM23_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2589         <file category="library" condition="CM33_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2590         <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2591         <file category="library" condition="CM33_FP_LE_IAR"           name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2592         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"    name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
2593         <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
2594         <!--file category="library" condition="CM33_DSP_DP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
2595         <file category="library" condition="ARMv8MBL_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2596         <file category="library" condition="ARMv8MML_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2597         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2598         <file category="library" condition="ARMv8MML_FP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2599         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
2600         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
2601         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
2602
2603       </files>
2604     </component>
2605
2606     <!-- CMSIS-NN component -->
2607     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.0.0" condition="CMSIS NN">
2608       <description>CMSIS-NN Neural Network Library</description>
2609       <files>
2610         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2611         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2612
2613         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2614         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2615         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2616         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2617
2618         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2619         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2620         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2621         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2622         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2623         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2624         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2625         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2626         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2627         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2628         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2629
2630         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2631         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2632         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2633         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2634         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2635         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2636
2637         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2638         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2639         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2640
2641         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2642
2643         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2644         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2645       </files>
2646     </component>
2647
2648     <!-- CMSIS-RTOS Keil RTX component -->
2649     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2650       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2651       <RTE_Components_h>
2652         <!-- the following content goes into file 'RTE_Components.h' -->
2653         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2654         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2655       </RTE_Components_h>
2656       <files>
2657         <!-- CPU independent -->
2658         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2659         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2660         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2661
2662         <!-- RTX templates -->
2663         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2664         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2665         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2666         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2667         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2668         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2669         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2670         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2671         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2672         <!-- tool-chain specific template file -->
2673         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2674         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2675         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2676
2677         <!-- CPU and Compiler dependent -->
2678         <!-- ARMCC -->
2679         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2680         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2681         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2682         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2683         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2684         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2685         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2686         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2687         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2688         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2689         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2690         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2691         <!-- GCC -->
2692         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2693         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2694         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2695         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2696         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2697         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2698         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2699         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2700         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2701         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2702         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2703         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2704         <!-- IAR -->
2705         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2706         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2707         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2708         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2709         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2710         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2711         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2712         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2713         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2714         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2715         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2716         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2717       </files>
2718     </component>
2719     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2720     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2721       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2722       <RTE_Components_h>
2723         <!-- the following content goes into file 'RTE_Components.h' -->
2724         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2725         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2726       </RTE_Components_h>
2727       <files>
2728         <!-- CPU independent -->
2729         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2730         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2731         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2732
2733         <!-- RTX templates -->
2734         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2735         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2736         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2737         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2738         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2739         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2740         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2741         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2742         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2743         <!-- tool-chain specific template file -->
2744         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2745         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2746         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2747
2748         <!-- CPU and Compiler dependent -->
2749         <!-- ARMCC -->
2750         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2751         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2752         <!-- GCC -->
2753         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2754         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2755         <!-- IAR -->
2756       </files>
2757     </component>
2758
2759     <!-- CMSIS-RTOS Keil RTX5 component -->
2760     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.4.0" Capiversion="1.0.0" condition="RTOS RTX5">
2761       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2762       <RTE_Components_h>
2763         <!-- the following content goes into file 'RTE_Components.h' -->
2764         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2765         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2766       </RTE_Components_h>
2767       <files>
2768         <!-- RTX header file -->
2769         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2770         <!-- RTX compatibility module for API V1 -->
2771         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2772       </files>
2773     </component>
2774
2775     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2776     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
2777       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
2778       <RTE_Components_h>
2779         <!-- the following content goes into file 'RTE_Components.h' -->
2780         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2781         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2782       </RTE_Components_h>
2783       <files>
2784         <!-- RTX documentation -->
2785         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2786
2787         <!-- RTX header files -->
2788         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2789
2790         <!-- RTX configuration -->
2791         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2792         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2793
2794         <!-- RTX templates -->
2795         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2796         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2797         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2798         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2799         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2800         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2801         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2802         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2803         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2804         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2805
2806         <!-- RTX library configuration -->
2807         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2808
2809         <!-- RTX libraries (CPU and Compiler dependent) -->
2810         <!-- ARMCC -->
2811         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2812         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2813         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2814         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2815         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2816         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2817         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2818         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2819         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2820         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2821         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2822         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2823         <!-- GCC -->
2824         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2825         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2826         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2827         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2828         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2829         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2830         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2831         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2832         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2833         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2834         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2835         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2836         <!-- IAR -->
2837         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2838         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2839         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2840         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2841         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2842         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2843       </files>
2844     </component>
2845     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
2846       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
2847       <RTE_Components_h>
2848         <!-- the following content goes into file 'RTE_Components.h' -->
2849         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2850         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2851         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2852       </RTE_Components_h>
2853       <files>
2854         <!-- RTX documentation -->
2855         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2856
2857         <!-- RTX header files -->
2858         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2859
2860         <!-- RTX configuration -->
2861         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2862         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2863
2864         <!-- RTX templates -->
2865         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2866         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2867         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2868         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2869         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2870         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2871         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2872         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2873         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2874         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2875
2876         <!-- RTX library configuration -->
2877         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2878
2879         <!-- RTX libraries (CPU and Compiler dependent) -->
2880         <!-- ARMCC -->
2881         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2882         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2883         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2884         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2885         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2886         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2887         <!-- GCC -->
2888         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2889         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2890         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2891         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2892         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2893         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2894       </files>
2895     </component>
2896     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5">
2897       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
2898       <RTE_Components_h>
2899         <!-- the following content goes into file 'RTE_Components.h' -->
2900         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2901         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2902         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2903       </RTE_Components_h>
2904       <files>
2905         <!-- RTX documentation -->
2906         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2907
2908         <!-- RTX header files -->
2909         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2910
2911         <!-- RTX configuration -->
2912         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2913         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2914
2915         <!-- RTX templates -->
2916         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2917         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2918         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2919         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2920         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2921         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2922         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2923         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2924         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2925         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2926
2927         <!-- RTX sources (core) -->
2928         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2929         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2930         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2931         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2932         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2933         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2934         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2935         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2936         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2937         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2938         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2939         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2940         <!-- RTX sources (library configuration) -->
2941         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2942         <!-- RTX sources (handlers ARMCC) -->
2943         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2944         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2945         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2946         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2947         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2948         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2949         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2950         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2951         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2952         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2953         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2954         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2955         <!-- RTX sources (handlers GCC) -->
2956         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2957         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2958         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2959         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2960         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2961         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2962         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2963         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2964         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2965         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2966         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2967         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2968         <!-- RTX sources (handlers IAR) -->
2969         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2970         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2971         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2972         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2973         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2974         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2975         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
2976         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
2977         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
2978         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
2979         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
2980         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
2981         <!-- OS Tick (SysTick) -->
2982         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2983       </files>
2984     </component>
2985     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
2986       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
2987       <RTE_Components_h>
2988         <!-- the following content goes into file 'RTE_Components.h' -->
2989         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2990         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2991         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2992       </RTE_Components_h>
2993       <files>
2994         <!-- RTX documentation -->
2995         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2996
2997         <!-- RTX header files -->
2998         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2999
3000         <!-- RTX configuration -->
3001         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3002         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3003
3004         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3005
3006         <!-- RTX templates -->
3007         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3008         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3009         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3010         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3011         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3012         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3013         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3014         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3015         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3016         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3017
3018         <!-- RTX sources (core) -->
3019         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3020         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3021         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3022         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3023         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3024         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3025         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3026         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3027         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3028         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3029         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3030         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3031         <!-- RTX sources (library configuration) -->
3032         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3033         <!-- RTX sources (handlers ARMCC) -->
3034         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3035         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3036         <!-- RTX sources (handlers GCC) -->
3037         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3038         <!-- RTX sources (handlers IAR) -->
3039         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3040       </files>
3041     </component>
3042     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3043       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3044       <RTE_Components_h>
3045         <!-- the following content goes into file 'RTE_Components.h' -->
3046         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3047         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3048         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3049         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3050       </RTE_Components_h>
3051       <files>
3052         <!-- RTX documentation -->
3053         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3054
3055         <!-- RTX header files -->
3056         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3057
3058         <!-- RTX configuration -->
3059         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3060         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3061
3062         <!-- RTX templates -->
3063         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3064         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3065         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3066         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3067         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3068         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3069         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3070         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3071         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3072         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3073
3074         <!-- RTX sources (core) -->
3075         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3076         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3077         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3078         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3079         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3080         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3081         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3082         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3083         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3084         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3085         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3086         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3087         <!-- RTX sources (library configuration) -->
3088         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3089         <!-- RTX sources (ARMCC handlers) -->
3090         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3091         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3092         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3093         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3094         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3095         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3096         <!-- RTX sources (GCC handlers) -->
3097         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3098         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3099         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3100         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3101         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3102         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3103         <!-- RTX sources (IAR handlers) -->
3104         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3105         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3106         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3107         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3108         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3109         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3110         <!-- OS Tick (SysTick) -->
3111         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3112       </files>
3113     </component>
3114
3115   </components>
3116
3117   <boards>
3118     <board name="uVision Simulator" vendor="Keil">
3119       <description>uVision Simulator</description>
3120       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3121       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3122       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3123       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3124       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3125       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3126       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3127       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3128       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3129       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3130       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3131       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3132       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3133       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3134       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3135       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3136       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3137       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3138       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3139     </board>
3140
3141     <board name="Fixed Virtual Platform" vendor="ARM">
3142       <description>Fixed Virtual Platform</description>
3143       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
3144       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
3145       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
3146     </board>
3147   </boards>
3148
3149   <examples>
3150     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3151       <description>DSP_Lib Class Marks example</description>
3152       <board name="uVision Simulator" vendor="Keil"/>
3153       <project>
3154         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3155       </project>
3156       <attributes>
3157         <component Cclass="CMSIS" Cgroup="CORE"/>
3158         <component Cclass="CMSIS" Cgroup="DSP"/>
3159         <component Cclass="Device" Cgroup="Startup"/>
3160         <category>Getting Started</category>
3161       </attributes>
3162     </example>
3163
3164     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3165       <description>DSP_Lib Convolution example</description>
3166       <board name="uVision Simulator" vendor="Keil"/>
3167       <project>
3168         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3169       </project>
3170       <attributes>
3171         <component Cclass="CMSIS" Cgroup="CORE"/>
3172         <component Cclass="CMSIS" Cgroup="DSP"/>
3173         <component Cclass="Device" Cgroup="Startup"/>
3174         <category>Getting Started</category>
3175       </attributes>
3176     </example>
3177
3178     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3179       <description>DSP_Lib Dotproduct example</description>
3180       <board name="uVision Simulator" vendor="Keil"/>
3181       <project>
3182         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3183       </project>
3184       <attributes>
3185         <component Cclass="CMSIS" Cgroup="CORE"/>
3186         <component Cclass="CMSIS" Cgroup="DSP"/>
3187         <component Cclass="Device" Cgroup="Startup"/>
3188         <category>Getting Started</category>
3189       </attributes>
3190     </example>
3191
3192     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3193       <description>DSP_Lib FFT Bin example</description>
3194       <board name="uVision Simulator" vendor="Keil"/>
3195       <project>
3196         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3197       </project>
3198       <attributes>
3199         <component Cclass="CMSIS" Cgroup="CORE"/>
3200         <component Cclass="CMSIS" Cgroup="DSP"/>
3201         <component Cclass="Device" Cgroup="Startup"/>
3202         <category>Getting Started</category>
3203       </attributes>
3204     </example>
3205
3206     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3207       <description>DSP_Lib FIR example</description>
3208       <board name="uVision Simulator" vendor="Keil"/>
3209       <project>
3210         <environment name="uv" load="arm_fir_example.uvprojx"/>
3211       </project>
3212       <attributes>
3213         <component Cclass="CMSIS" Cgroup="CORE"/>
3214         <component Cclass="CMSIS" Cgroup="DSP"/>
3215         <component Cclass="Device" Cgroup="Startup"/>
3216         <category>Getting Started</category>
3217       </attributes>
3218     </example>
3219
3220     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3221       <description>DSP_Lib Graphic Equalizer example</description>
3222       <board name="uVision Simulator" vendor="Keil"/>
3223       <project>
3224         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3225       </project>
3226       <attributes>
3227         <component Cclass="CMSIS" Cgroup="CORE"/>
3228         <component Cclass="CMSIS" Cgroup="DSP"/>
3229         <component Cclass="Device" Cgroup="Startup"/>
3230         <category>Getting Started</category>
3231       </attributes>
3232     </example>
3233
3234     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3235       <description>DSP_Lib Linear Interpolation example</description>
3236       <board name="uVision Simulator" vendor="Keil"/>
3237       <project>
3238         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3239       </project>
3240       <attributes>
3241         <component Cclass="CMSIS" Cgroup="CORE"/>
3242         <component Cclass="CMSIS" Cgroup="DSP"/>
3243         <component Cclass="Device" Cgroup="Startup"/>
3244         <category>Getting Started</category>
3245       </attributes>
3246     </example>
3247
3248     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3249       <description>DSP_Lib Matrix example</description>
3250       <board name="uVision Simulator" vendor="Keil"/>
3251       <project>
3252         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3253       </project>
3254       <attributes>
3255         <component Cclass="CMSIS" Cgroup="CORE"/>
3256         <component Cclass="CMSIS" Cgroup="DSP"/>
3257         <component Cclass="Device" Cgroup="Startup"/>
3258         <category>Getting Started</category>
3259       </attributes>
3260     </example>
3261
3262     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3263       <description>DSP_Lib Signal Convergence example</description>
3264       <board name="uVision Simulator" vendor="Keil"/>
3265       <project>
3266         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3267       </project>
3268       <attributes>
3269         <component Cclass="CMSIS" Cgroup="CORE"/>
3270         <component Cclass="CMSIS" Cgroup="DSP"/>
3271         <component Cclass="Device" Cgroup="Startup"/>
3272         <category>Getting Started</category>
3273       </attributes>
3274     </example>
3275
3276     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3277       <description>DSP_Lib Sinus/Cosinus example</description>
3278       <board name="uVision Simulator" vendor="Keil"/>
3279       <project>
3280         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3281       </project>
3282       <attributes>
3283         <component Cclass="CMSIS" Cgroup="CORE"/>
3284         <component Cclass="CMSIS" Cgroup="DSP"/>
3285         <component Cclass="Device" Cgroup="Startup"/>
3286         <category>Getting Started</category>
3287       </attributes>
3288     </example>
3289
3290     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3291       <description>DSP_Lib Variance example</description>
3292       <board name="uVision Simulator" vendor="Keil"/>
3293       <project>
3294         <environment name="uv" load="arm_variance_example.uvprojx"/>
3295       </project>
3296       <attributes>
3297         <component Cclass="CMSIS" Cgroup="CORE"/>
3298         <component Cclass="CMSIS" Cgroup="DSP"/>
3299         <component Cclass="Device" Cgroup="Startup"/>
3300         <category>Getting Started</category>
3301       </attributes>
3302     </example>
3303
3304     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3305       <description>Neural Network CIFAR10 example</description>
3306       <board name="uVision Simulator" vendor="Keil"/>
3307       <project>
3308         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3309       </project>
3310       <attributes>
3311         <component Cclass="CMSIS" Cgroup="CORE"/>
3312         <component Cclass="CMSIS" Cgroup="DSP"/>
3313         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3314         <component Cclass="Device" Cgroup="Startup"/>
3315         <category>Getting Started</category>
3316       </attributes>
3317     </example>
3318
3319     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
3320       <description>Neural Network GRU example</description>
3321       <board name="uVision Simulator" vendor="Keil"/>
3322       <project>
3323         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3324       </project>
3325       <attributes>
3326         <component Cclass="CMSIS" Cgroup="CORE"/>
3327         <component Cclass="CMSIS" Cgroup="DSP"/>
3328         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3329         <component Cclass="Device" Cgroup="Startup"/>
3330         <category>Getting Started</category>
3331       </attributes>
3332     </example>
3333
3334     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3335       <description>CMSIS-RTOS2 Blinky example</description>
3336       <board name="uVision Simulator" vendor="Keil"/>
3337       <project>
3338         <environment name="uv" load="Blinky.uvprojx"/>
3339       </project>
3340       <attributes>
3341         <component Cclass="CMSIS" Cgroup="CORE"/>
3342         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3343         <component Cclass="Device" Cgroup="Startup"/>
3344         <category>Getting Started</category>
3345       </attributes>
3346     </example>
3347
3348     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3349       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3350       <board name="uVision Simulator" vendor="Keil"/>
3351       <project>
3352         <environment name="uv" load="Blinky.uvprojx"/>
3353       </project>
3354       <attributes>
3355         <component Cclass="CMSIS" Cgroup="CORE"/>
3356         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3357         <component Cclass="Device" Cgroup="Startup"/>
3358         <category>Getting Started</category>
3359       </attributes>
3360     </example>
3361
3362     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3363       <description>CMSIS-RTOS2 Message Queue Example</description>
3364       <board name="uVision Simulator" vendor="Keil"/>
3365       <project>
3366         <environment name="uv" load="MsqQueue.uvprojx"/>
3367       </project>
3368       <attributes>
3369         <component Cclass="CMSIS" Cgroup="CORE"/>
3370         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3371         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3372         <component Cclass="Device" Cgroup="Startup"/>
3373         <category>Getting Started</category>
3374       </attributes>
3375     </example>
3376
3377     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3378       <description>CMSIS-RTOS2 Memory Pool Example</description>
3379       <board name="Fixed Virtual Platform" vendor="ARM"/>
3380       <project>
3381         <environment name="uv" load="MemPool.uvprojx"/>
3382       </project>
3383       <attributes>
3384         <component Cclass="CMSIS" Cgroup="CORE"/>
3385         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3386         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3387         <component Cclass="Device" Cgroup="Startup"/>
3388         <category>Getting Started</category>
3389       </attributes>
3390     </example>
3391
3392     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3393       <description>Bare-metal secure/non-secure example without RTOS</description>
3394       <board name="uVision Simulator" vendor="Keil"/>
3395       <project>
3396         <environment name="uv" load="NoRTOS.uvmpw"/>
3397       </project>
3398       <attributes>
3399         <component Cclass="CMSIS" Cgroup="CORE"/>
3400         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3401         <component Cclass="Device" Cgroup="Startup"/>
3402         <category>Getting Started</category>
3403       </attributes>
3404     </example>
3405
3406     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3407       <description>Secure/non-secure RTOS example with thread context management</description>
3408       <board name="uVision Simulator" vendor="Keil"/>
3409       <project>
3410         <environment name="uv" load="RTOS.uvmpw"/>
3411       </project>
3412       <attributes>
3413         <component Cclass="CMSIS" Cgroup="CORE"/>
3414         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3415         <component Cclass="Device" Cgroup="Startup"/>
3416         <category>Getting Started</category>
3417       </attributes>
3418     </example>
3419
3420     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3421       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3422       <board name="uVision Simulator" vendor="Keil"/>
3423       <project>
3424         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3425       </project>
3426       <attributes>
3427         <component Cclass="CMSIS" Cgroup="CORE"/>
3428         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3429         <component Cclass="Device" Cgroup="Startup"/>
3430         <category>Getting Started</category>
3431       </attributes>
3432     </example>
3433
3434   </examples>
3435
3436 </package>