begriffs open source - cmsis/blob - main/Driver/html/group__spi__slave__select__mode__ctrls.html

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 129 <div class="header">
 130   <div class="summary">
 131 <a href="#define-members">Macros</a>  </div>
 132   <div class="headertitle"><div class="title">SPI Slave Select Mode<div class="ingroups"><a class="el" href="group__spi__interface__gr.html">SPI Interface</a> &raquo; <a class="el" href="group__SPI__control.html">SPI Control Codes</a></div></div></div>
 133 </div><!--header-->
 134 <div class="contents">
 135
 136 <p>Specifies SPI slave select mode.
 137 <a href="#details">More...</a></p>
 138 <table class="memberdecls">
 139 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
 140 Macros</h2></td></tr>
 141 <tr class="memitem:gae19343adc7bd71408b51733171f99dc7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__slave__select__mode__ctrls.html#gae19343adc7bd71408b51733171f99dc7">ARM_SPI_SS_MASTER_UNUSED</a>&#160;&#160;&#160;(0UL &lt;&lt; <a class="el" href="Driver__SPI_8h.html#ac467bd067b72370b23546767e63ce693">ARM_SPI_SS_MASTER_MODE_Pos</a>)</td></tr>
 142 <tr class="memdesc:gae19343adc7bd71408b51733171f99dc7"><td class="mdescLeft">&#160;</td><td class="mdescRight">SPI Slave Select when Master: Not used (default)  <br /></td></tr>
 143 <tr class="separator:gae19343adc7bd71408b51733171f99dc7"><td class="memSeparator" colspan="2">&#160;</td></tr>
 144 <tr class="memitem:gab5e319aa3f9d4d8c9ed92f0fe865f624"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__slave__select__mode__ctrls.html#gab5e319aa3f9d4d8c9ed92f0fe865f624">ARM_SPI_SS_MASTER_SW</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="Driver__SPI_8h.html#ac467bd067b72370b23546767e63ce693">ARM_SPI_SS_MASTER_MODE_Pos</a>)</td></tr>
 145 <tr class="memdesc:gab5e319aa3f9d4d8c9ed92f0fe865f624"><td class="mdescLeft">&#160;</td><td class="mdescRight">SPI Slave Select when Master: Software controlled.  <br /></td></tr>
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 147 <tr class="memitem:ga07762709a40dc90aca85553f500c8761"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__slave__select__mode__ctrls.html#ga07762709a40dc90aca85553f500c8761">ARM_SPI_SS_MASTER_HW_OUTPUT</a>&#160;&#160;&#160;(2UL &lt;&lt; <a class="el" href="Driver__SPI_8h.html#ac467bd067b72370b23546767e63ce693">ARM_SPI_SS_MASTER_MODE_Pos</a>)</td></tr>
 148 <tr class="memdesc:ga07762709a40dc90aca85553f500c8761"><td class="mdescLeft">&#160;</td><td class="mdescRight">SPI Slave Select when Master: Hardware controlled Output.  <br /></td></tr>
 149 <tr class="separator:ga07762709a40dc90aca85553f500c8761"><td class="memSeparator" colspan="2">&#160;</td></tr>
 150 <tr class="memitem:ga8561bd0cc25ab2bb02b138c1c6a586cd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__slave__select__mode__ctrls.html#ga8561bd0cc25ab2bb02b138c1c6a586cd">ARM_SPI_SS_MASTER_HW_INPUT</a>&#160;&#160;&#160;(3UL &lt;&lt; <a class="el" href="Driver__SPI_8h.html#ac467bd067b72370b23546767e63ce693">ARM_SPI_SS_MASTER_MODE_Pos</a>)</td></tr>
 151 <tr class="memdesc:ga8561bd0cc25ab2bb02b138c1c6a586cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">SPI Slave Select when Master: Hardware monitored Input.  <br /></td></tr>
 152 <tr class="separator:ga8561bd0cc25ab2bb02b138c1c6a586cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
 153 <tr class="memitem:ga2bd0d1f3ade2dc0cc48cc0593336ad70"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__slave__select__mode__ctrls.html#ga2bd0d1f3ade2dc0cc48cc0593336ad70">ARM_SPI_SS_SLAVE_HW</a>&#160;&#160;&#160;(0UL &lt;&lt; <a class="el" href="Driver__SPI_8h.html#a4aed772149cc33c6ee70663adef90956">ARM_SPI_SS_SLAVE_MODE_Pos</a>)</td></tr>
 154 <tr class="memdesc:ga2bd0d1f3ade2dc0cc48cc0593336ad70"><td class="mdescLeft">&#160;</td><td class="mdescRight">SPI Slave Select when Slave: Hardware monitored (default)  <br /></td></tr>
 155 <tr class="separator:ga2bd0d1f3ade2dc0cc48cc0593336ad70"><td class="memSeparator" colspan="2">&#160;</td></tr>
 156 <tr class="memitem:gad371f6ba0d12a57bdcc3217c351abfb0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__spi__slave__select__mode__ctrls.html#gad371f6ba0d12a57bdcc3217c351abfb0">ARM_SPI_SS_SLAVE_SW</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="Driver__SPI_8h.html#a4aed772149cc33c6ee70663adef90956">ARM_SPI_SS_SLAVE_MODE_Pos</a>)</td></tr>
 157 <tr class="memdesc:gad371f6ba0d12a57bdcc3217c351abfb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">SPI Slave Select when Slave: Software controlled.  <br /></td></tr>
 158 <tr class="separator:gad371f6ba0d12a57bdcc3217c351abfb0"><td class="memSeparator" colspan="2">&#160;</td></tr>
 159 </table>
 160 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 161 <p>Specifies SPI slave select mode. </p>
 162 <p><b>SPI</b> <b>Slave</b> <b>Select</b> <b>Mode</b> configures the behavior of the <b>Slave</b> <b>Select</b> <b></b>(SS) signal. The configuration is separate for <b>Master</b> (ARM_SPI_SS_MASTER_*) and for <b>Slave</b> (<a class="el" href="group__spi__slave__select__mode__ctrls.html#ga2bd0d1f3ade2dc0cc48cc0593336ad70">ARM_SPI_SS_SLAVE_HW</a>, <a class="el" href="group__spi__slave__select__mode__ctrls.html#gad371f6ba0d12a57bdcc3217c351abfb0">ARM_SPI_SS_SLAVE_SW</a>). The active configuration depends on the current state (Master/Slave). </p>
 163 <h2 class="groupheader">Macro Definition Documentation</h2>
 164 <a id="gae19343adc7bd71408b51733171f99dc7" name="gae19343adc7bd71408b51733171f99dc7"></a>
 165 <h2 class="memtitle"><span class="permalink"><a href="#gae19343adc7bd71408b51733171f99dc7">&#9670;&#160;</a></span>ARM_SPI_SS_MASTER_UNUSED</h2>
 166
 167 <div class="memitem">
 168 <div class="memproto">
 169       <table class="memname">
 170         <tr>
 171           <td class="memname">#define ARM_SPI_SS_MASTER_UNUSED&#160;&#160;&#160;(0UL &lt;&lt; <a class="el" href="Driver__SPI_8h.html#ac467bd067b72370b23546767e63ce693">ARM_SPI_SS_MASTER_MODE_Pos</a>)</td>
 172         </tr>
 173       </table>
 174 </div><div class="memdoc">
 175
 176 <p>SPI Slave Select when Master: Not used (default) </p>
 177 <p>An SPI master does not drive or monitor the SS line. For example, when connecting to a single slave, the SS line can be connected to a fixed low level. </p><dl class="section see"><dt>See also</dt><dd><a class="el" href="group__spi__interface__gr.html#gad18d229992598d6677bec250015e5d1a" title="Control SPI Interface.">ARM_SPI_Control</a> </dd></dl>
 178
 179 </div>
 180 </div>
 181 <a id="gab5e319aa3f9d4d8c9ed92f0fe865f624" name="gab5e319aa3f9d4d8c9ed92f0fe865f624"></a>
 182 <h2 class="memtitle"><span class="permalink"><a href="#gab5e319aa3f9d4d8c9ed92f0fe865f624">&#9670;&#160;</a></span>ARM_SPI_SS_MASTER_SW</h2>
 183
 184 <div class="memitem">
 185 <div class="memproto">
 186       <table class="memname">
 187         <tr>
 188           <td class="memname">#define ARM_SPI_SS_MASTER_SW&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="Driver__SPI_8h.html#ac467bd067b72370b23546767e63ce693">ARM_SPI_SS_MASTER_MODE_Pos</a>)</td>
 189         </tr>
 190       </table>
 191 </div><div class="memdoc">
 192
 193 <p>SPI Slave Select when Master: Software controlled. </p>
 194 <p>SS is configured as an output and controlled via <a class="el" href="group__spi__interface__gr.html#gad18d229992598d6677bec250015e5d1a">ARM_SPI_Control</a> (<a class="el" href="group__spi__misc__ctrls.html#ga5776272b82decff92da003568540c92f">ARM_SPI_CONTROL_SS</a>). By default, it is not active (high). It is activated (low) by <a class="el" href="group__spi__interface__gr.html#gad18d229992598d6677bec250015e5d1a">ARM_SPI_Control</a> (<a class="el" href="group__spi__misc__ctrls.html#ga5776272b82decff92da003568540c92f">ARM_SPI_CONTROL_SS</a>, <a class="el" href="group__spi__ss__signals.html#ga3f465cdbd1238ddd74f78e14457076c4">ARM_SPI_SS_ACTIVE</a>) and deactivated by <a class="el" href="group__spi__interface__gr.html#gad18d229992598d6677bec250015e5d1a">ARM_SPI_Control</a> (<a class="el" href="group__spi__misc__ctrls.html#ga5776272b82decff92da003568540c92f">ARM_SPI_CONTROL_SS</a>, <a class="el" href="group__spi__ss__signals.html#ga335b448e07422e9c25616a693ec581cc">ARM_SPI_SS_INACTIVE</a>). It is not affected by transfer/send/receive functions. </p><dl class="section see"><dt>See also</dt><dd><a class="el" href="group__spi__interface__gr.html#gad18d229992598d6677bec250015e5d1a" title="Control SPI Interface.">ARM_SPI_Control</a> </dd></dl>
 195
 196 </div>
 197 </div>
 198 <a id="ga07762709a40dc90aca85553f500c8761" name="ga07762709a40dc90aca85553f500c8761"></a>
 199 <h2 class="memtitle"><span class="permalink"><a href="#ga07762709a40dc90aca85553f500c8761">&#9670;&#160;</a></span>ARM_SPI_SS_MASTER_HW_OUTPUT</h2>
 200
 201 <div class="memitem">
 202 <div class="memproto">
 203       <table class="memname">
 204         <tr>
 205           <td class="memname">#define ARM_SPI_SS_MASTER_HW_OUTPUT&#160;&#160;&#160;(2UL &lt;&lt; <a class="el" href="Driver__SPI_8h.html#ac467bd067b72370b23546767e63ce693">ARM_SPI_SS_MASTER_MODE_Pos</a>)</td>
 206         </tr>
 207       </table>
 208 </div><div class="memdoc">
 209
 210 <p>SPI Slave Select when Master: Hardware controlled Output. </p>
 211 <p>Here, SS is configured as an output. It will be automatically activated/deactivated for the transfers by hardware (not controlled by <a class="el" href="group__spi__interface__gr.html#gad18d229992598d6677bec250015e5d1a">ARM_SPI_Control</a> (<a class="el" href="group__spi__misc__ctrls.html#ga5776272b82decff92da003568540c92f">ARM_SPI_CONTROL_SS</a>)). The activation/deactivation of the line is completely hardware dependent. Typically, the hardware will activate it before starting a transfer and deactivate it after a transfer completes. Some hardware will keep the line active as long as the SPI stays master. Due to different hardware behavior, this mode is typically not useful because certain devices require that the SS signal is strictly defined with regards to transfers. </p><dl class="section see"><dt>See also</dt><dd><a class="el" href="group__spi__interface__gr.html#gad18d229992598d6677bec250015e5d1a" title="Control SPI Interface.">ARM_SPI_Control</a> </dd></dl>
 212
 213 </div>
 214 </div>
 215 <a id="ga8561bd0cc25ab2bb02b138c1c6a586cd" name="ga8561bd0cc25ab2bb02b138c1c6a586cd"></a>
 216 <h2 class="memtitle"><span class="permalink"><a href="#ga8561bd0cc25ab2bb02b138c1c6a586cd">&#9670;&#160;</a></span>ARM_SPI_SS_MASTER_HW_INPUT</h2>
 217
 218 <div class="memitem">
 219 <div class="memproto">
 220       <table class="memname">
 221         <tr>
 222           <td class="memname">#define ARM_SPI_SS_MASTER_HW_INPUT&#160;&#160;&#160;(3UL &lt;&lt; <a class="el" href="Driver__SPI_8h.html#ac467bd067b72370b23546767e63ce693">ARM_SPI_SS_MASTER_MODE_Pos</a>)</td>
 223         </tr>
 224       </table>
 225 </div><div class="memdoc">
 226
 227 <p>SPI Slave Select when Master: Hardware monitored Input. </p>
 228 <p>This is normally used in a multi-master configuration, where a master does not drive the SS line when driving the bus but only monitors it. When another master activates this line, the active master backs off. This is called <b>mode</b> <b>fault</b>. SS is configured as input and the hardware only monitors it. When it is externally deactivated while being the master, it presents a mode fault and the SPI switches to <b>inactive</b> mode. </p><dl class="section see"><dt>See also</dt><dd><a class="el" href="group__spi__interface__gr.html#gad18d229992598d6677bec250015e5d1a" title="Control SPI Interface.">ARM_SPI_Control</a> </dd></dl>
 229
 230 </div>
 231 </div>
 232 <a id="ga2bd0d1f3ade2dc0cc48cc0593336ad70" name="ga2bd0d1f3ade2dc0cc48cc0593336ad70"></a>
 233 <h2 class="memtitle"><span class="permalink"><a href="#ga2bd0d1f3ade2dc0cc48cc0593336ad70">&#9670;&#160;</a></span>ARM_SPI_SS_SLAVE_HW</h2>
 234
 235 <div class="memitem">
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 237       <table class="memname">
 238         <tr>
 239           <td class="memname">#define ARM_SPI_SS_SLAVE_HW&#160;&#160;&#160;(0UL &lt;&lt; <a class="el" href="Driver__SPI_8h.html#a4aed772149cc33c6ee70663adef90956">ARM_SPI_SS_SLAVE_MODE_Pos</a>)</td>
 240         </tr>
 241       </table>
 242 </div><div class="memdoc">
 243
 244 <p>SPI Slave Select when Slave: Hardware monitored (default) </p>
 245 <p>Hardware monitors the SS line and accepts transfers only when SS line is activate. Transfers while SS is not active are ignored. </p><dl class="section see"><dt>See also</dt><dd><a class="el" href="group__spi__interface__gr.html#gad18d229992598d6677bec250015e5d1a" title="Control SPI Interface.">ARM_SPI_Control</a> </dd></dl>
 246
 247 </div>
 248 </div>
 249 <a id="gad371f6ba0d12a57bdcc3217c351abfb0" name="gad371f6ba0d12a57bdcc3217c351abfb0"></a>
 250 <h2 class="memtitle"><span class="permalink"><a href="#gad371f6ba0d12a57bdcc3217c351abfb0">&#9670;&#160;</a></span>ARM_SPI_SS_SLAVE_SW</h2>
 251
 252 <div class="memitem">
 253 <div class="memproto">
 254       <table class="memname">
 255         <tr>
 256           <td class="memname">#define ARM_SPI_SS_SLAVE_SW&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="Driver__SPI_8h.html#a4aed772149cc33c6ee70663adef90956">ARM_SPI_SS_SLAVE_MODE_Pos</a>)</td>
 257         </tr>
 258       </table>
 259 </div><div class="memdoc">
 260
 261 <p>SPI Slave Select when Slave: Software controlled. </p>
 262 <p>Used only when SS line is not used. For example, when a single master and slave are connected in a system, the SS line is not needed (reduces the number of lines and pins used). Slave responses are controlled by software (by default, it is not responding). Software enables/disables transfers by calling <a class="el" href="group__spi__interface__gr.html#gad18d229992598d6677bec250015e5d1a">ARM_SPI_Control</a> (<a class="el" href="group__spi__misc__ctrls.html#ga5776272b82decff92da003568540c92f">ARM_SPI_CONTROL_SS</a>, <a class="el" href="group__spi__ss__signals.html#ga3f465cdbd1238ddd74f78e14457076c4">ARM_SPI_SS_ACTIVE</a> / <a class="el" href="group__spi__ss__signals.html#ga335b448e07422e9c25616a693ec581cc">ARM_SPI_SS_INACTIVE</a>). </p><dl class="section see"><dt>See also</dt><dd><a class="el" href="group__spi__interface__gr.html#gad18d229992598d6677bec250015e5d1a" title="Control SPI Interface.">ARM_SPI_Control</a> </dd></dl>
 263
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