begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.1.2-dev3">
  12       Active development...
  13       CMSIS-Core(A): 1.0.1 (see revision history for details)
  14         - Added compiler_iccarm.h.
  15         - Added additional access functions for physical timer.
  16       CMSIS-RTOS2:
  17       - API 2.1.2 (see revision history for details)
  18       CMSIS-RTOS2:
  19       - RTX 5.2.3 (see revision history for details)
  20       Devices:
  21        - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
  22     </release>
  23     <release version="5.1.2-dev2">
  24       CMSIS-Core(M): 5.0.3 (see revision history for details)
  25       - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  26       CMSIS-RTOS2:
  27       - RTX 5.2.2 (see revision history for details)
  28     </release>
  29     <release version="5.1.2-dev1">
  30       Devices:
  31       - added GCC startup and linker script for Cortex-A9
  32       CMSIS-Core(M): 5.0.3 (see revision history for details)
  33       - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  34       - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  35       CMSIS-Core(A): 1.0.1 (see revision history for details)
  36       CMSIS-Driver:
  37       - CAN Driver API V1.2.0
  38       CMSIS-RTOS:
  39       - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata
  40       CMSIS-RTOS2:
  41       - RTX 5.2.1 (see revision history for details)
  42       - Message Queue Example
  43       - Memory Pool Example
  44     </release>
  45     <release version="5.1.1" date="2017-09-19">
  46       CMSIS-RTOS2:
  47       - RTX 5.2.1 (see revision history for details)
  48     </release>
  49     <release version="5.1.0" date="2017-08-04">
  50       CMSIS-Core(M): 5.0.2 (see revision history for details)
  51       - Changed Version Control macros to be core agnostic.
  52       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  53       CMSIS-Core(A): 1.0.0 (see revision history for details)
  54       - Initial release
  55       - IRQ Controller API 1.0.0
  56       CMSIS-Driver: 2.05 (see revision history for details)
  57       - All typedefs related to status have been made volatile.
  58       CMSIS-RTOS2:
  59       - API 2.1.1 (see revision history for details)
  60       - RTX 5.2.0 (see revision history for details)
  61       - OS Tick API 1.0.0
  62       CMSIS-DSP: 1.5.2 (see revision history for details)
  63       - Fixed GNU Compiler specific diagnostics.
  64       CMSIS-PACK: 1.5.0 (see revision history for details)
  65       - added System Description File (*.SDF) Format
  66       CMSIS-Zone: 0.0.1 (Preview)
  67       - Initial specification draft
  68     </release>
  69     <release version="5.0.1" date="2017-02-03">
  70       Package Description:
  71       - added taxonomy for Cclass RTOS
  72       CMSIS-RTOS2:
  73       - API 2.1   (see revision history for details)
  74       - RTX 5.1.0 (see revision history for details)
  75       CMSIS-Core: 5.0.1 (see revision history for details)
  76       - Added __PACKED_STRUCT macro
  77       - Added uVisior support
  78       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  79       - Updated template for secure main function (main_s.c)
  80       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  81       CMSIS-DSP: 1.5.1 (see revision history for details)
  82       - added ARMv8M DSP libraries.
  83       CMSIS-PACK:1.4.9 (see revision history for details)
  84       - added Pack Index File specification and schema file
  85     </release>
  86     <release version="5.0.0" date="2016-11-11">
  87       Changed open source license to Apache 2.0
  88       CMSIS_Core:
  89        - Added support for Cortex-M23 and Cortex-M33.
  90        - Added ARMv8-M device configurations for mainline and baseline.
  91        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  92        - Added cmsis_compiler.h to unify compiler behaviour.
  93        - Updated function SCB_EnableICache (for Cortex-M7).
  94        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  95       CMSIS-RTOS:
  96         - bug fix in RTX 4.82 (see revision history for details)
  97       CMSIS-RTOS2:
  98         - new API including compatibility layer to CMSIS-RTOS
  99         - reference implementation based on RTX5
 100         - supports all Cortex-M variants including TrustZone for ARMv8-M
 101       CMSIS-SVD:
 102        - reworked SVD format documentation
 103        - removed SVD file database documentation as SVD files are distributed in packs
 104        - updated SVDConv for Win32 and Linux
 105       CMSIS-DSP:
 106        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 107        - Added DSP libraries build projects to CMSIS pack.
 108     </release>
 109     <release version="4.5.0" date="2015-10-28">
 110       - CMSIS-Core     4.30.0  (see revision history for details)
 111       - CMSIS-DAP      1.1.0   (unchanged)
 112       - CMSIS-Driver   2.04.0  (see revision history for details)
 113       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 114       - CMSIS-PACK     1.4.1   (see revision history for details)
 115       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 116       - CMSIS-SVD      1.3.1   (see revision history for details)
 117     </release>
 118     <release version="4.4.0" date="2015-09-11">
 119       - CMSIS-Core     4.20   (see revision history for details)
 120       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 121       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 122       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 123       - CMSIS-RTOS
 124         -- API         1.02   (unchanged)
 125         -- RTX         4.79   (see revision history for details)
 126       - CMSIS-SVD      1.3.0  (see revision history for details)
 127       - CMSIS-DAP      1.1.0  (extended with SWO support)
 128     </release>
 129     <release version="4.3.0" date="2015-03-20">
 130       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 131       - CMSIS-DSP      1.4.5  (see revision history for details)
 132       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 133       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 134       - CMSIS-RTOS
 135         -- API         1.02   (unchanged)
 136         -- RTX         4.78   (see revision history for details)
 137       - CMSIS-SVD      1.2    (unchanged)
 138     </release>
 139     <release version="4.2.0" date="2014-09-24">
 140       Adding Cortex-M7 support
 141       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 142       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 143       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 144       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 145       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 146     </release>
 147     <release version="4.1.1" date="2014-06-30">
 148       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 149     </release>
 150     <release version="4.1.0" date="2014-06-12">
 151       - CMSIS-Driver   2.02  (incompatible update)
 152       - CMSIS-Pack     1.3   (see revision history for details)
 153       - CMSIS-DSP      1.4.2 (unchanged)
 154       - CMSIS-Core     3.30  (unchanged)
 155       - CMSIS-RTOS RTX 4.74  (unchanged)
 156       - CMSIS-RTOS API 1.02  (unchanged)
 157       - CMSIS-SVD      1.10  (unchanged)
 158       PACK:
 159       - removed G++ specific files from PACK
 160       - added Component Startup variant "C Startup"
 161       - added Pack Checking Utility
 162       - updated conditions to reflect tool-chain dependency
 163       - added Taxonomy for Graphics
 164       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 165     </release>
 166     <release version="4.0.0">
 167       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 168       - CMSIS-Pack     1.1   Preliminary
 169       - CMSIS-DSP      1.4.2 (see revision history for details)
 170       - CMSIS-Core     3.30  (see revision history for details)
 171       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 172       - CMSIS-RTOS API 1.02  (unchanged)
 173       - CMSIS-SVD      1.10  (unchanged)
 174     </release>
 175     <release version="3.20.4">
 176       - CMSIS-RTOS 4.74 (see revision history for details)
 177       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 178     </release>
 179     <release version="3.20.3">
 180       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 181       - CMSIS-RTOS 4.73 (see revision history for details)
 182     </release>
 183     <release version="3.20.2">
 184       - CMSIS-Pack documentation has been added
 185       - CMSIS-Drivers header and documentation have been added to PACK
 186       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 187     </release>
 188     <release version="3.20.1">
 189       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 190       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 191     </release>
 192     <release version="3.20.0">
 193       The software portions that are deployed in the application program are now under a BSD license which allows usage
 194       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 195       The individual components have been update as listed below:
 196       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 197       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 198       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 199       - CMSIS-SVD is unchanged.
 200     </release>
 201   </releases>
 202
 203   <taxonomy>
 204     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 205     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 206     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 207     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 208     <description Cclass="File System">File Drive Support and File System</description>
 209     <description Cclass="Graphics">Graphical User Interface</description>
 210     <description Cclass="Network">Network Stack using Internet Protocols</description>
 211     <description Cclass="USB">Universal Serial Bus Stack</description>
 212     <description Cclass="Compiler">Compiler Software Extensions</description>
 213     <description Cclass="RTOS">Real-time Operating System</description>
 214   </taxonomy>
 215
 216   <devices>
 217     <!-- ******************************  Cortex-M0  ****************************** -->
 218     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 219       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 220       <description>
 221 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 222 - simple, easy-to-use programmers model
 223 - highly efficient ultra-low power operation
 224 - excellent code density
 225 - deterministic, high-performance interrupt handling
 226 - upward compatibility with the rest of the Cortex-M processor family.
 227       </description>
 228       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 229       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 230       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 231       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 232
 233       <device Dname="ARMCM0">
 234         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 235         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 236       </device>
 237     </family>
 238
 239     <!-- ******************************  Cortex-M0P  ****************************** -->
 240     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 241       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 242       <description>
 243 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 244 - simple, easy-to-use programmers model
 245 - highly efficient ultra-low power operation
 246 - excellent code density
 247 - deterministic, high-performance interrupt handling
 248 - upward compatibility with the rest of the Cortex-M processor family.
 249       </description>
 250       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 251       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 252       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 253       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 254
 255       <device Dname="ARMCM0P">
 256         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 257         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 258       </device>
 259
 260       <device Dname="ARMCM0P_MPU">
 261         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 262         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 263       </device>
 264     </family>
 265
 266     <!-- ******************************  Cortex-M3  ****************************** -->
 267     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 268       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 269       <description>
 270 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 271 - simple, easy-to-use programmers model
 272 - highly efficient ultra-low power operation
 273 - excellent code density
 274 - deterministic, high-performance interrupt handling
 275 - upward compatibility with the rest of the Cortex-M processor family.
 276       </description>
 277       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 278       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 279       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 280       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 281
 282       <device Dname="ARMCM3">
 283         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 284         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 285       </device>
 286     </family>
 287
 288     <!-- ******************************  Cortex-M4  ****************************** -->
 289     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 290       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 291       <description>
 292 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 293 - simple, easy-to-use programmers model
 294 - highly efficient ultra-low power operation
 295 - excellent code density
 296 - deterministic, high-performance interrupt handling
 297 - upward compatibility with the rest of the Cortex-M processor family.
 298       </description>
 299       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 300       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 301       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 302       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 303
 304       <device Dname="ARMCM4">
 305         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 306         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 307       </device>
 308
 309       <device Dname="ARMCM4_FP">
 310         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 311         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 312       </device>
 313     </family>
 314
 315     <!-- ******************************  Cortex-M7  ****************************** -->
 316     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 317       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 318       <description>
 319 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 320 - simple, easy-to-use programmers model
 321 - highly efficient ultra-low power operation
 322 - excellent code density
 323 - deterministic, high-performance interrupt handling
 324 - upward compatibility with the rest of the Cortex-M processor family.
 325       </description>
 326       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 327       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 328       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 329       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 330
 331       <device Dname="ARMCM7">
 332         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 333         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 334       </device>
 335
 336       <device Dname="ARMCM7_SP">
 337         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 338         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 339       </device>
 340
 341       <device Dname="ARMCM7_DP">
 342         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 343         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 344       </device>
 345     </family>
 346
 347     <!-- ******************************  Cortex-M23  ********************** -->
 348     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 349       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 350       <description>
 351 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 352 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 353 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 354       </description>
 355       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 356       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 357       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 358       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 359       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 360       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 361
 362       <device Dname="ARMCM23">
 363         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 364         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 365       </device>
 366
 367       <device Dname="ARMCM23_TZ">
 368         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 369         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 370       </device>
 371     </family>
 372
 373     <!-- ******************************  Cortex-M33  ****************************** -->
 374     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 375       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 376       <description>
 377 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 378 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 379       </description>
 380       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 381       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 382       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 383       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 384       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 385       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 386
 387       <device Dname="ARMCM33">
 388         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 389         <description>
 390           no DSP Instructions, no Floating Point Unit, no TrustZone
 391         </description>
 392         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 393       </device>
 394
 395       <device Dname="ARMCM33_TZ">
 396         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 397         <description>
 398           no DSP Instructions, no Floating Point Unit, TrustZone
 399         </description>
 400         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 401       </device>
 402
 403       <device Dname="ARMCM33_DSP_FP">
 404         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 405         <description>
 406           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 407         </description>
 408         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 409       </device>
 410
 411       <device Dname="ARMCM33_DSP_FP_TZ">
 412         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 413         <description>
 414           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 415         </description>
 416         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 417       </device>
 418     </family>
 419
 420     <!-- ******************************  ARMSC000  ****************************** -->
 421     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 422       <description>
 423 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 424 - simple, easy-to-use programmers model
 425 - highly efficient ultra-low power operation
 426 - excellent code density
 427 - deterministic, high-performance interrupt handling
 428       </description>
 429       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 430       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 431       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 432       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 433
 434       <device Dname="ARMSC000">
 435         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 436         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 437       </device>
 438     </family>
 439
 440     <!-- ******************************  ARMSC300  ****************************** -->
 441     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 442       <description>
 443 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 444 - simple, easy-to-use programmers model
 445 - highly efficient ultra-low power operation
 446 - excellent code density
 447 - deterministic, high-performance interrupt handling
 448       </description>
 449       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 450       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 451       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 452       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 453
 454       <device Dname="ARMSC300">
 455         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 456         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 457       </device>
 458     </family>
 459
 460     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 461     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 462       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 463       <description>
 464 ARMv8-M Baseline based device with TrustZone
 465       </description>
 466       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 467       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 468       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 469       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 470       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 471       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 472
 473       <device Dname="ARMv8MBL">
 474         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 475         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 476       </device>
 477     </family>
 478
 479     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 480     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 481       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 482       <description>
 483 ARMv8-M Mainline based device with TrustZone
 484       </description>
 485       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 486       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 487       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 488       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 489       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 490       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 491
 492       <device Dname="ARMv8MML">
 493         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 494         <description>
 495           no DSP Instructions, no Floating Point Unit, TrustZone
 496         </description>
 497         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 498       </device>
 499
 500       <device Dname="ARMv8MML_DSP">
 501         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 502         <description>
 503           DSP Instructions, no Floating Point Unit, TrustZone
 504         </description>
 505         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 506       </device>
 507
 508       <device Dname="ARMv8MML_SP">
 509         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 510         <description>
 511           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 512         </description>
 513         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 514       </device>
 515
 516       <device Dname="ARMv8MML_DSP_SP">
 517         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 518         <description>
 519           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 520         </description>
 521         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 522       </device>
 523
 524       <device Dname="ARMv8MML_DP">
 525         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 526         <description>
 527           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 528         </description>
 529         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 530       </device>
 531
 532       <device Dname="ARMv8MML_DSP_DP">
 533         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 534         <description>
 535           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 536         </description>
 537         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 538       </device>
 539     </family>
 540
 541     <!-- ******************************  Cortex-A5  ****************************** -->
 542     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 543       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 544       <description>
 545 The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
 546 virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
 547 ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 548       </description>
 549
 550       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 551       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 552
 553       <device Dname="ARMCA5">
 554         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 555         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 556       </device>
 557     </family>
 558
 559     <!-- ******************************  Cortex-A7  ****************************** -->
 560     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 561       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 562       <description>
 563 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
 564 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 565 an optional integrated GIC, and an optional L2 cache controller.
 566       </description>
 567
 568       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 569       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 570
 571       <device Dname="ARMCA7">
 572         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 573         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 574       </device>
 575     </family>
 576
 577     <!-- ******************************  Cortex-A9  ****************************** -->
 578     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 579       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 580       <description>
 581 The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 582 The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
 583 and 8-bit Java bytecodes in Jazelle state.
 584       </description>
 585
 586       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 587       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 588
 589       <device Dname="ARMCA9">
 590         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 591         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 592       </device>
 593     </family>
 594   </devices>
 595
 596
 597   <apis>
 598     <!-- CMSIS Device API -->
 599     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 600       <description>Device interrupt controller interface</description>
 601       <files>
 602         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 603       </files>
 604     </api>
 605     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.0" exclusive="1">
 606       <description>RTOS Kernel system tick timer interface</description>
 607       <files>
 608         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 609       </files>
 610     </api>
 611     <!-- CMSIS-RTOS API -->
 612     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 613       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 614       <files>
 615         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 616       </files>
 617     </api>
 618     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.2" exclusive="1">
 619       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 620       <files>
 621         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 622         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 623       </files>
 624     </api>
 625     <!-- CMSIS Driver API -->
 626     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 627       <description>USART Driver API for Cortex-M</description>
 628       <files>
 629         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 630         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 631       </files>
 632     </api>
 633     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 634       <description>SPI Driver API for Cortex-M</description>
 635       <files>
 636         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 637         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 638       </files>
 639     </api>
 640     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 641       <description>SAI Driver API for Cortex-M</description>
 642       <files>
 643         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 644         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 645       </files>
 646     </api>
 647     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 648       <description>I2C Driver API for Cortex-M</description>
 649       <files>
 650         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 651         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 652       </files>
 653     </api>
 654     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 655       <description>CAN Driver API for Cortex-M</description>
 656       <files>
 657         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 658         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 659       </files>
 660     </api>
 661     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
 662       <description>Flash Driver API for Cortex-M</description>
 663       <files>
 664         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 665         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 666       </files>
 667     </api>
 668     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 669       <description>MCI Driver API for Cortex-M</description>
 670       <files>
 671         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 672         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 673       </files>
 674     </api>
 675     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
 676       <description>NAND Flash Driver API for Cortex-M</description>
 677       <files>
 678         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 679         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 680       </files>
 681     </api>
 682     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 683       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 684       <files>
 685         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 686         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 687         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 688       </files>
 689     </api>
 690     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 691       <description>Ethernet MAC Driver API for Cortex-M</description>
 692       <files>
 693         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 694         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 695       </files>
 696     </api>
 697     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 698       <description>Ethernet PHY Driver API for Cortex-M</description>
 699       <files>
 700         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 701         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 702       </files>
 703     </api>
 704     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 705       <description>USB Device Driver API for Cortex-M</description>
 706       <files>
 707         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 708         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 709       </files>
 710     </api>
 711     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 712       <description>USB Host Driver API for Cortex-M</description>
 713       <files>
 714         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 715         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 716       </files>
 717     </api>
 718   </apis>
 719
 720   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 721   <conditions>
 722     <!-- compiler -->
 723     <condition id="ARMCC6">
 724       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 725       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 726     </condition>
 727     <condition id="ARMCC5">
 728       <require Tcompiler="ARMCC" Toptions="AC5"/>
 729     </condition>
 730     <condition id="ARMCC">
 731       <require Tcompiler="ARMCC"/>
 732     </condition>
 733     <condition id="GCC">
 734       <require Tcompiler="GCC"/>
 735     </condition>
 736     <condition id="IAR">
 737       <require Tcompiler="IAR"/>
 738     </condition>
 739     <condition id="ARMCC GCC">
 740       <accept Tcompiler="ARMCC"/>
 741       <accept Tcompiler="GCC"/>
 742     </condition>
 743     <condition id="ARMCC GCC IAR">
 744       <accept Tcompiler="ARMCC"/>
 745       <accept Tcompiler="GCC"/>
 746       <accept Tcompiler="IAR"/>
 747     </condition>
 748
 749     <!-- ARM architecture -->
 750     <condition id="ARMv6-M Device">
 751       <description>ARMv6-M architecture based device</description>
 752       <accept Dcore="Cortex-M0"/>
 753       <accept Dcore="Cortex-M0+"/>
 754       <accept Dcore="SC000"/>
 755     </condition>
 756     <condition id="ARMv7-M Device">
 757       <description>ARMv7-M architecture based device</description>
 758       <accept Dcore="Cortex-M3"/>
 759       <accept Dcore="Cortex-M4"/>
 760       <accept Dcore="Cortex-M7"/>
 761       <accept Dcore="SC300"/>
 762     </condition>
 763     <condition id="ARMv8-M Device">
 764       <description>ARMv8-M architecture based device</description>
 765       <accept Dcore="ARMV8MBL"/>
 766       <accept Dcore="ARMV8MML"/>
 767       <accept Dcore="Cortex-M23"/>
 768       <accept Dcore="Cortex-M33"/>
 769     </condition>
 770     <condition id="ARMv8-M TZ Device">
 771       <description>ARMv8-M architecture based device with TrustZone</description>
 772       <require condition="ARMv8-M Device"/>
 773       <require Dtz="TZ"/>
 774     </condition>
 775     <condition id="ARMv6_7-M Device">
 776       <description>ARMv6_7-M architecture based device</description>
 777       <accept condition="ARMv6-M Device"/>
 778       <accept condition="ARMv7-M Device"/>
 779     </condition>
 780     <condition id="ARMv6_7_8-M Device">
 781       <description>ARMv6_7_8-M architecture based device</description>
 782       <accept condition="ARMv6-M Device"/>
 783       <accept condition="ARMv7-M Device"/>
 784       <accept condition="ARMv8-M Device"/>
 785     </condition>
 786     <condition id="ARMv7-A Device">
 787       <description>ARMv7-A architecture based device</description>
 788       <accept Dcore="Cortex-A5"/>
 789       <accept Dcore="Cortex-A7"/>
 790       <accept Dcore="Cortex-A9"/>
 791     </condition>
 792
 793     <!-- ARM core -->
 794     <condition id="CM0">
 795       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 796       <accept Dcore="Cortex-M0"/>
 797       <accept Dcore="Cortex-M0+"/>
 798       <accept Dcore="SC000"/>
 799     </condition>
 800     <condition id="CM3">
 801       <description>Cortex-M3 or SC300 processor based device</description>
 802       <accept Dcore="Cortex-M3"/>
 803       <accept Dcore="SC300"/>
 804     </condition>
 805     <condition id="CM4">
 806       <description>Cortex-M4 processor based device</description>
 807       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 808     </condition>
 809     <condition id="CM4_FP">
 810       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 811       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 812     </condition>
 813     <condition id="CM7">
 814       <description>Cortex-M7 processor based device</description>
 815       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 816     </condition>
 817     <condition id="CM7_FP">
 818       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 819       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 820       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 821     </condition>
 822     <condition id="CM7_SP">
 823       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 824       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 825     </condition>
 826     <condition id="CM7_DP">
 827       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 828       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 829     </condition>
 830     <condition id="CM23">
 831       <description>Cortex-M23 processor based device</description>
 832       <require Dcore="Cortex-M23"/>
 833     </condition>
 834     <condition id="CM33">
 835       <description>Cortex-M33 processor based device</description>
 836       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 837     </condition>
 838     <condition id="CM33_FP">
 839       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 840       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 841     </condition>
 842     <condition id="ARMv8MBL">
 843       <description>ARMv8-M Baseline processor based device</description>
 844       <require Dcore="ARMV8MBL"/>
 845     </condition>
 846     <condition id="ARMv8MML">
 847       <description>ARMv8-M Mainline processor based device</description>
 848       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 849     </condition>
 850     <condition id="ARMv8MML_FP">
 851       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 852       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 853       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 854     </condition>
 855
 856     <condition id="CM33_NODSP_NOFPU">
 857       <description>CM33, no DSP, no FPU</description>
 858       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 859     </condition>
 860     <condition id="CM33_DSP_NOFPU">
 861       <description>CM33, DSP, no FPU</description>
 862       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 863     </condition>
 864     <condition id="CM33_NODSP_SP">
 865       <description>CM33, no DSP, SP FPU</description>
 866       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 867     </condition>
 868     <condition id="CM33_DSP_SP">
 869       <description>CM33, DSP, SP FPU</description>
 870       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 871     </condition>
 872
 873     <condition id="ARMv8MML_NODSP_NOFPU">
 874       <description>ARMv8MML, no DSP, no FPU</description>
 875       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 876     </condition>
 877     <condition id="ARMv8MML_DSP_NOFPU">
 878       <description>ARMv8MML, DSP, no FPU</description>
 879       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 880     </condition>
 881     <condition id="ARMv8MML_NODSP_SP">
 882       <description>ARMv8MML, no DSP, SP FPU</description>
 883       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 884     </condition>
 885     <condition id="ARMv8MML_DSP_SP">
 886       <description>ARMv8MML, DSP, SP FPU</description>
 887       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 888     </condition>
 889
 890     <condition id="CA5_CA9">
 891       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 892       <accept Dcore="Cortex-A5"/>
 893       <accept Dcore="Cortex-A9"/>
 894     </condition>
 895
 896     <condition id="CA7">
 897       <description>Cortex-A7 processor based device</description>
 898       <accept Dcore="Cortex-A7"/>
 899     </condition>
 900
 901     <!-- ARMCC compiler -->
 902     <condition id="CA_ARMCC5">
 903       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
 904       <require condition="ARMv7-A Device"/>
 905       <require condition="ARMCC5"/>
 906     </condition>
 907     <condition id="CA_ARMCC6">
 908       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
 909       <require condition="ARMv7-A Device"/>
 910       <require condition="ARMCC6"/>
 911     </condition>
 912
 913     <condition id="CM0_ARMCC">
 914       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 915       <require condition="CM0"/>
 916       <require Tcompiler="ARMCC"/>
 917     </condition>
 918     <condition id="CM0_LE_ARMCC">
 919       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 920       <require condition="CM0_ARMCC"/>
 921       <require Dendian="Little-endian"/>
 922     </condition>
 923     <condition id="CM0_BE_ARMCC">
 924       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 925       <require condition="CM0_ARMCC"/>
 926       <require Dendian="Big-endian"/>
 927     </condition>
 928
 929     <condition id="CM3_ARMCC">
 930       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 931       <require condition="CM3"/>
 932       <require Tcompiler="ARMCC"/>
 933     </condition>
 934     <condition id="CM3_LE_ARMCC">
 935       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 936       <require condition="CM3_ARMCC"/>
 937       <require Dendian="Little-endian"/>
 938     </condition>
 939     <condition id="CM3_BE_ARMCC">
 940       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 941       <require condition="CM3_ARMCC"/>
 942       <require Dendian="Big-endian"/>
 943     </condition>
 944
 945     <condition id="CM4_ARMCC">
 946       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 947       <require condition="CM4"/>
 948       <require Tcompiler="ARMCC"/>
 949     </condition>
 950     <condition id="CM4_LE_ARMCC">
 951       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 952       <require condition="CM4_ARMCC"/>
 953       <require Dendian="Little-endian"/>
 954     </condition>
 955     <condition id="CM4_BE_ARMCC">
 956       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 957       <require condition="CM4_ARMCC"/>
 958       <require Dendian="Big-endian"/>
 959     </condition>
 960
 961     <condition id="CM4_FP_ARMCC">
 962       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 963       <require condition="CM4_FP"/>
 964       <require Tcompiler="ARMCC"/>
 965     </condition>
 966     <condition id="CM4_FP_LE_ARMCC">
 967       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 968       <require condition="CM4_FP_ARMCC"/>
 969       <require Dendian="Little-endian"/>
 970     </condition>
 971     <condition id="CM4_FP_BE_ARMCC">
 972       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 973       <require condition="CM4_FP_ARMCC"/>
 974       <require Dendian="Big-endian"/>
 975     </condition>
 976
 977     <condition id="CM7_ARMCC">
 978       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 979       <require condition="CM7"/>
 980       <require Tcompiler="ARMCC"/>
 981     </condition>
 982     <condition id="CM7_LE_ARMCC">
 983       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 984       <require condition="CM7_ARMCC"/>
 985       <require Dendian="Little-endian"/>
 986     </condition>
 987     <condition id="CM7_BE_ARMCC">
 988       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 989       <require condition="CM7_ARMCC"/>
 990       <require Dendian="Big-endian"/>
 991     </condition>
 992
 993     <condition id="CM7_FP_ARMCC">
 994       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 995       <require condition="CM7_FP"/>
 996       <require Tcompiler="ARMCC"/>
 997     </condition>
 998     <condition id="CM7_FP_LE_ARMCC">
 999       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1000       <require condition="CM7_FP_ARMCC"/>
1001       <require Dendian="Little-endian"/>
1002     </condition>
1003     <condition id="CM7_FP_BE_ARMCC">
1004       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1005       <require condition="CM7_FP_ARMCC"/>
1006       <require Dendian="Big-endian"/>
1007     </condition>
1008
1009     <condition id="CM7_SP_ARMCC">
1010       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1011       <require condition="CM7_SP"/>
1012       <require Tcompiler="ARMCC"/>
1013     </condition>
1014     <condition id="CM7_SP_LE_ARMCC">
1015       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1016       <require condition="CM7_SP_ARMCC"/>
1017       <require Dendian="Little-endian"/>
1018     </condition>
1019     <condition id="CM7_SP_BE_ARMCC">
1020       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1021       <require condition="CM7_SP_ARMCC"/>
1022       <require Dendian="Big-endian"/>
1023     </condition>
1024
1025     <condition id="CM7_DP_ARMCC">
1026       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1027       <require condition="CM7_DP"/>
1028       <require Tcompiler="ARMCC"/>
1029     </condition>
1030     <condition id="CM7_DP_LE_ARMCC">
1031       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1032       <require condition="CM7_DP_ARMCC"/>
1033       <require Dendian="Little-endian"/>
1034     </condition>
1035     <condition id="CM7_DP_BE_ARMCC">
1036       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1037       <require condition="CM7_DP_ARMCC"/>
1038       <require Dendian="Big-endian"/>
1039     </condition>
1040
1041     <condition id="CM23_ARMCC">
1042       <description>Cortex-M23 processor based device for the ARM Compiler</description>
1043       <require condition="CM23"/>
1044       <require Tcompiler="ARMCC"/>
1045     </condition>
1046     <condition id="CM23_LE_ARMCC">
1047       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1048       <require condition="CM23_ARMCC"/>
1049       <require Dendian="Little-endian"/>
1050     </condition>
1051     <condition id="CM23_BE_ARMCC">
1052       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1053       <require condition="CM23_ARMCC"/>
1054       <require Dendian="Big-endian"/>
1055     </condition>
1056
1057     <condition id="CM33_ARMCC">
1058       <description>Cortex-M33 processor based device for the ARM Compiler</description>
1059       <require condition="CM33"/>
1060       <require Tcompiler="ARMCC"/>
1061     </condition>
1062     <condition id="CM33_LE_ARMCC">
1063       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1064       <require condition="CM33_ARMCC"/>
1065       <require Dendian="Little-endian"/>
1066     </condition>
1067     <condition id="CM33_BE_ARMCC">
1068       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1069       <require condition="CM33_ARMCC"/>
1070       <require Dendian="Big-endian"/>
1071     </condition>
1072
1073     <condition id="CM33_FP_ARMCC">
1074       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1075       <require condition="CM33_FP"/>
1076       <require Tcompiler="ARMCC"/>
1077     </condition>
1078     <condition id="CM33_FP_LE_ARMCC">
1079       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1080       <require condition="CM33_FP_ARMCC"/>
1081       <require Dendian="Little-endian"/>
1082     </condition>
1083     <condition id="CM33_FP_BE_ARMCC">
1084       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1085       <require condition="CM33_FP_ARMCC"/>
1086       <require Dendian="Big-endian"/>
1087     </condition>
1088
1089     <condition id="CM33_NODSP_NOFPU_ARMCC">
1090       <description>CM33, no DSP, no FPU, ARM Compiler</description>
1091       <require condition="CM33_NODSP_NOFPU"/>
1092       <require Tcompiler="ARMCC"/>
1093     </condition>
1094     <condition id="CM33_DSP_NOFPU_ARMCC">
1095       <description>CM33, DSP, no FPU, ARM Compiler</description>
1096       <require condition="CM33_DSP_NOFPU"/>
1097       <require Tcompiler="ARMCC"/>
1098     </condition>
1099     <condition id="CM33_NODSP_SP_ARMCC">
1100       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1101       <require condition="CM33_NODSP_SP"/>
1102       <require Tcompiler="ARMCC"/>
1103     </condition>
1104     <condition id="CM33_DSP_SP_ARMCC">
1105       <description>CM33, DSP, SP FPU, ARM Compiler</description>
1106       <require condition="CM33_DSP_SP"/>
1107       <require Tcompiler="ARMCC"/>
1108     </condition>
1109     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1110       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1111       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1112       <require Dendian="Little-endian"/>
1113     </condition>
1114     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1115       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1116       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1117       <require Dendian="Little-endian"/>
1118     </condition>
1119     <condition id="CM33_NODSP_SP_LE_ARMCC">
1120       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1121       <require condition="CM33_NODSP_SP_ARMCC"/>
1122       <require Dendian="Little-endian"/>
1123     </condition>
1124     <condition id="CM33_DSP_SP_LE_ARMCC">
1125       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
1126       <require condition="CM33_DSP_SP_ARMCC"/>
1127       <require Dendian="Little-endian"/>
1128     </condition>
1129
1130     <condition id="ARMv8MBL_ARMCC">
1131       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1132       <require condition="ARMv8MBL"/>
1133       <require Tcompiler="ARMCC"/>
1134     </condition>
1135     <condition id="ARMv8MBL_LE_ARMCC">
1136       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1137       <require condition="ARMv8MBL_ARMCC"/>
1138       <require Dendian="Little-endian"/>
1139     </condition>
1140     <condition id="ARMv8MBL_BE_ARMCC">
1141       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1142       <require condition="ARMv8MBL_ARMCC"/>
1143       <require Dendian="Big-endian"/>
1144     </condition>
1145
1146     <condition id="ARMv8MML_ARMCC">
1147       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1148       <require condition="ARMv8MML"/>
1149       <require Tcompiler="ARMCC"/>
1150     </condition>
1151     <condition id="ARMv8MML_LE_ARMCC">
1152       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1153       <require condition="ARMv8MML_ARMCC"/>
1154       <require Dendian="Little-endian"/>
1155     </condition>
1156     <condition id="ARMv8MML_BE_ARMCC">
1157       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1158       <require condition="ARMv8MML_ARMCC"/>
1159       <require Dendian="Big-endian"/>
1160     </condition>
1161
1162     <condition id="ARMv8MML_FP_ARMCC">
1163       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1164       <require condition="ARMv8MML_FP"/>
1165       <require Tcompiler="ARMCC"/>
1166     </condition>
1167     <condition id="ARMv8MML_FP_LE_ARMCC">
1168       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1169       <require condition="ARMv8MML_FP_ARMCC"/>
1170       <require Dendian="Little-endian"/>
1171     </condition>
1172     <condition id="ARMv8MML_FP_BE_ARMCC">
1173       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1174       <require condition="ARMv8MML_FP_ARMCC"/>
1175       <require Dendian="Big-endian"/>
1176     </condition>
1177
1178     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1179       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1180       <require condition="ARMv8MML_NODSP_NOFPU"/>
1181       <require Tcompiler="ARMCC"/>
1182     </condition>
1183     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1184       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1185       <require condition="ARMv8MML_DSP_NOFPU"/>
1186       <require Tcompiler="ARMCC"/>
1187     </condition>
1188     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1189       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1190       <require condition="ARMv8MML_NODSP_SP"/>
1191       <require Tcompiler="ARMCC"/>
1192     </condition>
1193     <condition id="ARMv8MML_DSP_SP_ARMCC">
1194       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1195       <require condition="ARMv8MML_DSP_SP"/>
1196       <require Tcompiler="ARMCC"/>
1197     </condition>
1198     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1199       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1200       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1201       <require Dendian="Little-endian"/>
1202     </condition>
1203     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1204       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1205       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1206       <require Dendian="Little-endian"/>
1207     </condition>
1208     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1209       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1210       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1211       <require Dendian="Little-endian"/>
1212     </condition>
1213     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1214       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1215       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1216       <require Dendian="Little-endian"/>
1217     </condition>
1218
1219     <!-- GCC compiler -->
1220     <condition id="CA_GCC">
1221       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1222       <require condition="ARMv7-A Device"/>
1223       <require Tcompiler="GCC"/>
1224     </condition>
1225
1226     <condition id="CM0_GCC">
1227       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1228       <require condition="CM0"/>
1229       <require Tcompiler="GCC"/>
1230     </condition>
1231     <condition id="CM0_LE_GCC">
1232       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1233       <require condition="CM0_GCC"/>
1234       <require Dendian="Little-endian"/>
1235     </condition>
1236     <condition id="CM0_BE_GCC">
1237       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1238       <require condition="CM0_GCC"/>
1239       <require Dendian="Big-endian"/>
1240     </condition>
1241
1242     <condition id="CM3_GCC">
1243       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1244       <require condition="CM3"/>
1245       <require Tcompiler="GCC"/>
1246     </condition>
1247     <condition id="CM3_LE_GCC">
1248       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1249       <require condition="CM3_GCC"/>
1250       <require Dendian="Little-endian"/>
1251     </condition>
1252     <condition id="CM3_BE_GCC">
1253       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1254       <require condition="CM3_GCC"/>
1255       <require Dendian="Big-endian"/>
1256     </condition>
1257
1258     <condition id="CM4_GCC">
1259       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1260       <require condition="CM4"/>
1261       <require Tcompiler="GCC"/>
1262     </condition>
1263     <condition id="CM4_LE_GCC">
1264       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1265       <require condition="CM4_GCC"/>
1266       <require Dendian="Little-endian"/>
1267     </condition>
1268     <condition id="CM4_BE_GCC">
1269       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1270       <require condition="CM4_GCC"/>
1271       <require Dendian="Big-endian"/>
1272     </condition>
1273
1274     <condition id="CM4_FP_GCC">
1275       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1276       <require condition="CM4_FP"/>
1277       <require Tcompiler="GCC"/>
1278     </condition>
1279     <condition id="CM4_FP_LE_GCC">
1280       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1281       <require condition="CM4_FP_GCC"/>
1282       <require Dendian="Little-endian"/>
1283     </condition>
1284     <condition id="CM4_FP_BE_GCC">
1285       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1286       <require condition="CM4_FP_GCC"/>
1287       <require Dendian="Big-endian"/>
1288     </condition>
1289
1290     <condition id="CM7_GCC">
1291       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1292       <require condition="CM7"/>
1293       <require Tcompiler="GCC"/>
1294     </condition>
1295     <condition id="CM7_LE_GCC">
1296       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1297       <require condition="CM7_GCC"/>
1298       <require Dendian="Little-endian"/>
1299     </condition>
1300     <condition id="CM7_BE_GCC">
1301       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1302       <require condition="CM7_GCC"/>
1303       <require Dendian="Big-endian"/>
1304     </condition>
1305
1306     <condition id="CM7_FP_GCC">
1307       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1308       <require condition="CM7_FP"/>
1309       <require Tcompiler="GCC"/>
1310     </condition>
1311     <condition id="CM7_FP_LE_GCC">
1312       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1313       <require condition="CM7_FP_GCC"/>
1314       <require Dendian="Little-endian"/>
1315     </condition>
1316     <condition id="CM7_FP_BE_GCC">
1317       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1318       <require condition="CM7_FP_GCC"/>
1319       <require Dendian="Big-endian"/>
1320     </condition>
1321
1322     <condition id="CM7_SP_GCC">
1323       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1324       <require condition="CM7_SP"/>
1325       <require Tcompiler="GCC"/>
1326     </condition>
1327     <condition id="CM7_SP_LE_GCC">
1328       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1329       <require condition="CM7_SP_GCC"/>
1330       <require Dendian="Little-endian"/>
1331     </condition>
1332     <condition id="CM7_SP_BE_GCC">
1333       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1334       <require condition="CM7_SP_GCC"/>
1335       <require Dendian="Big-endian"/>
1336     </condition>
1337
1338     <condition id="CM7_DP_GCC">
1339       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1340       <require condition="CM7_DP"/>
1341       <require Tcompiler="GCC"/>
1342     </condition>
1343     <condition id="CM7_DP_LE_GCC">
1344       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1345       <require condition="CM7_DP_GCC"/>
1346       <require Dendian="Little-endian"/>
1347     </condition>
1348     <condition id="CM7_DP_BE_GCC">
1349       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1350       <require condition="CM7_DP_GCC"/>
1351       <require Dendian="Big-endian"/>
1352     </condition>
1353
1354     <condition id="CM23_GCC">
1355       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1356       <require condition="CM23"/>
1357       <require Tcompiler="GCC"/>
1358     </condition>
1359     <condition id="CM23_LE_GCC">
1360       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1361       <require condition="CM23_GCC"/>
1362       <require Dendian="Little-endian"/>
1363     </condition>
1364     <condition id="CM23_BE_GCC">
1365       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1366       <require condition="CM23_GCC"/>
1367       <require Dendian="Big-endian"/>
1368     </condition>
1369
1370     <condition id="CM33_GCC">
1371       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1372       <require condition="CM33"/>
1373       <require Tcompiler="GCC"/>
1374     </condition>
1375     <condition id="CM33_LE_GCC">
1376       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1377       <require condition="CM33_GCC"/>
1378       <require Dendian="Little-endian"/>
1379     </condition>
1380     <condition id="CM33_BE_GCC">
1381       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1382       <require condition="CM33_GCC"/>
1383       <require Dendian="Big-endian"/>
1384     </condition>
1385
1386     <condition id="CM33_FP_GCC">
1387       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1388       <require condition="CM33_FP"/>
1389       <require Tcompiler="GCC"/>
1390     </condition>
1391     <condition id="CM33_FP_LE_GCC">
1392       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1393       <require condition="CM33_FP_GCC"/>
1394       <require Dendian="Little-endian"/>
1395     </condition>
1396     <condition id="CM33_FP_BE_GCC">
1397       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1398       <require condition="CM33_FP_GCC"/>
1399       <require Dendian="Big-endian"/>
1400     </condition>
1401
1402     <condition id="CM33_NODSP_NOFPU_GCC">
1403       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1404       <require condition="CM33_NODSP_NOFPU"/>
1405       <require Tcompiler="GCC"/>
1406     </condition>
1407     <condition id="CM33_DSP_NOFPU_GCC">
1408       <description>CM33, DSP, no FPU, GCC Compiler</description>
1409       <require condition="CM33_DSP_NOFPU"/>
1410       <require Tcompiler="GCC"/>
1411     </condition>
1412     <condition id="CM33_NODSP_SP_GCC">
1413       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1414       <require condition="CM33_NODSP_SP"/>
1415       <require Tcompiler="GCC"/>
1416     </condition>
1417     <condition id="CM33_DSP_SP_GCC">
1418       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1419       <require condition="CM33_DSP_SP"/>
1420       <require Tcompiler="GCC"/>
1421     </condition>
1422     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1423       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1424       <require condition="CM33_NODSP_NOFPU_GCC"/>
1425       <require Dendian="Little-endian"/>
1426     </condition>
1427     <condition id="CM33_DSP_NOFPU_LE_GCC">
1428       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1429       <require condition="CM33_DSP_NOFPU_GCC"/>
1430       <require Dendian="Little-endian"/>
1431     </condition>
1432     <condition id="CM33_NODSP_SP_LE_GCC">
1433       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1434       <require condition="CM33_NODSP_SP_GCC"/>
1435       <require Dendian="Little-endian"/>
1436     </condition>
1437     <condition id="CM33_DSP_SP_LE_GCC">
1438       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1439       <require condition="CM33_DSP_SP_GCC"/>
1440       <require Dendian="Little-endian"/>
1441     </condition>
1442
1443     <condition id="ARMv8MBL_GCC">
1444       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1445       <require condition="ARMv8MBL"/>
1446       <require Tcompiler="GCC"/>
1447     </condition>
1448     <condition id="ARMv8MBL_LE_GCC">
1449       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1450       <require condition="ARMv8MBL_GCC"/>
1451       <require Dendian="Little-endian"/>
1452     </condition>
1453     <condition id="ARMv8MBL_BE_GCC">
1454       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1455       <require condition="ARMv8MBL_GCC"/>
1456       <require Dendian="Big-endian"/>
1457     </condition>
1458
1459     <condition id="ARMv8MML_GCC">
1460       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1461       <require condition="ARMv8MML"/>
1462       <require Tcompiler="GCC"/>
1463     </condition>
1464     <condition id="ARMv8MML_LE_GCC">
1465       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1466       <require condition="ARMv8MML_GCC"/>
1467       <require Dendian="Little-endian"/>
1468     </condition>
1469     <condition id="ARMv8MML_BE_GCC">
1470       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1471       <require condition="ARMv8MML_GCC"/>
1472       <require Dendian="Big-endian"/>
1473     </condition>
1474
1475     <condition id="ARMv8MML_FP_GCC">
1476       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1477       <require condition="ARMv8MML_FP"/>
1478       <require Tcompiler="GCC"/>
1479     </condition>
1480     <condition id="ARMv8MML_FP_LE_GCC">
1481       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1482       <require condition="ARMv8MML_FP_GCC"/>
1483       <require Dendian="Little-endian"/>
1484     </condition>
1485     <condition id="ARMv8MML_FP_BE_GCC">
1486       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1487       <require condition="ARMv8MML_FP_GCC"/>
1488       <require Dendian="Big-endian"/>
1489     </condition>
1490
1491     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1492       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1493       <require condition="ARMv8MML_NODSP_NOFPU"/>
1494       <require Tcompiler="GCC"/>
1495     </condition>
1496     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1497       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1498       <require condition="ARMv8MML_DSP_NOFPU"/>
1499       <require Tcompiler="GCC"/>
1500     </condition>
1501     <condition id="ARMv8MML_NODSP_SP_GCC">
1502       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1503       <require condition="ARMv8MML_NODSP_SP"/>
1504       <require Tcompiler="GCC"/>
1505     </condition>
1506     <condition id="ARMv8MML_DSP_SP_GCC">
1507       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1508       <require condition="ARMv8MML_DSP_SP"/>
1509       <require Tcompiler="GCC"/>
1510     </condition>
1511     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1512       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1513       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1514       <require Dendian="Little-endian"/>
1515     </condition>
1516     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1517       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1518       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1519       <require Dendian="Little-endian"/>
1520     </condition>
1521     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1522       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1523       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1524       <require Dendian="Little-endian"/>
1525     </condition>
1526     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1527       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1528       <require condition="ARMv8MML_DSP_SP_GCC"/>
1529       <require Dendian="Little-endian"/>
1530     </condition>
1531
1532     <!-- IAR compiler -->
1533     <condition id="CA_IAR">
1534       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1535       <require condition="ARMv7-A Device"/>
1536       <require Tcompiler="IAR"/>
1537     </condition>
1538
1539     <condition id="CM0_IAR">
1540       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1541       <require condition="CM0"/>
1542       <require Tcompiler="IAR"/>
1543     </condition>
1544     <condition id="CM0_LE_IAR">
1545       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1546       <require condition="CM0_IAR"/>
1547       <require Dendian="Little-endian"/>
1548     </condition>
1549     <condition id="CM0_BE_IAR">
1550       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1551       <require condition="CM0_IAR"/>
1552       <require Dendian="Big-endian"/>
1553     </condition>
1554
1555     <condition id="CM3_IAR">
1556       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1557       <require condition="CM3"/>
1558       <require Tcompiler="IAR"/>
1559     </condition>
1560     <condition id="CM3_LE_IAR">
1561       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1562       <require condition="CM3_IAR"/>
1563       <require Dendian="Little-endian"/>
1564     </condition>
1565     <condition id="CM3_BE_IAR">
1566       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1567       <require condition="CM3_IAR"/>
1568       <require Dendian="Big-endian"/>
1569     </condition>
1570
1571     <condition id="CM4_IAR">
1572       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1573       <require condition="CM4"/>
1574       <require Tcompiler="IAR"/>
1575     </condition>
1576     <condition id="CM4_LE_IAR">
1577       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1578       <require condition="CM4_IAR"/>
1579       <require Dendian="Little-endian"/>
1580     </condition>
1581     <condition id="CM4_BE_IAR">
1582       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1583       <require condition="CM4_IAR"/>
1584       <require Dendian="Big-endian"/>
1585     </condition>
1586
1587     <condition id="CM4_FP_IAR">
1588       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1589       <require condition="CM4_FP"/>
1590       <require Tcompiler="IAR"/>
1591     </condition>
1592     <condition id="CM4_FP_LE_IAR">
1593       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1594       <require condition="CM4_FP_IAR"/>
1595       <require Dendian="Little-endian"/>
1596     </condition>
1597     <condition id="CM4_FP_BE_IAR">
1598       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1599       <require condition="CM4_FP_IAR"/>
1600       <require Dendian="Big-endian"/>
1601     </condition>
1602
1603     <condition id="CM7_IAR">
1604       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1605       <require condition="CM7"/>
1606       <require Tcompiler="IAR"/>
1607     </condition>
1608     <condition id="CM7_LE_IAR">
1609       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1610       <require condition="CM7_IAR"/>
1611       <require Dendian="Little-endian"/>
1612     </condition>
1613     <condition id="CM7_BE_IAR">
1614       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1615       <require condition="CM7_IAR"/>
1616       <require Dendian="Big-endian"/>
1617     </condition>
1618
1619     <condition id="CM7_FP_IAR">
1620       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1621       <require condition="CM7_FP"/>
1622       <require Tcompiler="IAR"/>
1623     </condition>
1624     <condition id="CM7_FP_LE_IAR">
1625       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1626       <require condition="CM7_FP_IAR"/>
1627       <require Dendian="Little-endian"/>
1628     </condition>
1629     <condition id="CM7_FP_BE_IAR">
1630       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1631       <require condition="CM7_FP_IAR"/>
1632       <require Dendian="Big-endian"/>
1633     </condition>
1634
1635     <condition id="CM7_SP_IAR">
1636       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1637       <require condition="CM7_SP"/>
1638       <require Tcompiler="IAR"/>
1639     </condition>
1640     <condition id="CM7_SP_LE_IAR">
1641       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1642       <require condition="CM7_SP_IAR"/>
1643       <require Dendian="Little-endian"/>
1644     </condition>
1645     <condition id="CM7_SP_BE_IAR">
1646       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1647       <require condition="CM7_SP_IAR"/>
1648       <require Dendian="Big-endian"/>
1649     </condition>
1650
1651     <condition id="CM7_DP_IAR">
1652       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1653       <require condition="CM7_DP"/>
1654       <require Tcompiler="IAR"/>
1655     </condition>
1656     <condition id="CM7_DP_LE_IAR">
1657       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1658       <require condition="CM7_DP_IAR"/>
1659       <require Dendian="Little-endian"/>
1660     </condition>
1661     <condition id="CM7_DP_BE_IAR">
1662       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1663       <require condition="CM7_DP_IAR"/>
1664       <require Dendian="Big-endian"/>
1665     </condition>
1666
1667     <!-- conditions selecting single devices and CMSIS Core -->
1668     <!-- used for component startup, GCC version is used for C-Startup -->
1669     <condition id="ARMCM0 CMSIS">
1670       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1671       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1672       <require Cclass="CMSIS" Cgroup="CORE"/>
1673     </condition>
1674     <condition id="ARMCM0 CMSIS GCC">
1675       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1676       <require condition="ARMCM0 CMSIS"/>
1677       <require condition="GCC"/>
1678     </condition>
1679
1680     <condition id="ARMCM0+ CMSIS">
1681       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1682       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1683       <require Cclass="CMSIS" Cgroup="CORE"/>
1684     </condition>
1685     <condition id="ARMCM0+ CMSIS GCC">
1686       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1687       <require condition="ARMCM0+ CMSIS"/>
1688       <require condition="GCC"/>
1689     </condition>
1690
1691     <condition id="ARMCM3 CMSIS">
1692       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1693       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1694       <require Cclass="CMSIS" Cgroup="CORE"/>
1695     </condition>
1696     <condition id="ARMCM3 CMSIS GCC">
1697       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1698       <require condition="ARMCM3 CMSIS"/>
1699       <require condition="GCC"/>
1700     </condition>
1701
1702     <condition id="ARMCM4 CMSIS">
1703       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1704       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1705       <require Cclass="CMSIS" Cgroup="CORE"/>
1706     </condition>
1707     <condition id="ARMCM4 CMSIS GCC">
1708       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1709       <require condition="ARMCM4 CMSIS"/>
1710       <require condition="GCC"/>
1711     </condition>
1712
1713     <condition id="ARMCM7 CMSIS">
1714       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1715       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1716       <require Cclass="CMSIS" Cgroup="CORE"/>
1717     </condition>
1718     <condition id="ARMCM7 CMSIS GCC">
1719       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1720       <require condition="ARMCM7 CMSIS"/>
1721       <require condition="GCC"/>
1722     </condition>
1723
1724     <condition id="ARMCM23 CMSIS">
1725       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1726       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1727       <require Cclass="CMSIS" Cgroup="CORE"/>
1728     </condition>
1729     <condition id="ARMCM23 CMSIS GCC">
1730       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1731       <require condition="ARMCM23 CMSIS"/>
1732       <require condition="GCC"/>
1733     </condition>
1734
1735     <condition id="ARMCM33 CMSIS">
1736       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1737       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1738       <require Cclass="CMSIS" Cgroup="CORE"/>
1739     </condition>
1740     <condition id="ARMCM33 CMSIS GCC">
1741       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1742       <require condition="ARMCM33 CMSIS"/>
1743       <require condition="GCC"/>
1744     </condition>
1745
1746     <condition id="ARMSC000 CMSIS">
1747       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1748       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1749       <require Cclass="CMSIS" Cgroup="CORE"/>
1750     </condition>
1751     <condition id="ARMSC000 CMSIS GCC">
1752       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1753       <require condition="ARMSC000 CMSIS"/>
1754       <require condition="GCC"/>
1755     </condition>
1756
1757     <condition id="ARMSC300 CMSIS">
1758       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1759       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1760       <require Cclass="CMSIS" Cgroup="CORE"/>
1761     </condition>
1762     <condition id="ARMSC300 CMSIS GCC">
1763       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1764       <require condition="ARMSC300 CMSIS"/>
1765       <require condition="GCC"/>
1766     </condition>
1767
1768     <condition id="ARMv8MBL CMSIS">
1769       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1770       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1771       <require Cclass="CMSIS" Cgroup="CORE"/>
1772     </condition>
1773     <condition id="ARMv8MBL CMSIS GCC">
1774       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1775       <require condition="ARMv8MBL CMSIS"/>
1776       <require condition="GCC"/>
1777     </condition>
1778
1779     <condition id="ARMv8MML CMSIS">
1780       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1781       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1782       <require Cclass="CMSIS" Cgroup="CORE"/>
1783     </condition>
1784     <condition id="ARMv8MML CMSIS GCC">
1785       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1786       <require condition="ARMv8MML CMSIS"/>
1787       <require condition="GCC"/>
1788     </condition>
1789
1790     <condition id="ARMCA5 CMSIS">
1791       <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1792       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1793       <require Cclass="CMSIS" Cgroup="CORE"/>
1794     </condition>
1795
1796     <condition id="ARMCA7 CMSIS">
1797       <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1798       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1799       <require Cclass="CMSIS" Cgroup="CORE"/>
1800     </condition>
1801
1802     <condition id="ARMCA9 CMSIS">
1803       <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1804       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1805       <require Cclass="CMSIS" Cgroup="CORE"/>
1806     </condition>
1807
1808     <!-- CMSIS DSP -->
1809     <condition id="CMSIS DSP">
1810       <description>Components required for DSP</description>
1811       <require condition="ARMv6_7_8-M Device"/>
1812       <require condition="ARMCC GCC"/>
1813       <require Cclass="CMSIS" Cgroup="CORE"/>
1814     </condition>
1815
1816     <!-- RTOS RTX -->
1817     <condition id="RTOS RTX">
1818       <description>Components required for RTOS RTX</description>
1819       <require condition="ARMv6_7-M Device"/>
1820       <require condition="ARMCC GCC IAR"/>
1821       <require Cclass="Device" Cgroup="Startup"/>
1822       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1823     </condition>
1824     <condition id="RTOS RTX IFX">
1825       <description>Components required for RTOS RTX IFX</description>
1826       <require condition="ARMv6_7-M Device"/>
1827       <require condition="ARMCC GCC IAR"/>
1828       <require Dvendor="Infineon:7" Dname="XMC4*"/>
1829       <require Cclass="Device" Cgroup="Startup"/>
1830       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1831     </condition>
1832     <condition id="RTOS RTX5">
1833       <description>Components required for RTOS RTX5</description>
1834       <require condition="ARMv6_7_8-M Device"/>
1835       <require condition="ARMCC GCC IAR"/>
1836       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1837     </condition>
1838     <condition id="RTOS2 RTX5">
1839       <description>Components required for RTOS2 RTX5</description>
1840       <require condition="ARMv6_7_8-M Device"/>
1841       <require condition="ARMCC GCC IAR"/>
1842       <require Cclass="CMSIS"  Cgroup="CORE"/>
1843       <require Cclass="Device" Cgroup="Startup"/>
1844     </condition>
1845     <condition id="RTOS2 RTX5 v7-A">
1846       <description>Components required for RTOS2 RTX5 v7-A</description>
1847       <require condition="ARMv7-A Device"/>
1848       <require condition="ARMCC GCC IAR"/>
1849       <require Cclass="CMSIS"  Cgroup="CORE"/>
1850       <require Cclass="Device" Cgroup="Startup"/>
1851       <require Cclass="Device" Cgroup="OS Tick"/>
1852       <require Cclass="Device" Cgroup="IRQ Controller"/>
1853     </condition>
1854     <condition id="RTOS2 RTX5 Lib">
1855       <description>Components required for RTOS2 RTX5 Library</description>
1856       <require condition="ARMv6_7_8-M Device"/>
1857       <require condition="ARMCC GCC IAR"/>
1858       <require Cclass="CMSIS"  Cgroup="CORE"/>
1859       <require Cclass="Device" Cgroup="Startup"/>
1860     </condition>
1861     <condition id="RTOS2 RTX5 NS">
1862       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1863       <require condition="ARMv8-M TZ Device"/>
1864       <require condition="ARMCC GCC"/>
1865       <require Cclass="CMSIS"  Cgroup="CORE"/>
1866       <require Cclass="Device" Cgroup="Startup"/>
1867     </condition>
1868
1869     <!-- OS Tick -->
1870     <condition id="OS Tick PTIM">
1871       <description>Components required for OS Tick Private Timer</description>
1872       <require condition="CA5_CA9"/>
1873       <require Cclass="Device" Cgroup="IRQ Controller"/>
1874     </condition>
1875
1876     <condition id="OS Tick GTIM">
1877       <description>Components required for OS Tick Generic Physical Timer</description>
1878       <require condition="CA7"/>
1879       <require Cclass="Device" Cgroup="IRQ Controller"/>
1880     </condition>
1881
1882   </conditions>
1883
1884   <components>
1885     <!-- CMSIS-Core component -->
1886     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.2"  condition="ARMv6_7_8-M Device" >
1887       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1888       <files>
1889         <!-- CPU independent -->
1890         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1891         <file category="include" name="CMSIS/Include/"/>
1892         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1893         <!-- Code template -->
1894         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1895         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1896       </files>
1897     </component>
1898
1899     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.1"  condition="ARMv7-A Device" >
1900       <description>CMSIS-CORE for Cortex-A</description>
1901       <files>
1902         <!-- CPU independent -->
1903         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
1904         <file category="include" name="CMSIS/Core_A/Include/"/>
1905       </files>
1906     </component>
1907
1908     <!-- CMSIS-Startup components -->
1909     <!-- Cortex-M0 -->
1910     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1911       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1912       <files>
1913         <!-- include folder / device header file -->
1914         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1915         <!-- startup / system file -->
1916         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1917         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1918         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1919         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1920         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1921       </files>
1922     </component>
1923     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1924       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1925       <files>
1926         <!-- include folder / device header file -->
1927         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1928         <!-- startup / system file -->
1929         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1930         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1931         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1932       </files>
1933     </component>
1934
1935     <!-- Cortex-M0+ -->
1936     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1937       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1938       <files>
1939         <!-- include folder / device header file -->
1940         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1941         <!-- startup / system file -->
1942         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1943         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1944         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1945         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1946         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1947       </files>
1948     </component>
1949     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1950       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1951       <files>
1952         <!-- include folder / device header file -->
1953         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1954         <!-- startup / system file -->
1955         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1956         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1957         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1958       </files>
1959     </component>
1960
1961     <!-- Cortex-M3 -->
1962     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1963       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1964       <files>
1965         <!-- include folder / device header file -->
1966         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1967         <!-- startup / system file -->
1968         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1969         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1970         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1971         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1972         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1973       </files>
1974     </component>
1975     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1976       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1977       <files>
1978         <!-- include folder / device header file -->
1979         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1980         <!-- startup / system file -->
1981         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1982         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1983         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1984       </files>
1985     </component>
1986
1987     <!-- Cortex-M4 -->
1988     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1989       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1990       <files>
1991         <!-- include folder / device header file -->
1992         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1993         <!-- startup / system file -->
1994         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1995         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1996         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1997         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1998         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1999       </files>
2000     </component>
2001     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2002       <description>System and Startup for Generic ARM Cortex-M4 device</description>
2003       <files>
2004         <!-- include folder / device header file -->
2005         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2006         <!-- startup / system file -->
2007         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2008         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2009         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2010       </files>
2011     </component>
2012
2013     <!-- Cortex-M7 -->
2014     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2015       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2016       <files>
2017         <!-- include folder / device header file -->
2018         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2019         <!-- startup / system file -->
2020         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2021         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2022         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2023         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2024         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2025       </files>
2026     </component>
2027     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2028       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2029       <files>
2030         <!-- include folder / device header file -->
2031         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2032         <!-- startup / system file -->
2033         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2034         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2035         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2036       </files>
2037     </component>
2038
2039     <!-- Cortex-M23 -->
2040     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2041       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2042       <files>
2043         <!-- include folder / device header file -->
2044         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2045         <!-- startup / system file -->
2046         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2047         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2048         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2049         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2050         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2051         <!-- SAU configuration -->
2052         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2053       </files>
2054     </component>
2055     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2056       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2057       <files>
2058         <!-- include folder / device header file -->
2059         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2060         <!-- startup / system file -->
2061         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2062         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2063         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2064         <!-- SAU configuration -->
2065         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2066       </files>
2067     </component>
2068
2069     <!-- Cortex-M33 -->
2070     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2071       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2072       <files>
2073         <!-- include folder / device header file -->
2074         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2075         <!-- startup / system file -->
2076         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2077         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2078         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2079         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2080         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2081         <!-- SAU configuration -->
2082         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2083       </files>
2084     </component>
2085     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2086       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2087       <files>
2088         <!-- include folder / device header file -->
2089         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2090         <!-- startup / system file -->
2091         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2092         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2093         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2094         <!-- SAU configuration -->
2095         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2096       </files>
2097     </component>
2098
2099     <!-- Cortex-SC000 -->
2100     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2101       <description>System and Startup for Generic ARM SC000 device</description>
2102       <files>
2103         <!-- include folder / device header file -->
2104         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2105         <!-- startup / system file -->
2106         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2107         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2108         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2109         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2110         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2111       </files>
2112     </component>
2113     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2114       <description>System and Startup for Generic ARM SC000 device</description>
2115       <files>
2116         <!-- include folder / device header file -->
2117         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2118         <!-- startup / system file -->
2119         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2120         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2121         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2122       </files>
2123     </component>
2124
2125     <!-- Cortex-SC300 -->
2126     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2127       <description>System and Startup for Generic ARM SC300 device</description>
2128       <files>
2129         <!-- include folder / device header file -->
2130         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2131         <!-- startup / system file -->
2132         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2133         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2134         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2135         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2136         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2137       </files>
2138     </component>
2139     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2140       <description>System and Startup for Generic ARM SC300 device</description>
2141       <files>
2142         <!-- include folder / device header file -->
2143         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2144         <!-- startup / system file -->
2145         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2146         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2147         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2148       </files>
2149     </component>
2150
2151     <!-- ARMv8MBL -->
2152     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2153       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2154       <files>
2155         <!-- include folder / device header file -->
2156         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2157         <!-- startup / system file -->
2158         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2159         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2160         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2161         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2162         <!-- SAU configuration -->
2163         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2164       </files>
2165     </component>
2166     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2167       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2168       <files>
2169         <!-- include folder / device header file -->
2170         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2171         <!-- startup / system file -->
2172         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2173         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2174         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2175         <!-- SAU configuration -->
2176         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2177       </files>
2178     </component>
2179
2180     <!-- ARMv8MML -->
2181     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2182       <description>System and Startup for Generic ARM ARMv8MML device</description>
2183       <files>
2184         <!-- include folder / device header file -->
2185         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2186         <!-- startup / system file -->
2187         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2188         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2189         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2190         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2191         <!-- SAU configuration -->
2192         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2193       </files>
2194     </component>
2195     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2196       <description>System and Startup for Generic ARM ARMv8MML device</description>
2197       <files>
2198         <!-- include folder / device header file -->
2199         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2200         <!-- startup / system file -->
2201         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2202         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2203         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2204         <!-- SAU configuration -->
2205         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2206       </files>
2207     </component>
2208
2209     <!-- Cortex-A5 -->
2210     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2211       <description>System and Startup for Generic ARM Cortex-A5 device</description>
2212       <files>
2213         <!-- include folder / device header file -->
2214         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2215         <!-- startup / system / mmu files -->
2216         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2217         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2218         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2219         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2220         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2221         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2222         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2223         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2224         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2225         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2226
2227       </files>
2228     </component>
2229
2230     <!-- Cortex-A7 -->
2231     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2232       <description>System and Startup for Generic ARM Cortex-A7 device</description>
2233       <files>
2234         <!-- include folder / device header file -->
2235         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2236         <!-- startup / system / mmu files -->
2237         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2238         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2239         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2240         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2241         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2242         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2243         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2244         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2245         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2246         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2247       </files>
2248     </component>
2249
2250     <!-- Cortex-A9 -->
2251     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2252       <description>System and Startup for Generic ARM Cortex-A9 device</description>
2253       <files>
2254         <!-- include folder / device header file -->
2255         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2256         <!-- startup / system / mmu files -->
2257         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2258         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2259         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2260         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2261         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2262         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2263         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2264         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2265         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2266         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2267       </files>
2268     </component>
2269
2270     <!-- IRQ Controller -->
2271     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.0" condition="ARMv7-A Device">
2272       <description>IRQ Controller implementation using GIC</description>
2273       <files>
2274         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2275       </files>
2276     </component>
2277
2278     <!-- OS Tick -->
2279     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick PTIM">
2280       <description>OS Tick implementation using Private Timer</description>
2281       <files>
2282         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2283       </files>
2284     </component>
2285
2286     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick GTIM">
2287       <description>OS Tick implementation using Generic Physical Timer</description>
2288       <files>
2289         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2290       </files>
2291     </component>
2292
2293     <!-- CMSIS-DSP component -->
2294     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2295       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2296       <files>
2297         <!-- CPU independent -->
2298         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2299         <file category="header" name="CMSIS/Include/arm_math.h"/>
2300
2301         <!-- CPU and Compiler dependent -->
2302         <!-- ARMCC -->
2303         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2304         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2305         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2306         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2307         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2308         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2309         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2310         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2311         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2312         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2313         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2314         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2315         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2316         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2317
2318         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2319         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2320         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2321         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2322         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2323         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2324         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2325         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2326         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2327         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2328         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2329         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2330
2331         <!-- GCC -->
2332         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2333         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2334         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2335         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2336         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2337         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2338         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2339
2340         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2341         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2342         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2343         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2344         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2345         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2346         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2347         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2348         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2349         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2350         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2351         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2352
2353       </files>
2354     </component>
2355
2356     <!-- CMSIS-RTOS Keil RTX component -->
2357     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2358       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2359       <RTE_Components_h>
2360         <!-- the following content goes into file 'RTE_Components.h' -->
2361         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2362         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2363       </RTE_Components_h>
2364       <files>
2365         <!-- CPU independent -->
2366         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2367         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2368         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2369
2370         <!-- RTX templates -->
2371         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2372         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2373         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2374         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2375         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2376         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2377         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2378         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2379         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2380         <!-- tool-chain specific template file -->
2381         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2382         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2383         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2384
2385         <!-- CPU and Compiler dependent -->
2386         <!-- ARMCC -->
2387         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2388         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2389         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2390         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2391         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2392         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2393         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2394         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2395         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2396         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2397         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2398         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2399         <!-- GCC -->
2400         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2401         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2402         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2403         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2404         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2405         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2406         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2407         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2408         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2409         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2410         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2411         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2412         <!-- IAR -->
2413         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2414         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2415         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2416         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2417         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2418         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2419         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2420         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2421         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2422         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2423         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2424         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2425       </files>
2426     </component>
2427     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2428     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2429       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2430       <RTE_Components_h>
2431         <!-- the following content goes into file 'RTE_Components.h' -->
2432         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2433         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2434       </RTE_Components_h>
2435       <files>
2436         <!-- CPU independent -->
2437         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2438         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2439         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2440
2441         <!-- RTX templates -->
2442         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2443         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2444         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2445         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2446         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2447         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2448         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2449         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2450         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2451         <!-- tool-chain specific template file -->
2452         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2453         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2454         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2455
2456         <!-- CPU and Compiler dependent -->
2457         <!-- ARMCC -->
2458         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2459         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2460         <!-- GCC -->
2461         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2462         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2463         <!-- IAR -->
2464       </files>
2465     </component>
2466
2467     <!-- CMSIS-RTOS Keil RTX5 component -->
2468     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.3" Capiversion="1.0.0" condition="RTOS RTX5">
2469       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2470       <RTE_Components_h>
2471         <!-- the following content goes into file 'RTE_Components.h' -->
2472         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2473         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2474       </RTE_Components_h>
2475       <files>
2476         <!-- RTX header file -->
2477         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2478         <!-- RTX compatibility module for API V1 -->
2479         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2480       </files>
2481     </component>
2482
2483     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2484     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.3" Capiversion="2.1." condition="RTOS2 RTX5 Lib">
2485       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2486       <RTE_Components_h>
2487         <!-- the following content goes into file 'RTE_Components.h' -->
2488         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2489         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2490       </RTE_Components_h>
2491       <files>
2492         <!-- RTX documentation -->
2493         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2494
2495         <!-- RTX header files -->
2496         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2497
2498         <!-- RTX configuration -->
2499         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2500         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2501
2502         <!-- RTX templates -->
2503         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2504         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2505         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2506         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2507         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2508         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2509         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2510         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2511         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2512         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2513
2514         <!-- RTX library configuration -->
2515         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2516
2517         <!-- RTX libraries (CPU and Compiler dependent) -->
2518         <!-- ARMCC -->
2519         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2520         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2521         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2522         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2523         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2524         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2525         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2526         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2527         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2528         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2529         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2530         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2531         <!-- GCC -->
2532         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2533         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2534         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2535         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2536         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2537         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2538         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2539         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2540         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2541         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2542         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2543         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2544         <!-- IAR -->
2545         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2546         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2547         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2548         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2549         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2550         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2551       </files>
2552     </component>
2553     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
2554       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2555       <RTE_Components_h>
2556         <!-- the following content goes into file 'RTE_Components.h' -->
2557         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2558         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2559         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2560       </RTE_Components_h>
2561       <files>
2562         <!-- RTX documentation -->
2563         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2564
2565         <!-- RTX header files -->
2566         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2567
2568         <!-- RTX configuration -->
2569         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2570         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2571
2572         <!-- RTX templates -->
2573         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2574         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2575         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2576         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2577         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2578         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2579         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2580         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2581         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2582         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2583
2584         <!-- RTX library configuration -->
2585         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2586
2587         <!-- RTX libraries (CPU and Compiler dependent) -->
2588         <!-- ARMCC -->
2589         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2590         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2591         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2592         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2593         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2594         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2595         <!-- GCC -->
2596         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2597         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2598         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2599         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2600         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2601         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2602       </files>
2603     </component>
2604     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5">
2605       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2606       <RTE_Components_h>
2607         <!-- the following content goes into file 'RTE_Components.h' -->
2608         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2609         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2610         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2611       </RTE_Components_h>
2612       <files>
2613         <!-- RTX documentation -->
2614         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2615
2616         <!-- RTX header files -->
2617         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2618
2619         <!-- RTX configuration -->
2620         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2621         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2622
2623         <!-- RTX templates -->
2624         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2625         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2626         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2627         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2628         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2629         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2630         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2631         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2632         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2633         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2634
2635         <!-- RTX sources (core) -->
2636         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2637         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2638         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2639         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2640         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2641         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2642         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2643         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2644         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2645         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2646         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2647         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2648         <!-- RTX sources (library configuration) -->
2649         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2650         <!-- RTX sources (handlers ARMCC) -->
2651         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2652         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2653         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2654         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2655         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2656         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2657         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2658         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2659         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2660         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2661         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2662         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2663         <!-- RTX sources (handlers GCC) -->
2664         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2665         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2666         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2667         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2668         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2669         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2670         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2671         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2672         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2673         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2674         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2675         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2676         <!-- RTX sources (handlers IAR) -->
2677         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2678         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2679         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2680         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2681         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2682         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2683         <!-- OS Tick (SysTick) -->
2684         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2685       </files>
2686     </component>
2687     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 v7-A">
2688       <description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
2689       <RTE_Components_h>
2690         <!-- the following content goes into file 'RTE_Components.h' -->
2691         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2692         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2693         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2694       </RTE_Components_h>
2695       <files>
2696         <!-- RTX documentation -->
2697         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2698
2699         <!-- RTX header files -->
2700         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2701
2702         <!-- RTX configuration -->
2703         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2704         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2705
2706         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2707
2708         <!-- RTX templates -->
2709         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2710         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2711         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2712         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2713         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2714         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2715         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2716         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2717         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2718         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2719
2720         <!-- RTX sources (core) -->
2721         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2722         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2723         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2724         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2725         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2726         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2727         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2728         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2729         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2730         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2731         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2732         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2733         <!-- RTX sources (library configuration) -->
2734         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2735         <!-- RTX sources (handlers ARMCC) -->
2736         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
2737         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
2738         <!-- RTX sources (handlers GCC) -->
2739         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
2740         <!-- RTX sources (handlers IAR) -->
2741         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
2742       </files>
2743     </component>
2744     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
2745       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2746       <RTE_Components_h>
2747         <!-- the following content goes into file 'RTE_Components.h' -->
2748         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2749         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2750         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2751         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2752       </RTE_Components_h>
2753       <files>
2754         <!-- RTX documentation -->
2755         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2756
2757         <!-- RTX header files -->
2758         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2759
2760         <!-- RTX configuration -->
2761         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2762         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2763
2764         <!-- RTX templates -->
2765         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2766         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2767         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2768         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2769         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2770         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2771         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2772         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2773         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2774         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2775
2776         <!-- RTX sources (core) -->
2777         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2778         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2779         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2780         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2781         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2782         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2783         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2784         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2785         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2786         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2787         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2788         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2789         <!-- RTX sources (library configuration) -->
2790         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2791         <!-- RTX sources (ARMCC handlers) -->
2792         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2793         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2794         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2795         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2796         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2797         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2798         <!-- RTX sources (GCC handlers) -->
2799         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2800         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2801         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2802         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2803         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2804         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2805         <!-- OS Tick (SysTick) -->
2806         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2807       </files>
2808     </component>
2809
2810   </components>
2811
2812   <boards>
2813     <board name="uVision Simulator" vendor="Keil">
2814       <description>uVision Simulator</description>
2815       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2816       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2817       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
2818       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2819       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2820       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2821       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2822       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2823       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2824       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2825       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2826       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2827       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2828       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2829       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2830       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2831       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2832       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2833       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2834     </board>
2835
2836     <board name="Fixed Virtual Platform" vendor="ARM">
2837       <description>Fixed Virtual Platform</description>
2838       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
2839       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
2840       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
2841     </board>
2842   </boards>
2843
2844   <examples>
2845     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2846       <description>DSP_Lib Class Marks example</description>
2847       <board name="uVision Simulator" vendor="Keil"/>
2848       <project>
2849         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2850       </project>
2851       <attributes>
2852         <component Cclass="CMSIS" Cgroup="CORE"/>
2853         <component Cclass="CMSIS" Cgroup="DSP"/>
2854         <component Cclass="Device" Cgroup="Startup"/>
2855         <category>Getting Started</category>
2856       </attributes>
2857     </example>
2858
2859     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2860       <description>DSP_Lib Convolution example</description>
2861       <board name="uVision Simulator" vendor="Keil"/>
2862       <project>
2863         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2864       </project>
2865       <attributes>
2866         <component Cclass="CMSIS" Cgroup="CORE"/>
2867         <component Cclass="CMSIS" Cgroup="DSP"/>
2868         <component Cclass="Device" Cgroup="Startup"/>
2869         <category>Getting Started</category>
2870       </attributes>
2871     </example>
2872
2873     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2874       <description>DSP_Lib Dotproduct example</description>
2875       <board name="uVision Simulator" vendor="Keil"/>
2876       <project>
2877         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2878       </project>
2879       <attributes>
2880         <component Cclass="CMSIS" Cgroup="CORE"/>
2881         <component Cclass="CMSIS" Cgroup="DSP"/>
2882         <component Cclass="Device" Cgroup="Startup"/>
2883         <category>Getting Started</category>
2884       </attributes>
2885     </example>
2886
2887     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2888       <description>DSP_Lib FFT Bin example</description>
2889       <board name="uVision Simulator" vendor="Keil"/>
2890       <project>
2891         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2892       </project>
2893       <attributes>
2894         <component Cclass="CMSIS" Cgroup="CORE"/>
2895         <component Cclass="CMSIS" Cgroup="DSP"/>
2896         <component Cclass="Device" Cgroup="Startup"/>
2897         <category>Getting Started</category>
2898       </attributes>
2899     </example>
2900
2901     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2902       <description>DSP_Lib FIR example</description>
2903       <board name="uVision Simulator" vendor="Keil"/>
2904       <project>
2905         <environment name="uv" load="arm_fir_example.uvprojx"/>
2906       </project>
2907       <attributes>
2908         <component Cclass="CMSIS" Cgroup="CORE"/>
2909         <component Cclass="CMSIS" Cgroup="DSP"/>
2910         <component Cclass="Device" Cgroup="Startup"/>
2911         <category>Getting Started</category>
2912       </attributes>
2913     </example>
2914
2915     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2916       <description>DSP_Lib Graphic Equalizer example</description>
2917       <board name="uVision Simulator" vendor="Keil"/>
2918       <project>
2919         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2920       </project>
2921       <attributes>
2922         <component Cclass="CMSIS" Cgroup="CORE"/>
2923         <component Cclass="CMSIS" Cgroup="DSP"/>
2924         <component Cclass="Device" Cgroup="Startup"/>
2925         <category>Getting Started</category>
2926       </attributes>
2927     </example>
2928
2929     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2930       <description>DSP_Lib Linear Interpolation example</description>
2931       <board name="uVision Simulator" vendor="Keil"/>
2932       <project>
2933         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2934       </project>
2935       <attributes>
2936         <component Cclass="CMSIS" Cgroup="CORE"/>
2937         <component Cclass="CMSIS" Cgroup="DSP"/>
2938         <component Cclass="Device" Cgroup="Startup"/>
2939         <category>Getting Started</category>
2940       </attributes>
2941     </example>
2942
2943     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2944       <description>DSP_Lib Matrix example</description>
2945       <board name="uVision Simulator" vendor="Keil"/>
2946       <project>
2947         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2948       </project>
2949       <attributes>
2950         <component Cclass="CMSIS" Cgroup="CORE"/>
2951         <component Cclass="CMSIS" Cgroup="DSP"/>
2952         <component Cclass="Device" Cgroup="Startup"/>
2953         <category>Getting Started</category>
2954       </attributes>
2955     </example>
2956
2957     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2958       <description>DSP_Lib Signal Convergence example</description>
2959       <board name="uVision Simulator" vendor="Keil"/>
2960       <project>
2961         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2962       </project>
2963       <attributes>
2964         <component Cclass="CMSIS" Cgroup="CORE"/>
2965         <component Cclass="CMSIS" Cgroup="DSP"/>
2966         <component Cclass="Device" Cgroup="Startup"/>
2967         <category>Getting Started</category>
2968       </attributes>
2969     </example>
2970
2971     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2972       <description>DSP_Lib Sinus/Cosinus example</description>
2973       <board name="uVision Simulator" vendor="Keil"/>
2974       <project>
2975         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2976       </project>
2977       <attributes>
2978         <component Cclass="CMSIS" Cgroup="CORE"/>
2979         <component Cclass="CMSIS" Cgroup="DSP"/>
2980         <component Cclass="Device" Cgroup="Startup"/>
2981         <category>Getting Started</category>
2982       </attributes>
2983     </example>
2984
2985     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2986       <description>DSP_Lib Variance example</description>
2987       <board name="uVision Simulator" vendor="Keil"/>
2988       <project>
2989         <environment name="uv" load="arm_variance_example.uvprojx"/>
2990       </project>
2991       <attributes>
2992         <component Cclass="CMSIS" Cgroup="CORE"/>
2993         <component Cclass="CMSIS" Cgroup="DSP"/>
2994         <component Cclass="Device" Cgroup="Startup"/>
2995         <category>Getting Started</category>
2996       </attributes>
2997     </example>
2998
2999     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3000       <description>CMSIS-RTOS2 Blinky example</description>
3001       <board name="uVision Simulator" vendor="Keil"/>
3002       <project>
3003         <environment name="uv" load="Blinky.uvprojx"/>
3004       </project>
3005       <attributes>
3006         <component Cclass="CMSIS" Cgroup="CORE"/>
3007         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3008         <component Cclass="Device" Cgroup="Startup"/>
3009         <category>Getting Started</category>
3010       </attributes>
3011     </example>
3012
3013     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3014       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3015       <board name="uVision Simulator" vendor="Keil"/>
3016       <project>
3017         <environment name="uv" load="Blinky.uvprojx"/>
3018       </project>
3019       <attributes>
3020         <component Cclass="CMSIS" Cgroup="CORE"/>
3021         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3022         <component Cclass="Device" Cgroup="Startup"/>
3023         <category>Getting Started</category>
3024       </attributes>
3025     </example>
3026
3027     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3028       <description>CMSIS-RTOS2 Message Queue Example</description>
3029       <board name="uVision Simulator" vendor="Keil"/>
3030       <project>
3031         <environment name="uv" load="MsqQueue.uvprojx"/>
3032       </project>
3033       <attributes>
3034         <component Cclass="CMSIS" Cgroup="CORE"/>
3035         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3036         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3037         <component Cclass="Device" Cgroup="Startup"/>
3038         <category>Getting Started</category>
3039       </attributes>
3040     </example>
3041
3042     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3043       <description>CMSIS-RTOS2 Memory Pool Example</description>
3044       <board name="Fixed Virtual Platform" vendor="ARM"/>
3045       <project>
3046         <environment name="uv" load="MemPool.uvprojx"/>
3047       </project>
3048       <attributes>
3049         <component Cclass="CMSIS" Cgroup="CORE"/>
3050         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3051         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3052         <component Cclass="Device" Cgroup="Startup"/>
3053         <category>Getting Started</category>
3054       </attributes>
3055     </example>
3056
3057     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3058       <description>Bare-metal secure/non-secure example without RTOS</description>
3059       <board name="uVision Simulator" vendor="Keil"/>
3060       <project>
3061         <environment name="uv" load="NoRTOS.uvmpw"/>
3062       </project>
3063       <attributes>
3064         <component Cclass="CMSIS" Cgroup="CORE"/>
3065         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3066         <component Cclass="Device" Cgroup="Startup"/>
3067         <category>Getting Started</category>
3068       </attributes>
3069     </example>
3070
3071     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3072       <description>Secure/non-secure RTOS example with thread context management</description>
3073       <board name="uVision Simulator" vendor="Keil"/>
3074       <project>
3075         <environment name="uv" load="RTOS.uvmpw"/>
3076       </project>
3077       <attributes>
3078         <component Cclass="CMSIS" Cgroup="CORE"/>
3079         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3080         <component Cclass="Device" Cgroup="Startup"/>
3081         <category>Getting Started</category>
3082       </attributes>
3083     </example>
3084
3085     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3086       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3087       <board name="uVision Simulator" vendor="Keil"/>
3088       <project>
3089         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3090       </project>
3091       <attributes>
3092         <component Cclass="CMSIS" Cgroup="CORE"/>
3093         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3094         <component Cclass="Device" Cgroup="Startup"/>
3095         <category>Getting Started</category>
3096       </attributes>
3097     </example>
3098
3099   </examples>
3100
3101 </package>