begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.7.0-dev1">
  12       Active development...
  13       CMSIS-Core(M): 5.4.0 (see revision history for details)
  14          - Enhanced MVE support for Armv8.1-MML
  15       CMSIS-RTOS2:
  16         - RTX 5.5.2 (see revision history for details)
  17       CMSIS-Driver: 2.8.0
  18         - removed volatile from status related typedefs in APIs
  19         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  20       CMSIS-Pack:
  21         - added custom attribute to components that require custom implementation
  22       Devices:
  23         - ARMv81MML startup code recognizing __MVE_USED macro
  24         - Refactored vector table references for all Cortex-M devices
  25     </release>
  26     <release version="5.6.0" date="2019-07-10">
  27       CMSIS-Core(M): 5.3.0 (see revision history for details)
  28         - Added provisions for compiler-independent C startup code.
  29       CMSIS-Core(A): 1.1.4 (see revision history for details)
  30         - Fixed __FPU_Enable.
  31       CMSIS-DSP: 1.7.0 (see revision history for details)
  32         - New Neon versions of f32 functions
  33         - Python wrapper
  34         - Preliminary cmake build
  35         - Compilation flags for FFTs
  36         - Changes to arm_math.h
  37       CMSIS-NN: 1.2.0 (see revision history for details)
  38         - New function for depthwise convolution with asymmetric quantization.
  39         - New support functions for requantization.
  40       CMSIS-RTOS:
  41         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  42       CMSIS-RTOS2:
  43         - RTX 5.5.1 (see revision history for details)
  44       CMSIS-Driver: 2.7.1
  45         - WiFi Interface API 1.0.0
  46       Devices:
  47         - Generalized C startup code for all Cortex-M familiy devices.
  48         - Updated Cortex-A default memory regions and MMU configurations
  49         - Moved Cortex-A memory and system config files to avoid include path issues
  50     </release>
  51     <release version="5.5.1" date="2019-03-20">
  52       The following folders are deprecated
  53         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  54
  55       CMSIS-Core(M): 5.2.1 (see revision history for details)
  56         - Fixed compilation issue in cmsis_armclang_ltm.h
  57     </release>
  58     <release version="5.5.0" date="2019-03-18">
  59       The following folders have been removed:
  60         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  61         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  62       The following folders are deprecated
  63         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  64
  65       CMSIS-Core(M): 5.2.0 (see revision history for details)
  66         - Reworked Stack/Heap configuration for ARM startup files.
  67         - Added Cortex-M35P device support.
  68         - Added generic Armv8.1-M Mainline device support.
  69       CMSIS-Core(A): 1.1.3 (see revision history for details)
  70       CMSIS-DSP: 1.6.0 (see revision history for details)
  71         - reworked DSP library source files
  72         - reworked DSP library documentation
  73         - Changed DSP folder structure
  74         - moved DSP libraries to folder ./DSP/Lib
  75         - ARM DSP Libraries are built with ARMCLANG
  76         - Added DSP Libraries Source variant
  77       CMSIS-RTOS2:
  78         - RTX 5.5.0 (see revision history for details)
  79       CMSIS-Driver: 2.7.0
  80         - Added WiFi Interface API 1.0.0-beta
  81         - Added components for project specific driver implementations
  82       CMSIS-Pack: 1.6.0 (see revision history for details)
  83       Devices:
  84         - Added Cortex-M35P and ARMv81MML device templates.
  85         - Fixed C-Startup Code for GCC (aligned with other compilers)
  86       Utilities:
  87         - SVDConv 3.3.25
  88         - PackChk 1.3.82
  89     </release>
  90     <release version="5.4.0" date="2018-08-01">
  91       Aligned pack structure with repository.
  92       The following folders are deprecated:
  93         - CMSIS/Include/
  94         - CMSIS/DSP_Lib/
  95
  96       CMSIS-Core(M): 5.1.2 (see revision history for details)
  97         - Added Cortex-M1 support (beta).
  98       CMSIS-Core(A): 1.1.2 (see revision history for details)
  99       CMSIS-NN: 1.1.0
 100         - Added new math functions.
 101       CMSIS-RTOS2:
 102         - API 2.1.3 (see revision history for details)
 103         - RTX 5.4.0 (see revision history for details)
 104           * Updated exception handling on Cortex-A
 105       CMSIS-Driver:
 106         - Flash Driver API V2.2.0
 107       Utilities:
 108         - SVDConv 3.3.21
 109         - PackChk 1.3.71
 110     </release>
 111     <release version="5.3.0" date="2018-02-22">
 112       Updated Arm company brand.
 113       CMSIS-Core(M): 5.1.1 (see revision history for details)
 114       CMSIS-Core(A): 1.1.1 (see revision history for details)
 115       CMSIS-DAP: 2.0.0 (see revision history for details)
 116       CMSIS-NN: 1.0.0
 117         - Initial contribution of the bare metal Neural Network Library.
 118       CMSIS-RTOS2:
 119         - RTX 5.3.0 (see revision history for details)
 120         - OS Tick API 1.0.1
 121     </release>
 122     <release version="5.2.0" date="2017-11-16">
 123       CMSIS-Core(M): 5.1.0 (see revision history for details)
 124         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 125         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 126       CMSIS-Core(A): 1.1.0 (see revision history for details)
 127         - Added compiler_iccarm.h.
 128         - Added additional access functions for physical timer.
 129       CMSIS-DAP: 1.2.0 (see revision history for details)
 130       CMSIS-DSP: 1.5.2 (see revision history for details)
 131       CMSIS-Driver: 2.6.0 (see revision history for details)
 132         - CAN Driver API V1.2.0
 133         - NAND Driver API V2.3.0
 134       CMSIS-RTOS:
 135         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 136       CMSIS-RTOS2:
 137         - API 2.1.2 (see revision history for details)
 138         - RTX 5.2.3 (see revision history for details)
 139       Devices:
 140         - Added GCC startup and linker script for Cortex-A9.
 141         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 142         - Added IAR startup code for Cortex-A9
 143     </release>
 144     <release version="5.1.1" date="2017-09-19">
 145       CMSIS-RTOS2:
 146       - RTX 5.2.1 (see revision history for details)
 147     </release>
 148     <release version="5.1.0" date="2017-08-04">
 149       CMSIS-Core(M): 5.0.2 (see revision history for details)
 150       - Changed Version Control macros to be core agnostic.
 151       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 152       CMSIS-Core(A): 1.0.0 (see revision history for details)
 153       - Initial release
 154       - IRQ Controller API 1.0.0
 155       CMSIS-Driver: 2.05 (see revision history for details)
 156       - All typedefs related to status have been made volatile.
 157       CMSIS-RTOS2:
 158       - API 2.1.1 (see revision history for details)
 159       - RTX 5.2.0 (see revision history for details)
 160       - OS Tick API 1.0.0
 161       CMSIS-DSP: 1.5.2 (see revision history for details)
 162       - Fixed GNU Compiler specific diagnostics.
 163       CMSIS-Pack: 1.5.0 (see revision history for details)
 164       - added System Description File (*.SDF) Format
 165       CMSIS-Zone: 0.0.1 (Preview)
 166       - Initial specification draft
 167     </release>
 168     <release version="5.0.1" date="2017-02-03">
 169       Package Description:
 170       - added taxonomy for Cclass RTOS
 171       CMSIS-RTOS2:
 172       - API 2.1   (see revision history for details)
 173       - RTX 5.1.0 (see revision history for details)
 174       CMSIS-Core: 5.0.1 (see revision history for details)
 175       - Added __PACKED_STRUCT macro
 176       - Added uVisior support
 177       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 178       - Updated template for secure main function (main_s.c)
 179       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 180       CMSIS-DSP: 1.5.1 (see revision history for details)
 181       - added ARMv8M DSP libraries.
 182       CMSIS-Pack:1.4.9 (see revision history for details)
 183       - added Pack Index File specification and schema file
 184     </release>
 185     <release version="5.0.0" date="2016-11-11">
 186       Changed open source license to Apache 2.0
 187       CMSIS_Core:
 188        - Added support for Cortex-M23 and Cortex-M33.
 189        - Added ARMv8-M device configurations for mainline and baseline.
 190        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 191        - Added cmsis_compiler.h to unify compiler behaviour.
 192        - Updated function SCB_EnableICache (for Cortex-M7).
 193        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 194       CMSIS-RTOS:
 195         - bug fix in RTX 4.82 (see revision history for details)
 196       CMSIS-RTOS2:
 197         - new API including compatibility layer to CMSIS-RTOS
 198         - reference implementation based on RTX5
 199         - supports all Cortex-M variants including TrustZone for ARMv8-M
 200       CMSIS-SVD:
 201        - reworked SVD format documentation
 202        - removed SVD file database documentation as SVD files are distributed in packs
 203        - updated SVDConv for Win32 and Linux
 204       CMSIS-DSP:
 205        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 206        - Added DSP libraries build projects to CMSIS pack.
 207     </release>
 208     <release version="4.5.0" date="2015-10-28">
 209       - CMSIS-Core     4.30.0  (see revision history for details)
 210       - CMSIS-DAP      1.1.0   (unchanged)
 211       - CMSIS-Driver   2.04.0  (see revision history for details)
 212       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 213       - CMSIS-Pack     1.4.1   (see revision history for details)
 214       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 215       - CMSIS-SVD      1.3.1   (see revision history for details)
 216     </release>
 217     <release version="4.4.0" date="2015-09-11">
 218       - CMSIS-Core     4.20   (see revision history for details)
 219       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 220       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 221       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 222       - CMSIS-RTOS
 223         -- API         1.02   (unchanged)
 224         -- RTX         4.79   (see revision history for details)
 225       - CMSIS-SVD      1.3.0  (see revision history for details)
 226       - CMSIS-DAP      1.1.0  (extended with SWO support)
 227     </release>
 228     <release version="4.3.0" date="2015-03-20">
 229       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 230       - CMSIS-DSP      1.4.5  (see revision history for details)
 231       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 232       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 233       - CMSIS-RTOS
 234         -- API         1.02   (unchanged)
 235         -- RTX         4.78   (see revision history for details)
 236       - CMSIS-SVD      1.2    (unchanged)
 237     </release>
 238     <release version="4.2.0" date="2014-09-24">
 239       Adding Cortex-M7 support
 240       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 241       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 242       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 243       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 244       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 245     </release>
 246     <release version="4.1.1" date="2014-06-30">
 247       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 248     </release>
 249     <release version="4.1.0" date="2014-06-12">
 250       - CMSIS-Driver   2.02  (incompatible update)
 251       - CMSIS-Pack     1.3   (see revision history for details)
 252       - CMSIS-DSP      1.4.2 (unchanged)
 253       - CMSIS-Core     3.30  (unchanged)
 254       - CMSIS-RTOS RTX 4.74  (unchanged)
 255       - CMSIS-RTOS API 1.02  (unchanged)
 256       - CMSIS-SVD      1.10  (unchanged)
 257       PACK:
 258       - removed G++ specific files from PACK
 259       - added Component Startup variant "C Startup"
 260       - added Pack Checking Utility
 261       - updated conditions to reflect tool-chain dependency
 262       - added Taxonomy for Graphics
 263       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 264     </release>
 265     <!-- release version="4.0.0">
 266       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 267       - CMSIS-Pack     1.1   Preliminary
 268       - CMSIS-DSP      1.4.2 (see revision history for details)
 269       - CMSIS-Core     3.30  (see revision history for details)
 270       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 271       - CMSIS-RTOS API 1.02  (unchanged)
 272       - CMSIS-SVD      1.10  (unchanged)
 273     </release -->
 274     <release version="3.20.4" date="2014-02-20">
 275       - CMSIS-RTOS 4.74 (see revision history for details)
 276       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 277     </release>
 278     <!-- release version="3.20.3">
 279       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 280       - CMSIS-RTOS 4.73 (see revision history for details)
 281     </release -->
 282     <!-- release version="3.20.2">
 283       - CMSIS-Pack documentation has been added
 284       - CMSIS-Drivers header and documentation have been added to PACK
 285       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 286     </release -->
 287     <!-- release version="3.20.1">
 288       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 289       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 290     </release -->
 291     <!-- release version="3.20.0">
 292       The software portions that are deployed in the application program are now under a BSD license which allows usage
 293       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 294       The individual components have been update as listed below:
 295       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 296       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 297       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 298       - CMSIS-SVD is unchanged.
 299     </release -->
 300   </releases>
 301
 302   <taxonomy>
 303     <description Cclass="Audio">Software components for audio processing</description>
 304     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 305     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 306     <description Cclass="Compiler">Compiler Software Extensions</description>
 307     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 308     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 309     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 310     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 311     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 312     <description Cclass="File System">File Drive Support and File System</description>
 313     <description Cclass="IoT Client">IoT cloud client connector</description>
 314     <description Cclass="IoT Service">IoT specific services</description>
 315     <description Cclass="IoT Utility">IoT specific software utility</description>
 316     <description Cclass="Graphics">Graphical User Interface</description>
 317     <description Cclass="Network">Network Stack using Internet Protocols</description>
 318     <description Cclass="RTOS">Real-time Operating System</description>
 319     <description Cclass="Security">Encryption for secure communication or storage</description>
 320     <description Cclass="USB">Universal Serial Bus Stack</description>
 321     <description Cclass="Utility">Generic software utility components</description>
 322   </taxonomy>
 323
 324   <devices>
 325     <!-- ******************************  Cortex-M0  ****************************** -->
 326     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 327       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 328       <description>
 329 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 330 - simple, easy-to-use programmers model
 331 - highly efficient ultra-low power operation
 332 - excellent code density
 333 - deterministic, high-performance interrupt handling
 334 - upward compatibility with the rest of the Cortex-M processor family.
 335       </description>
 336       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 337       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 338       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 339       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 340
 341       <device Dname="ARMCM0">
 342         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 343         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 344       </device>
 345     </family>
 346
 347     <!-- ******************************  Cortex-M0P  ****************************** -->
 348     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 349       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 350       <description>
 351 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 352 - simple, easy-to-use programmers model
 353 - highly efficient ultra-low power operation
 354 - excellent code density
 355 - deterministic, high-performance interrupt handling
 356 - upward compatibility with the rest of the Cortex-M processor family.
 357       </description>
 358       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 359       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 360       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 361       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 362
 363       <device Dname="ARMCM0P">
 364         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 365         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 366       </device>
 367
 368       <device Dname="ARMCM0P_MPU">
 369         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 370         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 371       </device>
 372     </family>
 373
 374     <!-- ******************************  Cortex-M1  ****************************** -->
 375     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 376       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 377       <description>
 378 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 379 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 380       </description>
 381       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 382       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 383       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 384       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 385
 386       <device Dname="ARMCM1">
 387         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 388         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 389       </device>
 390     </family>
 391
 392     <!-- ******************************  Cortex-M3  ****************************** -->
 393     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 394       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 395       <description>
 396 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 397 - simple, easy-to-use programmers model
 398 - highly efficient ultra-low power operation
 399 - excellent code density
 400 - deterministic, high-performance interrupt handling
 401 - upward compatibility with the rest of the Cortex-M processor family.
 402       </description>
 403       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 404       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 405       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 406       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 407
 408       <device Dname="ARMCM3">
 409         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 410         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 411       </device>
 412     </family>
 413
 414     <!-- ******************************  Cortex-M4  ****************************** -->
 415     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 416       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 417       <description>
 418 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 419 - simple, easy-to-use programmers model
 420 - highly efficient ultra-low power operation
 421 - excellent code density
 422 - deterministic, high-performance interrupt handling
 423 - upward compatibility with the rest of the Cortex-M processor family.
 424       </description>
 425       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 426       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 427       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 428       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 429
 430       <device Dname="ARMCM4">
 431         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 432         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 433       </device>
 434
 435       <device Dname="ARMCM4_FP">
 436         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 437         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 438       </device>
 439     </family>
 440
 441     <!-- ******************************  Cortex-M7  ****************************** -->
 442     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 443       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 444       <description>
 445 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 446 - simple, easy-to-use programmers model
 447 - highly efficient ultra-low power operation
 448 - excellent code density
 449 - deterministic, high-performance interrupt handling
 450 - upward compatibility with the rest of the Cortex-M processor family.
 451       </description>
 452       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 453       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 454       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 455       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 456
 457       <device Dname="ARMCM7">
 458         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 459         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 460       </device>
 461
 462       <device Dname="ARMCM7_SP">
 463         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 464         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 465       </device>
 466
 467       <device Dname="ARMCM7_DP">
 468         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 469         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 470       </device>
 471     </family>
 472
 473     <!-- ******************************  Cortex-M23  ********************** -->
 474     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 475       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 476       <description>
 477 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 478 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 479 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 480       </description>
 481       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 482       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 483       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 484       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 485       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 486       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 487
 488       <device Dname="ARMCM23">
 489         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 490         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 491       </device>
 492
 493       <device Dname="ARMCM23_TZ">
 494         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 495         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 496       </device>
 497     </family>
 498
 499     <!-- ******************************  Cortex-M33  ****************************** -->
 500     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 501       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 502       <description>
 503 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 504 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 505       </description>
 506       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 507       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 508       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 509       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 510       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 511       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 512
 513       <device Dname="ARMCM33">
 514         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 515         <description>
 516           no DSP Instructions, no Floating Point Unit, no TrustZone
 517         </description>
 518         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 519       </device>
 520
 521       <device Dname="ARMCM33_TZ">
 522         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 523         <description>
 524           no DSP Instructions, no Floating Point Unit, TrustZone
 525         </description>
 526         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 527       </device>
 528
 529       <device Dname="ARMCM33_DSP_FP">
 530         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 531         <description>
 532           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 533         </description>
 534         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 535       </device>
 536
 537       <device Dname="ARMCM33_DSP_FP_TZ">
 538         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 539         <description>
 540           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 541         </description>
 542         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 543       </device>
 544     </family>
 545
 546     <!-- ******************************  Cortex-M35P  ****************************** -->
 547     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 548       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 549       <description>
 550 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 551 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 552       </description>
 553
 554       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 555       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 556       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 557       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 558       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 559       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 560
 561       <device Dname="ARMCM35P">
 562         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 563         <description>
 564           no DSP Instructions, no Floating Point Unit, no TrustZone
 565         </description>
 566         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 567       </device>
 568
 569       <device Dname="ARMCM35P_TZ">
 570         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 571         <description>
 572           no DSP Instructions, no Floating Point Unit, TrustZone
 573         </description>
 574         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 575       </device>
 576
 577       <device Dname="ARMCM35P_DSP_FP">
 578         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 579         <description>
 580           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 581         </description>
 582         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 583       </device>
 584
 585       <device Dname="ARMCM35P_DSP_FP_TZ">
 586         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 587         <description>
 588           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 589         </description>
 590         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 591       </device>
 592     </family>
 593
 594     <!-- ******************************  ARMSC000  ****************************** -->
 595     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 596       <description>
 597 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 598 - simple, easy-to-use programmers model
 599 - highly efficient ultra-low power operation
 600 - excellent code density
 601 - deterministic, high-performance interrupt handling
 602       </description>
 603       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 604       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 605       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 606       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 607
 608       <device Dname="ARMSC000">
 609         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 610         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 611       </device>
 612     </family>
 613
 614     <!-- ******************************  ARMSC300  ****************************** -->
 615     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 616       <description>
 617 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 618 - simple, easy-to-use programmers model
 619 - highly efficient ultra-low power operation
 620 - excellent code density
 621 - deterministic, high-performance interrupt handling
 622       </description>
 623       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 624       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 625       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 626       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 627
 628       <device Dname="ARMSC300">
 629         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 630         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 631       </device>
 632     </family>
 633
 634     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 635     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 636       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 637       <description>
 638 Armv8-M Baseline based device with TrustZone
 639       </description>
 640       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 641       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 642       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 643       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 644       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 645       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 646
 647       <device Dname="ARMv8MBL">
 648         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 649         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 650       </device>
 651     </family>
 652
 653     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 654     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 655       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 656       <description>
 657 Armv8-M Mainline based device with TrustZone
 658       </description>
 659       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 660       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 661       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 662       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 663       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 664       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 665
 666       <device Dname="ARMv8MML">
 667         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 668         <description>
 669           no DSP Instructions, no Floating Point Unit, TrustZone
 670         </description>
 671         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 672       </device>
 673
 674       <device Dname="ARMv8MML_DSP">
 675         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 676         <description>
 677           DSP Instructions, no Floating Point Unit, TrustZone
 678         </description>
 679         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 680       </device>
 681
 682       <device Dname="ARMv8MML_SP">
 683         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 684         <description>
 685           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 686         </description>
 687         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 688       </device>
 689
 690       <device Dname="ARMv8MML_DSP_SP">
 691         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 692         <description>
 693           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 694         </description>
 695         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 696       </device>
 697
 698       <device Dname="ARMv8MML_DP">
 699         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 700         <description>
 701           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 702         </description>
 703         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 704       </device>
 705
 706       <device Dname="ARMv8MML_DSP_DP">
 707         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 708         <description>
 709           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 710         </description>
 711         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 712       </device>
 713     </family>
 714
 715     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 716     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 717       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 718       <description>
 719 Armv8.1-M Mainline based device with TrustZone and MVE
 720       </description>
 721       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 722       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 723       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 724       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 725       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 726       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 727
 728
 729       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 730         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 731         <description>
 732           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 733         </description>
 734         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 735       </device>
 736     </family>
 737
 738     <!-- ******************************  Cortex-A5  ****************************** -->
 739     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 740       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 741       <description>
 742 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 743 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 744 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 745       </description>
 746
 747       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 748       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 749       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 750       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 751
 752       <device Dname="ARMCA5">
 753         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 754         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 755       </device>
 756     </family>
 757
 758     <!-- ******************************  Cortex-A7  ****************************** -->
 759     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 760       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 761       <description>
 762 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 763 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 764 an optional integrated GIC, and an optional L2 cache controller.
 765       </description>
 766
 767       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 768       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 769       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 770       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 771
 772       <device Dname="ARMCA7">
 773         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 774         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 775       </device>
 776     </family>
 777
 778     <!-- ******************************  Cortex-A9  ****************************** -->
 779     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 780       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 781       <description>
 782 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 783 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 784 and 8-bit Java bytecodes in Jazelle state.
 785       </description>
 786
 787       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 788       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 789       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 790       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 791
 792       <device Dname="ARMCA9">
 793         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 794         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 795       </device>
 796     </family>
 797   </devices>
 798
 799
 800   <apis>
 801     <!-- CMSIS Device API -->
 802     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 803       <description>Device interrupt controller interface</description>
 804       <files>
 805         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 806       </files>
 807     </api>
 808     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 809       <description>RTOS Kernel system tick timer interface</description>
 810       <files>
 811         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 812       </files>
 813     </api>
 814     <!-- CMSIS-RTOS API -->
 815     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 816       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 817       <files>
 818         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 819       </files>
 820     </api>
 821     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 822       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 823       <files>
 824         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 825         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 826       </files>
 827     </api>
 828     <!-- CMSIS Driver API -->
 829     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 830       <description>USART Driver API for Cortex-M</description>
 831       <files>
 832         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 833         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 834       </files>
 835     </api>
 836     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 837       <description>SPI Driver API for Cortex-M</description>
 838       <files>
 839         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 840         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 841       </files>
 842     </api>
 843     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 844       <description>SAI Driver API for Cortex-M</description>
 845       <files>
 846         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 847         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 848       </files>
 849     </api>
 850     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 851       <description>I2C Driver API for Cortex-M</description>
 852       <files>
 853         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 854         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 855       </files>
 856     </api>
 857     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 858       <description>CAN Driver API for Cortex-M</description>
 859       <files>
 860         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 861         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 862       </files>
 863     </api>
 864     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 865       <description>Flash Driver API for Cortex-M</description>
 866       <files>
 867         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 868         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 869       </files>
 870     </api>
 871     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 872       <description>MCI Driver API for Cortex-M</description>
 873       <files>
 874         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 875         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 876       </files>
 877     </api>
 878     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 879       <description>NAND Flash Driver API for Cortex-M</description>
 880       <files>
 881         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 882         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 883       </files>
 884     </api>
 885     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 886       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 887       <files>
 888         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 889         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 890         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 891       </files>
 892     </api>
 893     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 894       <description>Ethernet MAC Driver API for Cortex-M</description>
 895       <files>
 896         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 897         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 898       </files>
 899     </api>
 900     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 901       <description>Ethernet PHY Driver API for Cortex-M</description>
 902       <files>
 903         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 904         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 905       </files>
 906     </api>
 907     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 908       <description>USB Device Driver API for Cortex-M</description>
 909       <files>
 910         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 911         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 912       </files>
 913     </api>
 914     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
 915       <description>USB Host Driver API for Cortex-M</description>
 916       <files>
 917         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 918         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 919       </files>
 920     </api>
 921     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
 922       <description>WiFi driver</description>
 923       <files>
 924         <file category="doc"  name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 925         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 926       </files>
 927     </api>
 928   </apis>
 929
 930   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 931   <conditions>
 932     <!-- compiler -->
 933     <condition id="ARMCC6">
 934       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 935       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 936     </condition>
 937     <condition id="ARMCC5">
 938       <require Tcompiler="ARMCC" Toptions="AC5"/>
 939     </condition>
 940     <condition id="ARMCC">
 941       <require Tcompiler="ARMCC"/>
 942     </condition>
 943     <condition id="GCC">
 944       <require Tcompiler="GCC"/>
 945     </condition>
 946     <condition id="IAR">
 947       <require Tcompiler="IAR"/>
 948     </condition>
 949     <condition id="ARMCC GCC">
 950       <accept Tcompiler="ARMCC"/>
 951       <accept Tcompiler="GCC"/>
 952     </condition>
 953     <condition id="ARMCC GCC IAR">
 954       <accept Tcompiler="ARMCC"/>
 955       <accept Tcompiler="GCC"/>
 956       <accept Tcompiler="IAR"/>
 957     </condition>
 958
 959     <!-- Arm architecture -->
 960     <condition id="ARMv6-M Device">
 961       <description>Armv6-M architecture based device</description>
 962       <accept Dcore="Cortex-M0"/>
 963       <accept Dcore="Cortex-M1"/>
 964       <accept Dcore="Cortex-M0+"/>
 965       <accept Dcore="SC000"/>
 966     </condition>
 967     <condition id="ARMv7-M Device">
 968       <description>Armv7-M architecture based device</description>
 969       <accept Dcore="Cortex-M3"/>
 970       <accept Dcore="Cortex-M4"/>
 971       <accept Dcore="Cortex-M7"/>
 972       <accept Dcore="SC300"/>
 973     </condition>
 974     <condition id="ARMv8-M Device">
 975       <description>Armv8-M architecture based device</description>
 976       <accept Dcore="ARMV8MBL"/>
 977       <accept Dcore="ARMV8MML"/>
 978       <accept Dcore="ARMV81MML"/>
 979       <accept Dcore="Cortex-M23"/>
 980       <accept Dcore="Cortex-M33"/>
 981       <accept Dcore="Cortex-M35P"/>
 982     </condition>
 983     <condition id="ARMv8-M TZ Device">
 984       <description>Armv8-M architecture based device with TrustZone</description>
 985       <require condition="ARMv8-M Device"/>
 986       <require Dtz="TZ"/>
 987     </condition>
 988     <condition id="ARMv6_7-M Device">
 989       <description>Armv6_7-M architecture based device</description>
 990       <accept condition="ARMv6-M Device"/>
 991       <accept condition="ARMv7-M Device"/>
 992     </condition>
 993     <condition id="ARMv6_7_8-M Device">
 994       <description>Armv6_7_8-M architecture based device</description>
 995       <accept condition="ARMv6-M Device"/>
 996       <accept condition="ARMv7-M Device"/>
 997       <accept condition="ARMv8-M Device"/>
 998     </condition>
 999     <condition id="ARMv7-A Device">
1000       <description>Armv7-A architecture based device</description>
1001       <accept Dcore="Cortex-A5"/>
1002       <accept Dcore="Cortex-A7"/>
1003       <accept Dcore="Cortex-A9"/>
1004     </condition>
1005
1006     <!-- ARM core -->
1007     <condition id="CM0">
1008       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1009       <accept Dcore="Cortex-M0"/>
1010       <accept Dcore="Cortex-M0+"/>
1011       <accept Dcore="SC000"/>
1012     </condition>
1013     <condition id="CM1">
1014       <description>Cortex-M1</description>
1015       <require Dcore="Cortex-M1"/>
1016     </condition>
1017     <condition id="CM3">
1018       <description>Cortex-M3 or SC300 processor based device</description>
1019       <accept Dcore="Cortex-M3"/>
1020       <accept Dcore="SC300"/>
1021     </condition>
1022     <condition id="CM4">
1023       <description>Cortex-M4 processor based device</description>
1024       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1025     </condition>
1026     <condition id="CM4_FP">
1027       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1028       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1029       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1030       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1031     </condition>
1032     <condition id="CM7">
1033       <description>Cortex-M7 processor based device</description>
1034       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1035     </condition>
1036     <condition id="CM7_FP">
1037       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1038       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1039       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1040     </condition>
1041     <condition id="CM7_SP">
1042       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1043       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1044     </condition>
1045     <condition id="CM7_DP">
1046       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1047       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1048     </condition>
1049     <condition id="CM23">
1050       <description>Cortex-M23 processor based device</description>
1051       <require Dcore="Cortex-M23"/>
1052     </condition>
1053     <condition id="CM33">
1054       <description>Cortex-M33 processor based device</description>
1055       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1056     </condition>
1057     <condition id="CM33_FP">
1058       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1059       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1060     </condition>
1061     <condition id="CM35P">
1062       <description>Cortex-M35P processor based device</description>
1063       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1064     </condition>
1065     <condition id="CM35P_FP">
1066       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1067       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1068     </condition>
1069     <condition id="ARMv8MBL">
1070       <description>Armv8-M Baseline processor based device</description>
1071       <require Dcore="ARMV8MBL"/>
1072     </condition>
1073     <condition id="ARMv8MML">
1074       <description>Armv8-M Mainline processor based device</description>
1075       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1076     </condition>
1077     <condition id="ARMv8MML_FP">
1078       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1079       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1080       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1081     </condition>
1082
1083     <condition id="CM33_NODSP_NOFPU">
1084       <description>CM33, no DSP, no FPU</description>
1085       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1086     </condition>
1087     <condition id="CM33_DSP_NOFPU">
1088       <description>CM33, DSP, no FPU</description>
1089       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1090     </condition>
1091     <condition id="CM33_NODSP_SP">
1092       <description>CM33, no DSP, SP FPU</description>
1093       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1094     </condition>
1095     <condition id="CM33_DSP_SP">
1096       <description>CM33, DSP, SP FPU</description>
1097       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1098     </condition>
1099
1100     <condition id="CM35P_NODSP_NOFPU">
1101       <description>CM35P, no DSP, no FPU</description>
1102       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1103     </condition>
1104     <condition id="CM35P_DSP_NOFPU">
1105       <description>CM35P, DSP, no FPU</description>
1106       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1107     </condition>
1108     <condition id="CM35P_NODSP_SP">
1109       <description>CM35P, no DSP, SP FPU</description>
1110       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1111     </condition>
1112     <condition id="CM35P_DSP_SP">
1113       <description>CM35P, DSP, SP FPU</description>
1114       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1115     </condition>
1116
1117     <condition id="ARMv8MML_NODSP_NOFPU">
1118       <description>Armv8-M Mainline, no DSP, no FPU</description>
1119       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1120     </condition>
1121     <condition id="ARMv8MML_DSP_NOFPU">
1122       <description>Armv8-M Mainline, DSP, no FPU</description>
1123       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1124     </condition>
1125     <condition id="ARMv8MML_NODSP_SP">
1126       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1127       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1128     </condition>
1129     <condition id="ARMv8MML_DSP_SP">
1130       <description>Armv8-M Mainline, DSP, SP FPU</description>
1131       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1132     </condition>
1133
1134     <condition id="CA5_CA9">
1135       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1136       <accept Dcore="Cortex-A5"/>
1137       <accept Dcore="Cortex-A9"/>
1138     </condition>
1139
1140     <condition id="CA7">
1141       <description>Cortex-A7 processor based device</description>
1142       <accept Dcore="Cortex-A7"/>
1143     </condition>
1144
1145     <!-- ARMCC compiler -->
1146     <condition id="CA_ARMCC5">
1147       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1148       <require condition="ARMv7-A Device"/>
1149       <require condition="ARMCC5"/>
1150     </condition>
1151     <condition id="CA_ARMCC6">
1152       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1153       <require condition="ARMv7-A Device"/>
1154       <require condition="ARMCC6"/>
1155     </condition>
1156
1157     <condition id="CM0_ARMCC">
1158       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1159       <require condition="CM0"/>
1160       <require Tcompiler="ARMCC"/>
1161     </condition>
1162     <condition id="CM0_LE_ARMCC">
1163       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1164       <require condition="CM0_ARMCC"/>
1165       <require Dendian="Little-endian"/>
1166     </condition>
1167     <condition id="CM0_BE_ARMCC">
1168       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1169       <require condition="CM0_ARMCC"/>
1170       <require Dendian="Big-endian"/>
1171     </condition>
1172
1173     <condition id="CM1_ARMCC">
1174       <description>Cortex-M1 based device for the Arm Compiler</description>
1175       <require condition="CM1"/>
1176       <require Tcompiler="ARMCC"/>
1177     </condition>
1178     <condition id="CM1_LE_ARMCC">
1179       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1180       <require condition="CM1_ARMCC"/>
1181       <require Dendian="Little-endian"/>
1182     </condition>
1183     <condition id="CM1_BE_ARMCC">
1184       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1185       <require condition="CM1_ARMCC"/>
1186       <require Dendian="Big-endian"/>
1187     </condition>
1188
1189     <condition id="CM3_ARMCC">
1190       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1191       <require condition="CM3"/>
1192       <require Tcompiler="ARMCC"/>
1193     </condition>
1194     <condition id="CM3_LE_ARMCC">
1195       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1196       <require condition="CM3_ARMCC"/>
1197       <require Dendian="Little-endian"/>
1198     </condition>
1199     <condition id="CM3_BE_ARMCC">
1200       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1201       <require condition="CM3_ARMCC"/>
1202       <require Dendian="Big-endian"/>
1203     </condition>
1204
1205     <condition id="CM4_ARMCC">
1206       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1207       <require condition="CM4"/>
1208       <require Tcompiler="ARMCC"/>
1209     </condition>
1210     <condition id="CM4_LE_ARMCC">
1211       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1212       <require condition="CM4_ARMCC"/>
1213       <require Dendian="Little-endian"/>
1214     </condition>
1215     <condition id="CM4_BE_ARMCC">
1216       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1217       <require condition="CM4_ARMCC"/>
1218       <require Dendian="Big-endian"/>
1219     </condition>
1220
1221     <condition id="CM4_FP_ARMCC">
1222       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1223       <require condition="CM4_FP"/>
1224       <require Tcompiler="ARMCC"/>
1225     </condition>
1226     <condition id="CM4_FP_LE_ARMCC">
1227       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1228       <require condition="CM4_FP_ARMCC"/>
1229       <require Dendian="Little-endian"/>
1230     </condition>
1231     <condition id="CM4_FP_BE_ARMCC">
1232       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1233       <require condition="CM4_FP_ARMCC"/>
1234       <require Dendian="Big-endian"/>
1235     </condition>
1236
1237     <condition id="CM7_ARMCC">
1238       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1239       <require condition="CM7"/>
1240       <require Tcompiler="ARMCC"/>
1241     </condition>
1242     <condition id="CM7_LE_ARMCC">
1243       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1244       <require condition="CM7_ARMCC"/>
1245       <require Dendian="Little-endian"/>
1246     </condition>
1247     <condition id="CM7_BE_ARMCC">
1248       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1249       <require condition="CM7_ARMCC"/>
1250       <require Dendian="Big-endian"/>
1251     </condition>
1252
1253     <condition id="CM7_FP_ARMCC">
1254       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1255       <require condition="CM7_FP"/>
1256       <require Tcompiler="ARMCC"/>
1257     </condition>
1258     <condition id="CM7_FP_LE_ARMCC">
1259       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1260       <require condition="CM7_FP_ARMCC"/>
1261       <require Dendian="Little-endian"/>
1262     </condition>
1263     <condition id="CM7_FP_BE_ARMCC">
1264       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1265       <require condition="CM7_FP_ARMCC"/>
1266       <require Dendian="Big-endian"/>
1267     </condition>
1268
1269     <condition id="CM7_SP_ARMCC">
1270       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1271       <require condition="CM7_SP"/>
1272       <require Tcompiler="ARMCC"/>
1273     </condition>
1274     <condition id="CM7_SP_LE_ARMCC">
1275       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1276       <require condition="CM7_SP_ARMCC"/>
1277       <require Dendian="Little-endian"/>
1278     </condition>
1279     <condition id="CM7_SP_BE_ARMCC">
1280       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1281       <require condition="CM7_SP_ARMCC"/>
1282       <require Dendian="Big-endian"/>
1283     </condition>
1284
1285     <condition id="CM7_DP_ARMCC">
1286       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1287       <require condition="CM7_DP"/>
1288       <require Tcompiler="ARMCC"/>
1289     </condition>
1290     <condition id="CM7_DP_LE_ARMCC">
1291       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1292       <require condition="CM7_DP_ARMCC"/>
1293       <require Dendian="Little-endian"/>
1294     </condition>
1295     <condition id="CM7_DP_BE_ARMCC">
1296       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1297       <require condition="CM7_DP_ARMCC"/>
1298       <require Dendian="Big-endian"/>
1299     </condition>
1300
1301     <condition id="CM23_ARMCC">
1302       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1303       <require condition="CM23"/>
1304       <require Tcompiler="ARMCC"/>
1305     </condition>
1306     <condition id="CM23_LE_ARMCC">
1307       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1308       <require condition="CM23_ARMCC"/>
1309       <require Dendian="Little-endian"/>
1310     </condition>
1311
1312     <condition id="CM33_ARMCC">
1313       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1314       <require condition="CM33"/>
1315       <require Tcompiler="ARMCC"/>
1316     </condition>
1317     <condition id="CM33_LE_ARMCC">
1318       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1319       <require condition="CM33_ARMCC"/>
1320       <require Dendian="Little-endian"/>
1321     </condition>
1322
1323     <condition id="CM33_FP_ARMCC">
1324       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1325       <require condition="CM33_FP"/>
1326       <require Tcompiler="ARMCC"/>
1327     </condition>
1328     <condition id="CM33_FP_LE_ARMCC">
1329       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1330       <require condition="CM33_FP_ARMCC"/>
1331       <require Dendian="Little-endian"/>
1332     </condition>
1333
1334     <condition id="CM33_NODSP_NOFPU_ARMCC">
1335       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1336       <require condition="CM33_NODSP_NOFPU"/>
1337       <require Tcompiler="ARMCC"/>
1338     </condition>
1339     <condition id="CM33_DSP_NOFPU_ARMCC">
1340       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1341       <require condition="CM33_DSP_NOFPU"/>
1342       <require Tcompiler="ARMCC"/>
1343     </condition>
1344     <condition id="CM33_NODSP_SP_ARMCC">
1345       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1346       <require condition="CM33_NODSP_SP"/>
1347       <require Tcompiler="ARMCC"/>
1348     </condition>
1349     <condition id="CM33_DSP_SP_ARMCC">
1350       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1351       <require condition="CM33_DSP_SP"/>
1352       <require Tcompiler="ARMCC"/>
1353     </condition>
1354     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1355       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1356       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1357       <require Dendian="Little-endian"/>
1358     </condition>
1359     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1360       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1361       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1362       <require Dendian="Little-endian"/>
1363     </condition>
1364     <condition id="CM33_NODSP_SP_LE_ARMCC">
1365       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1366       <require condition="CM33_NODSP_SP_ARMCC"/>
1367       <require Dendian="Little-endian"/>
1368     </condition>
1369     <condition id="CM33_DSP_SP_LE_ARMCC">
1370       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1371       <require condition="CM33_DSP_SP_ARMCC"/>
1372       <require Dendian="Little-endian"/>
1373     </condition>
1374
1375     <condition id="CM35P_ARMCC">
1376       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1377       <require condition="CM35P"/>
1378       <require Tcompiler="ARMCC"/>
1379     </condition>
1380     <condition id="CM35P_LE_ARMCC">
1381       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1382       <require condition="CM35P_ARMCC"/>
1383       <require Dendian="Little-endian"/>
1384     </condition>
1385
1386     <condition id="CM35P_FP_ARMCC">
1387       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1388       <require condition="CM35P_FP"/>
1389       <require Tcompiler="ARMCC"/>
1390     </condition>
1391     <condition id="CM35P_FP_LE_ARMCC">
1392       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1393       <require condition="CM35P_FP_ARMCC"/>
1394       <require Dendian="Little-endian"/>
1395     </condition>
1396
1397     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1398       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1399       <require condition="CM35P_NODSP_NOFPU"/>
1400       <require Tcompiler="ARMCC"/>
1401     </condition>
1402     <condition id="CM35P_DSP_NOFPU_ARMCC">
1403       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1404       <require condition="CM35P_DSP_NOFPU"/>
1405       <require Tcompiler="ARMCC"/>
1406     </condition>
1407     <condition id="CM35P_NODSP_SP_ARMCC">
1408       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1409       <require condition="CM35P_NODSP_SP"/>
1410       <require Tcompiler="ARMCC"/>
1411     </condition>
1412     <condition id="CM35P_DSP_SP_ARMCC">
1413       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1414       <require condition="CM35P_DSP_SP"/>
1415       <require Tcompiler="ARMCC"/>
1416     </condition>
1417     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1418       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1419       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1420       <require Dendian="Little-endian"/>
1421     </condition>
1422     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1423       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1424       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1425       <require Dendian="Little-endian"/>
1426     </condition>
1427     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1428       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1429       <require condition="CM35P_NODSP_SP_ARMCC"/>
1430       <require Dendian="Little-endian"/>
1431     </condition>
1432     <condition id="CM35P_DSP_SP_LE_ARMCC">
1433       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1434       <require condition="CM35P_DSP_SP_ARMCC"/>
1435       <require Dendian="Little-endian"/>
1436     </condition>
1437
1438     <condition id="ARMv8MBL_ARMCC">
1439       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1440       <require condition="ARMv8MBL"/>
1441       <require Tcompiler="ARMCC"/>
1442     </condition>
1443     <condition id="ARMv8MBL_LE_ARMCC">
1444       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1445       <require condition="ARMv8MBL_ARMCC"/>
1446       <require Dendian="Little-endian"/>
1447     </condition>
1448
1449     <condition id="ARMv8MML_ARMCC">
1450       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1451       <require condition="ARMv8MML"/>
1452       <require Tcompiler="ARMCC"/>
1453     </condition>
1454     <condition id="ARMv8MML_LE_ARMCC">
1455       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1456       <require condition="ARMv8MML_ARMCC"/>
1457       <require Dendian="Little-endian"/>
1458     </condition>
1459
1460     <condition id="ARMv8MML_FP_ARMCC">
1461       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1462       <require condition="ARMv8MML_FP"/>
1463       <require Tcompiler="ARMCC"/>
1464     </condition>
1465     <condition id="ARMv8MML_FP_LE_ARMCC">
1466       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1467       <require condition="ARMv8MML_FP_ARMCC"/>
1468       <require Dendian="Little-endian"/>
1469     </condition>
1470
1471     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1472       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1473       <require condition="ARMv8MML_NODSP_NOFPU"/>
1474       <require Tcompiler="ARMCC"/>
1475     </condition>
1476     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1477       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1478       <require condition="ARMv8MML_DSP_NOFPU"/>
1479       <require Tcompiler="ARMCC"/>
1480     </condition>
1481     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1482       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1483       <require condition="ARMv8MML_NODSP_SP"/>
1484       <require Tcompiler="ARMCC"/>
1485     </condition>
1486     <condition id="ARMv8MML_DSP_SP_ARMCC">
1487       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1488       <require condition="ARMv8MML_DSP_SP"/>
1489       <require Tcompiler="ARMCC"/>
1490     </condition>
1491     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1492       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1493       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1494       <require Dendian="Little-endian"/>
1495     </condition>
1496     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1497       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1498       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1499       <require Dendian="Little-endian"/>
1500     </condition>
1501     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1502       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1503       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1504       <require Dendian="Little-endian"/>
1505     </condition>
1506     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1507       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1508       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1509       <require Dendian="Little-endian"/>
1510     </condition>
1511
1512     <!-- GCC compiler -->
1513     <condition id="CA_GCC">
1514       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1515       <require condition="ARMv7-A Device"/>
1516       <require Tcompiler="GCC"/>
1517     </condition>
1518
1519     <condition id="CM0_GCC">
1520       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1521       <require condition="CM0"/>
1522       <require Tcompiler="GCC"/>
1523     </condition>
1524     <condition id="CM0_LE_GCC">
1525       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1526       <require condition="CM0_GCC"/>
1527       <require Dendian="Little-endian"/>
1528     </condition>
1529     <condition id="CM0_BE_GCC">
1530       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1531       <require condition="CM0_GCC"/>
1532       <require Dendian="Big-endian"/>
1533     </condition>
1534
1535     <condition id="CM1_GCC">
1536       <description>Cortex-M1 based device for the GCC Compiler</description>
1537       <require condition="CM1"/>
1538       <require Tcompiler="GCC"/>
1539     </condition>
1540     <condition id="CM1_LE_GCC">
1541       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1542       <require condition="CM1_GCC"/>
1543       <require Dendian="Little-endian"/>
1544     </condition>
1545     <condition id="CM1_BE_GCC">
1546       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1547       <require condition="CM1_GCC"/>
1548       <require Dendian="Big-endian"/>
1549     </condition>
1550
1551     <condition id="CM3_GCC">
1552       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1553       <require condition="CM3"/>
1554       <require Tcompiler="GCC"/>
1555     </condition>
1556     <condition id="CM3_LE_GCC">
1557       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1558       <require condition="CM3_GCC"/>
1559       <require Dendian="Little-endian"/>
1560     </condition>
1561     <condition id="CM3_BE_GCC">
1562       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1563       <require condition="CM3_GCC"/>
1564       <require Dendian="Big-endian"/>
1565     </condition>
1566
1567     <condition id="CM4_GCC">
1568       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1569       <require condition="CM4"/>
1570       <require Tcompiler="GCC"/>
1571     </condition>
1572     <condition id="CM4_LE_GCC">
1573       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1574       <require condition="CM4_GCC"/>
1575       <require Dendian="Little-endian"/>
1576     </condition>
1577     <condition id="CM4_BE_GCC">
1578       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1579       <require condition="CM4_GCC"/>
1580       <require Dendian="Big-endian"/>
1581     </condition>
1582
1583     <condition id="CM4_FP_GCC">
1584       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1585       <require condition="CM4_FP"/>
1586       <require Tcompiler="GCC"/>
1587     </condition>
1588     <condition id="CM4_FP_LE_GCC">
1589       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1590       <require condition="CM4_FP_GCC"/>
1591       <require Dendian="Little-endian"/>
1592     </condition>
1593     <condition id="CM4_FP_BE_GCC">
1594       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1595       <require condition="CM4_FP_GCC"/>
1596       <require Dendian="Big-endian"/>
1597     </condition>
1598
1599     <condition id="CM7_GCC">
1600       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1601       <require condition="CM7"/>
1602       <require Tcompiler="GCC"/>
1603     </condition>
1604     <condition id="CM7_LE_GCC">
1605       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1606       <require condition="CM7_GCC"/>
1607       <require Dendian="Little-endian"/>
1608     </condition>
1609     <condition id="CM7_BE_GCC">
1610       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1611       <require condition="CM7_GCC"/>
1612       <require Dendian="Big-endian"/>
1613     </condition>
1614
1615     <condition id="CM7_FP_GCC">
1616       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1617       <require condition="CM7_FP"/>
1618       <require Tcompiler="GCC"/>
1619     </condition>
1620     <condition id="CM7_FP_LE_GCC">
1621       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1622       <require condition="CM7_FP_GCC"/>
1623       <require Dendian="Little-endian"/>
1624     </condition>
1625     <condition id="CM7_FP_BE_GCC">
1626       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1627       <require condition="CM7_FP_GCC"/>
1628       <require Dendian="Big-endian"/>
1629     </condition>
1630
1631     <condition id="CM7_SP_GCC">
1632       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1633       <require condition="CM7_SP"/>
1634       <require Tcompiler="GCC"/>
1635     </condition>
1636     <condition id="CM7_SP_LE_GCC">
1637       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1638       <require condition="CM7_SP_GCC"/>
1639       <require Dendian="Little-endian"/>
1640     </condition>
1641
1642     <condition id="CM7_DP_GCC">
1643       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1644       <require condition="CM7_DP"/>
1645       <require Tcompiler="GCC"/>
1646     </condition>
1647     <condition id="CM7_DP_LE_GCC">
1648       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1649       <require condition="CM7_DP_GCC"/>
1650       <require Dendian="Little-endian"/>
1651     </condition>
1652
1653     <condition id="CM23_GCC">
1654       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1655       <require condition="CM23"/>
1656       <require Tcompiler="GCC"/>
1657     </condition>
1658     <condition id="CM23_LE_GCC">
1659       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1660       <require condition="CM23_GCC"/>
1661       <require Dendian="Little-endian"/>
1662     </condition>
1663
1664     <condition id="CM33_GCC">
1665       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1666       <require condition="CM33"/>
1667       <require Tcompiler="GCC"/>
1668     </condition>
1669     <condition id="CM33_LE_GCC">
1670       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1671       <require condition="CM33_GCC"/>
1672       <require Dendian="Little-endian"/>
1673     </condition>
1674
1675     <condition id="CM33_FP_GCC">
1676       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1677       <require condition="CM33_FP"/>
1678       <require Tcompiler="GCC"/>
1679     </condition>
1680     <condition id="CM33_FP_LE_GCC">
1681       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1682       <require condition="CM33_FP_GCC"/>
1683       <require Dendian="Little-endian"/>
1684     </condition>
1685
1686     <condition id="CM33_NODSP_NOFPU_GCC">
1687       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1688       <require condition="CM33_NODSP_NOFPU"/>
1689       <require Tcompiler="GCC"/>
1690     </condition>
1691     <condition id="CM33_DSP_NOFPU_GCC">
1692       <description>CM33, DSP, no FPU, GCC Compiler</description>
1693       <require condition="CM33_DSP_NOFPU"/>
1694       <require Tcompiler="GCC"/>
1695     </condition>
1696     <condition id="CM33_NODSP_SP_GCC">
1697       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1698       <require condition="CM33_NODSP_SP"/>
1699       <require Tcompiler="GCC"/>
1700     </condition>
1701     <condition id="CM33_DSP_SP_GCC">
1702       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1703       <require condition="CM33_DSP_SP"/>
1704       <require Tcompiler="GCC"/>
1705     </condition>
1706     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1707       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1708       <require condition="CM33_NODSP_NOFPU_GCC"/>
1709       <require Dendian="Little-endian"/>
1710     </condition>
1711     <condition id="CM33_DSP_NOFPU_LE_GCC">
1712       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1713       <require condition="CM33_DSP_NOFPU_GCC"/>
1714       <require Dendian="Little-endian"/>
1715     </condition>
1716     <condition id="CM33_NODSP_SP_LE_GCC">
1717       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1718       <require condition="CM33_NODSP_SP_GCC"/>
1719       <require Dendian="Little-endian"/>
1720     </condition>
1721     <condition id="CM33_DSP_SP_LE_GCC">
1722       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1723       <require condition="CM33_DSP_SP_GCC"/>
1724       <require Dendian="Little-endian"/>
1725     </condition>
1726
1727     <condition id="CM35P_GCC">
1728       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1729       <require condition="CM35P"/>
1730       <require Tcompiler="GCC"/>
1731     </condition>
1732     <condition id="CM35P_LE_GCC">
1733       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1734       <require condition="CM35P_GCC"/>
1735       <require Dendian="Little-endian"/>
1736     </condition>
1737
1738     <condition id="CM35P_FP_GCC">
1739       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1740       <require condition="CM35P_FP"/>
1741       <require Tcompiler="GCC"/>
1742     </condition>
1743     <condition id="CM35P_FP_LE_GCC">
1744       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1745       <require condition="CM35P_FP_GCC"/>
1746       <require Dendian="Little-endian"/>
1747     </condition>
1748
1749     <condition id="CM35P_NODSP_NOFPU_GCC">
1750       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1751       <require condition="CM35P_NODSP_NOFPU"/>
1752       <require Tcompiler="GCC"/>
1753     </condition>
1754     <condition id="CM35P_DSP_NOFPU_GCC">
1755       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1756       <require condition="CM35P_DSP_NOFPU"/>
1757       <require Tcompiler="GCC"/>
1758     </condition>
1759     <condition id="CM35P_NODSP_SP_GCC">
1760       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1761       <require condition="CM35P_NODSP_SP"/>
1762       <require Tcompiler="GCC"/>
1763     </condition>
1764     <condition id="CM35P_DSP_SP_GCC">
1765       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1766       <require condition="CM35P_DSP_SP"/>
1767       <require Tcompiler="GCC"/>
1768     </condition>
1769     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1770       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1771       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1772       <require Dendian="Little-endian"/>
1773     </condition>
1774     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1775       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1776       <require condition="CM35P_DSP_NOFPU_GCC"/>
1777       <require Dendian="Little-endian"/>
1778     </condition>
1779     <condition id="CM35P_NODSP_SP_LE_GCC">
1780       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1781       <require condition="CM35P_NODSP_SP_GCC"/>
1782       <require Dendian="Little-endian"/>
1783     </condition>
1784     <condition id="CM35P_DSP_SP_LE_GCC">
1785       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1786       <require condition="CM35P_DSP_SP_GCC"/>
1787       <require Dendian="Little-endian"/>
1788     </condition>
1789
1790     <condition id="ARMv8MBL_GCC">
1791       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1792       <require condition="ARMv8MBL"/>
1793       <require Tcompiler="GCC"/>
1794     </condition>
1795     <condition id="ARMv8MBL_LE_GCC">
1796       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1797       <require condition="ARMv8MBL_GCC"/>
1798       <require Dendian="Little-endian"/>
1799     </condition>
1800
1801     <condition id="ARMv8MML_GCC">
1802       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1803       <require condition="ARMv8MML"/>
1804       <require Tcompiler="GCC"/>
1805     </condition>
1806     <condition id="ARMv8MML_LE_GCC">
1807       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1808       <require condition="ARMv8MML_GCC"/>
1809       <require Dendian="Little-endian"/>
1810     </condition>
1811
1812     <condition id="ARMv8MML_FP_GCC">
1813       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1814       <require condition="ARMv8MML_FP"/>
1815       <require Tcompiler="GCC"/>
1816     </condition>
1817     <condition id="ARMv8MML_FP_LE_GCC">
1818       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1819       <require condition="ARMv8MML_FP_GCC"/>
1820       <require Dendian="Little-endian"/>
1821     </condition>
1822
1823     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1824       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1825       <require condition="ARMv8MML_NODSP_NOFPU"/>
1826       <require Tcompiler="GCC"/>
1827     </condition>
1828     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1829       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1830       <require condition="ARMv8MML_DSP_NOFPU"/>
1831       <require Tcompiler="GCC"/>
1832     </condition>
1833     <condition id="ARMv8MML_NODSP_SP_GCC">
1834       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1835       <require condition="ARMv8MML_NODSP_SP"/>
1836       <require Tcompiler="GCC"/>
1837     </condition>
1838     <condition id="ARMv8MML_DSP_SP_GCC">
1839       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1840       <require condition="ARMv8MML_DSP_SP"/>
1841       <require Tcompiler="GCC"/>
1842     </condition>
1843     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1844       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1845       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1846       <require Dendian="Little-endian"/>
1847     </condition>
1848     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1849       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1850       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1851       <require Dendian="Little-endian"/>
1852     </condition>
1853     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1854       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1855       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1856       <require Dendian="Little-endian"/>
1857     </condition>
1858     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1859       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1860       <require condition="ARMv8MML_DSP_SP_GCC"/>
1861       <require Dendian="Little-endian"/>
1862     </condition>
1863
1864     <!-- IAR compiler -->
1865     <condition id="CA_IAR">
1866       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1867       <require condition="ARMv7-A Device"/>
1868       <require Tcompiler="IAR"/>
1869     </condition>
1870
1871     <condition id="CM0_IAR">
1872       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1873       <require condition="CM0"/>
1874       <require Tcompiler="IAR"/>
1875     </condition>
1876     <condition id="CM0_LE_IAR">
1877       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1878       <require condition="CM0_IAR"/>
1879       <require Dendian="Little-endian"/>
1880     </condition>
1881     <condition id="CM0_BE_IAR">
1882       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1883       <require condition="CM0_IAR"/>
1884       <require Dendian="Big-endian"/>
1885     </condition>
1886
1887     <condition id="CM1_IAR">
1888       <description>Cortex-M1 based device for the IAR Compiler</description>
1889       <require condition="CM1"/>
1890       <require Tcompiler="IAR"/>
1891     </condition>
1892     <condition id="CM1_LE_IAR">
1893       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1894       <require condition="CM1_IAR"/>
1895       <require Dendian="Little-endian"/>
1896     </condition>
1897     <condition id="CM1_BE_IAR">
1898       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1899       <require condition="CM1_IAR"/>
1900       <require Dendian="Big-endian"/>
1901     </condition>
1902
1903     <condition id="CM3_IAR">
1904       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1905       <require condition="CM3"/>
1906       <require Tcompiler="IAR"/>
1907     </condition>
1908     <condition id="CM3_LE_IAR">
1909       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1910       <require condition="CM3_IAR"/>
1911       <require Dendian="Little-endian"/>
1912     </condition>
1913     <condition id="CM3_BE_IAR">
1914       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1915       <require condition="CM3_IAR"/>
1916       <require Dendian="Big-endian"/>
1917     </condition>
1918
1919     <condition id="CM4_IAR">
1920       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1921       <require condition="CM4"/>
1922       <require Tcompiler="IAR"/>
1923     </condition>
1924     <condition id="CM4_LE_IAR">
1925       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1926       <require condition="CM4_IAR"/>
1927       <require Dendian="Little-endian"/>
1928     </condition>
1929     <condition id="CM4_BE_IAR">
1930       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1931       <require condition="CM4_IAR"/>
1932       <require Dendian="Big-endian"/>
1933     </condition>
1934
1935     <condition id="CM4_FP_IAR">
1936       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1937       <require condition="CM4_FP"/>
1938       <require Tcompiler="IAR"/>
1939     </condition>
1940     <condition id="CM4_FP_LE_IAR">
1941       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1942       <require condition="CM4_FP_IAR"/>
1943       <require Dendian="Little-endian"/>
1944     </condition>
1945     <condition id="CM4_FP_BE_IAR">
1946       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1947       <require condition="CM4_FP_IAR"/>
1948       <require Dendian="Big-endian"/>
1949     </condition>
1950
1951     <condition id="CM7_IAR">
1952       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1953       <require condition="CM7"/>
1954       <require Tcompiler="IAR"/>
1955     </condition>
1956     <condition id="CM7_LE_IAR">
1957       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1958       <require condition="CM7_IAR"/>
1959       <require Dendian="Little-endian"/>
1960     </condition>
1961     <condition id="CM7_BE_IAR">
1962       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1963       <require condition="CM7_IAR"/>
1964       <require Dendian="Big-endian"/>
1965     </condition>
1966
1967     <condition id="CM7_FP_IAR">
1968       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1969       <require condition="CM7_FP"/>
1970       <require Tcompiler="IAR"/>
1971     </condition>
1972     <condition id="CM7_FP_LE_IAR">
1973       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1974       <require condition="CM7_FP_IAR"/>
1975       <require Dendian="Little-endian"/>
1976     </condition>
1977     <condition id="CM7_FP_BE_IAR">
1978       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1979       <require condition="CM7_FP_IAR"/>
1980       <require Dendian="Big-endian"/>
1981     </condition>
1982
1983     <condition id="CM7_SP_IAR">
1984       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1985       <require condition="CM7_SP"/>
1986       <require Tcompiler="IAR"/>
1987     </condition>
1988     <condition id="CM7_SP_LE_IAR">
1989       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1990       <require condition="CM7_SP_IAR"/>
1991       <require Dendian="Little-endian"/>
1992     </condition>
1993     <condition id="CM7_SP_BE_IAR">
1994       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1995       <require condition="CM7_SP_IAR"/>
1996       <require Dendian="Big-endian"/>
1997     </condition>
1998
1999     <condition id="CM7_DP_IAR">
2000       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2001       <require condition="CM7_DP"/>
2002       <require Tcompiler="IAR"/>
2003     </condition>
2004     <condition id="CM7_DP_LE_IAR">
2005       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2006       <require condition="CM7_DP_IAR"/>
2007       <require Dendian="Little-endian"/>
2008     </condition>
2009     <condition id="CM7_DP_BE_IAR">
2010       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2011       <require condition="CM7_DP_IAR"/>
2012       <require Dendian="Big-endian"/>
2013     </condition>
2014
2015     <condition id="CM23_IAR">
2016       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2017       <require condition="CM23"/>
2018       <require Tcompiler="IAR"/>
2019     </condition>
2020     <condition id="CM23_LE_IAR">
2021       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2022       <require condition="CM23_IAR"/>
2023       <require Dendian="Little-endian"/>
2024     </condition>
2025
2026     <condition id="CM33_IAR">
2027       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2028       <require condition="CM33"/>
2029       <require Tcompiler="IAR"/>
2030     </condition>
2031     <condition id="CM33_LE_IAR">
2032       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2033       <require condition="CM33_IAR"/>
2034       <require Dendian="Little-endian"/>
2035     </condition>
2036
2037     <condition id="CM33_FP_IAR">
2038       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2039       <require condition="CM33_FP"/>
2040       <require Tcompiler="IAR"/>
2041     </condition>
2042     <condition id="CM33_FP_LE_IAR">
2043       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2044       <require condition="CM33_FP_IAR"/>
2045       <require Dendian="Little-endian"/>
2046     </condition>
2047
2048     <condition id="CM33_NODSP_NOFPU_IAR">
2049       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2050       <require condition="CM33_NODSP_NOFPU"/>
2051       <require Tcompiler="IAR"/>
2052     </condition>
2053     <condition id="CM33_DSP_NOFPU_IAR">
2054       <description>CM33, DSP, no FPU, IAR Compiler</description>
2055       <require condition="CM33_DSP_NOFPU"/>
2056       <require Tcompiler="IAR"/>
2057     </condition>
2058     <condition id="CM33_NODSP_SP_IAR">
2059       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2060       <require condition="CM33_NODSP_SP"/>
2061       <require Tcompiler="IAR"/>
2062     </condition>
2063     <condition id="CM33_DSP_SP_IAR">
2064       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2065       <require condition="CM33_DSP_SP"/>
2066       <require Tcompiler="IAR"/>
2067     </condition>
2068     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2069       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2070       <require condition="CM33_NODSP_NOFPU_IAR"/>
2071       <require Dendian="Little-endian"/>
2072     </condition>
2073     <condition id="CM33_DSP_NOFPU_LE_IAR">
2074       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2075       <require condition="CM33_DSP_NOFPU_IAR"/>
2076       <require Dendian="Little-endian"/>
2077     </condition>
2078     <condition id="CM33_NODSP_SP_LE_IAR">
2079       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2080       <require condition="CM33_NODSP_SP_IAR"/>
2081       <require Dendian="Little-endian"/>
2082     </condition>
2083     <condition id="CM33_DSP_SP_LE_IAR">
2084       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2085       <require condition="CM33_DSP_SP_IAR"/>
2086       <require Dendian="Little-endian"/>
2087     </condition>
2088
2089     <condition id="CM35P_IAR">
2090       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2091       <require condition="CM35P"/>
2092       <require Tcompiler="IAR"/>
2093     </condition>
2094     <condition id="CM35P_LE_IAR">
2095       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2096       <require condition="CM35P_IAR"/>
2097       <require Dendian="Little-endian"/>
2098     </condition>
2099
2100     <condition id="CM35P_FP_IAR">
2101       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2102       <require condition="CM35P_FP"/>
2103       <require Tcompiler="IAR"/>
2104     </condition>
2105     <condition id="CM35P_FP_LE_IAR">
2106       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2107       <require condition="CM35P_FP_IAR"/>
2108       <require Dendian="Little-endian"/>
2109     </condition>
2110
2111     <condition id="CM35P_NODSP_NOFPU_IAR">
2112       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2113       <require condition="CM35P_NODSP_NOFPU"/>
2114       <require Tcompiler="IAR"/>
2115     </condition>
2116     <condition id="CM35P_DSP_NOFPU_IAR">
2117       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2118       <require condition="CM35P_DSP_NOFPU"/>
2119       <require Tcompiler="IAR"/>
2120     </condition>
2121     <condition id="CM35P_NODSP_SP_IAR">
2122       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2123       <require condition="CM35P_NODSP_SP"/>
2124       <require Tcompiler="IAR"/>
2125     </condition>
2126     <condition id="CM35P_DSP_SP_IAR">
2127       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2128       <require condition="CM35P_DSP_SP"/>
2129       <require Tcompiler="IAR"/>
2130     </condition>
2131     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2132       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2133       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2134       <require Dendian="Little-endian"/>
2135     </condition>
2136     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2137       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2138       <require condition="CM35P_DSP_NOFPU_IAR"/>
2139       <require Dendian="Little-endian"/>
2140     </condition>
2141     <condition id="CM35P_NODSP_SP_LE_IAR">
2142       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2143       <require condition="CM35P_NODSP_SP_IAR"/>
2144       <require Dendian="Little-endian"/>
2145     </condition>
2146     <condition id="CM35P_DSP_SP_LE_IAR">
2147       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2148       <require condition="CM35P_DSP_SP_IAR"/>
2149       <require Dendian="Little-endian"/>
2150     </condition>
2151
2152     <condition id="ARMv8MBL_IAR">
2153       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2154       <require condition="ARMv8MBL"/>
2155       <require Tcompiler="IAR"/>
2156     </condition>
2157     <condition id="ARMv8MBL_LE_IAR">
2158       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2159       <require condition="ARMv8MBL_IAR"/>
2160       <require Dendian="Little-endian"/>
2161     </condition>
2162
2163     <condition id="ARMv8MML_IAR">
2164       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2165       <require condition="ARMv8MML"/>
2166       <require Tcompiler="IAR"/>
2167     </condition>
2168     <condition id="ARMv8MML_LE_IAR">
2169       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2170       <require condition="ARMv8MML_IAR"/>
2171       <require Dendian="Little-endian"/>
2172     </condition>
2173
2174     <condition id="ARMv8MML_FP_IAR">
2175       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2176       <require condition="ARMv8MML_FP"/>
2177       <require Tcompiler="IAR"/>
2178     </condition>
2179     <condition id="ARMv8MML_FP_LE_IAR">
2180       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2181       <require condition="ARMv8MML_FP_IAR"/>
2182       <require Dendian="Little-endian"/>
2183     </condition>
2184
2185     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2186       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2187       <require condition="ARMv8MML_NODSP_NOFPU"/>
2188       <require Tcompiler="IAR"/>
2189     </condition>
2190     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2191       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2192       <require condition="ARMv8MML_DSP_NOFPU"/>
2193       <require Tcompiler="IAR"/>
2194     </condition>
2195     <condition id="ARMv8MML_NODSP_SP_IAR">
2196       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2197       <require condition="ARMv8MML_NODSP_SP"/>
2198       <require Tcompiler="IAR"/>
2199     </condition>
2200     <condition id="ARMv8MML_DSP_SP_IAR">
2201       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2202       <require condition="ARMv8MML_DSP_SP"/>
2203       <require Tcompiler="IAR"/>
2204     </condition>
2205     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2206       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2207       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2208       <require Dendian="Little-endian"/>
2209     </condition>
2210     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2211       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2212       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2213       <require Dendian="Little-endian"/>
2214     </condition>
2215     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2216       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2217       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2218       <require Dendian="Little-endian"/>
2219     </condition>
2220     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2221       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2222       <require condition="ARMv8MML_DSP_SP_IAR"/>
2223       <require Dendian="Little-endian"/>
2224     </condition>
2225
2226     <!-- conditions selecting single devices and CMSIS Core -->
2227     <condition id="ARMCM0 CMSIS">
2228       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2229       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2230       <require Cclass="CMSIS" Cgroup="CORE"/>
2231     </condition>
2232
2233     <condition id="ARMCM0+ CMSIS">
2234       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2235       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2236       <require Cclass="CMSIS" Cgroup="CORE"/>
2237     </condition>
2238
2239     <condition id="ARMCM1 CMSIS">
2240       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2241       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2242       <require Cclass="CMSIS" Cgroup="CORE"/>
2243     </condition>
2244
2245     <condition id="ARMCM3 CMSIS">
2246       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2247       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2248       <require Cclass="CMSIS" Cgroup="CORE"/>
2249     </condition>
2250
2251     <condition id="ARMCM4 CMSIS">
2252       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2253       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2254       <require Cclass="CMSIS" Cgroup="CORE"/>
2255     </condition>
2256
2257     <condition id="ARMCM7 CMSIS">
2258       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2259       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2260       <require Cclass="CMSIS" Cgroup="CORE"/>
2261     </condition>
2262
2263     <condition id="ARMCM23 CMSIS">
2264       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2265       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2266       <require Cclass="CMSIS" Cgroup="CORE"/>
2267     </condition>
2268
2269     <condition id="ARMCM33 CMSIS">
2270       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2271       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2272       <require Cclass="CMSIS" Cgroup="CORE"/>
2273     </condition>
2274
2275     <condition id="ARMCM35P CMSIS">
2276       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2277       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2278       <require Cclass="CMSIS" Cgroup="CORE"/>
2279     </condition>
2280
2281     <condition id="ARMSC000 CMSIS">
2282       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2283       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2284       <require Cclass="CMSIS" Cgroup="CORE"/>
2285     </condition>
2286
2287     <condition id="ARMSC300 CMSIS">
2288       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2289       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2290       <require Cclass="CMSIS" Cgroup="CORE"/>
2291     </condition>
2292
2293     <condition id="ARMv8MBL CMSIS">
2294       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2295       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2296       <require Cclass="CMSIS" Cgroup="CORE"/>
2297     </condition>
2298
2299     <condition id="ARMv8MML CMSIS">
2300       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2301       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2302       <require Cclass="CMSIS" Cgroup="CORE"/>
2303     </condition>
2304
2305     <condition id="ARMv81MML CMSIS">
2306       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2307       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2308       <require Cclass="CMSIS" Cgroup="CORE"/>
2309     </condition>
2310
2311     <condition id="ARMCA5 CMSIS">
2312       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2313       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2314       <require Cclass="CMSIS" Cgroup="CORE"/>
2315     </condition>
2316
2317     <condition id="ARMCA7 CMSIS">
2318       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2319       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2320       <require Cclass="CMSIS" Cgroup="CORE"/>
2321     </condition>
2322
2323     <condition id="ARMCA9 CMSIS">
2324       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2325       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2326       <require Cclass="CMSIS" Cgroup="CORE"/>
2327     </condition>
2328
2329     <!-- CMSIS DSP -->
2330     <condition id="CMSIS DSP">
2331       <description>Components required for DSP</description>
2332       <require condition="ARMv6_7_8-M Device"/>
2333       <require condition="ARMCC GCC IAR"/>
2334       <require Cclass="CMSIS" Cgroup="CORE"/>
2335     </condition>
2336
2337     <!-- CMSIS NN -->
2338     <condition id="CMSIS NN">
2339       <description>Components required for NN</description>
2340       <require Cclass="CMSIS" Cgroup="DSP"/>
2341     </condition>
2342
2343     <!-- RTOS RTX -->
2344     <condition id="RTOS RTX">
2345       <description>Components required for RTOS RTX</description>
2346       <require condition="ARMv6_7-M Device"/>
2347       <require condition="ARMCC GCC IAR"/>
2348       <require Cclass="Device" Cgroup="Startup"/>
2349       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2350     </condition>
2351     <condition id="RTOS RTX IFX">
2352       <description>Components required for RTOS RTX IFX</description>
2353       <require condition="ARMv6_7-M Device"/>
2354       <require condition="ARMCC GCC IAR"/>
2355       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2356       <require Cclass="Device" Cgroup="Startup"/>
2357       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2358     </condition>
2359     <condition id="RTOS RTX5">
2360       <description>Components required for RTOS RTX5</description>
2361       <require condition="ARMv6_7_8-M Device"/>
2362       <require condition="ARMCC GCC IAR"/>
2363       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2364     </condition>
2365     <condition id="RTOS2 RTX5">
2366       <description>Components required for RTOS2 RTX5</description>
2367       <require condition="ARMv6_7_8-M Device"/>
2368       <require condition="ARMCC GCC IAR"/>
2369       <require Cclass="CMSIS"  Cgroup="CORE"/>
2370       <require Cclass="Device" Cgroup="Startup"/>
2371     </condition>
2372     <condition id="RTOS2 RTX5 v7-A">
2373       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2374       <require condition="ARMv7-A Device"/>
2375       <require condition="ARMCC GCC IAR"/>
2376       <require Cclass="CMSIS"  Cgroup="CORE"/>
2377       <require Cclass="Device" Cgroup="Startup"/>
2378       <require Cclass="Device" Cgroup="OS Tick"/>
2379       <require Cclass="Device" Cgroup="IRQ Controller"/>
2380     </condition>
2381     <condition id="RTOS2 RTX5 Lib">
2382       <description>Components required for RTOS2 RTX5 Library</description>
2383       <require condition="ARMv6_7_8-M Device"/>
2384       <require condition="ARMCC GCC IAR"/>
2385       <require Cclass="CMSIS"  Cgroup="CORE"/>
2386       <require Cclass="Device" Cgroup="Startup"/>
2387     </condition>
2388     <condition id="RTOS2 RTX5 NS">
2389       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2390       <require condition="ARMv8-M TZ Device"/>
2391       <require condition="ARMCC GCC IAR"/>
2392       <require Cclass="CMSIS"  Cgroup="CORE"/>
2393       <require Cclass="Device" Cgroup="Startup"/>
2394     </condition>
2395
2396     <!-- OS Tick -->
2397     <condition id="OS Tick PTIM">
2398       <description>Components required for OS Tick Private Timer</description>
2399       <require condition="CA5_CA9"/>
2400       <require Cclass="Device" Cgroup="IRQ Controller"/>
2401     </condition>
2402
2403     <condition id="OS Tick GTIM">
2404       <description>Components required for OS Tick Generic Physical Timer</description>
2405       <require condition="CA7"/>
2406       <require Cclass="Device" Cgroup="IRQ Controller"/>
2407     </condition>
2408
2409   </conditions>
2410
2411   <components>
2412     <!-- CMSIS-Core component -->
2413     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.4.0"  condition="ARMv6_7_8-M Device" >
2414       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2415       <files>
2416         <!-- CPU independent -->
2417         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2418         <file category="include" name="CMSIS/Core/Include/"/>
2419         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2420         <!-- Code template -->
2421         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2422         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2423       </files>
2424     </component>
2425
2426     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.4"  condition="ARMv7-A Device" >
2427       <description>CMSIS-CORE for Cortex-A</description>
2428       <files>
2429         <!-- CPU independent -->
2430         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2431         <file category="include" name="CMSIS/Core_A/Include/"/>
2432       </files>
2433     </component>
2434
2435     <!-- CMSIS-Startup components -->
2436     <!-- Cortex-M0 -->
2437     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM0 CMSIS">
2438       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2439       <files>
2440         <!-- include folder / device header file -->
2441         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2442         <!-- startup / system file -->
2443         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.2" attr="config"/>
2444         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2445         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2446         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2447         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2448       </files>
2449     </component>
2450     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2451       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2452       <files>
2453         <!-- include folder / device header file -->
2454         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2455         <!-- startup / system file -->
2456         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2457         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.0.1" attr="config" condition="GCC"/>
2458         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2459         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2460         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2461       </files>
2462     </component>
2463
2464     <!-- Cortex-M0+ -->
2465     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM0+ CMSIS">
2466       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2467       <files>
2468         <!-- include folder / device header file -->
2469         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2470         <!-- startup / system file -->
2471         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.2" attr="config"/>
2472         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2473         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2474         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2475         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2476       </files>
2477     </component>
2478     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0+ CMSIS">
2479       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2480       <files>
2481         <!-- include folder / device header file -->
2482         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2483         <!-- startup / system file -->
2484         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2485         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.0.1" attr="config" condition="GCC"/>
2486         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2487         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2488         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2489       </files>
2490     </component>
2491
2492     <!-- Cortex-M1 -->
2493     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM1 CMSIS">
2494       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2495       <files>
2496         <!-- include folder / device header file -->
2497         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2498         <!-- startup / system file -->
2499         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.2" attr="config"/>
2500         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2501         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2502         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2503         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2504       </files>
2505     </component>
2506     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2507       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2508       <files>
2509         <!-- include folder / device header file -->
2510         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2511         <!-- startup / system file -->
2512         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2513         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.0.1" attr="config" condition="GCC"/>
2514         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2515         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2516         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2517       </files>
2518     </component>
2519
2520     <!-- Cortex-M3 -->
2521     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM3 CMSIS">
2522       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2523       <files>
2524         <!-- include folder / device header file -->
2525         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2526         <!-- startup / system file -->
2527         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.2" attr="config"/>
2528         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2529         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2530         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2531         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2532       </files>
2533     </component>
2534     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2535       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2536       <files>
2537         <!-- include folder / device header file -->
2538         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2539         <!-- startup / system file -->
2540         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2541         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.0.1" attr="config" condition="GCC"/>
2542         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2543         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2544         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2545       </files>
2546     </component>
2547
2548     <!-- Cortex-M4 -->
2549     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM4 CMSIS">
2550       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2551       <files>
2552         <!-- include folder / device header file -->
2553         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2554         <!-- startup / system file -->
2555         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.2" attr="config"/>
2556         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2557         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2558         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2559        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2560       </files>
2561     </component>
2562     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2563       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2564       <files>
2565         <!-- include folder / device header file -->
2566         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2567         <!-- startup / system file -->
2568         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2569         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.0.1" attr="config" condition="GCC"/>
2570         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2571         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2572         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2573       </files>
2574     </component>
2575
2576     <!-- Cortex-M7 -->
2577     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM7 CMSIS">
2578       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2579       <files>
2580         <!-- include folder / device header file -->
2581         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2582         <!-- startup / system file -->
2583         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.2" attr="config"/>
2584         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2585         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2586         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2587         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2588       </files>
2589     </component>
2590     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2591       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2592       <files>
2593         <!-- include folder / device header file -->
2594         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2595         <!-- startup / system file -->
2596         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2597         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.0.1" attr="config" condition="GCC"/>
2598         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2599         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2600         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2601       </files>
2602     </component>
2603
2604     <!-- Cortex-M23 -->
2605     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM23 CMSIS">
2606       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2607       <files>
2608         <!-- include folder / device header file -->
2609         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2610         <!-- startup / system file -->
2611         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.2" attr="config"/>
2612         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
2613         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2614         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2615         <!-- SAU configuration -->
2616         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2617       </files>
2618     </component>
2619     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM23 CMSIS">
2620       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2621       <files>
2622         <!-- include folder / device header file -->
2623         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2624         <!-- startup / system file -->
2625         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.1" attr="config" condition="ARMCC"/>
2626         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.0.1" attr="config" condition="GCC"/>
2627         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.0.0" attr="config" condition="GCC"/>
2628         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2629         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2630         <!-- SAU configuration -->
2631         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2632       </files>
2633     </component>
2634
2635     <!-- Cortex-M33 -->
2636     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM33 CMSIS">
2637       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2638       <files>
2639         <!-- include folder / device header file -->
2640         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2641         <!-- startup / system file -->
2642         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.2" attr="config"/>
2643         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2644         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2645         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2646         <!-- SAU configuration -->
2647         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2648       </files>
2649     </component>
2650     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM33 CMSIS">
2651       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2652       <files>
2653         <!-- include folder / device header file -->
2654         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2655         <!-- startup / system file -->
2656         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2657         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.0.1" attr="config" condition="GCC"/>
2658         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2659         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2660         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2661         <!-- SAU configuration -->
2662         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2663       </files>
2664     </component>
2665
2666     <!-- Cortex-M35P -->
2667     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM35P CMSIS">
2668       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2669       <files>
2670         <!-- include folder / device header file -->
2671         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2672         <!-- startup / system file -->
2673         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.2" attr="config"/>
2674         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2675         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2676         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2677         <!-- SAU configuration -->
2678         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2679       </files>
2680     </component>
2681     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM35P CMSIS">
2682       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2683       <files>
2684         <!-- include folder / device header file -->
2685         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2686         <!-- startup / system file -->
2687         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2688         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.1" attr="config" condition="GCC"/>
2689         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2690         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
2691         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2692         <!-- SAU configuration -->
2693         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2694       </files>
2695     </component>
2696
2697     <!-- Cortex-SC000 -->
2698     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMSC000 CMSIS">
2699       <description>System and Startup for Generic Arm SC000 device</description>
2700       <files>
2701         <!-- include folder / device header file -->
2702         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2703         <!-- startup / system file -->
2704         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.2" attr="config"/>
2705         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2706         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2707         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2708         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2709       </files>
2710     </component>
2711     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMSC000 CMSIS">
2712       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2713       <files>
2714         <!-- include folder / device header file -->
2715         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2716         <!-- startup / system file -->
2717         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2718         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.0.1" attr="config" condition="GCC"/>
2719         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2720         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2721         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2722       </files>
2723     </component>
2724
2725     <!-- Cortex-SC300 -->
2726     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMSC300 CMSIS">
2727       <description>System and Startup for Generic Arm SC300 device</description>
2728       <files>
2729         <!-- include folder / device header file -->
2730         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2731         <!-- startup / system file -->
2732         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.2" attr="config"/>
2733         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2734         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2735         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2736         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2737       </files>
2738     </component>
2739     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMSC300 CMSIS">
2740       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2741       <files>
2742         <!-- include folder / device header file -->
2743         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2744         <!-- startup / system file -->
2745         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2746         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.0.1" attr="config" condition="GCC"/>
2747         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2748         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2749         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2750       </files>
2751     </component>
2752
2753     <!-- ARMv8MBL -->
2754     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMv8MBL CMSIS">
2755       <description>System and Startup for Generic Armv8-M Baseline device</description>
2756       <files>
2757         <!-- include folder / device header file -->
2758         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2759         <!-- startup / system file -->
2760         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.2" attr="config"/>
2761         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
2762         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2763         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2764         <!-- SAU configuration -->
2765         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2766       </files>
2767     </component>
2768     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMv8MBL CMSIS">
2769       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2770       <files>
2771         <!-- include folder / device header file -->
2772         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2773         <!-- startup / system file -->
2774         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.1" attr="config" condition="ARMCC"/>
2775         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.0.1" attr="config" condition="GCC"/>
2776         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2777         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2778         <!-- SAU configuration -->
2779         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2780       </files>
2781     </component>
2782
2783     <!-- ARMv8MML -->
2784     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMv8MML CMSIS">
2785       <description>System and Startup for Generic Armv8-M Mainline device</description>
2786       <files>
2787         <!-- include folder / device header file -->
2788         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2789         <!-- startup / system file -->
2790         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.2" attr="config"/>
2791         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2792         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2793         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2794         <!-- SAU configuration -->
2795         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2796       </files>
2797     </component>
2798     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMv8MML CMSIS">
2799       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2800       <files>
2801         <!-- include folder / device header file -->
2802         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2803         <!-- startup / system file -->
2804         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2805         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.0.1" attr="config" condition="GCC"/>
2806         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2807         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2808         <!-- SAU configuration -->
2809         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2810       </files>
2811     </component>
2812
2813     <!-- ARMv81MML -->
2814     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv81MML CMSIS">
2815       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2816       <files>
2817         <!-- include folder / device header file -->
2818         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2819         <!-- startup / system file -->
2820         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.2" attr="config"/>
2821         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2822         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.0.0" attr="config" condition="GCC"/>
2823         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.0" attr="config"/>
2824         <!-- SAU configuration -->
2825         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2826       </files>
2827     </component>
2828
2829     <!-- Cortex-A5 -->
2830     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2831       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2832       <files>
2833         <!-- include folder / device header file -->
2834         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2835         <!-- startup / system / mmu files -->
2836         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2837         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2838         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2839         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2840         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2841         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2842         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2843         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2844         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2845         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2846         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2847         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2848
2849       </files>
2850     </component>
2851
2852     <!-- Cortex-A7 -->
2853     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2854       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2855       <files>
2856         <!-- include folder / device header file -->
2857         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2858         <!-- startup / system / mmu files -->
2859         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2860         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2861         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2862         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2863         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2864         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2865         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2866         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2867         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2868         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2869         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2870         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2871       </files>
2872     </component>
2873
2874     <!-- Cortex-A9 -->
2875     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2876       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2877       <files>
2878         <!-- include folder / device header file -->
2879         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2880         <!-- startup / system / mmu files -->
2881         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2882         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2883         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2884         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2885         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2886         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2887         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2888         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2889         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2890         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2891         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2892         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2893       </files>
2894     </component>
2895
2896     <!-- IRQ Controller -->
2897     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2898       <description>IRQ Controller implementation using GIC</description>
2899       <files>
2900         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2901       </files>
2902     </component>
2903
2904     <!-- OS Tick -->
2905     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2906       <description>OS Tick implementation using Private Timer</description>
2907       <files>
2908         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2909       </files>
2910     </component>
2911
2912     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2913       <description>OS Tick implementation using Generic Physical Timer</description>
2914       <files>
2915         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2916       </files>
2917     </component>
2918
2919     <!-- CMSIS-DSP component -->
2920     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.7.0" isDefaultVariant="true" condition="CMSIS DSP">
2921       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2922       <files>
2923         <!-- CPU independent -->
2924         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2925         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
2926
2927         <!-- CPU and Compiler dependent -->
2928         <!-- ARMCC -->
2929         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2930         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2931         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2932         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2933         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2934         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2935         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2936         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2937         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2938         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2939         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2940         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2941         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2942         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2943         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2944         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2945
2946         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2947         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2948         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2949         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2950         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2951         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2952         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2953         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2954         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2955         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2956         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2957         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2958         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2959         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2960         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
2961         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
2962
2963         <!-- GCC -->
2964         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2965         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2966         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2967         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2968         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
2969         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2970         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2971         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2972
2973         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2974         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2975         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2976         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2977         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2978         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2979         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2980         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2981         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2982         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2983         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2984         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2985         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2986         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2987         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
2988         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
2989
2990   <!-- IAR -->
2991         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2992         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2993         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2994         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2995         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2996         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2997         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2998         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2999         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3000         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3001         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3002         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3003         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3004         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3005         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3006         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3007
3008         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3009         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3010         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3011         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3012         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3013         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3014         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3015         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3016         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3017         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3018         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3019         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3020         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3021         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3022         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3023         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3024
3025       </files>
3026     </component>
3027     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.7.0" condition="CMSIS DSP">
3028       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3029       <files>
3030         <!-- CPU independent -->
3031         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3032         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3033
3034         <!-- DSP sources (core) -->
3035         <file category="source" name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3036         <file category="source" name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3037         <file category="source" name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3038         <file category="source" name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3039         <file category="source" name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3040         <file category="source" name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3041         <file category="source" name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3042         <file category="source" name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3043         <file category="source" name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3044         <file category="source" name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3045
3046       </files>
3047     </component>
3048
3049     <!-- CMSIS-NN component -->
3050     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.2.0" condition="CMSIS NN">
3051       <description>CMSIS-NN Neural Network Library</description>
3052       <files>
3053         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3054         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3055
3056         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3057         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3058         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3059         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3060
3061         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3062         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3063         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3064         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3065         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3066         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3067         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3068         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3069         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3070         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3071         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3072         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3073         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
3074
3075         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3076         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3077         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3078         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3079         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3080         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3081
3082         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3083         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3084         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3085         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3086         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3087
3088         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3089
3090         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3091         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3092       </files>
3093     </component>
3094
3095     <!-- CMSIS-RTOS Keil RTX component -->
3096     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3097       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3098       <RTE_Components_h>
3099         <!-- the following content goes into file 'RTE_Components.h' -->
3100         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3101         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3102       </RTE_Components_h>
3103       <files>
3104         <!-- CPU independent -->
3105         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3106         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3107         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3108
3109         <!-- RTX templates -->
3110         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3111         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3112         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3113         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3114         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3115         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3116         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3117         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3118         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3119         <!-- tool-chain specific template file -->
3120         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3121         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3122         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3123
3124         <!-- CPU and Compiler dependent -->
3125         <!-- ARMCC -->
3126         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3127         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3128         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3129         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3130         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3131         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3132         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3133         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3134         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3135         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3136         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3137         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3138         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3139         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3140         <!-- GCC -->
3141         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3142         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3143         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3144         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3145         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3146         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3147         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3148         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3149         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3150         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3151         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3152         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3153         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3154         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3155         <!-- IAR -->
3156         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3157         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3158         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3159         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3160         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3161         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3162         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3163         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3164         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3165         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3166         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3167         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3168         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3169         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3170       </files>
3171     </component>
3172     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3173     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3174       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3175       <RTE_Components_h>
3176         <!-- the following content goes into file 'RTE_Components.h' -->
3177         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3178         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3179       </RTE_Components_h>
3180       <files>
3181         <!-- CPU independent -->
3182         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3183         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3184         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3185
3186         <!-- RTX templates -->
3187         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3188         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3189         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3190         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3191         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3192         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3193         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3194         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3195         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3196         <!-- tool-chain specific template file -->
3197         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3198         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3199         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3200
3201         <!-- CPU and Compiler dependent -->
3202         <!-- ARMCC -->
3203         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3204         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3205         <!-- GCC -->
3206         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3207         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3208         <!-- IAR -->
3209       </files>
3210     </component>
3211
3212     <!-- CMSIS-RTOS Keil RTX5 component -->
3213     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.2" Capiversion="1.0.0" condition="RTOS RTX5">
3214       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3215       <RTE_Components_h>
3216         <!-- the following content goes into file 'RTE_Components.h' -->
3217         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3218         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3219       </RTE_Components_h>
3220       <files>
3221         <!-- RTX header file -->
3222         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3223         <!-- RTX compatibility module for API V1 -->
3224         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3225       </files>
3226     </component>
3227
3228     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3229     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
3230       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
3231       <RTE_Components_h>
3232         <!-- the following content goes into file 'RTE_Components.h' -->
3233         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3234         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3235       </RTE_Components_h>
3236       <files>
3237         <!-- RTX documentation -->
3238         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3239
3240         <!-- RTX header files -->
3241         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3242
3243         <!-- RTX configuration -->
3244         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3245         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3246
3247         <!-- RTX templates -->
3248         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3249         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3250         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3251         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3252         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3253         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3254         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3255         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3256         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3257         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3258
3259         <!-- RTX library configuration -->
3260         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3261
3262         <!-- RTX libraries (CPU and Compiler dependent) -->
3263         <!-- ARMCC -->
3264         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3265         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3266         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3267         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3268         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3269         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3270         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3271         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3272         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3273         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3274         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3275         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3276         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3277         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3278         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3279         <!-- GCC -->
3280         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3281         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3282         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3283         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3284         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3285         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3286         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3287         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3288         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3289         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3290         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3291         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3292         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3293         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3294         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3295         <!-- IAR -->
3296         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3297         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3298         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3299         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3300         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3301         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3302         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3303         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3304         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3305         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3306         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3307         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3308         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3309         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3310         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3311       </files>
3312     </component>
3313     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3314       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
3315       <RTE_Components_h>
3316         <!-- the following content goes into file 'RTE_Components.h' -->
3317         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3318         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3319         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3320       </RTE_Components_h>
3321       <files>
3322         <!-- RTX documentation -->
3323         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3324
3325         <!-- RTX header files -->
3326         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3327
3328         <!-- RTX configuration -->
3329         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3330         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3331
3332         <!-- RTX templates -->
3333         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3334         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3335         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3336         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3337         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3338         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3339         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3340         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3341         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3342         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3343
3344         <!-- RTX library configuration -->
3345         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3346
3347         <!-- RTX libraries (CPU and Compiler dependent) -->
3348         <!-- ARMCC -->
3349         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3350         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3351         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3352         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3353         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3354         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3355         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3356         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3357         <!-- GCC -->
3358         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3359         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3360         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3361         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3362         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3363         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3364         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3365         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3366         <!-- IAR -->
3367         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3368         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3369         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3370         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3371         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3372         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3373         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3374         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3375       </files>
3376     </component>
3377     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3378       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3379       <RTE_Components_h>
3380         <!-- the following content goes into file 'RTE_Components.h' -->
3381         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3382         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3383         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3384       </RTE_Components_h>
3385       <files>
3386         <!-- RTX documentation -->
3387         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3388
3389         <!-- RTX header files -->
3390         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3391
3392         <!-- RTX configuration -->
3393         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3394         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3395
3396         <!-- RTX templates -->
3397         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3398         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3399         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3400         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3401         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3402         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3403         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3404         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3405         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3406         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3407
3408         <!-- RTX sources (core) -->
3409         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3410         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3411         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3412         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3413         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3414         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3415         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3416         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3417         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3418         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3419         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3420         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3421         <!-- RTX sources (library configuration) -->
3422         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3423         <!-- RTX sources (handlers ARMCC) -->
3424         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3425         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3426         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3427         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3428         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3429         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3430         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3431         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3432         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3433         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3434         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3435         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3436         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3437         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3438         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3439         <!-- RTX sources (handlers GCC) -->
3440         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3441         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3442         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3443         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3444         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3445         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3446         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3447         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3448         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3449         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3450         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3451         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3452         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3453         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3454         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3455         <!-- RTX sources (handlers IAR) -->
3456         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3457         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3458         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3459         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3460         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3461         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3462         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3463         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3464         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3465         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3466         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3467         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3468         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3469         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3470         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3471         <!-- OS Tick (SysTick) -->
3472         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3473       </files>
3474     </component>
3475     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3476       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3477       <RTE_Components_h>
3478         <!-- the following content goes into file 'RTE_Components.h' -->
3479         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3480         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3481         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3482       </RTE_Components_h>
3483       <files>
3484         <!-- RTX documentation -->
3485         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3486
3487         <!-- RTX header files -->
3488         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3489
3490         <!-- RTX configuration -->
3491         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3492         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3493
3494         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3495
3496         <!-- RTX templates -->
3497         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3498         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3499         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3500         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3501         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3502         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3503         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3504         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3505         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3506         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3507
3508         <!-- RTX sources (core) -->
3509         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3510         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3511         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3512         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3513         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3514         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3515         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3516         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3517         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3518         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3519         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3520         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3521         <!-- RTX sources (library configuration) -->
3522         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3523         <!-- RTX sources (handlers ARMCC) -->
3524         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3525         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3526         <!-- RTX sources (handlers GCC) -->
3527         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3528         <!-- RTX sources (handlers IAR) -->
3529         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3530       </files>
3531     </component>
3532     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3533       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3534       <RTE_Components_h>
3535         <!-- the following content goes into file 'RTE_Components.h' -->
3536         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3537         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3538         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3539         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3540       </RTE_Components_h>
3541       <files>
3542         <!-- RTX documentation -->
3543         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3544
3545         <!-- RTX header files -->
3546         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3547
3548         <!-- RTX configuration -->
3549         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3550         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3551
3552         <!-- RTX templates -->
3553         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3554         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3555         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3556         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3557         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3558         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3559         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3560         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3561         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3562         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3563
3564         <!-- RTX sources (core) -->
3565         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3566         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3567         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3568         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3569         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3570         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3571         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3572         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3573         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3574         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3575         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3576         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3577         <!-- RTX sources (library configuration) -->
3578         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3579         <!-- RTX sources (ARMCC handlers) -->
3580         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3581         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3582         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3583         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3584         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3585         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3586         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3587         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3588         <!-- RTX sources (GCC handlers) -->
3589         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3590         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3591         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3592         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3593         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3594         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3595         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3596         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3597         <!-- RTX sources (IAR handlers) -->
3598         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3599         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3600         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3601         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3602         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3603         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3604         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3605         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3606         <!-- OS Tick (SysTick) -->
3607         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3608       </files>
3609     </component>
3610
3611     <!-- CMSIS-Driver Custom components -->
3612     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3613       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3614       <files>
3615         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3616         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3617       </files>
3618     </component>
3619     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3620       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3621       <files>
3622         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3623         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3624       </files>
3625     </component>
3626     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3627       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3628       <files>
3629         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3630         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3631       </files>
3632     </component>
3633     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3634       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3635       <files>
3636         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3637         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3638       </files>
3639     </component>
3640     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3641       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3642       <files>
3643         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3644         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3645       </files>
3646     </component>
3647     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3648       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3649       <files>
3650         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3651         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3652       </files>
3653     </component>
3654     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3655       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3656       <files>
3657         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3658         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3659       </files>
3660     </component>
3661     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3662       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3663       <files>
3664         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3665         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3666       </files>
3667     </component>
3668     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3669       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3670       <files>
3671         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3672         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3673         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3674         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3675       </files>
3676     </component>
3677     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3678       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3679       <files>
3680         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3681         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3682       </files>
3683     </component>
3684     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3685       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3686       <files>
3687         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3688         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3689       </files>
3690     </component>
3691     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3692       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3693       <files>
3694         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3695         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3696       </files>
3697     </component>
3698     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3699       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3700       <files>
3701         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3702         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3703       </files>
3704     </component>
3705     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3706       <description>Access to #include Driver_WiFi.h file</description>
3707       <files>
3708         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3709         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3710       </files>
3711     </component>
3712   </components>
3713
3714   <boards>
3715     <board name="uVision Simulator" vendor="Keil">
3716       <description>uVision Simulator</description>
3717       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3718       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3719       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3720       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3721       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3722       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3723       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3724       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3725       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3726       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3727       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3728       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3729       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3730       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3731       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3732       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3733       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3734       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3735       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3736       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3737       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3738       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3739       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3740       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3741     </board>
3742
3743     <board name="EWARM Simulator" vendor="IAR">
3744       <description>EWARM Simulator</description>
3745       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3746       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3747       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3748       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3749       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3750       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3751       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3752       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3753       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3754       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3755       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3756       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3757       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3758       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3759       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3760       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3761       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3762       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3763       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3764       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3765       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3766       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3767       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3768       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3769     </board>
3770   </boards>
3771
3772   <examples>
3773     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3774       <description>DSP_Lib Class Marks example</description>
3775       <board name="uVision Simulator" vendor="Keil"/>
3776       <project>
3777         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3778       </project>
3779       <attributes>
3780         <component Cclass="CMSIS" Cgroup="CORE"/>
3781         <component Cclass="CMSIS" Cgroup="DSP"/>
3782         <component Cclass="Device" Cgroup="Startup"/>
3783         <category>Getting Started</category>
3784       </attributes>
3785     </example>
3786
3787     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3788       <description>DSP_Lib Convolution example</description>
3789       <board name="uVision Simulator" vendor="Keil"/>
3790       <project>
3791         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3792       </project>
3793       <attributes>
3794         <component Cclass="CMSIS" Cgroup="CORE"/>
3795         <component Cclass="CMSIS" Cgroup="DSP"/>
3796         <component Cclass="Device" Cgroup="Startup"/>
3797         <category>Getting Started</category>
3798       </attributes>
3799     </example>
3800
3801     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3802       <description>DSP_Lib Dotproduct example</description>
3803       <board name="uVision Simulator" vendor="Keil"/>
3804       <project>
3805         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3806       </project>
3807       <attributes>
3808         <component Cclass="CMSIS" Cgroup="CORE"/>
3809         <component Cclass="CMSIS" Cgroup="DSP"/>
3810         <component Cclass="Device" Cgroup="Startup"/>
3811         <category>Getting Started</category>
3812       </attributes>
3813     </example>
3814
3815     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3816       <description>DSP_Lib FFT Bin example</description>
3817       <board name="uVision Simulator" vendor="Keil"/>
3818       <project>
3819         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3820       </project>
3821       <attributes>
3822         <component Cclass="CMSIS" Cgroup="CORE"/>
3823         <component Cclass="CMSIS" Cgroup="DSP"/>
3824         <component Cclass="Device" Cgroup="Startup"/>
3825         <category>Getting Started</category>
3826       </attributes>
3827     </example>
3828
3829     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3830       <description>DSP_Lib FIR example</description>
3831       <board name="uVision Simulator" vendor="Keil"/>
3832       <project>
3833         <environment name="uv" load="arm_fir_example.uvprojx"/>
3834       </project>
3835       <attributes>
3836         <component Cclass="CMSIS" Cgroup="CORE"/>
3837         <component Cclass="CMSIS" Cgroup="DSP"/>
3838         <component Cclass="Device" Cgroup="Startup"/>
3839         <category>Getting Started</category>
3840       </attributes>
3841     </example>
3842
3843     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3844       <description>DSP_Lib Graphic Equalizer example</description>
3845       <board name="uVision Simulator" vendor="Keil"/>
3846       <project>
3847         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3848       </project>
3849       <attributes>
3850         <component Cclass="CMSIS" Cgroup="CORE"/>
3851         <component Cclass="CMSIS" Cgroup="DSP"/>
3852         <component Cclass="Device" Cgroup="Startup"/>
3853         <category>Getting Started</category>
3854       </attributes>
3855     </example>
3856
3857     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3858       <description>DSP_Lib Linear Interpolation example</description>
3859       <board name="uVision Simulator" vendor="Keil"/>
3860       <project>
3861         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3862       </project>
3863       <attributes>
3864         <component Cclass="CMSIS" Cgroup="CORE"/>
3865         <component Cclass="CMSIS" Cgroup="DSP"/>
3866         <component Cclass="Device" Cgroup="Startup"/>
3867         <category>Getting Started</category>
3868       </attributes>
3869     </example>
3870
3871     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3872       <description>DSP_Lib Matrix example</description>
3873       <board name="uVision Simulator" vendor="Keil"/>
3874       <project>
3875         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3876       </project>
3877       <attributes>
3878         <component Cclass="CMSIS" Cgroup="CORE"/>
3879         <component Cclass="CMSIS" Cgroup="DSP"/>
3880         <component Cclass="Device" Cgroup="Startup"/>
3881         <category>Getting Started</category>
3882       </attributes>
3883     </example>
3884
3885     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3886       <description>DSP_Lib Signal Convergence example</description>
3887       <board name="uVision Simulator" vendor="Keil"/>
3888       <project>
3889         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3890       </project>
3891       <attributes>
3892         <component Cclass="CMSIS" Cgroup="CORE"/>
3893         <component Cclass="CMSIS" Cgroup="DSP"/>
3894         <component Cclass="Device" Cgroup="Startup"/>
3895         <category>Getting Started</category>
3896       </attributes>
3897     </example>
3898
3899     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3900       <description>DSP_Lib Sinus/Cosinus example</description>
3901       <board name="uVision Simulator" vendor="Keil"/>
3902       <project>
3903         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3904       </project>
3905       <attributes>
3906         <component Cclass="CMSIS" Cgroup="CORE"/>
3907         <component Cclass="CMSIS" Cgroup="DSP"/>
3908         <component Cclass="Device" Cgroup="Startup"/>
3909         <category>Getting Started</category>
3910       </attributes>
3911     </example>
3912
3913     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3914       <description>DSP_Lib Variance example</description>
3915       <board name="uVision Simulator" vendor="Keil"/>
3916       <project>
3917         <environment name="uv" load="arm_variance_example.uvprojx"/>
3918       </project>
3919       <attributes>
3920         <component Cclass="CMSIS" Cgroup="CORE"/>
3921         <component Cclass="CMSIS" Cgroup="DSP"/>
3922         <component Cclass="Device" Cgroup="Startup"/>
3923         <category>Getting Started</category>
3924       </attributes>
3925     </example>
3926
3927     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3928       <description>Neural Network CIFAR10 example</description>
3929       <board name="uVision Simulator" vendor="Keil"/>
3930       <project>
3931         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3932       </project>
3933       <attributes>
3934         <component Cclass="CMSIS" Cgroup="CORE"/>
3935         <component Cclass="CMSIS" Cgroup="DSP"/>
3936         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3937         <component Cclass="Device" Cgroup="Startup"/>
3938         <category>Getting Started</category>
3939       </attributes>
3940     </example>
3941
3942     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
3943       <description>Neural Network CIFAR10 example</description>
3944       <board name="EWARM Simulator" vendor="IAR"/>
3945       <project>
3946         <environment name="iar" load="NN-example-cifar10.ewp"/>
3947       </project>
3948       <attributes>
3949         <component Cclass="CMSIS" Cgroup="CORE"/>
3950         <component Cclass="CMSIS" Cgroup="DSP"/>
3951         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3952         <component Cclass="Device" Cgroup="Startup"/>
3953         <category>Getting Started</category>
3954       </attributes>
3955     </example>
3956
3957     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
3958       <description>Neural Network GRU example</description>
3959       <board name="uVision Simulator" vendor="Keil"/>
3960       <project>
3961         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3962       </project>
3963       <attributes>
3964         <component Cclass="CMSIS" Cgroup="CORE"/>
3965         <component Cclass="CMSIS" Cgroup="DSP"/>
3966         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3967         <component Cclass="Device" Cgroup="Startup"/>
3968         <category>Getting Started</category>
3969       </attributes>
3970     </example>
3971
3972     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
3973       <description>Neural Network GRU example</description>
3974       <board name="EWARM Simulator" vendor="IAR"/>
3975       <project>
3976         <environment name="iar" load="NN-example-gru.ewp"/>
3977       </project>
3978       <attributes>
3979         <component Cclass="CMSIS" Cgroup="CORE"/>
3980         <component Cclass="CMSIS" Cgroup="DSP"/>
3981         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3982         <component Cclass="Device" Cgroup="Startup"/>
3983         <category>Getting Started</category>
3984       </attributes>
3985     </example>
3986
3987     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3988       <description>CMSIS-RTOS2 Blinky example</description>
3989       <board name="uVision Simulator" vendor="Keil"/>
3990       <project>
3991         <environment name="uv" load="Blinky.uvprojx"/>
3992       </project>
3993       <attributes>
3994         <component Cclass="CMSIS" Cgroup="CORE"/>
3995         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3996         <component Cclass="Device" Cgroup="Startup"/>
3997         <category>Getting Started</category>
3998       </attributes>
3999     </example>
4000
4001     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4002       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4003       <board name="uVision Simulator" vendor="Keil"/>
4004       <project>
4005         <environment name="uv" load="Blinky.uvprojx"/>
4006       </project>
4007       <attributes>
4008         <component Cclass="CMSIS" Cgroup="CORE"/>
4009         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4010         <component Cclass="Device" Cgroup="Startup"/>
4011         <category>Getting Started</category>
4012       </attributes>
4013     </example>
4014
4015     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4016       <description>CMSIS-RTOS2 Message Queue Example</description>
4017       <board name="uVision Simulator" vendor="Keil"/>
4018       <project>
4019         <environment name="uv" load="MsqQueue.uvprojx"/>
4020       </project>
4021       <attributes>
4022         <component Cclass="CMSIS" Cgroup="CORE"/>
4023         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4024         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4025         <component Cclass="Device" Cgroup="Startup"/>
4026         <category>Getting Started</category>
4027       </attributes>
4028     </example>
4029
4030     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4031       <description>CMSIS-RTOS2 Memory Pool Example</description>
4032       <board name="uVision Simulator" vendor="Keil"/>
4033       <project>
4034         <environment name="uv" load="MemPool.uvprojx"/>
4035       </project>
4036       <attributes>
4037         <component Cclass="CMSIS" Cgroup="CORE"/>
4038         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4039         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4040         <component Cclass="Device" Cgroup="Startup"/>
4041         <category>Getting Started</category>
4042       </attributes>
4043     </example>
4044
4045     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4046       <description>Bare-metal secure/non-secure example without RTOS</description>
4047       <board name="uVision Simulator" vendor="Keil"/>
4048       <project>
4049         <environment name="uv" load="NoRTOS.uvmpw"/>
4050       </project>
4051       <attributes>
4052         <component Cclass="CMSIS" Cgroup="CORE"/>
4053         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4054         <component Cclass="Device" Cgroup="Startup"/>
4055         <category>Getting Started</category>
4056       </attributes>
4057     </example>
4058
4059     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4060       <description>Secure/non-secure RTOS example with thread context management</description>
4061       <board name="uVision Simulator" vendor="Keil"/>
4062       <project>
4063         <environment name="uv" load="RTOS.uvmpw"/>
4064       </project>
4065       <attributes>
4066         <component Cclass="CMSIS" Cgroup="CORE"/>
4067         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4068         <component Cclass="Device" Cgroup="Startup"/>
4069         <category>Getting Started</category>
4070       </attributes>
4071     </example>
4072
4073     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4074       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4075       <board name="uVision Simulator" vendor="Keil"/>
4076       <project>
4077         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4078       </project>
4079       <attributes>
4080         <component Cclass="CMSIS" Cgroup="CORE"/>
4081         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4082         <component Cclass="Device" Cgroup="Startup"/>
4083         <category>Getting Started</category>
4084       </attributes>
4085     </example>
4086
4087   </examples>
4088
4089 </package>