begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.7.0-dev4">
  12       Active development...
  13       CMSIS-DSP: 1.8.0 (see revision history for details)
  14         - Added new functions and function groups
  15         - Added MVE support
  16     </release>
  17     <release version="5.7.0-dev3">
  18       CMSIS-Core(M):
  19         - L1 Cache functions for Armv7-M and later
  20       Devices:
  21         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  22     </release>
  23     <release version="5.7.0-dev2">
  24       CMSIS-Core(M):
  25         - Cortex-M55 cpu support
  26         - Cortex-M55 core header file
  27         - PMU header file (place holder)
  28       Devices:
  29         - ARMCM55 device
  30     </release>
  31     <release version="5.7.0-dev1">
  32       Active development...
  33       CMSIS-Core(M): 5.4.0 (see revision history for details)
  34          - Enhanced MVE support for Armv8.1-MML
  35       CMSIS-RTOS2:
  36         - RTX 5.5.2 (see revision history for details)
  37       CMSIS-Driver: 2.8.0
  38         - removed volatile from status related typedefs in APIs
  39         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  40       CMSIS-Pack:
  41         - added custom attribute to components that require custom implementation
  42       Devices:
  43         - ARMv81MML startup code recognizing __MVE_USED macro
  44         - Refactored vector table references for all Cortex-M devices
  45     </release>
  46     <release version="5.6.0" date="2019-07-10">
  47       CMSIS-Core(M): 5.3.0 (see revision history for details)
  48         - Added provisions for compiler-independent C startup code.
  49       CMSIS-Core(A): 1.1.4 (see revision history for details)
  50         - Fixed __FPU_Enable.
  51       CMSIS-DSP: 1.7.0 (see revision history for details)
  52         - New Neon versions of f32 functions
  53         - Python wrapper
  54         - Preliminary cmake build
  55         - Compilation flags for FFTs
  56         - Changes to arm_math.h
  57       CMSIS-NN: 1.2.0 (see revision history for details)
  58         - New function for depthwise convolution with asymmetric quantization.
  59         - New support functions for requantization.
  60       CMSIS-RTOS:
  61         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  62       CMSIS-RTOS2:
  63         - RTX 5.5.1 (see revision history for details)
  64       CMSIS-Driver: 2.7.1
  65         - WiFi Interface API 1.0.0
  66       Devices:
  67         - Generalized C startup code for all Cortex-M familiy devices.
  68         - Updated Cortex-A default memory regions and MMU configurations
  69         - Moved Cortex-A memory and system config files to avoid include path issues
  70     </release>
  71     <release version="5.5.1" date="2019-03-20">
  72       The following folders are deprecated
  73         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  74
  75       CMSIS-Core(M): 5.2.1 (see revision history for details)
  76         - Fixed compilation issue in cmsis_armclang_ltm.h
  77     </release>
  78     <release version="5.5.0" date="2019-03-18">
  79       The following folders have been removed:
  80         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  81         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  82       The following folders are deprecated
  83         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  84
  85       CMSIS-Core(M): 5.2.0 (see revision history for details)
  86         - Reworked Stack/Heap configuration for ARM startup files.
  87         - Added Cortex-M35P device support.
  88         - Added generic Armv8.1-M Mainline device support.
  89       CMSIS-Core(A): 1.1.3 (see revision history for details)
  90       CMSIS-DSP: 1.6.0 (see revision history for details)
  91         - reworked DSP library source files
  92         - reworked DSP library documentation
  93         - Changed DSP folder structure
  94         - moved DSP libraries to folder ./DSP/Lib
  95         - ARM DSP Libraries are built with ARMCLANG
  96         - Added DSP Libraries Source variant
  97       CMSIS-RTOS2:
  98         - RTX 5.5.0 (see revision history for details)
  99       CMSIS-Driver: 2.7.0
 100         - Added WiFi Interface API 1.0.0-beta
 101         - Added components for project specific driver implementations
 102       CMSIS-Pack: 1.6.0 (see revision history for details)
 103       Devices:
 104         - Added Cortex-M35P and ARMv81MML device templates.
 105         - Fixed C-Startup Code for GCC (aligned with other compilers)
 106       Utilities:
 107         - SVDConv 3.3.25
 108         - PackChk 1.3.82
 109     </release>
 110     <release version="5.4.0" date="2018-08-01">
 111       Aligned pack structure with repository.
 112       The following folders are deprecated:
 113         - CMSIS/Include/
 114         - CMSIS/DSP_Lib/
 115
 116       CMSIS-Core(M): 5.1.2 (see revision history for details)
 117         - Added Cortex-M1 support (beta).
 118       CMSIS-Core(A): 1.1.2 (see revision history for details)
 119       CMSIS-NN: 1.1.0
 120         - Added new math functions.
 121       CMSIS-RTOS2:
 122         - API 2.1.3 (see revision history for details)
 123         - RTX 5.4.0 (see revision history for details)
 124           * Updated exception handling on Cortex-A
 125       CMSIS-Driver:
 126         - Flash Driver API V2.2.0
 127       Utilities:
 128         - SVDConv 3.3.21
 129         - PackChk 1.3.71
 130     </release>
 131     <release version="5.3.0" date="2018-02-22">
 132       Updated Arm company brand.
 133       CMSIS-Core(M): 5.1.1 (see revision history for details)
 134       CMSIS-Core(A): 1.1.1 (see revision history for details)
 135       CMSIS-DAP: 2.0.0 (see revision history for details)
 136       CMSIS-NN: 1.0.0
 137         - Initial contribution of the bare metal Neural Network Library.
 138       CMSIS-RTOS2:
 139         - RTX 5.3.0 (see revision history for details)
 140         - OS Tick API 1.0.1
 141     </release>
 142     <release version="5.2.0" date="2017-11-16">
 143       CMSIS-Core(M): 5.1.0 (see revision history for details)
 144         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 145         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 146       CMSIS-Core(A): 1.1.0 (see revision history for details)
 147         - Added compiler_iccarm.h.
 148         - Added additional access functions for physical timer.
 149       CMSIS-DAP: 1.2.0 (see revision history for details)
 150       CMSIS-DSP: 1.5.2 (see revision history for details)
 151       CMSIS-Driver: 2.6.0 (see revision history for details)
 152         - CAN Driver API V1.2.0
 153         - NAND Driver API V2.3.0
 154       CMSIS-RTOS:
 155         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 156       CMSIS-RTOS2:
 157         - API 2.1.2 (see revision history for details)
 158         - RTX 5.2.3 (see revision history for details)
 159       Devices:
 160         - Added GCC startup and linker script for Cortex-A9.
 161         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 162         - Added IAR startup code for Cortex-A9
 163     </release>
 164     <release version="5.1.1" date="2017-09-19">
 165       CMSIS-RTOS2:
 166       - RTX 5.2.1 (see revision history for details)
 167     </release>
 168     <release version="5.1.0" date="2017-08-04">
 169       CMSIS-Core(M): 5.0.2 (see revision history for details)
 170       - Changed Version Control macros to be core agnostic.
 171       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 172       CMSIS-Core(A): 1.0.0 (see revision history for details)
 173       - Initial release
 174       - IRQ Controller API 1.0.0
 175       CMSIS-Driver: 2.05 (see revision history for details)
 176       - All typedefs related to status have been made volatile.
 177       CMSIS-RTOS2:
 178       - API 2.1.1 (see revision history for details)
 179       - RTX 5.2.0 (see revision history for details)
 180       - OS Tick API 1.0.0
 181       CMSIS-DSP: 1.5.2 (see revision history for details)
 182       - Fixed GNU Compiler specific diagnostics.
 183       CMSIS-Pack: 1.5.0 (see revision history for details)
 184       - added System Description File (*.SDF) Format
 185       CMSIS-Zone: 0.0.1 (Preview)
 186       - Initial specification draft
 187     </release>
 188     <release version="5.0.1" date="2017-02-03">
 189       Package Description:
 190       - added taxonomy for Cclass RTOS
 191       CMSIS-RTOS2:
 192       - API 2.1   (see revision history for details)
 193       - RTX 5.1.0 (see revision history for details)
 194       CMSIS-Core: 5.0.1 (see revision history for details)
 195       - Added __PACKED_STRUCT macro
 196       - Added uVisior support
 197       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 198       - Updated template for secure main function (main_s.c)
 199       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 200       CMSIS-DSP: 1.5.1 (see revision history for details)
 201       - added ARMv8M DSP libraries.
 202       CMSIS-Pack:1.4.9 (see revision history for details)
 203       - added Pack Index File specification and schema file
 204     </release>
 205     <release version="5.0.0" date="2016-11-11">
 206       Changed open source license to Apache 2.0
 207       CMSIS_Core:
 208        - Added support for Cortex-M23 and Cortex-M33.
 209        - Added ARMv8-M device configurations for mainline and baseline.
 210        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 211        - Added cmsis_compiler.h to unify compiler behaviour.
 212        - Updated function SCB_EnableICache (for Cortex-M7).
 213        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 214       CMSIS-RTOS:
 215         - bug fix in RTX 4.82 (see revision history for details)
 216       CMSIS-RTOS2:
 217         - new API including compatibility layer to CMSIS-RTOS
 218         - reference implementation based on RTX5
 219         - supports all Cortex-M variants including TrustZone for ARMv8-M
 220       CMSIS-SVD:
 221        - reworked SVD format documentation
 222        - removed SVD file database documentation as SVD files are distributed in packs
 223        - updated SVDConv for Win32 and Linux
 224       CMSIS-DSP:
 225        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 226        - Added DSP libraries build projects to CMSIS pack.
 227     </release>
 228     <release version="4.5.0" date="2015-10-28">
 229       - CMSIS-Core     4.30.0  (see revision history for details)
 230       - CMSIS-DAP      1.1.0   (unchanged)
 231       - CMSIS-Driver   2.04.0  (see revision history for details)
 232       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 233       - CMSIS-Pack     1.4.1   (see revision history for details)
 234       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 235       - CMSIS-SVD      1.3.1   (see revision history for details)
 236     </release>
 237     <release version="4.4.0" date="2015-09-11">
 238       - CMSIS-Core     4.20   (see revision history for details)
 239       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 240       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 241       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 242       - CMSIS-RTOS
 243         -- API         1.02   (unchanged)
 244         -- RTX         4.79   (see revision history for details)
 245       - CMSIS-SVD      1.3.0  (see revision history for details)
 246       - CMSIS-DAP      1.1.0  (extended with SWO support)
 247     </release>
 248     <release version="4.3.0" date="2015-03-20">
 249       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 250       - CMSIS-DSP      1.4.5  (see revision history for details)
 251       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 252       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 253       - CMSIS-RTOS
 254         -- API         1.02   (unchanged)
 255         -- RTX         4.78   (see revision history for details)
 256       - CMSIS-SVD      1.2    (unchanged)
 257     </release>
 258     <release version="4.2.0" date="2014-09-24">
 259       Adding Cortex-M7 support
 260       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 261       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 262       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 263       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 264       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 265     </release>
 266     <release version="4.1.1" date="2014-06-30">
 267       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 268     </release>
 269     <release version="4.1.0" date="2014-06-12">
 270       - CMSIS-Driver   2.02  (incompatible update)
 271       - CMSIS-Pack     1.3   (see revision history for details)
 272       - CMSIS-DSP      1.4.2 (unchanged)
 273       - CMSIS-Core     3.30  (unchanged)
 274       - CMSIS-RTOS RTX 4.74  (unchanged)
 275       - CMSIS-RTOS API 1.02  (unchanged)
 276       - CMSIS-SVD      1.10  (unchanged)
 277       PACK:
 278       - removed G++ specific files from PACK
 279       - added Component Startup variant "C Startup"
 280       - added Pack Checking Utility
 281       - updated conditions to reflect tool-chain dependency
 282       - added Taxonomy for Graphics
 283       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 284     </release>
 285     <!-- release version="4.0.0">
 286       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 287       - CMSIS-Pack     1.1   Preliminary
 288       - CMSIS-DSP      1.4.2 (see revision history for details)
 289       - CMSIS-Core     3.30  (see revision history for details)
 290       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 291       - CMSIS-RTOS API 1.02  (unchanged)
 292       - CMSIS-SVD      1.10  (unchanged)
 293     </release -->
 294     <release version="3.20.4" date="2014-02-20">
 295       - CMSIS-RTOS 4.74 (see revision history for details)
 296       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 297     </release>
 298     <!-- release version="3.20.3">
 299       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 300       - CMSIS-RTOS 4.73 (see revision history for details)
 301     </release -->
 302     <!-- release version="3.20.2">
 303       - CMSIS-Pack documentation has been added
 304       - CMSIS-Drivers header and documentation have been added to PACK
 305       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 306     </release -->
 307     <!-- release version="3.20.1">
 308       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 309       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 310     </release -->
 311     <!-- release version="3.20.0">
 312       The software portions that are deployed in the application program are now under a BSD license which allows usage
 313       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 314       The individual components have been update as listed below:
 315       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 316       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 317       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 318       - CMSIS-SVD is unchanged.
 319     </release -->
 320   </releases>
 321
 322   <taxonomy>
 323     <description Cclass="Audio">Software components for audio processing</description>
 324     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 325     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 326     <description Cclass="Compiler">Compiler Software Extensions</description>
 327     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 328     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 329     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 330     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 331     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 332     <description Cclass="File System">File Drive Support and File System</description>
 333     <description Cclass="IoT Client">IoT cloud client connector</description>
 334     <description Cclass="IoT Service">IoT specific services</description>
 335     <description Cclass="IoT Utility">IoT specific software utility</description>
 336     <description Cclass="Graphics">Graphical User Interface</description>
 337     <description Cclass="Network">Network Stack using Internet Protocols</description>
 338     <description Cclass="RTOS">Real-time Operating System</description>
 339     <description Cclass="Security">Encryption for secure communication or storage</description>
 340     <description Cclass="USB">Universal Serial Bus Stack</description>
 341     <description Cclass="Utility">Generic software utility components</description>
 342   </taxonomy>
 343
 344   <devices>
 345     <!-- ******************************  Cortex-M0  ****************************** -->
 346     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 347       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 348       <description>
 349 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 350 - simple, easy-to-use programmers model
 351 - highly efficient ultra-low power operation
 352 - excellent code density
 353 - deterministic, high-performance interrupt handling
 354 - upward compatibility with the rest of the Cortex-M processor family.
 355       </description>
 356       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 357       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 358       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 359       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 360
 361       <device Dname="ARMCM0">
 362         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 363         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 364       </device>
 365     </family>
 366
 367     <!-- ******************************  Cortex-M0P  ****************************** -->
 368     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 369       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 370       <description>
 371 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 372 - simple, easy-to-use programmers model
 373 - highly efficient ultra-low power operation
 374 - excellent code density
 375 - deterministic, high-performance interrupt handling
 376 - upward compatibility with the rest of the Cortex-M processor family.
 377       </description>
 378       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 379       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 380       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 381       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 382
 383       <device Dname="ARMCM0P">
 384         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 385         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 386       </device>
 387
 388       <device Dname="ARMCM0P_MPU">
 389         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 390         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 391       </device>
 392     </family>
 393
 394     <!-- ******************************  Cortex-M1  ****************************** -->
 395     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 396       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 397       <description>
 398 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 399 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 400       </description>
 401       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 402       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 403       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 404       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 405
 406       <device Dname="ARMCM1">
 407         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 408         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 409       </device>
 410     </family>
 411
 412     <!-- ******************************  Cortex-M3  ****************************** -->
 413     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 414       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 415       <description>
 416 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 417 - simple, easy-to-use programmers model
 418 - highly efficient ultra-low power operation
 419 - excellent code density
 420 - deterministic, high-performance interrupt handling
 421 - upward compatibility with the rest of the Cortex-M processor family.
 422       </description>
 423       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 424       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 425       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 426       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 427
 428       <device Dname="ARMCM3">
 429         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 430         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 431       </device>
 432     </family>
 433
 434     <!-- ******************************  Cortex-M4  ****************************** -->
 435     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 436       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 437       <description>
 438 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 439 - simple, easy-to-use programmers model
 440 - highly efficient ultra-low power operation
 441 - excellent code density
 442 - deterministic, high-performance interrupt handling
 443 - upward compatibility with the rest of the Cortex-M processor family.
 444       </description>
 445       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 446       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 447       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 448       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 449
 450       <device Dname="ARMCM4">
 451         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 452         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 453       </device>
 454
 455       <device Dname="ARMCM4_FP">
 456         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 457         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 458       </device>
 459     </family>
 460
 461     <!-- ******************************  Cortex-M7  ****************************** -->
 462     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 463       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 464       <description>
 465 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 466 - simple, easy-to-use programmers model
 467 - highly efficient ultra-low power operation
 468 - excellent code density
 469 - deterministic, high-performance interrupt handling
 470 - upward compatibility with the rest of the Cortex-M processor family.
 471       </description>
 472       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 473       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 474       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 475       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 476
 477       <device Dname="ARMCM7">
 478         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 479         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 480       </device>
 481
 482       <device Dname="ARMCM7_SP">
 483         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 484         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 485       </device>
 486
 487       <device Dname="ARMCM7_DP">
 488         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 489         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 490       </device>
 491     </family>
 492
 493     <!-- ******************************  Cortex-M23  ********************** -->
 494     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 495       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 496       <description>
 497 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 498 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 499 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 500       </description>
 501       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 502       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 503       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 504       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 505       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 506       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 507
 508       <device Dname="ARMCM23">
 509         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 510         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 511       </device>
 512
 513       <device Dname="ARMCM23_TZ">
 514         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 515         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 516       </device>
 517     </family>
 518
 519     <!-- ******************************  Cortex-M33  ****************************** -->
 520     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 521       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 522       <description>
 523 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 524 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 525       </description>
 526       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 527       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 528       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 529       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 530       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 531       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 532
 533       <device Dname="ARMCM33">
 534         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 535         <description>
 536           no DSP Instructions, no Floating Point Unit, no TrustZone
 537         </description>
 538         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 539       </device>
 540
 541       <device Dname="ARMCM33_TZ">
 542         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 543         <description>
 544           no DSP Instructions, no Floating Point Unit, TrustZone
 545         </description>
 546         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 547       </device>
 548
 549       <device Dname="ARMCM33_DSP_FP">
 550         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 551         <description>
 552           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 553         </description>
 554         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 555       </device>
 556
 557       <device Dname="ARMCM33_DSP_FP_TZ">
 558         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 559         <description>
 560           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 561         </description>
 562         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 563       </device>
 564     </family>
 565
 566     <!-- ******************************  Cortex-M35P  ****************************** -->
 567     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 568       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 569       <description>
 570 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 571 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 572       </description>
 573
 574       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 575       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 576       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 577       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 578       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 579       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 580
 581       <device Dname="ARMCM35P">
 582         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 583         <description>
 584           no DSP Instructions, no Floating Point Unit, no TrustZone
 585         </description>
 586         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 587       </device>
 588
 589       <device Dname="ARMCM35P_TZ">
 590         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 591         <description>
 592           no DSP Instructions, no Floating Point Unit, TrustZone
 593         </description>
 594         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 595       </device>
 596
 597       <device Dname="ARMCM35P_DSP_FP">
 598         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 599         <description>
 600           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 601         </description>
 602         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 603       </device>
 604
 605       <device Dname="ARMCM35P_DSP_FP_TZ">
 606         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 607         <description>
 608           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 609         </description>
 610         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 611       </device>
 612     </family>
 613
 614     <!-- ******************************  Cortex-M55  ****************************** -->
 615     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 616       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 617       <description>
 618 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 619 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 620 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 621       </description>
 622
 623       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 624       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 625       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 626       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 627       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 628       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 629
 630       <device Dname="ARMCM55">
 631         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 632         <description>
 633           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 634         </description>
 635         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 636       </device>
 637     </family>
 638
 639     <!-- ******************************  ARMSC000  ****************************** -->
 640     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 641       <description>
 642 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 643 - simple, easy-to-use programmers model
 644 - highly efficient ultra-low power operation
 645 - excellent code density
 646 - deterministic, high-performance interrupt handling
 647       </description>
 648       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 649       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 650       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 651       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 652
 653       <device Dname="ARMSC000">
 654         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 655         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 656       </device>
 657     </family>
 658
 659     <!-- ******************************  ARMSC300  ****************************** -->
 660     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 661       <description>
 662 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 663 - simple, easy-to-use programmers model
 664 - highly efficient ultra-low power operation
 665 - excellent code density
 666 - deterministic, high-performance interrupt handling
 667       </description>
 668       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 669       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 670       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 671       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 672
 673       <device Dname="ARMSC300">
 674         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 675         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 676       </device>
 677     </family>
 678
 679     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 680     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 681       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 682       <description>
 683 Armv8-M Baseline based device with TrustZone
 684       </description>
 685       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 686       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 687       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 688       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 689       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 690       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 691
 692       <device Dname="ARMv8MBL">
 693         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 694         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 695       </device>
 696     </family>
 697
 698     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 699     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 700       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 701       <description>
 702 Armv8-M Mainline based device with TrustZone
 703       </description>
 704       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 705       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 706       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 707       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 708       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 709       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 710
 711       <device Dname="ARMv8MML">
 712         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 713         <description>
 714           no DSP Instructions, no Floating Point Unit, TrustZone
 715         </description>
 716         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 717       </device>
 718
 719       <device Dname="ARMv8MML_DSP">
 720         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 721         <description>
 722           DSP Instructions, no Floating Point Unit, TrustZone
 723         </description>
 724         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 725       </device>
 726
 727       <device Dname="ARMv8MML_SP">
 728         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 729         <description>
 730           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 731         </description>
 732         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 733       </device>
 734
 735       <device Dname="ARMv8MML_DSP_SP">
 736         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 737         <description>
 738           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 739         </description>
 740         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 741       </device>
 742
 743       <device Dname="ARMv8MML_DP">
 744         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 745         <description>
 746           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 747         </description>
 748         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 749       </device>
 750
 751       <device Dname="ARMv8MML_DSP_DP">
 752         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 753         <description>
 754           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 755         </description>
 756         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 757       </device>
 758     </family>
 759
 760     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 761     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 762       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 763       <description>
 764 Armv8.1-M Mainline based device with TrustZone and MVE
 765       </description>
 766       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 767       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 768       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 769       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 770       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 771       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 772
 773
 774       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 775         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 776         <description>
 777           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 778         </description>
 779         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 780       </device>
 781     </family>
 782
 783     <!-- ******************************  Cortex-A5  ****************************** -->
 784     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 785       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 786       <description>
 787 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 788 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 789 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 790       </description>
 791
 792       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 793       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 794       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 795       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 796
 797       <device Dname="ARMCA5">
 798         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 799         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 800       </device>
 801     </family>
 802
 803     <!-- ******************************  Cortex-A7  ****************************** -->
 804     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 805       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 806       <description>
 807 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 808 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 809 an optional integrated GIC, and an optional L2 cache controller.
 810       </description>
 811
 812       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 813       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 814       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 815       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 816
 817       <device Dname="ARMCA7">
 818         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 819         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 820       </device>
 821     </family>
 822
 823     <!-- ******************************  Cortex-A9  ****************************** -->
 824     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 825       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 826       <description>
 827 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 828 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 829 and 8-bit Java bytecodes in Jazelle state.
 830       </description>
 831
 832       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 833       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 834       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 835       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 836
 837       <device Dname="ARMCA9">
 838         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 839         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 840       </device>
 841     </family>
 842   </devices>
 843
 844
 845   <apis>
 846     <!-- CMSIS Device API -->
 847     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 848       <description>Device interrupt controller interface</description>
 849       <files>
 850         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 851       </files>
 852     </api>
 853     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 854       <description>RTOS Kernel system tick timer interface</description>
 855       <files>
 856         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 857       </files>
 858     </api>
 859     <!-- CMSIS-RTOS API -->
 860     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 861       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 862       <files>
 863         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 864       </files>
 865     </api>
 866     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 867       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 868       <files>
 869         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 870         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 871       </files>
 872     </api>
 873     <!-- CMSIS Driver API -->
 874     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 875       <description>USART Driver API for Cortex-M</description>
 876       <files>
 877         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 878         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 879       </files>
 880     </api>
 881     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 882       <description>SPI Driver API for Cortex-M</description>
 883       <files>
 884         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 885         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 886       </files>
 887     </api>
 888     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 889       <description>SAI Driver API for Cortex-M</description>
 890       <files>
 891         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 892         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 893       </files>
 894     </api>
 895     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 896       <description>I2C Driver API for Cortex-M</description>
 897       <files>
 898         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 899         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 900       </files>
 901     </api>
 902     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 903       <description>CAN Driver API for Cortex-M</description>
 904       <files>
 905         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 906         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 907       </files>
 908     </api>
 909     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 910       <description>Flash Driver API for Cortex-M</description>
 911       <files>
 912         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 913         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 914       </files>
 915     </api>
 916     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 917       <description>MCI Driver API for Cortex-M</description>
 918       <files>
 919         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 920         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 921       </files>
 922     </api>
 923     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 924       <description>NAND Flash Driver API for Cortex-M</description>
 925       <files>
 926         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 927         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 928       </files>
 929     </api>
 930     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 931       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 932       <files>
 933         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 934         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 935         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 936       </files>
 937     </api>
 938     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 939       <description>Ethernet MAC Driver API for Cortex-M</description>
 940       <files>
 941         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 942         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 943       </files>
 944     </api>
 945     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 946       <description>Ethernet PHY Driver API for Cortex-M</description>
 947       <files>
 948         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 949         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 950       </files>
 951     </api>
 952     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 953       <description>USB Device Driver API for Cortex-M</description>
 954       <files>
 955         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 956         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 957       </files>
 958     </api>
 959     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
 960       <description>USB Host Driver API for Cortex-M</description>
 961       <files>
 962         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 963         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 964       </files>
 965     </api>
 966     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
 967       <description>WiFi driver</description>
 968       <files>
 969         <file category="doc"  name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 970         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 971       </files>
 972     </api>
 973   </apis>
 974
 975   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 976   <conditions>
 977     <!-- compiler -->
 978     <condition id="ARMCC6">
 979       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 980       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 981     </condition>
 982     <condition id="ARMCC5">
 983       <require Tcompiler="ARMCC" Toptions="AC5"/>
 984     </condition>
 985     <condition id="ARMCC">
 986       <require Tcompiler="ARMCC"/>
 987     </condition>
 988     <condition id="GCC">
 989       <require Tcompiler="GCC"/>
 990     </condition>
 991     <condition id="IAR">
 992       <require Tcompiler="IAR"/>
 993     </condition>
 994     <condition id="ARMCC GCC">
 995       <accept Tcompiler="ARMCC"/>
 996       <accept Tcompiler="GCC"/>
 997     </condition>
 998     <condition id="ARMCC GCC IAR">
 999       <accept Tcompiler="ARMCC"/>
1000       <accept Tcompiler="GCC"/>
1001       <accept Tcompiler="IAR"/>
1002     </condition>
1003
1004     <!-- Arm architecture -->
1005     <condition id="ARMv6-M Device">
1006       <description>Armv6-M architecture based device</description>
1007       <accept Dcore="Cortex-M0"/>
1008       <accept Dcore="Cortex-M1"/>
1009       <accept Dcore="Cortex-M0+"/>
1010       <accept Dcore="SC000"/>
1011     </condition>
1012     <condition id="ARMv7-M Device">
1013       <description>Armv7-M architecture based device</description>
1014       <accept Dcore="Cortex-M3"/>
1015       <accept Dcore="Cortex-M4"/>
1016       <accept Dcore="Cortex-M7"/>
1017       <accept Dcore="SC300"/>
1018     </condition>
1019     <condition id="ARMv8-M Device">
1020       <description>Armv8-M architecture based device</description>
1021       <accept Dcore="ARMV8MBL"/>
1022       <accept Dcore="ARMV8MML"/>
1023       <accept Dcore="ARMV81MML"/>
1024       <accept Dcore="Cortex-M23"/>
1025       <accept Dcore="Cortex-M33"/>
1026       <accept Dcore="Cortex-M35P"/>
1027       <accept Dcore="Cortex-M55"/>
1028     </condition>
1029     <condition id="ARMv8-M TZ Device">
1030       <description>Armv8-M architecture based device with TrustZone</description>
1031       <require condition="ARMv8-M Device"/>
1032       <require Dtz="TZ"/>
1033     </condition>
1034     <condition id="ARMv6_7-M Device">
1035       <description>Armv6_7-M architecture based device</description>
1036       <accept condition="ARMv6-M Device"/>
1037       <accept condition="ARMv7-M Device"/>
1038     </condition>
1039     <condition id="ARMv6_7_8-M Device">
1040       <description>Armv6_7_8-M architecture based device</description>
1041       <accept condition="ARMv6-M Device"/>
1042       <accept condition="ARMv7-M Device"/>
1043       <accept condition="ARMv8-M Device"/>
1044     </condition>
1045     <condition id="ARMv7-A Device">
1046       <description>Armv7-A architecture based device</description>
1047       <accept Dcore="Cortex-A5"/>
1048       <accept Dcore="Cortex-A7"/>
1049       <accept Dcore="Cortex-A9"/>
1050     </condition>
1051
1052     <!-- ARM core -->
1053     <condition id="CM0">
1054       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1055       <accept Dcore="Cortex-M0"/>
1056       <accept Dcore="Cortex-M0+"/>
1057       <accept Dcore="SC000"/>
1058     </condition>
1059     <condition id="CM1">
1060       <description>Cortex-M1</description>
1061       <require Dcore="Cortex-M1"/>
1062     </condition>
1063     <condition id="CM3">
1064       <description>Cortex-M3 or SC300 processor based device</description>
1065       <accept Dcore="Cortex-M3"/>
1066       <accept Dcore="SC300"/>
1067     </condition>
1068     <condition id="CM4">
1069       <description>Cortex-M4 processor based device</description>
1070       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1071     </condition>
1072     <condition id="CM4_FP">
1073       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1074       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1075       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1076       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1077     </condition>
1078     <condition id="CM7">
1079       <description>Cortex-M7 processor based device</description>
1080       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1081     </condition>
1082     <condition id="CM7_FP">
1083       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1084       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1085       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1086     </condition>
1087     <condition id="CM7_SP">
1088       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1089       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1090     </condition>
1091     <condition id="CM7_DP">
1092       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1093       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1094     </condition>
1095     <condition id="CM23">
1096       <description>Cortex-M23 processor based device</description>
1097       <require Dcore="Cortex-M23"/>
1098     </condition>
1099     <condition id="CM33">
1100       <description>Cortex-M33 processor based device</description>
1101       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1102     </condition>
1103     <condition id="CM33_FP">
1104       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1105       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1106     </condition>
1107     <condition id="CM35P">
1108       <description>Cortex-M35P processor based device</description>
1109       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1110     </condition>
1111     <condition id="CM35P_FP">
1112       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1113       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1114     </condition>
1115     <condition id="CM55">
1116       <description>Cortex-M55 processor based device</description>
1117       <require Dcore="Cortex-M55"/>
1118     </condition>
1119     <condition id="ARMv8MBL">
1120       <description>Armv8-M Baseline processor based device</description>
1121       <require Dcore="ARMV8MBL"/>
1122     </condition>
1123     <condition id="ARMv8MML">
1124       <description>Armv8-M Mainline processor based device</description>
1125       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1126     </condition>
1127     <condition id="ARMv8MML_FP">
1128       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1129       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1130       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1131     </condition>
1132
1133     <condition id="CM33_NODSP_NOFPU">
1134       <description>CM33, no DSP, no FPU</description>
1135       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1136     </condition>
1137     <condition id="CM33_DSP_NOFPU">
1138       <description>CM33, DSP, no FPU</description>
1139       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1140     </condition>
1141     <condition id="CM33_NODSP_SP">
1142       <description>CM33, no DSP, SP FPU</description>
1143       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1144     </condition>
1145     <condition id="CM33_DSP_SP">
1146       <description>CM33, DSP, SP FPU</description>
1147       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1148     </condition>
1149
1150     <condition id="CM35P_NODSP_NOFPU">
1151       <description>CM35P, no DSP, no FPU</description>
1152       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1153     </condition>
1154     <condition id="CM35P_DSP_NOFPU">
1155       <description>CM35P, DSP, no FPU</description>
1156       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1157     </condition>
1158     <condition id="CM35P_NODSP_SP">
1159       <description>CM35P, no DSP, SP FPU</description>
1160       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1161     </condition>
1162     <condition id="CM35P_DSP_SP">
1163       <description>CM35P, DSP, SP FPU</description>
1164       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1165     </condition>
1166
1167     <condition id="ARMv8MML_NODSP_NOFPU">
1168       <description>Armv8-M Mainline, no DSP, no FPU</description>
1169       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1170     </condition>
1171     <condition id="ARMv8MML_DSP_NOFPU">
1172       <description>Armv8-M Mainline, DSP, no FPU</description>
1173       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1174     </condition>
1175     <condition id="ARMv8MML_NODSP_SP">
1176       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1177       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1178     </condition>
1179     <condition id="ARMv8MML_DSP_SP">
1180       <description>Armv8-M Mainline, DSP, SP FPU</description>
1181       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1182     </condition>
1183
1184     <condition id="CA5_CA9">
1185       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1186       <accept Dcore="Cortex-A5"/>
1187       <accept Dcore="Cortex-A9"/>
1188     </condition>
1189
1190     <condition id="CA7">
1191       <description>Cortex-A7 processor based device</description>
1192       <accept Dcore="Cortex-A7"/>
1193     </condition>
1194
1195     <!-- ARMCC compiler -->
1196     <condition id="CA_ARMCC5">
1197       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1198       <require condition="ARMv7-A Device"/>
1199       <require condition="ARMCC5"/>
1200     </condition>
1201     <condition id="CA_ARMCC6">
1202       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1203       <require condition="ARMv7-A Device"/>
1204       <require condition="ARMCC6"/>
1205     </condition>
1206
1207     <condition id="CM0_ARMCC">
1208       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1209       <require condition="CM0"/>
1210       <require Tcompiler="ARMCC"/>
1211     </condition>
1212     <condition id="CM0_LE_ARMCC">
1213       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1214       <require condition="CM0_ARMCC"/>
1215       <require Dendian="Little-endian"/>
1216     </condition>
1217     <condition id="CM0_BE_ARMCC">
1218       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1219       <require condition="CM0_ARMCC"/>
1220       <require Dendian="Big-endian"/>
1221     </condition>
1222
1223     <condition id="CM1_ARMCC">
1224       <description>Cortex-M1 based device for the Arm Compiler</description>
1225       <require condition="CM1"/>
1226       <require Tcompiler="ARMCC"/>
1227     </condition>
1228     <condition id="CM1_LE_ARMCC">
1229       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1230       <require condition="CM1_ARMCC"/>
1231       <require Dendian="Little-endian"/>
1232     </condition>
1233     <condition id="CM1_BE_ARMCC">
1234       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1235       <require condition="CM1_ARMCC"/>
1236       <require Dendian="Big-endian"/>
1237     </condition>
1238
1239     <condition id="CM3_ARMCC">
1240       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1241       <require condition="CM3"/>
1242       <require Tcompiler="ARMCC"/>
1243     </condition>
1244     <condition id="CM3_LE_ARMCC">
1245       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1246       <require condition="CM3_ARMCC"/>
1247       <require Dendian="Little-endian"/>
1248     </condition>
1249     <condition id="CM3_BE_ARMCC">
1250       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1251       <require condition="CM3_ARMCC"/>
1252       <require Dendian="Big-endian"/>
1253     </condition>
1254
1255     <condition id="CM4_ARMCC">
1256       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1257       <require condition="CM4"/>
1258       <require Tcompiler="ARMCC"/>
1259     </condition>
1260     <condition id="CM4_LE_ARMCC">
1261       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1262       <require condition="CM4_ARMCC"/>
1263       <require Dendian="Little-endian"/>
1264     </condition>
1265     <condition id="CM4_BE_ARMCC">
1266       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1267       <require condition="CM4_ARMCC"/>
1268       <require Dendian="Big-endian"/>
1269     </condition>
1270
1271     <condition id="CM4_FP_ARMCC">
1272       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1273       <require condition="CM4_FP"/>
1274       <require Tcompiler="ARMCC"/>
1275     </condition>
1276     <condition id="CM4_FP_LE_ARMCC">
1277       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1278       <require condition="CM4_FP_ARMCC"/>
1279       <require Dendian="Little-endian"/>
1280     </condition>
1281     <condition id="CM4_FP_BE_ARMCC">
1282       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1283       <require condition="CM4_FP_ARMCC"/>
1284       <require Dendian="Big-endian"/>
1285     </condition>
1286
1287     <condition id="CM7_ARMCC">
1288       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1289       <require condition="CM7"/>
1290       <require Tcompiler="ARMCC"/>
1291     </condition>
1292     <condition id="CM7_LE_ARMCC">
1293       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1294       <require condition="CM7_ARMCC"/>
1295       <require Dendian="Little-endian"/>
1296     </condition>
1297     <condition id="CM7_BE_ARMCC">
1298       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1299       <require condition="CM7_ARMCC"/>
1300       <require Dendian="Big-endian"/>
1301     </condition>
1302
1303     <condition id="CM7_FP_ARMCC">
1304       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1305       <require condition="CM7_FP"/>
1306       <require Tcompiler="ARMCC"/>
1307     </condition>
1308     <condition id="CM7_FP_LE_ARMCC">
1309       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1310       <require condition="CM7_FP_ARMCC"/>
1311       <require Dendian="Little-endian"/>
1312     </condition>
1313     <condition id="CM7_FP_BE_ARMCC">
1314       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1315       <require condition="CM7_FP_ARMCC"/>
1316       <require Dendian="Big-endian"/>
1317     </condition>
1318
1319     <condition id="CM7_SP_ARMCC">
1320       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1321       <require condition="CM7_SP"/>
1322       <require Tcompiler="ARMCC"/>
1323     </condition>
1324     <condition id="CM7_SP_LE_ARMCC">
1325       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1326       <require condition="CM7_SP_ARMCC"/>
1327       <require Dendian="Little-endian"/>
1328     </condition>
1329     <condition id="CM7_SP_BE_ARMCC">
1330       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1331       <require condition="CM7_SP_ARMCC"/>
1332       <require Dendian="Big-endian"/>
1333     </condition>
1334
1335     <condition id="CM7_DP_ARMCC">
1336       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1337       <require condition="CM7_DP"/>
1338       <require Tcompiler="ARMCC"/>
1339     </condition>
1340     <condition id="CM7_DP_LE_ARMCC">
1341       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1342       <require condition="CM7_DP_ARMCC"/>
1343       <require Dendian="Little-endian"/>
1344     </condition>
1345     <condition id="CM7_DP_BE_ARMCC">
1346       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1347       <require condition="CM7_DP_ARMCC"/>
1348       <require Dendian="Big-endian"/>
1349     </condition>
1350
1351     <condition id="CM23_ARMCC">
1352       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1353       <require condition="CM23"/>
1354       <require Tcompiler="ARMCC"/>
1355     </condition>
1356     <condition id="CM23_LE_ARMCC">
1357       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1358       <require condition="CM23_ARMCC"/>
1359       <require Dendian="Little-endian"/>
1360     </condition>
1361
1362     <condition id="CM33_ARMCC">
1363       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1364       <require condition="CM33"/>
1365       <require Tcompiler="ARMCC"/>
1366     </condition>
1367     <condition id="CM33_LE_ARMCC">
1368       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1369       <require condition="CM33_ARMCC"/>
1370       <require Dendian="Little-endian"/>
1371     </condition>
1372
1373     <condition id="CM33_FP_ARMCC">
1374       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1375       <require condition="CM33_FP"/>
1376       <require Tcompiler="ARMCC"/>
1377     </condition>
1378     <condition id="CM33_FP_LE_ARMCC">
1379       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1380       <require condition="CM33_FP_ARMCC"/>
1381       <require Dendian="Little-endian"/>
1382     </condition>
1383
1384     <condition id="CM33_NODSP_NOFPU_ARMCC">
1385       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1386       <require condition="CM33_NODSP_NOFPU"/>
1387       <require Tcompiler="ARMCC"/>
1388     </condition>
1389     <condition id="CM33_DSP_NOFPU_ARMCC">
1390       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1391       <require condition="CM33_DSP_NOFPU"/>
1392       <require Tcompiler="ARMCC"/>
1393     </condition>
1394     <condition id="CM33_NODSP_SP_ARMCC">
1395       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1396       <require condition="CM33_NODSP_SP"/>
1397       <require Tcompiler="ARMCC"/>
1398     </condition>
1399     <condition id="CM33_DSP_SP_ARMCC">
1400       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1401       <require condition="CM33_DSP_SP"/>
1402       <require Tcompiler="ARMCC"/>
1403     </condition>
1404     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1405       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1406       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1407       <require Dendian="Little-endian"/>
1408     </condition>
1409     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1410       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1411       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1412       <require Dendian="Little-endian"/>
1413     </condition>
1414     <condition id="CM33_NODSP_SP_LE_ARMCC">
1415       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1416       <require condition="CM33_NODSP_SP_ARMCC"/>
1417       <require Dendian="Little-endian"/>
1418     </condition>
1419     <condition id="CM33_DSP_SP_LE_ARMCC">
1420       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1421       <require condition="CM33_DSP_SP_ARMCC"/>
1422       <require Dendian="Little-endian"/>
1423     </condition>
1424
1425     <condition id="CM35P_ARMCC">
1426       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1427       <require condition="CM35P"/>
1428       <require Tcompiler="ARMCC"/>
1429     </condition>
1430     <condition id="CM35P_LE_ARMCC">
1431       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1432       <require condition="CM35P_ARMCC"/>
1433       <require Dendian="Little-endian"/>
1434     </condition>
1435
1436     <condition id="CM35P_FP_ARMCC">
1437       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1438       <require condition="CM35P_FP"/>
1439       <require Tcompiler="ARMCC"/>
1440     </condition>
1441     <condition id="CM35P_FP_LE_ARMCC">
1442       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1443       <require condition="CM35P_FP_ARMCC"/>
1444       <require Dendian="Little-endian"/>
1445     </condition>
1446
1447     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1448       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1449       <require condition="CM35P_NODSP_NOFPU"/>
1450       <require Tcompiler="ARMCC"/>
1451     </condition>
1452     <condition id="CM35P_DSP_NOFPU_ARMCC">
1453       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1454       <require condition="CM35P_DSP_NOFPU"/>
1455       <require Tcompiler="ARMCC"/>
1456     </condition>
1457     <condition id="CM35P_NODSP_SP_ARMCC">
1458       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1459       <require condition="CM35P_NODSP_SP"/>
1460       <require Tcompiler="ARMCC"/>
1461     </condition>
1462     <condition id="CM35P_DSP_SP_ARMCC">
1463       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1464       <require condition="CM35P_DSP_SP"/>
1465       <require Tcompiler="ARMCC"/>
1466     </condition>
1467     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1468       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1469       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1470       <require Dendian="Little-endian"/>
1471     </condition>
1472     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1473       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1474       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1475       <require Dendian="Little-endian"/>
1476     </condition>
1477     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1478       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1479       <require condition="CM35P_NODSP_SP_ARMCC"/>
1480       <require Dendian="Little-endian"/>
1481     </condition>
1482     <condition id="CM35P_DSP_SP_LE_ARMCC">
1483       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1484       <require condition="CM35P_DSP_SP_ARMCC"/>
1485       <require Dendian="Little-endian"/>
1486     </condition>
1487
1488     <condition id="CM55_ARMCC">
1489       <description>Cortex-M55 processor based device for the Arm Compiler</description>
1490       <require condition="CM55"/>
1491       <require Tcompiler="ARMCC"/>
1492     </condition>
1493     <condition id="CM55_LE_ARMCC">
1494       <description>Cortex-M55 processor based device in little endian mode for the Arm Compiler</description>
1495       <require condition="CM55_ARMCC"/>
1496       <require Dendian="Little-endian"/>
1497     </condition>
1498
1499     <condition id="ARMv8MBL_ARMCC">
1500       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1501       <require condition="ARMv8MBL"/>
1502       <require Tcompiler="ARMCC"/>
1503     </condition>
1504     <condition id="ARMv8MBL_LE_ARMCC">
1505       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1506       <require condition="ARMv8MBL_ARMCC"/>
1507       <require Dendian="Little-endian"/>
1508     </condition>
1509
1510     <condition id="ARMv8MML_ARMCC">
1511       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1512       <require condition="ARMv8MML"/>
1513       <require Tcompiler="ARMCC"/>
1514     </condition>
1515     <condition id="ARMv8MML_LE_ARMCC">
1516       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1517       <require condition="ARMv8MML_ARMCC"/>
1518       <require Dendian="Little-endian"/>
1519     </condition>
1520
1521     <condition id="ARMv8MML_FP_ARMCC">
1522       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1523       <require condition="ARMv8MML_FP"/>
1524       <require Tcompiler="ARMCC"/>
1525     </condition>
1526     <condition id="ARMv8MML_FP_LE_ARMCC">
1527       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1528       <require condition="ARMv8MML_FP_ARMCC"/>
1529       <require Dendian="Little-endian"/>
1530     </condition>
1531
1532     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1533       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1534       <require condition="ARMv8MML_NODSP_NOFPU"/>
1535       <require Tcompiler="ARMCC"/>
1536     </condition>
1537     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1538       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1539       <require condition="ARMv8MML_DSP_NOFPU"/>
1540       <require Tcompiler="ARMCC"/>
1541     </condition>
1542     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1543       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1544       <require condition="ARMv8MML_NODSP_SP"/>
1545       <require Tcompiler="ARMCC"/>
1546     </condition>
1547     <condition id="ARMv8MML_DSP_SP_ARMCC">
1548       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1549       <require condition="ARMv8MML_DSP_SP"/>
1550       <require Tcompiler="ARMCC"/>
1551     </condition>
1552     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1553       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1554       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1555       <require Dendian="Little-endian"/>
1556     </condition>
1557     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1558       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1559       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1560       <require Dendian="Little-endian"/>
1561     </condition>
1562     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1563       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1564       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1565       <require Dendian="Little-endian"/>
1566     </condition>
1567     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1568       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1569       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1570       <require Dendian="Little-endian"/>
1571     </condition>
1572
1573     <!-- GCC compiler -->
1574     <condition id="CA_GCC">
1575       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1576       <require condition="ARMv7-A Device"/>
1577       <require Tcompiler="GCC"/>
1578     </condition>
1579
1580     <condition id="CM0_GCC">
1581       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1582       <require condition="CM0"/>
1583       <require Tcompiler="GCC"/>
1584     </condition>
1585     <condition id="CM0_LE_GCC">
1586       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1587       <require condition="CM0_GCC"/>
1588       <require Dendian="Little-endian"/>
1589     </condition>
1590     <condition id="CM0_BE_GCC">
1591       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1592       <require condition="CM0_GCC"/>
1593       <require Dendian="Big-endian"/>
1594     </condition>
1595
1596     <condition id="CM1_GCC">
1597       <description>Cortex-M1 based device for the GCC Compiler</description>
1598       <require condition="CM1"/>
1599       <require Tcompiler="GCC"/>
1600     </condition>
1601     <condition id="CM1_LE_GCC">
1602       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1603       <require condition="CM1_GCC"/>
1604       <require Dendian="Little-endian"/>
1605     </condition>
1606     <condition id="CM1_BE_GCC">
1607       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1608       <require condition="CM1_GCC"/>
1609       <require Dendian="Big-endian"/>
1610     </condition>
1611
1612     <condition id="CM3_GCC">
1613       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1614       <require condition="CM3"/>
1615       <require Tcompiler="GCC"/>
1616     </condition>
1617     <condition id="CM3_LE_GCC">
1618       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1619       <require condition="CM3_GCC"/>
1620       <require Dendian="Little-endian"/>
1621     </condition>
1622     <condition id="CM3_BE_GCC">
1623       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1624       <require condition="CM3_GCC"/>
1625       <require Dendian="Big-endian"/>
1626     </condition>
1627
1628     <condition id="CM4_GCC">
1629       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1630       <require condition="CM4"/>
1631       <require Tcompiler="GCC"/>
1632     </condition>
1633     <condition id="CM4_LE_GCC">
1634       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1635       <require condition="CM4_GCC"/>
1636       <require Dendian="Little-endian"/>
1637     </condition>
1638     <condition id="CM4_BE_GCC">
1639       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1640       <require condition="CM4_GCC"/>
1641       <require Dendian="Big-endian"/>
1642     </condition>
1643
1644     <condition id="CM4_FP_GCC">
1645       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1646       <require condition="CM4_FP"/>
1647       <require Tcompiler="GCC"/>
1648     </condition>
1649     <condition id="CM4_FP_LE_GCC">
1650       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1651       <require condition="CM4_FP_GCC"/>
1652       <require Dendian="Little-endian"/>
1653     </condition>
1654     <condition id="CM4_FP_BE_GCC">
1655       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1656       <require condition="CM4_FP_GCC"/>
1657       <require Dendian="Big-endian"/>
1658     </condition>
1659
1660     <condition id="CM7_GCC">
1661       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1662       <require condition="CM7"/>
1663       <require Tcompiler="GCC"/>
1664     </condition>
1665     <condition id="CM7_LE_GCC">
1666       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1667       <require condition="CM7_GCC"/>
1668       <require Dendian="Little-endian"/>
1669     </condition>
1670     <condition id="CM7_BE_GCC">
1671       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1672       <require condition="CM7_GCC"/>
1673       <require Dendian="Big-endian"/>
1674     </condition>
1675
1676     <condition id="CM7_FP_GCC">
1677       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1678       <require condition="CM7_FP"/>
1679       <require Tcompiler="GCC"/>
1680     </condition>
1681     <condition id="CM7_FP_LE_GCC">
1682       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1683       <require condition="CM7_FP_GCC"/>
1684       <require Dendian="Little-endian"/>
1685     </condition>
1686     <condition id="CM7_FP_BE_GCC">
1687       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1688       <require condition="CM7_FP_GCC"/>
1689       <require Dendian="Big-endian"/>
1690     </condition>
1691
1692     <condition id="CM7_SP_GCC">
1693       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1694       <require condition="CM7_SP"/>
1695       <require Tcompiler="GCC"/>
1696     </condition>
1697     <condition id="CM7_SP_LE_GCC">
1698       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1699       <require condition="CM7_SP_GCC"/>
1700       <require Dendian="Little-endian"/>
1701     </condition>
1702
1703     <condition id="CM7_DP_GCC">
1704       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1705       <require condition="CM7_DP"/>
1706       <require Tcompiler="GCC"/>
1707     </condition>
1708     <condition id="CM7_DP_LE_GCC">
1709       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1710       <require condition="CM7_DP_GCC"/>
1711       <require Dendian="Little-endian"/>
1712     </condition>
1713
1714     <condition id="CM23_GCC">
1715       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1716       <require condition="CM23"/>
1717       <require Tcompiler="GCC"/>
1718     </condition>
1719     <condition id="CM23_LE_GCC">
1720       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1721       <require condition="CM23_GCC"/>
1722       <require Dendian="Little-endian"/>
1723     </condition>
1724
1725     <condition id="CM33_GCC">
1726       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1727       <require condition="CM33"/>
1728       <require Tcompiler="GCC"/>
1729     </condition>
1730     <condition id="CM33_LE_GCC">
1731       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1732       <require condition="CM33_GCC"/>
1733       <require Dendian="Little-endian"/>
1734     </condition>
1735
1736     <condition id="CM33_FP_GCC">
1737       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1738       <require condition="CM33_FP"/>
1739       <require Tcompiler="GCC"/>
1740     </condition>
1741     <condition id="CM33_FP_LE_GCC">
1742       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1743       <require condition="CM33_FP_GCC"/>
1744       <require Dendian="Little-endian"/>
1745     </condition>
1746
1747     <condition id="CM33_NODSP_NOFPU_GCC">
1748       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1749       <require condition="CM33_NODSP_NOFPU"/>
1750       <require Tcompiler="GCC"/>
1751     </condition>
1752     <condition id="CM33_DSP_NOFPU_GCC">
1753       <description>CM33, DSP, no FPU, GCC Compiler</description>
1754       <require condition="CM33_DSP_NOFPU"/>
1755       <require Tcompiler="GCC"/>
1756     </condition>
1757     <condition id="CM33_NODSP_SP_GCC">
1758       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1759       <require condition="CM33_NODSP_SP"/>
1760       <require Tcompiler="GCC"/>
1761     </condition>
1762     <condition id="CM33_DSP_SP_GCC">
1763       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1764       <require condition="CM33_DSP_SP"/>
1765       <require Tcompiler="GCC"/>
1766     </condition>
1767     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1768       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1769       <require condition="CM33_NODSP_NOFPU_GCC"/>
1770       <require Dendian="Little-endian"/>
1771     </condition>
1772     <condition id="CM33_DSP_NOFPU_LE_GCC">
1773       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1774       <require condition="CM33_DSP_NOFPU_GCC"/>
1775       <require Dendian="Little-endian"/>
1776     </condition>
1777     <condition id="CM33_NODSP_SP_LE_GCC">
1778       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1779       <require condition="CM33_NODSP_SP_GCC"/>
1780       <require Dendian="Little-endian"/>
1781     </condition>
1782     <condition id="CM33_DSP_SP_LE_GCC">
1783       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1784       <require condition="CM33_DSP_SP_GCC"/>
1785       <require Dendian="Little-endian"/>
1786     </condition>
1787
1788     <condition id="CM35P_GCC">
1789       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1790       <require condition="CM35P"/>
1791       <require Tcompiler="GCC"/>
1792     </condition>
1793     <condition id="CM35P_LE_GCC">
1794       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1795       <require condition="CM35P_GCC"/>
1796       <require Dendian="Little-endian"/>
1797     </condition>
1798
1799     <condition id="CM35P_FP_GCC">
1800       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1801       <require condition="CM35P_FP"/>
1802       <require Tcompiler="GCC"/>
1803     </condition>
1804     <condition id="CM35P_FP_LE_GCC">
1805       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1806       <require condition="CM35P_FP_GCC"/>
1807       <require Dendian="Little-endian"/>
1808     </condition>
1809
1810     <condition id="CM35P_NODSP_NOFPU_GCC">
1811       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1812       <require condition="CM35P_NODSP_NOFPU"/>
1813       <require Tcompiler="GCC"/>
1814     </condition>
1815     <condition id="CM35P_DSP_NOFPU_GCC">
1816       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1817       <require condition="CM35P_DSP_NOFPU"/>
1818       <require Tcompiler="GCC"/>
1819     </condition>
1820     <condition id="CM35P_NODSP_SP_GCC">
1821       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1822       <require condition="CM35P_NODSP_SP"/>
1823       <require Tcompiler="GCC"/>
1824     </condition>
1825     <condition id="CM35P_DSP_SP_GCC">
1826       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1827       <require condition="CM35P_DSP_SP"/>
1828       <require Tcompiler="GCC"/>
1829     </condition>
1830     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1831       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1832       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1833       <require Dendian="Little-endian"/>
1834     </condition>
1835     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1836       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1837       <require condition="CM35P_DSP_NOFPU_GCC"/>
1838       <require Dendian="Little-endian"/>
1839     </condition>
1840     <condition id="CM35P_NODSP_SP_LE_GCC">
1841       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1842       <require condition="CM35P_NODSP_SP_GCC"/>
1843       <require Dendian="Little-endian"/>
1844     </condition>
1845     <condition id="CM35P_DSP_SP_LE_GCC">
1846       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1847       <require condition="CM35P_DSP_SP_GCC"/>
1848       <require Dendian="Little-endian"/>
1849     </condition>
1850
1851     <condition id="CM55_GCC">
1852       <description>Cortex-M55 processor based device for the GCC Compiler</description>
1853       <require condition="CM55"/>
1854       <require Tcompiler="GCC"/>
1855     </condition>
1856     <condition id="CM55_LE_GCC">
1857       <description>Cortex-M55 processor based device in little endian mode for the GCC Compiler</description>
1858       <require condition="CM55_GCC"/>
1859       <require Dendian="Little-endian"/>
1860     </condition>
1861
1862     <condition id="ARMv8MBL_GCC">
1863       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1864       <require condition="ARMv8MBL"/>
1865       <require Tcompiler="GCC"/>
1866     </condition>
1867     <condition id="ARMv8MBL_LE_GCC">
1868       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1869       <require condition="ARMv8MBL_GCC"/>
1870       <require Dendian="Little-endian"/>
1871     </condition>
1872
1873     <condition id="ARMv8MML_GCC">
1874       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1875       <require condition="ARMv8MML"/>
1876       <require Tcompiler="GCC"/>
1877     </condition>
1878     <condition id="ARMv8MML_LE_GCC">
1879       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1880       <require condition="ARMv8MML_GCC"/>
1881       <require Dendian="Little-endian"/>
1882     </condition>
1883
1884     <condition id="ARMv8MML_FP_GCC">
1885       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1886       <require condition="ARMv8MML_FP"/>
1887       <require Tcompiler="GCC"/>
1888     </condition>
1889     <condition id="ARMv8MML_FP_LE_GCC">
1890       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1891       <require condition="ARMv8MML_FP_GCC"/>
1892       <require Dendian="Little-endian"/>
1893     </condition>
1894
1895     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1896       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1897       <require condition="ARMv8MML_NODSP_NOFPU"/>
1898       <require Tcompiler="GCC"/>
1899     </condition>
1900     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1901       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1902       <require condition="ARMv8MML_DSP_NOFPU"/>
1903       <require Tcompiler="GCC"/>
1904     </condition>
1905     <condition id="ARMv8MML_NODSP_SP_GCC">
1906       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1907       <require condition="ARMv8MML_NODSP_SP"/>
1908       <require Tcompiler="GCC"/>
1909     </condition>
1910     <condition id="ARMv8MML_DSP_SP_GCC">
1911       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1912       <require condition="ARMv8MML_DSP_SP"/>
1913       <require Tcompiler="GCC"/>
1914     </condition>
1915     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1916       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1917       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1918       <require Dendian="Little-endian"/>
1919     </condition>
1920     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1921       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1922       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1923       <require Dendian="Little-endian"/>
1924     </condition>
1925     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1926       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1927       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1928       <require Dendian="Little-endian"/>
1929     </condition>
1930     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1931       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1932       <require condition="ARMv8MML_DSP_SP_GCC"/>
1933       <require Dendian="Little-endian"/>
1934     </condition>
1935
1936     <!-- IAR compiler -->
1937     <condition id="CA_IAR">
1938       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1939       <require condition="ARMv7-A Device"/>
1940       <require Tcompiler="IAR"/>
1941     </condition>
1942
1943     <condition id="CM0_IAR">
1944       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1945       <require condition="CM0"/>
1946       <require Tcompiler="IAR"/>
1947     </condition>
1948     <condition id="CM0_LE_IAR">
1949       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1950       <require condition="CM0_IAR"/>
1951       <require Dendian="Little-endian"/>
1952     </condition>
1953     <condition id="CM0_BE_IAR">
1954       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1955       <require condition="CM0_IAR"/>
1956       <require Dendian="Big-endian"/>
1957     </condition>
1958
1959     <condition id="CM1_IAR">
1960       <description>Cortex-M1 based device for the IAR Compiler</description>
1961       <require condition="CM1"/>
1962       <require Tcompiler="IAR"/>
1963     </condition>
1964     <condition id="CM1_LE_IAR">
1965       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1966       <require condition="CM1_IAR"/>
1967       <require Dendian="Little-endian"/>
1968     </condition>
1969     <condition id="CM1_BE_IAR">
1970       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1971       <require condition="CM1_IAR"/>
1972       <require Dendian="Big-endian"/>
1973     </condition>
1974
1975     <condition id="CM3_IAR">
1976       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1977       <require condition="CM3"/>
1978       <require Tcompiler="IAR"/>
1979     </condition>
1980     <condition id="CM3_LE_IAR">
1981       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1982       <require condition="CM3_IAR"/>
1983       <require Dendian="Little-endian"/>
1984     </condition>
1985     <condition id="CM3_BE_IAR">
1986       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1987       <require condition="CM3_IAR"/>
1988       <require Dendian="Big-endian"/>
1989     </condition>
1990
1991     <condition id="CM4_IAR">
1992       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1993       <require condition="CM4"/>
1994       <require Tcompiler="IAR"/>
1995     </condition>
1996     <condition id="CM4_LE_IAR">
1997       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1998       <require condition="CM4_IAR"/>
1999       <require Dendian="Little-endian"/>
2000     </condition>
2001     <condition id="CM4_BE_IAR">
2002       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
2003       <require condition="CM4_IAR"/>
2004       <require Dendian="Big-endian"/>
2005     </condition>
2006
2007     <condition id="CM4_FP_IAR">
2008       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
2009       <require condition="CM4_FP"/>
2010       <require Tcompiler="IAR"/>
2011     </condition>
2012     <condition id="CM4_FP_LE_IAR">
2013       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2014       <require condition="CM4_FP_IAR"/>
2015       <require Dendian="Little-endian"/>
2016     </condition>
2017     <condition id="CM4_FP_BE_IAR">
2018       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2019       <require condition="CM4_FP_IAR"/>
2020       <require Dendian="Big-endian"/>
2021     </condition>
2022
2023     <condition id="CM7_IAR">
2024       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2025       <require condition="CM7"/>
2026       <require Tcompiler="IAR"/>
2027     </condition>
2028     <condition id="CM7_LE_IAR">
2029       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2030       <require condition="CM7_IAR"/>
2031       <require Dendian="Little-endian"/>
2032     </condition>
2033     <condition id="CM7_BE_IAR">
2034       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2035       <require condition="CM7_IAR"/>
2036       <require Dendian="Big-endian"/>
2037     </condition>
2038
2039     <condition id="CM7_FP_IAR">
2040       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2041       <require condition="CM7_FP"/>
2042       <require Tcompiler="IAR"/>
2043     </condition>
2044     <condition id="CM7_FP_LE_IAR">
2045       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2046       <require condition="CM7_FP_IAR"/>
2047       <require Dendian="Little-endian"/>
2048     </condition>
2049     <condition id="CM7_FP_BE_IAR">
2050       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2051       <require condition="CM7_FP_IAR"/>
2052       <require Dendian="Big-endian"/>
2053     </condition>
2054
2055     <condition id="CM7_SP_IAR">
2056       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2057       <require condition="CM7_SP"/>
2058       <require Tcompiler="IAR"/>
2059     </condition>
2060     <condition id="CM7_SP_LE_IAR">
2061       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2062       <require condition="CM7_SP_IAR"/>
2063       <require Dendian="Little-endian"/>
2064     </condition>
2065     <condition id="CM7_SP_BE_IAR">
2066       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2067       <require condition="CM7_SP_IAR"/>
2068       <require Dendian="Big-endian"/>
2069     </condition>
2070
2071     <condition id="CM7_DP_IAR">
2072       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2073       <require condition="CM7_DP"/>
2074       <require Tcompiler="IAR"/>
2075     </condition>
2076     <condition id="CM7_DP_LE_IAR">
2077       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2078       <require condition="CM7_DP_IAR"/>
2079       <require Dendian="Little-endian"/>
2080     </condition>
2081     <condition id="CM7_DP_BE_IAR">
2082       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2083       <require condition="CM7_DP_IAR"/>
2084       <require Dendian="Big-endian"/>
2085     </condition>
2086
2087     <condition id="CM23_IAR">
2088       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2089       <require condition="CM23"/>
2090       <require Tcompiler="IAR"/>
2091     </condition>
2092     <condition id="CM23_LE_IAR">
2093       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2094       <require condition="CM23_IAR"/>
2095       <require Dendian="Little-endian"/>
2096     </condition>
2097
2098     <condition id="CM33_IAR">
2099       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2100       <require condition="CM33"/>
2101       <require Tcompiler="IAR"/>
2102     </condition>
2103     <condition id="CM33_LE_IAR">
2104       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2105       <require condition="CM33_IAR"/>
2106       <require Dendian="Little-endian"/>
2107     </condition>
2108
2109     <condition id="CM33_FP_IAR">
2110       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2111       <require condition="CM33_FP"/>
2112       <require Tcompiler="IAR"/>
2113     </condition>
2114     <condition id="CM33_FP_LE_IAR">
2115       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2116       <require condition="CM33_FP_IAR"/>
2117       <require Dendian="Little-endian"/>
2118     </condition>
2119
2120     <condition id="CM33_NODSP_NOFPU_IAR">
2121       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2122       <require condition="CM33_NODSP_NOFPU"/>
2123       <require Tcompiler="IAR"/>
2124     </condition>
2125     <condition id="CM33_DSP_NOFPU_IAR">
2126       <description>CM33, DSP, no FPU, IAR Compiler</description>
2127       <require condition="CM33_DSP_NOFPU"/>
2128       <require Tcompiler="IAR"/>
2129     </condition>
2130     <condition id="CM33_NODSP_SP_IAR">
2131       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2132       <require condition="CM33_NODSP_SP"/>
2133       <require Tcompiler="IAR"/>
2134     </condition>
2135     <condition id="CM33_DSP_SP_IAR">
2136       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2137       <require condition="CM33_DSP_SP"/>
2138       <require Tcompiler="IAR"/>
2139     </condition>
2140     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2141       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2142       <require condition="CM33_NODSP_NOFPU_IAR"/>
2143       <require Dendian="Little-endian"/>
2144     </condition>
2145     <condition id="CM33_DSP_NOFPU_LE_IAR">
2146       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2147       <require condition="CM33_DSP_NOFPU_IAR"/>
2148       <require Dendian="Little-endian"/>
2149     </condition>
2150     <condition id="CM33_NODSP_SP_LE_IAR">
2151       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2152       <require condition="CM33_NODSP_SP_IAR"/>
2153       <require Dendian="Little-endian"/>
2154     </condition>
2155     <condition id="CM33_DSP_SP_LE_IAR">
2156       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2157       <require condition="CM33_DSP_SP_IAR"/>
2158       <require Dendian="Little-endian"/>
2159     </condition>
2160
2161     <condition id="CM35P_IAR">
2162       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2163       <require condition="CM35P"/>
2164       <require Tcompiler="IAR"/>
2165     </condition>
2166     <condition id="CM35P_LE_IAR">
2167       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2168       <require condition="CM35P_IAR"/>
2169       <require Dendian="Little-endian"/>
2170     </condition>
2171
2172     <condition id="CM35P_FP_IAR">
2173       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2174       <require condition="CM35P_FP"/>
2175       <require Tcompiler="IAR"/>
2176     </condition>
2177     <condition id="CM35P_FP_LE_IAR">
2178       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2179       <require condition="CM35P_FP_IAR"/>
2180       <require Dendian="Little-endian"/>
2181     </condition>
2182
2183     <condition id="CM35P_NODSP_NOFPU_IAR">
2184       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2185       <require condition="CM35P_NODSP_NOFPU"/>
2186       <require Tcompiler="IAR"/>
2187     </condition>
2188     <condition id="CM35P_DSP_NOFPU_IAR">
2189       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2190       <require condition="CM35P_DSP_NOFPU"/>
2191       <require Tcompiler="IAR"/>
2192     </condition>
2193     <condition id="CM35P_NODSP_SP_IAR">
2194       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2195       <require condition="CM35P_NODSP_SP"/>
2196       <require Tcompiler="IAR"/>
2197     </condition>
2198     <condition id="CM35P_DSP_SP_IAR">
2199       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2200       <require condition="CM35P_DSP_SP"/>
2201       <require Tcompiler="IAR"/>
2202     </condition>
2203     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2204       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2205       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2206       <require Dendian="Little-endian"/>
2207     </condition>
2208     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2209       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2210       <require condition="CM35P_DSP_NOFPU_IAR"/>
2211       <require Dendian="Little-endian"/>
2212     </condition>
2213     <condition id="CM35P_NODSP_SP_LE_IAR">
2214       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2215       <require condition="CM35P_NODSP_SP_IAR"/>
2216       <require Dendian="Little-endian"/>
2217     </condition>
2218     <condition id="CM35P_DSP_SP_LE_IAR">
2219       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2220       <require condition="CM35P_DSP_SP_IAR"/>
2221       <require Dendian="Little-endian"/>
2222     </condition>
2223
2224     <condition id="CM55_IAR">
2225       <description>Cortex-M55 processor based device for the IAR Compiler</description>
2226       <require condition="CM55"/>
2227       <require Tcompiler="IAR"/>
2228     </condition>
2229     <condition id="CM55_LE_IAR">
2230       <description>Cortex-M55 processor based device in little endian mode for the IAR Compiler</description>
2231       <require condition="CM55_IAR"/>
2232       <require Dendian="Little-endian"/>
2233     </condition>
2234
2235     <condition id="ARMv8MBL_IAR">
2236       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2237       <require condition="ARMv8MBL"/>
2238       <require Tcompiler="IAR"/>
2239     </condition>
2240     <condition id="ARMv8MBL_LE_IAR">
2241       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2242       <require condition="ARMv8MBL_IAR"/>
2243       <require Dendian="Little-endian"/>
2244     </condition>
2245
2246     <condition id="ARMv8MML_IAR">
2247       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2248       <require condition="ARMv8MML"/>
2249       <require Tcompiler="IAR"/>
2250     </condition>
2251     <condition id="ARMv8MML_LE_IAR">
2252       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2253       <require condition="ARMv8MML_IAR"/>
2254       <require Dendian="Little-endian"/>
2255     </condition>
2256
2257     <condition id="ARMv8MML_FP_IAR">
2258       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2259       <require condition="ARMv8MML_FP"/>
2260       <require Tcompiler="IAR"/>
2261     </condition>
2262     <condition id="ARMv8MML_FP_LE_IAR">
2263       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2264       <require condition="ARMv8MML_FP_IAR"/>
2265       <require Dendian="Little-endian"/>
2266     </condition>
2267
2268     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2269       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2270       <require condition="ARMv8MML_NODSP_NOFPU"/>
2271       <require Tcompiler="IAR"/>
2272     </condition>
2273     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2274       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2275       <require condition="ARMv8MML_DSP_NOFPU"/>
2276       <require Tcompiler="IAR"/>
2277     </condition>
2278     <condition id="ARMv8MML_NODSP_SP_IAR">
2279       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2280       <require condition="ARMv8MML_NODSP_SP"/>
2281       <require Tcompiler="IAR"/>
2282     </condition>
2283     <condition id="ARMv8MML_DSP_SP_IAR">
2284       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2285       <require condition="ARMv8MML_DSP_SP"/>
2286       <require Tcompiler="IAR"/>
2287     </condition>
2288     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2289       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2290       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2291       <require Dendian="Little-endian"/>
2292     </condition>
2293     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2294       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2295       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2296       <require Dendian="Little-endian"/>
2297     </condition>
2298     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2299       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2300       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2301       <require Dendian="Little-endian"/>
2302     </condition>
2303     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2304       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2305       <require condition="ARMv8MML_DSP_SP_IAR"/>
2306       <require Dendian="Little-endian"/>
2307     </condition>
2308
2309     <!-- conditions selecting single devices and CMSIS Core -->
2310     <condition id="ARMCM0 CMSIS">
2311       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2312       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2313       <require Cclass="CMSIS" Cgroup="CORE"/>
2314     </condition>
2315
2316     <condition id="ARMCM0+ CMSIS">
2317       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2318       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2319       <require Cclass="CMSIS" Cgroup="CORE"/>
2320     </condition>
2321
2322     <condition id="ARMCM1 CMSIS">
2323       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2324       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2325       <require Cclass="CMSIS" Cgroup="CORE"/>
2326     </condition>
2327
2328     <condition id="ARMCM3 CMSIS">
2329       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2330       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2331       <require Cclass="CMSIS" Cgroup="CORE"/>
2332     </condition>
2333
2334     <condition id="ARMCM4 CMSIS">
2335       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2336       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2337       <require Cclass="CMSIS" Cgroup="CORE"/>
2338     </condition>
2339
2340     <condition id="ARMCM7 CMSIS">
2341       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2342       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2343       <require Cclass="CMSIS" Cgroup="CORE"/>
2344     </condition>
2345
2346     <condition id="ARMCM23 CMSIS">
2347       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2348       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2349       <require Cclass="CMSIS" Cgroup="CORE"/>
2350     </condition>
2351
2352     <condition id="ARMCM33 CMSIS">
2353       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2354       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2355       <require Cclass="CMSIS" Cgroup="CORE"/>
2356     </condition>
2357
2358     <condition id="ARMCM35P CMSIS">
2359       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2360       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2361       <require Cclass="CMSIS" Cgroup="CORE"/>
2362     </condition>
2363
2364     <condition id="ARMCM55 CMSIS">
2365       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2366       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2367       <require Cclass="CMSIS" Cgroup="CORE"/>
2368     </condition>
2369
2370     <condition id="ARMSC000 CMSIS">
2371       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2372       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2373       <require Cclass="CMSIS" Cgroup="CORE"/>
2374     </condition>
2375
2376     <condition id="ARMSC300 CMSIS">
2377       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2378       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2379       <require Cclass="CMSIS" Cgroup="CORE"/>
2380     </condition>
2381
2382     <condition id="ARMv8MBL CMSIS">
2383       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2384       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2385       <require Cclass="CMSIS" Cgroup="CORE"/>
2386     </condition>
2387
2388     <condition id="ARMv8MML CMSIS">
2389       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2390       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2391       <require Cclass="CMSIS" Cgroup="CORE"/>
2392     </condition>
2393
2394     <condition id="ARMv81MML CMSIS">
2395       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2396       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2397       <require Cclass="CMSIS" Cgroup="CORE"/>
2398     </condition>
2399
2400     <condition id="ARMCA5 CMSIS">
2401       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2402       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2403       <require Cclass="CMSIS" Cgroup="CORE"/>
2404     </condition>
2405
2406     <condition id="ARMCA7 CMSIS">
2407       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2408       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2409       <require Cclass="CMSIS" Cgroup="CORE"/>
2410     </condition>
2411
2412     <condition id="ARMCA9 CMSIS">
2413       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2414       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2415       <require Cclass="CMSIS" Cgroup="CORE"/>
2416     </condition>
2417
2418     <!-- CMSIS DSP -->
2419     <condition id="CMSIS DSP">
2420       <description>Components required for DSP</description>
2421       <require condition="ARMv6_7_8-M Device"/>
2422       <require condition="ARMCC GCC IAR"/>
2423       <require Cclass="CMSIS" Cgroup="CORE"/>
2424     </condition>
2425
2426     <!-- CMSIS NN -->
2427     <condition id="CMSIS NN">
2428       <description>Components required for NN</description>
2429       <require Cclass="CMSIS" Cgroup="DSP"/>
2430     </condition>
2431
2432     <!-- RTOS RTX -->
2433     <condition id="RTOS RTX">
2434       <description>Components required for RTOS RTX</description>
2435       <require condition="ARMv6_7-M Device"/>
2436       <require condition="ARMCC GCC IAR"/>
2437       <require Cclass="Device" Cgroup="Startup"/>
2438       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2439     </condition>
2440     <condition id="RTOS RTX IFX">
2441       <description>Components required for RTOS RTX IFX</description>
2442       <require condition="ARMv6_7-M Device"/>
2443       <require condition="ARMCC GCC IAR"/>
2444       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2445       <require Cclass="Device" Cgroup="Startup"/>
2446       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2447     </condition>
2448     <condition id="RTOS RTX5">
2449       <description>Components required for RTOS RTX5</description>
2450       <require condition="ARMv6_7_8-M Device"/>
2451       <require condition="ARMCC GCC IAR"/>
2452       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2453     </condition>
2454     <condition id="RTOS2 RTX5">
2455       <description>Components required for RTOS2 RTX5</description>
2456       <require condition="ARMv6_7_8-M Device"/>
2457       <require condition="ARMCC GCC IAR"/>
2458       <require Cclass="CMSIS"  Cgroup="CORE"/>
2459       <require Cclass="Device" Cgroup="Startup"/>
2460     </condition>
2461     <condition id="RTOS2 RTX5 v7-A">
2462       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2463       <require condition="ARMv7-A Device"/>
2464       <require condition="ARMCC GCC IAR"/>
2465       <require Cclass="CMSIS"  Cgroup="CORE"/>
2466       <require Cclass="Device" Cgroup="Startup"/>
2467       <require Cclass="Device" Cgroup="OS Tick"/>
2468       <require Cclass="Device" Cgroup="IRQ Controller"/>
2469     </condition>
2470     <condition id="RTOS2 RTX5 Lib">
2471       <description>Components required for RTOS2 RTX5 Library</description>
2472       <require condition="ARMv6_7_8-M Device"/>
2473       <require condition="ARMCC GCC IAR"/>
2474       <require Cclass="CMSIS"  Cgroup="CORE"/>
2475       <require Cclass="Device" Cgroup="Startup"/>
2476     </condition>
2477     <condition id="RTOS2 RTX5 NS">
2478       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2479       <require condition="ARMv8-M TZ Device"/>
2480       <require condition="ARMCC GCC IAR"/>
2481       <require Cclass="CMSIS"  Cgroup="CORE"/>
2482       <require Cclass="Device" Cgroup="Startup"/>
2483     </condition>
2484
2485     <!-- OS Tick -->
2486     <condition id="OS Tick PTIM">
2487       <description>Components required for OS Tick Private Timer</description>
2488       <require condition="CA5_CA9"/>
2489       <require Cclass="Device" Cgroup="IRQ Controller"/>
2490     </condition>
2491
2492     <condition id="OS Tick GTIM">
2493       <description>Components required for OS Tick Generic Physical Timer</description>
2494       <require condition="CA7"/>
2495       <require Cclass="Device" Cgroup="IRQ Controller"/>
2496     </condition>
2497
2498   </conditions>
2499
2500   <components>
2501     <!-- CMSIS-Core component -->
2502     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.4.0"  condition="ARMv6_7_8-M Device" >
2503       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2504       <files>
2505         <!-- CPU independent -->
2506         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2507         <file category="include" name="CMSIS/Core/Include/"/>
2508         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2509         <!-- Code template -->
2510         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2511         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2512       </files>
2513     </component>
2514
2515     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.4"  condition="ARMv7-A Device" >
2516       <description>CMSIS-CORE for Cortex-A</description>
2517       <files>
2518         <!-- CPU independent -->
2519         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2520         <file category="include" name="CMSIS/Core_A/Include/"/>
2521       </files>
2522     </component>
2523
2524     <!-- CMSIS-Startup components -->
2525     <!-- Cortex-M0 -->
2526     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM0 CMSIS">
2527       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2528       <files>
2529         <!-- include folder / device header file -->
2530         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2531         <!-- startup / system file -->
2532         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.2" attr="config"/>
2533         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2534         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2535         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2536         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2537       </files>
2538     </component>
2539     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2540       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2541       <files>
2542         <!-- include folder / device header file -->
2543         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2544         <!-- startup / system file -->
2545         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2546         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.0.1" attr="config" condition="GCC"/>
2547         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2548         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2549         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2550       </files>
2551     </component>
2552
2553     <!-- Cortex-M0+ -->
2554     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM0+ CMSIS">
2555       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2556       <files>
2557         <!-- include folder / device header file -->
2558         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2559         <!-- startup / system file -->
2560         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.2" attr="config"/>
2561         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2562         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2563         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2564         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2565       </files>
2566     </component>
2567     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0+ CMSIS">
2568       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2569       <files>
2570         <!-- include folder / device header file -->
2571         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2572         <!-- startup / system file -->
2573         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2574         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.0.1" attr="config" condition="GCC"/>
2575         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2576         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2577         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2578       </files>
2579     </component>
2580
2581     <!-- Cortex-M1 -->
2582     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM1 CMSIS">
2583       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2584       <files>
2585         <!-- include folder / device header file -->
2586         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2587         <!-- startup / system file -->
2588         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.2" attr="config"/>
2589         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2590         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2591         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2592         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2593       </files>
2594     </component>
2595     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2596       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2597       <files>
2598         <!-- include folder / device header file -->
2599         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2600         <!-- startup / system file -->
2601         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2602         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.0.1" attr="config" condition="GCC"/>
2603         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2604         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2605         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2606       </files>
2607     </component>
2608
2609     <!-- Cortex-M3 -->
2610     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM3 CMSIS">
2611       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2612       <files>
2613         <!-- include folder / device header file -->
2614         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2615         <!-- startup / system file -->
2616         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.2" attr="config"/>
2617         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2618         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2619         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2620         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2621       </files>
2622     </component>
2623     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2624       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2625       <files>
2626         <!-- include folder / device header file -->
2627         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2628         <!-- startup / system file -->
2629         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2630         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.0.1" attr="config" condition="GCC"/>
2631         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2632         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2633         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2634       </files>
2635     </component>
2636
2637     <!-- Cortex-M4 -->
2638     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM4 CMSIS">
2639       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2640       <files>
2641         <!-- include folder / device header file -->
2642         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2643         <!-- startup / system file -->
2644         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.2" attr="config"/>
2645         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2646         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2647         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2648        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2649       </files>
2650     </component>
2651     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2652       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2653       <files>
2654         <!-- include folder / device header file -->
2655         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2656         <!-- startup / system file -->
2657         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2658         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.0.1" attr="config" condition="GCC"/>
2659         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2660         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2661         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2662       </files>
2663     </component>
2664
2665     <!-- Cortex-M7 -->
2666     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM7 CMSIS">
2667       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2668       <files>
2669         <!-- include folder / device header file -->
2670         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2671         <!-- startup / system file -->
2672         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.2" attr="config"/>
2673         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2674         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2675         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2676         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2677       </files>
2678     </component>
2679     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2680       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2681       <files>
2682         <!-- include folder / device header file -->
2683         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2684         <!-- startup / system file -->
2685         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2686         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.0.1" attr="config" condition="GCC"/>
2687         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2688         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2689         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2690       </files>
2691     </component>
2692
2693     <!-- Cortex-M23 -->
2694     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM23 CMSIS">
2695       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2696       <files>
2697         <!-- include folder / device header file -->
2698         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2699         <!-- startup / system file -->
2700         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.2" attr="config"/>
2701         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
2702         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2703         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2704         <!-- SAU configuration -->
2705         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2706       </files>
2707     </component>
2708     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM23 CMSIS">
2709       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2710       <files>
2711         <!-- include folder / device header file -->
2712         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2713         <!-- startup / system file -->
2714         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.1" attr="config" condition="ARMCC"/>
2715         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.0.1" attr="config" condition="GCC"/>
2716         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.0.0" attr="config" condition="GCC"/>
2717         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2718         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2719         <!-- SAU configuration -->
2720         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2721       </files>
2722     </component>
2723
2724     <!-- Cortex-M33 -->
2725     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM33 CMSIS">
2726       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2727       <files>
2728         <!-- include folder / device header file -->
2729         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2730         <!-- startup / system file -->
2731         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.2" attr="config"/>
2732         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2733         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2734         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2735         <!-- SAU configuration -->
2736         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2737       </files>
2738     </component>
2739     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM33 CMSIS">
2740       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2741       <files>
2742         <!-- include folder / device header file -->
2743         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2744         <!-- startup / system file -->
2745         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2746         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.0.1" attr="config" condition="GCC"/>
2747         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2748         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2749         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2750         <!-- SAU configuration -->
2751         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2752       </files>
2753     </component>
2754
2755     <!-- Cortex-M35P -->
2756     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM35P CMSIS">
2757       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2758       <files>
2759         <!-- include folder / device header file -->
2760         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2761         <!-- startup / system file -->
2762         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.2" attr="config"/>
2763         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2764         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2765         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2766         <!-- SAU configuration -->
2767         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2768       </files>
2769     </component>
2770     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM35P CMSIS">
2771       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2772       <files>
2773         <!-- include folder / device header file -->
2774         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2775         <!-- startup / system file -->
2776         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2777         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.1" attr="config" condition="GCC"/>
2778         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2779         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
2780         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2781         <!-- SAU configuration -->
2782         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2783       </files>
2784     </component>
2785
2786     <!-- Cortex-M55 -->
2787     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM55 CMSIS">
2788       <description>System and Startup for Generic Cortex-M55 device</description>
2789       <files>
2790         <!-- include folder / device header file -->
2791         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2792         <!-- startup / system file -->
2793         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="2.0.2" attr="config"/>
2794         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2795         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2796         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.2.0" attr="config"/>
2797         <!-- SAU configuration -->
2798         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2799       </files>
2800     </component>
2801
2802     <!-- Cortex-SC000 -->
2803     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS">
2804       <description>System and Startup for Generic Arm SC000 device</description>
2805       <files>
2806         <!-- include folder / device header file -->
2807         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2808         <!-- startup / system file -->
2809         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.2" attr="config"/>
2810         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2811         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2812         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2813         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2814       </files>
2815     </component>
2816     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2817       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2818       <files>
2819         <!-- include folder / device header file -->
2820         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2821         <!-- startup / system file -->
2822         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2823         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.0.1" attr="config" condition="GCC"/>
2824         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2825         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2826         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2827       </files>
2828     </component>
2829
2830     <!-- Cortex-SC300 -->
2831     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS">
2832       <description>System and Startup for Generic Arm SC300 device</description>
2833       <files>
2834         <!-- include folder / device header file -->
2835         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2836         <!-- startup / system file -->
2837         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.2" attr="config"/>
2838         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2839         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2840         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2841         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2842       </files>
2843     </component>
2844     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2845       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2846       <files>
2847         <!-- include folder / device header file -->
2848         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2849         <!-- startup / system file -->
2850         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2851         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.0.1" attr="config" condition="GCC"/>
2852         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2853         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2854         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2855       </files>
2856     </component>
2857
2858     <!-- ARMv8MBL -->
2859     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMv8MBL CMSIS">
2860       <description>System and Startup for Generic Armv8-M Baseline device</description>
2861       <files>
2862         <!-- include folder / device header file -->
2863         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2864         <!-- startup / system file -->
2865         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.2" attr="config"/>
2866         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
2867         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2868         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2869         <!-- SAU configuration -->
2870         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2871       </files>
2872     </component>
2873     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMv8MBL CMSIS">
2874       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2875       <files>
2876         <!-- include folder / device header file -->
2877         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2878         <!-- startup / system file -->
2879         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.1" attr="config" condition="ARMCC"/>
2880         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.0.1" attr="config" condition="GCC"/>
2881         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2882         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2883         <!-- SAU configuration -->
2884         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2885       </files>
2886     </component>
2887
2888     <!-- ARMv8MML -->
2889     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMv8MML CMSIS">
2890       <description>System and Startup for Generic Armv8-M Mainline device</description>
2891       <files>
2892         <!-- include folder / device header file -->
2893         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2894         <!-- startup / system file -->
2895         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.2" attr="config"/>
2896         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2897         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2898         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2899         <!-- SAU configuration -->
2900         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2901       </files>
2902     </component>
2903     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMv8MML CMSIS">
2904       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2905       <files>
2906         <!-- include folder / device header file -->
2907         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2908         <!-- startup / system file -->
2909         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2910         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.0.1" attr="config" condition="GCC"/>
2911         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2912         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2913         <!-- SAU configuration -->
2914         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2915       </files>
2916     </component>
2917
2918     <!-- ARMv81MML -->
2919     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv81MML CMSIS">
2920       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2921       <files>
2922         <!-- include folder / device header file -->
2923         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2924         <!-- startup / system file -->
2925         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.2" attr="config"/>
2926         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2927         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.0.0" attr="config" condition="GCC"/>
2928         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.0" attr="config"/>
2929         <!-- SAU configuration -->
2930         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2931       </files>
2932     </component>
2933
2934     <!-- Cortex-A5 -->
2935     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2936       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2937       <files>
2938         <!-- include folder / device header file -->
2939         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2940         <!-- startup / system / mmu files -->
2941         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2942         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2943         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2944         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2945         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2946         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2947         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2948         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2949         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2950         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2951         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2952         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2953
2954       </files>
2955     </component>
2956
2957     <!-- Cortex-A7 -->
2958     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2959       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2960       <files>
2961         <!-- include folder / device header file -->
2962         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2963         <!-- startup / system / mmu files -->
2964         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2965         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2966         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2967         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2968         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2969         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2970         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2971         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2972         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2973         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2974         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2975         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2976       </files>
2977     </component>
2978
2979     <!-- Cortex-A9 -->
2980     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2981       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2982       <files>
2983         <!-- include folder / device header file -->
2984         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2985         <!-- startup / system / mmu files -->
2986         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2987         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2988         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2989         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2990         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2991         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2992         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2993         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2994         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2995         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2996         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2997         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2998       </files>
2999     </component>
3000
3001     <!-- IRQ Controller -->
3002     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3003       <description>IRQ Controller implementation using GIC</description>
3004       <files>
3005         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3006       </files>
3007     </component>
3008
3009     <!-- OS Tick -->
3010     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3011       <description>OS Tick implementation using Private Timer</description>
3012       <files>
3013         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3014       </files>
3015     </component>
3016
3017     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3018       <description>OS Tick implementation using Generic Physical Timer</description>
3019       <files>
3020         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3021       </files>
3022     </component>
3023
3024     <!-- CMSIS-DSP component -->
3025     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.7.0" isDefaultVariant="true" condition="CMSIS DSP">
3026       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3027       <files>
3028         <!-- CPU independent -->
3029         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3030         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3031
3032         <!-- CPU and Compiler dependent -->
3033         <!-- ARMCC -->
3034         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3035         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3036         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3037         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3038         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3039         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3040         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3041         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3042         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3043         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3044         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3045         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3046         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3047         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3048         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3049         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3050
3051         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3052         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3053         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3054         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3055         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3056         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3057         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3058         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3059         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3060         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3061         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3062         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3063         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3064         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3065         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3066         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3067
3068         <!-- GCC -->
3069         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3070         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3071         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3072         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3073         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3074         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3075         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3076         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3077
3078         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3079         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3080         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3081         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3082         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3083         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3084         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3085         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3086         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3087         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3088         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3089         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3090         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3091         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3092         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3093         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3094
3095   <!-- IAR -->
3096         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3097         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3098         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3099         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3100         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3101         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3102         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3103         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3104         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3105         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3106         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3107         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3108         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3109         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3110         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3111         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3112
3113         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3114         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3115         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3116         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3117         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3118         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3119         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3120         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3121         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3122         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3123         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3124         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3125         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3126         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3127         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3128         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3129
3130       </files>
3131     </component>
3132     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.8.0" condition="CMSIS DSP">
3133       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3134       <files>
3135         <!-- CPU independent -->
3136         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3137         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3138
3139         <!-- DSP sources (core) -->
3140         <file category="source" name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3141         <file category="source" name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
3142         <file category="source" name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3143         <file category="source" name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3144         <file category="source" name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3145         <file category="source" name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
3146         <file category="source" name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3147         <file category="source" name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3148         <file category="source" name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3149         <file category="source" name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3150         <file category="source" name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3151         <file category="source" name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
3152         <file category="source" name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3153
3154       </files>
3155     </component>
3156
3157     <!-- CMSIS-NN component -->
3158     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.2.0" condition="CMSIS NN">
3159       <description>CMSIS-NN Neural Network Library</description>
3160       <files>
3161         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3162         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3163
3164         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3165         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3166         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3167         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3168
3169         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3170         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3171         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3172         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3173         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3174         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3175         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3176         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3177         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3178         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3179         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3180         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3181         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
3182
3183         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3184         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3185         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3186         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3187         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3188         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3189
3190         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3191         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3192         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3193         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3194         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3195
3196         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3197
3198         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3199         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3200       </files>
3201     </component>
3202
3203     <!-- CMSIS-RTOS Keil RTX component -->
3204     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3205       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3206       <RTE_Components_h>
3207         <!-- the following content goes into file 'RTE_Components.h' -->
3208         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3209         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3210       </RTE_Components_h>
3211       <files>
3212         <!-- CPU independent -->
3213         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3214         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3215         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3216
3217         <!-- RTX templates -->
3218         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3219         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3220         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3221         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3222         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3223         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3224         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3225         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3226         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3227         <!-- tool-chain specific template file -->
3228         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3229         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3230         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3231
3232         <!-- CPU and Compiler dependent -->
3233         <!-- ARMCC -->
3234         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3235         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3236         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3237         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3238         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3239         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3240         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3241         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3242         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3243         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3244         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3245         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3246         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3247         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3248         <!-- GCC -->
3249         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3250         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3251         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3252         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3253         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3254         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3255         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3256         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3257         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3258         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3259         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3260         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3261         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3262         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3263         <!-- IAR -->
3264         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3265         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3266         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3267         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3268         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3269         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3270         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3271         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3272         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3273         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3274         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3275         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3276         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3277         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3278       </files>
3279     </component>
3280     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3281     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3282       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3283       <RTE_Components_h>
3284         <!-- the following content goes into file 'RTE_Components.h' -->
3285         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3286         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3287       </RTE_Components_h>
3288       <files>
3289         <!-- CPU independent -->
3290         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3291         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3292         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3293
3294         <!-- RTX templates -->
3295         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3296         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3297         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3298         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3299         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3300         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3301         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3302         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3303         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3304         <!-- tool-chain specific template file -->
3305         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3306         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3307         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3308
3309         <!-- CPU and Compiler dependent -->
3310         <!-- ARMCC -->
3311         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3312         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3313         <!-- GCC -->
3314         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3315         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3316         <!-- IAR -->
3317       </files>
3318     </component>
3319
3320     <!-- CMSIS-RTOS Keil RTX5 component -->
3321     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.2" Capiversion="1.0.0" condition="RTOS RTX5">
3322       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3323       <RTE_Components_h>
3324         <!-- the following content goes into file 'RTE_Components.h' -->
3325         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3326         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3327       </RTE_Components_h>
3328       <files>
3329         <!-- RTX header file -->
3330         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3331         <!-- RTX compatibility module for API V1 -->
3332         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3333       </files>
3334     </component>
3335
3336     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3337     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
3338       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
3339       <RTE_Components_h>
3340         <!-- the following content goes into file 'RTE_Components.h' -->
3341         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3342         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3343       </RTE_Components_h>
3344       <files>
3345         <!-- RTX documentation -->
3346         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3347
3348         <!-- RTX header files -->
3349         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3350
3351         <!-- RTX configuration -->
3352         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3353         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3354
3355         <!-- RTX templates -->
3356         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3357         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3358         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3359         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3360         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3361         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3362         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3363         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3364         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3365         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3366
3367         <!-- RTX library configuration -->
3368         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3369
3370         <!-- RTX libraries (CPU and Compiler dependent) -->
3371         <!-- ARMCC -->
3372         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3373         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3374         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3375         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3376         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3377         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3378         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3379         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3380         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3381         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3382         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3383         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3384         <file category="library" condition="CM55_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3385         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3386         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3387         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3388         <!-- GCC -->
3389         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3390         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3391         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3392         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3393         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3394         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3395         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3396         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3397         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3398         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3399         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3400         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3401         <file category="library" condition="CM55_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3402         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3403         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3404         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3405         <!-- IAR -->
3406         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3407         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3408         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3409         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3410         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3411         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3412         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3413         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3414         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3415         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3416         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3417         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3418         <file category="library" condition="CM55_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3419         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3420         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3421         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3422       </files>
3423     </component>
3424     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3425       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
3426       <RTE_Components_h>
3427         <!-- the following content goes into file 'RTE_Components.h' -->
3428         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3429         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3430         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3431       </RTE_Components_h>
3432       <files>
3433         <!-- RTX documentation -->
3434         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3435
3436         <!-- RTX header files -->
3437         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3438
3439         <!-- RTX configuration -->
3440         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3441         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3442
3443         <!-- RTX templates -->
3444         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3445         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3446         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3447         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3448         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3449         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3450         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3451         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3452         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3453         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3454
3455         <!-- RTX library configuration -->
3456         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3457
3458         <!-- RTX libraries (CPU and Compiler dependent) -->
3459         <!-- ARMCC -->
3460         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3461         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3462         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3463         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3464         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3465         <file category="library" condition="CM55_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3466         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3467         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3468         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3469         <!-- GCC -->
3470         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3471         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3472         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3473         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3474         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3475         <file category="library" condition="CM55_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3476         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3477         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3478         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3479         <!-- IAR -->
3480         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3481         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3482         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3483         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3484         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3485         <file category="library" condition="CM55_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3486         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3487         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3488         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3489       </files>
3490     </component>
3491     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3492       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3493       <RTE_Components_h>
3494         <!-- the following content goes into file 'RTE_Components.h' -->
3495         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3496         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3497         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3498       </RTE_Components_h>
3499       <files>
3500         <!-- RTX documentation -->
3501         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3502
3503         <!-- RTX header files -->
3504         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3505
3506         <!-- RTX configuration -->
3507         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3508         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3509
3510         <!-- RTX templates -->
3511         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3512         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3513         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3514         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3515         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3516         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3517         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3518         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3519         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3520         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3521
3522         <!-- RTX sources (core) -->
3523         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3524         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3525         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3526         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3527         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3528         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3529         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3530         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3531         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3532         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3533         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3534         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3535         <!-- RTX sources (library configuration) -->
3536         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3537         <!-- RTX sources (handlers ARMCC) -->
3538         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3539         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3540         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3541         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3542         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3543         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3544         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3545         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3546         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3547         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3548         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3549         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3550         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM55_ARMCC"/>
3551         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3552         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3553         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3554         <!-- RTX sources (handlers GCC) -->
3555         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3556         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3557         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3558         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3559         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3560         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3561         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3562         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3563         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3564         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3565         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3566         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3567         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM55_GCC"/>
3568         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3569         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3570         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3571         <!-- RTX sources (handlers IAR) -->
3572         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3573         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3574         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3575         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3576         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3577         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3578         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3579         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3580         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3581         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3582         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3583         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3584         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM55_IAR"/>
3585         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3586         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3587         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3588         <!-- OS Tick (SysTick) -->
3589         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3590       </files>
3591     </component>
3592     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3593       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3594       <RTE_Components_h>
3595         <!-- the following content goes into file 'RTE_Components.h' -->
3596         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3597         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3598         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3599       </RTE_Components_h>
3600       <files>
3601         <!-- RTX documentation -->
3602         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3603
3604         <!-- RTX header files -->
3605         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3606
3607         <!-- RTX configuration -->
3608         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3609         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3610
3611         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3612
3613         <!-- RTX templates -->
3614         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3615         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3616         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3617         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3618         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3619         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3620         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3621         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3622         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3623         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3624
3625         <!-- RTX sources (core) -->
3626         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3627         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3628         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3629         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3630         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3631         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3632         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3633         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3634         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3635         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3636         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3637         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3638         <!-- RTX sources (library configuration) -->
3639         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3640         <!-- RTX sources (handlers ARMCC) -->
3641         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3642         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3643         <!-- RTX sources (handlers GCC) -->
3644         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3645         <!-- RTX sources (handlers IAR) -->
3646         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3647       </files>
3648     </component>
3649     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3650       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3651       <RTE_Components_h>
3652         <!-- the following content goes into file 'RTE_Components.h' -->
3653         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3654         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3655         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3656         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3657       </RTE_Components_h>
3658       <files>
3659         <!-- RTX documentation -->
3660         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3661
3662         <!-- RTX header files -->
3663         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3664
3665         <!-- RTX configuration -->
3666         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3667         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3668
3669         <!-- RTX templates -->
3670         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3671         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3672         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3673         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3674         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3675         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3676         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3677         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3678         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3679         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3680
3681         <!-- RTX sources (core) -->
3682         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3683         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3684         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3685         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3686         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3687         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3688         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3689         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3690         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3691         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3692         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3693         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3694         <!-- RTX sources (library configuration) -->
3695         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3696         <!-- RTX sources (ARMCC handlers) -->
3697         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3698         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3699         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3700         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3701         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3702         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM55_ARMCC"/>
3703         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3704         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3705         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3706         <!-- RTX sources (GCC handlers) -->
3707         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3708         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3709         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3710         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3711         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3712         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM55_GCC"/>
3713         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3714         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3715         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3716         <!-- RTX sources (IAR handlers) -->
3717         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3718         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3719         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3720         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3721         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3722         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM55_IAR"/>
3723         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3724         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3725         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3726         <!-- OS Tick (SysTick) -->
3727         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3728       </files>
3729     </component>
3730
3731     <!-- CMSIS-Driver Custom components -->
3732     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3733       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3734       <files>
3735         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3736         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3737       </files>
3738     </component>
3739     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3740       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3741       <files>
3742         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3743         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3744       </files>
3745     </component>
3746     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3747       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3748       <files>
3749         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3750         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3751       </files>
3752     </component>
3753     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3754       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3755       <files>
3756         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3757         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3758       </files>
3759     </component>
3760     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3761       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3762       <files>
3763         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3764         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3765       </files>
3766     </component>
3767     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3768       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3769       <files>
3770         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3771         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3772       </files>
3773     </component>
3774     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3775       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3776       <files>
3777         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3778         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3779       </files>
3780     </component>
3781     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3782       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3783       <files>
3784         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3785         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3786       </files>
3787     </component>
3788     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3789       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3790       <files>
3791         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3792         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3793         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3794         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3795       </files>
3796     </component>
3797     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3798       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3799       <files>
3800         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3801         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3802       </files>
3803     </component>
3804     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3805       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3806       <files>
3807         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3808         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3809       </files>
3810     </component>
3811     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3812       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3813       <files>
3814         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3815         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3816       </files>
3817     </component>
3818     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3819       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3820       <files>
3821         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3822         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3823       </files>
3824     </component>
3825     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3826       <description>Access to #include Driver_WiFi.h file</description>
3827       <files>
3828         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3829         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3830       </files>
3831     </component>
3832   </components>
3833
3834   <boards>
3835     <board name="uVision Simulator" vendor="Keil">
3836       <description>uVision Simulator</description>
3837       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3838       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3839       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3840       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3841       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3842       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3843       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3844       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3845       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3846       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3847       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3848       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3849       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3850       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3851       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3852       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3853       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3854       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3855       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3856       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3857       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3858       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3859       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3860       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3861     </board>
3862
3863     <board name="EWARM Simulator" vendor="IAR">
3864       <description>EWARM Simulator</description>
3865       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3866       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3867       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3868       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3869       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3870       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3871       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3872       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3873       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3874       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3875       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3876       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3877       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3878       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3879       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3880       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3881       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3882       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3883       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3884       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3885       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3886       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3887       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3888       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3889     </board>
3890   </boards>
3891
3892   <examples>
3893     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3894       <description>DSP_Lib Class Marks example</description>
3895       <board name="uVision Simulator" vendor="Keil"/>
3896       <project>
3897         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3898       </project>
3899       <attributes>
3900         <component Cclass="CMSIS" Cgroup="CORE"/>
3901         <component Cclass="CMSIS" Cgroup="DSP"/>
3902         <component Cclass="Device" Cgroup="Startup"/>
3903         <category>Getting Started</category>
3904       </attributes>
3905     </example>
3906
3907     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3908       <description>DSP_Lib Convolution example</description>
3909       <board name="uVision Simulator" vendor="Keil"/>
3910       <project>
3911         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3912       </project>
3913       <attributes>
3914         <component Cclass="CMSIS" Cgroup="CORE"/>
3915         <component Cclass="CMSIS" Cgroup="DSP"/>
3916         <component Cclass="Device" Cgroup="Startup"/>
3917         <category>Getting Started</category>
3918       </attributes>
3919     </example>
3920
3921     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3922       <description>DSP_Lib Dotproduct example</description>
3923       <board name="uVision Simulator" vendor="Keil"/>
3924       <project>
3925         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3926       </project>
3927       <attributes>
3928         <component Cclass="CMSIS" Cgroup="CORE"/>
3929         <component Cclass="CMSIS" Cgroup="DSP"/>
3930         <component Cclass="Device" Cgroup="Startup"/>
3931         <category>Getting Started</category>
3932       </attributes>
3933     </example>
3934
3935     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3936       <description>DSP_Lib FFT Bin example</description>
3937       <board name="uVision Simulator" vendor="Keil"/>
3938       <project>
3939         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3940       </project>
3941       <attributes>
3942         <component Cclass="CMSIS" Cgroup="CORE"/>
3943         <component Cclass="CMSIS" Cgroup="DSP"/>
3944         <component Cclass="Device" Cgroup="Startup"/>
3945         <category>Getting Started</category>
3946       </attributes>
3947     </example>
3948
3949     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3950       <description>DSP_Lib FIR example</description>
3951       <board name="uVision Simulator" vendor="Keil"/>
3952       <project>
3953         <environment name="uv" load="arm_fir_example.uvprojx"/>
3954       </project>
3955       <attributes>
3956         <component Cclass="CMSIS" Cgroup="CORE"/>
3957         <component Cclass="CMSIS" Cgroup="DSP"/>
3958         <component Cclass="Device" Cgroup="Startup"/>
3959         <category>Getting Started</category>
3960       </attributes>
3961     </example>
3962
3963     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3964       <description>DSP_Lib Graphic Equalizer example</description>
3965       <board name="uVision Simulator" vendor="Keil"/>
3966       <project>
3967         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3968       </project>
3969       <attributes>
3970         <component Cclass="CMSIS" Cgroup="CORE"/>
3971         <component Cclass="CMSIS" Cgroup="DSP"/>
3972         <component Cclass="Device" Cgroup="Startup"/>
3973         <category>Getting Started</category>
3974       </attributes>
3975     </example>
3976
3977     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3978       <description>DSP_Lib Linear Interpolation example</description>
3979       <board name="uVision Simulator" vendor="Keil"/>
3980       <project>
3981         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3982       </project>
3983       <attributes>
3984         <component Cclass="CMSIS" Cgroup="CORE"/>
3985         <component Cclass="CMSIS" Cgroup="DSP"/>
3986         <component Cclass="Device" Cgroup="Startup"/>
3987         <category>Getting Started</category>
3988       </attributes>
3989     </example>
3990
3991     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3992       <description>DSP_Lib Matrix example</description>
3993       <board name="uVision Simulator" vendor="Keil"/>
3994       <project>
3995         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3996       </project>
3997       <attributes>
3998         <component Cclass="CMSIS" Cgroup="CORE"/>
3999         <component Cclass="CMSIS" Cgroup="DSP"/>
4000         <component Cclass="Device" Cgroup="Startup"/>
4001         <category>Getting Started</category>
4002       </attributes>
4003     </example>
4004
4005     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4006       <description>DSP_Lib Signal Convergence example</description>
4007       <board name="uVision Simulator" vendor="Keil"/>
4008       <project>
4009         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4010       </project>
4011       <attributes>
4012         <component Cclass="CMSIS" Cgroup="CORE"/>
4013         <component Cclass="CMSIS" Cgroup="DSP"/>
4014         <component Cclass="Device" Cgroup="Startup"/>
4015         <category>Getting Started</category>
4016       </attributes>
4017     </example>
4018
4019     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4020       <description>DSP_Lib Sinus/Cosinus example</description>
4021       <board name="uVision Simulator" vendor="Keil"/>
4022       <project>
4023         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4024       </project>
4025       <attributes>
4026         <component Cclass="CMSIS" Cgroup="CORE"/>
4027         <component Cclass="CMSIS" Cgroup="DSP"/>
4028         <component Cclass="Device" Cgroup="Startup"/>
4029         <category>Getting Started</category>
4030       </attributes>
4031     </example>
4032
4033     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4034       <description>DSP_Lib Variance example</description>
4035       <board name="uVision Simulator" vendor="Keil"/>
4036       <project>
4037         <environment name="uv" load="arm_variance_example.uvprojx"/>
4038       </project>
4039       <attributes>
4040         <component Cclass="CMSIS" Cgroup="CORE"/>
4041         <component Cclass="CMSIS" Cgroup="DSP"/>
4042         <component Cclass="Device" Cgroup="Startup"/>
4043         <category>Getting Started</category>
4044       </attributes>
4045     </example>
4046
4047     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4048       <description>Neural Network CIFAR10 example</description>
4049       <board name="uVision Simulator" vendor="Keil"/>
4050       <project>
4051         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4052       </project>
4053       <attributes>
4054         <component Cclass="CMSIS" Cgroup="CORE"/>
4055         <component Cclass="CMSIS" Cgroup="DSP"/>
4056         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4057         <component Cclass="Device" Cgroup="Startup"/>
4058         <category>Getting Started</category>
4059       </attributes>
4060     </example>
4061
4062     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4063       <description>Neural Network CIFAR10 example</description>
4064       <board name="EWARM Simulator" vendor="IAR"/>
4065       <project>
4066         <environment name="iar" load="NN-example-cifar10.ewp"/>
4067       </project>
4068       <attributes>
4069         <component Cclass="CMSIS" Cgroup="CORE"/>
4070         <component Cclass="CMSIS" Cgroup="DSP"/>
4071         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4072         <component Cclass="Device" Cgroup="Startup"/>
4073         <category>Getting Started</category>
4074       </attributes>
4075     </example>
4076
4077     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4078       <description>Neural Network GRU example</description>
4079       <board name="uVision Simulator" vendor="Keil"/>
4080       <project>
4081         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4082       </project>
4083       <attributes>
4084         <component Cclass="CMSIS" Cgroup="CORE"/>
4085         <component Cclass="CMSIS" Cgroup="DSP"/>
4086         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4087         <component Cclass="Device" Cgroup="Startup"/>
4088         <category>Getting Started</category>
4089       </attributes>
4090     </example>
4091
4092     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4093       <description>Neural Network GRU example</description>
4094       <board name="EWARM Simulator" vendor="IAR"/>
4095       <project>
4096         <environment name="iar" load="NN-example-gru.ewp"/>
4097       </project>
4098       <attributes>
4099         <component Cclass="CMSIS" Cgroup="CORE"/>
4100         <component Cclass="CMSIS" Cgroup="DSP"/>
4101         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4102         <component Cclass="Device" Cgroup="Startup"/>
4103         <category>Getting Started</category>
4104       </attributes>
4105     </example>
4106
4107     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4108       <description>CMSIS-RTOS2 Blinky example</description>
4109       <board name="uVision Simulator" vendor="Keil"/>
4110       <project>
4111         <environment name="uv" load="Blinky.uvprojx"/>
4112       </project>
4113       <attributes>
4114         <component Cclass="CMSIS" Cgroup="CORE"/>
4115         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4116         <component Cclass="Device" Cgroup="Startup"/>
4117         <category>Getting Started</category>
4118       </attributes>
4119     </example>
4120
4121     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4122       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4123       <board name="uVision Simulator" vendor="Keil"/>
4124       <project>
4125         <environment name="uv" load="Blinky.uvprojx"/>
4126       </project>
4127       <attributes>
4128         <component Cclass="CMSIS" Cgroup="CORE"/>
4129         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4130         <component Cclass="Device" Cgroup="Startup"/>
4131         <category>Getting Started</category>
4132       </attributes>
4133     </example>
4134
4135     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4136       <description>CMSIS-RTOS2 Message Queue Example</description>
4137       <board name="uVision Simulator" vendor="Keil"/>
4138       <project>
4139         <environment name="uv" load="MsqQueue.uvprojx"/>
4140       </project>
4141       <attributes>
4142         <component Cclass="CMSIS" Cgroup="CORE"/>
4143         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4144         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4145         <component Cclass="Device" Cgroup="Startup"/>
4146         <category>Getting Started</category>
4147       </attributes>
4148     </example>
4149
4150     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4151       <description>CMSIS-RTOS2 Memory Pool Example</description>
4152       <board name="uVision Simulator" vendor="Keil"/>
4153       <project>
4154         <environment name="uv" load="MemPool.uvprojx"/>
4155       </project>
4156       <attributes>
4157         <component Cclass="CMSIS" Cgroup="CORE"/>
4158         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4159         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4160         <component Cclass="Device" Cgroup="Startup"/>
4161         <category>Getting Started</category>
4162       </attributes>
4163     </example>
4164
4165     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4166       <description>Bare-metal secure/non-secure example without RTOS</description>
4167       <board name="uVision Simulator" vendor="Keil"/>
4168       <project>
4169         <environment name="uv" load="NoRTOS.uvmpw"/>
4170       </project>
4171       <attributes>
4172         <component Cclass="CMSIS" Cgroup="CORE"/>
4173         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4174         <component Cclass="Device" Cgroup="Startup"/>
4175         <category>Getting Started</category>
4176       </attributes>
4177     </example>
4178
4179     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4180       <description>Secure/non-secure RTOS example with thread context management</description>
4181       <board name="uVision Simulator" vendor="Keil"/>
4182       <project>
4183         <environment name="uv" load="RTOS.uvmpw"/>
4184       </project>
4185       <attributes>
4186         <component Cclass="CMSIS" Cgroup="CORE"/>
4187         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4188         <component Cclass="Device" Cgroup="Startup"/>
4189         <category>Getting Started</category>
4190       </attributes>
4191     </example>
4192
4193     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4194       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4195       <board name="uVision Simulator" vendor="Keil"/>
4196       <project>
4197         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4198       </project>
4199       <attributes>
4200         <component Cclass="CMSIS" Cgroup="CORE"/>
4201         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4202         <component Cclass="Device" Cgroup="Startup"/>
4203         <category>Getting Started</category>
4204       </attributes>
4205     </example>
4206
4207   </examples>
4208
4209 </package>