begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.3.1-dev2">
  12       CMSIS-RTOS2:
  13         - RTX 5.4.0 (see revision history for details)
  14     </release>
  15     <release version="5.3.1-dev1">
  16       CMSIS-Core(M): 5.1.2 (see revision history for details)
  17       CMSIS-Core(A): 1.1.2 (see revision history for details)
  18       CMSIS-RTOS2:
  19         - RTX 5.3.1 (see revision history for details)
  20       CMSIS-Driver:
  21         - Flash Driver API V2.2.0
  22     </release>
  23     <release version="5.3.1-dev0">
  24       Patch release scheduled for after EW18.
  25     </release>
  26     <release version="5.3.0" date="2018-02-22">
  27       Updated Arm company brand.
  28       CMSIS-Core(M): 5.1.1 (see revision history for details)
  29       CMSIS-Core(A): 1.1.1 (see revision history for details)
  30       CMSIS-DAP: 2.0.0 (see revision history for details)
  31       CMSIS-NN: 1.0.0
  32         - Initial contribution of the bare metal Neural Network Library.
  33       CMSIS-RTOS2:
  34         - RTX 5.3.0 (see revision history for details)
  35         - OS Tick API 1.0.1
  36     </release>
  37     <release version="5.2.0" date="2017-11-16">
  38       CMSIS-Core(M): 5.1.0 (see revision history for details)
  39         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  40         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  41       CMSIS-Core(A): 1.1.0 (see revision history for details)
  42         - Added compiler_iccarm.h.
  43         - Added additional access functions for physical timer.
  44       CMSIS-DAP: 1.2.0 (see revision history for details)
  45       CMSIS-DSP: 1.5.2 (see revision history for details)
  46       CMSIS-Driver: 2.6.0 (see revision history for details)
  47         - CAN Driver API V1.2.0
  48         - NAND Driver API V2.3.0
  49       CMSIS-RTOS:
  50         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
  51       CMSIS-RTOS2:
  52         - API 2.1.2 (see revision history for details)
  53         - RTX 5.2.3 (see revision history for details)
  54       Devices:
  55         - Added GCC startup and linker script for Cortex-A9.
  56         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
  57         - Added IAR startup code for Cortex-A9
  58     </release>
  59     <release version="5.1.1" date="2017-09-19">
  60       CMSIS-RTOS2:
  61       - RTX 5.2.1 (see revision history for details)
  62     </release>
  63     <release version="5.1.0" date="2017-08-04">
  64       CMSIS-Core(M): 5.0.2 (see revision history for details)
  65       - Changed Version Control macros to be core agnostic.
  66       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  67       CMSIS-Core(A): 1.0.0 (see revision history for details)
  68       - Initial release
  69       - IRQ Controller API 1.0.0
  70       CMSIS-Driver: 2.05 (see revision history for details)
  71       - All typedefs related to status have been made volatile.
  72       CMSIS-RTOS2:
  73       - API 2.1.1 (see revision history for details)
  74       - RTX 5.2.0 (see revision history for details)
  75       - OS Tick API 1.0.0
  76       CMSIS-DSP: 1.5.2 (see revision history for details)
  77       - Fixed GNU Compiler specific diagnostics.
  78       CMSIS-PACK: 1.5.0 (see revision history for details)
  79       - added System Description File (*.SDF) Format
  80       CMSIS-Zone: 0.0.1 (Preview)
  81       - Initial specification draft
  82     </release>
  83     <release version="5.0.1" date="2017-02-03">
  84       Package Description:
  85       - added taxonomy for Cclass RTOS
  86       CMSIS-RTOS2:
  87       - API 2.1   (see revision history for details)
  88       - RTX 5.1.0 (see revision history for details)
  89       CMSIS-Core: 5.0.1 (see revision history for details)
  90       - Added __PACKED_STRUCT macro
  91       - Added uVisior support
  92       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  93       - Updated template for secure main function (main_s.c)
  94       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  95       CMSIS-DSP: 1.5.1 (see revision history for details)
  96       - added ARMv8M DSP libraries.
  97       CMSIS-PACK:1.4.9 (see revision history for details)
  98       - added Pack Index File specification and schema file
  99     </release>
 100     <release version="5.0.0" date="2016-11-11">
 101       Changed open source license to Apache 2.0
 102       CMSIS_Core:
 103        - Added support for Cortex-M23 and Cortex-M33.
 104        - Added ARMv8-M device configurations for mainline and baseline.
 105        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 106        - Added cmsis_compiler.h to unify compiler behaviour.
 107        - Updated function SCB_EnableICache (for Cortex-M7).
 108        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 109       CMSIS-RTOS:
 110         - bug fix in RTX 4.82 (see revision history for details)
 111       CMSIS-RTOS2:
 112         - new API including compatibility layer to CMSIS-RTOS
 113         - reference implementation based on RTX5
 114         - supports all Cortex-M variants including TrustZone for ARMv8-M
 115       CMSIS-SVD:
 116        - reworked SVD format documentation
 117        - removed SVD file database documentation as SVD files are distributed in packs
 118        - updated SVDConv for Win32 and Linux
 119       CMSIS-DSP:
 120        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 121        - Added DSP libraries build projects to CMSIS pack.
 122     </release>
 123     <release version="4.5.0" date="2015-10-28">
 124       - CMSIS-Core     4.30.0  (see revision history for details)
 125       - CMSIS-DAP      1.1.0   (unchanged)
 126       - CMSIS-Driver   2.04.0  (see revision history for details)
 127       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 128       - CMSIS-PACK     1.4.1   (see revision history for details)
 129       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 130       - CMSIS-SVD      1.3.1   (see revision history for details)
 131     </release>
 132     <release version="4.4.0" date="2015-09-11">
 133       - CMSIS-Core     4.20   (see revision history for details)
 134       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 135       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 136       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 137       - CMSIS-RTOS
 138         -- API         1.02   (unchanged)
 139         -- RTX         4.79   (see revision history for details)
 140       - CMSIS-SVD      1.3.0  (see revision history for details)
 141       - CMSIS-DAP      1.1.0  (extended with SWO support)
 142     </release>
 143     <release version="4.3.0" date="2015-03-20">
 144       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 145       - CMSIS-DSP      1.4.5  (see revision history for details)
 146       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 147       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 148       - CMSIS-RTOS
 149         -- API         1.02   (unchanged)
 150         -- RTX         4.78   (see revision history for details)
 151       - CMSIS-SVD      1.2    (unchanged)
 152     </release>
 153     <release version="4.2.0" date="2014-09-24">
 154       Adding Cortex-M7 support
 155       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 156       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 157       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 158       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 159       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 160     </release>
 161     <release version="4.1.1" date="2014-06-30">
 162       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 163     </release>
 164     <release version="4.1.0" date="2014-06-12">
 165       - CMSIS-Driver   2.02  (incompatible update)
 166       - CMSIS-Pack     1.3   (see revision history for details)
 167       - CMSIS-DSP      1.4.2 (unchanged)
 168       - CMSIS-Core     3.30  (unchanged)
 169       - CMSIS-RTOS RTX 4.74  (unchanged)
 170       - CMSIS-RTOS API 1.02  (unchanged)
 171       - CMSIS-SVD      1.10  (unchanged)
 172       PACK:
 173       - removed G++ specific files from PACK
 174       - added Component Startup variant "C Startup"
 175       - added Pack Checking Utility
 176       - updated conditions to reflect tool-chain dependency
 177       - added Taxonomy for Graphics
 178       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 179     </release>
 180     <release version="4.0.0">
 181       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 182       - CMSIS-Pack     1.1   Preliminary
 183       - CMSIS-DSP      1.4.2 (see revision history for details)
 184       - CMSIS-Core     3.30  (see revision history for details)
 185       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 186       - CMSIS-RTOS API 1.02  (unchanged)
 187       - CMSIS-SVD      1.10  (unchanged)
 188     </release>
 189     <release version="3.20.4">
 190       - CMSIS-RTOS 4.74 (see revision history for details)
 191       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 192     </release>
 193     <release version="3.20.3">
 194       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 195       - CMSIS-RTOS 4.73 (see revision history for details)
 196     </release>
 197     <release version="3.20.2">
 198       - CMSIS-Pack documentation has been added
 199       - CMSIS-Drivers header and documentation have been added to PACK
 200       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 201     </release>
 202     <release version="3.20.1">
 203       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 204       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 205     </release>
 206     <release version="3.20.0">
 207       The software portions that are deployed in the application program are now under a BSD license which allows usage
 208       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 209       The individual components have been update as listed below:
 210       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 211       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 212       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 213       - CMSIS-SVD is unchanged.
 214     </release>
 215   </releases>
 216
 217   <taxonomy>
 218     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 219     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 220     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 221     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 222     <description Cclass="File System">File Drive Support and File System</description>
 223     <description Cclass="Graphics">Graphical User Interface</description>
 224     <description Cclass="Network">Network Stack using Internet Protocols</description>
 225     <description Cclass="USB">Universal Serial Bus Stack</description>
 226     <description Cclass="Compiler">Compiler Software Extensions</description>
 227     <description Cclass="RTOS">Real-time Operating System</description>
 228   </taxonomy>
 229
 230   <devices>
 231     <!-- ******************************  Cortex-M0  ****************************** -->
 232     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 233       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 234       <description>
 235 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 236 - simple, easy-to-use programmers model
 237 - highly efficient ultra-low power operation
 238 - excellent code density
 239 - deterministic, high-performance interrupt handling
 240 - upward compatibility with the rest of the Cortex-M processor family.
 241       </description>
 242       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 243       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 244       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 245       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 246
 247       <device Dname="ARMCM0">
 248         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 249         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 250       </device>
 251     </family>
 252
 253     <!-- ******************************  Cortex-M0P  ****************************** -->
 254     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 255       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 256       <description>
 257 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 258 - simple, easy-to-use programmers model
 259 - highly efficient ultra-low power operation
 260 - excellent code density
 261 - deterministic, high-performance interrupt handling
 262 - upward compatibility with the rest of the Cortex-M processor family.
 263       </description>
 264       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 265       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 266       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 267       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 268
 269       <device Dname="ARMCM0P">
 270         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 271         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 272       </device>
 273
 274       <device Dname="ARMCM0P_MPU">
 275         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 276         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 277       </device>
 278     </family>
 279
 280     <!-- ******************************  Cortex-M3  ****************************** -->
 281     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 282       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 283       <description>
 284 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 285 - simple, easy-to-use programmers model
 286 - highly efficient ultra-low power operation
 287 - excellent code density
 288 - deterministic, high-performance interrupt handling
 289 - upward compatibility with the rest of the Cortex-M processor family.
 290       </description>
 291       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 292       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 293       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 294       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 295
 296       <device Dname="ARMCM3">
 297         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 298         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 299       </device>
 300     </family>
 301
 302     <!-- ******************************  Cortex-M4  ****************************** -->
 303     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 304       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 305       <description>
 306 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 307 - simple, easy-to-use programmers model
 308 - highly efficient ultra-low power operation
 309 - excellent code density
 310 - deterministic, high-performance interrupt handling
 311 - upward compatibility with the rest of the Cortex-M processor family.
 312       </description>
 313       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 314       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 315       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 316       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 317
 318       <device Dname="ARMCM4">
 319         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 320         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 321       </device>
 322
 323       <device Dname="ARMCM4_FP">
 324         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 325         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 326       </device>
 327     </family>
 328
 329     <!-- ******************************  Cortex-M7  ****************************** -->
 330     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 331       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 332       <description>
 333 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 334 - simple, easy-to-use programmers model
 335 - highly efficient ultra-low power operation
 336 - excellent code density
 337 - deterministic, high-performance interrupt handling
 338 - upward compatibility with the rest of the Cortex-M processor family.
 339       </description>
 340       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 341       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 342       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 343       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 344
 345       <device Dname="ARMCM7">
 346         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 347         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 348       </device>
 349
 350       <device Dname="ARMCM7_SP">
 351         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 352         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 353       </device>
 354
 355       <device Dname="ARMCM7_DP">
 356         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 357         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 358       </device>
 359     </family>
 360
 361     <!-- ******************************  Cortex-M23  ********************** -->
 362     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 363       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 364       <description>
 365 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 366 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 367 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 368       </description>
 369       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 370       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 371       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 372       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 373       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 374       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 375
 376       <device Dname="ARMCM23">
 377         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 378         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 379       </device>
 380
 381       <device Dname="ARMCM23_TZ">
 382         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 383         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 384       </device>
 385     </family>
 386
 387     <!-- ******************************  Cortex-M33  ****************************** -->
 388     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 389       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 390       <description>
 391 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 392 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 393       </description>
 394       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 395       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 396       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 397       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 398       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 399       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 400
 401       <device Dname="ARMCM33">
 402         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 403         <description>
 404           no DSP Instructions, no Floating Point Unit, no TrustZone
 405         </description>
 406         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 407       </device>
 408
 409       <device Dname="ARMCM33_TZ">
 410         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 411         <description>
 412           no DSP Instructions, no Floating Point Unit, TrustZone
 413         </description>
 414         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 415       </device>
 416
 417       <device Dname="ARMCM33_DSP_FP">
 418         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 419         <description>
 420           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 421         </description>
 422         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 423       </device>
 424
 425       <device Dname="ARMCM33_DSP_FP_TZ">
 426         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 427         <description>
 428           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 429         </description>
 430         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 431       </device>
 432     </family>
 433
 434     <!-- ******************************  ARMSC000  ****************************** -->
 435     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 436       <description>
 437 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 438 - simple, easy-to-use programmers model
 439 - highly efficient ultra-low power operation
 440 - excellent code density
 441 - deterministic, high-performance interrupt handling
 442       </description>
 443       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 444       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 445       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 446       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 447
 448       <device Dname="ARMSC000">
 449         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 450         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 451       </device>
 452     </family>
 453
 454     <!-- ******************************  ARMSC300  ****************************** -->
 455     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 456       <description>
 457 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 458 - simple, easy-to-use programmers model
 459 - highly efficient ultra-low power operation
 460 - excellent code density
 461 - deterministic, high-performance interrupt handling
 462       </description>
 463       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 464       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 465       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 466       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 467
 468       <device Dname="ARMSC300">
 469         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 470         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 471       </device>
 472     </family>
 473
 474     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 475     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 476       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 477       <description>
 478 Armv8-M Baseline based device with TrustZone
 479       </description>
 480       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 481       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 482       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 483       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 484       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 485       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 486
 487       <device Dname="ARMv8MBL">
 488         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 489         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 490       </device>
 491     </family>
 492
 493     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 494     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 495       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 496       <description>
 497 Armv8-M Mainline based device with TrustZone
 498       </description>
 499       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 500       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 501       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 502       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 503       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 504       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 505
 506       <device Dname="ARMv8MML">
 507         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 508         <description>
 509           no DSP Instructions, no Floating Point Unit, TrustZone
 510         </description>
 511         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 512       </device>
 513
 514       <device Dname="ARMv8MML_DSP">
 515         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 516         <description>
 517           DSP Instructions, no Floating Point Unit, TrustZone
 518         </description>
 519         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 520       </device>
 521
 522       <device Dname="ARMv8MML_SP">
 523         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 524         <description>
 525           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 526         </description>
 527         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 528       </device>
 529
 530       <device Dname="ARMv8MML_DSP_SP">
 531         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 532         <description>
 533           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 534         </description>
 535         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 536       </device>
 537
 538       <device Dname="ARMv8MML_DP">
 539         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 540         <description>
 541           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 542         </description>
 543         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 544       </device>
 545
 546       <device Dname="ARMv8MML_DSP_DP">
 547         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 548         <description>
 549           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 550         </description>
 551         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 552       </device>
 553     </family>
 554
 555     <!-- ******************************  Cortex-A5  ****************************** -->
 556     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 557       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 558       <description>
 559 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 560 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 561 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 562       </description>
 563
 564       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 565       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 566
 567       <device Dname="ARMCA5">
 568         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 569         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 570       </device>
 571     </family>
 572
 573     <!-- ******************************  Cortex-A7  ****************************** -->
 574     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 575       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 576       <description>
 577 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 578 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 579 an optional integrated GIC, and an optional L2 cache controller.
 580       </description>
 581
 582       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 583       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 584
 585       <device Dname="ARMCA7">
 586         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 587         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 588       </device>
 589     </family>
 590
 591     <!-- ******************************  Cortex-A9  ****************************** -->
 592     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 593       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 594       <description>
 595 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 596 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 597 and 8-bit Java bytecodes in Jazelle state.
 598       </description>
 599
 600       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 601       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 602
 603       <device Dname="ARMCA9">
 604         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 605         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 606       </device>
 607     </family>
 608   </devices>
 609
 610
 611   <apis>
 612     <!-- CMSIS Device API -->
 613     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 614       <description>Device interrupt controller interface</description>
 615       <files>
 616         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 617       </files>
 618     </api>
 619     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 620       <description>RTOS Kernel system tick timer interface</description>
 621       <files>
 622         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 623       </files>
 624     </api>
 625     <!-- CMSIS-RTOS API -->
 626     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 627       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 628       <files>
 629         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 630       </files>
 631     </api>
 632     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.2" exclusive="1">
 633       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 634       <files>
 635         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 636         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 637       </files>
 638     </api>
 639     <!-- CMSIS Driver API -->
 640     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 641       <description>USART Driver API for Cortex-M</description>
 642       <files>
 643         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 644         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 645       </files>
 646     </api>
 647     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 648       <description>SPI Driver API for Cortex-M</description>
 649       <files>
 650         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 651         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 652       </files>
 653     </api>
 654     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 655       <description>SAI Driver API for Cortex-M</description>
 656       <files>
 657         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 658         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 659       </files>
 660     </api>
 661     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 662       <description>I2C Driver API for Cortex-M</description>
 663       <files>
 664         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 665         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 666       </files>
 667     </api>
 668     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 669       <description>CAN Driver API for Cortex-M</description>
 670       <files>
 671         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 672         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 673       </files>
 674     </api>
 675     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 676       <description>Flash Driver API for Cortex-M</description>
 677       <files>
 678         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 679         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 680       </files>
 681     </api>
 682     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 683       <description>MCI Driver API for Cortex-M</description>
 684       <files>
 685         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 686         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 687       </files>
 688     </api>
 689     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 690       <description>NAND Flash Driver API for Cortex-M</description>
 691       <files>
 692         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 693         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 694       </files>
 695     </api>
 696     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 697       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 698       <files>
 699         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 700         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 701         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 702       </files>
 703     </api>
 704     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 705       <description>Ethernet MAC Driver API for Cortex-M</description>
 706       <files>
 707         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 708         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 709       </files>
 710     </api>
 711     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 712       <description>Ethernet PHY Driver API for Cortex-M</description>
 713       <files>
 714         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 715         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 716       </files>
 717     </api>
 718     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 719       <description>USB Device Driver API for Cortex-M</description>
 720       <files>
 721         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 722         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 723       </files>
 724     </api>
 725     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 726       <description>USB Host Driver API for Cortex-M</description>
 727       <files>
 728         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 729         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 730       </files>
 731     </api>
 732   </apis>
 733
 734   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 735   <conditions>
 736     <!-- compiler -->
 737     <condition id="ARMCC6">
 738       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 739       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 740     </condition>
 741     <condition id="ARMCC5">
 742       <require Tcompiler="ARMCC" Toptions="AC5"/>
 743     </condition>
 744     <condition id="ARMCC">
 745       <require Tcompiler="ARMCC"/>
 746     </condition>
 747     <condition id="GCC">
 748       <require Tcompiler="GCC"/>
 749     </condition>
 750     <condition id="IAR">
 751       <require Tcompiler="IAR"/>
 752     </condition>
 753     <condition id="ARMCC GCC">
 754       <accept Tcompiler="ARMCC"/>
 755       <accept Tcompiler="GCC"/>
 756     </condition>
 757     <condition id="ARMCC GCC IAR">
 758       <accept Tcompiler="ARMCC"/>
 759       <accept Tcompiler="GCC"/>
 760       <accept Tcompiler="IAR"/>
 761     </condition>
 762
 763     <!-- Arm architecture -->
 764     <condition id="ARMv6-M Device">
 765       <description>Armv6-M architecture based device</description>
 766       <accept Dcore="Cortex-M0"/>
 767       <accept Dcore="Cortex-M0+"/>
 768       <accept Dcore="SC000"/>
 769     </condition>
 770     <condition id="ARMv7-M Device">
 771       <description>Armv7-M architecture based device</description>
 772       <accept Dcore="Cortex-M3"/>
 773       <accept Dcore="Cortex-M4"/>
 774       <accept Dcore="Cortex-M7"/>
 775       <accept Dcore="SC300"/>
 776     </condition>
 777     <condition id="ARMv8-M Device">
 778       <description>Armv8-M architecture based device</description>
 779       <accept Dcore="ARMV8MBL"/>
 780       <accept Dcore="ARMV8MML"/>
 781       <accept Dcore="Cortex-M23"/>
 782       <accept Dcore="Cortex-M33"/>
 783     </condition>
 784     <condition id="ARMv8-M TZ Device">
 785       <description>Armv8-M architecture based device with TrustZone</description>
 786       <require condition="ARMv8-M Device"/>
 787       <require Dtz="TZ"/>
 788     </condition>
 789     <condition id="ARMv6_7-M Device">
 790       <description>Armv6_7-M architecture based device</description>
 791       <accept condition="ARMv6-M Device"/>
 792       <accept condition="ARMv7-M Device"/>
 793     </condition>
 794     <condition id="ARMv6_7_8-M Device">
 795       <description>Armv6_7_8-M architecture based device</description>
 796       <accept condition="ARMv6-M Device"/>
 797       <accept condition="ARMv7-M Device"/>
 798       <accept condition="ARMv8-M Device"/>
 799     </condition>
 800     <condition id="ARMv7-A Device">
 801       <description>Armv7-A architecture based device</description>
 802       <accept Dcore="Cortex-A5"/>
 803       <accept Dcore="Cortex-A7"/>
 804       <accept Dcore="Cortex-A9"/>
 805     </condition>
 806
 807     <!-- ARM core -->
 808     <condition id="CM0">
 809       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 810       <accept Dcore="Cortex-M0"/>
 811       <accept Dcore="Cortex-M0+"/>
 812       <accept Dcore="SC000"/>
 813     </condition>
 814     <condition id="CM3">
 815       <description>Cortex-M3 or SC300 processor based device</description>
 816       <accept Dcore="Cortex-M3"/>
 817       <accept Dcore="SC300"/>
 818     </condition>
 819     <condition id="CM4">
 820       <description>Cortex-M4 processor based device</description>
 821       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 822     </condition>
 823     <condition id="CM4_FP">
 824       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 825       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 826       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 827       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 828     </condition>
 829     <condition id="CM7">
 830       <description>Cortex-M7 processor based device</description>
 831       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 832     </condition>
 833     <condition id="CM7_FP">
 834       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 835       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 836       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 837     </condition>
 838     <condition id="CM7_SP">
 839       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 840       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 841     </condition>
 842     <condition id="CM7_DP">
 843       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 844       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 845     </condition>
 846     <condition id="CM23">
 847       <description>Cortex-M23 processor based device</description>
 848       <require Dcore="Cortex-M23"/>
 849     </condition>
 850     <condition id="CM33">
 851       <description>Cortex-M33 processor based device</description>
 852       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 853     </condition>
 854     <condition id="CM33_FP">
 855       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 856       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 857     </condition>
 858     <condition id="ARMv8MBL">
 859       <description>Armv8-M Baseline processor based device</description>
 860       <require Dcore="ARMV8MBL"/>
 861     </condition>
 862     <condition id="ARMv8MML">
 863       <description>Armv8-M Mainline processor based device</description>
 864       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 865     </condition>
 866     <condition id="ARMv8MML_FP">
 867       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
 868       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 869       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 870     </condition>
 871
 872     <condition id="CM33_NODSP_NOFPU">
 873       <description>CM33, no DSP, no FPU</description>
 874       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 875     </condition>
 876     <condition id="CM33_DSP_NOFPU">
 877       <description>CM33, DSP, no FPU</description>
 878       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 879     </condition>
 880     <condition id="CM33_NODSP_SP">
 881       <description>CM33, no DSP, SP FPU</description>
 882       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 883     </condition>
 884     <condition id="CM33_DSP_SP">
 885       <description>CM33, DSP, SP FPU</description>
 886       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 887     </condition>
 888
 889     <condition id="ARMv8MML_NODSP_NOFPU">
 890       <description>Armv8-M Mainline, no DSP, no FPU</description>
 891       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 892     </condition>
 893     <condition id="ARMv8MML_DSP_NOFPU">
 894       <description>Armv8-M Mainline, DSP, no FPU</description>
 895       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 896     </condition>
 897     <condition id="ARMv8MML_NODSP_SP">
 898       <description>Armv8-M Mainline, no DSP, SP FPU</description>
 899       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 900     </condition>
 901     <condition id="ARMv8MML_DSP_SP">
 902       <description>Armv8-M Mainline, DSP, SP FPU</description>
 903       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 904     </condition>
 905
 906     <condition id="CA5_CA9">
 907       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 908       <accept Dcore="Cortex-A5"/>
 909       <accept Dcore="Cortex-A9"/>
 910     </condition>
 911
 912     <condition id="CA7">
 913       <description>Cortex-A7 processor based device</description>
 914       <accept Dcore="Cortex-A7"/>
 915     </condition>
 916
 917     <!-- ARMCC compiler -->
 918     <condition id="CA_ARMCC5">
 919       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
 920       <require condition="ARMv7-A Device"/>
 921       <require condition="ARMCC5"/>
 922     </condition>
 923     <condition id="CA_ARMCC6">
 924       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
 925       <require condition="ARMv7-A Device"/>
 926       <require condition="ARMCC6"/>
 927     </condition>
 928
 929     <condition id="CM0_ARMCC">
 930       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
 931       <require condition="CM0"/>
 932       <require Tcompiler="ARMCC"/>
 933     </condition>
 934     <condition id="CM0_LE_ARMCC">
 935       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
 936       <require condition="CM0_ARMCC"/>
 937       <require Dendian="Little-endian"/>
 938     </condition>
 939     <condition id="CM0_BE_ARMCC">
 940       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
 941       <require condition="CM0_ARMCC"/>
 942       <require Dendian="Big-endian"/>
 943     </condition>
 944
 945     <condition id="CM3_ARMCC">
 946       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
 947       <require condition="CM3"/>
 948       <require Tcompiler="ARMCC"/>
 949     </condition>
 950     <condition id="CM3_LE_ARMCC">
 951       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
 952       <require condition="CM3_ARMCC"/>
 953       <require Dendian="Little-endian"/>
 954     </condition>
 955     <condition id="CM3_BE_ARMCC">
 956       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
 957       <require condition="CM3_ARMCC"/>
 958       <require Dendian="Big-endian"/>
 959     </condition>
 960
 961     <condition id="CM4_ARMCC">
 962       <description>Cortex-M4 processor based device for the Arm Compiler</description>
 963       <require condition="CM4"/>
 964       <require Tcompiler="ARMCC"/>
 965     </condition>
 966     <condition id="CM4_LE_ARMCC">
 967       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
 968       <require condition="CM4_ARMCC"/>
 969       <require Dendian="Little-endian"/>
 970     </condition>
 971     <condition id="CM4_BE_ARMCC">
 972       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
 973       <require condition="CM4_ARMCC"/>
 974       <require Dendian="Big-endian"/>
 975     </condition>
 976
 977     <condition id="CM4_FP_ARMCC">
 978       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
 979       <require condition="CM4_FP"/>
 980       <require Tcompiler="ARMCC"/>
 981     </condition>
 982     <condition id="CM4_FP_LE_ARMCC">
 983       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
 984       <require condition="CM4_FP_ARMCC"/>
 985       <require Dendian="Little-endian"/>
 986     </condition>
 987     <condition id="CM4_FP_BE_ARMCC">
 988       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
 989       <require condition="CM4_FP_ARMCC"/>
 990       <require Dendian="Big-endian"/>
 991     </condition>
 992
 993     <condition id="CM7_ARMCC">
 994       <description>Cortex-M7 processor based device for the Arm Compiler</description>
 995       <require condition="CM7"/>
 996       <require Tcompiler="ARMCC"/>
 997     </condition>
 998     <condition id="CM7_LE_ARMCC">
 999       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1000       <require condition="CM7_ARMCC"/>
1001       <require Dendian="Little-endian"/>
1002     </condition>
1003     <condition id="CM7_BE_ARMCC">
1004       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1005       <require condition="CM7_ARMCC"/>
1006       <require Dendian="Big-endian"/>
1007     </condition>
1008
1009     <condition id="CM7_FP_ARMCC">
1010       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1011       <require condition="CM7_FP"/>
1012       <require Tcompiler="ARMCC"/>
1013     </condition>
1014     <condition id="CM7_FP_LE_ARMCC">
1015       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1016       <require condition="CM7_FP_ARMCC"/>
1017       <require Dendian="Little-endian"/>
1018     </condition>
1019     <condition id="CM7_FP_BE_ARMCC">
1020       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1021       <require condition="CM7_FP_ARMCC"/>
1022       <require Dendian="Big-endian"/>
1023     </condition>
1024
1025     <condition id="CM7_SP_ARMCC">
1026       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1027       <require condition="CM7_SP"/>
1028       <require Tcompiler="ARMCC"/>
1029     </condition>
1030     <condition id="CM7_SP_LE_ARMCC">
1031       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1032       <require condition="CM7_SP_ARMCC"/>
1033       <require Dendian="Little-endian"/>
1034     </condition>
1035     <condition id="CM7_SP_BE_ARMCC">
1036       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1037       <require condition="CM7_SP_ARMCC"/>
1038       <require Dendian="Big-endian"/>
1039     </condition>
1040
1041     <condition id="CM7_DP_ARMCC">
1042       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1043       <require condition="CM7_DP"/>
1044       <require Tcompiler="ARMCC"/>
1045     </condition>
1046     <condition id="CM7_DP_LE_ARMCC">
1047       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1048       <require condition="CM7_DP_ARMCC"/>
1049       <require Dendian="Little-endian"/>
1050     </condition>
1051     <condition id="CM7_DP_BE_ARMCC">
1052       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1053       <require condition="CM7_DP_ARMCC"/>
1054       <require Dendian="Big-endian"/>
1055     </condition>
1056
1057     <condition id="CM23_ARMCC">
1058       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1059       <require condition="CM23"/>
1060       <require Tcompiler="ARMCC"/>
1061     </condition>
1062     <condition id="CM23_LE_ARMCC">
1063       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1064       <require condition="CM23_ARMCC"/>
1065       <require Dendian="Little-endian"/>
1066     </condition>
1067     <condition id="CM23_BE_ARMCC">
1068       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1069       <require condition="CM23_ARMCC"/>
1070       <require Dendian="Big-endian"/>
1071     </condition>
1072
1073     <condition id="CM33_ARMCC">
1074       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1075       <require condition="CM33"/>
1076       <require Tcompiler="ARMCC"/>
1077     </condition>
1078     <condition id="CM33_LE_ARMCC">
1079       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1080       <require condition="CM33_ARMCC"/>
1081       <require Dendian="Little-endian"/>
1082     </condition>
1083     <condition id="CM33_BE_ARMCC">
1084       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1085       <require condition="CM33_ARMCC"/>
1086       <require Dendian="Big-endian"/>
1087     </condition>
1088
1089     <condition id="CM33_FP_ARMCC">
1090       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1091       <require condition="CM33_FP"/>
1092       <require Tcompiler="ARMCC"/>
1093     </condition>
1094     <condition id="CM33_FP_LE_ARMCC">
1095       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1096       <require condition="CM33_FP_ARMCC"/>
1097       <require Dendian="Little-endian"/>
1098     </condition>
1099     <condition id="CM33_FP_BE_ARMCC">
1100       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1101       <require condition="CM33_FP_ARMCC"/>
1102       <require Dendian="Big-endian"/>
1103     </condition>
1104
1105     <condition id="CM33_NODSP_NOFPU_ARMCC">
1106       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1107       <require condition="CM33_NODSP_NOFPU"/>
1108       <require Tcompiler="ARMCC"/>
1109     </condition>
1110     <condition id="CM33_DSP_NOFPU_ARMCC">
1111       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1112       <require condition="CM33_DSP_NOFPU"/>
1113       <require Tcompiler="ARMCC"/>
1114     </condition>
1115     <condition id="CM33_NODSP_SP_ARMCC">
1116       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1117       <require condition="CM33_NODSP_SP"/>
1118       <require Tcompiler="ARMCC"/>
1119     </condition>
1120     <condition id="CM33_DSP_SP_ARMCC">
1121       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1122       <require condition="CM33_DSP_SP"/>
1123       <require Tcompiler="ARMCC"/>
1124     </condition>
1125     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1126       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1127       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1128       <require Dendian="Little-endian"/>
1129     </condition>
1130     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1131       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1132       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1133       <require Dendian="Little-endian"/>
1134     </condition>
1135     <condition id="CM33_NODSP_SP_LE_ARMCC">
1136       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1137       <require condition="CM33_NODSP_SP_ARMCC"/>
1138       <require Dendian="Little-endian"/>
1139     </condition>
1140     <condition id="CM33_DSP_SP_LE_ARMCC">
1141       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1142       <require condition="CM33_DSP_SP_ARMCC"/>
1143       <require Dendian="Little-endian"/>
1144     </condition>
1145
1146     <condition id="ARMv8MBL_ARMCC">
1147       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1148       <require condition="ARMv8MBL"/>
1149       <require Tcompiler="ARMCC"/>
1150     </condition>
1151     <condition id="ARMv8MBL_LE_ARMCC">
1152       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1153       <require condition="ARMv8MBL_ARMCC"/>
1154       <require Dendian="Little-endian"/>
1155     </condition>
1156     <condition id="ARMv8MBL_BE_ARMCC">
1157       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1158       <require condition="ARMv8MBL_ARMCC"/>
1159       <require Dendian="Big-endian"/>
1160     </condition>
1161
1162     <condition id="ARMv8MML_ARMCC">
1163       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1164       <require condition="ARMv8MML"/>
1165       <require Tcompiler="ARMCC"/>
1166     </condition>
1167     <condition id="ARMv8MML_LE_ARMCC">
1168       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1169       <require condition="ARMv8MML_ARMCC"/>
1170       <require Dendian="Little-endian"/>
1171     </condition>
1172     <condition id="ARMv8MML_BE_ARMCC">
1173       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1174       <require condition="ARMv8MML_ARMCC"/>
1175       <require Dendian="Big-endian"/>
1176     </condition>
1177
1178     <condition id="ARMv8MML_FP_ARMCC">
1179       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1180       <require condition="ARMv8MML_FP"/>
1181       <require Tcompiler="ARMCC"/>
1182     </condition>
1183     <condition id="ARMv8MML_FP_LE_ARMCC">
1184       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1185       <require condition="ARMv8MML_FP_ARMCC"/>
1186       <require Dendian="Little-endian"/>
1187     </condition>
1188     <condition id="ARMv8MML_FP_BE_ARMCC">
1189       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1190       <require condition="ARMv8MML_FP_ARMCC"/>
1191       <require Dendian="Big-endian"/>
1192     </condition>
1193
1194     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1195       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1196       <require condition="ARMv8MML_NODSP_NOFPU"/>
1197       <require Tcompiler="ARMCC"/>
1198     </condition>
1199     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1200       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1201       <require condition="ARMv8MML_DSP_NOFPU"/>
1202       <require Tcompiler="ARMCC"/>
1203     </condition>
1204     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1205       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1206       <require condition="ARMv8MML_NODSP_SP"/>
1207       <require Tcompiler="ARMCC"/>
1208     </condition>
1209     <condition id="ARMv8MML_DSP_SP_ARMCC">
1210       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1211       <require condition="ARMv8MML_DSP_SP"/>
1212       <require Tcompiler="ARMCC"/>
1213     </condition>
1214     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1215       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1216       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1217       <require Dendian="Little-endian"/>
1218     </condition>
1219     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1220       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1221       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1222       <require Dendian="Little-endian"/>
1223     </condition>
1224     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1225       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1226       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1227       <require Dendian="Little-endian"/>
1228     </condition>
1229     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1230       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1231       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1232       <require Dendian="Little-endian"/>
1233     </condition>
1234
1235     <!-- GCC compiler -->
1236     <condition id="CA_GCC">
1237       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1238       <require condition="ARMv7-A Device"/>
1239       <require Tcompiler="GCC"/>
1240     </condition>
1241
1242     <condition id="CM0_GCC">
1243       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1244       <require condition="CM0"/>
1245       <require Tcompiler="GCC"/>
1246     </condition>
1247     <condition id="CM0_LE_GCC">
1248       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1249       <require condition="CM0_GCC"/>
1250       <require Dendian="Little-endian"/>
1251     </condition>
1252     <condition id="CM0_BE_GCC">
1253       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1254       <require condition="CM0_GCC"/>
1255       <require Dendian="Big-endian"/>
1256     </condition>
1257
1258     <condition id="CM3_GCC">
1259       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1260       <require condition="CM3"/>
1261       <require Tcompiler="GCC"/>
1262     </condition>
1263     <condition id="CM3_LE_GCC">
1264       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1265       <require condition="CM3_GCC"/>
1266       <require Dendian="Little-endian"/>
1267     </condition>
1268     <condition id="CM3_BE_GCC">
1269       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1270       <require condition="CM3_GCC"/>
1271       <require Dendian="Big-endian"/>
1272     </condition>
1273
1274     <condition id="CM4_GCC">
1275       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1276       <require condition="CM4"/>
1277       <require Tcompiler="GCC"/>
1278     </condition>
1279     <condition id="CM4_LE_GCC">
1280       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1281       <require condition="CM4_GCC"/>
1282       <require Dendian="Little-endian"/>
1283     </condition>
1284     <condition id="CM4_BE_GCC">
1285       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1286       <require condition="CM4_GCC"/>
1287       <require Dendian="Big-endian"/>
1288     </condition>
1289
1290     <condition id="CM4_FP_GCC">
1291       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1292       <require condition="CM4_FP"/>
1293       <require Tcompiler="GCC"/>
1294     </condition>
1295     <condition id="CM4_FP_LE_GCC">
1296       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1297       <require condition="CM4_FP_GCC"/>
1298       <require Dendian="Little-endian"/>
1299     </condition>
1300     <condition id="CM4_FP_BE_GCC">
1301       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1302       <require condition="CM4_FP_GCC"/>
1303       <require Dendian="Big-endian"/>
1304     </condition>
1305
1306     <condition id="CM7_GCC">
1307       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1308       <require condition="CM7"/>
1309       <require Tcompiler="GCC"/>
1310     </condition>
1311     <condition id="CM7_LE_GCC">
1312       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1313       <require condition="CM7_GCC"/>
1314       <require Dendian="Little-endian"/>
1315     </condition>
1316     <condition id="CM7_BE_GCC">
1317       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1318       <require condition="CM7_GCC"/>
1319       <require Dendian="Big-endian"/>
1320     </condition>
1321
1322     <condition id="CM7_FP_GCC">
1323       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1324       <require condition="CM7_FP"/>
1325       <require Tcompiler="GCC"/>
1326     </condition>
1327     <condition id="CM7_FP_LE_GCC">
1328       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1329       <require condition="CM7_FP_GCC"/>
1330       <require Dendian="Little-endian"/>
1331     </condition>
1332     <condition id="CM7_FP_BE_GCC">
1333       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1334       <require condition="CM7_FP_GCC"/>
1335       <require Dendian="Big-endian"/>
1336     </condition>
1337
1338     <condition id="CM7_SP_GCC">
1339       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1340       <require condition="CM7_SP"/>
1341       <require Tcompiler="GCC"/>
1342     </condition>
1343     <condition id="CM7_SP_LE_GCC">
1344       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1345       <require condition="CM7_SP_GCC"/>
1346       <require Dendian="Little-endian"/>
1347     </condition>
1348     <condition id="CM7_SP_BE_GCC">
1349       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1350       <require condition="CM7_SP_GCC"/>
1351       <require Dendian="Big-endian"/>
1352     </condition>
1353
1354     <condition id="CM7_DP_GCC">
1355       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1356       <require condition="CM7_DP"/>
1357       <require Tcompiler="GCC"/>
1358     </condition>
1359     <condition id="CM7_DP_LE_GCC">
1360       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1361       <require condition="CM7_DP_GCC"/>
1362       <require Dendian="Little-endian"/>
1363     </condition>
1364     <condition id="CM7_DP_BE_GCC">
1365       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1366       <require condition="CM7_DP_GCC"/>
1367       <require Dendian="Big-endian"/>
1368     </condition>
1369
1370     <condition id="CM23_GCC">
1371       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1372       <require condition="CM23"/>
1373       <require Tcompiler="GCC"/>
1374     </condition>
1375     <condition id="CM23_LE_GCC">
1376       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1377       <require condition="CM23_GCC"/>
1378       <require Dendian="Little-endian"/>
1379     </condition>
1380     <condition id="CM23_BE_GCC">
1381       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1382       <require condition="CM23_GCC"/>
1383       <require Dendian="Big-endian"/>
1384     </condition>
1385
1386     <condition id="CM33_GCC">
1387       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1388       <require condition="CM33"/>
1389       <require Tcompiler="GCC"/>
1390     </condition>
1391     <condition id="CM33_LE_GCC">
1392       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1393       <require condition="CM33_GCC"/>
1394       <require Dendian="Little-endian"/>
1395     </condition>
1396     <condition id="CM33_BE_GCC">
1397       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1398       <require condition="CM33_GCC"/>
1399       <require Dendian="Big-endian"/>
1400     </condition>
1401
1402     <condition id="CM33_FP_GCC">
1403       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1404       <require condition="CM33_FP"/>
1405       <require Tcompiler="GCC"/>
1406     </condition>
1407     <condition id="CM33_FP_LE_GCC">
1408       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1409       <require condition="CM33_FP_GCC"/>
1410       <require Dendian="Little-endian"/>
1411     </condition>
1412     <condition id="CM33_FP_BE_GCC">
1413       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1414       <require condition="CM33_FP_GCC"/>
1415       <require Dendian="Big-endian"/>
1416     </condition>
1417
1418     <condition id="CM33_NODSP_NOFPU_GCC">
1419       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1420       <require condition="CM33_NODSP_NOFPU"/>
1421       <require Tcompiler="GCC"/>
1422     </condition>
1423     <condition id="CM33_DSP_NOFPU_GCC">
1424       <description>CM33, DSP, no FPU, GCC Compiler</description>
1425       <require condition="CM33_DSP_NOFPU"/>
1426       <require Tcompiler="GCC"/>
1427     </condition>
1428     <condition id="CM33_NODSP_SP_GCC">
1429       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1430       <require condition="CM33_NODSP_SP"/>
1431       <require Tcompiler="GCC"/>
1432     </condition>
1433     <condition id="CM33_DSP_SP_GCC">
1434       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1435       <require condition="CM33_DSP_SP"/>
1436       <require Tcompiler="GCC"/>
1437     </condition>
1438     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1439       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1440       <require condition="CM33_NODSP_NOFPU_GCC"/>
1441       <require Dendian="Little-endian"/>
1442     </condition>
1443     <condition id="CM33_DSP_NOFPU_LE_GCC">
1444       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1445       <require condition="CM33_DSP_NOFPU_GCC"/>
1446       <require Dendian="Little-endian"/>
1447     </condition>
1448     <condition id="CM33_NODSP_SP_LE_GCC">
1449       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1450       <require condition="CM33_NODSP_SP_GCC"/>
1451       <require Dendian="Little-endian"/>
1452     </condition>
1453     <condition id="CM33_DSP_SP_LE_GCC">
1454       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1455       <require condition="CM33_DSP_SP_GCC"/>
1456       <require Dendian="Little-endian"/>
1457     </condition>
1458
1459     <condition id="ARMv8MBL_GCC">
1460       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1461       <require condition="ARMv8MBL"/>
1462       <require Tcompiler="GCC"/>
1463     </condition>
1464     <condition id="ARMv8MBL_LE_GCC">
1465       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1466       <require condition="ARMv8MBL_GCC"/>
1467       <require Dendian="Little-endian"/>
1468     </condition>
1469     <condition id="ARMv8MBL_BE_GCC">
1470       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1471       <require condition="ARMv8MBL_GCC"/>
1472       <require Dendian="Big-endian"/>
1473     </condition>
1474
1475     <condition id="ARMv8MML_GCC">
1476       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1477       <require condition="ARMv8MML"/>
1478       <require Tcompiler="GCC"/>
1479     </condition>
1480     <condition id="ARMv8MML_LE_GCC">
1481       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1482       <require condition="ARMv8MML_GCC"/>
1483       <require Dendian="Little-endian"/>
1484     </condition>
1485     <condition id="ARMv8MML_BE_GCC">
1486       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1487       <require condition="ARMv8MML_GCC"/>
1488       <require Dendian="Big-endian"/>
1489     </condition>
1490
1491     <condition id="ARMv8MML_FP_GCC">
1492       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1493       <require condition="ARMv8MML_FP"/>
1494       <require Tcompiler="GCC"/>
1495     </condition>
1496     <condition id="ARMv8MML_FP_LE_GCC">
1497       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1498       <require condition="ARMv8MML_FP_GCC"/>
1499       <require Dendian="Little-endian"/>
1500     </condition>
1501     <condition id="ARMv8MML_FP_BE_GCC">
1502       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1503       <require condition="ARMv8MML_FP_GCC"/>
1504       <require Dendian="Big-endian"/>
1505     </condition>
1506
1507     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1508       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1509       <require condition="ARMv8MML_NODSP_NOFPU"/>
1510       <require Tcompiler="GCC"/>
1511     </condition>
1512     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1513       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1514       <require condition="ARMv8MML_DSP_NOFPU"/>
1515       <require Tcompiler="GCC"/>
1516     </condition>
1517     <condition id="ARMv8MML_NODSP_SP_GCC">
1518       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1519       <require condition="ARMv8MML_NODSP_SP"/>
1520       <require Tcompiler="GCC"/>
1521     </condition>
1522     <condition id="ARMv8MML_DSP_SP_GCC">
1523       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1524       <require condition="ARMv8MML_DSP_SP"/>
1525       <require Tcompiler="GCC"/>
1526     </condition>
1527     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1528       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1529       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1530       <require Dendian="Little-endian"/>
1531     </condition>
1532     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1533       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1534       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1535       <require Dendian="Little-endian"/>
1536     </condition>
1537     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1538       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1539       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1540       <require Dendian="Little-endian"/>
1541     </condition>
1542     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1543       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1544       <require condition="ARMv8MML_DSP_SP_GCC"/>
1545       <require Dendian="Little-endian"/>
1546     </condition>
1547
1548     <!-- IAR compiler -->
1549     <condition id="CA_IAR">
1550       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1551       <require condition="ARMv7-A Device"/>
1552       <require Tcompiler="IAR"/>
1553     </condition>
1554
1555     <condition id="CM0_IAR">
1556       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1557       <require condition="CM0"/>
1558       <require Tcompiler="IAR"/>
1559     </condition>
1560     <condition id="CM0_LE_IAR">
1561       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1562       <require condition="CM0_IAR"/>
1563       <require Dendian="Little-endian"/>
1564     </condition>
1565     <condition id="CM0_BE_IAR">
1566       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1567       <require condition="CM0_IAR"/>
1568       <require Dendian="Big-endian"/>
1569     </condition>
1570
1571     <condition id="CM3_IAR">
1572       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1573       <require condition="CM3"/>
1574       <require Tcompiler="IAR"/>
1575     </condition>
1576     <condition id="CM3_LE_IAR">
1577       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1578       <require condition="CM3_IAR"/>
1579       <require Dendian="Little-endian"/>
1580     </condition>
1581     <condition id="CM3_BE_IAR">
1582       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1583       <require condition="CM3_IAR"/>
1584       <require Dendian="Big-endian"/>
1585     </condition>
1586
1587     <condition id="CM4_IAR">
1588       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1589       <require condition="CM4"/>
1590       <require Tcompiler="IAR"/>
1591     </condition>
1592     <condition id="CM4_LE_IAR">
1593       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1594       <require condition="CM4_IAR"/>
1595       <require Dendian="Little-endian"/>
1596     </condition>
1597     <condition id="CM4_BE_IAR">
1598       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1599       <require condition="CM4_IAR"/>
1600       <require Dendian="Big-endian"/>
1601     </condition>
1602
1603     <condition id="CM4_FP_IAR">
1604       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1605       <require condition="CM4_FP"/>
1606       <require Tcompiler="IAR"/>
1607     </condition>
1608     <condition id="CM4_FP_LE_IAR">
1609       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1610       <require condition="CM4_FP_IAR"/>
1611       <require Dendian="Little-endian"/>
1612     </condition>
1613     <condition id="CM4_FP_BE_IAR">
1614       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1615       <require condition="CM4_FP_IAR"/>
1616       <require Dendian="Big-endian"/>
1617     </condition>
1618
1619     <condition id="CM7_IAR">
1620       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1621       <require condition="CM7"/>
1622       <require Tcompiler="IAR"/>
1623     </condition>
1624     <condition id="CM7_LE_IAR">
1625       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1626       <require condition="CM7_IAR"/>
1627       <require Dendian="Little-endian"/>
1628     </condition>
1629     <condition id="CM7_BE_IAR">
1630       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1631       <require condition="CM7_IAR"/>
1632       <require Dendian="Big-endian"/>
1633     </condition>
1634
1635     <condition id="CM7_FP_IAR">
1636       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1637       <require condition="CM7_FP"/>
1638       <require Tcompiler="IAR"/>
1639     </condition>
1640     <condition id="CM7_FP_LE_IAR">
1641       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1642       <require condition="CM7_FP_IAR"/>
1643       <require Dendian="Little-endian"/>
1644     </condition>
1645     <condition id="CM7_FP_BE_IAR">
1646       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1647       <require condition="CM7_FP_IAR"/>
1648       <require Dendian="Big-endian"/>
1649     </condition>
1650
1651     <condition id="CM7_SP_IAR">
1652       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1653       <require condition="CM7_SP"/>
1654       <require Tcompiler="IAR"/>
1655     </condition>
1656     <condition id="CM7_SP_LE_IAR">
1657       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1658       <require condition="CM7_SP_IAR"/>
1659       <require Dendian="Little-endian"/>
1660     </condition>
1661     <condition id="CM7_SP_BE_IAR">
1662       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1663       <require condition="CM7_SP_IAR"/>
1664       <require Dendian="Big-endian"/>
1665     </condition>
1666
1667     <condition id="CM7_DP_IAR">
1668       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1669       <require condition="CM7_DP"/>
1670       <require Tcompiler="IAR"/>
1671     </condition>
1672     <condition id="CM7_DP_LE_IAR">
1673       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1674       <require condition="CM7_DP_IAR"/>
1675       <require Dendian="Little-endian"/>
1676     </condition>
1677     <condition id="CM7_DP_BE_IAR">
1678       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1679       <require condition="CM7_DP_IAR"/>
1680       <require Dendian="Big-endian"/>
1681     </condition>
1682
1683     <condition id="CM23_IAR">
1684       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1685       <require condition="CM23"/>
1686       <require Tcompiler="IAR"/>
1687     </condition>
1688     <condition id="CM23_LE_IAR">
1689       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1690       <require condition="CM23_IAR"/>
1691       <require Dendian="Little-endian"/>
1692     </condition>
1693     <condition id="CM23_BE_IAR">
1694       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
1695       <require condition="CM23_IAR"/>
1696       <require Dendian="Big-endian"/>
1697     </condition>
1698
1699     <condition id="CM33_IAR">
1700       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1701       <require condition="CM33"/>
1702       <require Tcompiler="IAR"/>
1703     </condition>
1704     <condition id="CM33_LE_IAR">
1705       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1706       <require condition="CM33_IAR"/>
1707       <require Dendian="Little-endian"/>
1708     </condition>
1709     <condition id="CM33_BE_IAR">
1710       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
1711       <require condition="CM33_IAR"/>
1712       <require Dendian="Big-endian"/>
1713     </condition>
1714
1715     <condition id="CM33_FP_IAR">
1716       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1717       <require condition="CM33_FP"/>
1718       <require Tcompiler="IAR"/>
1719     </condition>
1720     <condition id="CM33_FP_LE_IAR">
1721       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1722       <require condition="CM33_FP_IAR"/>
1723       <require Dendian="Little-endian"/>
1724     </condition>
1725     <condition id="CM33_FP_BE_IAR">
1726       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1727       <require condition="CM33_FP_IAR"/>
1728       <require Dendian="Big-endian"/>
1729     </condition>
1730
1731     <condition id="CM33_NODSP_NOFPU_IAR">
1732       <description>CM33, no DSP, no FPU, IAR Compiler</description>
1733       <require condition="CM33_NODSP_NOFPU"/>
1734       <require Tcompiler="IAR"/>
1735     </condition>
1736     <condition id="CM33_DSP_NOFPU_IAR">
1737       <description>CM33, DSP, no FPU, IAR Compiler</description>
1738       <require condition="CM33_DSP_NOFPU"/>
1739       <require Tcompiler="IAR"/>
1740     </condition>
1741     <condition id="CM33_NODSP_SP_IAR">
1742       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
1743       <require condition="CM33_NODSP_SP"/>
1744       <require Tcompiler="IAR"/>
1745     </condition>
1746     <condition id="CM33_DSP_SP_IAR">
1747       <description>CM33, DSP, SP FPU, IAR Compiler</description>
1748       <require condition="CM33_DSP_SP"/>
1749       <require Tcompiler="IAR"/>
1750     </condition>
1751     <condition id="CM33_NODSP_NOFPU_LE_IAR">
1752       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
1753       <require condition="CM33_NODSP_NOFPU_IAR"/>
1754       <require Dendian="Little-endian"/>
1755     </condition>
1756     <condition id="CM33_DSP_NOFPU_LE_IAR">
1757       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
1758       <require condition="CM33_DSP_NOFPU_IAR"/>
1759       <require Dendian="Little-endian"/>
1760     </condition>
1761     <condition id="CM33_NODSP_SP_LE_IAR">
1762       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
1763       <require condition="CM33_NODSP_SP_IAR"/>
1764       <require Dendian="Little-endian"/>
1765     </condition>
1766     <condition id="CM33_DSP_SP_LE_IAR">
1767       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
1768       <require condition="CM33_DSP_SP_IAR"/>
1769       <require Dendian="Little-endian"/>
1770     </condition>
1771
1772     <condition id="ARMv8MBL_IAR">
1773       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1774       <require condition="ARMv8MBL"/>
1775       <require Tcompiler="IAR"/>
1776     </condition>
1777     <condition id="ARMv8MBL_LE_IAR">
1778       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1779       <require condition="ARMv8MBL_IAR"/>
1780       <require Dendian="Little-endian"/>
1781     </condition>
1782     <condition id="ARMv8MBL_BE_IAR">
1783       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
1784       <require condition="ARMv8MBL_IAR"/>
1785       <require Dendian="Big-endian"/>
1786     </condition>
1787
1788     <condition id="ARMv8MML_IAR">
1789       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1790       <require condition="ARMv8MML"/>
1791       <require Tcompiler="IAR"/>
1792     </condition>
1793     <condition id="ARMv8MML_LE_IAR">
1794       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1795       <require condition="ARMv8MML_IAR"/>
1796       <require Dendian="Little-endian"/>
1797     </condition>
1798     <condition id="ARMv8MML_BE_IAR">
1799       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
1800       <require condition="ARMv8MML_IAR"/>
1801       <require Dendian="Big-endian"/>
1802     </condition>
1803
1804     <condition id="ARMv8MML_FP_IAR">
1805       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1806       <require condition="ARMv8MML_FP"/>
1807       <require Tcompiler="IAR"/>
1808     </condition>
1809     <condition id="ARMv8MML_FP_LE_IAR">
1810       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1811       <require condition="ARMv8MML_FP_IAR"/>
1812       <require Dendian="Little-endian"/>
1813     </condition>
1814     <condition id="ARMv8MML_FP_BE_IAR">
1815       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1816       <require condition="ARMv8MML_FP_IAR"/>
1817       <require Dendian="Big-endian"/>
1818     </condition>
1819
1820     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
1821       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
1822       <require condition="ARMv8MML_NODSP_NOFPU"/>
1823       <require Tcompiler="IAR"/>
1824     </condition>
1825     <condition id="ARMv8MML_DSP_NOFPU_IAR">
1826       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
1827       <require condition="ARMv8MML_DSP_NOFPU"/>
1828       <require Tcompiler="IAR"/>
1829     </condition>
1830     <condition id="ARMv8MML_NODSP_SP_IAR">
1831       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
1832       <require condition="ARMv8MML_NODSP_SP"/>
1833       <require Tcompiler="IAR"/>
1834     </condition>
1835     <condition id="ARMv8MML_DSP_SP_IAR">
1836       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
1837       <require condition="ARMv8MML_DSP_SP"/>
1838       <require Tcompiler="IAR"/>
1839     </condition>
1840     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
1841       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
1842       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
1843       <require Dendian="Little-endian"/>
1844     </condition>
1845     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
1846       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
1847       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
1848       <require Dendian="Little-endian"/>
1849     </condition>
1850     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
1851       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
1852       <require condition="ARMv8MML_NODSP_SP_IAR"/>
1853       <require Dendian="Little-endian"/>
1854     </condition>
1855     <condition id="ARMv8MML_DSP_SP_LE_IAR">
1856       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
1857       <require condition="ARMv8MML_DSP_SP_IAR"/>
1858       <require Dendian="Little-endian"/>
1859     </condition>
1860
1861     <!-- conditions selecting single devices and CMSIS Core -->
1862     <!-- used for component startup, GCC version is used for C-Startup -->
1863     <condition id="ARMCM0 CMSIS">
1864       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
1865       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1866       <require Cclass="CMSIS" Cgroup="CORE"/>
1867     </condition>
1868     <condition id="ARMCM0 CMSIS GCC">
1869       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1870       <require condition="ARMCM0 CMSIS"/>
1871       <require condition="GCC"/>
1872     </condition>
1873
1874     <condition id="ARMCM0+ CMSIS">
1875       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
1876       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1877       <require Cclass="CMSIS" Cgroup="CORE"/>
1878     </condition>
1879     <condition id="ARMCM0+ CMSIS GCC">
1880       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1881       <require condition="ARMCM0+ CMSIS"/>
1882       <require condition="GCC"/>
1883     </condition>
1884
1885     <condition id="ARMCM3 CMSIS">
1886       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
1887       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1888       <require Cclass="CMSIS" Cgroup="CORE"/>
1889     </condition>
1890     <condition id="ARMCM3 CMSIS GCC">
1891       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1892       <require condition="ARMCM3 CMSIS"/>
1893       <require condition="GCC"/>
1894     </condition>
1895
1896     <condition id="ARMCM4 CMSIS">
1897       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
1898       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1899       <require Cclass="CMSIS" Cgroup="CORE"/>
1900     </condition>
1901     <condition id="ARMCM4 CMSIS GCC">
1902       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1903       <require condition="ARMCM4 CMSIS"/>
1904       <require condition="GCC"/>
1905     </condition>
1906
1907     <condition id="ARMCM7 CMSIS">
1908       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
1909       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1910       <require Cclass="CMSIS" Cgroup="CORE"/>
1911     </condition>
1912     <condition id="ARMCM7 CMSIS GCC">
1913       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1914       <require condition="ARMCM7 CMSIS"/>
1915       <require condition="GCC"/>
1916     </condition>
1917
1918     <condition id="ARMCM23 CMSIS">
1919       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
1920       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1921       <require Cclass="CMSIS" Cgroup="CORE"/>
1922     </condition>
1923     <condition id="ARMCM23 CMSIS GCC">
1924       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1925       <require condition="ARMCM23 CMSIS"/>
1926       <require condition="GCC"/>
1927     </condition>
1928
1929     <condition id="ARMCM33 CMSIS">
1930       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
1931       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1932       <require Cclass="CMSIS" Cgroup="CORE"/>
1933     </condition>
1934     <condition id="ARMCM33 CMSIS GCC">
1935       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1936       <require condition="ARMCM33 CMSIS"/>
1937       <require condition="GCC"/>
1938     </condition>
1939
1940     <condition id="ARMSC000 CMSIS">
1941       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
1942       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1943       <require Cclass="CMSIS" Cgroup="CORE"/>
1944     </condition>
1945     <condition id="ARMSC000 CMSIS GCC">
1946       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
1947       <require condition="ARMSC000 CMSIS"/>
1948       <require condition="GCC"/>
1949     </condition>
1950
1951     <condition id="ARMSC300 CMSIS">
1952       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
1953       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1954       <require Cclass="CMSIS" Cgroup="CORE"/>
1955     </condition>
1956     <condition id="ARMSC300 CMSIS GCC">
1957       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
1958       <require condition="ARMSC300 CMSIS"/>
1959       <require condition="GCC"/>
1960     </condition>
1961
1962     <condition id="ARMv8MBL CMSIS">
1963       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
1964       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1965       <require Cclass="CMSIS" Cgroup="CORE"/>
1966     </condition>
1967     <condition id="ARMv8MBL CMSIS GCC">
1968       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
1969       <require condition="ARMv8MBL CMSIS"/>
1970       <require condition="GCC"/>
1971     </condition>
1972
1973     <condition id="ARMv8MML CMSIS">
1974       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
1975       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1976       <require Cclass="CMSIS" Cgroup="CORE"/>
1977     </condition>
1978     <condition id="ARMv8MML CMSIS GCC">
1979       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
1980       <require condition="ARMv8MML CMSIS"/>
1981       <require condition="GCC"/>
1982     </condition>
1983
1984     <condition id="ARMCA5 CMSIS">
1985       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
1986       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1987       <require Cclass="CMSIS" Cgroup="CORE"/>
1988     </condition>
1989
1990     <condition id="ARMCA7 CMSIS">
1991       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
1992       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1993       <require Cclass="CMSIS" Cgroup="CORE"/>
1994     </condition>
1995
1996     <condition id="ARMCA9 CMSIS">
1997       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
1998       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1999       <require Cclass="CMSIS" Cgroup="CORE"/>
2000     </condition>
2001
2002     <!-- CMSIS DSP -->
2003     <condition id="CMSIS DSP">
2004       <description>Components required for DSP</description>
2005       <require condition="ARMv6_7_8-M Device"/>
2006       <require condition="ARMCC GCC IAR"/>
2007       <require Cclass="CMSIS" Cgroup="CORE"/>
2008     </condition>
2009
2010     <!-- CMSIS NN -->
2011     <condition id="CMSIS NN">
2012       <description>Components required for NN</description>
2013       <require condition="CMSIS DSP"/>
2014     </condition>
2015
2016     <!-- RTOS RTX -->
2017     <condition id="RTOS RTX">
2018       <description>Components required for RTOS RTX</description>
2019       <require condition="ARMv6_7-M Device"/>
2020       <require condition="ARMCC GCC IAR"/>
2021       <require Cclass="Device" Cgroup="Startup"/>
2022       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2023     </condition>
2024     <condition id="RTOS RTX IFX">
2025       <description>Components required for RTOS RTX IFX</description>
2026       <require condition="ARMv6_7-M Device"/>
2027       <require condition="ARMCC GCC IAR"/>
2028       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2029       <require Cclass="Device" Cgroup="Startup"/>
2030       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2031     </condition>
2032     <condition id="RTOS RTX5">
2033       <description>Components required for RTOS RTX5</description>
2034       <require condition="ARMv6_7_8-M Device"/>
2035       <require condition="ARMCC GCC IAR"/>
2036       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2037     </condition>
2038     <condition id="RTOS2 RTX5">
2039       <description>Components required for RTOS2 RTX5</description>
2040       <require condition="ARMv6_7_8-M Device"/>
2041       <require condition="ARMCC GCC IAR"/>
2042       <require Cclass="CMSIS"  Cgroup="CORE"/>
2043       <require Cclass="Device" Cgroup="Startup"/>
2044     </condition>
2045     <condition id="RTOS2 RTX5 v7-A">
2046       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2047       <require condition="ARMv7-A Device"/>
2048       <require condition="ARMCC GCC IAR"/>
2049       <require Cclass="CMSIS"  Cgroup="CORE"/>
2050       <require Cclass="Device" Cgroup="Startup"/>
2051       <require Cclass="Device" Cgroup="OS Tick"/>
2052       <require Cclass="Device" Cgroup="IRQ Controller"/>
2053     </condition>
2054     <condition id="RTOS2 RTX5 Lib">
2055       <description>Components required for RTOS2 RTX5 Library</description>
2056       <require condition="ARMv6_7_8-M Device"/>
2057       <require condition="ARMCC GCC IAR"/>
2058       <require Cclass="CMSIS"  Cgroup="CORE"/>
2059       <require Cclass="Device" Cgroup="Startup"/>
2060     </condition>
2061     <condition id="RTOS2 RTX5 NS">
2062       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2063       <require condition="ARMv8-M TZ Device"/>
2064       <require condition="ARMCC GCC IAR"/>
2065       <require Cclass="CMSIS"  Cgroup="CORE"/>
2066       <require Cclass="Device" Cgroup="Startup"/>
2067     </condition>
2068
2069     <!-- OS Tick -->
2070     <condition id="OS Tick PTIM">
2071       <description>Components required for OS Tick Private Timer</description>
2072       <require condition="CA5_CA9"/>
2073       <require Cclass="Device" Cgroup="IRQ Controller"/>
2074     </condition>
2075
2076     <condition id="OS Tick GTIM">
2077       <description>Components required for OS Tick Generic Physical Timer</description>
2078       <require condition="CA7"/>
2079       <require Cclass="Device" Cgroup="IRQ Controller"/>
2080     </condition>
2081
2082   </conditions>
2083
2084   <components>
2085     <!-- CMSIS-Core component -->
2086     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.1.1"  condition="ARMv6_7_8-M Device" >
2087       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
2088       <files>
2089         <!-- CPU independent -->
2090         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2091         <file category="include" name="CMSIS/Include/"/>
2092         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2093         <!-- Code template -->
2094         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
2095         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2096       </files>
2097     </component>
2098
2099     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.1"  condition="ARMv7-A Device" >
2100       <description>CMSIS-CORE for Cortex-A</description>
2101       <files>
2102         <!-- CPU independent -->
2103         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2104         <file category="include" name="CMSIS/Core_A/Include/"/>
2105       </files>
2106     </component>
2107
2108     <!-- CMSIS-Startup components -->
2109     <!-- Cortex-M0 -->
2110     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
2111       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2112       <files>
2113         <!-- include folder / device header file -->
2114         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2115         <!-- startup / system file -->
2116         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2117         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
2118         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2119         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2120         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2121       </files>
2122     </component>
2123     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
2124       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2125       <files>
2126         <!-- include folder / device header file -->
2127         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2128         <!-- startup / system file -->
2129         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
2130         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2131         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2132       </files>
2133     </component>
2134
2135     <!-- Cortex-M0+ -->
2136     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
2137       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2138       <files>
2139         <!-- include folder / device header file -->
2140         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2141         <!-- startup / system file -->
2142         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2143         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
2144         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2145         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2146         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2147       </files>
2148     </component>
2149     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
2150       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2151       <files>
2152         <!-- include folder / device header file -->
2153         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2154         <!-- startup / system file -->
2155         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
2156         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2157         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2158       </files>
2159     </component>
2160
2161     <!-- Cortex-M3 -->
2162     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
2163       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2164       <files>
2165         <!-- include folder / device header file -->
2166         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2167         <!-- startup / system file -->
2168         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2169         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
2170         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2171         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2172         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2173       </files>
2174     </component>
2175     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
2176       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2177       <files>
2178         <!-- include folder / device header file -->
2179         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2180         <!-- startup / system file -->
2181         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
2182         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2183         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2184       </files>
2185     </component>
2186
2187     <!-- Cortex-M4 -->
2188     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
2189       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2190       <files>
2191         <!-- include folder / device header file -->
2192         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2193         <!-- startup / system file -->
2194         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2195         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2196         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2197         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2198         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2199       </files>
2200     </component>
2201     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2202       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2203       <files>
2204         <!-- include folder / device header file -->
2205         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2206         <!-- startup / system file -->
2207         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2208         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2209         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2210       </files>
2211     </component>
2212
2213     <!-- Cortex-M7 -->
2214     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2215       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2216       <files>
2217         <!-- include folder / device header file -->
2218         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2219         <!-- startup / system file -->
2220         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2221         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2222         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2223         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2224         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2225       </files>
2226     </component>
2227     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2228       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2229       <files>
2230         <!-- include folder / device header file -->
2231         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2232         <!-- startup / system file -->
2233         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2234         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2235         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2236       </files>
2237     </component>
2238
2239     <!-- Cortex-M23 -->
2240     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2241       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2242       <files>
2243         <!-- include folder / device header file -->
2244         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2245         <!-- startup / system file -->
2246         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2247         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2248         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2249         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2250         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2251         <!-- SAU configuration -->
2252         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2253       </files>
2254     </component>
2255     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2256       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2257       <files>
2258         <!-- include folder / device header file -->
2259         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2260         <!-- startup / system file -->
2261         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2262         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2263         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2264         <!-- SAU configuration -->
2265         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2266       </files>
2267     </component>
2268
2269     <!-- Cortex-M33 -->
2270     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2271       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2272       <files>
2273         <!-- include folder / device header file -->
2274         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2275         <!-- startup / system file -->
2276         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2277         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2278         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2279         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2280         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2281         <!-- SAU configuration -->
2282         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2283       </files>
2284     </component>
2285     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2286       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2287       <files>
2288         <!-- include folder / device header file -->
2289         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2290         <!-- startup / system file -->
2291         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2292         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2293         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2294         <!-- SAU configuration -->
2295         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2296       </files>
2297     </component>
2298
2299     <!-- Cortex-SC000 -->
2300     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2301       <description>System and Startup for Generic Arm SC000 device</description>
2302       <files>
2303         <!-- include folder / device header file -->
2304         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2305         <!-- startup / system file -->
2306         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2307         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2308         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2309         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2310         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2311       </files>
2312     </component>
2313     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2314       <description>System and Startup for Generic Arm SC000 device</description>
2315       <files>
2316         <!-- include folder / device header file -->
2317         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2318         <!-- startup / system file -->
2319         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2320         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2321         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2322       </files>
2323     </component>
2324
2325     <!-- Cortex-SC300 -->
2326     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2327       <description>System and Startup for Generic Arm SC300 device</description>
2328       <files>
2329         <!-- include folder / device header file -->
2330         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2331         <!-- startup / system file -->
2332         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2333         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2334         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2335         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2336         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2337       </files>
2338     </component>
2339     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2340       <description>System and Startup for Generic Arm SC300 device</description>
2341       <files>
2342         <!-- include folder / device header file -->
2343         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2344         <!-- startup / system file -->
2345         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2346         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2347         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2348       </files>
2349     </component>
2350
2351     <!-- ARMv8MBL -->
2352     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2353       <description>System and Startup for Generic Armv8-M Baseline device</description>
2354       <files>
2355         <!-- include folder / device header file -->
2356         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2357         <!-- startup / system file -->
2358         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2359         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2360         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2361         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2362         <!-- SAU configuration -->
2363         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2364       </files>
2365     </component>
2366     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2367       <description>System and Startup for Generic Armv8-M Baseline device</description>
2368       <files>
2369         <!-- include folder / device header file -->
2370         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2371         <!-- startup / system file -->
2372         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2373         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2374         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2375         <!-- SAU configuration -->
2376         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2377       </files>
2378     </component>
2379
2380     <!-- ARMv8MML -->
2381     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2382       <description>System and Startup for Generic Armv8-M Mainline device</description>
2383       <files>
2384         <!-- include folder / device header file -->
2385         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2386         <!-- startup / system file -->
2387         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2388         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2389         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2390         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2391         <!-- SAU configuration -->
2392         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2393       </files>
2394     </component>
2395     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2396       <description>System and Startup for Generic Armv8-M Mainline device</description>
2397       <files>
2398         <!-- include folder / device header file -->
2399         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2400         <!-- startup / system file -->
2401         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2402         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2403         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2404         <!-- SAU configuration -->
2405         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2406       </files>
2407     </component>
2408
2409     <!-- Cortex-A5 -->
2410     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2411       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2412       <files>
2413         <!-- include folder / device header file -->
2414         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2415         <!-- startup / system / mmu files -->
2416         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2417         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2418         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2419         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2420         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2421         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2422         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2423         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2424         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2425         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2426         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2427         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2428
2429       </files>
2430     </component>
2431
2432     <!-- Cortex-A7 -->
2433     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2434       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2435       <files>
2436         <!-- include folder / device header file -->
2437         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2438         <!-- startup / system / mmu files -->
2439         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2440         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2441         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2442         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2443         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2444         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2445         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2446         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2447         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2448         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2449         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2450         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2451       </files>
2452     </component>
2453
2454     <!-- Cortex-A9 -->
2455     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2456       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2457       <files>
2458         <!-- include folder / device header file -->
2459         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2460         <!-- startup / system / mmu files -->
2461         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2462         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2463         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2464         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2465         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2466         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2467         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2468         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2469         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2470         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2471         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2472         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2473       </files>
2474     </component>
2475
2476     <!-- IRQ Controller -->
2477     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2478       <description>IRQ Controller implementation using GIC</description>
2479       <files>
2480         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2481       </files>
2482     </component>
2483
2484     <!-- OS Tick -->
2485     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2486       <description>OS Tick implementation using Private Timer</description>
2487       <files>
2488         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2489       </files>
2490     </component>
2491
2492     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2493       <description>OS Tick implementation using Generic Physical Timer</description>
2494       <files>
2495         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2496       </files>
2497     </component>
2498
2499     <!-- CMSIS-DSP component -->
2500     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2501       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2502       <files>
2503         <!-- CPU independent -->
2504         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2505         <file category="header" name="CMSIS/Include/arm_math.h"/>
2506
2507         <!-- CPU and Compiler dependent -->
2508         <!-- ARMCC -->
2509         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2510         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2511         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2512         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2513         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2514         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2515         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2516         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2517         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2518         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2519         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2520         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2521         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2522         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2523
2524         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2525         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2526         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2527         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2528         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2529         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2530         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2531         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2532         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2533         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2534         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2535         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2536
2537         <!-- GCC -->
2538         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2539         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2540         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2541         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2542         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2543         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2544         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2545
2546         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2547         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2548         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2549         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2550         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2551         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2552         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2553         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2554         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2555         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2556         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2557         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2558
2559         <!-- IAR -->
2560         <file category="library" condition="CM0_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2561         <file category="library" condition="CM0_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2562         <file category="library" condition="CM3_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2563         <file category="library" condition="CM3_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2564         <file category="library" condition="CM4_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2565         <file category="library" condition="CM4_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2566         <file category="library" condition="CM4_FP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/IAR"/>
2567         <file category="library" condition="CM4_FP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP_Lib/Source/IAR"/>
2568         <file category="library" condition="CM7_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2569         <file category="library" condition="CM7_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2570         <file category="library" condition="CM7_DP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP_Lib/Source/IAR"/>
2571         <file category="library" condition="CM7_DP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP_Lib/Source/IAR"/>
2572         <file category="library" condition="CM7_SP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP_Lib/Source/IAR"/>
2573         <file category="library" condition="CM7_SP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP_Lib/Source/IAR"/>
2574
2575         <file category="library" condition="CM23_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2576         <file category="library" condition="CM33_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2577         <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/IAR"/>
2578         <file category="library" condition="CM33_FP_LE_IAR"           name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/IAR"/>
2579         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"    name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/IAR"/>
2580         <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2581         <!--file category="library" condition="CM33_DSP_DP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/IAR"/-->
2582         <file category="library" condition="ARMv8MBL_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2583         <file category="library" condition="ARMv8MML_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2584         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/IAR"/>
2585         <file category="library" condition="ARMv8MML_FP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/IAR"/>
2586         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/IAR"/>
2587         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2588         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/IAR"/-->
2589
2590       </files>
2591     </component>
2592
2593     <!-- CMSIS-NN component -->
2594     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.0.0" condition="CMSIS NN">
2595       <description>CMSIS-NN Neural Network Library</description>
2596       <files>
2597         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2598         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2599
2600         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2601         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2602         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2603         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2604
2605         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2606         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2607         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2608         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2609         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2610         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2611         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2612         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2613         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2614         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2615         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2616
2617         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2618         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2619         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2620         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2621         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2622         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2623
2624         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2625         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2626         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2627
2628         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2629
2630         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2631         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2632       </files>
2633     </component>
2634
2635     <!-- CMSIS-RTOS Keil RTX component -->
2636     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2637       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2638       <RTE_Components_h>
2639         <!-- the following content goes into file 'RTE_Components.h' -->
2640         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2641         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2642       </RTE_Components_h>
2643       <files>
2644         <!-- CPU independent -->
2645         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2646         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2647         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2648
2649         <!-- RTX templates -->
2650         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2651         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2652         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2653         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2654         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2655         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2656         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2657         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2658         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2659         <!-- tool-chain specific template file -->
2660         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2661         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2662         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2663
2664         <!-- CPU and Compiler dependent -->
2665         <!-- ARMCC -->
2666         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2667         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2668         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2669         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2670         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2671         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2672         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2673         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2674         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2675         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2676         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2677         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2678         <!-- GCC -->
2679         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2680         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2681         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2682         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2683         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2684         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2685         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2686         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2687         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2688         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2689         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2690         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2691         <!-- IAR -->
2692         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2693         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2694         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2695         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2696         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2697         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2698         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2699         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2700         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2701         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2702         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2703         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2704       </files>
2705     </component>
2706     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2707     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2708       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2709       <RTE_Components_h>
2710         <!-- the following content goes into file 'RTE_Components.h' -->
2711         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2712         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2713       </RTE_Components_h>
2714       <files>
2715         <!-- CPU independent -->
2716         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2717         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2718         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2719
2720         <!-- RTX templates -->
2721         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2722         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2723         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2724         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2725         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2726         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2727         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2728         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2729         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2730         <!-- tool-chain specific template file -->
2731         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2732         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2733         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2734
2735         <!-- CPU and Compiler dependent -->
2736         <!-- ARMCC -->
2737         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2738         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2739         <!-- GCC -->
2740         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2741         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2742         <!-- IAR -->
2743       </files>
2744     </component>
2745
2746     <!-- CMSIS-RTOS Keil RTX5 component -->
2747     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.4.0" Capiversion="1.0.0" condition="RTOS RTX5">
2748       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2749       <RTE_Components_h>
2750         <!-- the following content goes into file 'RTE_Components.h' -->
2751         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2752         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2753       </RTE_Components_h>
2754       <files>
2755         <!-- RTX header file -->
2756         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2757         <!-- RTX compatibility module for API V1 -->
2758         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2759       </files>
2760     </component>
2761
2762     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2763     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.4.0" Capiversion="2.1.2" condition="RTOS2 RTX5 Lib">
2764       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
2765       <RTE_Components_h>
2766         <!-- the following content goes into file 'RTE_Components.h' -->
2767         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2768         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2769       </RTE_Components_h>
2770       <files>
2771         <!-- RTX documentation -->
2772         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2773
2774         <!-- RTX header files -->
2775         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2776
2777         <!-- RTX configuration -->
2778         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2779         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2780
2781         <!-- RTX templates -->
2782         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2783         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2784         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2785         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2786         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2787         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2788         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2789         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2790         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2791         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2792
2793         <!-- RTX library configuration -->
2794         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2795
2796         <!-- RTX libraries (CPU and Compiler dependent) -->
2797         <!-- ARMCC -->
2798         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2799         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2800         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2801         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2802         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2803         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2804         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2805         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2806         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2807         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2808         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2809         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2810         <!-- GCC -->
2811         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2812         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2813         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2814         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2815         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2816         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2817         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2818         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2819         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2820         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2821         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2822         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2823         <!-- IAR -->
2824         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2825         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2826         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2827         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2828         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2829         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2830       </files>
2831     </component>
2832     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.4.0" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
2833       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
2834       <RTE_Components_h>
2835         <!-- the following content goes into file 'RTE_Components.h' -->
2836         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2837         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2838         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2839       </RTE_Components_h>
2840       <files>
2841         <!-- RTX documentation -->
2842         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2843
2844         <!-- RTX header files -->
2845         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2846
2847         <!-- RTX configuration -->
2848         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2849         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2850
2851         <!-- RTX templates -->
2852         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2853         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2854         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2855         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2856         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2857         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2858         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2859         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2860         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2861         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2862
2863         <!-- RTX library configuration -->
2864         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2865
2866         <!-- RTX libraries (CPU and Compiler dependent) -->
2867         <!-- ARMCC -->
2868         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2869         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2870         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2871         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2872         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2873         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2874         <!-- GCC -->
2875         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2876         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2877         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2878         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2879         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2880         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2881       </files>
2882     </component>
2883     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.4.0" Capiversion="2.1.2" condition="RTOS2 RTX5">
2884       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
2885       <RTE_Components_h>
2886         <!-- the following content goes into file 'RTE_Components.h' -->
2887         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2888         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2889         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2890       </RTE_Components_h>
2891       <files>
2892         <!-- RTX documentation -->
2893         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2894
2895         <!-- RTX header files -->
2896         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2897
2898         <!-- RTX configuration -->
2899         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2900         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2901
2902         <!-- RTX templates -->
2903         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2904         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2905         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2906         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2907         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2908         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2909         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2910         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2911         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2912         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2913
2914         <!-- RTX sources (core) -->
2915         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2916         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2917         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2918         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2919         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2920         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2921         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2922         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2923         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2924         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2925         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2926         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2927         <!-- RTX sources (library configuration) -->
2928         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2929         <!-- RTX sources (handlers ARMCC) -->
2930         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2931         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2932         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2933         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2934         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2935         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2936         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2937         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2938         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2939         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2940         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2941         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2942         <!-- RTX sources (handlers GCC) -->
2943         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2944         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2945         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2946         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2947         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2948         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2949         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2950         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2951         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2952         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2953         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2954         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2955         <!-- RTX sources (handlers IAR) -->
2956         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2957         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2958         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2959         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2960         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2961         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2962         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
2963         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
2964         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
2965         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
2966         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
2967         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
2968         <!-- OS Tick (SysTick) -->
2969         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2970       </files>
2971     </component>
2972     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.4.0" Capiversion="2.1.2" condition="RTOS2 RTX5 v7-A">
2973       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
2974       <RTE_Components_h>
2975         <!-- the following content goes into file 'RTE_Components.h' -->
2976         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2977         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2978         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2979       </RTE_Components_h>
2980       <files>
2981         <!-- RTX documentation -->
2982         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2983
2984         <!-- RTX header files -->
2985         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2986
2987         <!-- RTX configuration -->
2988         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2989         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2990
2991         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2992
2993         <!-- RTX templates -->
2994         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2995         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2996         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2997         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2998         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2999         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3000         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3001         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3002         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3003         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3004
3005         <!-- RTX sources (core) -->
3006         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3007         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3008         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3009         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3010         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3011         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3012         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3013         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3014         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3015         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3016         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3017         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3018         <!-- RTX sources (library configuration) -->
3019         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3020         <!-- RTX sources (handlers ARMCC) -->
3021         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3022         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3023         <!-- RTX sources (handlers GCC) -->
3024         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3025         <!-- RTX sources (handlers IAR) -->
3026         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3027       </files>
3028     </component>
3029     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.4.0" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
3030       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3031       <RTE_Components_h>
3032         <!-- the following content goes into file 'RTE_Components.h' -->
3033         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3034         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3035         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3036         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3037       </RTE_Components_h>
3038       <files>
3039         <!-- RTX documentation -->
3040         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3041
3042         <!-- RTX header files -->
3043         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3044
3045         <!-- RTX configuration -->
3046         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3047         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3048
3049         <!-- RTX templates -->
3050         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3051         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3052         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3053         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3054         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3055         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3056         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3057         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3058         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3059         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3060
3061         <!-- RTX sources (core) -->
3062         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3063         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3064         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3065         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3066         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3067         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3068         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3069         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3070         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3071         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3072         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3073         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3074         <!-- RTX sources (library configuration) -->
3075         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3076         <!-- RTX sources (ARMCC handlers) -->
3077         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3078         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3079         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3080         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3081         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3082         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3083         <!-- RTX sources (GCC handlers) -->
3084         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3085         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3086         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3087         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3088         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3089         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3090         <!-- RTX sources (IAR handlers) -->
3091         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3092         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3093         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3094         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3095         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3096         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3097         <!-- OS Tick (SysTick) -->
3098         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3099       </files>
3100     </component>
3101
3102   </components>
3103
3104   <boards>
3105     <board name="uVision Simulator" vendor="Keil">
3106       <description>uVision Simulator</description>
3107       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3108       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3109       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3110       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3111       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3112       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3113       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3114       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3115       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3116       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3117       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3118       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3119       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3120       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3121       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3122       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3123       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3124       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3125       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3126     </board>
3127
3128     <board name="Fixed Virtual Platform" vendor="ARM">
3129       <description>Fixed Virtual Platform</description>
3130       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
3131       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
3132       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
3133     </board>
3134   </boards>
3135
3136   <examples>
3137     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
3138       <description>DSP_Lib Class Marks example</description>
3139       <board name="uVision Simulator" vendor="Keil"/>
3140       <project>
3141         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3142       </project>
3143       <attributes>
3144         <component Cclass="CMSIS" Cgroup="CORE"/>
3145         <component Cclass="CMSIS" Cgroup="DSP"/>
3146         <component Cclass="Device" Cgroup="Startup"/>
3147         <category>Getting Started</category>
3148       </attributes>
3149     </example>
3150
3151     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
3152       <description>DSP_Lib Convolution example</description>
3153       <board name="uVision Simulator" vendor="Keil"/>
3154       <project>
3155         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3156       </project>
3157       <attributes>
3158         <component Cclass="CMSIS" Cgroup="CORE"/>
3159         <component Cclass="CMSIS" Cgroup="DSP"/>
3160         <component Cclass="Device" Cgroup="Startup"/>
3161         <category>Getting Started</category>
3162       </attributes>
3163     </example>
3164
3165     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
3166       <description>DSP_Lib Dotproduct example</description>
3167       <board name="uVision Simulator" vendor="Keil"/>
3168       <project>
3169         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3170       </project>
3171       <attributes>
3172         <component Cclass="CMSIS" Cgroup="CORE"/>
3173         <component Cclass="CMSIS" Cgroup="DSP"/>
3174         <component Cclass="Device" Cgroup="Startup"/>
3175         <category>Getting Started</category>
3176       </attributes>
3177     </example>
3178
3179     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
3180       <description>DSP_Lib FFT Bin example</description>
3181       <board name="uVision Simulator" vendor="Keil"/>
3182       <project>
3183         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3184       </project>
3185       <attributes>
3186         <component Cclass="CMSIS" Cgroup="CORE"/>
3187         <component Cclass="CMSIS" Cgroup="DSP"/>
3188         <component Cclass="Device" Cgroup="Startup"/>
3189         <category>Getting Started</category>
3190       </attributes>
3191     </example>
3192
3193     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
3194       <description>DSP_Lib FIR example</description>
3195       <board name="uVision Simulator" vendor="Keil"/>
3196       <project>
3197         <environment name="uv" load="arm_fir_example.uvprojx"/>
3198       </project>
3199       <attributes>
3200         <component Cclass="CMSIS" Cgroup="CORE"/>
3201         <component Cclass="CMSIS" Cgroup="DSP"/>
3202         <component Cclass="Device" Cgroup="Startup"/>
3203         <category>Getting Started</category>
3204       </attributes>
3205     </example>
3206
3207     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
3208       <description>DSP_Lib Graphic Equalizer example</description>
3209       <board name="uVision Simulator" vendor="Keil"/>
3210       <project>
3211         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3212       </project>
3213       <attributes>
3214         <component Cclass="CMSIS" Cgroup="CORE"/>
3215         <component Cclass="CMSIS" Cgroup="DSP"/>
3216         <component Cclass="Device" Cgroup="Startup"/>
3217         <category>Getting Started</category>
3218       </attributes>
3219     </example>
3220
3221     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
3222       <description>DSP_Lib Linear Interpolation example</description>
3223       <board name="uVision Simulator" vendor="Keil"/>
3224       <project>
3225         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3226       </project>
3227       <attributes>
3228         <component Cclass="CMSIS" Cgroup="CORE"/>
3229         <component Cclass="CMSIS" Cgroup="DSP"/>
3230         <component Cclass="Device" Cgroup="Startup"/>
3231         <category>Getting Started</category>
3232       </attributes>
3233     </example>
3234
3235     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
3236       <description>DSP_Lib Matrix example</description>
3237       <board name="uVision Simulator" vendor="Keil"/>
3238       <project>
3239         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3240       </project>
3241       <attributes>
3242         <component Cclass="CMSIS" Cgroup="CORE"/>
3243         <component Cclass="CMSIS" Cgroup="DSP"/>
3244         <component Cclass="Device" Cgroup="Startup"/>
3245         <category>Getting Started</category>
3246       </attributes>
3247     </example>
3248
3249     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
3250       <description>DSP_Lib Signal Convergence example</description>
3251       <board name="uVision Simulator" vendor="Keil"/>
3252       <project>
3253         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3254       </project>
3255       <attributes>
3256         <component Cclass="CMSIS" Cgroup="CORE"/>
3257         <component Cclass="CMSIS" Cgroup="DSP"/>
3258         <component Cclass="Device" Cgroup="Startup"/>
3259         <category>Getting Started</category>
3260       </attributes>
3261     </example>
3262
3263     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
3264       <description>DSP_Lib Sinus/Cosinus example</description>
3265       <board name="uVision Simulator" vendor="Keil"/>
3266       <project>
3267         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3268       </project>
3269       <attributes>
3270         <component Cclass="CMSIS" Cgroup="CORE"/>
3271         <component Cclass="CMSIS" Cgroup="DSP"/>
3272         <component Cclass="Device" Cgroup="Startup"/>
3273         <category>Getting Started</category>
3274       </attributes>
3275     </example>
3276
3277     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
3278       <description>DSP_Lib Variance example</description>
3279       <board name="uVision Simulator" vendor="Keil"/>
3280       <project>
3281         <environment name="uv" load="arm_variance_example.uvprojx"/>
3282       </project>
3283       <attributes>
3284         <component Cclass="CMSIS" Cgroup="CORE"/>
3285         <component Cclass="CMSIS" Cgroup="DSP"/>
3286         <component Cclass="Device" Cgroup="Startup"/>
3287         <category>Getting Started</category>
3288       </attributes>
3289     </example>
3290
3291     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3292       <description>Neural Network CIFAR10 example</description>
3293       <board name="uVision Simulator" vendor="Keil"/>
3294       <project>
3295         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3296       </project>
3297       <attributes>
3298         <component Cclass="CMSIS" Cgroup="CORE"/>
3299         <component Cclass="CMSIS" Cgroup="DSP"/>
3300         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3301         <component Cclass="Device" Cgroup="Startup"/>
3302         <category>Getting Started</category>
3303       </attributes>
3304     </example>
3305
3306     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
3307       <description>Neural Network GRU example</description>
3308       <board name="uVision Simulator" vendor="Keil"/>
3309       <project>
3310         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3311       </project>
3312       <attributes>
3313         <component Cclass="CMSIS" Cgroup="CORE"/>
3314         <component Cclass="CMSIS" Cgroup="DSP"/>
3315         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3316         <component Cclass="Device" Cgroup="Startup"/>
3317         <category>Getting Started</category>
3318       </attributes>
3319     </example>
3320
3321     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3322       <description>CMSIS-RTOS2 Blinky example</description>
3323       <board name="uVision Simulator" vendor="Keil"/>
3324       <project>
3325         <environment name="uv" load="Blinky.uvprojx"/>
3326       </project>
3327       <attributes>
3328         <component Cclass="CMSIS" Cgroup="CORE"/>
3329         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3330         <component Cclass="Device" Cgroup="Startup"/>
3331         <category>Getting Started</category>
3332       </attributes>
3333     </example>
3334
3335     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3336       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3337       <board name="uVision Simulator" vendor="Keil"/>
3338       <project>
3339         <environment name="uv" load="Blinky.uvprojx"/>
3340       </project>
3341       <attributes>
3342         <component Cclass="CMSIS" Cgroup="CORE"/>
3343         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3344         <component Cclass="Device" Cgroup="Startup"/>
3345         <category>Getting Started</category>
3346       </attributes>
3347     </example>
3348
3349     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3350       <description>CMSIS-RTOS2 Message Queue Example</description>
3351       <board name="uVision Simulator" vendor="Keil"/>
3352       <project>
3353         <environment name="uv" load="MsqQueue.uvprojx"/>
3354       </project>
3355       <attributes>
3356         <component Cclass="CMSIS" Cgroup="CORE"/>
3357         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3358         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3359         <component Cclass="Device" Cgroup="Startup"/>
3360         <category>Getting Started</category>
3361       </attributes>
3362     </example>
3363
3364     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3365       <description>CMSIS-RTOS2 Memory Pool Example</description>
3366       <board name="Fixed Virtual Platform" vendor="ARM"/>
3367       <project>
3368         <environment name="uv" load="MemPool.uvprojx"/>
3369       </project>
3370       <attributes>
3371         <component Cclass="CMSIS" Cgroup="CORE"/>
3372         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3373         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3374         <component Cclass="Device" Cgroup="Startup"/>
3375         <category>Getting Started</category>
3376       </attributes>
3377     </example>
3378
3379     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3380       <description>Bare-metal secure/non-secure example without RTOS</description>
3381       <board name="uVision Simulator" vendor="Keil"/>
3382       <project>
3383         <environment name="uv" load="NoRTOS.uvmpw"/>
3384       </project>
3385       <attributes>
3386         <component Cclass="CMSIS" Cgroup="CORE"/>
3387         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3388         <component Cclass="Device" Cgroup="Startup"/>
3389         <category>Getting Started</category>
3390       </attributes>
3391     </example>
3392
3393     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3394       <description>Secure/non-secure RTOS example with thread context management</description>
3395       <board name="uVision Simulator" vendor="Keil"/>
3396       <project>
3397         <environment name="uv" load="RTOS.uvmpw"/>
3398       </project>
3399       <attributes>
3400         <component Cclass="CMSIS" Cgroup="CORE"/>
3401         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3402         <component Cclass="Device" Cgroup="Startup"/>
3403         <category>Getting Started</category>
3404       </attributes>
3405     </example>
3406
3407     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3408       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3409       <board name="uVision Simulator" vendor="Keil"/>
3410       <project>
3411         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3412       </project>
3413       <attributes>
3414         <component Cclass="CMSIS" Cgroup="CORE"/>
3415         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3416         <component Cclass="Device" Cgroup="Startup"/>
3417         <category>Getting Started</category>
3418       </attributes>
3419     </example>
3420
3421   </examples>
3422
3423 </package>