begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.0.1-dev6">
  12       DSP:
  13        - updated to version V1.5.1.
  14        - changed copyrigth note.
  15        - added ARMv8M DSP libraries.
  16        PACK:
  17        - added taxonomy for Cclass RTOS
  18     </release>
  19     <release version="5.0.1-dev5">
  20       DSP:
  21        - updated to version V1.5.0.
  22     </release>
  23     <release version="5.0.1-dev4">
  24       DSP:
  25        - preparation for ARMv8M DSP libraries.
  26     </release>
  27     <release version="5.0.1-dev3">
  28       Updated ARMv8M Mainline FPU settings in partition*.h
  29     </release>
  30     <release version="5.0.1-dev2">
  31       CMSIS-RTOS2:
  32        - API 2.1   (see revision history for details)
  33        - RTX 5.1.0 (see revision history for details)
  34     </release>
  35     <release version="5.0.1-dev1">
  36       All C module and header files: updated removing 'http://' within license header sections flagged by MISRA as comment within comment
  37       PDSC: added new compatible devices to 'uVision Simulator' generic board description
  38       CMSIS-Pack Schema: adding
  39     </release>
  40     <release version="5.0.1-dev0">
  41       CMSIS-Core:
  42        - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  43        - Updated template for secure main function (main_s.c)
  44        - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  45       CMSIS-RTOS2:
  46        - RTX 5.0.1 (see revision history for details)
  47     </release>
  48     <release version="5.0.0" date="2016-11-11">
  49       Changed open source license to Apache 2.0
  50       CMSIS_Core:
  51        - Added support for Cortex-M23 and Cortex-M33.
  52        - Added ARMv8-M device configurations for mainline and baseline.
  53        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  54        - Added cmsis_compiler.h to unify compiler behaviour.
  55        - Updated function SCB_EnableICache (for Cortex-M7).
  56        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  57       CMSIS-RTOS:
  58         - bug fix in RTX 4.82 (see revision history for details)
  59       CMSIS-RTOS2:
  60         - new API including compatibility layer to CMSIS-RTOS
  61         - reference implementation based on RTX5
  62         - supports all Cortex-M variants including TrustZone for ARMv8-M
  63       CMSIS-SVD:
  64        - reworked SVD format documentation
  65        - removed SVD file database documentation as SVD files are distributed in packs
  66        - updated SVDConv for Win32 and Linux
  67       CMSIS-DSP:
  68        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  69        - Added DSP libraries build projects to CMSIS pack.
  70     </release>
  71     <release version="4.5.0" date="2015-10-28">
  72       - CMSIS-Core     4.30.0  (see revision history for details)
  73       - CMSIS-DAP      1.1.0   (unchanged)
  74       - CMSIS-Driver   2.04.0  (see revision history for details)
  75       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
  76       - CMSIS-PACK     1.4.1   (see revision history for details)
  77       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
  78       - CMSIS-SVD      1.3.1   (see revision history for details)
  79     </release>
  80     <release version="4.4.0" date="2015-09-11">
  81       - CMSIS-Core     4.20   (see revision history for details)
  82       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
  83       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
  84       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
  85       - CMSIS-RTOS
  86         -- API         1.02   (unchanged)
  87         -- RTX         4.79   (see revision history for details)
  88       - CMSIS-SVD      1.3.0  (see revision history for details)
  89       - CMSIS-DAP      1.1.0  (extended with SWO support)
  90     </release>
  91     <release version="4.3.0" date="2015-03-20">
  92       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
  93       - CMSIS-DSP      1.4.5  (see revision history for details)
  94       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
  95       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
  96       - CMSIS-RTOS
  97         -- API         1.02   (unchanged)
  98         -- RTX         4.78   (see revision history for details)
  99       - CMSIS-SVD      1.2    (unchanged)
 100     </release>
 101     <release version="4.2.0" date="2014-09-24">
 102       Adding Cortex-M7 support
 103       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 104       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 105       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 106       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 107       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 108     </release>
 109     <release version="4.1.1" date="2014-06-30">
 110       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 111     </release>
 112     <release version="4.1.0" date="2014-06-12">
 113       - CMSIS-Driver   2.02  (incompatible update)
 114       - CMSIS-Pack     1.3   (see revision history for details)
 115       - CMSIS-DSP      1.4.2 (unchanged)
 116       - CMSIS-Core     3.30  (unchanged)
 117       - CMSIS-RTOS RTX 4.74  (unchanged)
 118       - CMSIS-RTOS API 1.02  (unchanged)
 119       - CMSIS-SVD      1.10  (unchanged)
 120       PACK:
 121       - removed G++ specific files from PACK
 122       - added Component Startup variant "C Startup"
 123       - added Pack Checking Utility
 124       - updated conditions to reflect tool-chain dependency
 125       - added Taxonomy for Graphics
 126       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 127     </release>
 128     <release version="4.0.0">
 129       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 130       - CMSIS-Pack     1.1   Preliminary
 131       - CMSIS-DSP      1.4.2 (see revision history for details)
 132       - CMSIS-Core     3.30  (see revision history for details)
 133       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 134       - CMSIS-RTOS API 1.02  (unchanged)
 135       - CMSIS-SVD      1.10  (unchanged)
 136     </release>
 137     <release version="3.20.4">
 138       - CMSIS-RTOS 4.74 (see revision history for details)
 139       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 140     </release>
 141     <release version="3.20.3">
 142       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 143       - CMSIS-RTOS 4.73 (see revision history for details)
 144     </release>
 145     <release version="3.20.2">
 146       - CMSIS-Pack documentation has been added
 147       - CMSIS-Drivers header and documentation have been added to PACK
 148       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 149     </release>
 150     <release version="3.20.1">
 151       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 152       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 153     </release>
 154     <release version="3.20.0">
 155       The software portions that are deployed in the application program are now under a BSD license which allows usage
 156       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 157       The individual components have been update as listed below:
 158       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 159       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 160       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 161       - CMSIS-SVD is unchanged.
 162     </release>
 163   </releases>
 164
 165   <taxonomy>
 166     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 167     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 168     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 169     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 170     <description Cclass="File System">File Drive Support and File System</description>
 171     <description Cclass="Graphics">Graphical User Interface</description>
 172     <description Cclass="Network">Network Stack using Internet Protocols</description>
 173     <description Cclass="USB">Universal Serial Bus Stack</description>
 174     <description Cclass="Compiler">ARM Compiler Software Extensions</description>
 175   </taxonomy>
 176
 177   <devices>
 178     <!-- ******************************  Cortex-M0  ****************************** -->
 179     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 180       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 181       <description>
 182 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 183 - simple, easy-to-use programmers model
 184 - highly efficient ultra-low power operation
 185 - excellent code density
 186 - deterministic, high-performance interrupt handling
 187 - upward compatibility with the rest of the Cortex-M processor family.
 188       </description>
 189       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 190       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 191       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 192       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 193
 194       <device Dname="ARMCM0">
 195         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 196         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 197       </device>
 198     </family>
 199
 200     <!-- ******************************  Cortex-M0P  ****************************** -->
 201     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 202       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 203       <description>
 204 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 205 - simple, easy-to-use programmers model
 206 - highly efficient ultra-low power operation
 207 - excellent code density
 208 - deterministic, high-performance interrupt handling
 209 - upward compatibility with the rest of the Cortex-M processor family.
 210       </description>
 211       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 212       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 213       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 214       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 215
 216       <device Dname="ARMCM0P">
 217         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 218         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 219       </device>
 220     </family>
 221
 222     <!-- ******************************  Cortex-M3  ****************************** -->
 223     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 224       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 225       <description>
 226 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 227 - simple, easy-to-use programmers model
 228 - highly efficient ultra-low power operation
 229 - excellent code density
 230 - deterministic, high-performance interrupt handling
 231 - upward compatibility with the rest of the Cortex-M processor family.
 232       </description>
 233       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 234       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 235       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 236       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 237
 238       <device Dname="ARMCM3">
 239         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 240         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 241       </device>
 242     </family>
 243
 244     <!-- ******************************  Cortex-M4  ****************************** -->
 245     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 246       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 247       <description>
 248 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 249 - simple, easy-to-use programmers model
 250 - highly efficient ultra-low power operation
 251 - excellent code density
 252 - deterministic, high-performance interrupt handling
 253 - upward compatibility with the rest of the Cortex-M processor family.
 254       </description>
 255       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 256       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 257       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 258       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 259
 260       <device Dname="ARMCM4">
 261         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 262         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 263       </device>
 264
 265       <device Dname="ARMCM4_FP">
 266         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 267         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 268       </device>
 269     </family>
 270
 271     <!-- ******************************  Cortex-M7  ****************************** -->
 272     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 273       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 274       <description>
 275 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 276 - simple, easy-to-use programmers model
 277 - highly efficient ultra-low power operation
 278 - excellent code density
 279 - deterministic, high-performance interrupt handling
 280 - upward compatibility with the rest of the Cortex-M processor family.
 281       </description>
 282       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 283       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 284       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 285       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 286
 287       <device Dname="ARMCM7">
 288         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 289         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 290       </device>
 291
 292       <device Dname="ARMCM7_SP">
 293         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 294         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 295       </device>
 296
 297       <device Dname="ARMCM7_DP">
 298         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 299         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 300       </device>
 301     </family>
 302
 303     <!-- ******************************  Cortex-M23  ********************** -->
 304     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 305       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 306       <description>
 307 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 308 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 309 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 310       </description>
 311       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 312       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 313       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 314       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 315       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 316       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 317
 318       <device Dname="ARMCM23">
 319         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 320         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 321       </device>
 322
 323       <device Dname="ARMCM23_TZ">
 324         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 325         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 326       </device>
 327     </family>
 328
 329     <!-- ******************************  Cortex-M33  ****************************** -->
 330     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 331       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 332       <description>
 333 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 334 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 335       </description>
 336       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 337       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 338       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 339       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 340       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 341       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 342
 343       <device Dname="ARMCM33">
 344         <description>
 345 no DSP Instructions, no Floating Point Unit, no TrustZone
 346         </description>
 347         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 348         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 349       </device>
 350
 351       <device Dname="ARMCM33_TZ">
 352         <description>
 353 no DSP Instructions, no Floating Point Unit, TrustZone
 354         </description>
 355         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 356         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 357       </device>
 358
 359       <device Dname="ARMCM33_DSP_FP">
 360         <description>
 361 DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 362         </description>
 363         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 364         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 365       </device>
 366
 367       <device Dname="ARMCM33_DSP_FP_TZ">
 368         <description>
 369 DSP Instructions, Single Precision Floating Point Unit, TrustZone
 370         </description>
 371         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 372         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 373       </device>
 374     </family>
 375
 376     <!-- ******************************  ARMSC000  ****************************** -->
 377     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 378       <description>
 379 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 380 - simple, easy-to-use programmers model
 381 - highly efficient ultra-low power operation
 382 - excellent code density
 383 - deterministic, high-performance interrupt handling
 384       </description>
 385       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 386       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 387       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 388       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 389
 390       <device Dname="ARMSC000">
 391         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 392         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 393       </device>
 394     </family>
 395
 396     <!-- ******************************  ARMSC300  ****************************** -->
 397     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 398       <description>
 399 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 400 - simple, easy-to-use programmers model
 401 - highly efficient ultra-low power operation
 402 - excellent code density
 403 - deterministic, high-performance interrupt handling
 404       </description>
 405       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 406       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 407       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 408       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 409
 410       <device Dname="ARMSC300">
 411         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 412         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 413       </device>
 414     </family>
 415
 416     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 417     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 418       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 419       <description>
 420 ARMv8-M Baseline based device with TrustZone
 421       </description>
 422       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 423       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 424       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 425       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 426       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 427       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 428
 429       <device Dname="ARMv8MBL">
 430         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 431         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 432       </device>
 433     </family>
 434
 435     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 436     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 437       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 438       <description>
 439 ARMv8-M Mainline based device with TrustZone
 440       </description>
 441       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 442       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 443       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 444       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 445       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 446       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 447
 448       <device Dname="ARMv8MML">
 449         <description>
 450 no DSP Instructions, no Floating Point Unit, TrustZone
 451         </description>
 452         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 453         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 454       </device>
 455
 456       <device Dname="ARMv8MML_DSP">
 457         <description>
 458 DSP Instructions, no Floating Point Unit, TrustZone
 459         </description>
 460         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 461         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 462       </device>
 463
 464       <device Dname="ARMv8MML_SP">
 465         <description>
 466 no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 467         </description>
 468         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 469         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 470       </device>
 471
 472       <device Dname="ARMv8MML_DSP_SP">
 473         <description>
 474 DSP Instructions, Single Precision Floating Point Unit, TrustZone
 475         </description>
 476         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 477         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 478       </device>
 479
 480       <device Dname="ARMv8MML_DP">
 481         <description>
 482 no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 483         </description>
 484         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 485         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 486       </device>
 487
 488       <device Dname="ARMv8MML_DSP_DP">
 489         <description>
 490 DSP Instructions, Double Precision Floating Point Unit, TrustZone
 491         </description>
 492         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 493         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 494       </device>
 495     </family>
 496
 497   </devices>
 498
 499
 500   <apis>
 501     <!-- CMSIS-RTOS API -->
 502     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 503       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 504       <files>
 505         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 506       </files>
 507     </api>
 508     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.0" exclusive="1">
 509       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 510       <files>
 511         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 512         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 513       </files>
 514     </api>
 515     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.2.0" exclusive="0">
 516       <description>USART Driver API for Cortex-M</description>
 517       <files>
 518         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 519         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 520       </files>
 521     </api>
 522     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.1.0" exclusive="0">
 523       <description>SPI Driver API for Cortex-M</description>
 524       <files>
 525         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 526         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 527       </files>
 528     </api>
 529     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.0.0" exclusive="0">
 530       <description>SAI Driver API for Cortex-M</description>
 531       <files>
 532         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 533         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 534       </files>
 535     </api>
 536     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.2.0" exclusive="0">
 537       <description>I2C Driver API for Cortex-M</description>
 538       <files>
 539         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 540         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 541       </files>
 542     </api>
 543     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.0.0" exclusive="0">
 544       <description>CAN Driver API for Cortex-M</description>
 545       <files>
 546         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 547         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 548       </files>
 549     </api>
 550     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.0.0" exclusive="0">
 551       <description>Flash Driver API for Cortex-M</description>
 552       <files>
 553         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 554         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 555       </files>
 556     </api>
 557     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.2.0" exclusive="0">
 558       <description>MCI Driver API for Cortex-M</description>
 559       <files>
 560         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 561         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 562       </files>
 563     </api>
 564     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.1.0" exclusive="0">
 565       <description>NAND Flash Driver API for Cortex-M</description>
 566       <files>
 567         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 568         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 569       </files>
 570     </api>
 571     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 572       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 573       <files>
 574         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 575         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 576         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 577       </files>
 578     </api>
 579     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 580       <description>Ethernet MAC Driver API for Cortex-M</description>
 581       <files>
 582         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 583         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 584       </files>
 585     </api>
 586     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.0.0" exclusive="0">
 587       <description>Ethernet PHY Driver API for Cortex-M</description>
 588       <files>
 589         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 590         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 591       </files>
 592     </api>
 593     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.1.0" exclusive="0">
 594       <description>USB Device Driver API for Cortex-M</description>
 595       <files>
 596         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 597         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 598       </files>
 599     </api>
 600     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.1.0" exclusive="0">
 601       <description>USB Host Driver API for Cortex-M</description>
 602       <files>
 603         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 604         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 605       </files>
 606     </api>
 607   </apis>
 608
 609   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 610   <conditions>
 611     <!-- compiler -->
 612     <condition id="ARMCC">
 613       <require Tcompiler="ARMCC"/>
 614     </condition>
 615     <condition id="GCC">
 616       <require Tcompiler="GCC"/>
 617     </condition>
 618     <condition id="IAR">
 619       <require Tcompiler="IAR"/>
 620     </condition>
 621     <condition id="ARMCC GCC">
 622       <accept Tcompiler="ARMCC"/>
 623       <accept Tcompiler="GCC"/>
 624     </condition>
 625     <condition id="ARMCC GCC IAR">
 626       <accept Tcompiler="ARMCC"/>
 627       <accept Tcompiler="GCC"/>
 628       <accept Tcompiler="IAR"/>
 629     </condition>
 630
 631     <!-- ARM architecture -->
 632     <condition id="ARMv6-M Device">
 633       <description>ARMv6-M architecture based device</description>
 634       <accept Dcore="Cortex-M0"/>
 635       <accept Dcore="Cortex-M0+"/>
 636       <accept Dcore="SC000"/>
 637     </condition>
 638     <condition id="ARMv7-M Device">
 639       <description>ARMv7-M architecture based device</description>
 640       <accept Dcore="Cortex-M3"/>
 641       <accept Dcore="Cortex-M4"/>
 642       <accept Dcore="Cortex-M7"/>
 643       <accept Dcore="SC300"/>
 644     </condition>
 645     <condition id="ARMv8-M Device">
 646       <description>ARMv8-M architecture based device</description>
 647       <accept Dcore="ARMV8MBL"/>
 648       <accept Dcore="ARMV8MML"/>
 649       <accept Dcore="Cortex-M23"/>
 650       <accept Dcore="Cortex-M33"/>
 651     </condition>
 652     <condition id="ARMv8-M TZ Device">
 653       <description>ARMv8-M architecture based device with TrustZone</description>
 654       <require condition="ARMv8-M Device"/>
 655       <require Dtz="TZ"/>
 656     </condition>
 657     <condition id="ARMv6_7-M Device">
 658       <description>ARMv6_7-M architecture based device</description>
 659       <accept condition="ARMv6-M Device"/>
 660       <accept condition="ARMv7-M Device"/>
 661     </condition>
 662     <condition id="ARMv6_7_8-M Device">
 663       <description>ARMv6_7_8-M architecture based device</description>
 664       <accept condition="ARMv6-M Device"/>
 665       <accept condition="ARMv7-M Device"/>
 666       <accept condition="ARMv8-M Device"/>
 667     </condition>
 668
 669     <!-- ARM core -->
 670     <condition id="CM0">
 671       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 672       <accept Dcore="Cortex-M0"/>
 673       <accept Dcore="Cortex-M0+"/>
 674       <accept Dcore="SC000"/>
 675     </condition>
 676     <condition id="CM3">
 677       <description>Cortex-M3 or SC300 processor based device</description>
 678       <accept Dcore="Cortex-M3"/>
 679       <accept Dcore="SC300"/>
 680     </condition>
 681     <condition id="CM4">
 682       <description>Cortex-M4 processor based device</description>
 683       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 684     </condition>
 685     <condition id="CM4_FP">
 686       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 687       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 688     </condition>
 689     <condition id="CM7">
 690       <description>Cortex-M7 processor based device</description>
 691       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 692     </condition>
 693     <condition id="CM7_FP">
 694       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 695       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 696       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 697     </condition>
 698     <condition id="CM7_SP">
 699       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 700       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 701     </condition>
 702     <condition id="CM7_DP">
 703       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 704       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 705     </condition>
 706     <condition id="CM23">
 707       <description>Cortex-M23 processor based device</description>
 708       <require Dcore="Cortex-M23"/>
 709     </condition>
 710     <condition id="CM33">
 711       <description>Cortex-M33 processor based device</description>
 712       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 713     </condition>
 714     <condition id="CM33_FP">
 715       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 716       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 717     </condition>
 718     <condition id="ARMv8MBL">
 719       <description>ARMv8-M Baseline processor based device</description>
 720       <require Dcore="ARMV8MBL"/>
 721     </condition>
 722     <condition id="ARMv8MML">
 723       <description>ARMv8-M Mainline processor based device</description>
 724       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 725     </condition>
 726     <condition id="ARMv8MML_FP">
 727       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 728       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 729       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 730     </condition>
 731
 732     <condition id="CM33_NODSP_NOFPU">
 733       <description>CM33, no DSP, no FPU</description>
 734       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 735     </condition>
 736     <condition id="CM33_DSP_NOFPU">
 737       <description>CM33, DSP, no FPU</description>
 738       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 739     </condition>
 740     <condition id="CM33_NODSP_SP">
 741       <description>CM33, no DSP, SP FPU</description>
 742       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 743     </condition>
 744     <condition id="CM33_DSP_SP">
 745       <description>CM33, DSP, SP FPU</description>
 746       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 747     </condition>
 748
 749     <condition id="ARMv8MML_NODSP_NOFPU">
 750       <description>ARMv8MML, no DSP, no FPU</description>
 751       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 752     </condition>
 753     <condition id="ARMv8MML_DSP_NOFPU">
 754       <description>ARMv8MML, DSP, no FPU</description>
 755       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 756     </condition>
 757     <condition id="ARMv8MML_NODSP_SP">
 758       <description>ARMv8MML, no DSP, SP FPU</description>
 759       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 760     </condition>
 761     <condition id="ARMv8MML_DSP_SP">
 762       <description>ARMv8MML, DSP, SP FPU</description>
 763       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 764     </condition>
 765
 766     <!-- ARMCC compiler -->
 767     <condition id="CM0_ARMCC">
 768       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 769       <require condition="CM0"/>
 770       <require Tcompiler="ARMCC"/>
 771     </condition>
 772     <condition id="CM0_LE_ARMCC">
 773       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 774       <require condition="CM0_ARMCC"/>
 775       <require Dendian="Little-endian"/>
 776     </condition>
 777     <condition id="CM0_BE_ARMCC">
 778       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 779       <require condition="CM0_ARMCC"/>
 780       <require Dendian="Big-endian"/>
 781     </condition>
 782
 783     <condition id="CM3_ARMCC">
 784       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 785       <require condition="CM3"/>
 786       <require Tcompiler="ARMCC"/>
 787     </condition>
 788     <condition id="CM3_LE_ARMCC">
 789       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 790       <require condition="CM3_ARMCC"/>
 791       <require Dendian="Little-endian"/>
 792     </condition>
 793     <condition id="CM3_BE_ARMCC">
 794       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 795       <require condition="CM3_ARMCC"/>
 796       <require Dendian="Big-endian"/>
 797     </condition>
 798
 799     <condition id="CM4_ARMCC">
 800       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 801       <require condition="CM4"/>
 802       <require Tcompiler="ARMCC"/>
 803     </condition>
 804     <condition id="CM4_LE_ARMCC">
 805       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 806       <require condition="CM4_ARMCC"/>
 807       <require Dendian="Little-endian"/>
 808     </condition>
 809     <condition id="CM4_BE_ARMCC">
 810       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 811       <require condition="CM4_ARMCC"/>
 812       <require Dendian="Big-endian"/>
 813     </condition>
 814
 815     <condition id="CM4_FP_ARMCC">
 816       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 817       <require condition="CM4_FP"/>
 818       <require Tcompiler="ARMCC"/>
 819     </condition>
 820     <condition id="CM4_FP_LE_ARMCC">
 821       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 822       <require condition="CM4_FP_ARMCC"/>
 823       <require Dendian="Little-endian"/>
 824     </condition>
 825     <condition id="CM4_FP_BE_ARMCC">
 826       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 827       <require condition="CM4_FP_ARMCC"/>
 828       <require Dendian="Big-endian"/>
 829     </condition>
 830
 831     <!-- XMC 4000 Series devices from Infineon require a special library -->
 832     <condition id="CM4_LE_ARMCC_STD">
 833       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
 834       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
 835       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 836       <require Tcompiler="ARMCC"/>
 837     </condition>
 838     <condition id="CM4_LE_ARMCC_IFX">
 839       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
 840       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 841       <require Tcompiler="ARMCC"/>
 842     </condition>
 843     <condition id="CM4_FP_LE_ARMCC_STD">
 844       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
 845       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
 846       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 847       <require Tcompiler="ARMCC"/>
 848     </condition>
 849     <condition id="CM4_FP_LE_ARMCC_IFX">
 850       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
 851       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 852       <require Tcompiler="ARMCC"/>
 853     </condition>
 854
 855     <condition id="CM7_ARMCC">
 856       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 857       <require condition="CM7"/>
 858       <require Tcompiler="ARMCC"/>
 859     </condition>
 860     <condition id="CM7_LE_ARMCC">
 861       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 862       <require condition="CM7_ARMCC"/>
 863       <require Dendian="Little-endian"/>
 864     </condition>
 865     <condition id="CM7_BE_ARMCC">
 866       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 867       <require condition="CM7_ARMCC"/>
 868       <require Dendian="Big-endian"/>
 869     </condition>
 870
 871     <condition id="CM7_FP_ARMCC">
 872       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 873       <require condition="CM7_FP"/>
 874       <require Tcompiler="ARMCC"/>
 875     </condition>
 876     <condition id="CM7_FP_LE_ARMCC">
 877       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 878       <require condition="CM7_FP_ARMCC"/>
 879       <require Dendian="Little-endian"/>
 880     </condition>
 881     <condition id="CM7_FP_BE_ARMCC">
 882       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 883       <require condition="CM7_FP_ARMCC"/>
 884       <require Dendian="Big-endian"/>
 885     </condition>
 886
 887     <condition id="CM7_SP_ARMCC">
 888       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 889       <require condition="CM7_SP"/>
 890       <require Tcompiler="ARMCC"/>
 891     </condition>
 892     <condition id="CM7_SP_LE_ARMCC">
 893       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 894       <require condition="CM7_SP_ARMCC"/>
 895       <require Dendian="Little-endian"/>
 896     </condition>
 897     <condition id="CM7_SP_BE_ARMCC">
 898       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 899       <require condition="CM7_SP_ARMCC"/>
 900       <require Dendian="Big-endian"/>
 901     </condition>
 902
 903     <condition id="CM7_DP_ARMCC">
 904       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
 905       <require condition="CM7_DP"/>
 906       <require Tcompiler="ARMCC"/>
 907     </condition>
 908     <condition id="CM7_DP_LE_ARMCC">
 909       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
 910       <require condition="CM7_DP_ARMCC"/>
 911       <require Dendian="Little-endian"/>
 912     </condition>
 913     <condition id="CM7_DP_BE_ARMCC">
 914       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
 915       <require condition="CM7_DP_ARMCC"/>
 916       <require Dendian="Big-endian"/>
 917     </condition>
 918
 919     <condition id="CM23_ARMCC">
 920       <description>Cortex-M23 processor based device for the ARM Compiler</description>
 921       <require condition="CM23"/>
 922       <require Tcompiler="ARMCC"/>
 923     </condition>
 924     <condition id="CM23_LE_ARMCC">
 925       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
 926       <require condition="CM23_ARMCC"/>
 927       <require Dendian="Little-endian"/>
 928     </condition>
 929     <condition id="CM23_BE_ARMCC">
 930       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
 931       <require condition="CM23_ARMCC"/>
 932       <require Dendian="Big-endian"/>
 933     </condition>
 934
 935     <condition id="CM33_ARMCC">
 936       <description>Cortex-M33 processor based device for the ARM Compiler</description>
 937       <require condition="CM33"/>
 938       <require Tcompiler="ARMCC"/>
 939     </condition>
 940     <condition id="CM33_LE_ARMCC">
 941       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
 942       <require condition="CM33_ARMCC"/>
 943       <require Dendian="Little-endian"/>
 944     </condition>
 945     <condition id="CM33_BE_ARMCC">
 946       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
 947       <require condition="CM33_ARMCC"/>
 948       <require Dendian="Big-endian"/>
 949     </condition>
 950
 951     <condition id="CM33_FP_ARMCC">
 952       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
 953       <require condition="CM33_FP"/>
 954       <require Tcompiler="ARMCC"/>
 955     </condition>
 956     <condition id="CM33_FP_LE_ARMCC">
 957       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 958       <require condition="CM33_FP_ARMCC"/>
 959       <require Dendian="Little-endian"/>
 960     </condition>
 961     <condition id="CM33_FP_BE_ARMCC">
 962       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 963       <require condition="CM33_FP_ARMCC"/>
 964       <require Dendian="Big-endian"/>
 965     </condition>
 966
 967     <condition id="CM33_NODSP_NOFPU_ARMCC">
 968       <description>CM33, no DSP, no FPU, ARM Compiler</description>
 969       <require condition="CM33_NODSP_NOFPU"/>
 970       <require Tcompiler="ARMCC"/>
 971     </condition>
 972     <condition id="CM33_DSP_NOFPU_ARMCC">
 973       <description>CM33, DSP, no FPU, ARM Compiler</description>
 974       <require condition="CM33_DSP_NOFPU"/>
 975       <require Tcompiler="ARMCC"/>
 976     </condition>
 977     <condition id="CM33_NODSP_SP_ARMCC">
 978       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
 979       <require condition="CM33_NODSP_SP"/>
 980       <require Tcompiler="ARMCC"/>
 981     </condition>
 982     <condition id="CM33_DSP_SP_ARMCC">
 983       <description>CM33, DSP, SP FPU, ARM Compiler</description>
 984       <require condition="CM33_DSP_SP"/>
 985       <require Tcompiler="ARMCC"/>
 986     </condition>
 987     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
 988       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
 989       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
 990       <require Dendian="Little-endian"/>
 991     </condition>
 992     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
 993       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
 994       <require condition="CM33_DSP_NOFPU_ARMCC"/>
 995       <require Dendian="Little-endian"/>
 996     </condition>
 997     <condition id="CM33_NODSP_SP_LE_ARMCC">
 998       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
 999       <require condition="CM33_NODSP_SP_ARMCC"/>
1000       <require Dendian="Little-endian"/>
1001     </condition>
1002     <condition id="CM33_DSP_SP_LE_ARMCC">
1003       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
1004       <require condition="CM33_DSP_SP_ARMCC"/>
1005       <require Dendian="Little-endian"/>
1006     </condition>
1007
1008     <condition id="ARMv8MBL_ARMCC">
1009       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1010       <require condition="ARMv8MBL"/>
1011       <require Tcompiler="ARMCC"/>
1012     </condition>
1013     <condition id="ARMv8MBL_LE_ARMCC">
1014       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1015       <require condition="ARMv8MBL_ARMCC"/>
1016       <require Dendian="Little-endian"/>
1017     </condition>
1018     <condition id="ARMv8MBL_BE_ARMCC">
1019       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1020       <require condition="ARMv8MBL_ARMCC"/>
1021       <require Dendian="Big-endian"/>
1022     </condition>
1023
1024     <condition id="ARMv8MML_ARMCC">
1025       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1026       <require condition="ARMv8MML"/>
1027       <require Tcompiler="ARMCC"/>
1028     </condition>
1029     <condition id="ARMv8MML_LE_ARMCC">
1030       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1031       <require condition="ARMv8MML_ARMCC"/>
1032       <require Dendian="Little-endian"/>
1033     </condition>
1034     <condition id="ARMv8MML_BE_ARMCC">
1035       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1036       <require condition="ARMv8MML_ARMCC"/>
1037       <require Dendian="Big-endian"/>
1038     </condition>
1039
1040     <condition id="ARMv8MML_FP_ARMCC">
1041       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1042       <require condition="ARMv8MML_FP"/>
1043       <require Tcompiler="ARMCC"/>
1044     </condition>
1045     <condition id="ARMv8MML_FP_LE_ARMCC">
1046       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1047       <require condition="ARMv8MML_FP_ARMCC"/>
1048       <require Dendian="Little-endian"/>
1049     </condition>
1050     <condition id="ARMv8MML_FP_BE_ARMCC">
1051       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1052       <require condition="ARMv8MML_FP_ARMCC"/>
1053       <require Dendian="Big-endian"/>
1054     </condition>
1055
1056     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1057       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1058       <require condition="ARMv8MML_NODSP_NOFPU"/>
1059       <require Tcompiler="ARMCC"/>
1060     </condition>
1061     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1062       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1063       <require condition="ARMv8MML_DSP_NOFPU"/>
1064       <require Tcompiler="ARMCC"/>
1065     </condition>
1066     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1067       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1068       <require condition="ARMv8MML_NODSP_SP"/>
1069       <require Tcompiler="ARMCC"/>
1070     </condition>
1071     <condition id="ARMv8MML_DSP_SP_ARMCC">
1072       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1073       <require condition="ARMv8MML_DSP_SP"/>
1074       <require Tcompiler="ARMCC"/>
1075     </condition>
1076     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1077       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1078       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1079       <require Dendian="Little-endian"/>
1080     </condition>
1081     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1082       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1083       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1084       <require Dendian="Little-endian"/>
1085     </condition>
1086     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1087       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1088       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1089       <require Dendian="Little-endian"/>
1090     </condition>
1091     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1092       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1093       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1094       <require Dendian="Little-endian"/>
1095     </condition>
1096
1097     <!-- GCC compiler -->
1098     <condition id="CM0_GCC">
1099       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1100       <require condition="CM0"/>
1101       <require Tcompiler="GCC"/>
1102     </condition>
1103     <condition id="CM0_LE_GCC">
1104       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1105       <require condition="CM0_GCC"/>
1106       <require Dendian="Little-endian"/>
1107     </condition>
1108     <condition id="CM0_BE_GCC">
1109       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1110       <require condition="CM0_GCC"/>
1111       <require Dendian="Big-endian"/>
1112     </condition>
1113
1114     <condition id="CM3_GCC">
1115       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1116       <require condition="CM3"/>
1117       <require Tcompiler="GCC"/>
1118     </condition>
1119     <condition id="CM3_LE_GCC">
1120       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1121       <require condition="CM3_GCC"/>
1122       <require Dendian="Little-endian"/>
1123     </condition>
1124     <condition id="CM3_BE_GCC">
1125       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1126       <require condition="CM3_GCC"/>
1127       <require Dendian="Big-endian"/>
1128     </condition>
1129
1130     <condition id="CM4_GCC">
1131       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1132       <require condition="CM4"/>
1133       <require Tcompiler="GCC"/>
1134     </condition>
1135     <condition id="CM4_LE_GCC">
1136       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1137       <require condition="CM4_GCC"/>
1138       <require Dendian="Little-endian"/>
1139     </condition>
1140     <condition id="CM4_BE_GCC">
1141       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1142       <require condition="CM4_GCC"/>
1143       <require Dendian="Big-endian"/>
1144     </condition>
1145
1146     <condition id="CM4_FP_GCC">
1147       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1148       <require condition="CM4_FP"/>
1149       <require Tcompiler="GCC"/>
1150     </condition>
1151     <condition id="CM4_FP_LE_GCC">
1152       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1153       <require condition="CM4_FP_GCC"/>
1154       <require Dendian="Little-endian"/>
1155     </condition>
1156     <condition id="CM4_FP_BE_GCC">
1157       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1158       <require condition="CM4_FP_GCC"/>
1159       <require Dendian="Big-endian"/>
1160     </condition>
1161
1162     <!-- XMC 4000 Series devices from Infineon require a special library -->
1163     <condition id="CM4_LE_GCC_STD">
1164       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1165       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1166       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1167       <require Tcompiler="GCC"/>
1168     </condition>
1169     <condition id="CM4_LE_GCC_IFX">
1170       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1171       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1172       <require Tcompiler="GCC"/>
1173     </condition>
1174     <condition id="CM4_FP_LE_GCC_STD">
1175       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1176       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1177       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1178       <require Tcompiler="GCC"/>
1179     </condition>
1180     <condition id="CM4_FP_LE_GCC_IFX">
1181       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1182       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1183       <require Tcompiler="GCC"/>
1184     </condition>
1185
1186     <condition id="CM7_GCC">
1187       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1188       <require condition="CM7"/>
1189       <require Tcompiler="GCC"/>
1190     </condition>
1191     <condition id="CM7_LE_GCC">
1192       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1193       <require condition="CM7_GCC"/>
1194       <require Dendian="Little-endian"/>
1195     </condition>
1196     <condition id="CM7_BE_GCC">
1197       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1198       <require condition="CM7_GCC"/>
1199       <require Dendian="Big-endian"/>
1200     </condition>
1201
1202     <condition id="CM7_FP_GCC">
1203       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1204       <require condition="CM7_FP"/>
1205       <require Tcompiler="GCC"/>
1206     </condition>
1207     <condition id="CM7_FP_LE_GCC">
1208       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1209       <require condition="CM7_FP_GCC"/>
1210       <require Dendian="Little-endian"/>
1211     </condition>
1212     <condition id="CM7_FP_BE_GCC">
1213       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1214       <require condition="CM7_FP_GCC"/>
1215       <require Dendian="Big-endian"/>
1216     </condition>
1217
1218     <condition id="CM7_SP_GCC">
1219       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1220       <require condition="CM7_SP"/>
1221       <require Tcompiler="GCC"/>
1222     </condition>
1223     <condition id="CM7_SP_LE_GCC">
1224       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1225       <require condition="CM7_SP_GCC"/>
1226       <require Dendian="Little-endian"/>
1227     </condition>
1228     <condition id="CM7_SP_BE_GCC">
1229       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1230       <require condition="CM7_SP_GCC"/>
1231       <require Dendian="Big-endian"/>
1232     </condition>
1233
1234     <condition id="CM7_DP_GCC">
1235       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1236       <require condition="CM7_DP"/>
1237       <require Tcompiler="GCC"/>
1238     </condition>
1239     <condition id="CM7_DP_LE_GCC">
1240       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1241       <require condition="CM7_DP_GCC"/>
1242       <require Dendian="Little-endian"/>
1243     </condition>
1244     <condition id="CM7_DP_BE_GCC">
1245       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1246       <require condition="CM7_DP_GCC"/>
1247       <require Dendian="Big-endian"/>
1248     </condition>
1249
1250     <condition id="CM23_GCC">
1251       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1252       <require condition="CM23"/>
1253       <require Tcompiler="GCC"/>
1254     </condition>
1255     <condition id="CM23_LE_GCC">
1256       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1257       <require condition="CM23_GCC"/>
1258       <require Dendian="Little-endian"/>
1259     </condition>
1260     <condition id="CM23_BE_GCC">
1261       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1262       <require condition="CM23_GCC"/>
1263       <require Dendian="Big-endian"/>
1264     </condition>
1265
1266     <condition id="CM33_GCC">
1267       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1268       <require condition="CM33"/>
1269       <require Tcompiler="GCC"/>
1270     </condition>
1271     <condition id="CM33_LE_GCC">
1272       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1273       <require condition="CM33_GCC"/>
1274       <require Dendian="Little-endian"/>
1275     </condition>
1276     <condition id="CM33_BE_GCC">
1277       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1278       <require condition="CM33_GCC"/>
1279       <require Dendian="Big-endian"/>
1280     </condition>
1281
1282     <condition id="CM33_FP_GCC">
1283       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1284       <require condition="CM33_FP"/>
1285       <require Tcompiler="GCC"/>
1286     </condition>
1287     <condition id="CM33_FP_LE_GCC">
1288       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1289       <require condition="CM33_FP_GCC"/>
1290       <require Dendian="Little-endian"/>
1291     </condition>
1292     <condition id="CM33_FP_BE_GCC">
1293       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1294       <require condition="CM33_FP_GCC"/>
1295       <require Dendian="Big-endian"/>
1296     </condition>
1297
1298     <condition id="CM33_NODSP_NOFPU_GCC">
1299       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1300       <require condition="CM33_NODSP_NOFPU"/>
1301       <require Tcompiler="GCC"/>
1302     </condition>
1303     <condition id="CM33_DSP_NOFPU_GCC">
1304       <description>CM33, DSP, no FPU, GCC Compiler</description>
1305       <require condition="CM33_DSP_NOFPU"/>
1306       <require Tcompiler="GCC"/>
1307     </condition>
1308     <condition id="CM33_NODSP_SP_GCC">
1309       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1310       <require condition="CM33_NODSP_SP"/>
1311       <require Tcompiler="GCC"/>
1312     </condition>
1313     <condition id="CM33_DSP_SP_GCC">
1314       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1315       <require condition="CM33_DSP_SP"/>
1316       <require Tcompiler="GCC"/>
1317     </condition>
1318     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1319       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1320       <require condition="CM33_NODSP_NOFPU_GCC"/>
1321       <require Dendian="Little-endian"/>
1322     </condition>
1323     <condition id="CM33_DSP_NOFPU_LE_GCC">
1324       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1325       <require condition="CM33_DSP_NOFPU_GCC"/>
1326       <require Dendian="Little-endian"/>
1327     </condition>
1328     <condition id="CM33_NODSP_SP_LE_GCC">
1329       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1330       <require condition="CM33_NODSP_SP_GCC"/>
1331       <require Dendian="Little-endian"/>
1332     </condition>
1333     <condition id="CM33_DSP_SP_LE_GCC">
1334       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1335       <require condition="CM33_DSP_SP_GCC"/>
1336       <require Dendian="Little-endian"/>
1337     </condition>
1338
1339     <condition id="ARMv8MBL_GCC">
1340       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1341       <require condition="ARMv8MBL"/>
1342       <require Tcompiler="GCC"/>
1343     </condition>
1344     <condition id="ARMv8MBL_LE_GCC">
1345       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1346       <require condition="ARMv8MBL_GCC"/>
1347       <require Dendian="Little-endian"/>
1348     </condition>
1349     <condition id="ARMv8MBL_BE_GCC">
1350       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1351       <require condition="ARMv8MBL_GCC"/>
1352       <require Dendian="Big-endian"/>
1353     </condition>
1354
1355     <condition id="ARMv8MML_GCC">
1356       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1357       <require condition="ARMv8MML"/>
1358       <require Tcompiler="GCC"/>
1359     </condition>
1360     <condition id="ARMv8MML_LE_GCC">
1361       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1362       <require condition="ARMv8MML_GCC"/>
1363       <require Dendian="Little-endian"/>
1364     </condition>
1365     <condition id="ARMv8MML_BE_GCC">
1366       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1367       <require condition="ARMv8MML_GCC"/>
1368       <require Dendian="Big-endian"/>
1369     </condition>
1370
1371     <condition id="ARMv8MML_FP_GCC">
1372       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1373       <require condition="ARMv8MML_FP"/>
1374       <require Tcompiler="GCC"/>
1375     </condition>
1376     <condition id="ARMv8MML_FP_LE_GCC">
1377       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1378       <require condition="ARMv8MML_FP_GCC"/>
1379       <require Dendian="Little-endian"/>
1380     </condition>
1381     <condition id="ARMv8MML_FP_BE_GCC">
1382       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1383       <require condition="ARMv8MML_FP_GCC"/>
1384       <require Dendian="Big-endian"/>
1385     </condition>
1386
1387     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1388       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1389       <require condition="ARMv8MML_NODSP_NOFPU"/>
1390       <require Tcompiler="GCC"/>
1391     </condition>
1392     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1393       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1394       <require condition="ARMv8MML_DSP_NOFPU"/>
1395       <require Tcompiler="GCC"/>
1396     </condition>
1397     <condition id="ARMv8MML_NODSP_SP_GCC">
1398       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1399       <require condition="ARMv8MML_NODSP_SP"/>
1400       <require Tcompiler="GCC"/>
1401     </condition>
1402     <condition id="ARMv8MML_DSP_SP_GCC">
1403       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1404       <require condition="ARMv8MML_DSP_SP"/>
1405       <require Tcompiler="GCC"/>
1406     </condition>
1407     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1408       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1409       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1410       <require Dendian="Little-endian"/>
1411     </condition>
1412     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1413       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1414       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1415       <require Dendian="Little-endian"/>
1416     </condition>
1417     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1418       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1419       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1420       <require Dendian="Little-endian"/>
1421     </condition>
1422     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1423       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1424       <require condition="ARMv8MML_DSP_SP_GCC"/>
1425       <require Dendian="Little-endian"/>
1426     </condition>
1427
1428     <!-- IAR compiler -->
1429     <condition id="CM0_IAR">
1430       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1431       <require condition="CM0"/>
1432       <require Tcompiler="IAR"/>
1433     </condition>
1434     <condition id="CM0_LE_IAR">
1435       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1436       <require condition="CM0_IAR"/>
1437       <require Dendian="Little-endian"/>
1438     </condition>
1439     <condition id="CM0_BE_IAR">
1440       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1441       <require condition="CM0_IAR"/>
1442       <require Dendian="Big-endian"/>
1443     </condition>
1444
1445     <condition id="CM3_IAR">
1446       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1447       <require condition="CM3"/>
1448       <require Tcompiler="IAR"/>
1449     </condition>
1450     <condition id="CM3_LE_IAR">
1451       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1452       <require condition="CM3_IAR"/>
1453       <require Dendian="Little-endian"/>
1454     </condition>
1455     <condition id="CM3_BE_IAR">
1456       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1457       <require condition="CM3_IAR"/>
1458       <require Dendian="Big-endian"/>
1459     </condition>
1460
1461     <condition id="CM4_IAR">
1462       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1463       <require condition="CM4"/>
1464       <require Tcompiler="IAR"/>
1465     </condition>
1466     <condition id="CM4_LE_IAR">
1467       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1468       <require condition="CM4_IAR"/>
1469       <require Dendian="Little-endian"/>
1470     </condition>
1471     <condition id="CM4_BE_IAR">
1472       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1473       <require condition="CM4_IAR"/>
1474       <require Dendian="Big-endian"/>
1475     </condition>
1476
1477     <condition id="CM4_FP_IAR">
1478       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1479       <require condition="CM4_FP"/>
1480       <require Tcompiler="IAR"/>
1481     </condition>
1482     <condition id="CM4_FP_LE_IAR">
1483       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1484       <require condition="CM4_FP_IAR"/>
1485       <require Dendian="Little-endian"/>
1486     </condition>
1487     <condition id="CM4_FP_BE_IAR">
1488       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1489       <require condition="CM4_FP_IAR"/>
1490       <require Dendian="Big-endian"/>
1491     </condition>
1492
1493     <condition id="CM7_IAR">
1494       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1495       <require condition="CM7"/>
1496       <require Tcompiler="IAR"/>
1497     </condition>
1498     <condition id="CM7_LE_IAR">
1499       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1500       <require condition="CM7_IAR"/>
1501       <require Dendian="Little-endian"/>
1502     </condition>
1503     <condition id="CM7_BE_IAR">
1504       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1505       <require condition="CM7_IAR"/>
1506       <require Dendian="Big-endian"/>
1507     </condition>
1508
1509     <condition id="CM7_FP_IAR">
1510       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1511       <require condition="CM7_FP"/>
1512       <require Tcompiler="IAR"/>
1513     </condition>
1514     <condition id="CM7_FP_LE_IAR">
1515       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1516       <require condition="CM7_FP_IAR"/>
1517       <require Dendian="Little-endian"/>
1518     </condition>
1519     <condition id="CM7_FP_BE_IAR">
1520       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1521       <require condition="CM7_FP_IAR"/>
1522       <require Dendian="Big-endian"/>
1523     </condition>
1524
1525     <condition id="CM7_SP_IAR">
1526       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1527       <require condition="CM7_SP"/>
1528       <require Tcompiler="IAR"/>
1529     </condition>
1530     <condition id="CM7_SP_LE_IAR">
1531       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1532       <require condition="CM7_SP_IAR"/>
1533       <require Dendian="Little-endian"/>
1534     </condition>
1535     <condition id="CM7_SP_BE_IAR">
1536       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1537       <require condition="CM7_SP_IAR"/>
1538       <require Dendian="Big-endian"/>
1539     </condition>
1540
1541     <condition id="CM7_DP_IAR">
1542       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1543       <require condition="CM7_DP"/>
1544       <require Tcompiler="IAR"/>
1545     </condition>
1546     <condition id="CM7_DP_LE_IAR">
1547       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1548       <require condition="CM7_DP_IAR"/>
1549       <require Dendian="Little-endian"/>
1550     </condition>
1551     <condition id="CM7_DP_BE_IAR">
1552       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1553       <require condition="CM7_DP_IAR"/>
1554       <require Dendian="Big-endian"/>
1555     </condition>
1556
1557     <!-- conditions selecting single devices and CMSIS Core -->
1558     <!-- used for component startup, GCC version is used for C-Startup -->
1559     <condition id="ARMCM0 CMSIS">
1560       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1561       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1562       <require Cclass="CMSIS" Cgroup="CORE"/>
1563     </condition>
1564     <condition id="ARMCM0 CMSIS GCC">
1565       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1566       <require condition="ARMCM0 CMSIS"/>
1567       <require condition="GCC"/>
1568     </condition>
1569
1570     <condition id="ARMCM0+ CMSIS">
1571       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1572       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1573       <require Cclass="CMSIS" Cgroup="CORE"/>
1574     </condition>
1575     <condition id="ARMCM0+ CMSIS GCC">
1576       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1577       <require condition="ARMCM0+ CMSIS"/>
1578       <require condition="GCC"/>
1579     </condition>
1580
1581     <condition id="ARMCM3 CMSIS">
1582       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1583       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1584       <require Cclass="CMSIS" Cgroup="CORE"/>
1585     </condition>
1586     <condition id="ARMCM3 CMSIS GCC">
1587       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1588       <require condition="ARMCM3 CMSIS"/>
1589       <require condition="GCC"/>
1590     </condition>
1591
1592     <condition id="ARMCM4 CMSIS">
1593       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1594       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1595       <require Cclass="CMSIS" Cgroup="CORE"/>
1596     </condition>
1597     <condition id="ARMCM4 CMSIS GCC">
1598       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1599       <require condition="ARMCM4 CMSIS"/>
1600       <require condition="GCC"/>
1601     </condition>
1602
1603     <condition id="ARMCM7 CMSIS">
1604       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1605       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1606       <require Cclass="CMSIS" Cgroup="CORE"/>
1607     </condition>
1608     <condition id="ARMCM7 CMSIS GCC">
1609       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1610       <require condition="ARMCM7 CMSIS"/>
1611       <require condition="GCC"/>
1612     </condition>
1613
1614     <condition id="ARMCM23 CMSIS">
1615       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1616       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1617       <require Cclass="CMSIS" Cgroup="CORE"/>
1618     </condition>
1619     <condition id="ARMCM23 CMSIS GCC">
1620       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1621       <require condition="ARMCM23 CMSIS"/>
1622       <require condition="GCC"/>
1623     </condition>
1624
1625     <condition id="ARMCM33 CMSIS">
1626       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1627       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1628       <require Cclass="CMSIS" Cgroup="CORE"/>
1629     </condition>
1630     <condition id="ARMCM33 CMSIS GCC">
1631       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1632       <require condition="ARMCM33 CMSIS"/>
1633       <require condition="GCC"/>
1634     </condition>
1635
1636     <condition id="ARMSC000 CMSIS">
1637       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1638       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1639       <require Cclass="CMSIS" Cgroup="CORE"/>
1640     </condition>
1641     <condition id="ARMSC000 CMSIS GCC">
1642       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1643       <require condition="ARMSC000 CMSIS"/>
1644       <require condition="GCC"/>
1645     </condition>
1646
1647     <condition id="ARMSC300 CMSIS">
1648       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1649       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1650       <require Cclass="CMSIS" Cgroup="CORE"/>
1651     </condition>
1652     <condition id="ARMSC300 CMSIS GCC">
1653       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1654       <require condition="ARMSC300 CMSIS"/>
1655       <require condition="GCC"/>
1656     </condition>
1657
1658     <condition id="ARMv8MBL CMSIS">
1659       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1660       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1661       <require Cclass="CMSIS" Cgroup="CORE"/>
1662     </condition>
1663     <condition id="ARMv8MBL CMSIS GCC">
1664       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1665       <require condition="ARMv8MBL CMSIS"/>
1666       <require condition="GCC"/>
1667     </condition>
1668
1669     <condition id="ARMv8MML CMSIS">
1670       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1671       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1672       <require Cclass="CMSIS" Cgroup="CORE"/>
1673     </condition>
1674     <condition id="ARMv8MML CMSIS GCC">
1675       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1676       <require condition="ARMv8MML CMSIS"/>
1677       <require condition="GCC"/>
1678     </condition>
1679
1680     <!-- CMSIS DSP -->
1681     <condition id="CMSIS DSP">
1682       <description>Components required for DSP</description>
1683       <require condition="ARMv6_7_8-M Device"/>
1684       <require condition="ARMCC GCC"/>
1685       <require Cclass="CMSIS" Cgroup="CORE"/>
1686     </condition>
1687
1688     <!-- RTOS RTX -->
1689     <condition id="RTOS RTX">
1690       <description>Components required for RTOS RTX</description>
1691       <require condition="ARMv6_7-M Device"/>
1692       <require condition="ARMCC GCC IAR"/>
1693       <require Cclass="Device" Cgroup="Startup"/>
1694       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1695     </condition>
1696     <condition id="RTOS RTX5">
1697       <description>Components required for RTOS RTX5</description>
1698       <require condition="ARMv6_7_8-M Device"/>
1699       <require condition="ARMCC GCC IAR"/>
1700       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1701     </condition>
1702     <condition id="RTOS2 RTX5">
1703       <description>Components required for RTOS2 RTX5</description>
1704       <require condition="ARMv6_7_8-M Device"/>
1705       <require condition="ARMCC GCC IAR"/>
1706       <require Cclass="CMSIS"  Cgroup="CORE"/>
1707       <require Cclass="Device" Cgroup="Startup"/>
1708     </condition>
1709     <condition id="RTOS2 RTX5 NS">
1710       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1711       <require condition="ARMv8-M TZ Device"/>
1712       <require condition="ARMCC GCC"/>
1713       <require Cclass="CMSIS"  Cgroup="CORE"/>
1714       <require Cclass="Device" Cgroup="Startup"/>
1715     </condition>
1716
1717   </conditions>
1718
1719   <components>
1720     <!-- CMSIS-Core component -->
1721     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0"  condition="ARMv6_7_8-M Device" >
1722       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1723       <files>
1724         <!-- CPU independent -->
1725         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1726         <file category="include" name="CMSIS/Include/"/>
1727         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1728         <!-- Code template -->
1729         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1730         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1731       </files>
1732     </component>
1733
1734     <!-- CMSIS-Startup components -->
1735     <!-- Cortex-M0 -->
1736     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1737       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1738       <files>
1739         <!-- include folder / device header file -->
1740         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1741         <!-- startup / system file -->
1742         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1743         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1744         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1745         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1746         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1747       </files>
1748     </component>
1749     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1750       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1751       <files>
1752         <!-- include folder / device header file -->
1753         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1754         <!-- startup / system file -->
1755         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1756         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1757         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1758       </files>
1759     </component>
1760
1761     <!-- Cortex-M0+ -->
1762     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1763       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1764       <files>
1765         <!-- include folder / device header file -->
1766         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1767         <!-- startup / system file -->
1768         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1769         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1770         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1771         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1772         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1773       </files>
1774     </component>
1775     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1776       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1777       <files>
1778         <!-- include folder / device header file -->
1779         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1780         <!-- startup / system file -->
1781         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1782         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1783         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1784       </files>
1785     </component>
1786
1787     <!-- Cortex-M3 -->
1788     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1789       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1790       <files>
1791         <!-- include folder / device header file -->
1792         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1793         <!-- startup / system file -->
1794         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1795         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1796         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1797         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1798         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1799       </files>
1800     </component>
1801     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1802       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1803       <files>
1804         <!-- include folder / device header file -->
1805         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1806         <!-- startup / system file -->
1807         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1808         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1809         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1810       </files>
1811     </component>
1812
1813     <!-- Cortex-M4 -->
1814     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1815       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1816       <files>
1817         <!-- include folder / device header file -->
1818         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1819         <!-- startup / system file -->
1820         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1821         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1822         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1823         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1824         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1825       </files>
1826     </component>
1827     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1828       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1829       <files>
1830         <!-- include folder / device header file -->
1831         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1832         <!-- startup / system file -->
1833         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1834         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1835         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1836       </files>
1837     </component>
1838
1839     <!-- Cortex-M7 -->
1840     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
1841       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1842       <files>
1843         <!-- include folder / device header file -->
1844         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1845         <!-- startup / system file -->
1846         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1847         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1848         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1849         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1850         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1851       </files>
1852     </component>
1853     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1854       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1855       <files>
1856         <!-- include folder / device header file -->
1857         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1858         <!-- startup / system file -->
1859         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1860         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1861         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1862       </files>
1863     </component>
1864
1865     <!-- Cortex-M23 -->
1866     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
1867       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1868       <files>
1869         <!-- include folder / device header file -->
1870         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
1871         <!-- startup / system file -->
1872         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
1873         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
1874         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1875         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1876         <!-- SAU configuration -->
1877         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1878       </files>
1879     </component>
1880     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
1881       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1882       <files>
1883         <!-- include folder / device header file -->
1884         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
1885         <!-- startup / system file -->
1886         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
1887         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1888         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
1889         <!-- SAU configuration -->
1890         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1891       </files>
1892     </component>
1893
1894     <!-- Cortex-M33 -->
1895     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
1896       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1897       <files>
1898         <!-- include folder / device header file -->
1899         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
1900         <!-- startup / system file -->
1901         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
1902         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
1903         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1904         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
1905         <!-- SAU configuration -->
1906         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1907       </files>
1908     </component>
1909     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
1910       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1911       <files>
1912         <!-- include folder / device header file -->
1913         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
1914         <!-- startup / system file -->
1915         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
1916         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1917         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
1918         <!-- SAU configuration -->
1919         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1920       </files>
1921     </component>
1922
1923     <!-- Cortex-SC000 -->
1924     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
1925       <description>System and Startup for Generic ARM SC000 device</description>
1926       <files>
1927         <!-- include folder / device header file -->
1928         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1929         <!-- startup / system file -->
1930         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1931         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1932         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1933         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1934         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1935       </files>
1936     </component>
1937     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1938       <description>System and Startup for Generic ARM SC000 device</description>
1939       <files>
1940         <!-- include folder / device header file -->
1941         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1942         <!-- startup / system file -->
1943         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1944         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1945         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1946       </files>
1947     </component>
1948
1949     <!-- Cortex-SC300 -->
1950     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
1951       <description>System and Startup for Generic ARM SC300 device</description>
1952       <files>
1953         <!-- include folder / device header file -->
1954         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1955         <!-- startup / system file -->
1956         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1957         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1958         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1959         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1960         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
1961       </files>
1962     </component>
1963     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1964       <description>System and Startup for Generic ARM SC300 device</description>
1965       <files>
1966         <!-- include folder / device header file -->
1967         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1968         <!-- startup / system file -->
1969         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1970         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1971         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
1972       </files>
1973     </component>
1974
1975     <!-- ARMv8MBL -->
1976     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1977       <description>System and Startup for Generic ARM ARMv8MBL device</description>
1978       <files>
1979         <!-- include folder / device header file -->
1980         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
1981         <!-- startup / system file -->
1982         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
1983         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
1984         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1985         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1986         <!-- SAU configuration -->
1987         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
1988       </files>
1989     </component>
1990     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
1991       <description>System and Startup for Generic ARM ARMv8MBL device</description>
1992       <files>
1993         <!-- include folder / device header file -->
1994         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
1995         <!-- startup / system file -->
1996         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
1997         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1998         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
1999         <!-- SAU configuration -->
2000         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2001       </files>
2002     </component>
2003
2004     <!-- ARMv8MML -->
2005     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2006       <description>System and Startup for Generic ARM ARMv8MML device</description>
2007       <files>
2008         <!-- include folder / device header file -->
2009         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2010         <!-- startup / system file -->
2011         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2012         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2013         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2014         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2015         <!-- SAU configuration -->
2016         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2017       </files>
2018     </component>
2019     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2020       <description>System and Startup for Generic ARM ARMv8MML device</description>
2021       <files>
2022         <!-- include folder / device header file -->
2023         <file category="include"  name="Device/ARM/ARMv8MML/Include/"/>
2024         <!-- startup / system file -->
2025         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2026         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2027         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2028         <!-- SAU configuration -->
2029         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2030       </files>
2031     </component>
2032
2033
2034     <!-- CMSIS-DSP component -->
2035     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.1" condition="CMSIS DSP">
2036       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2037       <files>
2038         <!-- CPU independent -->
2039         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2040         <file category="header" name="CMSIS/Include/arm_math.h"/>
2041
2042         <!-- CPU and Compiler dependent -->
2043         <!-- ARMCC -->
2044         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2045         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2046         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2047         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2048         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2049         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2050         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2051         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2052         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2053         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2054         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2055         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2056         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2057         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2058
2059         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2060         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2061         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2062         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2063         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2064         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2065         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2066         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2067         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2068         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2069         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2070         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2071
2072         <!-- GCC -->
2073         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2074         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2075         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2076         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2077         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2078         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2079         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2080
2081         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2082         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2083         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2084         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2085         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2086         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2087         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2088         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2089         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2090         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2091         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2092         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2093
2094       </files>
2095     </component>
2096
2097     <!-- CMSIS-RTOS Keil RTX component -->
2098     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0.0" condition="RTOS RTX">
2099       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2100       <RTE_Components_h>
2101         <!-- the following content goes into file 'RTE_Components.h' -->
2102         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2103         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2104       </RTE_Components_h>
2105       <files>
2106         <!-- CPU independent -->
2107         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2108         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2109         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2110
2111         <!-- RTX templates -->
2112         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2113         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2114         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2115         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2116         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2117         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2118         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2119         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2120         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2121         <!-- tool-chain specific template file -->
2122         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2123         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2124         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2125
2126         <!-- CPU and Compiler dependent -->
2127         <!-- ARMCC -->
2128         <file category="library" condition="CM0_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2129         <file category="library" condition="CM0_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2130         <file category="library" condition="CM3_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2131         <file category="library" condition="CM3_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2132         <file category="library" condition="CM4_LE_ARMCC_STD"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2133         <file category="library" condition="CM4_LE_ARMCC_IFX"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2134         <file category="library" condition="CM4_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2135         <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2136         <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2137         <file category="library" condition="CM4_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2138         <file category="library" condition="CM7_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2139         <file category="library" condition="CM7_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2140         <file category="library" condition="CM7_FP_LE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2141         <file category="library" condition="CM7_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2142         <!-- GCC -->
2143         <file category="library" condition="CM0_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2144         <file category="library" condition="CM0_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2145         <file category="library" condition="CM3_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2146         <file category="library" condition="CM3_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2147         <file category="library" condition="CM4_LE_GCC_STD"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2148         <file category="library" condition="CM4_LE_GCC_IFX"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2149         <file category="library" condition="CM4_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2150         <file category="library" condition="CM4_FP_LE_GCC_STD"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2151         <file category="library" condition="CM4_FP_LE_GCC_IFX"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2152         <file category="library" condition="CM4_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2153         <file category="library" condition="CM7_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2154         <file category="library" condition="CM7_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2155         <file category="library" condition="CM7_FP_LE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2156         <file category="library" condition="CM7_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2157         <!-- IAR -->
2158         <file category="library" condition="CM0_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2159         <file category="library" condition="CM0_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2160         <file category="library" condition="CM3_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2161         <file category="library" condition="CM3_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2162         <file category="library" condition="CM4_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2163         <file category="library" condition="CM4_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2164         <file category="library" condition="CM4_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2165         <file category="library" condition="CM4_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2166         <file category="library" condition="CM7_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2167         <file category="library" condition="CM7_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2168         <file category="library" condition="CM7_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2169         <file category="library" condition="CM7_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2170       </files>
2171     </component>
2172
2173     <!-- CMSIS-RTOS Keil RTX5 component -->
2174     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.1.0" Capiversion="1.0.0" condition="RTOS RTX5">
2175       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2176       <RTE_Components_h>
2177         <!-- the following content goes into file 'RTE_Components.h' -->
2178         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2179         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2180       </RTE_Components_h>
2181       <files>
2182         <!-- RTX header file -->
2183         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2184         <!-- RTX compatibility module for API V1 -->
2185         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2186       </files>
2187     </component>
2188
2189     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2190     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5">
2191       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2192       <RTE_Components_h>
2193         <!-- the following content goes into file 'RTE_Components.h' -->
2194         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2195         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2196       </RTE_Components_h>
2197       <files>
2198         <!-- RTX documentation -->
2199         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2200
2201         <!-- RTX header files -->
2202         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2203
2204         <!-- RTX configuration -->
2205         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2206         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2207
2208         <!-- RTX templates -->
2209         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2210         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2211         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2212         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2213         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2214         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2215         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2216         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2217         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2218
2219         <!-- RTX library configuration -->
2220         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2221
2222         <!-- RTX libraries (CPU and Compiler dependent) -->
2223         <!-- ARMCC -->
2224         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2225         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2226         <file category="library" condition="CM4_LE_ARMCC_STD"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2227         <file category="library" condition="CM4_FP_LE_ARMCC_STD"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2228         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2229         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2230         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2231         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2232         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2233         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2234         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2235         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2236         <!-- GCC -->
2237         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2238         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2239         <file category="library" condition="CM4_LE_GCC_STD"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2240         <file category="library" condition="CM4_FP_LE_GCC_STD"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2241         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2242         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2243         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2244         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2245         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2246         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2247         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2248         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2249         <!-- IAR -->
2250         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2251         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2252         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2253         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2254         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2255         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2256       </files>
2257     </component>
2258     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5 NS">
2259       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2260       <RTE_Components_h>
2261         <!-- the following content goes into file 'RTE_Components.h' -->
2262         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2263         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2264         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2265       </RTE_Components_h>
2266       <files>
2267         <!-- RTX documentation -->
2268         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2269
2270         <!-- RTX header files -->
2271         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2272
2273         <!-- RTX configuration -->
2274         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2275         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2276
2277         <!-- RTX templates -->
2278         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2279         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2280         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2281         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2282         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2283         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2284         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2285         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2286         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2287
2288         <!-- RTX library configuration -->
2289         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2290
2291         <!-- RTX libraries (CPU and Compiler dependent) -->
2292         <!-- ARMCC -->
2293         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2294         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2295         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2296         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2297         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2298         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2299         <!-- GCC -->
2300         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2301         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2302         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2303         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2304         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2305         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2306       </files>
2307     </component>
2308     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5">
2309       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2310       <RTE_Components_h>
2311         <!-- the following content goes into file 'RTE_Components.h' -->
2312         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2313         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2314         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2315       </RTE_Components_h>
2316       <files>
2317         <!-- RTX documentation -->
2318         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2319
2320         <!-- RTX header files -->
2321         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2322
2323         <!-- RTX configuration -->
2324         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2325         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2326
2327         <!-- RTX templates -->
2328         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2329         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2330         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2331         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2332         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2333         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2334         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2335         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2336         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2337
2338         <!-- RTX sources (core) -->
2339         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2340         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2341         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2342         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2343         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2344         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2345         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2346         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2347         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2348         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2349         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2350         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2351         <!-- RTX sources (library configuration) -->
2352         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2353         <!-- RTX sources (handlers ARMCC) -->
2354         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2355         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2356         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2357         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2358         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2359         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2360         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2361         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2362         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2363         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2364         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2365         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2366         <!-- RTX sources (handlers GCC) -->
2367         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2368         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2369         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2370         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2371         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2372         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2373         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2374         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2375         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2376         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2377         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2378         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2379         <!-- RTX sources (handlers IAR) -->
2380         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2381         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2382         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2383         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2384         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2385         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2386       </files>
2387     </component>
2388     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5 NS">
2389       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2390       <RTE_Components_h>
2391         <!-- the following content goes into file 'RTE_Components.h' -->
2392         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2393         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2394         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2395         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2396       </RTE_Components_h>
2397       <files>
2398         <!-- RTX documentation -->
2399         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2400
2401         <!-- RTX header files -->
2402         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2403
2404         <!-- RTX configuration -->
2405         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2406         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2407
2408         <!-- RTX templates -->
2409         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2410         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2411         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2412         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2413         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2414         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2415         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2416         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2417         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2418
2419         <!-- RTX sources (core) -->
2420         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2421         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2422         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2423         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2424         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2425         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2426         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2427         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2428         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2429         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2430         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2431         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2432         <!-- RTX sources (library configuration) -->
2433         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2434         <!-- RTX sources (ARMCC handlers) -->
2435         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2436         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2437         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2438         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2439         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2440         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2441         <!-- RTX sources (GCC handlers) -->
2442         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2443         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2444         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2445         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2446         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2447         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2448       </files>
2449     </component>
2450
2451   </components>
2452
2453   <boards>
2454     <board name="uVision Simulator" vendor="Keil">
2455       <description>uVision Simulator</description>
2456       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2457       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2458       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2459       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2460       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2461       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2462       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2463       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2464       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2465       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2466       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2467       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2468       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2469       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2470       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2471       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2472       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2473    </board>
2474   </boards>
2475
2476   <examples>
2477     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2478       <description>DSP_Lib Class Marks example</description>
2479       <board name="uVision Simulator" vendor="Keil"/>
2480       <project>
2481         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2482       </project>
2483       <attributes>
2484         <component Cclass="CMSIS" Cgroup="CORE"/>
2485         <component Cclass="CMSIS" Cgroup="DSP"/>
2486         <component Cclass="Device" Cgroup="Startup"/>
2487         <category>Getting Started</category>
2488       </attributes>
2489     </example>
2490
2491     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2492       <description>DSP_Lib Convolution example</description>
2493       <board name="uVision Simulator" vendor="Keil"/>
2494       <project>
2495         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2496       </project>
2497       <attributes>
2498         <component Cclass="CMSIS" Cgroup="CORE"/>
2499         <component Cclass="CMSIS" Cgroup="DSP"/>
2500         <component Cclass="Device" Cgroup="Startup"/>
2501         <category>Getting Started</category>
2502       </attributes>
2503     </example>
2504
2505     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2506       <description>DSP_Lib Dotproduct example</description>
2507       <board name="uVision Simulator" vendor="Keil"/>
2508       <project>
2509         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2510       </project>
2511       <attributes>
2512         <component Cclass="CMSIS" Cgroup="CORE"/>
2513         <component Cclass="CMSIS" Cgroup="DSP"/>
2514         <component Cclass="Device" Cgroup="Startup"/>
2515         <category>Getting Started</category>
2516       </attributes>
2517     </example>
2518
2519     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2520       <description>DSP_Lib FFT Bin example</description>
2521       <board name="uVision Simulator" vendor="Keil"/>
2522       <project>
2523         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2524       </project>
2525       <attributes>
2526         <component Cclass="CMSIS" Cgroup="CORE"/>
2527         <component Cclass="CMSIS" Cgroup="DSP"/>
2528         <component Cclass="Device" Cgroup="Startup"/>
2529         <category>Getting Started</category>
2530       </attributes>
2531     </example>
2532
2533     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2534       <description>DSP_Lib FIR example</description>
2535       <board name="uVision Simulator" vendor="Keil"/>
2536       <project>
2537         <environment name="uv" load="arm_fir_example.uvprojx"/>
2538       </project>
2539       <attributes>
2540         <component Cclass="CMSIS" Cgroup="CORE"/>
2541         <component Cclass="CMSIS" Cgroup="DSP"/>
2542         <component Cclass="Device" Cgroup="Startup"/>
2543         <category>Getting Started</category>
2544       </attributes>
2545     </example>
2546
2547     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2548       <description>DSP_Lib Graphic Equalizer example</description>
2549       <board name="uVision Simulator" vendor="Keil"/>
2550       <project>
2551         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2552       </project>
2553       <attributes>
2554         <component Cclass="CMSIS" Cgroup="CORE"/>
2555         <component Cclass="CMSIS" Cgroup="DSP"/>
2556         <component Cclass="Device" Cgroup="Startup"/>
2557         <category>Getting Started</category>
2558       </attributes>
2559     </example>
2560
2561     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2562       <description>DSP_Lib Linear Interpolation example</description>
2563       <board name="uVision Simulator" vendor="Keil"/>
2564       <project>
2565         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2566       </project>
2567       <attributes>
2568         <component Cclass="CMSIS" Cgroup="CORE"/>
2569         <component Cclass="CMSIS" Cgroup="DSP"/>
2570         <component Cclass="Device" Cgroup="Startup"/>
2571         <category>Getting Started</category>
2572       </attributes>
2573     </example>
2574
2575     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2576       <description>DSP_Lib Matrix example</description>
2577       <board name="uVision Simulator" vendor="Keil"/>
2578       <project>
2579         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2580       </project>
2581       <attributes>
2582         <component Cclass="CMSIS" Cgroup="CORE"/>
2583         <component Cclass="CMSIS" Cgroup="DSP"/>
2584         <component Cclass="Device" Cgroup="Startup"/>
2585         <category>Getting Started</category>
2586       </attributes>
2587     </example>
2588
2589     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2590       <description>DSP_Lib Signal Convergence example</description>
2591       <board name="uVision Simulator" vendor="Keil"/>
2592       <project>
2593         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2594       </project>
2595       <attributes>
2596         <component Cclass="CMSIS" Cgroup="CORE"/>
2597         <component Cclass="CMSIS" Cgroup="DSP"/>
2598         <component Cclass="Device" Cgroup="Startup"/>
2599         <category>Getting Started</category>
2600       </attributes>
2601     </example>
2602
2603     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2604       <description>DSP_Lib Sinus/Cosinus example</description>
2605       <board name="uVision Simulator" vendor="Keil"/>
2606       <project>
2607         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2608       </project>
2609       <attributes>
2610         <component Cclass="CMSIS" Cgroup="CORE"/>
2611         <component Cclass="CMSIS" Cgroup="DSP"/>
2612         <component Cclass="Device" Cgroup="Startup"/>
2613         <category>Getting Started</category>
2614       </attributes>
2615     </example>
2616
2617     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2618       <description>DSP_Lib Variance example</description>
2619       <board name="uVision Simulator" vendor="Keil"/>
2620       <project>
2621         <environment name="uv" load="arm_variance_example.uvprojx"/>
2622       </project>
2623       <attributes>
2624         <component Cclass="CMSIS" Cgroup="CORE"/>
2625         <component Cclass="CMSIS" Cgroup="DSP"/>
2626         <component Cclass="Device" Cgroup="Startup"/>
2627         <category>Getting Started</category>
2628       </attributes>
2629     </example>
2630
2631     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2632       <description>CMSIS-RTOS2 Blinky example</description>
2633       <board name="uVision Simulator" vendor="Keil"/>
2634       <project>
2635         <environment name="uv" load="Blinky.uvprojx"/>
2636       </project>
2637       <attributes>
2638         <component Cclass="CMSIS" Cgroup="CORE"/>
2639         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2640         <component Cclass="Device" Cgroup="Startup"/>
2641         <category>Getting Started</category>
2642       </attributes>
2643     </example>
2644
2645     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2646       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2647       <board name="uVision Simulator" vendor="Keil"/>
2648       <project>
2649         <environment name="uv" load="Blinky.uvprojx"/>
2650       </project>
2651       <attributes>
2652         <component Cclass="CMSIS" Cgroup="CORE"/>
2653         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2654         <component Cclass="Device" Cgroup="Startup"/>
2655         <category>Getting Started</category>
2656       </attributes>
2657     </example>
2658
2659     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2660       <description>Bare-metal secure/non-secure example without RTOS</description>
2661       <board name="uVision Simulator" vendor="Keil"/>
2662       <project>
2663         <environment name="uv" load="NoRTOS.uvmpw"/>
2664       </project>
2665       <attributes>
2666         <component Cclass="CMSIS" Cgroup="CORE"/>
2667         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2668         <component Cclass="Device" Cgroup="Startup"/>
2669         <category>Getting Started</category>
2670       </attributes>
2671     </example>
2672
2673     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2674       <description>Secure/non-secure RTOS example with thread context management</description>
2675       <board name="uVision Simulator" vendor="Keil"/>
2676       <project>
2677         <environment name="uv" load="RTOS.uvmpw"/>
2678       </project>
2679       <attributes>
2680         <component Cclass="CMSIS" Cgroup="CORE"/>
2681         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2682         <component Cclass="Device" Cgroup="Startup"/>
2683         <category>Getting Started</category>
2684       </attributes>
2685     </example>
2686
2687     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2688       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2689       <board name="uVision Simulator" vendor="Keil"/>
2690       <project>
2691         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2692       </project>
2693       <attributes>
2694         <component Cclass="CMSIS" Cgroup="CORE"/>
2695         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2696         <component Cclass="Device" Cgroup="Startup"/>
2697         <category>Getting Started</category>
2698       </attributes>
2699     </example>
2700
2701   </examples>
2702
2703 </package>