begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.7.1-dev0">
  12       Active development ...
  13       CMSIS-DSP:
  14        - Purged pre-built libs from Git
  15       CMSIS-RTOS:
  16        - RTX4: Purged pre-built libs from Git
  17       CMSIS-RTOS2:
  18        - RTX5: Purged pre-built libs from Git
  19     </release>
  20     <release version="5.7.0" date="2020-04-09">
  21       CMSIS-Build: 0.9.0 (beta)
  22         - Draft for CMSIS Project description (CPRJ)
  23       CMSIS-Core(M): 5.4.0 (see revision history for details)
  24         - Cortex-M55 cpu support
  25         - Enhanced MVE support for Armv8.1-MML
  26         - Fixed device config define checks.
  27         - L1 Cache functions for Armv7-M and later
  28       CMSIS-Core(A): 1.2.0 (see revision history for details)
  29         - Fixed GIC_SetPendingIRQ to use GICD_SGIR
  30         - Added missing DSP intrinsics
  31         - Reworked assembly intrinsics: volatile, barriers and clobber
  32       CMSIS-DSP: 1.8.0 (see revision history for details)
  33         - Added new functions and function groups
  34         - Added MVE support
  35       CMSIS-NN: 1.3.0 (see revision history for details)
  36         - Added MVE support
  37         - Further optimizations for kernels using DSP extension
  38       CMSIS-RTOS2:
  39         - RTX 5.5.2 (see revision history for details)
  40       CMSIS-Driver: 2.8.0
  41         - Added VIO API 0.1.0 (Preview)
  42         - removed volatile from status related typedefs in APIs
  43         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  44       CMSIS-Pack: 1.6.3 (see revision history for details)
  45         - deprecating all types specific to cpdsc format. Cpdsc is replaced by Cprj with dedicated schema.
  46       Devices:
  47         - ARMCM55 device
  48         - ARMv81MML startup code recognizing __MVE_USED macro
  49         - Refactored vector table references for all Cortex-M devices
  50         - Reworked ARMCM* C-StartUp files.
  51         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  52       Utilities:
  53         Attention: Linux binaries moved to Linux64 folder!
  54         - SVDConv 3.3.35
  55         - PackChk 1.3.89
  56     </release>
  57     <release version="5.6.0" date="2019-07-10">
  58       CMSIS-Core(M): 5.3.0 (see revision history for details)
  59         - Added provisions for compiler-independent C startup code.
  60       CMSIS-Core(A): 1.1.4 (see revision history for details)
  61         - Fixed __FPU_Enable.
  62       CMSIS-DSP: 1.7.0 (see revision history for details)
  63         - New Neon versions of f32 functions
  64         - Python wrapper
  65         - Preliminary cmake build
  66         - Compilation flags for FFTs
  67         - Changes to arm_math.h
  68       CMSIS-NN: 1.2.0 (see revision history for details)
  69         - New function for depthwise convolution with asymmetric quantization.
  70         - New support functions for requantization.
  71       CMSIS-RTOS:
  72         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  73       CMSIS-RTOS2:
  74         - RTX 5.5.1 (see revision history for details)
  75       CMSIS-Driver: 2.7.1
  76         - WiFi Interface API 1.0.0
  77       Devices:
  78         - Generalized C startup code for all Cortex-M family devices.
  79         - Updated Cortex-A default memory regions and MMU configurations
  80         - Moved Cortex-A memory and system config files to avoid include path issues
  81     </release>
  82     <release version="5.5.1" date="2019-03-20">
  83       The following folders are deprecated
  84         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  85
  86       CMSIS-Core(M): 5.2.1 (see revision history for details)
  87         - Fixed compilation issue in cmsis_armclang_ltm.h
  88     </release>
  89     <release version="5.5.0" date="2019-03-18">
  90       The following folders have been removed:
  91         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  92         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  93       The following folders are deprecated
  94         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  95
  96       CMSIS-Core(M): 5.2.0 (see revision history for details)
  97         - Reworked Stack/Heap configuration for ARM startup files.
  98         - Added Cortex-M35P device support.
  99         - Added generic Armv8.1-M Mainline device support.
 100       CMSIS-Core(A): 1.1.3 (see revision history for details)
 101       CMSIS-DSP: 1.6.0 (see revision history for details)
 102         - reworked DSP library source files
 103         - reworked DSP library documentation
 104         - Changed DSP folder structure
 105         - moved DSP libraries to folder ./DSP/Lib
 106         - ARM DSP Libraries are built with ARMCLANG
 107         - Added DSP Libraries Source variant
 108       CMSIS-RTOS2:
 109         - RTX 5.5.0 (see revision history for details)
 110       CMSIS-Driver: 2.7.0
 111         - Added WiFi Interface API 1.0.0-beta
 112         - Added components for project specific driver implementations
 113       CMSIS-Pack: 1.6.0 (see revision history for details)
 114       Devices:
 115         - Added Cortex-M35P and ARMv81MML device templates.
 116         - Fixed C-Startup Code for GCC (aligned with other compilers)
 117       Utilities:
 118         - SVDConv 3.3.25
 119         - PackChk 1.3.82
 120     </release>
 121     <release version="5.4.0" date="2018-08-01">
 122       Aligned pack structure with repository.
 123       The following folders are deprecated:
 124         - CMSIS/Include/
 125         - CMSIS/DSP_Lib/
 126
 127       CMSIS-Core(M): 5.1.2 (see revision history for details)
 128         - Added Cortex-M1 support (beta).
 129       CMSIS-Core(A): 1.1.2 (see revision history for details)
 130       CMSIS-NN: 1.1.0
 131         - Added new math functions.
 132       CMSIS-RTOS2:
 133         - API 2.1.3 (see revision history for details)
 134         - RTX 5.4.0 (see revision history for details)
 135           * Updated exception handling on Cortex-A
 136       CMSIS-Driver:
 137         - Flash Driver API V2.2.0
 138       Utilities:
 139         - SVDConv 3.3.21
 140         - PackChk 1.3.71
 141     </release>
 142     <release version="5.3.0" date="2018-02-22">
 143       Updated Arm company brand.
 144       CMSIS-Core(M): 5.1.1 (see revision history for details)
 145       CMSIS-Core(A): 1.1.1 (see revision history for details)
 146       CMSIS-DAP: 2.0.0 (see revision history for details)
 147       CMSIS-NN: 1.0.0
 148         - Initial contribution of the bare metal Neural Network Library.
 149       CMSIS-RTOS2:
 150         - RTX 5.3.0 (see revision history for details)
 151         - OS Tick API 1.0.1
 152     </release>
 153     <release version="5.2.0" date="2017-11-16">
 154       CMSIS-Core(M): 5.1.0 (see revision history for details)
 155         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 156         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 157       CMSIS-Core(A): 1.1.0 (see revision history for details)
 158         - Added compiler_iccarm.h.
 159         - Added additional access functions for physical timer.
 160       CMSIS-DAP: 1.2.0 (see revision history for details)
 161       CMSIS-DSP: 1.5.2 (see revision history for details)
 162       CMSIS-Driver: 2.6.0 (see revision history for details)
 163         - CAN Driver API V1.2.0
 164         - NAND Driver API V2.3.0
 165       CMSIS-RTOS:
 166         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 167       CMSIS-RTOS2:
 168         - API 2.1.2 (see revision history for details)
 169         - RTX 5.2.3 (see revision history for details)
 170       Devices:
 171         - Added GCC startup and linker script for Cortex-A9.
 172         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 173         - Added IAR startup code for Cortex-A9
 174     </release>
 175     <release version="5.1.1" date="2017-09-19">
 176       CMSIS-RTOS2:
 177       - RTX 5.2.1 (see revision history for details)
 178     </release>
 179     <release version="5.1.0" date="2017-08-04">
 180       CMSIS-Core(M): 5.0.2 (see revision history for details)
 181       - Changed Version Control macros to be core agnostic.
 182       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 183       CMSIS-Core(A): 1.0.0 (see revision history for details)
 184       - Initial release
 185       - IRQ Controller API 1.0.0
 186       CMSIS-Driver: 2.05 (see revision history for details)
 187       - All typedefs related to status have been made volatile.
 188       CMSIS-RTOS2:
 189       - API 2.1.1 (see revision history for details)
 190       - RTX 5.2.0 (see revision history for details)
 191       - OS Tick API 1.0.0
 192       CMSIS-DSP: 1.5.2 (see revision history for details)
 193       - Fixed GNU Compiler specific diagnostics.
 194       CMSIS-Pack: 1.5.0 (see revision history for details)
 195       - added System Description File (*.SDF) Format
 196       CMSIS-Zone: 0.0.1 (Preview)
 197       - Initial specification draft
 198     </release>
 199     <release version="5.0.1" date="2017-02-03">
 200       Package Description:
 201       - added taxonomy for Cclass RTOS
 202       CMSIS-RTOS2:
 203       - API 2.1   (see revision history for details)
 204       - RTX 5.1.0 (see revision history for details)
 205       CMSIS-Core: 5.0.1 (see revision history for details)
 206       - Added __PACKED_STRUCT macro
 207       - Added uVisior support
 208       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 209       - Updated template for secure main function (main_s.c)
 210       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 211       CMSIS-DSP: 1.5.1 (see revision history for details)
 212       - added ARMv8M DSP libraries.
 213       CMSIS-Pack:1.4.9 (see revision history for details)
 214       - added Pack Index File specification and schema file
 215     </release>
 216     <release version="5.0.0" date="2016-11-11">
 217       Changed open source license to Apache 2.0
 218       CMSIS_Core:
 219        - Added support for Cortex-M23 and Cortex-M33.
 220        - Added ARMv8-M device configurations for mainline and baseline.
 221        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 222        - Added cmsis_compiler.h to unify compiler behaviour.
 223        - Updated function SCB_EnableICache (for Cortex-M7).
 224        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 225       CMSIS-RTOS:
 226         - bug fix in RTX 4.82 (see revision history for details)
 227       CMSIS-RTOS2:
 228         - new API including compatibility layer to CMSIS-RTOS
 229         - reference implementation based on RTX5
 230         - supports all Cortex-M variants including TrustZone for ARMv8-M
 231       CMSIS-SVD:
 232        - reworked SVD format documentation
 233        - removed SVD file database documentation as SVD files are distributed in packs
 234        - updated SVDConv for Win32 and Linux
 235       CMSIS-DSP:
 236        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 237        - Added DSP libraries build projects to CMSIS pack.
 238     </release>
 239     <release version="4.5.0" date="2015-10-28">
 240       - CMSIS-Core     4.30.0  (see revision history for details)
 241       - CMSIS-DAP      1.1.0   (unchanged)
 242       - CMSIS-Driver   2.04.0  (see revision history for details)
 243       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 244       - CMSIS-Pack     1.4.1   (see revision history for details)
 245       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 246       - CMSIS-SVD      1.3.1   (see revision history for details)
 247     </release>
 248     <release version="4.4.0" date="2015-09-11">
 249       - CMSIS-Core     4.20   (see revision history for details)
 250       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 251       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 252       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 253       - CMSIS-RTOS
 254         -- API         1.02   (unchanged)
 255         -- RTX         4.79   (see revision history for details)
 256       - CMSIS-SVD      1.3.0  (see revision history for details)
 257       - CMSIS-DAP      1.1.0  (extended with SWO support)
 258     </release>
 259     <release version="4.3.0" date="2015-03-20">
 260       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 261       - CMSIS-DSP      1.4.5  (see revision history for details)
 262       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 263       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 264       - CMSIS-RTOS
 265         -- API         1.02   (unchanged)
 266         -- RTX         4.78   (see revision history for details)
 267       - CMSIS-SVD      1.2    (unchanged)
 268     </release>
 269     <release version="4.2.0" date="2014-09-24">
 270       Adding Cortex-M7 support
 271       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 272       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 273       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 274       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 275       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 276     </release>
 277     <release version="4.1.1" date="2014-06-30">
 278       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 279     </release>
 280     <release version="4.1.0" date="2014-06-12">
 281       - CMSIS-Driver   2.02  (incompatible update)
 282       - CMSIS-Pack     1.3   (see revision history for details)
 283       - CMSIS-DSP      1.4.2 (unchanged)
 284       - CMSIS-Core     3.30  (unchanged)
 285       - CMSIS-RTOS RTX 4.74  (unchanged)
 286       - CMSIS-RTOS API 1.02  (unchanged)
 287       - CMSIS-SVD      1.10  (unchanged)
 288       PACK:
 289       - removed G++ specific files from PACK
 290       - added Component Startup variant "C Startup"
 291       - added Pack Checking Utility
 292       - updated conditions to reflect tool-chain dependency
 293       - added Taxonomy for Graphics
 294       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 295     </release>
 296     <!-- release version="4.0.0">
 297       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 298       - CMSIS-Pack     1.1   Preliminary
 299       - CMSIS-DSP      1.4.2 (see revision history for details)
 300       - CMSIS-Core     3.30  (see revision history for details)
 301       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 302       - CMSIS-RTOS API 1.02  (unchanged)
 303       - CMSIS-SVD      1.10  (unchanged)
 304     </release -->
 305     <release version="3.20.4" date="2014-02-20">
 306       - CMSIS-RTOS 4.74 (see revision history for details)
 307       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 308     </release>
 309     <!-- release version="3.20.3">
 310       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 311       - CMSIS-RTOS 4.73 (see revision history for details)
 312     </release -->
 313     <!-- release version="3.20.2">
 314       - CMSIS-Pack documentation has been added
 315       - CMSIS-Drivers header and documentation have been added to PACK
 316       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 317     </release -->
 318     <!-- release version="3.20.1">
 319       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 320       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 321     </release -->
 322     <!-- release version="3.20.0">
 323       The software portions that are deployed in the application program are now under a BSD license which allows usage
 324       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 325       The individual components have been update as listed below:
 326       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 327       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 328       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 329       - CMSIS-SVD is unchanged.
 330     </release -->
 331   </releases>
 332
 333   <taxonomy>
 334     <description Cclass="Audio">Software components for audio processing</description>
 335     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 336     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 337     <description Cclass="Compiler">Compiler Software Extensions</description>
 338     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 339     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 340     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 341     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 342     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 343     <description Cclass="File System">File Drive Support and File System</description>
 344     <description Cclass="IoT Client">IoT cloud client connector</description>
 345     <description Cclass="IoT Service">IoT specific services</description>
 346     <description Cclass="IoT Utility">IoT specific software utility</description>
 347     <description Cclass="Graphics">Graphical User Interface</description>
 348     <description Cclass="Network">Network Stack using Internet Protocols</description>
 349     <description Cclass="RTOS">Real-time Operating System</description>
 350     <description Cclass="Security">Encryption for secure communication or storage</description>
 351     <description Cclass="USB">Universal Serial Bus Stack</description>
 352     <description Cclass="Utility">Generic software utility components</description>
 353   </taxonomy>
 354
 355   <devices>
 356     <!-- ******************************  Cortex-M0  ****************************** -->
 357     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 358       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 359       <description>
 360 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 361 - simple, easy-to-use programmers model
 362 - highly efficient ultra-low power operation
 363 - excellent code density
 364 - deterministic, high-performance interrupt handling
 365 - upward compatibility with the rest of the Cortex-M processor family.
 366       </description>
 367       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 368       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 369       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 370       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 371
 372       <device Dname="ARMCM0">
 373         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 374         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 375       </device>
 376     </family>
 377
 378     <!-- ******************************  Cortex-M0P  ****************************** -->
 379     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 380       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 381       <description>
 382 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 383 - simple, easy-to-use programmers model
 384 - highly efficient ultra-low power operation
 385 - excellent code density
 386 - deterministic, high-performance interrupt handling
 387 - upward compatibility with the rest of the Cortex-M processor family.
 388       </description>
 389       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 390       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 391       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 392       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 393
 394       <device Dname="ARMCM0P">
 395         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 396         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 397       </device>
 398
 399       <device Dname="ARMCM0P_MPU">
 400         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 401         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 402       </device>
 403     </family>
 404
 405     <!-- ******************************  Cortex-M1  ****************************** -->
 406     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 407       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 408       <description>
 409 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 410 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 411       </description>
 412       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 413       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 414       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 415       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 416
 417       <device Dname="ARMCM1">
 418         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 419         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 420       </device>
 421     </family>
 422
 423     <!-- ******************************  Cortex-M3  ****************************** -->
 424     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 425       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 426       <description>
 427 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 428 - simple, easy-to-use programmers model
 429 - highly efficient ultra-low power operation
 430 - excellent code density
 431 - deterministic, high-performance interrupt handling
 432 - upward compatibility with the rest of the Cortex-M processor family.
 433       </description>
 434       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 435       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 436       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 437       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 438
 439       <device Dname="ARMCM3">
 440         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 441         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 442       </device>
 443     </family>
 444
 445     <!-- ******************************  Cortex-M4  ****************************** -->
 446     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 447       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 448       <description>
 449 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 450 - simple, easy-to-use programmers model
 451 - highly efficient ultra-low power operation
 452 - excellent code density
 453 - deterministic, high-performance interrupt handling
 454 - upward compatibility with the rest of the Cortex-M processor family.
 455       </description>
 456       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 457       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 458       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 459       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 460
 461       <device Dname="ARMCM4">
 462         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 463         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 464       </device>
 465
 466       <device Dname="ARMCM4_FP">
 467         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 468         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 469       </device>
 470     </family>
 471
 472     <!-- ******************************  Cortex-M7  ****************************** -->
 473     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 474       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 475       <description>
 476 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 477 - simple, easy-to-use programmers model
 478 - highly efficient ultra-low power operation
 479 - excellent code density
 480 - deterministic, high-performance interrupt handling
 481 - upward compatibility with the rest of the Cortex-M processor family.
 482       </description>
 483       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 484       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 485       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 486       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 487
 488       <device Dname="ARMCM7">
 489         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 490         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 491       </device>
 492
 493       <device Dname="ARMCM7_SP">
 494         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 495         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 496       </device>
 497
 498       <device Dname="ARMCM7_DP">
 499         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 500         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 501       </device>
 502     </family>
 503
 504     <!-- ******************************  Cortex-M23  ********************** -->
 505     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 506       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 507       <description>
 508 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 509 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 510 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 511       </description>
 512       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 513       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 514       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 515       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 516       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 517       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 518
 519       <device Dname="ARMCM23">
 520         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 521         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 522       </device>
 523
 524       <device Dname="ARMCM23_TZ">
 525         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 526         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 527       </device>
 528     </family>
 529
 530     <!-- ******************************  Cortex-M33  ****************************** -->
 531     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 532       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 533       <description>
 534 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 535 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 536       </description>
 537       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 538       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 539       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 540       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 541       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 542       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 543
 544       <device Dname="ARMCM33">
 545         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 546         <description>
 547           no DSP Instructions, no Floating Point Unit, no TrustZone
 548         </description>
 549         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 550       </device>
 551
 552       <device Dname="ARMCM33_TZ">
 553         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 554         <description>
 555           no DSP Instructions, no Floating Point Unit, TrustZone
 556         </description>
 557         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 558       </device>
 559
 560       <device Dname="ARMCM33_DSP_FP">
 561         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 562         <description>
 563           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 564         </description>
 565         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 566       </device>
 567
 568       <device Dname="ARMCM33_DSP_FP_TZ">
 569         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 570         <description>
 571           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 572         </description>
 573         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 574       </device>
 575     </family>
 576
 577     <!-- ******************************  Cortex-M35P  ****************************** -->
 578     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 579       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 580       <description>
 581 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 582 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 583       </description>
 584
 585       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 586       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 587       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 588       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 589       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 590       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 591
 592       <device Dname="ARMCM35P">
 593         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 594         <description>
 595           no DSP Instructions, no Floating Point Unit, no TrustZone
 596         </description>
 597         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 598       </device>
 599
 600       <device Dname="ARMCM35P_TZ">
 601         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 602         <description>
 603           no DSP Instructions, no Floating Point Unit, TrustZone
 604         </description>
 605         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 606       </device>
 607
 608       <device Dname="ARMCM35P_DSP_FP">
 609         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 610         <description>
 611           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 612         </description>
 613         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 614       </device>
 615
 616       <device Dname="ARMCM35P_DSP_FP_TZ">
 617         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 618         <description>
 619           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 620         </description>
 621         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 622       </device>
 623     </family>
 624
 625     <!-- ******************************  Cortex-M55  ****************************** -->
 626     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 627       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 628       <description>
 629 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 630 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 631 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 632       </description>
 633
 634       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 635       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 636       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 637       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 638       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 639       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 640
 641       <device Dname="ARMCM55">
 642         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 643         <description>
 644           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 645         </description>
 646         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 647       </device>
 648     </family>
 649
 650     <!-- ******************************  ARMSC000  ****************************** -->
 651     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 652       <description>
 653 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 654 - simple, easy-to-use programmers model
 655 - highly efficient ultra-low power operation
 656 - excellent code density
 657 - deterministic, high-performance interrupt handling
 658       </description>
 659       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 660       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 661       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 662       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 663
 664       <device Dname="ARMSC000">
 665         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 666         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 667       </device>
 668     </family>
 669
 670     <!-- ******************************  ARMSC300  ****************************** -->
 671     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 672       <description>
 673 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 674 - simple, easy-to-use programmers model
 675 - highly efficient ultra-low power operation
 676 - excellent code density
 677 - deterministic, high-performance interrupt handling
 678       </description>
 679       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 680       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 681       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 682       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 683
 684       <device Dname="ARMSC300">
 685         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 686         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 687       </device>
 688     </family>
 689
 690     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 691     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 692       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 693       <description>
 694 Armv8-M Baseline based device with TrustZone
 695       </description>
 696       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 697       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 698       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 699       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 700       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 701       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 702
 703       <device Dname="ARMv8MBL">
 704         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 705         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 706       </device>
 707     </family>
 708
 709     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 710     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 711       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 712       <description>
 713 Armv8-M Mainline based device with TrustZone
 714       </description>
 715       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 716       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 717       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 718       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 719       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 720       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 721
 722       <device Dname="ARMv8MML">
 723         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 724         <description>
 725           no DSP Instructions, no Floating Point Unit, TrustZone
 726         </description>
 727         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 728       </device>
 729
 730       <device Dname="ARMv8MML_DSP">
 731         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 732         <description>
 733           DSP Instructions, no Floating Point Unit, TrustZone
 734         </description>
 735         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 736       </device>
 737
 738       <device Dname="ARMv8MML_SP">
 739         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 740         <description>
 741           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 742         </description>
 743         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 744       </device>
 745
 746       <device Dname="ARMv8MML_DSP_SP">
 747         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 748         <description>
 749           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 750         </description>
 751         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 752       </device>
 753
 754       <device Dname="ARMv8MML_DP">
 755         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 756         <description>
 757           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 758         </description>
 759         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 760       </device>
 761
 762       <device Dname="ARMv8MML_DSP_DP">
 763         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 764         <description>
 765           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 766         </description>
 767         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 768       </device>
 769     </family>
 770
 771     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 772     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 773       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 774       <description>
 775 Armv8.1-M Mainline based device with TrustZone and MVE
 776       </description>
 777       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 778       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 779       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 780       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 781       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 782       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 783
 784
 785       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 786         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 787         <description>
 788           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 789         </description>
 790         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 791       </device>
 792     </family>
 793
 794     <!-- ******************************  Cortex-A5  ****************************** -->
 795     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 796       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 797       <description>
 798 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 799 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 800 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 801       </description>
 802
 803       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 804       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 805       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 806       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 807
 808       <device Dname="ARMCA5">
 809         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 810         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 811       </device>
 812     </family>
 813
 814     <!-- ******************************  Cortex-A7  ****************************** -->
 815     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 816       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 817       <description>
 818 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 819 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 820 an optional integrated GIC, and an optional L2 cache controller.
 821       </description>
 822
 823       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 824       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 825       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 826       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 827
 828       <device Dname="ARMCA7">
 829         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 830         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 831       </device>
 832     </family>
 833
 834     <!-- ******************************  Cortex-A9  ****************************** -->
 835     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 836       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 837       <description>
 838 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 839 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 840 and 8-bit Java bytecodes in Jazelle state.
 841       </description>
 842
 843       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 844       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 845       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 846       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 847
 848       <device Dname="ARMCA9">
 849         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 850         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 851       </device>
 852     </family>
 853   </devices>
 854
 855
 856   <apis>
 857     <!-- CMSIS Device API -->
 858     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 859       <description>Device interrupt controller interface</description>
 860       <files>
 861         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 862       </files>
 863     </api>
 864     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 865       <description>RTOS Kernel system tick timer interface</description>
 866       <files>
 867         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 868       </files>
 869     </api>
 870     <!-- CMSIS-RTOS API -->
 871     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 872       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 873       <files>
 874         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 875       </files>
 876     </api>
 877     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 878       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 879       <files>
 880         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 881         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 882       </files>
 883     </api>
 884     <!-- CMSIS Driver API -->
 885     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 886       <description>USART Driver API for Cortex-M</description>
 887       <files>
 888         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 889         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 890       </files>
 891     </api>
 892     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 893       <description>SPI Driver API for Cortex-M</description>
 894       <files>
 895         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 896         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 897       </files>
 898     </api>
 899     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 900       <description>SAI Driver API for Cortex-M</description>
 901       <files>
 902         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 903         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 904       </files>
 905     </api>
 906     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 907       <description>I2C Driver API for Cortex-M</description>
 908       <files>
 909         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 910         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 911       </files>
 912     </api>
 913     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 914       <description>CAN Driver API for Cortex-M</description>
 915       <files>
 916         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 917         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 918       </files>
 919     </api>
 920     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 921       <description>Flash Driver API for Cortex-M</description>
 922       <files>
 923         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 924         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 925       </files>
 926     </api>
 927     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 928       <description>MCI Driver API for Cortex-M</description>
 929       <files>
 930         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 931         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 932       </files>
 933     </api>
 934     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 935       <description>NAND Flash Driver API for Cortex-M</description>
 936       <files>
 937         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 938         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 939       </files>
 940     </api>
 941     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 942       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 943       <files>
 944         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 945         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 946         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 947       </files>
 948     </api>
 949     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 950       <description>Ethernet MAC Driver API for Cortex-M</description>
 951       <files>
 952         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 953         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 954       </files>
 955     </api>
 956     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 957       <description>Ethernet PHY Driver API for Cortex-M</description>
 958       <files>
 959         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 960         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 961       </files>
 962     </api>
 963     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 964       <description>USB Device Driver API for Cortex-M</description>
 965       <files>
 966         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 967         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 968       </files>
 969     </api>
 970     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
 971       <description>USB Host Driver API for Cortex-M</description>
 972       <files>
 973         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 974         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 975       </files>
 976     </api>
 977     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
 978       <description>WiFi driver</description>
 979       <files>
 980         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 981         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 982       </files>
 983     </api>
 984     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
 985       <description>Virtual I/O</description>
 986       <files>
 987         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
 988         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
 989         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
 990       </files>
 991     </api>
 992   </apis>
 993
 994   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 995   <conditions>
 996     <!-- compiler -->
 997     <condition id="ARMCC6">
 998       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 999       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1000     </condition>
1001     <condition id="ARMCC5">
1002       <require Tcompiler="ARMCC" Toptions="AC5"/>
1003     </condition>
1004     <condition id="ARMCC">
1005       <require Tcompiler="ARMCC"/>
1006     </condition>
1007     <condition id="GCC">
1008       <require Tcompiler="GCC"/>
1009     </condition>
1010     <condition id="IAR">
1011       <require Tcompiler="IAR"/>
1012     </condition>
1013     <condition id="ARMCC GCC">
1014       <accept Tcompiler="ARMCC"/>
1015       <accept Tcompiler="GCC"/>
1016     </condition>
1017     <condition id="ARMCC GCC IAR">
1018       <accept Tcompiler="ARMCC"/>
1019       <accept Tcompiler="GCC"/>
1020       <accept Tcompiler="IAR"/>
1021     </condition>
1022
1023     <!-- Arm architecture -->
1024     <condition id="ARMv6-M Device">
1025       <description>Armv6-M architecture based device</description>
1026       <accept Dcore="Cortex-M0"/>
1027       <accept Dcore="Cortex-M1"/>
1028       <accept Dcore="Cortex-M0+"/>
1029       <accept Dcore="SC000"/>
1030     </condition>
1031     <condition id="ARMv7-M Device">
1032       <description>Armv7-M architecture based device</description>
1033       <accept Dcore="Cortex-M3"/>
1034       <accept Dcore="Cortex-M4"/>
1035       <accept Dcore="Cortex-M7"/>
1036       <accept Dcore="SC300"/>
1037     </condition>
1038     <condition id="ARMv8-M Device">
1039       <description>Armv8-M architecture based device</description>
1040       <accept Dcore="ARMV8MBL"/>
1041       <accept Dcore="ARMV8MML"/>
1042       <accept Dcore="ARMV81MML"/>
1043       <accept Dcore="Cortex-M23"/>
1044       <accept Dcore="Cortex-M33"/>
1045       <accept Dcore="Cortex-M35P"/>
1046       <accept Dcore="Cortex-M55"/>
1047     </condition>
1048     <condition id="ARMv6_7-M Device">
1049       <description>Armv6_7-M architecture based device</description>
1050       <accept condition="ARMv6-M Device"/>
1051       <accept condition="ARMv7-M Device"/>
1052     </condition>
1053     <condition id="ARMv6_7_8-M Device">
1054       <description>Armv6_7_8-M architecture based device</description>
1055       <accept condition="ARMv6-M Device"/>
1056       <accept condition="ARMv7-M Device"/>
1057       <accept condition="ARMv8-M Device"/>
1058     </condition>
1059     <condition id="ARMv7-A Device">
1060       <description>Armv7-A architecture based device</description>
1061       <accept Dcore="Cortex-A5"/>
1062       <accept Dcore="Cortex-A7"/>
1063       <accept Dcore="Cortex-A9"/>
1064     </condition>
1065
1066     <condition id="TrustZone">
1067       <description>TrustZone</description>
1068       <require Dtz="TZ"/>
1069     </condition>
1070     <condition id="TZ Secure">
1071       <description>TrustZone (Secure)</description>
1072       <require Dtz="TZ"/>
1073       <require Dsecure="Secure"/>
1074     </condition>
1075     <condition id="TZ Non-secure">
1076       <description>TrustZone (Non-secure)</description>
1077       <require Dtz="TZ"/>
1078       <require Dsecure="Non-secure"/>
1079     </condition>
1080
1081     <!-- ARM core -->
1082     <condition id="CM0">
1083       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1084       <accept Dcore="Cortex-M0"/>
1085       <accept Dcore="Cortex-M0+"/>
1086       <accept Dcore="SC000"/>
1087     </condition>
1088     <condition id="CM1">
1089       <description>Cortex-M1</description>
1090       <require Dcore="Cortex-M1"/>
1091     </condition>
1092     <condition id="CM3">
1093       <description>Cortex-M3 or SC300 processor based device</description>
1094       <accept Dcore="Cortex-M3"/>
1095       <accept Dcore="SC300"/>
1096     </condition>
1097     <condition id="CM4">
1098       <description>Cortex-M4 processor based device</description>
1099       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1100     </condition>
1101     <condition id="CM4_FP">
1102       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1103       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1104       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1105       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1106     </condition>
1107     <condition id="CM7">
1108       <description>Cortex-M7 processor based device</description>
1109       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1110     </condition>
1111     <condition id="CM7_FP">
1112       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1113       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1114       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1115     </condition>
1116     <condition id="CM7_SP">
1117       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1118       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1119     </condition>
1120     <condition id="CM7_DP">
1121       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1122       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1123     </condition>
1124     <condition id="CM23">
1125       <description>Cortex-M23 processor based device</description>
1126       <require Dcore="Cortex-M23"/>
1127     </condition>
1128     <condition id="CM33">
1129       <description>Cortex-M33 processor based device</description>
1130       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1131     </condition>
1132     <condition id="CM33_FP">
1133       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1134       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1135     </condition>
1136     <condition id="CM35P">
1137       <description>Cortex-M35P processor based device</description>
1138       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1139     </condition>
1140     <condition id="CM35P_FP">
1141       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1142       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1143     </condition>
1144     <condition id="ARMv8MBL">
1145       <description>Armv8-M Baseline processor based device</description>
1146       <require Dcore="ARMV8MBL"/>
1147     </condition>
1148     <condition id="ARMv8MML">
1149       <description>Armv8-M Mainline processor based device</description>
1150       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1151     </condition>
1152     <condition id="ARMv8MML_FP">
1153       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1154       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1155       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1156     </condition>
1157
1158     <condition id="CM33_NODSP_NOFPU">
1159       <description>CM33, no DSP, no FPU</description>
1160       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1161     </condition>
1162     <condition id="CM33_DSP_NOFPU">
1163       <description>CM33, DSP, no FPU</description>
1164       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1165     </condition>
1166     <condition id="CM33_NODSP_SP">
1167       <description>CM33, no DSP, SP FPU</description>
1168       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1169     </condition>
1170     <condition id="CM33_DSP_SP">
1171       <description>CM33, DSP, SP FPU</description>
1172       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1173     </condition>
1174
1175     <condition id="CM35P_NODSP_NOFPU">
1176       <description>CM35P, no DSP, no FPU</description>
1177       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1178     </condition>
1179     <condition id="CM35P_DSP_NOFPU">
1180       <description>CM35P, DSP, no FPU</description>
1181       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1182     </condition>
1183     <condition id="CM35P_NODSP_SP">
1184       <description>CM35P, no DSP, SP FPU</description>
1185       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1186     </condition>
1187     <condition id="CM35P_DSP_SP">
1188       <description>CM35P, DSP, SP FPU</description>
1189       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1190     </condition>
1191
1192     <condition id="CM55_NOFPU_NOMVE">
1193       <description>Cortex-M55, no FPU, no MVE</description>
1194       <require Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="NO_MVE"/>
1195     </condition>
1196     <condition id="CM55_NOFPU_MVE">
1197       <description>Cortex-M55, no FPU, MVE</description>
1198       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="MVE"/>
1199       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="FP_MVE"/>
1200     </condition>
1201     <condition id="CM55_FPU">
1202       <description>Cortex-M55, FPU</description>
1203       <accept  Dcore="Cortex-M55" Dfpu="SP_FPU"/>
1204       <accept  Dcore="Cortex-M55" Dfpu="DP_FPU"/>
1205     </condition>
1206
1207     <condition id="ARMv8MML_NODSP_NOFPU">
1208       <description>Armv8-M Mainline, no DSP, no FPU</description>
1209       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1210     </condition>
1211     <condition id="ARMv8MML_DSP_NOFPU">
1212       <description>Armv8-M Mainline, DSP, no FPU</description>
1213       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1214     </condition>
1215     <condition id="ARMv8MML_NODSP_SP">
1216       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1217       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1218     </condition>
1219     <condition id="ARMv8MML_DSP_SP">
1220       <description>Armv8-M Mainline, DSP, SP FPU</description>
1221       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1222     </condition>
1223
1224     <condition id="CA5_CA9">
1225       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1226       <accept Dcore="Cortex-A5"/>
1227       <accept Dcore="Cortex-A9"/>
1228     </condition>
1229
1230     <condition id="CA7">
1231       <description>Cortex-A7 processor based device</description>
1232       <accept Dcore="Cortex-A7"/>
1233     </condition>
1234
1235     <!-- ARMCC compiler -->
1236     <condition id="CA_ARMCC5">
1237       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1238       <require condition="ARMv7-A Device"/>
1239       <require condition="ARMCC5"/>
1240     </condition>
1241     <condition id="CA_ARMCC6">
1242       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1243       <require condition="ARMv7-A Device"/>
1244       <require condition="ARMCC6"/>
1245     </condition>
1246
1247     <condition id="CM0_ARMCC">
1248       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1249       <require condition="CM0"/>
1250       <require Tcompiler="ARMCC"/>
1251     </condition>
1252     <condition id="CM0_LE_ARMCC">
1253       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1254       <require condition="CM0_ARMCC"/>
1255       <require Dendian="Little-endian"/>
1256     </condition>
1257     <condition id="CM0_BE_ARMCC">
1258       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1259       <require condition="CM0_ARMCC"/>
1260       <require Dendian="Big-endian"/>
1261     </condition>
1262
1263     <condition id="CM1_ARMCC">
1264       <description>Cortex-M1 based device for the Arm Compiler</description>
1265       <require condition="CM1"/>
1266       <require Tcompiler="ARMCC"/>
1267     </condition>
1268     <condition id="CM1_LE_ARMCC">
1269       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1270       <require condition="CM1_ARMCC"/>
1271       <require Dendian="Little-endian"/>
1272     </condition>
1273     <condition id="CM1_BE_ARMCC">
1274       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1275       <require condition="CM1_ARMCC"/>
1276       <require Dendian="Big-endian"/>
1277     </condition>
1278
1279     <condition id="CM3_ARMCC">
1280       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1281       <require condition="CM3"/>
1282       <require Tcompiler="ARMCC"/>
1283     </condition>
1284     <condition id="CM3_LE_ARMCC">
1285       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1286       <require condition="CM3_ARMCC"/>
1287       <require Dendian="Little-endian"/>
1288     </condition>
1289     <condition id="CM3_BE_ARMCC">
1290       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1291       <require condition="CM3_ARMCC"/>
1292       <require Dendian="Big-endian"/>
1293     </condition>
1294
1295     <condition id="CM4_ARMCC">
1296       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1297       <require condition="CM4"/>
1298       <require Tcompiler="ARMCC"/>
1299     </condition>
1300     <condition id="CM4_LE_ARMCC">
1301       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1302       <require condition="CM4_ARMCC"/>
1303       <require Dendian="Little-endian"/>
1304     </condition>
1305     <condition id="CM4_BE_ARMCC">
1306       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1307       <require condition="CM4_ARMCC"/>
1308       <require Dendian="Big-endian"/>
1309     </condition>
1310
1311     <condition id="CM4_FP_ARMCC">
1312       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1313       <require condition="CM4_FP"/>
1314       <require Tcompiler="ARMCC"/>
1315     </condition>
1316     <condition id="CM4_FP_LE_ARMCC">
1317       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1318       <require condition="CM4_FP_ARMCC"/>
1319       <require Dendian="Little-endian"/>
1320     </condition>
1321     <condition id="CM4_FP_BE_ARMCC">
1322       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1323       <require condition="CM4_FP_ARMCC"/>
1324       <require Dendian="Big-endian"/>
1325     </condition>
1326
1327     <condition id="CM7_ARMCC">
1328       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1329       <require condition="CM7"/>
1330       <require Tcompiler="ARMCC"/>
1331     </condition>
1332     <condition id="CM7_LE_ARMCC">
1333       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1334       <require condition="CM7_ARMCC"/>
1335       <require Dendian="Little-endian"/>
1336     </condition>
1337     <condition id="CM7_BE_ARMCC">
1338       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1339       <require condition="CM7_ARMCC"/>
1340       <require Dendian="Big-endian"/>
1341     </condition>
1342
1343     <condition id="CM7_FP_ARMCC">
1344       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1345       <require condition="CM7_FP"/>
1346       <require Tcompiler="ARMCC"/>
1347     </condition>
1348     <condition id="CM7_FP_LE_ARMCC">
1349       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1350       <require condition="CM7_FP_ARMCC"/>
1351       <require Dendian="Little-endian"/>
1352     </condition>
1353     <condition id="CM7_FP_BE_ARMCC">
1354       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1355       <require condition="CM7_FP_ARMCC"/>
1356       <require Dendian="Big-endian"/>
1357     </condition>
1358
1359     <condition id="CM7_SP_ARMCC">
1360       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1361       <require condition="CM7_SP"/>
1362       <require Tcompiler="ARMCC"/>
1363     </condition>
1364     <condition id="CM7_SP_LE_ARMCC">
1365       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1366       <require condition="CM7_SP_ARMCC"/>
1367       <require Dendian="Little-endian"/>
1368     </condition>
1369     <condition id="CM7_SP_BE_ARMCC">
1370       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1371       <require condition="CM7_SP_ARMCC"/>
1372       <require Dendian="Big-endian"/>
1373     </condition>
1374
1375     <condition id="CM7_DP_ARMCC">
1376       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1377       <require condition="CM7_DP"/>
1378       <require Tcompiler="ARMCC"/>
1379     </condition>
1380     <condition id="CM7_DP_LE_ARMCC">
1381       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1382       <require condition="CM7_DP_ARMCC"/>
1383       <require Dendian="Little-endian"/>
1384     </condition>
1385     <condition id="CM7_DP_BE_ARMCC">
1386       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1387       <require condition="CM7_DP_ARMCC"/>
1388       <require Dendian="Big-endian"/>
1389     </condition>
1390
1391     <condition id="CM23_ARMCC">
1392       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1393       <require condition="CM23"/>
1394       <require Tcompiler="ARMCC"/>
1395     </condition>
1396     <condition id="CM23_LE_ARMCC">
1397       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1398       <require condition="CM23_ARMCC"/>
1399       <require Dendian="Little-endian"/>
1400     </condition>
1401
1402     <condition id="CM33_ARMCC">
1403       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1404       <require condition="CM33"/>
1405       <require Tcompiler="ARMCC"/>
1406     </condition>
1407     <condition id="CM33_LE_ARMCC">
1408       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1409       <require condition="CM33_ARMCC"/>
1410       <require Dendian="Little-endian"/>
1411     </condition>
1412
1413     <condition id="CM33_FP_ARMCC">
1414       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1415       <require condition="CM33_FP"/>
1416       <require Tcompiler="ARMCC"/>
1417     </condition>
1418     <condition id="CM33_FP_LE_ARMCC">
1419       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1420       <require condition="CM33_FP_ARMCC"/>
1421       <require Dendian="Little-endian"/>
1422     </condition>
1423
1424     <condition id="CM33_NODSP_NOFPU_ARMCC">
1425       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1426       <require condition="CM33_NODSP_NOFPU"/>
1427       <require Tcompiler="ARMCC"/>
1428     </condition>
1429     <condition id="CM33_DSP_NOFPU_ARMCC">
1430       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1431       <require condition="CM33_DSP_NOFPU"/>
1432       <require Tcompiler="ARMCC"/>
1433     </condition>
1434     <condition id="CM33_NODSP_SP_ARMCC">
1435       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1436       <require condition="CM33_NODSP_SP"/>
1437       <require Tcompiler="ARMCC"/>
1438     </condition>
1439     <condition id="CM33_DSP_SP_ARMCC">
1440       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1441       <require condition="CM33_DSP_SP"/>
1442       <require Tcompiler="ARMCC"/>
1443     </condition>
1444     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1445       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1446       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1447       <require Dendian="Little-endian"/>
1448     </condition>
1449     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1450       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1451       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1452       <require Dendian="Little-endian"/>
1453     </condition>
1454     <condition id="CM33_NODSP_SP_LE_ARMCC">
1455       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1456       <require condition="CM33_NODSP_SP_ARMCC"/>
1457       <require Dendian="Little-endian"/>
1458     </condition>
1459     <condition id="CM33_DSP_SP_LE_ARMCC">
1460       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1461       <require condition="CM33_DSP_SP_ARMCC"/>
1462       <require Dendian="Little-endian"/>
1463     </condition>
1464
1465     <condition id="CM35P_ARMCC">
1466       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1467       <require condition="CM35P"/>
1468       <require Tcompiler="ARMCC"/>
1469     </condition>
1470     <condition id="CM35P_LE_ARMCC">
1471       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1472       <require condition="CM35P_ARMCC"/>
1473       <require Dendian="Little-endian"/>
1474     </condition>
1475
1476     <condition id="CM35P_FP_ARMCC">
1477       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1478       <require condition="CM35P_FP"/>
1479       <require Tcompiler="ARMCC"/>
1480     </condition>
1481     <condition id="CM35P_FP_LE_ARMCC">
1482       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1483       <require condition="CM35P_FP_ARMCC"/>
1484       <require Dendian="Little-endian"/>
1485     </condition>
1486
1487     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1488       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1489       <require condition="CM35P_NODSP_NOFPU"/>
1490       <require Tcompiler="ARMCC"/>
1491     </condition>
1492     <condition id="CM35P_DSP_NOFPU_ARMCC">
1493       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1494       <require condition="CM35P_DSP_NOFPU"/>
1495       <require Tcompiler="ARMCC"/>
1496     </condition>
1497     <condition id="CM35P_NODSP_SP_ARMCC">
1498       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1499       <require condition="CM35P_NODSP_SP"/>
1500       <require Tcompiler="ARMCC"/>
1501     </condition>
1502     <condition id="CM35P_DSP_SP_ARMCC">
1503       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1504       <require condition="CM35P_DSP_SP"/>
1505       <require Tcompiler="ARMCC"/>
1506     </condition>
1507     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1508       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1509       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1510       <require Dendian="Little-endian"/>
1511     </condition>
1512     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1513       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1514       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1515       <require Dendian="Little-endian"/>
1516     </condition>
1517     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1518       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1519       <require condition="CM35P_NODSP_SP_ARMCC"/>
1520       <require Dendian="Little-endian"/>
1521     </condition>
1522     <condition id="CM35P_DSP_SP_LE_ARMCC">
1523       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1524       <require condition="CM35P_DSP_SP_ARMCC"/>
1525       <require Dendian="Little-endian"/>
1526     </condition>
1527
1528     <condition id="CM55_NOFPU_NOMVE_ARMCC">
1529       <description>Cortex-M55 processor, no FPU, no MVE, Arm Compiler</description>
1530       <require condition="CM55_NOFPU_NOMVE"/>
1531       <require Tcompiler="ARMCC"/>
1532     </condition>
1533     <condition id="CM55_NOFPU_MVE_ARMCC">
1534       <description>Cortex-M55 processor, no FPU, MVE, Arm Compiler</description>
1535       <require condition="CM55_NOFPU_MVE"/>
1536       <require Tcompiler="ARMCC"/>
1537     </condition>
1538     <condition id="CM55_FPU_ARMCC">
1539       <description>Cortex-M55 processor, FPU, Arm Compiler</description>
1540       <require condition="CM55_FPU"/>
1541       <require Tcompiler="ARMCC"/>
1542     </condition>
1543     <condition id="CM55_NOFPU_NOMVE_LE_ARMCC">
1544       <description>Cortex-M55 processor, little endian, no FPU, no MVE, Arm Compiler</description>
1545       <require condition="CM55_NOFPU_NOMVE_ARMCC"/>
1546       <require Dendian="Little-endian"/>
1547     </condition>
1548     <condition id="CM55_FPU_LE_ARMCC">
1549       <description>Cortex-M55 processor, little endian, FPU, Arm Compiler</description>
1550       <require condition="CM55_FPU_ARMCC"/>
1551       <require Dendian="Little-endian"/>
1552     </condition>
1553
1554     <condition id="ARMv8MBL_ARMCC">
1555       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1556       <require condition="ARMv8MBL"/>
1557       <require Tcompiler="ARMCC"/>
1558     </condition>
1559     <condition id="ARMv8MBL_LE_ARMCC">
1560       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1561       <require condition="ARMv8MBL_ARMCC"/>
1562       <require Dendian="Little-endian"/>
1563     </condition>
1564
1565     <condition id="ARMv8MML_ARMCC">
1566       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1567       <require condition="ARMv8MML"/>
1568       <require Tcompiler="ARMCC"/>
1569     </condition>
1570     <condition id="ARMv8MML_LE_ARMCC">
1571       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1572       <require condition="ARMv8MML_ARMCC"/>
1573       <require Dendian="Little-endian"/>
1574     </condition>
1575
1576     <condition id="ARMv8MML_FP_ARMCC">
1577       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1578       <require condition="ARMv8MML_FP"/>
1579       <require Tcompiler="ARMCC"/>
1580     </condition>
1581     <condition id="ARMv8MML_FP_LE_ARMCC">
1582       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1583       <require condition="ARMv8MML_FP_ARMCC"/>
1584       <require Dendian="Little-endian"/>
1585     </condition>
1586
1587     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1588       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1589       <require condition="ARMv8MML_NODSP_NOFPU"/>
1590       <require Tcompiler="ARMCC"/>
1591     </condition>
1592     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1593       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1594       <require condition="ARMv8MML_DSP_NOFPU"/>
1595       <require Tcompiler="ARMCC"/>
1596     </condition>
1597     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1598       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1599       <require condition="ARMv8MML_NODSP_SP"/>
1600       <require Tcompiler="ARMCC"/>
1601     </condition>
1602     <condition id="ARMv8MML_DSP_SP_ARMCC">
1603       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1604       <require condition="ARMv8MML_DSP_SP"/>
1605       <require Tcompiler="ARMCC"/>
1606     </condition>
1607     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1608       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1609       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1610       <require Dendian="Little-endian"/>
1611     </condition>
1612     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1613       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1614       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1615       <require Dendian="Little-endian"/>
1616     </condition>
1617     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1618       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1619       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1620       <require Dendian="Little-endian"/>
1621     </condition>
1622     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1623       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1624       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1625       <require Dendian="Little-endian"/>
1626     </condition>
1627
1628     <!-- GCC compiler -->
1629     <condition id="CA_GCC">
1630       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1631       <require condition="ARMv7-A Device"/>
1632       <require Tcompiler="GCC"/>
1633     </condition>
1634
1635     <condition id="CM0_GCC">
1636       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1637       <require condition="CM0"/>
1638       <require Tcompiler="GCC"/>
1639     </condition>
1640     <condition id="CM0_LE_GCC">
1641       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1642       <require condition="CM0_GCC"/>
1643       <require Dendian="Little-endian"/>
1644     </condition>
1645     <condition id="CM0_BE_GCC">
1646       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1647       <require condition="CM0_GCC"/>
1648       <require Dendian="Big-endian"/>
1649     </condition>
1650
1651     <condition id="CM1_GCC">
1652       <description>Cortex-M1 based device for the GCC Compiler</description>
1653       <require condition="CM1"/>
1654       <require Tcompiler="GCC"/>
1655     </condition>
1656     <condition id="CM1_LE_GCC">
1657       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1658       <require condition="CM1_GCC"/>
1659       <require Dendian="Little-endian"/>
1660     </condition>
1661     <condition id="CM1_BE_GCC">
1662       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1663       <require condition="CM1_GCC"/>
1664       <require Dendian="Big-endian"/>
1665     </condition>
1666
1667     <condition id="CM3_GCC">
1668       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1669       <require condition="CM3"/>
1670       <require Tcompiler="GCC"/>
1671     </condition>
1672     <condition id="CM3_LE_GCC">
1673       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1674       <require condition="CM3_GCC"/>
1675       <require Dendian="Little-endian"/>
1676     </condition>
1677     <condition id="CM3_BE_GCC">
1678       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1679       <require condition="CM3_GCC"/>
1680       <require Dendian="Big-endian"/>
1681     </condition>
1682
1683     <condition id="CM4_GCC">
1684       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1685       <require condition="CM4"/>
1686       <require Tcompiler="GCC"/>
1687     </condition>
1688     <condition id="CM4_LE_GCC">
1689       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1690       <require condition="CM4_GCC"/>
1691       <require Dendian="Little-endian"/>
1692     </condition>
1693     <condition id="CM4_BE_GCC">
1694       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1695       <require condition="CM4_GCC"/>
1696       <require Dendian="Big-endian"/>
1697     </condition>
1698
1699     <condition id="CM4_FP_GCC">
1700       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1701       <require condition="CM4_FP"/>
1702       <require Tcompiler="GCC"/>
1703     </condition>
1704     <condition id="CM4_FP_LE_GCC">
1705       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1706       <require condition="CM4_FP_GCC"/>
1707       <require Dendian="Little-endian"/>
1708     </condition>
1709     <condition id="CM4_FP_BE_GCC">
1710       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1711       <require condition="CM4_FP_GCC"/>
1712       <require Dendian="Big-endian"/>
1713     </condition>
1714
1715     <condition id="CM7_GCC">
1716       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1717       <require condition="CM7"/>
1718       <require Tcompiler="GCC"/>
1719     </condition>
1720     <condition id="CM7_LE_GCC">
1721       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1722       <require condition="CM7_GCC"/>
1723       <require Dendian="Little-endian"/>
1724     </condition>
1725     <condition id="CM7_BE_GCC">
1726       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1727       <require condition="CM7_GCC"/>
1728       <require Dendian="Big-endian"/>
1729     </condition>
1730
1731     <condition id="CM7_FP_GCC">
1732       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1733       <require condition="CM7_FP"/>
1734       <require Tcompiler="GCC"/>
1735     </condition>
1736     <condition id="CM7_FP_LE_GCC">
1737       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1738       <require condition="CM7_FP_GCC"/>
1739       <require Dendian="Little-endian"/>
1740     </condition>
1741     <condition id="CM7_FP_BE_GCC">
1742       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1743       <require condition="CM7_FP_GCC"/>
1744       <require Dendian="Big-endian"/>
1745     </condition>
1746
1747     <condition id="CM7_SP_GCC">
1748       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1749       <require condition="CM7_SP"/>
1750       <require Tcompiler="GCC"/>
1751     </condition>
1752     <condition id="CM7_SP_LE_GCC">
1753       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1754       <require condition="CM7_SP_GCC"/>
1755       <require Dendian="Little-endian"/>
1756     </condition>
1757
1758     <condition id="CM7_DP_GCC">
1759       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1760       <require condition="CM7_DP"/>
1761       <require Tcompiler="GCC"/>
1762     </condition>
1763     <condition id="CM7_DP_LE_GCC">
1764       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1765       <require condition="CM7_DP_GCC"/>
1766       <require Dendian="Little-endian"/>
1767     </condition>
1768
1769     <condition id="CM23_GCC">
1770       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1771       <require condition="CM23"/>
1772       <require Tcompiler="GCC"/>
1773     </condition>
1774     <condition id="CM23_LE_GCC">
1775       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1776       <require condition="CM23_GCC"/>
1777       <require Dendian="Little-endian"/>
1778     </condition>
1779
1780     <condition id="CM33_GCC">
1781       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1782       <require condition="CM33"/>
1783       <require Tcompiler="GCC"/>
1784     </condition>
1785     <condition id="CM33_LE_GCC">
1786       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1787       <require condition="CM33_GCC"/>
1788       <require Dendian="Little-endian"/>
1789     </condition>
1790
1791     <condition id="CM33_FP_GCC">
1792       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1793       <require condition="CM33_FP"/>
1794       <require Tcompiler="GCC"/>
1795     </condition>
1796     <condition id="CM33_FP_LE_GCC">
1797       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1798       <require condition="CM33_FP_GCC"/>
1799       <require Dendian="Little-endian"/>
1800     </condition>
1801
1802     <condition id="CM33_NODSP_NOFPU_GCC">
1803       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1804       <require condition="CM33_NODSP_NOFPU"/>
1805       <require Tcompiler="GCC"/>
1806     </condition>
1807     <condition id="CM33_DSP_NOFPU_GCC">
1808       <description>CM33, DSP, no FPU, GCC Compiler</description>
1809       <require condition="CM33_DSP_NOFPU"/>
1810       <require Tcompiler="GCC"/>
1811     </condition>
1812     <condition id="CM33_NODSP_SP_GCC">
1813       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1814       <require condition="CM33_NODSP_SP"/>
1815       <require Tcompiler="GCC"/>
1816     </condition>
1817     <condition id="CM33_DSP_SP_GCC">
1818       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1819       <require condition="CM33_DSP_SP"/>
1820       <require Tcompiler="GCC"/>
1821     </condition>
1822     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1823       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1824       <require condition="CM33_NODSP_NOFPU_GCC"/>
1825       <require Dendian="Little-endian"/>
1826     </condition>
1827     <condition id="CM33_DSP_NOFPU_LE_GCC">
1828       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1829       <require condition="CM33_DSP_NOFPU_GCC"/>
1830       <require Dendian="Little-endian"/>
1831     </condition>
1832     <condition id="CM33_NODSP_SP_LE_GCC">
1833       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1834       <require condition="CM33_NODSP_SP_GCC"/>
1835       <require Dendian="Little-endian"/>
1836     </condition>
1837     <condition id="CM33_DSP_SP_LE_GCC">
1838       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1839       <require condition="CM33_DSP_SP_GCC"/>
1840       <require Dendian="Little-endian"/>
1841     </condition>
1842
1843     <condition id="CM35P_GCC">
1844       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1845       <require condition="CM35P"/>
1846       <require Tcompiler="GCC"/>
1847     </condition>
1848     <condition id="CM35P_LE_GCC">
1849       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1850       <require condition="CM35P_GCC"/>
1851       <require Dendian="Little-endian"/>
1852     </condition>
1853
1854     <condition id="CM35P_FP_GCC">
1855       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1856       <require condition="CM35P_FP"/>
1857       <require Tcompiler="GCC"/>
1858     </condition>
1859     <condition id="CM35P_FP_LE_GCC">
1860       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1861       <require condition="CM35P_FP_GCC"/>
1862       <require Dendian="Little-endian"/>
1863     </condition>
1864
1865     <condition id="CM35P_NODSP_NOFPU_GCC">
1866       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1867       <require condition="CM35P_NODSP_NOFPU"/>
1868       <require Tcompiler="GCC"/>
1869     </condition>
1870     <condition id="CM35P_DSP_NOFPU_GCC">
1871       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1872       <require condition="CM35P_DSP_NOFPU"/>
1873       <require Tcompiler="GCC"/>
1874     </condition>
1875     <condition id="CM35P_NODSP_SP_GCC">
1876       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1877       <require condition="CM35P_NODSP_SP"/>
1878       <require Tcompiler="GCC"/>
1879     </condition>
1880     <condition id="CM35P_DSP_SP_GCC">
1881       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1882       <require condition="CM35P_DSP_SP"/>
1883       <require Tcompiler="GCC"/>
1884     </condition>
1885     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1886       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1887       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1888       <require Dendian="Little-endian"/>
1889     </condition>
1890     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1891       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1892       <require condition="CM35P_DSP_NOFPU_GCC"/>
1893       <require Dendian="Little-endian"/>
1894     </condition>
1895     <condition id="CM35P_NODSP_SP_LE_GCC">
1896       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1897       <require condition="CM35P_NODSP_SP_GCC"/>
1898       <require Dendian="Little-endian"/>
1899     </condition>
1900     <condition id="CM35P_DSP_SP_LE_GCC">
1901       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1902       <require condition="CM35P_DSP_SP_GCC"/>
1903       <require Dendian="Little-endian"/>
1904     </condition>
1905
1906     <condition id="CM55_NOFPU_NOMVE_GCC">
1907       <description>Cortex-M55 processor, no FPU, no MVE, GCC Compiler</description>
1908       <require condition="CM55_NOFPU_NOMVE"/>
1909       <require Tcompiler="GCC"/>
1910     </condition>
1911     <condition id="CM55_NOFPU_MVE_GCC">
1912       <description>Cortex-M55 processor, no FPU, MVE, GCC Compiler</description>
1913       <require condition="CM55_NOFPU_MVE"/>
1914       <require Tcompiler="GCC"/>
1915     </condition>
1916     <condition id="CM55_FPU_GCC">
1917       <description>Cortex-M55 processor, FPU, GCC Compiler</description>
1918       <require condition="CM55_FPU"/>
1919       <require Tcompiler="GCC"/>
1920     </condition>
1921     <condition id="CM55_NOFPU_NOMVE_LE_GCC">
1922       <description>Cortex-M55 processor, little endian, no FPU, no MVE, GCC Compiler</description>
1923       <require condition="CM55_NOFPU_NOMVE_GCC"/>
1924       <require Dendian="Little-endian"/>
1925     </condition>
1926     <condition id="CM55_FPU_LE_GCC">
1927       <description>Cortex-M55 processor, little endian, FPU, GCC Compiler</description>
1928       <require condition="CM55_FPU_GCC"/>
1929       <require Dendian="Little-endian"/>
1930     </condition>
1931
1932     <condition id="ARMv8MBL_GCC">
1933       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1934       <require condition="ARMv8MBL"/>
1935       <require Tcompiler="GCC"/>
1936     </condition>
1937     <condition id="ARMv8MBL_LE_GCC">
1938       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1939       <require condition="ARMv8MBL_GCC"/>
1940       <require Dendian="Little-endian"/>
1941     </condition>
1942
1943     <condition id="ARMv8MML_GCC">
1944       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1945       <require condition="ARMv8MML"/>
1946       <require Tcompiler="GCC"/>
1947     </condition>
1948     <condition id="ARMv8MML_LE_GCC">
1949       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1950       <require condition="ARMv8MML_GCC"/>
1951       <require Dendian="Little-endian"/>
1952     </condition>
1953
1954     <condition id="ARMv8MML_FP_GCC">
1955       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1956       <require condition="ARMv8MML_FP"/>
1957       <require Tcompiler="GCC"/>
1958     </condition>
1959     <condition id="ARMv8MML_FP_LE_GCC">
1960       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1961       <require condition="ARMv8MML_FP_GCC"/>
1962       <require Dendian="Little-endian"/>
1963     </condition>
1964
1965     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1966       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1967       <require condition="ARMv8MML_NODSP_NOFPU"/>
1968       <require Tcompiler="GCC"/>
1969     </condition>
1970     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1971       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1972       <require condition="ARMv8MML_DSP_NOFPU"/>
1973       <require Tcompiler="GCC"/>
1974     </condition>
1975     <condition id="ARMv8MML_NODSP_SP_GCC">
1976       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1977       <require condition="ARMv8MML_NODSP_SP"/>
1978       <require Tcompiler="GCC"/>
1979     </condition>
1980     <condition id="ARMv8MML_DSP_SP_GCC">
1981       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1982       <require condition="ARMv8MML_DSP_SP"/>
1983       <require Tcompiler="GCC"/>
1984     </condition>
1985     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1986       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1987       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1988       <require Dendian="Little-endian"/>
1989     </condition>
1990     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1991       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1992       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1993       <require Dendian="Little-endian"/>
1994     </condition>
1995     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1996       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1997       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1998       <require Dendian="Little-endian"/>
1999     </condition>
2000     <condition id="ARMv8MML_DSP_SP_LE_GCC">
2001       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
2002       <require condition="ARMv8MML_DSP_SP_GCC"/>
2003       <require Dendian="Little-endian"/>
2004     </condition>
2005
2006     <!-- IAR compiler -->
2007     <condition id="CA_IAR">
2008       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
2009       <require condition="ARMv7-A Device"/>
2010       <require Tcompiler="IAR"/>
2011     </condition>
2012
2013     <condition id="CM0_IAR">
2014       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
2015       <require condition="CM0"/>
2016       <require Tcompiler="IAR"/>
2017     </condition>
2018     <condition id="CM0_LE_IAR">
2019       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
2020       <require condition="CM0_IAR"/>
2021       <require Dendian="Little-endian"/>
2022     </condition>
2023     <condition id="CM0_BE_IAR">
2024       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
2025       <require condition="CM0_IAR"/>
2026       <require Dendian="Big-endian"/>
2027     </condition>
2028
2029     <condition id="CM1_IAR">
2030       <description>Cortex-M1 based device for the IAR Compiler</description>
2031       <require condition="CM1"/>
2032       <require Tcompiler="IAR"/>
2033     </condition>
2034     <condition id="CM1_LE_IAR">
2035       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
2036       <require condition="CM1_IAR"/>
2037       <require Dendian="Little-endian"/>
2038     </condition>
2039     <condition id="CM1_BE_IAR">
2040       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
2041       <require condition="CM1_IAR"/>
2042       <require Dendian="Big-endian"/>
2043     </condition>
2044
2045     <condition id="CM3_IAR">
2046       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
2047       <require condition="CM3"/>
2048       <require Tcompiler="IAR"/>
2049     </condition>
2050     <condition id="CM3_LE_IAR">
2051       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
2052       <require condition="CM3_IAR"/>
2053       <require Dendian="Little-endian"/>
2054     </condition>
2055     <condition id="CM3_BE_IAR">
2056       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
2057       <require condition="CM3_IAR"/>
2058       <require Dendian="Big-endian"/>
2059     </condition>
2060
2061     <condition id="CM4_IAR">
2062       <description>Cortex-M4 processor based device for the IAR Compiler</description>
2063       <require condition="CM4"/>
2064       <require Tcompiler="IAR"/>
2065     </condition>
2066     <condition id="CM4_LE_IAR">
2067       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
2068       <require condition="CM4_IAR"/>
2069       <require Dendian="Little-endian"/>
2070     </condition>
2071     <condition id="CM4_BE_IAR">
2072       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
2073       <require condition="CM4_IAR"/>
2074       <require Dendian="Big-endian"/>
2075     </condition>
2076
2077     <condition id="CM4_FP_IAR">
2078       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
2079       <require condition="CM4_FP"/>
2080       <require Tcompiler="IAR"/>
2081     </condition>
2082     <condition id="CM4_FP_LE_IAR">
2083       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2084       <require condition="CM4_FP_IAR"/>
2085       <require Dendian="Little-endian"/>
2086     </condition>
2087     <condition id="CM4_FP_BE_IAR">
2088       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2089       <require condition="CM4_FP_IAR"/>
2090       <require Dendian="Big-endian"/>
2091     </condition>
2092
2093     <condition id="CM7_IAR">
2094       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2095       <require condition="CM7"/>
2096       <require Tcompiler="IAR"/>
2097     </condition>
2098     <condition id="CM7_LE_IAR">
2099       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2100       <require condition="CM7_IAR"/>
2101       <require Dendian="Little-endian"/>
2102     </condition>
2103     <condition id="CM7_BE_IAR">
2104       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2105       <require condition="CM7_IAR"/>
2106       <require Dendian="Big-endian"/>
2107     </condition>
2108
2109     <condition id="CM7_FP_IAR">
2110       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2111       <require condition="CM7_FP"/>
2112       <require Tcompiler="IAR"/>
2113     </condition>
2114     <condition id="CM7_FP_LE_IAR">
2115       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2116       <require condition="CM7_FP_IAR"/>
2117       <require Dendian="Little-endian"/>
2118     </condition>
2119     <condition id="CM7_FP_BE_IAR">
2120       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2121       <require condition="CM7_FP_IAR"/>
2122       <require Dendian="Big-endian"/>
2123     </condition>
2124
2125     <condition id="CM7_SP_IAR">
2126       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2127       <require condition="CM7_SP"/>
2128       <require Tcompiler="IAR"/>
2129     </condition>
2130     <condition id="CM7_SP_LE_IAR">
2131       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2132       <require condition="CM7_SP_IAR"/>
2133       <require Dendian="Little-endian"/>
2134     </condition>
2135     <condition id="CM7_SP_BE_IAR">
2136       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2137       <require condition="CM7_SP_IAR"/>
2138       <require Dendian="Big-endian"/>
2139     </condition>
2140
2141     <condition id="CM7_DP_IAR">
2142       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2143       <require condition="CM7_DP"/>
2144       <require Tcompiler="IAR"/>
2145     </condition>
2146     <condition id="CM7_DP_LE_IAR">
2147       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2148       <require condition="CM7_DP_IAR"/>
2149       <require Dendian="Little-endian"/>
2150     </condition>
2151     <condition id="CM7_DP_BE_IAR">
2152       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2153       <require condition="CM7_DP_IAR"/>
2154       <require Dendian="Big-endian"/>
2155     </condition>
2156
2157     <condition id="CM23_IAR">
2158       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2159       <require condition="CM23"/>
2160       <require Tcompiler="IAR"/>
2161     </condition>
2162     <condition id="CM23_LE_IAR">
2163       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2164       <require condition="CM23_IAR"/>
2165       <require Dendian="Little-endian"/>
2166     </condition>
2167
2168     <condition id="CM33_IAR">
2169       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2170       <require condition="CM33"/>
2171       <require Tcompiler="IAR"/>
2172     </condition>
2173     <condition id="CM33_LE_IAR">
2174       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2175       <require condition="CM33_IAR"/>
2176       <require Dendian="Little-endian"/>
2177     </condition>
2178
2179     <condition id="CM33_FP_IAR">
2180       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2181       <require condition="CM33_FP"/>
2182       <require Tcompiler="IAR"/>
2183     </condition>
2184     <condition id="CM33_FP_LE_IAR">
2185       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2186       <require condition="CM33_FP_IAR"/>
2187       <require Dendian="Little-endian"/>
2188     </condition>
2189
2190     <condition id="CM33_NODSP_NOFPU_IAR">
2191       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2192       <require condition="CM33_NODSP_NOFPU"/>
2193       <require Tcompiler="IAR"/>
2194     </condition>
2195     <condition id="CM33_DSP_NOFPU_IAR">
2196       <description>CM33, DSP, no FPU, IAR Compiler</description>
2197       <require condition="CM33_DSP_NOFPU"/>
2198       <require Tcompiler="IAR"/>
2199     </condition>
2200     <condition id="CM33_NODSP_SP_IAR">
2201       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2202       <require condition="CM33_NODSP_SP"/>
2203       <require Tcompiler="IAR"/>
2204     </condition>
2205     <condition id="CM33_DSP_SP_IAR">
2206       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2207       <require condition="CM33_DSP_SP"/>
2208       <require Tcompiler="IAR"/>
2209     </condition>
2210     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2211       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2212       <require condition="CM33_NODSP_NOFPU_IAR"/>
2213       <require Dendian="Little-endian"/>
2214     </condition>
2215     <condition id="CM33_DSP_NOFPU_LE_IAR">
2216       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2217       <require condition="CM33_DSP_NOFPU_IAR"/>
2218       <require Dendian="Little-endian"/>
2219     </condition>
2220     <condition id="CM33_NODSP_SP_LE_IAR">
2221       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2222       <require condition="CM33_NODSP_SP_IAR"/>
2223       <require Dendian="Little-endian"/>
2224     </condition>
2225     <condition id="CM33_DSP_SP_LE_IAR">
2226       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2227       <require condition="CM33_DSP_SP_IAR"/>
2228       <require Dendian="Little-endian"/>
2229     </condition>
2230
2231     <condition id="CM35P_IAR">
2232       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2233       <require condition="CM35P"/>
2234       <require Tcompiler="IAR"/>
2235     </condition>
2236     <condition id="CM35P_LE_IAR">
2237       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2238       <require condition="CM35P_IAR"/>
2239       <require Dendian="Little-endian"/>
2240     </condition>
2241
2242     <condition id="CM35P_FP_IAR">
2243       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2244       <require condition="CM35P_FP"/>
2245       <require Tcompiler="IAR"/>
2246     </condition>
2247     <condition id="CM35P_FP_LE_IAR">
2248       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2249       <require condition="CM35P_FP_IAR"/>
2250       <require Dendian="Little-endian"/>
2251     </condition>
2252
2253     <condition id="CM35P_NODSP_NOFPU_IAR">
2254       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2255       <require condition="CM35P_NODSP_NOFPU"/>
2256       <require Tcompiler="IAR"/>
2257     </condition>
2258     <condition id="CM35P_DSP_NOFPU_IAR">
2259       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2260       <require condition="CM35P_DSP_NOFPU"/>
2261       <require Tcompiler="IAR"/>
2262     </condition>
2263     <condition id="CM35P_NODSP_SP_IAR">
2264       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2265       <require condition="CM35P_NODSP_SP"/>
2266       <require Tcompiler="IAR"/>
2267     </condition>
2268     <condition id="CM35P_DSP_SP_IAR">
2269       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2270       <require condition="CM35P_DSP_SP"/>
2271       <require Tcompiler="IAR"/>
2272     </condition>
2273     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2274       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2275       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2276       <require Dendian="Little-endian"/>
2277     </condition>
2278     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2279       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2280       <require condition="CM35P_DSP_NOFPU_IAR"/>
2281       <require Dendian="Little-endian"/>
2282     </condition>
2283     <condition id="CM35P_NODSP_SP_LE_IAR">
2284       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2285       <require condition="CM35P_NODSP_SP_IAR"/>
2286       <require Dendian="Little-endian"/>
2287     </condition>
2288     <condition id="CM35P_DSP_SP_LE_IAR">
2289       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2290       <require condition="CM35P_DSP_SP_IAR"/>
2291       <require Dendian="Little-endian"/>
2292     </condition>
2293
2294     <condition id="CM55_NOFPU_NOMVE_IAR">
2295       <description>Cortex-M55 processor, no FPU, no MVE, IAR Compiler</description>
2296       <require condition="CM55_NOFPU_NOMVE"/>
2297       <require Tcompiler="IAR"/>
2298     </condition>
2299     <condition id="CM55_NOFPU_MVE_IAR">
2300       <description>Cortex-M55 processor, no FPU, MVE, IAR Compiler</description>
2301       <require condition="CM55_NOFPU_MVE"/>
2302       <require Tcompiler="IAR"/>
2303     </condition>
2304     <condition id="CM55_FPU_IAR">
2305       <description>Cortex-M55 processor, FPU, IAR Compiler</description>
2306       <require condition="CM55_FPU"/>
2307       <require Tcompiler="IAR"/>
2308     </condition>
2309     <condition id="CM55_NOFPU_NOMVE_LE_IAR">
2310       <description>Cortex-M55 processor, little endian, no FPU, no MVE, IAR Compiler</description>
2311       <require condition="CM55_NOFPU_NOMVE_IAR"/>
2312       <require Dendian="Little-endian"/>
2313     </condition>
2314     <condition id="CM55_FPU_LE_IAR">
2315       <description>Cortex-M55 processor, little endian, FPU, IAR Compiler</description>
2316       <require condition="CM55_FPU_IAR"/>
2317       <require Dendian="Little-endian"/>
2318     </condition>
2319
2320     <condition id="ARMv8MBL_IAR">
2321       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2322       <require condition="ARMv8MBL"/>
2323       <require Tcompiler="IAR"/>
2324     </condition>
2325     <condition id="ARMv8MBL_LE_IAR">
2326       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2327       <require condition="ARMv8MBL_IAR"/>
2328       <require Dendian="Little-endian"/>
2329     </condition>
2330
2331     <condition id="ARMv8MML_IAR">
2332       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2333       <require condition="ARMv8MML"/>
2334       <require Tcompiler="IAR"/>
2335     </condition>
2336     <condition id="ARMv8MML_LE_IAR">
2337       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2338       <require condition="ARMv8MML_IAR"/>
2339       <require Dendian="Little-endian"/>
2340     </condition>
2341
2342     <condition id="ARMv8MML_FP_IAR">
2343       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2344       <require condition="ARMv8MML_FP"/>
2345       <require Tcompiler="IAR"/>
2346     </condition>
2347     <condition id="ARMv8MML_FP_LE_IAR">
2348       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2349       <require condition="ARMv8MML_FP_IAR"/>
2350       <require Dendian="Little-endian"/>
2351     </condition>
2352
2353     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2354       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2355       <require condition="ARMv8MML_NODSP_NOFPU"/>
2356       <require Tcompiler="IAR"/>
2357     </condition>
2358     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2359       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2360       <require condition="ARMv8MML_DSP_NOFPU"/>
2361       <require Tcompiler="IAR"/>
2362     </condition>
2363     <condition id="ARMv8MML_NODSP_SP_IAR">
2364       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2365       <require condition="ARMv8MML_NODSP_SP"/>
2366       <require Tcompiler="IAR"/>
2367     </condition>
2368     <condition id="ARMv8MML_DSP_SP_IAR">
2369       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2370       <require condition="ARMv8MML_DSP_SP"/>
2371       <require Tcompiler="IAR"/>
2372     </condition>
2373     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2374       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2375       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2376       <require Dendian="Little-endian"/>
2377     </condition>
2378     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2379       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2380       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2381       <require Dendian="Little-endian"/>
2382     </condition>
2383     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2384       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2385       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2386       <require Dendian="Little-endian"/>
2387     </condition>
2388     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2389       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2390       <require condition="ARMv8MML_DSP_SP_IAR"/>
2391       <require Dendian="Little-endian"/>
2392     </condition>
2393
2394     <!-- conditions selecting single devices and CMSIS Core -->
2395     <condition id="ARMCM0 CMSIS">
2396       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2397       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2398       <require Cclass="CMSIS" Cgroup="CORE"/>
2399     </condition>
2400
2401     <condition id="ARMCM0+ CMSIS">
2402       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2403       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2404       <require Cclass="CMSIS" Cgroup="CORE"/>
2405     </condition>
2406
2407     <condition id="ARMCM1 CMSIS">
2408       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2409       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2410       <require Cclass="CMSIS" Cgroup="CORE"/>
2411     </condition>
2412
2413     <condition id="ARMCM3 CMSIS">
2414       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2415       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2416       <require Cclass="CMSIS" Cgroup="CORE"/>
2417     </condition>
2418
2419     <condition id="ARMCM4 CMSIS">
2420       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2421       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2422       <require Cclass="CMSIS" Cgroup="CORE"/>
2423     </condition>
2424
2425     <condition id="ARMCM7 CMSIS">
2426       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2427       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2428       <require Cclass="CMSIS" Cgroup="CORE"/>
2429     </condition>
2430
2431     <condition id="ARMCM23 CMSIS">
2432       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2433       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2434       <require Cclass="CMSIS" Cgroup="CORE"/>
2435     </condition>
2436
2437     <condition id="ARMCM33 CMSIS">
2438       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2439       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2440       <require Cclass="CMSIS" Cgroup="CORE"/>
2441     </condition>
2442
2443     <condition id="ARMCM35P CMSIS">
2444       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2445       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2446       <require Cclass="CMSIS" Cgroup="CORE"/>
2447     </condition>
2448
2449     <condition id="ARMCM55 CMSIS">
2450       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2451       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2452       <require Cclass="CMSIS" Cgroup="CORE"/>
2453     </condition>
2454
2455     <condition id="ARMSC000 CMSIS">
2456       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2457       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2458       <require Cclass="CMSIS" Cgroup="CORE"/>
2459     </condition>
2460
2461     <condition id="ARMSC300 CMSIS">
2462       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2463       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2464       <require Cclass="CMSIS" Cgroup="CORE"/>
2465     </condition>
2466
2467     <condition id="ARMv8MBL CMSIS">
2468       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2469       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2470       <require Cclass="CMSIS" Cgroup="CORE"/>
2471     </condition>
2472
2473     <condition id="ARMv8MML CMSIS">
2474       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2475       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2476       <require Cclass="CMSIS" Cgroup="CORE"/>
2477     </condition>
2478
2479     <condition id="ARMv81MML CMSIS">
2480       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2481       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2482       <require Cclass="CMSIS" Cgroup="CORE"/>
2483     </condition>
2484
2485     <condition id="ARMCA5 CMSIS">
2486       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2487       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2488       <require Cclass="CMSIS" Cgroup="CORE"/>
2489     </condition>
2490
2491     <condition id="ARMCA7 CMSIS">
2492       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2493       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2494       <require Cclass="CMSIS" Cgroup="CORE"/>
2495     </condition>
2496
2497     <condition id="ARMCA9 CMSIS">
2498       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2499       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2500       <require Cclass="CMSIS" Cgroup="CORE"/>
2501     </condition>
2502
2503     <!-- CMSIS DSP -->
2504     <condition id="CMSIS DSP">
2505       <description>Components required for DSP</description>
2506       <require condition="ARMv6_7_8-M Device"/>
2507       <require condition="ARMCC GCC IAR"/>
2508       <require Cclass="CMSIS" Cgroup="CORE"/>
2509     </condition>
2510
2511     <!-- CMSIS NN -->
2512     <condition id="CMSIS NN">
2513       <description>Components required for NN</description>
2514       <require Cclass="CMSIS" Cgroup="DSP"/>
2515     </condition>
2516
2517     <!-- RTOS RTX -->
2518     <condition id="RTOS RTX">
2519       <description>Components required for RTOS RTX</description>
2520       <require condition="ARMv6_7-M Device"/>
2521       <require condition="ARMCC GCC IAR"/>
2522       <require Cclass="Device" Cgroup="Startup"/>
2523       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2524     </condition>
2525     <condition id="RTOS RTX IFX">
2526       <description>Components required for RTOS RTX IFX</description>
2527       <require condition="ARMv6_7-M Device"/>
2528       <require condition="ARMCC GCC IAR"/>
2529       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2530       <require Cclass="Device" Cgroup="Startup"/>
2531       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2532     </condition>
2533     <condition id="RTOS RTX5">
2534       <description>Components required for RTOS RTX5</description>
2535       <require condition="ARMv6_7_8-M Device"/>
2536       <require condition="ARMCC GCC IAR"/>
2537       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2538     </condition>
2539     <condition id="RTOS2 RTX5">
2540       <description>Components required for RTOS2 RTX5</description>
2541       <require condition="ARMv6_7_8-M Device"/>
2542       <require condition="ARMCC GCC IAR"/>
2543       <require Cclass="CMSIS"  Cgroup="CORE"/>
2544       <require Cclass="Device" Cgroup="Startup"/>
2545     </condition>
2546     <condition id="RTOS2 RTX5 v7-A">
2547       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2548       <require condition="ARMv7-A Device"/>
2549       <require condition="ARMCC GCC IAR"/>
2550       <require Cclass="CMSIS"  Cgroup="CORE"/>
2551       <require Cclass="Device" Cgroup="Startup"/>
2552       <require Cclass="Device" Cgroup="OS Tick"/>
2553       <require Cclass="Device" Cgroup="IRQ Controller"/>
2554     </condition>
2555     <condition id="RTOS2 RTX5 NS">
2556       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2557       <require condition="ARMv8-M Device"/>
2558       <require condition="TZ Non-secure"/>
2559       <require condition="ARMCC GCC IAR"/>
2560       <require Cclass="CMSIS"  Cgroup="CORE"/>
2561       <require Cclass="Device" Cgroup="Startup"/>
2562     </condition>
2563
2564     <!-- OS Tick -->
2565     <condition id="OS Tick PTIM">
2566       <description>Components required for OS Tick Private Timer</description>
2567       <require condition="CA5_CA9"/>
2568       <require Cclass="Device" Cgroup="IRQ Controller"/>
2569     </condition>
2570
2571     <condition id="OS Tick GTIM">
2572       <description>Components required for OS Tick Generic Physical Timer</description>
2573       <require condition="CA7"/>
2574       <require Cclass="Device" Cgroup="IRQ Controller"/>
2575     </condition>
2576
2577   </conditions>
2578
2579   <components>
2580     <!-- CMSIS-Core component -->
2581     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.4.0"  condition="ARMv6_7_8-M Device" >
2582       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2583       <files>
2584         <!-- CPU independent -->
2585         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2586         <file category="include" name="CMSIS/Core/Include/"/>
2587         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
2588         <!-- Code template -->
2589         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2590         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2591       </files>
2592     </component>
2593
2594     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.2.0"  condition="ARMv7-A Device" >
2595       <description>CMSIS-CORE for Cortex-A</description>
2596       <files>
2597         <!-- CPU independent -->
2598         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2599         <file category="include" name="CMSIS/Core_A/Include/"/>
2600       </files>
2601     </component>
2602
2603     <!-- CMSIS-Startup components -->
2604     <!-- Cortex-M0 -->
2605     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS">
2606       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2607       <files>
2608         <!-- include folder / device header file -->
2609         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2610         <!-- startup / system file -->
2611         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
2612         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2613         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2614         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2615         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2616       </files>
2617     </component>
2618     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2619       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2620       <files>
2621         <!-- include folder / device header file -->
2622         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2623         <!-- startup / system file -->
2624         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2625         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.0.1" attr="config" condition="GCC"/>
2626         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2627         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2628         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2629       </files>
2630     </component>
2631
2632     <!-- Cortex-M0+ -->
2633     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS">
2634       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2635       <files>
2636         <!-- include folder / device header file -->
2637         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2638         <!-- startup / system file -->
2639         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
2640         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2641         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2642         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2643         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2644       </files>
2645     </component>
2646     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0+ CMSIS">
2647       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2648       <files>
2649         <!-- include folder / device header file -->
2650         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2651         <!-- startup / system file -->
2652         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2653         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.0.1" attr="config" condition="GCC"/>
2654         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2655         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2656         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2657       </files>
2658     </component>
2659
2660     <!-- Cortex-M1 -->
2661     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS">
2662       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2663       <files>
2664         <!-- include folder / device header file -->
2665         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2666         <!-- startup / system file -->
2667         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
2668         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2669         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2670         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2671         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2672       </files>
2673     </component>
2674     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2675       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2676       <files>
2677         <!-- include folder / device header file -->
2678         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2679         <!-- startup / system file -->
2680         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2681         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.0.1" attr="config" condition="GCC"/>
2682         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2683         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2684         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2685       </files>
2686     </component>
2687
2688     <!-- Cortex-M3 -->
2689     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS">
2690       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2691       <files>
2692         <!-- include folder / device header file -->
2693         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2694         <!-- startup / system file -->
2695         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
2696         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2697         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2698         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2699         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2700       </files>
2701     </component>
2702     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2703       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2704       <files>
2705         <!-- include folder / device header file -->
2706         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2707         <!-- startup / system file -->
2708         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2709         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.0.1" attr="config" condition="GCC"/>
2710         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2711         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2712         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2713       </files>
2714     </component>
2715
2716     <!-- Cortex-M4 -->
2717     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS">
2718       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2719       <files>
2720         <!-- include folder / device header file -->
2721         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2722         <!-- startup / system file -->
2723         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
2724         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2725         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2726         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2727        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2728       </files>
2729     </component>
2730     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2731       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2732       <files>
2733         <!-- include folder / device header file -->
2734         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2735         <!-- startup / system file -->
2736         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2737         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.0.1" attr="config" condition="GCC"/>
2738         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2739         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2740         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2741       </files>
2742     </component>
2743
2744     <!-- Cortex-M7 -->
2745     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS">
2746       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2747       <files>
2748         <!-- include folder / device header file -->
2749         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2750         <!-- startup / system file -->
2751         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
2752         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2753         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2754         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2755         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2756       </files>
2757     </component>
2758     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2759       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2760       <files>
2761         <!-- include folder / device header file -->
2762         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2763         <!-- startup / system file -->
2764         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2765         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.0.1" attr="config" condition="GCC"/>
2766         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2767         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2768         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2769       </files>
2770     </component>
2771
2772     <!-- Cortex-M23 -->
2773     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM23 CMSIS">
2774       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2775       <files>
2776         <!-- include folder / device header file -->
2777         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2778         <!-- startup / system file -->
2779         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.3" attr="config"/>
2780         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
2781         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2782         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2783         <!-- SAU configuration -->
2784         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2785       </files>
2786     </component>
2787     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM23 CMSIS">
2788       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2789       <files>
2790         <!-- include folder / device header file -->
2791         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2792         <!-- startup / system file -->
2793         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.1" attr="config" condition="ARMCC"/>
2794         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.0.1" attr="config" condition="GCC"/>
2795         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.0.0" attr="config" condition="GCC"/>
2796         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2797         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2798         <!-- SAU configuration -->
2799         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2800       </files>
2801     </component>
2802
2803     <!-- Cortex-M33 -->
2804     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM33 CMSIS">
2805       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2806       <files>
2807         <!-- include folder / device header file -->
2808         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2809         <!-- startup / system file -->
2810         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.3" attr="config"/>
2811         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2812         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2813         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2814         <!-- SAU configuration -->
2815         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2816       </files>
2817     </component>
2818     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM33 CMSIS">
2819       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2820       <files>
2821         <!-- include folder / device header file -->
2822         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2823         <!-- startup / system file -->
2824         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2825         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.0.1" attr="config" condition="GCC"/>
2826         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2827         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2828         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2829         <!-- SAU configuration -->
2830         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2831       </files>
2832     </component>
2833
2834     <!-- Cortex-M35P -->
2835     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM35P CMSIS">
2836       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2837       <files>
2838         <!-- include folder / device header file -->
2839         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2840         <!-- startup / system file -->
2841         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.3" attr="config"/>
2842         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2843         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2844         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2845         <!-- SAU configuration -->
2846         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2847       </files>
2848     </component>
2849     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM35P CMSIS">
2850       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2851       <files>
2852         <!-- include folder / device header file -->
2853         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2854         <!-- startup / system file -->
2855         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2856         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.1" attr="config" condition="GCC"/>
2857         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2858         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
2859         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2860         <!-- SAU configuration -->
2861         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2862       </files>
2863     </component>
2864
2865     <!-- Cortex-M55 -->
2866     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM55 CMSIS">
2867       <description>System and Startup for Generic Cortex-M55 device</description>
2868       <files>
2869         <!-- include folder / device header file -->
2870         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2871         <!-- startup / system file -->
2872         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.0.0" attr="config"/>
2873         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2874         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2875         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.0.0" attr="config"/>
2876         <!-- SAU configuration -->
2877         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2878       </files>
2879     </component>
2880
2881     <!-- Cortex-SC000 -->
2882     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS">
2883       <description>System and Startup for Generic Arm SC000 device</description>
2884       <files>
2885         <!-- include folder / device header file -->
2886         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2887         <!-- startup / system file -->
2888         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
2889         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2890         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2891         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2892         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2893       </files>
2894     </component>
2895     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2896       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2897       <files>
2898         <!-- include folder / device header file -->
2899         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2900         <!-- startup / system file -->
2901         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2902         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.0.1" attr="config" condition="GCC"/>
2903         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2904         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2905         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2906       </files>
2907     </component>
2908
2909     <!-- Cortex-SC300 -->
2910     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS">
2911       <description>System and Startup for Generic Arm SC300 device</description>
2912       <files>
2913         <!-- include folder / device header file -->
2914         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2915         <!-- startup / system file -->
2916         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
2917         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2918         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2919         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2920         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2921       </files>
2922     </component>
2923     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2924       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2925       <files>
2926         <!-- include folder / device header file -->
2927         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2928         <!-- startup / system file -->
2929         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2930         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.0.1" attr="config" condition="GCC"/>
2931         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2932         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2933         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2934       </files>
2935     </component>
2936
2937     <!-- ARMv8MBL -->
2938     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMv8MBL CMSIS">
2939       <description>System and Startup for Generic Armv8-M Baseline device</description>
2940       <files>
2941         <!-- include folder / device header file -->
2942         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2943         <!-- startup / system file -->
2944         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.3" attr="config"/>
2945         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
2946         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2947         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2948         <!-- SAU configuration -->
2949         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2950       </files>
2951     </component>
2952     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMv8MBL CMSIS">
2953       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2954       <files>
2955         <!-- include folder / device header file -->
2956         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2957         <!-- startup / system file -->
2958         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.1" attr="config" condition="ARMCC"/>
2959         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.0.1" attr="config" condition="GCC"/>
2960         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2961         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2962         <!-- SAU configuration -->
2963         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2964       </files>
2965     </component>
2966
2967     <!-- ARMv8MML -->
2968     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMv8MML CMSIS">
2969       <description>System and Startup for Generic Armv8-M Mainline device</description>
2970       <files>
2971         <!-- include folder / device header file -->
2972         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2973         <!-- startup / system file -->
2974         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.3" attr="config"/>
2975         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2976         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2977         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2978         <!-- SAU configuration -->
2979         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2980       </files>
2981     </component>
2982     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMv8MML CMSIS">
2983       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2984       <files>
2985         <!-- include folder / device header file -->
2986         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2987         <!-- startup / system file -->
2988         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2989         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.0.1" attr="config" condition="GCC"/>
2990         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2991         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2992         <!-- SAU configuration -->
2993         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2994       </files>
2995     </component>
2996
2997     <!-- ARMv81MML -->
2998     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.1" condition="ARMv81MML CMSIS">
2999       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
3000       <files>
3001         <!-- include folder / device header file -->
3002         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
3003         <!-- startup / system file -->
3004         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.3" attr="config"/>
3005         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
3006         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.0.1" attr="config" condition="GCC"/>
3007         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
3008         <!-- SAU configuration -->
3009         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
3010       </files>
3011     </component>
3012
3013     <!-- Cortex-A5 -->
3014     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
3015       <description>System and Startup for Generic Arm Cortex-A5 device</description>
3016       <files>
3017         <!-- include folder / device header file -->
3018         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
3019         <!-- startup / system / mmu files -->
3020         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3021         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3022         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3023         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3024         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
3025         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
3026         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
3027         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
3028         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
3029         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
3030         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
3031         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
3032
3033       </files>
3034     </component>
3035
3036     <!-- Cortex-A7 -->
3037     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
3038       <description>System and Startup for Generic Arm Cortex-A7 device</description>
3039       <files>
3040         <!-- include folder / device header file -->
3041         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
3042         <!-- startup / system / mmu files -->
3043         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3044         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3045         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3046         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3047         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
3048         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
3049         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
3050         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
3051         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
3052         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
3053         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
3054         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
3055       </files>
3056     </component>
3057
3058     <!-- Cortex-A9 -->
3059     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
3060       <description>System and Startup for Generic Arm Cortex-A9 device</description>
3061       <files>
3062         <!-- include folder / device header file -->
3063         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3064         <!-- startup / system / mmu files -->
3065         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3066         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3067         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3068         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3069         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3070         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3071         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3072         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3073         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
3074         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
3075         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
3076         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
3077       </files>
3078     </component>
3079
3080     <!-- IRQ Controller -->
3081     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3082       <description>IRQ Controller implementation using GIC</description>
3083       <files>
3084         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3085       </files>
3086     </component>
3087
3088     <!-- OS Tick -->
3089     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3090       <description>OS Tick implementation using Private Timer</description>
3091       <files>
3092         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3093       </files>
3094     </component>
3095
3096     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3097       <description>OS Tick implementation using Generic Physical Timer</description>
3098       <files>
3099         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3100       </files>
3101     </component>
3102
3103     <!-- CMSIS-DSP component -->
3104     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.8.0" condition="CMSIS DSP">
3105       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3106       <files>
3107         <!-- CPU independent -->
3108         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3109         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3110
3111         <!-- CPU and Compiler dependent -->
3112         <!-- ARMCC -->
3113         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3114         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3115         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3116         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3117         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3118         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3119         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3120         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3121         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3122         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3123         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3124         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3125         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3126         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3127         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3128         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3129
3130         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3131         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3132         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3133         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3134         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3135         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3136         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3137         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3138         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3139         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3140         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3141         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3142         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3143         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3144         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3145         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3146
3147         <!-- GCC -->
3148         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3149         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3150         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3151         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3152         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3153         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3154         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3155         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3156
3157         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3158         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3159         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3160         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3161         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3162         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3163         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3164         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3165         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3166         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3167         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3168         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3169         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3170         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3171         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3172         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3173
3174         <!-- IAR -->
3175         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3176         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3177         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3178         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3179         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3180         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3181         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3182         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3183         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3184         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3185         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3186         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3187         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3188         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3189         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3190         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3191
3192         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3193         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3194         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3195         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3196         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3197         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3198         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3199         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3200         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3201         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3202         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3203         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3204         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3205         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3206         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3207         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3208
3209       </files>
3210     </component>
3211     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.8.0" isDefaultVariant="true" condition="CMSIS DSP">
3212       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3213       <files>
3214         <!-- CPU independent -->
3215         <file category="doc"      name="CMSIS/Documentation/DSP/html/index.html"/>
3216         <file category="header"   name="CMSIS/DSP/Include/arm_math.h"/>
3217         <file category="include"  name="CMSIS/DSP/PrivateInclude/"/>
3218
3219         <!-- DSP sources (core) -->
3220         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3221         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
3222         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3223         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3224         <file category="source"   name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3225         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
3226         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3227         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3228         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3229         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3230         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3231         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
3232         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3233
3234         <!-- Compute Library for Cortex-A -->
3235         <file category="header"   name="CMSIS/DSP/ComputeLibrary/Include/NEMath.h"        condition="ARMv7-A Device"/>
3236         <file category="source"   name="CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c"  condition="ARMv7-A Device"/>
3237       </files>
3238     </component>
3239
3240     <!-- CMSIS-NN component -->
3241     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.3.0" condition="CMSIS NN">
3242       <description>CMSIS-NN Neural Network Library</description>
3243       <files>
3244         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3245         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3246         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
3247         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
3248
3249         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3250         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3251         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3252         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
3253         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
3254         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
3255         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c"/>
3256         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3257         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3258         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3259         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
3260         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
3261         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
3262         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
3263         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
3264         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
3265         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3266         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3267         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
3268         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3269         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3270         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
3271         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3272         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3273         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
3274         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
3275         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
3276         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
3277         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8_opt.c"/>
3278         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
3279         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
3280         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3281         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
3282         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
3283         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
3284         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3285         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3286         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3287         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3288         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
3289         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3290         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3291         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
3292         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
3293         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
3294         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
3295         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
3296         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
3297         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3298         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3299         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
3300         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3301         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
3302         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
3303         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3304         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3305         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3306         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3307         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3308         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3309         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3310         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
3311         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
3312         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3313         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
3314       </files>
3315     </component>
3316
3317     <!-- CMSIS-RTOS Keil RTX component -->
3318     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3319       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3320       <RTE_Components_h>
3321         <!-- the following content goes into file 'RTE_Components.h' -->
3322         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3323         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3324       </RTE_Components_h>
3325       <files>
3326         <!-- CPU independent -->
3327         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3328         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3329         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3330
3331         <!-- RTX templates -->
3332         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3333         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3334         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3335         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3336         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3337         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3338         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3339         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3340         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3341         <!-- tool-chain specific template file -->
3342         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3343         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3344         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3345
3346         <!-- CPU and Compiler dependent -->
3347         <!-- ARMCC -->
3348         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3349         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3350         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3351         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3352         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3353         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3354         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3355         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3356         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3357         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3358         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3359         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3360         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3361         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3362         <!-- GCC -->
3363         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3364         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3365         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3366         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3367         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3368         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3369         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3370         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3371         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3372         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3373         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3374         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3375         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3376         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3377         <!-- IAR -->
3378         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3379         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3380         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3381         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3382         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3383         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3384         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3385         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3386         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3387         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3388         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3389         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3390         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3391         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3392       </files>
3393     </component>
3394     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3395     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3396       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3397       <RTE_Components_h>
3398         <!-- the following content goes into file 'RTE_Components.h' -->
3399         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3400         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3401       </RTE_Components_h>
3402       <files>
3403         <!-- CPU independent -->
3404         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3405         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3406         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3407
3408         <!-- RTX templates -->
3409         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3410         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3411         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3412         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3413         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3414         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3415         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3416         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3417         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3418         <!-- tool-chain specific template file -->
3419         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3420         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3421         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3422
3423         <!-- CPU and Compiler dependent -->
3424         <!-- ARMCC -->
3425         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3426         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3427         <!-- GCC -->
3428         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3429         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3430         <!-- IAR -->
3431       </files>
3432     </component>
3433
3434     <!-- CMSIS-RTOS Keil RTX5 component -->
3435     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.2" Capiversion="1.0.0" condition="RTOS RTX5">
3436       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3437       <RTE_Components_h>
3438         <!-- the following content goes into file 'RTE_Components.h' -->
3439         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3440         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3441       </RTE_Components_h>
3442       <files>
3443         <!-- RTX header file -->
3444         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3445         <!-- RTX compatibility module for API V1 -->
3446         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3447       </files>
3448     </component>
3449
3450     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3451     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3452       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
3453       <RTE_Components_h>
3454         <!-- the following content goes into file 'RTE_Components.h' -->
3455         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3456         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3457       </RTE_Components_h>
3458       <files>
3459         <!-- RTX documentation -->
3460         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3461
3462         <!-- RTX header files -->
3463         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3464
3465         <!-- RTX configuration -->
3466         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3467         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3468
3469         <!-- RTX templates -->
3470         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3471         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3472         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3473         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3474         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3475         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3476         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3477         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3478         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3479         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3480
3481         <!-- RTX library configuration -->
3482         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3483
3484         <!-- RTX libraries (CPU and Compiler dependent) -->
3485         <!-- ARMCC -->
3486         <file category="library" condition="CM0_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3487         <file category="library" condition="CM1_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3488         <file category="library" condition="CM3_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3489         <file category="library" condition="CM4_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3490         <file category="library" condition="CM4_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3491         <file category="library" condition="CM7_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3492         <file category="library" condition="CM7_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3493         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3494         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3495         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3496         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3497         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3498         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3499         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3500         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3501         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3502         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3503         <!-- GCC -->
3504         <file category="library" condition="CM0_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3505         <file category="library" condition="CM1_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3506         <file category="library" condition="CM3_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3507         <file category="library" condition="CM4_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3508         <file category="library" condition="CM4_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3509         <file category="library" condition="CM7_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3510         <file category="library" condition="CM7_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3511         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3512         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3513         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3514         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3515         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3516         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3517         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3518         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3519         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3520         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3521         <!-- IAR -->
3522         <file category="library" condition="CM0_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3523         <file category="library" condition="CM1_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3524         <file category="library" condition="CM3_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3525         <file category="library" condition="CM4_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3526         <file category="library" condition="CM4_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3527         <file category="library" condition="CM7_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3528         <file category="library" condition="CM7_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3529         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3530         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3531         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3532         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3533         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3534         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3535         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3536         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3537         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3538         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3539       </files>
3540     </component>
3541     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3542       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
3543       <RTE_Components_h>
3544         <!-- the following content goes into file 'RTE_Components.h' -->
3545         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3546         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3547         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3548       </RTE_Components_h>
3549       <files>
3550         <!-- RTX documentation -->
3551         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3552
3553         <!-- RTX header files -->
3554         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3555
3556         <!-- RTX configuration -->
3557         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3558         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3559
3560         <!-- RTX templates -->
3561         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3562         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3563         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3564         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3565         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3566         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3567         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3568         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3569         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3570         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3571
3572         <!-- RTX library configuration -->
3573         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3574
3575         <!-- RTX libraries (CPU and Compiler dependent) -->
3576         <!-- ARMCC -->
3577         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3578         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3579         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3580         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3581         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3582         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3583         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3584         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3585         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3586         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3587         <!-- GCC -->
3588         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3589         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3590         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3591         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3592         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3593         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3594         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3595         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3596         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3597         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3598         <!-- IAR -->
3599         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3600         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3601         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3602         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3603         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3604         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3605         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3606         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3607         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3608         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3609       </files>
3610     </component>
3611     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3612       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
3613       <RTE_Components_h>
3614         <!-- the following content goes into file 'RTE_Components.h' -->
3615         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3616         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3617         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3618       </RTE_Components_h>
3619       <files>
3620         <!-- RTX documentation -->
3621         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3622
3623         <!-- RTX header files -->
3624         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3625
3626         <!-- RTX configuration -->
3627         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3628         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3629
3630         <!-- RTX templates -->
3631         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3632         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3633         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3634         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3635         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3636         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3637         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3638         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3639         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3640         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3641
3642         <!-- RTX sources (core) -->
3643         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3644         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3645         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3646         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3647         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3648         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3649         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3650         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3651         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3652         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3653         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3654         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3655         <!-- RTX sources (library configuration) -->
3656         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3657         <!-- RTX sources (handlers ARMCC) -->
3658         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"      condition="CM0_ARMCC"/>
3659         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"      condition="CM1_ARMCC"/>
3660         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM3_ARMCC"/>
3661         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM4_ARMCC"/>
3662         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"     condition="CM4_FP_ARMCC"/>
3663         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM7_ARMCC"/>
3664         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"     condition="CM7_FP_ARMCC"/>
3665         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
3666         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
3667         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
3668         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM35P_ARMCC"/>
3669         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM35P_FP_ARMCC"/>
3670         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3671         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3672         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3673         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
3674         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
3675         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
3676         <!-- RTX sources (handlers GCC) -->
3677         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"      condition="CM0_GCC"/>
3678         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"      condition="CM1_GCC"/>
3679         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM3_GCC"/>
3680         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM4_GCC"/>
3681         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"     condition="CM4_FP_GCC"/>
3682         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM7_GCC"/>
3683         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"     condition="CM7_FP_GCC"/>
3684         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3685         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3686         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3687         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3688         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3689         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3690         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3691         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3692         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3693         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3694         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3695         <!-- RTX sources (handlers IAR) -->
3696         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"      condition="CM0_IAR"/>
3697         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"      condition="CM1_IAR"/>
3698         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM3_IAR"/>
3699         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM4_IAR"/>
3700         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"     condition="CM4_FP_IAR"/>
3701         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM7_IAR"/>
3702         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"     condition="CM7_FP_IAR"/>
3703         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3704         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3705         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3706         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3707         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3708         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3709         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3710         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3711         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3712         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3713         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3714         <!-- OS Tick (SysTick) -->
3715         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3716       </files>
3717     </component>
3718     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3719       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3720       <RTE_Components_h>
3721         <!-- the following content goes into file 'RTE_Components.h' -->
3722         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3723         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3724         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3725       </RTE_Components_h>
3726       <files>
3727         <!-- RTX documentation -->
3728         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3729
3730         <!-- RTX header files -->
3731         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3732
3733         <!-- RTX configuration -->
3734         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3735         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3736
3737         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3738
3739         <!-- RTX templates -->
3740         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3741         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3742         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3743         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3744         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3745         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3746         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3747         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3748         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3749         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3750
3751         <!-- RTX sources (core) -->
3752         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3753         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3754         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3755         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3756         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3757         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3758         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3759         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3760         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3761         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3762         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3763         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3764         <!-- RTX sources (library configuration) -->
3765         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3766         <!-- RTX sources (handlers ARMCC) -->
3767         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3768         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3769         <!-- RTX sources (handlers GCC) -->
3770         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3771         <!-- RTX sources (handlers IAR) -->
3772         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3773       </files>
3774     </component>
3775     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3776       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
3777       <RTE_Components_h>
3778         <!-- the following content goes into file 'RTE_Components.h' -->
3779         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3780         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3781         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3782         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3783       </RTE_Components_h>
3784       <files>
3785         <!-- RTX documentation -->
3786         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3787
3788         <!-- RTX header files -->
3789         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3790
3791         <!-- RTX configuration -->
3792         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3793         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3794
3795         <!-- RTX templates -->
3796         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3797         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3798         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3799         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3800         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3801         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3802         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3803         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3804         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3805         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3806
3807         <!-- RTX sources (core) -->
3808         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3809         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3810         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3811         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3812         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3813         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3814         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3815         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3816         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3817         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3818         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3819         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3820         <!-- RTX sources (library configuration) -->
3821         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3822         <!-- RTX sources (ARMCC handlers) -->
3823         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
3824         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
3825         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
3826         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM35P_ARMCC"/>
3827         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM35P_FP_ARMCC"/>
3828         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_NOMVE_ARMCC"/>
3829         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_MVE_ARMCC"/>
3830         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_FPU_ARMCC"/>
3831         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
3832         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
3833         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
3834         <!-- RTX sources (GCC handlers) -->
3835         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3836         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3837         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_FP_GCC"/>
3838         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3839         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_FP_GCC"/>
3840         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_NOMVE_GCC"/>
3841         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_MVE_GCC"/>
3842         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_FPU_GCC"/>
3843         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3844         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3845         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_FP_GCC"/>
3846         <!-- RTX sources (IAR handlers) -->
3847         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="CM23_IAR"/>
3848         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_IAR"/>
3849         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_FP_IAR"/>
3850         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM35P_IAR"/>
3851         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM35P_FP_IAR"/>
3852         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3853         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_NOFPU_MVE_IAR"/>
3854         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_FPU_IAR"/>
3855         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="ARMv8MBL_IAR"/>
3856         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_IAR"/>
3857         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_FP_IAR"/>
3858         <!-- OS Tick (SysTick) -->
3859         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3860       </files>
3861     </component>
3862
3863     <!-- CMSIS-Driver Custom components -->
3864     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3865       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3866       <files>
3867         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3868         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3869       </files>
3870     </component>
3871     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3872       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3873       <files>
3874         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3875         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3876       </files>
3877     </component>
3878     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3879       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3880       <files>
3881         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3882         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3883       </files>
3884     </component>
3885     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3886       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3887       <files>
3888         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3889         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3890       </files>
3891     </component>
3892     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3893       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3894       <files>
3895         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3896         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3897       </files>
3898     </component>
3899     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3900       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3901       <files>
3902         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3903         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3904       </files>
3905     </component>
3906     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3907       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3908       <files>
3909         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3910         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3911       </files>
3912     </component>
3913     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3914       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3915       <files>
3916         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3917         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
3918       </files>
3919     </component>
3920     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3921       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3922       <files>
3923         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3924         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3925         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3926         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3927       </files>
3928     </component>
3929     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3930       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3931       <files>
3932         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3933         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3934       </files>
3935     </component>
3936     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3937       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3938       <files>
3939         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3940         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3941       </files>
3942     </component>
3943     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3944       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3945       <files>
3946         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3947         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3948       </files>
3949     </component>
3950     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3951       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3952       <files>
3953         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3954         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3955       </files>
3956     </component>
3957     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3958       <description>Access to #include Driver_WiFi.h file</description>
3959       <files>
3960         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3961         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
3962       </files>
3963     </component>
3964
3965     <!-- VIO components -->
3966     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
3967       <description>Virtual I/O custom implementation template</description>
3968       <files>
3969         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
3970       </files>
3971     </component>
3972     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
3973       <description>Virtual I/O implementation using memory only</description>
3974       <files>
3975         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
3976       </files>
3977     </component>
3978
3979   </components>
3980
3981   <boards>
3982     <board name="uVision Simulator" vendor="Keil">
3983       <description>uVision Simulator</description>
3984       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3985       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3986       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3987       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3988       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3989       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3990       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3991       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3992       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3993       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3994       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3995       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3996       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3997       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3998       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
3999       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
4000       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
4001       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
4002       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
4003       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
4004       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
4005       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
4006       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
4007       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
4008       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
4009       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
4010     </board>
4011
4012     <board name="EWARM Simulator" vendor="IAR">
4013       <description>EWARM Simulator</description>
4014       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
4015       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
4016       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
4017       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
4018       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
4019       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
4020       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
4021       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
4022       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
4023       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
4024       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
4025       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
4026       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
4027       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
4028       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
4029       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
4030       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
4031       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
4032       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
4033       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
4034       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
4035       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
4036       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
4037       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
4038       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
4039       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
4040     </board>
4041   </boards>
4042
4043   <examples>
4044     <example name="DSP_Lib Bayes example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_bayes_example">
4045       <description>DSP_Lib Bayes example</description>
4046       <board name="uVision Simulator" vendor="Keil"/>
4047       <project>
4048         <environment name="uv" load="arm_bayes_example.uvprojx"/>
4049       </project>
4050       <attributes>
4051         <component Cclass="CMSIS" Cgroup="CORE"/>
4052         <component Cclass="CMSIS" Cgroup="DSP"/>
4053         <component Cclass="Device" Cgroup="Startup"/>
4054         <category>Getting Started</category>
4055       </attributes>
4056     </example>
4057
4058     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
4059       <description>DSP_Lib Class Marks example</description>
4060       <board name="uVision Simulator" vendor="Keil"/>
4061       <project>
4062         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
4063       </project>
4064       <attributes>
4065         <component Cclass="CMSIS" Cgroup="CORE"/>
4066         <component Cclass="CMSIS" Cgroup="DSP"/>
4067         <component Cclass="Device" Cgroup="Startup"/>
4068         <category>Getting Started</category>
4069       </attributes>
4070     </example>
4071
4072     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
4073       <description>DSP_Lib Convolution example</description>
4074       <board name="uVision Simulator" vendor="Keil"/>
4075       <project>
4076         <environment name="uv" load="arm_convolution_example.uvprojx"/>
4077       </project>
4078       <attributes>
4079         <component Cclass="CMSIS" Cgroup="CORE"/>
4080         <component Cclass="CMSIS" Cgroup="DSP"/>
4081         <component Cclass="Device" Cgroup="Startup"/>
4082         <category>Getting Started</category>
4083       </attributes>
4084     </example>
4085
4086     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
4087       <description>DSP_Lib Dotproduct example</description>
4088       <board name="uVision Simulator" vendor="Keil"/>
4089       <project>
4090         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
4091       </project>
4092       <attributes>
4093         <component Cclass="CMSIS" Cgroup="CORE"/>
4094         <component Cclass="CMSIS" Cgroup="DSP"/>
4095         <component Cclass="Device" Cgroup="Startup"/>
4096         <category>Getting Started</category>
4097       </attributes>
4098     </example>
4099
4100     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
4101       <description>DSP_Lib FFT Bin example</description>
4102       <board name="uVision Simulator" vendor="Keil"/>
4103       <project>
4104         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
4105       </project>
4106       <attributes>
4107         <component Cclass="CMSIS" Cgroup="CORE"/>
4108         <component Cclass="CMSIS" Cgroup="DSP"/>
4109         <component Cclass="Device" Cgroup="Startup"/>
4110         <category>Getting Started</category>
4111       </attributes>
4112     </example>
4113
4114     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
4115       <description>DSP_Lib FIR example</description>
4116       <board name="uVision Simulator" vendor="Keil"/>
4117       <project>
4118         <environment name="uv" load="arm_fir_example.uvprojx"/>
4119       </project>
4120       <attributes>
4121         <component Cclass="CMSIS" Cgroup="CORE"/>
4122         <component Cclass="CMSIS" Cgroup="DSP"/>
4123         <component Cclass="Device" Cgroup="Startup"/>
4124         <category>Getting Started</category>
4125       </attributes>
4126     </example>
4127
4128     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
4129       <description>DSP_Lib Graphic Equalizer example</description>
4130       <board name="uVision Simulator" vendor="Keil"/>
4131       <project>
4132         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
4133       </project>
4134       <attributes>
4135         <component Cclass="CMSIS" Cgroup="CORE"/>
4136         <component Cclass="CMSIS" Cgroup="DSP"/>
4137         <component Cclass="Device" Cgroup="Startup"/>
4138         <category>Getting Started</category>
4139       </attributes>
4140     </example>
4141
4142     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4143       <description>DSP_Lib Linear Interpolation example</description>
4144       <board name="uVision Simulator" vendor="Keil"/>
4145       <project>
4146         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4147       </project>
4148       <attributes>
4149         <component Cclass="CMSIS" Cgroup="CORE"/>
4150         <component Cclass="CMSIS" Cgroup="DSP"/>
4151         <component Cclass="Device" Cgroup="Startup"/>
4152         <category>Getting Started</category>
4153       </attributes>
4154     </example>
4155
4156     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4157       <description>DSP_Lib Matrix example</description>
4158       <board name="uVision Simulator" vendor="Keil"/>
4159       <project>
4160         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4161       </project>
4162       <attributes>
4163         <component Cclass="CMSIS" Cgroup="CORE"/>
4164         <component Cclass="CMSIS" Cgroup="DSP"/>
4165         <component Cclass="Device" Cgroup="Startup"/>
4166         <category>Getting Started</category>
4167       </attributes>
4168     </example>
4169
4170     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4171       <description>DSP_Lib Signal Convergence example</description>
4172       <board name="uVision Simulator" vendor="Keil"/>
4173       <project>
4174         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4175       </project>
4176       <attributes>
4177         <component Cclass="CMSIS" Cgroup="CORE"/>
4178         <component Cclass="CMSIS" Cgroup="DSP"/>
4179         <component Cclass="Device" Cgroup="Startup"/>
4180         <category>Getting Started</category>
4181       </attributes>
4182     </example>
4183
4184     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4185       <description>DSP_Lib Sinus/Cosinus example</description>
4186       <board name="uVision Simulator" vendor="Keil"/>
4187       <project>
4188         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4189       </project>
4190       <attributes>
4191         <component Cclass="CMSIS" Cgroup="CORE"/>
4192         <component Cclass="CMSIS" Cgroup="DSP"/>
4193         <component Cclass="Device" Cgroup="Startup"/>
4194         <category>Getting Started</category>
4195       </attributes>
4196     </example>
4197
4198     <example name="DSP_Lib SVM example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_svm_example">
4199       <description>DSP_Lib SVM example</description>
4200       <board name="uVision Simulator" vendor="Keil"/>
4201       <project>
4202         <environment name="uv" load="arm_svm_example.uvprojx"/>
4203       </project>
4204       <attributes>
4205         <component Cclass="CMSIS" Cgroup="CORE"/>
4206         <component Cclass="CMSIS" Cgroup="DSP"/>
4207         <component Cclass="Device" Cgroup="Startup"/>
4208         <category>Getting Started</category>
4209       </attributes>
4210     </example>
4211
4212     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4213       <description>DSP_Lib Variance example</description>
4214       <board name="uVision Simulator" vendor="Keil"/>
4215       <project>
4216         <environment name="uv" load="arm_variance_example.uvprojx"/>
4217       </project>
4218       <attributes>
4219         <component Cclass="CMSIS" Cgroup="CORE"/>
4220         <component Cclass="CMSIS" Cgroup="DSP"/>
4221         <component Cclass="Device" Cgroup="Startup"/>
4222         <category>Getting Started</category>
4223       </attributes>
4224     </example>
4225
4226     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4227       <description>Neural Network CIFAR10 example</description>
4228       <board name="uVision Simulator" vendor="Keil"/>
4229       <project>
4230         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4231       </project>
4232       <attributes>
4233         <component Cclass="CMSIS" Cgroup="CORE"/>
4234         <component Cclass="CMSIS" Cgroup="DSP"/>
4235         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4236         <component Cclass="Device" Cgroup="Startup"/>
4237         <category>Getting Started</category>
4238       </attributes>
4239     </example>
4240
4241     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4242       <description>Neural Network CIFAR10 example</description>
4243       <board name="EWARM Simulator" vendor="IAR"/>
4244       <project>
4245         <environment name="iar" load="NN-example-cifar10.ewp"/>
4246       </project>
4247       <attributes>
4248         <component Cclass="CMSIS" Cgroup="CORE"/>
4249         <component Cclass="CMSIS" Cgroup="DSP"/>
4250         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4251         <component Cclass="Device" Cgroup="Startup"/>
4252         <category>Getting Started</category>
4253       </attributes>
4254     </example>
4255
4256     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4257       <description>Neural Network GRU example</description>
4258       <board name="uVision Simulator" vendor="Keil"/>
4259       <project>
4260         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4261       </project>
4262       <attributes>
4263         <component Cclass="CMSIS" Cgroup="CORE"/>
4264         <component Cclass="CMSIS" Cgroup="DSP"/>
4265         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4266         <component Cclass="Device" Cgroup="Startup"/>
4267         <category>Getting Started</category>
4268       </attributes>
4269     </example>
4270
4271     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4272       <description>Neural Network GRU example</description>
4273       <board name="EWARM Simulator" vendor="IAR"/>
4274       <project>
4275         <environment name="iar" load="NN-example-gru.ewp"/>
4276       </project>
4277       <attributes>
4278         <component Cclass="CMSIS" Cgroup="CORE"/>
4279         <component Cclass="CMSIS" Cgroup="DSP"/>
4280         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4281         <component Cclass="Device" Cgroup="Startup"/>
4282         <category>Getting Started</category>
4283       </attributes>
4284     </example>
4285
4286     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4287       <description>CMSIS-RTOS2 Blinky example</description>
4288       <board name="uVision Simulator" vendor="Keil"/>
4289       <project>
4290         <environment name="uv" load="Blinky.uvprojx"/>
4291       </project>
4292       <attributes>
4293         <component Cclass="CMSIS" Cgroup="CORE"/>
4294         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4295         <component Cclass="Device" Cgroup="Startup"/>
4296         <category>Getting Started</category>
4297       </attributes>
4298     </example>
4299
4300     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4301       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4302       <board name="uVision Simulator" vendor="Keil"/>
4303       <project>
4304         <environment name="uv" load="Blinky.uvprojx"/>
4305       </project>
4306       <attributes>
4307         <component Cclass="CMSIS" Cgroup="CORE"/>
4308         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4309         <component Cclass="Device" Cgroup="Startup"/>
4310         <category>Getting Started</category>
4311       </attributes>
4312     </example>
4313
4314     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4315       <description>CMSIS-RTOS2 Message Queue Example</description>
4316       <board name="uVision Simulator" vendor="Keil"/>
4317       <project>
4318         <environment name="uv" load="MsqQueue.uvprojx"/>
4319       </project>
4320       <attributes>
4321         <component Cclass="CMSIS" Cgroup="CORE"/>
4322         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4323         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4324         <component Cclass="Device" Cgroup="Startup"/>
4325         <category>Getting Started</category>
4326       </attributes>
4327     </example>
4328
4329     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4330       <description>CMSIS-RTOS2 Memory Pool Example</description>
4331       <board name="uVision Simulator" vendor="Keil"/>
4332       <project>
4333         <environment name="uv" load="MemPool.uvprojx"/>
4334       </project>
4335       <attributes>
4336         <component Cclass="CMSIS" Cgroup="CORE"/>
4337         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4338         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4339         <component Cclass="Device" Cgroup="Startup"/>
4340         <category>Getting Started</category>
4341       </attributes>
4342     </example>
4343
4344     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4345       <description>Bare-metal secure/non-secure example without RTOS</description>
4346       <board name="uVision Simulator" vendor="Keil"/>
4347       <project>
4348         <environment name="uv" load="NoRTOS.uvmpw"/>
4349       </project>
4350       <attributes>
4351         <component Cclass="CMSIS" Cgroup="CORE"/>
4352         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4353         <component Cclass="Device" Cgroup="Startup"/>
4354         <category>Getting Started</category>
4355       </attributes>
4356     </example>
4357
4358     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4359       <description>Secure/non-secure RTOS example with thread context management</description>
4360       <board name="uVision Simulator" vendor="Keil"/>
4361       <project>
4362         <environment name="uv" load="RTOS.uvmpw"/>
4363       </project>
4364       <attributes>
4365         <component Cclass="CMSIS" Cgroup="CORE"/>
4366         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4367         <component Cclass="Device" Cgroup="Startup"/>
4368         <category>Getting Started</category>
4369       </attributes>
4370     </example>
4371
4372     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4373       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4374       <board name="uVision Simulator" vendor="Keil"/>
4375       <project>
4376         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4377       </project>
4378       <attributes>
4379         <component Cclass="CMSIS" Cgroup="CORE"/>
4380         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4381         <component Cclass="Device" Cgroup="Startup"/>
4382         <category>Getting Started</category>
4383       </attributes>
4384     </example>
4385
4386     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
4387       <description>CMSIS-RTOS2 Blinky example</description>
4388       <board name="EWARM Simulator" vendor="IAR"/>
4389       <project>
4390         <environment name="iar" load="Blinky/Blinky.ewp"/>
4391       </project>
4392       <attributes>
4393         <component Cclass="CMSIS" Cgroup="CORE"/>
4394         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4395         <component Cclass="Device" Cgroup="Startup"/>
4396         <category>Getting Started</category>
4397       </attributes>
4398     </example>
4399
4400     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
4401       <description>CMSIS-RTOS2 Message Queue Example</description>
4402       <board name="EWARM Simulator" vendor="IAR"/>
4403       <project>
4404         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
4405       </project>
4406       <attributes>
4407         <component Cclass="CMSIS" Cgroup="CORE"/>
4408         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4409         <component Cclass="Device" Cgroup="Startup"/>
4410         <category>Getting Started</category>
4411       </attributes>
4412     </example>
4413
4414   </examples>
4415
4416 </package>