begriffs open source - cmsis/blob - main/Core_A/html/group__CMSIS__CPACR__BITS.html

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  46    <div id="projectname">CMSIS-Core (Cortex-A)
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  55    <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
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 128
 129 <div class="header">
 130   <div class="summary">
 131 <a href="#define-members">Macros</a>  </div>
 132   <div class="headertitle"><div class="title">CPACR Bits<div class="ingroups"><a class="el" href="group__CMSIS__core__register.html">Core Register Access</a> &raquo; <a class="el" href="group__CMSIS__CPACR.html">Coprocessor Access Control Register (CPACR)</a></div></div></div>
 133 </div><!--header-->
 134 <div class="contents">
 135
 136 <p>Bit position and mask macros.
 137 <a href="#details">More...</a></p>
 138 <table class="memberdecls">
 139 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
 140 Macros</h2></td></tr>
 141 <tr class="memitem:ga3acd342ab1e88bd4ad73f5670e7af163"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__BITS.html#ga3acd342ab1e88bd4ad73f5670e7af163">CPACR_ASEDIS_Pos</a>&#160;&#160;&#160;31U</td></tr>
 142 <tr class="memdesc:ga3acd342ab1e88bd4ad73f5670e7af163"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR: ASEDIS Position.  <br /></td></tr>
 143 <tr class="separator:ga3acd342ab1e88bd4ad73f5670e7af163"><td class="memSeparator" colspan="2">&#160;</td></tr>
 144 <tr class="memitem:ga46d28804bfa370b0dd4ac520a7a67609"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__BITS.html#ga46d28804bfa370b0dd4ac520a7a67609">CPACR_ASEDIS_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPACR__BITS.html#ga3acd342ab1e88bd4ad73f5670e7af163">CPACR_ASEDIS_Pos</a>)</td></tr>
 145 <tr class="memdesc:ga46d28804bfa370b0dd4ac520a7a67609"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR: ASEDIS Mask.  <br /></td></tr>
 146 <tr class="separator:ga46d28804bfa370b0dd4ac520a7a67609"><td class="memSeparator" colspan="2">&#160;</td></tr>
 147 <tr class="memitem:ga6df0c4e805105285e63b0f0e992bd416"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__BITS.html#ga6df0c4e805105285e63b0f0e992bd416">CPACR_D32DIS_Pos</a>&#160;&#160;&#160;30U</td></tr>
 148 <tr class="memdesc:ga6df0c4e805105285e63b0f0e992bd416"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR: D32DIS Position.  <br /></td></tr>
 149 <tr class="separator:ga6df0c4e805105285e63b0f0e992bd416"><td class="memSeparator" colspan="2">&#160;</td></tr>
 150 <tr class="memitem:ga96266eb6bf35c3c3f22718bd06b12d79"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__BITS.html#ga96266eb6bf35c3c3f22718bd06b12d79">CPACR_D32DIS_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPACR__BITS.html#ga6df0c4e805105285e63b0f0e992bd416">CPACR_D32DIS_Pos</a>)</td></tr>
 151 <tr class="memdesc:ga96266eb6bf35c3c3f22718bd06b12d79"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR: D32DIS Mask.  <br /></td></tr>
 152 <tr class="separator:ga96266eb6bf35c3c3f22718bd06b12d79"><td class="memSeparator" colspan="2">&#160;</td></tr>
 153 <tr class="memitem:ga6866c97020fdba42f7c287433c58d77c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__BITS.html#ga6866c97020fdba42f7c287433c58d77c">CPACR_TRCDIS_Pos</a>&#160;&#160;&#160;28U</td></tr>
 154 <tr class="memdesc:ga6866c97020fdba42f7c287433c58d77c"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR: D32DIS Position.  <br /></td></tr>
 155 <tr class="separator:ga6866c97020fdba42f7c287433c58d77c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 156 <tr class="memitem:gab5d6ec83339e755bd3e7eacb914edf37"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__BITS.html#gab5d6ec83339e755bd3e7eacb914edf37">CPACR_TRCDIS_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPACR__BITS.html#ga6df0c4e805105285e63b0f0e992bd416">CPACR_D32DIS_Pos</a>)</td></tr>
 157 <tr class="memdesc:gab5d6ec83339e755bd3e7eacb914edf37"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR: D32DIS Mask.  <br /></td></tr>
 158 <tr class="separator:gab5d6ec83339e755bd3e7eacb914edf37"><td class="memSeparator" colspan="2">&#160;</td></tr>
 159 <tr class="memitem:ga77dc035e6d16dee8f5cf53b36b86cfaf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__BITS.html#ga77dc035e6d16dee8f5cf53b36b86cfaf">CPACR_CP_Pos_</a>(n)&#160;&#160;&#160;(n*2U)</td></tr>
 160 <tr class="memdesc:ga77dc035e6d16dee8f5cf53b36b86cfaf"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR: CPn Position.  <br /></td></tr>
 161 <tr class="separator:ga77dc035e6d16dee8f5cf53b36b86cfaf"><td class="memSeparator" colspan="2">&#160;</td></tr>
 162 <tr class="memitem:ga7c87723442baa681a80de8f644eda1a2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__CPACR__BITS.html#ga7c87723442baa681a80de8f644eda1a2">CPACR_CP_Msk_</a>(n)&#160;&#160;&#160;(3UL &lt;&lt; <a class="el" href="group__CMSIS__CPACR__BITS.html#ga77dc035e6d16dee8f5cf53b36b86cfaf">CPACR_CP_Pos_</a>(n))</td></tr>
 163 <tr class="memdesc:ga7c87723442baa681a80de8f644eda1a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPACR: CPn Mask.  <br /></td></tr>
 164 <tr class="separator:ga7c87723442baa681a80de8f644eda1a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 165 </table>
 166 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 167 <h2 class="groupheader">Macro Definition Documentation</h2>
 168 <a id="ga46d28804bfa370b0dd4ac520a7a67609" name="ga46d28804bfa370b0dd4ac520a7a67609"></a>
 169 <h2 class="memtitle"><span class="permalink"><a href="#ga46d28804bfa370b0dd4ac520a7a67609">&#9670;&#160;</a></span>CPACR_ASEDIS_Msk</h2>
 170
 171 <div class="memitem">
 172 <div class="memproto">
 173       <table class="memname">
 174         <tr>
 175           <td class="memname">#define CPACR_ASEDIS_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPACR__BITS.html#ga3acd342ab1e88bd4ad73f5670e7af163">CPACR_ASEDIS_Pos</a>)</td>
 176         </tr>
 177       </table>
 178 </div><div class="memdoc">
 179
 180 </div>
 181 </div>
 182 <a id="ga3acd342ab1e88bd4ad73f5670e7af163" name="ga3acd342ab1e88bd4ad73f5670e7af163"></a>
 183 <h2 class="memtitle"><span class="permalink"><a href="#ga3acd342ab1e88bd4ad73f5670e7af163">&#9670;&#160;</a></span>CPACR_ASEDIS_Pos</h2>
 184
 185 <div class="memitem">
 186 <div class="memproto">
 187       <table class="memname">
 188         <tr>
 189           <td class="memname">#define CPACR_ASEDIS_Pos&#160;&#160;&#160;31U</td>
 190         </tr>
 191       </table>
 192 </div><div class="memdoc">
 193
 194 </div>
 195 </div>
 196 <a id="ga7c87723442baa681a80de8f644eda1a2" name="ga7c87723442baa681a80de8f644eda1a2"></a>
 197 <h2 class="memtitle"><span class="permalink"><a href="#ga7c87723442baa681a80de8f644eda1a2">&#9670;&#160;</a></span>CPACR_CP_Msk_</h2>
 198
 199 <div class="memitem">
 200 <div class="memproto">
 201       <table class="memname">
 202         <tr>
 203           <td class="memname">#define CPACR_CP_Msk_</td>
 204           <td>(</td>
 205           <td class="paramtype">&#160;</td>
 206           <td class="paramname">n</td><td>)</td>
 207           <td>&#160;&#160;&#160;(3UL &lt;&lt; <a class="el" href="group__CMSIS__CPACR__BITS.html#ga77dc035e6d16dee8f5cf53b36b86cfaf">CPACR_CP_Pos_</a>(n))</td>
 208         </tr>
 209       </table>
 210 </div><div class="memdoc">
 211
 212 </div>
 213 </div>
 214 <a id="ga77dc035e6d16dee8f5cf53b36b86cfaf" name="ga77dc035e6d16dee8f5cf53b36b86cfaf"></a>
 215 <h2 class="memtitle"><span class="permalink"><a href="#ga77dc035e6d16dee8f5cf53b36b86cfaf">&#9670;&#160;</a></span>CPACR_CP_Pos_</h2>
 216
 217 <div class="memitem">
 218 <div class="memproto">
 219       <table class="memname">
 220         <tr>
 221           <td class="memname">#define CPACR_CP_Pos_</td>
 222           <td>(</td>
 223           <td class="paramtype">&#160;</td>
 224           <td class="paramname">n</td><td>)</td>
 225           <td>&#160;&#160;&#160;(n*2U)</td>
 226         </tr>
 227       </table>
 228 </div><div class="memdoc">
 229
 230 </div>
 231 </div>
 232 <a id="ga96266eb6bf35c3c3f22718bd06b12d79" name="ga96266eb6bf35c3c3f22718bd06b12d79"></a>
 233 <h2 class="memtitle"><span class="permalink"><a href="#ga96266eb6bf35c3c3f22718bd06b12d79">&#9670;&#160;</a></span>CPACR_D32DIS_Msk</h2>
 234
 235 <div class="memitem">
 236 <div class="memproto">
 237       <table class="memname">
 238         <tr>
 239           <td class="memname">#define CPACR_D32DIS_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPACR__BITS.html#ga6df0c4e805105285e63b0f0e992bd416">CPACR_D32DIS_Pos</a>)</td>
 240         </tr>
 241       </table>
 242 </div><div class="memdoc">
 243
 244 </div>
 245 </div>
 246 <a id="ga6df0c4e805105285e63b0f0e992bd416" name="ga6df0c4e805105285e63b0f0e992bd416"></a>
 247 <h2 class="memtitle"><span class="permalink"><a href="#ga6df0c4e805105285e63b0f0e992bd416">&#9670;&#160;</a></span>CPACR_D32DIS_Pos</h2>
 248
 249 <div class="memitem">
 250 <div class="memproto">
 251       <table class="memname">
 252         <tr>
 253           <td class="memname">#define CPACR_D32DIS_Pos&#160;&#160;&#160;30U</td>
 254         </tr>
 255       </table>
 256 </div><div class="memdoc">
 257
 258 </div>
 259 </div>
 260 <a id="gab5d6ec83339e755bd3e7eacb914edf37" name="gab5d6ec83339e755bd3e7eacb914edf37"></a>
 261 <h2 class="memtitle"><span class="permalink"><a href="#gab5d6ec83339e755bd3e7eacb914edf37">&#9670;&#160;</a></span>CPACR_TRCDIS_Msk</h2>
 262
 263 <div class="memitem">
 264 <div class="memproto">
 265       <table class="memname">
 266         <tr>
 267           <td class="memname">#define CPACR_TRCDIS_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__CPACR__BITS.html#ga6df0c4e805105285e63b0f0e992bd416">CPACR_D32DIS_Pos</a>)</td>
 268         </tr>
 269       </table>
 270 </div><div class="memdoc">
 271
 272 </div>
 273 </div>
 274 <a id="ga6866c97020fdba42f7c287433c58d77c" name="ga6866c97020fdba42f7c287433c58d77c"></a>
 275 <h2 class="memtitle"><span class="permalink"><a href="#ga6866c97020fdba42f7c287433c58d77c">&#9670;&#160;</a></span>CPACR_TRCDIS_Pos</h2>
 276
 277 <div class="memitem">
 278 <div class="memproto">
 279       <table class="memname">
 280         <tr>
 281           <td class="memname">#define CPACR_TRCDIS_Pos&#160;&#160;&#160;28U</td>
 282         </tr>
 283       </table>
 284 </div><div class="memdoc">
 285
 286 </div>
 287 </div>
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