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 131 <a href="#nested-classes">Data Structures</a> &#124;
 132 <a href="#define-members">Macros</a> &#124;
 133 <a href="#func-members">Functions</a>  </div>
 134   <div class="headertitle"><div class="title">Generic Interrupt Controller Functions<div class="ingroups"><a class="el" href="group__CMSIS__Core__FunctionInterface.html">Core Peripherals</a></div></div></div>
 135 </div><!--header-->
 136 <div class="contents">
 137
 138 <p>The Generic Interrupt Controller Functions grant access to the configuration, control and status registers of the Generic Interrupt Controller (GIC).
 139 <a href="#details">More...</a></p>
 140 <table class="memberdecls">
 141 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="nested-classes" name="nested-classes"></a>
 142 Data Structures</h2></td></tr>
 143 <tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structGICInterface__Type.html">GICInterface_Type</a></td></tr>
 144 <tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Structure type to access the Generic Interrupt Controller Interface (GICC)  <a href="structGICInterface__Type.html#details">More...</a><br /></td></tr>
 145 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 146 <tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structGICDistributor__Type.html">GICDistributor_Type</a></td></tr>
 147 <tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Structure type to access the Generic Interrupt Controller Distributor (GICD)  <a href="structGICDistributor__Type.html#details">More...</a><br /></td></tr>
 148 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 149 </table><table class="memberdecls">
 150 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
 151 Macros</h2></td></tr>
 152 <tr class="memitem:ga82e193c0016a9377274756b2673464a6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga82e193c0016a9377274756b2673464a6">GICDistributor</a>&#160;&#160;&#160;((<a class="el" href="structGICDistributor__Type.html">GICDistributor_Type</a>      *)     GIC_DISTRIBUTOR_BASE )</td></tr>
 153 <tr class="memdesc:ga82e193c0016a9377274756b2673464a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">GIC Distributor register set access pointer.  <br /></td></tr>
 154 <tr class="separator:ga82e193c0016a9377274756b2673464a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
 155 <tr class="memitem:ga31a083dbdc5cb84178dbf184286180e3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga31a083dbdc5cb84178dbf184286180e3">GICInterface</a>&#160;&#160;&#160;((<a class="el" href="structGICInterface__Type.html">GICInterface_Type</a>        *)     GIC_INTERFACE_BASE )</td></tr>
 156 <tr class="memdesc:ga31a083dbdc5cb84178dbf184286180e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">GIC Interface register set access pointer.  <br /></td></tr>
 157 <tr class="separator:ga31a083dbdc5cb84178dbf184286180e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 158 </table><table class="memberdecls">
 159 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
 160 Functions</h2></td></tr>
 161 <tr class="memitem:ga0f44df6823e90178183257e096e5cac6"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga0f44df6823e90178183257e096e5cac6">GIC_EnableDistributor</a> (void)</td></tr>
 162 <tr class="memdesc:ga0f44df6823e90178183257e096e5cac6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the interrupt distributor using the GIC's CTLR register.  <br /></td></tr>
 163 <tr class="separator:ga0f44df6823e90178183257e096e5cac6"><td class="memSeparator" colspan="2">&#160;</td></tr>
 164 <tr class="memitem:ga363311538d4a4d750197b9936505d466"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga363311538d4a4d750197b9936505d466">GIC_DisableDistributor</a> (void)</td></tr>
 165 <tr class="memdesc:ga363311538d4a4d750197b9936505d466"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the interrupt distributor using the GIC's CTLR register.  <br /></td></tr>
 166 <tr class="separator:ga363311538d4a4d750197b9936505d466"><td class="memSeparator" colspan="2">&#160;</td></tr>
 167 <tr class="memitem:ga7d93d39736ef5e379e6511430ee6e75f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga7d93d39736ef5e379e6511430ee6e75f">GIC_DistributorInfo</a> (void)</td></tr>
 168 <tr class="memdesc:ga7d93d39736ef5e379e6511430ee6e75f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the GIC's TYPER register.  <br /></td></tr>
 169 <tr class="separator:ga7d93d39736ef5e379e6511430ee6e75f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 170 <tr class="memitem:ga1481d0cdf78f8c93fb2a710a519c4dc6"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga1481d0cdf78f8c93fb2a710a519c4dc6">GIC_DistributorImplementer</a> (void)</td></tr>
 171 <tr class="memdesc:ga1481d0cdf78f8c93fb2a710a519c4dc6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reads the GIC's IIDR register.  <br /></td></tr>
 172 <tr class="separator:ga1481d0cdf78f8c93fb2a710a519c4dc6"><td class="memSeparator" colspan="2">&#160;</td></tr>
 173 <tr class="memitem:gae86bba705d0d4ef812b84d29d7b3ca2b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gae86bba705d0d4ef812b84d29d7b3ca2b">GIC_SetTarget</a> (IRQn_Type IRQn, uint32_t cpu_target)</td></tr>
 174 <tr class="memdesc:gae86bba705d0d4ef812b84d29d7b3ca2b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the GIC's ITARGETSR register for the given interrupt.  <br /></td></tr>
 175 <tr class="separator:gae86bba705d0d4ef812b84d29d7b3ca2b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 176 <tr class="memitem:gafccf881f9517592f30489bcabcb738a8"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gafccf881f9517592f30489bcabcb738a8">GIC_GetTarget</a> (IRQn_Type IRQn)</td></tr>
 177 <tr class="memdesc:gafccf881f9517592f30489bcabcb738a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the GIC's ITARGETSR register.  <br /></td></tr>
 178 <tr class="separator:gafccf881f9517592f30489bcabcb738a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 179 <tr class="memitem:ga758e5600d7f891e4f2f551bb45d07fce"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga758e5600d7f891e4f2f551bb45d07fce">GIC_EnableInterface</a> (void)</td></tr>
 180 <tr class="memdesc:ga758e5600d7f891e4f2f551bb45d07fce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the CPU's interrupt interface.  <br /></td></tr>
 181 <tr class="separator:ga758e5600d7f891e4f2f551bb45d07fce"><td class="memSeparator" colspan="2">&#160;</td></tr>
 182 <tr class="memitem:ga0605877ad627c1f4320e518725fd103e"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga0605877ad627c1f4320e518725fd103e">GIC_DisableInterface</a> (void)</td></tr>
 183 <tr class="memdesc:ga0605877ad627c1f4320e518725fd103e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the CPU's interrupt interface.  <br /></td></tr>
 184 <tr class="separator:ga0605877ad627c1f4320e518725fd103e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 185 <tr class="memitem:gafc08bbc58b25fef0d24003313fd16eb8"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> IRQn_Type&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gafc08bbc58b25fef0d24003313fd16eb8">GIC_AcknowledgePending</a> (void)</td></tr>
 186 <tr class="memdesc:gafc08bbc58b25fef0d24003313fd16eb8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the CPU's IAR register.  <br /></td></tr>
 187 <tr class="separator:gafc08bbc58b25fef0d24003313fd16eb8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 188 <tr class="memitem:gac23f090f572a058b4a737f6613ded9cd"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gac23f090f572a058b4a737f6613ded9cd">GIC_EndInterrupt</a> (IRQn_Type IRQn)</td></tr>
 189 <tr class="memdesc:gac23f090f572a058b4a737f6613ded9cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Writes the given interrupt number to the CPU's EOIR register.  <br /></td></tr>
 190 <tr class="separator:gac23f090f572a058b4a737f6613ded9cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
 191 <tr class="memitem:gaeba215d9c4ec3599e0a168800288c3f3"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gaeba215d9c4ec3599e0a168800288c3f3">GIC_EnableIRQ</a> (IRQn_Type IRQn)</td></tr>
 192 <tr class="memdesc:gaeba215d9c4ec3599e0a168800288c3f3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables the given interrupt using GIC's ISENABLER register.  <br /></td></tr>
 193 <tr class="separator:gaeba215d9c4ec3599e0a168800288c3f3"><td class="memSeparator" colspan="2">&#160;</td></tr>
 194 <tr class="memitem:ga2102399d255690c0674209a6faeec13d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga2102399d255690c0674209a6faeec13d">GIC_DisableIRQ</a> (IRQn_Type IRQn)</td></tr>
 195 <tr class="memdesc:ga2102399d255690c0674209a6faeec13d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disables the given interrupt using GIC's ICENABLER register.  <br /></td></tr>
 196 <tr class="separator:ga2102399d255690c0674209a6faeec13d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 197 <tr class="memitem:ga18fbddf7f3594df141c97f61a71da47c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga18fbddf7f3594df141c97f61a71da47c">GIC_SetPendingIRQ</a> (IRQn_Type IRQn)</td></tr>
 198 <tr class="memdesc:ga18fbddf7f3594df141c97f61a71da47c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the given interrupt as pending using GIC's ISPENDR register.  <br /></td></tr>
 199 <tr class="separator:ga18fbddf7f3594df141c97f61a71da47c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 200 <tr class="memitem:ga5ad17ad70f23d1ff36015ffac33d383d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga5ad17ad70f23d1ff36015ffac33d383d">GIC_ClearPendingIRQ</a> (IRQn_Type IRQn)</td></tr>
 201 <tr class="memdesc:ga5ad17ad70f23d1ff36015ffac33d383d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clears the given interrupt from being pending using GIC's ICPENDR register.  <br /></td></tr>
 202 <tr class="separator:ga5ad17ad70f23d1ff36015ffac33d383d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 203 <tr class="memitem:ga27b9862b58290276851ec669cabf0f71"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga27b9862b58290276851ec669cabf0f71">GIC_SetPriority</a> (IRQn_Type IRQn, uint32_t priority)</td></tr>
 204 <tr class="memdesc:ga27b9862b58290276851ec669cabf0f71"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the priority for the given interrupt in the GIC's IPRIORITYR register.  <br /></td></tr>
 205 <tr class="separator:ga27b9862b58290276851ec669cabf0f71"><td class="memSeparator" colspan="2">&#160;</td></tr>
 206 <tr class="memitem:ga397048004654f792649742f95bf8ae67"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga397048004654f792649742f95bf8ae67">GIC_GetPriority</a> (IRQn_Type IRQn)</td></tr>
 207 <tr class="memdesc:ga397048004654f792649742f95bf8ae67"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the current interrupt priority from GIC's IPRIORITYR register.  <br /></td></tr>
 208 <tr class="separator:ga397048004654f792649742f95bf8ae67"><td class="memSeparator" colspan="2">&#160;</td></tr>
 209 <tr class="memitem:gaa5eb0e76dbc89596e1ce47ddb9edc4a0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gaa5eb0e76dbc89596e1ce47ddb9edc4a0">GIC_SetInterfacePriorityMask</a> (uint32_t priority)</td></tr>
 210 <tr class="memdesc:gaa5eb0e76dbc89596e1ce47ddb9edc4a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the interrupt priority mask using CPU's PMR register.  <br /></td></tr>
 211 <tr class="separator:gaa5eb0e76dbc89596e1ce47ddb9edc4a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 213 <tr class="memdesc:ga2c5f9e5637560fc9d5c29d772580a728"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the current interrupt priority mask from CPU's PMR register.  <br /></td></tr>
 214 <tr class="separator:ga2c5f9e5637560fc9d5c29d772580a728"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 216 <tr class="memdesc:ga5dfedeb5403656a77e0fef4e1cc2c0c6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the group priority and subpriority split point using CPU's BPR register.  <br /></td></tr>
 217 <tr class="separator:ga5dfedeb5403656a77e0fef4e1cc2c0c6"><td class="memSeparator" colspan="2">&#160;</td></tr>
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 219 <tr class="memdesc:gaa7046d8206ddd4696716726e68f85906"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the current group priority and subpriority split point from CPU's BPR register.  <br /></td></tr>
 220 <tr class="separator:gaa7046d8206ddd4696716726e68f85906"><td class="memSeparator" colspan="2">&#160;</td></tr>
 221 <tr class="memitem:gabc88483ecf94a2c222b644ecfa60eb9f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gabc88483ecf94a2c222b644ecfa60eb9f">GIC_GetIRQStatus</a> (IRQn_Type IRQn)</td></tr>
 222 <tr class="memdesc:gabc88483ecf94a2c222b644ecfa60eb9f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the status for a given interrupt.  <br /></td></tr>
 223 <tr class="separator:gabc88483ecf94a2c222b644ecfa60eb9f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 224 <tr class="memitem:ga2de8850780af26e802ee4cc43e9da6e9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga2de8850780af26e802ee4cc43e9da6e9">GIC_SendSGI</a> (IRQn_Type IRQn, uint32_t target_list, uint32_t filter_list)</td></tr>
 225 <tr class="memdesc:ga2de8850780af26e802ee4cc43e9da6e9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Generate a software interrupt using GIC's SGIR register.  <br /></td></tr>
 226 <tr class="separator:ga2de8850780af26e802ee4cc43e9da6e9"><td class="memSeparator" colspan="2">&#160;</td></tr>
 227 <tr class="memitem:ga8bb27e1bab132a8df44190adb996c2a1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga8bb27e1bab132a8df44190adb996c2a1">GIC_GetHighPendingIRQ</a> (void)</td></tr>
 228 <tr class="memdesc:ga8bb27e1bab132a8df44190adb996c2a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the interrupt number of the highest interrupt pending from CPU's HPPIR register.  <br /></td></tr>
 229 <tr class="separator:ga8bb27e1bab132a8df44190adb996c2a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
 230 <tr class="memitem:gaba1b2665cdda47fc0bc3d7b90690dc50"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#gaba1b2665cdda47fc0bc3d7b90690dc50">GIC_GetInterfaceId</a> (void)</td></tr>
 231 <tr class="memdesc:gaba1b2665cdda47fc0bc3d7b90690dc50"><td class="mdescLeft">&#160;</td><td class="mdescRight">Provides information about the implementer and revision of the CPU interface.  <br /></td></tr>
 232 <tr class="separator:gaba1b2665cdda47fc0bc3d7b90690dc50"><td class="memSeparator" colspan="2">&#160;</td></tr>
 233 <tr class="memitem:ga07acd03d02683bb6e33e7f57f5f371d1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga07acd03d02683bb6e33e7f57f5f371d1">GIC_DistInit</a> (void)</td></tr>
 234 <tr class="memdesc:ga07acd03d02683bb6e33e7f57f5f371d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize the interrupt distributor.  <br /></td></tr>
 235 <tr class="separator:ga07acd03d02683bb6e33e7f57f5f371d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
 236 <tr class="memitem:ga1c93f8af9f428cda8ec066bf4bfbade9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga1c93f8af9f428cda8ec066bf4bfbade9">GIC_CPUInterfaceInit</a> (void)</td></tr>
 237 <tr class="memdesc:ga1c93f8af9f428cda8ec066bf4bfbade9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize the CPU's interrupt interface.  <br /></td></tr>
 238 <tr class="separator:ga1c93f8af9f428cda8ec066bf4bfbade9"><td class="memSeparator" colspan="2">&#160;</td></tr>
 239 <tr class="memitem:ga818881f69aae3eef6eb996bee6f6c63e"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__GIC__functions.html#ga818881f69aae3eef6eb996bee6f6c63e">GIC_Enable</a> (void)</td></tr>
 240 <tr class="memdesc:ga818881f69aae3eef6eb996bee6f6c63e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize and enable the GIC.  <br /></td></tr>
 241 <tr class="separator:ga818881f69aae3eef6eb996bee6f6c63e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 242 </table>
 243 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 244 <p>Reference: <a href="http://infocenter.arm.com/help/topic/com.arm.doc.ihi0069c/index.html">Generic Interrupt Controller Architecture Specificaton</a>.</p>
 245 <p>The following table shows the register naming of CMSIS in correlation with various technical reference manuals.</p>
 246 <table class="markdownTable">
 247 <tr class="markdownTableHead">
 248 <th class="markdownTableHeadLeft">CMSIS Register Name   </th><th class="markdownTableHeadLeft">Cortex-A5 TRM   </th><th class="markdownTableHeadLeft">Cortex-A7 TRM   </th><th class="markdownTableHeadLeft">Cortex-A9 TRM    </th></tr>
 249 <tr class="markdownTableRowOdd">
 250 <td class="markdownTableBodyLeft"><b>GIC Distributor</b>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td></tr>
 251 <tr class="markdownTableRowEven">
 252 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a6ca67d9838ab3425864207c3a0399bd7">GICDistributor-&gt;CTLR</a>   </td><td class="markdownTableBodyLeft">ICDDCR   </td><td class="markdownTableBodyLeft">GICD_CTLR   </td><td class="markdownTableBodyLeft">ICDDCR    </td></tr>
 253 <tr class="markdownTableRowOdd">
 254 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a405823d97dc90dd9d397a3980e2cd207">GICDistributor-&gt;TYPER</a>   </td><td class="markdownTableBodyLeft">ICDICTR   </td><td class="markdownTableBodyLeft">GICD_TYPER   </td><td class="markdownTableBodyLeft">ICDICTR    </td></tr>
 255 <tr class="markdownTableRowEven">
 256 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#acebf65dae4cb82cd3c7deeefca9c9722">GICDistributor-&gt;IIDR</a>   </td><td class="markdownTableBodyLeft">ICDIIDR   </td><td class="markdownTableBodyLeft">GICD_IIDR   </td><td class="markdownTableBodyLeft">ICDIIDR    </td></tr>
 257 <tr class="markdownTableRowOdd">
 258 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#ae24f260e27065660a2059803293084f2">GICDistributor-&gt;STATUSR</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td></tr>
 259 <tr class="markdownTableRowEven">
 260 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#afbdd372578e2cd6f998320282cc8ed25">GICDistributor-&gt;SETSPI_NSR</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td></tr>
 261 <tr class="markdownTableRowOdd">
 262 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a2f584d3fbeaa355faf234f2ee57d1168">GICDistributor-&gt;CLRSPI_NSR</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td></tr>
 263 <tr class="markdownTableRowEven">
 264 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a6a9effdd633c6e75651d9f53caace306">GICDistributor-&gt;IGROUPR[]</a>   </td><td class="markdownTableBodyLeft">ICDISR   </td><td class="markdownTableBodyLeft">GICD_IGROUPRn   </td><td class="markdownTableBodyLeft">ICDISRn    </td></tr>
 265 <tr class="markdownTableRowOdd">
 266 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a1da3a2066b64644a0bb8a3066075ba87">GICDistributor-&gt;ISENABLER[]</a>   </td><td class="markdownTableBodyLeft">ICDISER   </td><td class="markdownTableBodyLeft">GICD_ISENABLERn   </td><td class="markdownTableBodyLeft">ICDISERn    </td></tr>
 267 <tr class="markdownTableRowEven">
 268 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a390fa9f2f460951b2c6094932d890807">GICDistributor-&gt;ICENABLER[]</a>   </td><td class="markdownTableBodyLeft">ICDICER   </td><td class="markdownTableBodyLeft">GICD_ICENABLERn   </td><td class="markdownTableBodyLeft">ICDICERn    </td></tr>
 269 <tr class="markdownTableRowOdd">
 270 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a1c15cd75ce30d8946792e2a1a19556a5">GICDistributor-&gt;ISPENDR[]</a>   </td><td class="markdownTableBodyLeft">ICDISPR   </td><td class="markdownTableBodyLeft">GICD_ISPENDRn   </td><td class="markdownTableBodyLeft">ICDISPRn    </td></tr>
 271 <tr class="markdownTableRowEven">
 272 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a0155cb4637845258e4ee76cd93cca2a6">GICDistributor-&gt;ICPENDR[]</a>   </td><td class="markdownTableBodyLeft">ICDICPR   </td><td class="markdownTableBodyLeft">GICD_ICPENDRn   </td><td class="markdownTableBodyLeft">ICDICPRn    </td></tr>
 273 <tr class="markdownTableRowOdd">
 274 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a5eb8e1ef5a88293e2759c41f6057ccc4">GICDistributor-&gt;ISACTIVER[]</a>   </td><td class="markdownTableBodyLeft">ICDABR   </td><td class="markdownTableBodyLeft">GICD_ISACTIVERn   </td><td class="markdownTableBodyLeft">ICDABRn    </td></tr>
 275 <tr class="markdownTableRowEven">
 276 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#ac0fd4c1ad19b5a332e403bb9966ba967">GICDistributor-&gt;ICACTIVER[]</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft">GICD_ICACTIVERn   </td><td class="markdownTableBodyLeft"></td></tr>
 277 <tr class="markdownTableRowOdd">
 278 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a08fa902293567e85dc6398dab58afaa9">GICDistributor-&gt;IPRIORITYR[]</a>   </td><td class="markdownTableBodyLeft">ICDIPR   </td><td class="markdownTableBodyLeft">GICD_IPRIORITYRn   </td><td class="markdownTableBodyLeft">ICDIPRn    </td></tr>
 279 <tr class="markdownTableRowEven">
 280 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a6f1b07d48d3a9199f2effec8492f721c">GICDistributor-&gt;ITARGETSR[]</a>   </td><td class="markdownTableBodyLeft">ICDIPTR   </td><td class="markdownTableBodyLeft">GICD_ITARGETSRn   </td><td class="markdownTableBodyLeft">ICDIPTRn    </td></tr>
 281 <tr class="markdownTableRowOdd">
 282 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a9b306a630388c795d3cd32fc2e23a2b5">GICDistributor-&gt;ICFGR[]</a>   </td><td class="markdownTableBodyLeft">ICDICFR   </td><td class="markdownTableBodyLeft">GICD_ICFGRn   </td><td class="markdownTableBodyLeft">ICDICFRn    </td></tr>
 283 <tr class="markdownTableRowEven">
 284 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#ae9eeb19ca95d0b95828f1f98700b5689">GICDistributor-&gt;IGRPMODR[0]</a>   </td><td class="markdownTableBodyLeft">ICDPPIS   </td><td class="markdownTableBodyLeft">GICD_PPISR   </td><td class="markdownTableBodyLeft">ppi_status    </td></tr>
 285 <tr class="markdownTableRowOdd">
 286 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#ae9eeb19ca95d0b95828f1f98700b5689">GICDistributor-&gt;IGRPMODR[31:1]</a>   </td><td class="markdownTableBodyLeft">ICDSPIS   </td><td class="markdownTableBodyLeft">GICD_SPISRn   </td><td class="markdownTableBodyLeft">spi_status    </td></tr>
 287 <tr class="markdownTableRowEven">
 288 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a644abefb7064e434db20cc6dab5fe5f1">GICDistributor-&gt;NSACR[]</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td></tr>
 289 <tr class="markdownTableRowOdd">
 290 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a6ac65c4a5394926cc9518753a00d4da1">GICDistributor-&gt;SGIR</a>   </td><td class="markdownTableBodyLeft">ICDSGIR   </td><td class="markdownTableBodyLeft">GICD_SGIR   </td><td class="markdownTableBodyLeft">ICDSGIR    </td></tr>
 291 <tr class="markdownTableRowEven">
 292 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a644a70cf4c12093c0277ce01f194b69b">GICDistributor-&gt;CPENDSGIR[]</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft">GICD_CPENDSGIRn   </td><td class="markdownTableBodyLeft"></td></tr>
 293 <tr class="markdownTableRowOdd">
 294 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#ae40b4a50d9766c2bbf57441f68094f41">GICDistributor-&gt;SPENDSGIR[]</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft">GICD_SPENDSGIRn   </td><td class="markdownTableBodyLeft"></td></tr>
 295 <tr class="markdownTableRowEven">
 296 <td class="markdownTableBodyLeft"><a class="el" href="structGICDistributor__Type.html#a73e0c679e5f45710deea474ab0d39cdb">GICDistributor-&gt;IROUTER[]</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td></tr>
 297 <tr class="markdownTableRowOdd">
 298 <td class="markdownTableBodyLeft"><b>GIC Interface</b>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td></tr>
 299 <tr class="markdownTableRowEven">
 300 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a5969edab40aa24e4d96e072af187a3a9">GICInterface-&gt;CTLR</a>   </td><td class="markdownTableBodyLeft">ICPICR   </td><td class="markdownTableBodyLeft">GICC_CTLR   </td><td class="markdownTableBodyLeft">ICCICR    </td></tr>
 301 <tr class="markdownTableRowOdd">
 302 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a0edadabc6e3ce1f36d820f0b52bc143b">GICInterface-&gt;PMR</a>   </td><td class="markdownTableBodyLeft">ICCIPMR   </td><td class="markdownTableBodyLeft">GICC_PMRn   </td><td class="markdownTableBodyLeft">ICCPMR    </td></tr>
 303 <tr class="markdownTableRowEven">
 304 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a949317484547dc1db89c9f7ab40d1829">GICInterface-&gt;BPR</a>   </td><td class="markdownTableBodyLeft">ICCBPR   </td><td class="markdownTableBodyLeft">GICC_BPR   </td><td class="markdownTableBodyLeft">ICCBPR    </td></tr>
 305 <tr class="markdownTableRowOdd">
 306 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#aa48569605fc0c163e1db35321b4c76ea">GICInterface-&gt;IAR</a>   </td><td class="markdownTableBodyLeft">ICCIAR   </td><td class="markdownTableBodyLeft">GICC_IAR   </td><td class="markdownTableBodyLeft">ICCIAR    </td></tr>
 307 <tr class="markdownTableRowEven">
 308 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a4b9baa43aae026438bad64e63df17cdb">GICInterface-&gt;EOIR</a>   </td><td class="markdownTableBodyLeft">ICCEOIR   </td><td class="markdownTableBodyLeft">GICC_EOIR   </td><td class="markdownTableBodyLeft">ICCEOIR    </td></tr>
 309 <tr class="markdownTableRowOdd">
 310 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a37762d42768ecb3d1302f34abc7f2821">GICInterface-&gt;RPR</a>   </td><td class="markdownTableBodyLeft">ICCRPR   </td><td class="markdownTableBodyLeft">GICC_RPR   </td><td class="markdownTableBodyLeft">ICCRPR    </td></tr>
 311 <tr class="markdownTableRowEven">
 312 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#af793cd280a74bf73cca8c4fedfc329d6">GICInterface-&gt;HPPIR</a>   </td><td class="markdownTableBodyLeft">ICCHPIR   </td><td class="markdownTableBodyLeft">GICC_HPPIR   </td><td class="markdownTableBodyLeft">ICCHPIR    </td></tr>
 313 <tr class="markdownTableRowOdd">
 314 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a6d3ca9eaae5e0ac38f20846a1e67180d">GICInterface-&gt;ABPR</a>   </td><td class="markdownTableBodyLeft">ICCABPR   </td><td class="markdownTableBodyLeft">GICC_ABPR   </td><td class="markdownTableBodyLeft">ICCABPR    </td></tr>
 315 <tr class="markdownTableRowEven">
 316 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a849e9ead6e9ced78dc6f0ba9256dd5a6">GICInterface-&gt;AIAR</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft">GICC_AIAR   </td><td class="markdownTableBodyLeft"></td></tr>
 317 <tr class="markdownTableRowOdd">
 318 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a89d5a920c2b91b4b7bd0312ba4c38a89">GICInterface-&gt;AEOIR</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft">GICC_AEOIR   </td><td class="markdownTableBodyLeft"></td></tr>
 319 <tr class="markdownTableRowEven">
 320 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a12f25dec95ab3dd13a477573fab4b9c8">GICInterface-&gt;AHPPIR</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft">GICC_AHPPIR   </td><td class="markdownTableBodyLeft"></td></tr>
 321 <tr class="markdownTableRowOdd">
 322 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#abd978b408fb69b7887be2c422f48ce7e">GICInterface-&gt;STATUSR</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft"></td></tr>
 323 <tr class="markdownTableRowEven">
 324 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#aebae4bdcd3930372d639b85c5c9301e8">GICInterface-&gt;APR[]</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft">GICC_APR0   </td><td class="markdownTableBodyLeft"></td></tr>
 325 <tr class="markdownTableRowOdd">
 326 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#ade3473ace2a8bf7c79a0251457be20f4">GICInterface-&gt;NSAPR[]</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft">GICC_NSAPR0   </td><td class="markdownTableBodyLeft"></td></tr>
 327 <tr class="markdownTableRowEven">
 328 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#aee78d0b6f64a7b47fbd730aabfcc86cf">GICInterface-&gt;IIDR</a>   </td><td class="markdownTableBodyLeft">ICCIIDR   </td><td class="markdownTableBodyLeft">GICC_IIDR   </td><td class="markdownTableBodyLeft">ICCIDR    </td></tr>
 329 <tr class="markdownTableRowOdd">
 330 <td class="markdownTableBodyLeft"><a class="el" href="structGICInterface__Type.html#a554bd1f88421df3189c664b9fd9c02aa">GICInterface-&gt;DIR</a>   </td><td class="markdownTableBodyLeft"></td><td class="markdownTableBodyLeft">GICC_DIR   </td><td class="markdownTableBodyLeft"></td></tr>
 331 </table>
 332 <h2 class="groupheader">Macro Definition Documentation</h2>
 333 <a id="ga82e193c0016a9377274756b2673464a6" name="ga82e193c0016a9377274756b2673464a6"></a>
 334 <h2 class="memtitle"><span class="permalink"><a href="#ga82e193c0016a9377274756b2673464a6">&#9670;&#160;</a></span>GICDistributor</h2>
 335
 336 <div class="memitem">
 337 <div class="memproto">
 338       <table class="memname">
 339         <tr>
 340           <td class="memname">#define GICDistributor&#160;&#160;&#160;((<a class="el" href="structGICDistributor__Type.html">GICDistributor_Type</a>      *)     GIC_DISTRIBUTOR_BASE )</td>
 341         </tr>
 342       </table>
 343 </div><div class="memdoc">
 344 <p>Use GICDistributor to access the GIC Distributor registers.</p>
 345 <p><b>Example:</b> </p><div class="fragment"><div class="line"><a class="code hl_define" href="group__GIC__functions.html#ga82e193c0016a9377274756b2673464a6">GICDistributor</a>-&gt;CTRL |= 1; <span class="comment">// Enable group 0 interrupts</span></div>
 346 <div class="ttc" id="agroup__GIC__functions_html_ga82e193c0016a9377274756b2673464a6"><div class="ttname"><a href="group__GIC__functions.html#ga82e193c0016a9377274756b2673464a6">GICDistributor</a></div><div class="ttdeci">#define GICDistributor</div><div class="ttdoc">GIC Distributor register set access pointer.</div></div>
 347 </div><!-- fragment -->
 348 </div>
 349 </div>
 350 <a id="ga31a083dbdc5cb84178dbf184286180e3" name="ga31a083dbdc5cb84178dbf184286180e3"></a>
 351 <h2 class="memtitle"><span class="permalink"><a href="#ga31a083dbdc5cb84178dbf184286180e3">&#9670;&#160;</a></span>GICInterface</h2>
 352
 353 <div class="memitem">
 354 <div class="memproto">
 355       <table class="memname">
 356         <tr>
 357           <td class="memname">#define GICInterface&#160;&#160;&#160;((<a class="el" href="structGICInterface__Type.html">GICInterface_Type</a>        *)     GIC_INTERFACE_BASE )</td>
 358         </tr>
 359       </table>
 360 </div><div class="memdoc">
 361 <p>Use GICInterface to access the GIC Interface registers.</p>
 362 <p><b>Example:</b> </p><div class="fragment"><div class="line"><a class="code hl_define" href="group__GIC__functions.html#ga31a083dbdc5cb84178dbf184286180e3">GICInterface</a>-&gt;CTLR |= 1; <span class="comment">// Enable interrupt signaling</span></div>
 363 <div class="ttc" id="agroup__GIC__functions_html_ga31a083dbdc5cb84178dbf184286180e3"><div class="ttname"><a href="group__GIC__functions.html#ga31a083dbdc5cb84178dbf184286180e3">GICInterface</a></div><div class="ttdeci">#define GICInterface</div><div class="ttdoc">GIC Interface register set access pointer.</div></div>
 364 </div><!-- fragment -->
 365 </div>
 366 </div>
 367 <h2 class="groupheader">Function Documentation</h2>
 368 <a id="gafc08bbc58b25fef0d24003313fd16eb8" name="gafc08bbc58b25fef0d24003313fd16eb8"></a>
 369 <h2 class="memtitle"><span class="permalink"><a href="#gafc08bbc58b25fef0d24003313fd16eb8">&#9670;&#160;</a></span>GIC_AcknowledgePending()</h2>
 370
 371 <div class="memitem">
 372 <div class="memproto">
 373       <table class="memname">
 374         <tr>
 375           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> IRQn_Type GIC_AcknowledgePending </td>
 376           <td>(</td>
 377           <td class="paramtype">void&#160;</td>
 378           <td class="paramname"></td><td>)</td>
 379           <td></td>
 380         </tr>
 381       </table>
 382 </div><div class="memdoc">
 383 <dl class="section return"><dt>Returns</dt><dd><a class="el" href="structGICInterface__Type.html#aa48569605fc0c163e1db35321b4c76ea" title="Offset: 0x00C (R/ ) Interrupt Acknowledge Register.">GICInterface_Type::IAR</a></dd></dl>
 384 <p>Provides the interrupt number of the highest priority interrupt pending. A read of this register acts as an acknowledge for the interrupt.</p>
 385 <p>The read returns a spurious interrupt number of 1023 if any of the following apply:</p><ul>
 386 <li>Forwarding of interrupts by the Distributor to the CPU interface is disabled.</li>
 387 <li>Signaling of interrupts by the CPU interface to the connected PE is disabled.</li>
 388 <li>There are no pending interrupts on the CPU interface with sufficient priority for the interface to signal it to the PE.</li>
 389 </ul>
 390 <dl class="section see"><dt>See also</dt><dd><a class="el" href="group__GIC__functions.html#gac23f090f572a058b4a737f6613ded9cd" title="Writes the given interrupt number to the CPU&#39;s EOIR register.">GIC_EndInterrupt</a> </dd></dl>
 391
 392 </div>
 393 </div>
 394 <a id="ga5ad17ad70f23d1ff36015ffac33d383d" name="ga5ad17ad70f23d1ff36015ffac33d383d"></a>
 395 <h2 class="memtitle"><span class="permalink"><a href="#ga5ad17ad70f23d1ff36015ffac33d383d">&#9670;&#160;</a></span>GIC_ClearPendingIRQ()</h2>
 396
 397 <div class="memitem">
 398 <div class="memproto">
 399       <table class="memname">
 400         <tr>
 401           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_ClearPendingIRQ </td>
 402           <td>(</td>
 403           <td class="paramtype">IRQn_Type&#160;</td>
 404           <td class="paramname"><em>IRQn</em></td><td>)</td>
 405           <td></td>
 406         </tr>
 407       </table>
 408 </div><div class="memdoc">
 409 <dl class="params"><dt>Parameters</dt><dd>
 410   <table class="params">
 411     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be enabled.</td></tr>
 412   </table>
 413   </dd>
 414 </dl>
 415 <p>Removes the pending state from the corresponding interrupt. </p>
 416
 417 </div>
 418 </div>
 419 <a id="ga1c93f8af9f428cda8ec066bf4bfbade9" name="ga1c93f8af9f428cda8ec066bf4bfbade9"></a>
 420 <h2 class="memtitle"><span class="permalink"><a href="#ga1c93f8af9f428cda8ec066bf4bfbade9">&#9670;&#160;</a></span>GIC_CPUInterfaceInit()</h2>
 421
 422 <div class="memitem">
 423 <div class="memproto">
 424       <table class="memname">
 425         <tr>
 426           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_CPUInterfaceInit </td>
 427           <td>(</td>
 428           <td class="paramtype">void&#160;</td>
 429           <td class="paramname"></td><td>)</td>
 430           <td></td>
 431         </tr>
 432       </table>
 433 </div><div class="memdoc">
 434 <p>All software generated (SGIs) and private peripheral interrupts (PPIs) are initialized to be</p><ul>
 435 <li>disabled</li>
 436 <li>level-sensitive, 1-N model</li>
 437 <li>priority 0x7F and the interrupt interface is enabled.</li>
 438 </ul>
 439 <p>The binary point is set to zero.</p>
 440 <p>The interrupt priority mask is set to 0xFF.</p>
 441 <dl class="section see"><dt>See also</dt><dd><a class="el" href="group__GIC__functions.html#ga2102399d255690c0674209a6faeec13d" title="Disables the given interrupt using GIC&#39;s ICENABLER register.">GIC_DisableIRQ</a><br  />
 442 GIC_SetLevelModel<br  />
 443 <a class="el" href="group__GIC__functions.html#ga27b9862b58290276851ec669cabf0f71" title="Set the priority for the given interrupt in the GIC&#39;s IPRIORITYR register.">GIC_SetPriority</a><br  />
 444 <a class="el" href="group__GIC__functions.html#ga758e5600d7f891e4f2f551bb45d07fce" title="Enable the CPU&#39;s interrupt interface.">GIC_EnableInterface</a><br  />
 445 <a class="el" href="group__GIC__functions.html#ga5dfedeb5403656a77e0fef4e1cc2c0c6" title="Configures the group priority and subpriority split point using CPU&#39;s BPR register.">GIC_SetBinaryPoint</a><br  />
 446 <a class="el" href="group__GIC__functions.html#gaa5eb0e76dbc89596e1ce47ddb9edc4a0" title="Set the interrupt priority mask using CPU&#39;s PMR register.">GIC_SetInterfacePriorityMask</a><br  />
 447 </dd></dl>
 448
 449 </div>
 450 </div>
 451 <a id="ga363311538d4a4d750197b9936505d466" name="ga363311538d4a4d750197b9936505d466"></a>
 452 <h2 class="memtitle"><span class="permalink"><a href="#ga363311538d4a4d750197b9936505d466">&#9670;&#160;</a></span>GIC_DisableDistributor()</h2>
 453
 454 <div class="memitem">
 455 <div class="memproto">
 456       <table class="memname">
 457         <tr>
 458           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_DisableDistributor </td>
 459           <td>(</td>
 460           <td class="paramtype">void&#160;</td>
 461           <td class="paramname"></td><td>)</td>
 462           <td></td>
 463         </tr>
 464       </table>
 465 </div><div class="memdoc">
 466 <p>Globally disable the forwarding of interrupts to the CPU interfaces. </p><dl class="section see"><dt>See also</dt><dd><a class="el" href="group__GIC__functions.html#ga0f44df6823e90178183257e096e5cac6" title="Enable the interrupt distributor using the GIC&#39;s CTLR register.">GIC_EnableDistributor</a> </dd></dl>
 467
 468 </div>
 469 </div>
 470 <a id="ga0605877ad627c1f4320e518725fd103e" name="ga0605877ad627c1f4320e518725fd103e"></a>
 471 <h2 class="memtitle"><span class="permalink"><a href="#ga0605877ad627c1f4320e518725fd103e">&#9670;&#160;</a></span>GIC_DisableInterface()</h2>
 472
 473 <div class="memitem">
 474 <div class="memproto">
 475       <table class="memname">
 476         <tr>
 477           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_DisableInterface </td>
 478           <td>(</td>
 479           <td class="paramtype">void&#160;</td>
 480           <td class="paramname"></td><td>)</td>
 481           <td></td>
 482         </tr>
 483       </table>
 484 </div><div class="memdoc">
 485 <p>Resets the Enable bit in the local CPUs <a class="el" href="structGICInterface__Type.html#a5969edab40aa24e4d96e072af187a3a9">CTLR</a> register. Only the CPU executing the call is affected. </p>
 486
 487 </div>
 488 </div>
 489 <a id="ga2102399d255690c0674209a6faeec13d" name="ga2102399d255690c0674209a6faeec13d"></a>
 490 <h2 class="memtitle"><span class="permalink"><a href="#ga2102399d255690c0674209a6faeec13d">&#9670;&#160;</a></span>GIC_DisableIRQ()</h2>
 491
 492 <div class="memitem">
 493 <div class="memproto">
 494       <table class="memname">
 495         <tr>
 496           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_DisableIRQ </td>
 497           <td>(</td>
 498           <td class="paramtype">IRQn_Type&#160;</td>
 499           <td class="paramname"><em>IRQn</em></td><td>)</td>
 500           <td></td>
 501         </tr>
 502       </table>
 503 </div><div class="memdoc">
 504 <dl class="params"><dt>Parameters</dt><dd>
 505   <table class="params">
 506     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be disabled.</td></tr>
 507   </table>
 508   </dd>
 509 </dl>
 510 <p>Disables forwarding of the corresponding interrupt to the CPU interfaces. </p>
 511
 512 </div>
 513 </div>
 514 <a id="ga07acd03d02683bb6e33e7f57f5f371d1" name="ga07acd03d02683bb6e33e7f57f5f371d1"></a>
 515 <h2 class="memtitle"><span class="permalink"><a href="#ga07acd03d02683bb6e33e7f57f5f371d1">&#9670;&#160;</a></span>GIC_DistInit()</h2>
 516
 517 <div class="memitem">
 518 <div class="memproto">
 519       <table class="memname">
 520         <tr>
 521           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_DistInit </td>
 522           <td>(</td>
 523           <td class="paramtype">void&#160;</td>
 524           <td class="paramname"></td><td>)</td>
 525           <td></td>
 526         </tr>
 527       </table>
 528 </div><div class="memdoc">
 529 <p>All shared peripheral interrupts (SPIs) are initialized to be</p><ul>
 530 <li>disabled</li>
 531 <li>level-sensitive, 1-N model</li>
 532 <li>priority 0x7F</li>
 533 <li>targeting CPU0 and the distributor is enabled.</li>
 534 </ul>
 535 <dl class="section see"><dt>See also</dt><dd><a class="el" href="group__GIC__functions.html#ga2102399d255690c0674209a6faeec13d" title="Disables the given interrupt using GIC&#39;s ICENABLER register.">GIC_DisableIRQ</a><br  />
 536 GIC_SetLevelModel<br  />
 537 <a class="el" href="group__GIC__functions.html#ga27b9862b58290276851ec669cabf0f71" title="Set the priority for the given interrupt in the GIC&#39;s IPRIORITYR register.">GIC_SetPriority</a><br  />
 538 <a class="el" href="group__GIC__functions.html#gae86bba705d0d4ef812b84d29d7b3ca2b" title="Sets the GIC&#39;s ITARGETSR register for the given interrupt.">GIC_SetTarget</a><br  />
 539 <a class="el" href="group__GIC__functions.html#ga0f44df6823e90178183257e096e5cac6" title="Enable the interrupt distributor using the GIC&#39;s CTLR register.">GIC_EnableDistributor</a> </dd></dl>
 540
 541 </div>
 542 </div>
 543 <a id="ga1481d0cdf78f8c93fb2a710a519c4dc6" name="ga1481d0cdf78f8c93fb2a710a519c4dc6"></a>
 544 <h2 class="memtitle"><span class="permalink"><a href="#ga1481d0cdf78f8c93fb2a710a519c4dc6">&#9670;&#160;</a></span>GIC_DistributorImplementer()</h2>
 545
 546 <div class="memitem">
 547 <div class="memproto">
 548       <table class="memname">
 549         <tr>
 550           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_DistributorImplementer </td>
 551           <td>(</td>
 552           <td class="paramtype">void&#160;</td>
 553           <td class="paramname"></td><td>)</td>
 554           <td></td>
 555         </tr>
 556       </table>
 557 </div><div class="memdoc">
 558 <dl class="section return"><dt>Returns</dt><dd><a class="el" href="structGICDistributor__Type.html#acebf65dae4cb82cd3c7deeefca9c9722" title="Offset: 0x008 (R/ ) Distributor Implementer Identification Register.">GICDistributor_Type::IIDR</a></dd></dl>
 559 <p>Provides information about the implementer and revision of the Distributor. </p>
 560
 561 </div>
 562 </div>
 563 <a id="ga7d93d39736ef5e379e6511430ee6e75f" name="ga7d93d39736ef5e379e6511430ee6e75f"></a>
 564 <h2 class="memtitle"><span class="permalink"><a href="#ga7d93d39736ef5e379e6511430ee6e75f">&#9670;&#160;</a></span>GIC_DistributorInfo()</h2>
 565
 566 <div class="memitem">
 567 <div class="memproto">
 568       <table class="memname">
 569         <tr>
 570           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_DistributorInfo </td>
 571           <td>(</td>
 572           <td class="paramtype">void&#160;</td>
 573           <td class="paramname"></td><td>)</td>
 574           <td></td>
 575         </tr>
 576       </table>
 577 </div><div class="memdoc">
 578 <dl class="section return"><dt>Returns</dt><dd><a class="el" href="structGICDistributor__Type.html#a405823d97dc90dd9d397a3980e2cd207" title="Offset: 0x004 (R/ ) Interrupt Controller Type Register.">GICDistributor_Type::TYPER</a></dd></dl>
 579 <p>Provides information about the configuration of the GIC. It indicates:</p><ul>
 580 <li>whether the GIC implements the Security Extensions</li>
 581 <li>the maximum number of interrupt IDs that the GIC supports</li>
 582 <li>the number of CPU interfaces implemented</li>
 583 <li>if the GIC implements the Security Extensions, the maximum number of implemented Lockable Shared Peripheral Interrupts (LSPIs). </li>
 584 </ul>
 585
 586 </div>
 587 </div>
 588 <a id="ga818881f69aae3eef6eb996bee6f6c63e" name="ga818881f69aae3eef6eb996bee6f6c63e"></a>
 589 <h2 class="memtitle"><span class="permalink"><a href="#ga818881f69aae3eef6eb996bee6f6c63e">&#9670;&#160;</a></span>GIC_Enable()</h2>
 590
 591 <div class="memitem">
 592 <div class="memproto">
 593       <table class="memname">
 594         <tr>
 595           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_Enable </td>
 596           <td>(</td>
 597           <td class="paramtype">void&#160;</td>
 598           <td class="paramname"></td><td>)</td>
 599           <td></td>
 600         </tr>
 601       </table>
 602 </div><div class="memdoc">
 603 <p>Initializes the distributor and the cpu interface.</p>
 604 <dl class="section see"><dt>See also</dt><dd><a class="el" href="group__GIC__functions.html#ga07acd03d02683bb6e33e7f57f5f371d1" title="Initialize the interrupt distributor.">GIC_DistInit</a> <a class="el" href="group__GIC__functions.html#ga1c93f8af9f428cda8ec066bf4bfbade9" title="Initialize the CPU&#39;s interrupt interface.">GIC_CPUInterfaceInit</a> </dd></dl>
 605
 606 </div>
 607 </div>
 608 <a id="ga0f44df6823e90178183257e096e5cac6" name="ga0f44df6823e90178183257e096e5cac6"></a>
 609 <h2 class="memtitle"><span class="permalink"><a href="#ga0f44df6823e90178183257e096e5cac6">&#9670;&#160;</a></span>GIC_EnableDistributor()</h2>
 610
 611 <div class="memitem">
 612 <div class="memproto">
 613       <table class="memname">
 614         <tr>
 615           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_EnableDistributor </td>
 616           <td>(</td>
 617           <td class="paramtype">void&#160;</td>
 618           <td class="paramname"></td><td>)</td>
 619           <td></td>
 620         </tr>
 621       </table>
 622 </div><div class="memdoc">
 623 <p>Globally enable the forwarding of interrupts to the CPU interfaces. </p>
 624
 625 </div>
 626 </div>
 627 <a id="ga758e5600d7f891e4f2f551bb45d07fce" name="ga758e5600d7f891e4f2f551bb45d07fce"></a>
 628 <h2 class="memtitle"><span class="permalink"><a href="#ga758e5600d7f891e4f2f551bb45d07fce">&#9670;&#160;</a></span>GIC_EnableInterface()</h2>
 629
 630 <div class="memitem">
 631 <div class="memproto">
 632       <table class="memname">
 633         <tr>
 634           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_EnableInterface </td>
 635           <td>(</td>
 636           <td class="paramtype">void&#160;</td>
 637           <td class="paramname"></td><td>)</td>
 638           <td></td>
 639         </tr>
 640       </table>
 641 </div><div class="memdoc">
 642 <p>Sets the Enable bit in the local CPUs <a class="el" href="structGICInterface__Type.html#a5969edab40aa24e4d96e072af187a3a9">CTLR</a> register. Only the CPU executing the call is affected. </p>
 643
 644 </div>
 645 </div>
 646 <a id="gaeba215d9c4ec3599e0a168800288c3f3" name="gaeba215d9c4ec3599e0a168800288c3f3"></a>
 647 <h2 class="memtitle"><span class="permalink"><a href="#gaeba215d9c4ec3599e0a168800288c3f3">&#9670;&#160;</a></span>GIC_EnableIRQ()</h2>
 648
 649 <div class="memitem">
 650 <div class="memproto">
 651       <table class="memname">
 652         <tr>
 653           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_EnableIRQ </td>
 654           <td>(</td>
 655           <td class="paramtype">IRQn_Type&#160;</td>
 656           <td class="paramname"><em>IRQn</em></td><td>)</td>
 657           <td></td>
 658         </tr>
 659       </table>
 660 </div><div class="memdoc">
 661 <dl class="params"><dt>Parameters</dt><dd>
 662   <table class="params">
 663     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be enabled.</td></tr>
 664   </table>
 665   </dd>
 666 </dl>
 667 <p>Enables forwarding of the corresponding interrupt to the CPU interfaces. </p>
 668
 669 </div>
 670 </div>
 671 <a id="gac23f090f572a058b4a737f6613ded9cd" name="gac23f090f572a058b4a737f6613ded9cd"></a>
 672 <h2 class="memtitle"><span class="permalink"><a href="#gac23f090f572a058b4a737f6613ded9cd">&#9670;&#160;</a></span>GIC_EndInterrupt()</h2>
 673
 674 <div class="memitem">
 675 <div class="memproto">
 676       <table class="memname">
 677         <tr>
 678           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_EndInterrupt </td>
 679           <td>(</td>
 680           <td class="paramtype">IRQn_Type&#160;</td>
 681           <td class="paramname"><em>IRQn</em></td><td>)</td>
 682           <td></td>
 683         </tr>
 684       </table>
 685 </div><div class="memdoc">
 686 <dl class="params"><dt>Parameters</dt><dd>
 687   <table class="params">
 688     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be signaled as finished.</td></tr>
 689   </table>
 690   </dd>
 691 </dl>
 692 <p>A write to this register performs priority drop for the specified interrupt.</p>
 693 <p>For nested interrupts, the order of calls to this function must be the reverse of the order of interrupt acknowledgement, i.e. calls to <a class="el" href="group__GIC__functions.html#gafc08bbc58b25fef0d24003313fd16eb8">GIC_AcknowledgePending</a>. Behavior is UNPREDICTABLE if:</p><ul>
 694 <li>This ordering constraint is not maintained.</li>
 695 <li>The given interrupt number does not match an active interrupt, or the ID of a spurious interrupt.</li>
 696 <li>The given interrupt number does not match the last valid interrupt value returned by <a class="el" href="group__GIC__functions.html#gafc08bbc58b25fef0d24003313fd16eb8">GIC_AcknowledgePending</a>. </li>
 697 </ul>
 698
 699 </div>
 700 </div>
 701 <a id="gaa7046d8206ddd4696716726e68f85906" name="gaa7046d8206ddd4696716726e68f85906"></a>
 702 <h2 class="memtitle"><span class="permalink"><a href="#gaa7046d8206ddd4696716726e68f85906">&#9670;&#160;</a></span>GIC_GetBinaryPoint()</h2>
 703
 704 <div class="memitem">
 705 <div class="memproto">
 706       <table class="memname">
 707         <tr>
 708           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_GetBinaryPoint </td>
 709           <td>(</td>
 710           <td class="paramtype">void&#160;</td>
 711           <td class="paramname"></td><td>)</td>
 712           <td></td>
 713         </tr>
 714       </table>
 715 </div><div class="memdoc">
 716 <dl class="section return"><dt>Returns</dt><dd><a class="el" href="structGICInterface__Type.html#a949317484547dc1db89c9f7ab40d1829" title="Offset: 0x008 (R/W) Binary Point Register.">GICInterface_Type::BPR</a></dd></dl>
 717 <dl class="section see"><dt>See also</dt><dd><a class="el" href="group__GIC__functions.html#ga5dfedeb5403656a77e0fef4e1cc2c0c6" title="Configures the group priority and subpriority split point using CPU&#39;s BPR register.">GIC_SetBinaryPoint</a> </dd></dl>
 718
 719 </div>
 720 </div>
 721 <a id="ga8bb27e1bab132a8df44190adb996c2a1" name="ga8bb27e1bab132a8df44190adb996c2a1"></a>
 722 <h2 class="memtitle"><span class="permalink"><a href="#ga8bb27e1bab132a8df44190adb996c2a1">&#9670;&#160;</a></span>GIC_GetHighPendingIRQ()</h2>
 723
 724 <div class="memitem">
 725 <div class="memproto">
 726       <table class="memname">
 727         <tr>
 728           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_GetHighPendingIRQ </td>
 729           <td>(</td>
 730           <td class="paramtype">void&#160;</td>
 731           <td class="paramname"></td><td>)</td>
 732           <td></td>
 733         </tr>
 734       </table>
 735 </div><div class="memdoc">
 736 <dl class="section return"><dt>Returns</dt><dd><a class="el" href="structGICInterface__Type.html#af793cd280a74bf73cca8c4fedfc329d6" title="Offset: 0x018 (R/ ) Highest Priority Pending Interrupt Register.">GICInterface_Type::HPPIR</a> </dd></dl>
 737
 738 </div>
 739 </div>
 740 <a id="gaba1b2665cdda47fc0bc3d7b90690dc50" name="gaba1b2665cdda47fc0bc3d7b90690dc50"></a>
 741 <h2 class="memtitle"><span class="permalink"><a href="#gaba1b2665cdda47fc0bc3d7b90690dc50">&#9670;&#160;</a></span>GIC_GetInterfaceId()</h2>
 742
 743 <div class="memitem">
 744 <div class="memproto">
 745       <table class="memname">
 746         <tr>
 747           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_GetInterfaceId </td>
 748           <td>(</td>
 749           <td class="paramtype">void&#160;</td>
 750           <td class="paramname"></td><td>)</td>
 751           <td></td>
 752         </tr>
 753       </table>
 754 </div><div class="memdoc">
 755 <dl class="section return"><dt>Returns</dt><dd><a class="el" href="structGICInterface__Type.html#aee78d0b6f64a7b47fbd730aabfcc86cf" title="Offset: 0x0FC (R/ ) CPU Interface Identification Register.">GICInterface_Type::IIDR</a> </dd></dl>
 756
 757 </div>
 758 </div>
 759 <a id="ga2c5f9e5637560fc9d5c29d772580a728" name="ga2c5f9e5637560fc9d5c29d772580a728"></a>
 760 <h2 class="memtitle"><span class="permalink"><a href="#ga2c5f9e5637560fc9d5c29d772580a728">&#9670;&#160;</a></span>GIC_GetInterfacePriorityMask()</h2>
 761
 762 <div class="memitem">
 763 <div class="memproto">
 764       <table class="memname">
 765         <tr>
 766           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_GetInterfacePriorityMask </td>
 767           <td>(</td>
 768           <td class="paramtype">void&#160;</td>
 769           <td class="paramname"></td><td>)</td>
 770           <td></td>
 771         </tr>
 772       </table>
 773 </div><div class="memdoc">
 774 <dl class="section return"><dt>Returns</dt><dd><a class="el" href="structGICInterface__Type.html#a0edadabc6e3ce1f36d820f0b52bc143b" title="Offset: 0x004 (R/W) Interrupt Priority Mask Register.">GICInterface_Type::PMR</a></dd></dl>
 775 <dl class="section see"><dt>See also</dt><dd><a class="el" href="group__GIC__functions.html#gaa5eb0e76dbc89596e1ce47ddb9edc4a0" title="Set the interrupt priority mask using CPU&#39;s PMR register.">GIC_SetInterfacePriorityMask</a> </dd></dl>
 776
 777 </div>
 778 </div>
 779 <a id="gabc88483ecf94a2c222b644ecfa60eb9f" name="gabc88483ecf94a2c222b644ecfa60eb9f"></a>
 780 <h2 class="memtitle"><span class="permalink"><a href="#gabc88483ecf94a2c222b644ecfa60eb9f">&#9670;&#160;</a></span>GIC_GetIRQStatus()</h2>
 781
 782 <div class="memitem">
 783 <div class="memproto">
 784       <table class="memname">
 785         <tr>
 786           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_GetIRQStatus </td>
 787           <td>(</td>
 788           <td class="paramtype">IRQn_Type&#160;</td>
 789           <td class="paramname"><em>IRQn</em></td><td>)</td>
 790           <td></td>
 791         </tr>
 792       </table>
 793 </div><div class="memdoc">
 794 <dl class="params"><dt>Parameters</dt><dd>
 795   <table class="params">
 796     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to get status for. </td></tr>
 797   </table>
 798   </dd>
 799 </dl>
 800 <dl class="section return"><dt>Returns</dt><dd>0 - not pending/active, 1 - pending, 2 - active, 3 - pending and active</dd></dl>
 801 <p>The return value is a combination of GIC's <a class="el" href="structGICDistributor__Type.html#a5eb8e1ef5a88293e2759c41f6057ccc4">ISACTIVER</a> and <a class="el" href="structGICDistributor__Type.html#a1c15cd75ce30d8946792e2a1a19556a5">ISPENDR</a> registers.</p>
 802 <p>Bit 0 denotes interrupts pending bit (interrupt should be handled) and bit 1 denotes interrupts active bit (interrupt is currently handled). </p>
 803
 804 </div>
 805 </div>
 806 <a id="ga397048004654f792649742f95bf8ae67" name="ga397048004654f792649742f95bf8ae67"></a>
 807 <h2 class="memtitle"><span class="permalink"><a href="#ga397048004654f792649742f95bf8ae67">&#9670;&#160;</a></span>GIC_GetPriority()</h2>
 808
 809 <div class="memitem">
 810 <div class="memproto">
 811       <table class="memname">
 812         <tr>
 813           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_GetPriority </td>
 814           <td>(</td>
 815           <td class="paramtype">IRQn_Type&#160;</td>
 816           <td class="paramname"><em>IRQn</em></td><td>)</td>
 817           <td></td>
 818         </tr>
 819       </table>
 820 </div><div class="memdoc">
 821 <dl class="params"><dt>Parameters</dt><dd>
 822   <table class="params">
 823     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be queried.</td></tr>
 824   </table>
 825   </dd>
 826 </dl>
 827 <p>Can be used to retrieve the actual priority depending on the GIC implementation. </p><dl class="section see"><dt>See also</dt><dd><a class="el" href="group__GIC__functions.html#ga27b9862b58290276851ec669cabf0f71" title="Set the priority for the given interrupt in the GIC&#39;s IPRIORITYR register.">GIC_SetPriority</a> </dd></dl>
 828
 829 </div>
 830 </div>
 831 <a id="gafccf881f9517592f30489bcabcb738a8" name="gafccf881f9517592f30489bcabcb738a8"></a>
 832 <h2 class="memtitle"><span class="permalink"><a href="#gafccf881f9517592f30489bcabcb738a8">&#9670;&#160;</a></span>GIC_GetTarget()</h2>
 833
 834 <div class="memitem">
 835 <div class="memproto">
 836       <table class="memname">
 837         <tr>
 838           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t GIC_GetTarget </td>
 839           <td>(</td>
 840           <td class="paramtype">IRQn_Type&#160;</td>
 841           <td class="paramname"><em>IRQn</em></td><td>)</td>
 842           <td></td>
 843         </tr>
 844       </table>
 845 </div><div class="memdoc">
 846 <dl class="params"><dt>Parameters</dt><dd>
 847   <table class="params">
 848     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt to acquire the configuration for. </td></tr>
 849   </table>
 850   </dd>
 851 </dl>
 852 <dl class="section return"><dt>Returns</dt><dd><a class="el" href="structGICDistributor__Type.html#a6f1b07d48d3a9199f2effec8492f721c" title="Offset: 0x800 (R/W) Interrupt Targets Registers.">GICDistributor_Type::ITARGETSR</a></dd></dl>
 853 <p>Read the current interrupt to CPU assignment for the given interrupt. </p><dl class="section see"><dt>See also</dt><dd><a class="el" href="group__GIC__functions.html#gae86bba705d0d4ef812b84d29d7b3ca2b" title="Sets the GIC&#39;s ITARGETSR register for the given interrupt.">GIC_SetTarget</a> </dd></dl>
 854
 855 </div>
 856 </div>
 857 <a id="ga2de8850780af26e802ee4cc43e9da6e9" name="ga2de8850780af26e802ee4cc43e9da6e9"></a>
 858 <h2 class="memtitle"><span class="permalink"><a href="#ga2de8850780af26e802ee4cc43e9da6e9">&#9670;&#160;</a></span>GIC_SendSGI()</h2>
 859
 860 <div class="memitem">
 861 <div class="memproto">
 862       <table class="memname">
 863         <tr>
 864           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_SendSGI </td>
 865           <td>(</td>
 866           <td class="paramtype">IRQn_Type&#160;</td>
 867           <td class="paramname"><em>IRQn</em>, </td>
 868         </tr>
 869         <tr>
 870           <td class="paramkey"></td>
 871           <td></td>
 872           <td class="paramtype">uint32_t&#160;</td>
 873           <td class="paramname"><em>target_list</em>, </td>
 874         </tr>
 875         <tr>
 876           <td class="paramkey"></td>
 877           <td></td>
 878           <td class="paramtype">uint32_t&#160;</td>
 879           <td class="paramname"><em>filter_list</em>&#160;</td>
 880         </tr>
 881         <tr>
 882           <td></td>
 883           <td>)</td>
 884           <td></td><td></td>
 885         </tr>
 886       </table>
 887 </div><div class="memdoc">
 888 <dl class="params"><dt>Parameters</dt><dd>
 889   <table class="params">
 890     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Software interrupt to be generated. </td></tr>
 891     <tr><td class="paramdir">[in]</td><td class="paramname">target_list</td><td>List of CPUs the software interrupt should be forwarded to. </td></tr>
 892     <tr><td class="paramdir">[in]</td><td class="paramname">filter_list</td><td>Filter to be applied to determine interrupt receivers. </td></tr>
 893   </table>
 894   </dd>
 895 </dl>
 896
 897 </div>
 898 </div>
 899 <a id="ga5dfedeb5403656a77e0fef4e1cc2c0c6" name="ga5dfedeb5403656a77e0fef4e1cc2c0c6"></a>
 900 <h2 class="memtitle"><span class="permalink"><a href="#ga5dfedeb5403656a77e0fef4e1cc2c0c6">&#9670;&#160;</a></span>GIC_SetBinaryPoint()</h2>
 901
 902 <div class="memitem">
 903 <div class="memproto">
 904       <table class="memname">
 905         <tr>
 906           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_SetBinaryPoint </td>
 907           <td>(</td>
 908           <td class="paramtype">uint32_t&#160;</td>
 909           <td class="paramname"><em>binary_point</em></td><td>)</td>
 910           <td></td>
 911         </tr>
 912       </table>
 913 </div><div class="memdoc">
 914 <dl class="params"><dt>Parameters</dt><dd>
 915   <table class="params">
 916     <tr><td class="paramdir">[in]</td><td class="paramname">binary_point</td><td>Amount of bits used as subpriority.</td></tr>
 917   </table>
 918   </dd>
 919 </dl>
 920 <p>The binary point defines the amount of priority bits used as a group priority and subpriorities.</p>
 921 <p>Interrupts sharing the same group priority do not preempt each other. But interrupts having a higher group priority (lower value) preempt interrups with a lower group priority.</p>
 922 <p>The subpriority defines the execution sequence of interrupts with the same group priority if multiple are pending at time. </p>
 923
 924 </div>
 925 </div>
 926 <a id="gaa5eb0e76dbc89596e1ce47ddb9edc4a0" name="gaa5eb0e76dbc89596e1ce47ddb9edc4a0"></a>
 927 <h2 class="memtitle"><span class="permalink"><a href="#gaa5eb0e76dbc89596e1ce47ddb9edc4a0">&#9670;&#160;</a></span>GIC_SetInterfacePriorityMask()</h2>
 928
 929 <div class="memitem">
 930 <div class="memproto">
 931       <table class="memname">
 932         <tr>
 933           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_SetInterfacePriorityMask </td>
 934           <td>(</td>
 935           <td class="paramtype">uint32_t&#160;</td>
 936           <td class="paramname"><em>priority</em></td><td>)</td>
 937           <td></td>
 938         </tr>
 939       </table>
 940 </div><div class="memdoc">
 941 <dl class="params"><dt>Parameters</dt><dd>
 942   <table class="params">
 943     <tr><td class="paramdir">[in]</td><td class="paramname">priority</td><td>Priority mask to be set.</td></tr>
 944   </table>
 945   </dd>
 946 </dl>
 947 <p>Only interrupts with a higher priority (lower values) than the value provided are signaled. </p>
 948
 949 </div>
 950 </div>
 951 <a id="ga18fbddf7f3594df141c97f61a71da47c" name="ga18fbddf7f3594df141c97f61a71da47c"></a>
 952 <h2 class="memtitle"><span class="permalink"><a href="#ga18fbddf7f3594df141c97f61a71da47c">&#9670;&#160;</a></span>GIC_SetPendingIRQ()</h2>
 953
 954 <div class="memitem">
 955 <div class="memproto">
 956       <table class="memname">
 957         <tr>
 958           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_SetPendingIRQ </td>
 959           <td>(</td>
 960           <td class="paramtype">IRQn_Type&#160;</td>
 961           <td class="paramname"><em>IRQn</em></td><td>)</td>
 962           <td></td>
 963         </tr>
 964       </table>
 965 </div><div class="memdoc">
 966 <dl class="params"><dt>Parameters</dt><dd>
 967   <table class="params">
 968     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be enabled.</td></tr>
 969   </table>
 970   </dd>
 971 </dl>
 972 <p>Adds the pending state to the corresponding interrupt. </p>
 973
 974 </div>
 975 </div>
 976 <a id="ga27b9862b58290276851ec669cabf0f71" name="ga27b9862b58290276851ec669cabf0f71"></a>
 977 <h2 class="memtitle"><span class="permalink"><a href="#ga27b9862b58290276851ec669cabf0f71">&#9670;&#160;</a></span>GIC_SetPriority()</h2>
 978
 979 <div class="memitem">
 980 <div class="memproto">
 981       <table class="memname">
 982         <tr>
 983           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_SetPriority </td>
 984           <td>(</td>
 985           <td class="paramtype">IRQn_Type&#160;</td>
 986           <td class="paramname"><em>IRQn</em>, </td>
 987         </tr>
 988         <tr>
 989           <td class="paramkey"></td>
 990           <td></td>
 991           <td class="paramtype">uint32_t&#160;</td>
 992           <td class="paramname"><em>priority</em>&#160;</td>
 993         </tr>
 994         <tr>
 995           <td></td>
 996           <td>)</td>
 997           <td></td><td></td>
 998         </tr>
 999       </table>
1000 </div><div class="memdoc">
1001 <dl class="params"><dt>Parameters</dt><dd>
1002   <table class="params">
1003     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>The interrupt to be configured. </td></tr>
1004     <tr><td class="paramdir">[in]</td><td class="paramname">priority</td><td>The priority for the interrupt, lower values denote higher priorities.</td></tr>
1005   </table>
1006   </dd>
1007 </dl>
1008 <p>Configures the priority of the given interrupt.</p>
1009 <p>The available interrupt priorities are IMPLEMENTATION DEFINED. In order to query the actual priorities one can</p>
1010 <div class="fragment"><div class="line"><a class="code hl_function" href="group__GIC__functions.html#ga27b9862b58290276851ec669cabf0f71">GIC_SetPriority</a>(IRQn_TIM1, UINT32_MAX);       <span class="comment">// try to configure lowest possible priority</span></div>
1011 <div class="line">uint32_t actual = <a class="code hl_function" href="group__GIC__functions.html#ga397048004654f792649742f95bf8ae67">GIC_GetPriority</a>(IRQn_TIM1); <span class="comment">// retrieve actual lowest priority usable</span></div>
1012 <div class="ttc" id="agroup__GIC__functions_html_ga27b9862b58290276851ec669cabf0f71"><div class="ttname"><a href="group__GIC__functions.html#ga27b9862b58290276851ec669cabf0f71">GIC_SetPriority</a></div><div class="ttdeci">__STATIC_INLINE void GIC_SetPriority(IRQn_Type IRQn, uint32_t priority)</div><div class="ttdoc">Set the priority for the given interrupt in the GIC's IPRIORITYR register.</div><div class="ttdef"><b>Definition:</b> core_ca.h:1659</div></div>
1013 <div class="ttc" id="agroup__GIC__functions_html_ga397048004654f792649742f95bf8ae67"><div class="ttname"><a href="group__GIC__functions.html#ga397048004654f792649742f95bf8ae67">GIC_GetPriority</a></div><div class="ttdeci">__STATIC_INLINE uint32_t GIC_GetPriority(IRQn_Type IRQn)</div><div class="ttdoc">Read the current interrupt priority from GIC's IPRIORITYR register.</div><div class="ttdef"><b>Definition:</b> core_ca.h:1668</div></div>
1014 </div><!-- fragment -->
1015 </div>
1016 </div>
1017 <a id="gae86bba705d0d4ef812b84d29d7b3ca2b" name="gae86bba705d0d4ef812b84d29d7b3ca2b"></a>
1018 <h2 class="memtitle"><span class="permalink"><a href="#gae86bba705d0d4ef812b84d29d7b3ca2b">&#9670;&#160;</a></span>GIC_SetTarget()</h2>
1019
1020 <div class="memitem">
1021 <div class="memproto">
1022       <table class="memname">
1023         <tr>
1024           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void GIC_SetTarget </td>
1025           <td>(</td>
1026           <td class="paramtype">IRQn_Type&#160;</td>
1027           <td class="paramname"><em>IRQn</em>, </td>
1028         </tr>
1029         <tr>
1030           <td class="paramkey"></td>
1031           <td></td>
1032           <td class="paramtype">uint32_t&#160;</td>
1033           <td class="paramname"><em>cpu_target</em>&#160;</td>
1034         </tr>
1035         <tr>
1036           <td></td>
1037           <td>)</td>
1038           <td></td><td></td>
1039         </tr>
1040       </table>
1041 </div><div class="memdoc">
1042 <dl class="params"><dt>Parameters</dt><dd>
1043   <table class="params">
1044     <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt to be configured. </td></tr>
1045     <tr><td class="paramdir">[in]</td><td class="paramname">cpu_target</td><td>CPU interfaces to assign this interrupt to.</td></tr>
1046   </table>
1047   </dd>
1048 </dl>
1049 <p>The <a class="el" href="structGICDistributor__Type.html#a6f1b07d48d3a9199f2effec8492f721c">ITARGETSR</a> registers provide an 8-bit CPU targets field for each interrupt supported by the GIC. This field stores the list of target processors for the interrupt. That is, it holds the list of CPU interfaces to which the Distributor forwards the interrupt if it is asserted and has sufficient priority. </p>
1050
1051 </div>
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