begriffs open source - cmsis/blob - main/Core_A/group__CMSIS__ISR__BITS.html

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  46    <div id="projectname">CMSIS-Core (Cortex-A)
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 129 <div class="header">
 130   <div class="summary">
 131 <a href="#define-members">Macros</a>  </div>
 132   <div class="headertitle"><div class="title">ISR Bits<div class="ingroups"><a class="el" href="group__CMSIS__core__register.html">Core Register Access</a> &raquo; <a class="el" href="group__CMSIS__ISR.html">Interrupt Status Register (ISR)</a></div></div></div>
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 134 <div class="contents">
 135
 136 <p>Bit position and mask macros.
 137 <a href="#details">More...</a></p>
 138 <table class="memberdecls">
 139 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
 140 Macros</h2></td></tr>
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 142 <tr class="memdesc:gaecf0a2cb278bfd27e0da4ab8126d98af"><td class="mdescLeft">&#160;</td><td class="mdescRight">ISR: A Position.  <br /></td></tr>
 143 <tr class="separator:gaecf0a2cb278bfd27e0da4ab8126d98af"><td class="memSeparator" colspan="2">&#160;</td></tr>
 144 <tr class="memitem:ga8c6d55d243da46ed7ca05c3941316c8d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ISR__BITS.html#ga8c6d55d243da46ed7ca05c3941316c8d">ISR_A_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ISR__BITS.html#gaecf0a2cb278bfd27e0da4ab8126d98af">ISR_A_Pos</a>)</td></tr>
 145 <tr class="memdesc:ga8c6d55d243da46ed7ca05c3941316c8d"><td class="mdescLeft">&#160;</td><td class="mdescRight">ISR: A Mask.  <br /></td></tr>
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 147 <tr class="memitem:ga9f51d4217c1394e52f5223a6cd382136"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ISR__BITS.html#ga9f51d4217c1394e52f5223a6cd382136">ISR_I_Pos</a>&#160;&#160;&#160;12U</td></tr>
 148 <tr class="memdesc:ga9f51d4217c1394e52f5223a6cd382136"><td class="mdescLeft">&#160;</td><td class="mdescRight">ISR: I Position.  <br /></td></tr>
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 150 <tr class="memitem:ga7b756c9a406d7dd0a86891656908e98c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ISR__BITS.html#ga7b756c9a406d7dd0a86891656908e98c">ISR_I_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ISR__BITS.html#ga9f51d4217c1394e52f5223a6cd382136">ISR_I_Pos</a>)</td></tr>
 151 <tr class="memdesc:ga7b756c9a406d7dd0a86891656908e98c"><td class="mdescLeft">&#160;</td><td class="mdescRight">ISR: I Mask.  <br /></td></tr>
 152 <tr class="separator:ga7b756c9a406d7dd0a86891656908e98c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 153 <tr class="memitem:gad8654422bb59e22fb7f1321eeef1b81d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ISR__BITS.html#gad8654422bb59e22fb7f1321eeef1b81d">ISR_F_Pos</a>&#160;&#160;&#160;11U</td></tr>
 154 <tr class="memdesc:gad8654422bb59e22fb7f1321eeef1b81d"><td class="mdescLeft">&#160;</td><td class="mdescRight">ISR: F Position.  <br /></td></tr>
 155 <tr class="separator:gad8654422bb59e22fb7f1321eeef1b81d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 156 <tr class="memitem:gac2efaf413c81afab4265515160f6700c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__ISR__BITS.html#gac2efaf413c81afab4265515160f6700c">ISR_F_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ISR__BITS.html#gad8654422bb59e22fb7f1321eeef1b81d">ISR_F_Pos</a>)</td></tr>
 157 <tr class="memdesc:gac2efaf413c81afab4265515160f6700c"><td class="mdescLeft">&#160;</td><td class="mdescRight">ISR: F Mask.  <br /></td></tr>
 158 <tr class="separator:gac2efaf413c81afab4265515160f6700c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 159 </table>
 160 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 161 <p>Bit position and mask macros. </p>
 162 <h2 class="groupheader">Macro Definition Documentation</h2>
 163 <a id="ga8c6d55d243da46ed7ca05c3941316c8d" name="ga8c6d55d243da46ed7ca05c3941316c8d"></a>
 164 <h2 class="memtitle"><span class="permalink"><a href="#ga8c6d55d243da46ed7ca05c3941316c8d">&#9670;&#160;</a></span>ISR_A_Msk</h2>
 165
 166 <div class="memitem">
 167 <div class="memproto">
 168       <table class="memname">
 169         <tr>
 170           <td class="memname">#define ISR_A_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ISR__BITS.html#gaecf0a2cb278bfd27e0da4ab8126d98af">ISR_A_Pos</a>)</td>
 171         </tr>
 172       </table>
 173 </div><div class="memdoc">
 174
 175 <p>ISR: A Mask. </p>
 176
 177 </div>
 178 </div>
 179 <a id="gaecf0a2cb278bfd27e0da4ab8126d98af" name="gaecf0a2cb278bfd27e0da4ab8126d98af"></a>
 180 <h2 class="memtitle"><span class="permalink"><a href="#gaecf0a2cb278bfd27e0da4ab8126d98af">&#9670;&#160;</a></span>ISR_A_Pos</h2>
 181
 182 <div class="memitem">
 183 <div class="memproto">
 184       <table class="memname">
 185         <tr>
 186           <td class="memname">#define ISR_A_Pos&#160;&#160;&#160;13U</td>
 187         </tr>
 188       </table>
 189 </div><div class="memdoc">
 190
 191 <p>ISR: A Position. </p>
 192
 193 </div>
 194 </div>
 195 <a id="gac2efaf413c81afab4265515160f6700c" name="gac2efaf413c81afab4265515160f6700c"></a>
 196 <h2 class="memtitle"><span class="permalink"><a href="#gac2efaf413c81afab4265515160f6700c">&#9670;&#160;</a></span>ISR_F_Msk</h2>
 197
 198 <div class="memitem">
 199 <div class="memproto">
 200       <table class="memname">
 201         <tr>
 202           <td class="memname">#define ISR_F_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ISR__BITS.html#gad8654422bb59e22fb7f1321eeef1b81d">ISR_F_Pos</a>)</td>
 203         </tr>
 204       </table>
 205 </div><div class="memdoc">
 206
 207 <p>ISR: F Mask. </p>
 208
 209 </div>
 210 </div>
 211 <a id="gad8654422bb59e22fb7f1321eeef1b81d" name="gad8654422bb59e22fb7f1321eeef1b81d"></a>
 212 <h2 class="memtitle"><span class="permalink"><a href="#gad8654422bb59e22fb7f1321eeef1b81d">&#9670;&#160;</a></span>ISR_F_Pos</h2>
 213
 214 <div class="memitem">
 215 <div class="memproto">
 216       <table class="memname">
 217         <tr>
 218           <td class="memname">#define ISR_F_Pos&#160;&#160;&#160;11U</td>
 219         </tr>
 220       </table>
 221 </div><div class="memdoc">
 222
 223 <p>ISR: F Position. </p>
 224
 225 </div>
 226 </div>
 227 <a id="ga7b756c9a406d7dd0a86891656908e98c" name="ga7b756c9a406d7dd0a86891656908e98c"></a>
 228 <h2 class="memtitle"><span class="permalink"><a href="#ga7b756c9a406d7dd0a86891656908e98c">&#9670;&#160;</a></span>ISR_I_Msk</h2>
 229
 230 <div class="memitem">
 231 <div class="memproto">
 232       <table class="memname">
 233         <tr>
 234           <td class="memname">#define ISR_I_Msk&#160;&#160;&#160;(1UL &lt;&lt; <a class="el" href="group__CMSIS__ISR__BITS.html#ga9f51d4217c1394e52f5223a6cd382136">ISR_I_Pos</a>)</td>
 235         </tr>
 236       </table>
 237 </div><div class="memdoc">
 238
 239 <p>ISR: I Mask. </p>
 240
 241 </div>
 242 </div>
 243 <a id="ga9f51d4217c1394e52f5223a6cd382136" name="ga9f51d4217c1394e52f5223a6cd382136"></a>
 244 <h2 class="memtitle"><span class="permalink"><a href="#ga9f51d4217c1394e52f5223a6cd382136">&#9670;&#160;</a></span>ISR_I_Pos</h2>
 245
 246 <div class="memitem">
 247 <div class="memproto">
 248       <table class="memname">
 249         <tr>
 250           <td class="memname">#define ISR_I_Pos&#160;&#160;&#160;12U</td>
 251         </tr>
 252       </table>
 253 </div><div class="memdoc">
 254
 255 <p>ISR: I Position. </p>
 256
 257 </div>
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