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 131 <a href="#groups">Content</a> &#124;
 132 <a href="#nested-classes">Data Structures</a> &#124;
 133 <a href="#func-members">Functions</a>  </div>
 134   <div class="headertitle"><div class="title">System Control Register (SCTLR)<div class="ingroups"><a class="el" href="group__CMSIS__core__register.html">Core Register Access</a></div></div></div>
 135 </div><!--header-->
 136 <div class="contents">
 137
 138 <p>The SCTLR provides the top level control of the system, including its memory system.
 139 <a href="#details">More...</a></p>
 140 <table class="memberdecls">
 141 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="groups" name="groups"></a>
 142 Content</h2></td></tr>
 143 <tr class="memitem:group__CMSIS__SCTLR__BITS"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html">SCTLR Bits</a></td></tr>
 144 <tr class="memdesc:group__CMSIS__SCTLR__BITS"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit position and mask macros. <br /></td></tr>
 145 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 146 </table><table class="memberdecls">
 147 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="nested-classes" name="nested-classes"></a>
 148 Data Structures</h2></td></tr>
 149 <tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionSCTLR__Type.html">SCTLR_Type</a></td></tr>
 150 <tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit field declaration for SCTLR layout.  <a href="unionSCTLR__Type.html#details">More...</a><br /></td></tr>
 151 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 152 </table><table class="memberdecls">
 153 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
 154 Functions</h2></td></tr>
 155 <tr class="memitem:gaf9b8e96ddd2e76c4475cf957600fd57a"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armclang__a_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR.html#gaf9b8e96ddd2e76c4475cf957600fd57a">__set_SCTLR</a> (uint32_t sctlr)</td></tr>
 156 <tr class="memdesc:gaf9b8e96ddd2e76c4475cf957600fd57a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set SCTLR.  <br /></td></tr>
 157 <tr class="separator:gaf9b8e96ddd2e76c4475cf957600fd57a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 158 <tr class="memitem:ga3070304d6180433c91c4e6daef3f3c73"><td class="memItemLeft" align="right" valign="top"><a class="el" href="cmsis__armclang__a_8h.html#ab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR.html#ga3070304d6180433c91c4e6daef3f3c73">__get_SCTLR</a> (void)</td></tr>
 159 <tr class="memdesc:ga3070304d6180433c91c4e6daef3f3c73"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get SCTLR.  <br /></td></tr>
 160 <tr class="separator:ga3070304d6180433c91c4e6daef3f3c73"><td class="memSeparator" colspan="2">&#160;</td></tr>
 161 </table>
 162 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 163 <p>The SCTLR provides the top level control of the system, including its memory system. </p>
 164 <p>In a VMSAv7 implementation, the SCTLR bit assignments are:</p>
 165 <table class="markdownTable">
 166 <tr class="markdownTableHead">
 167 <th class="markdownTableHeadLeft">Bits   </th><th class="markdownTableHeadLeft">Name   </th><th class="markdownTableHeadLeft">Function    </th></tr>
 168 <tr class="markdownTableRowOdd">
 169 <td class="markdownTableBodyLeft">[31]   </td><td class="markdownTableBodyLeft">-   </td><td class="markdownTableBodyLeft">Reserved.    </td></tr>
 170 <tr class="markdownTableRowEven">
 171 <td class="markdownTableBodyLeft">[30]   </td><td class="markdownTableBodyLeft">TE   </td><td class="markdownTableBodyLeft">Thumb Exception enable.    </td></tr>
 172 <tr class="markdownTableRowOdd">
 173 <td class="markdownTableBodyLeft">[29]   </td><td class="markdownTableBodyLeft">AFE   </td><td class="markdownTableBodyLeft">Access flag enable bit.    </td></tr>
 174 <tr class="markdownTableRowEven">
 175 <td class="markdownTableBodyLeft">[28]   </td><td class="markdownTableBodyLeft">TRE   </td><td class="markdownTableBodyLeft">TEX remap enable bit.    </td></tr>
 176 <tr class="markdownTableRowOdd">
 177 <td class="markdownTableBodyLeft">[27:26]   </td><td class="markdownTableBodyLeft">-   </td><td class="markdownTableBodyLeft">Reserved.    </td></tr>
 178 <tr class="markdownTableRowEven">
 179 <td class="markdownTableBodyLeft">[25]   </td><td class="markdownTableBodyLeft">EE   </td><td class="markdownTableBodyLeft">Exception Endianness bit.    </td></tr>
 180 <tr class="markdownTableRowOdd">
 181 <td class="markdownTableBodyLeft">[24:21]   </td><td class="markdownTableBodyLeft">-   </td><td class="markdownTableBodyLeft">Reserved.    </td></tr>
 182 <tr class="markdownTableRowEven">
 183 <td class="markdownTableBodyLeft">[20]   </td><td class="markdownTableBodyLeft">UWXN   </td><td class="markdownTableBodyLeft">Unprivileged write permission implies PL1 Execute Never (XN).    </td></tr>
 184 <tr class="markdownTableRowOdd">
 185 <td class="markdownTableBodyLeft">[19]   </td><td class="markdownTableBodyLeft">WXN   </td><td class="markdownTableBodyLeft">Write permission implies Execute Never (XN).    </td></tr>
 186 <tr class="markdownTableRowEven">
 187 <td class="markdownTableBodyLeft">[18:14]   </td><td class="markdownTableBodyLeft">-   </td><td class="markdownTableBodyLeft">Reserved.    </td></tr>
 188 <tr class="markdownTableRowOdd">
 189 <td class="markdownTableBodyLeft">[13]   </td><td class="markdownTableBodyLeft">V   </td><td class="markdownTableBodyLeft">Vectors bit.    </td></tr>
 190 <tr class="markdownTableRowEven">
 191 <td class="markdownTableBodyLeft">[12]   </td><td class="markdownTableBodyLeft">I   </td><td class="markdownTableBodyLeft">Instruction cache enable bit.    </td></tr>
 192 <tr class="markdownTableRowOdd">
 193 <td class="markdownTableBodyLeft">[11]   </td><td class="markdownTableBodyLeft">Z   </td><td class="markdownTableBodyLeft">Branch prediction enable bit.    </td></tr>
 194 <tr class="markdownTableRowEven">
 195 <td class="markdownTableBodyLeft">[10]   </td><td class="markdownTableBodyLeft">SW   </td><td class="markdownTableBodyLeft">SWP and SWPB enable bit.    </td></tr>
 196 <tr class="markdownTableRowOdd">
 197 <td class="markdownTableBodyLeft">[9:3]   </td><td class="markdownTableBodyLeft">-   </td><td class="markdownTableBodyLeft">Reserved.    </td></tr>
 198 <tr class="markdownTableRowEven">
 199 <td class="markdownTableBodyLeft">[2]   </td><td class="markdownTableBodyLeft">C   </td><td class="markdownTableBodyLeft">Cache enable bit.    </td></tr>
 200 <tr class="markdownTableRowOdd">
 201 <td class="markdownTableBodyLeft">[1]   </td><td class="markdownTableBodyLeft">A   </td><td class="markdownTableBodyLeft">Alignment bit.    </td></tr>
 202 <tr class="markdownTableRowEven">
 203 <td class="markdownTableBodyLeft">[0]   </td><td class="markdownTableBodyLeft">M   </td><td class="markdownTableBodyLeft">Address translation enable bit.   </td></tr>
 204 </table>
 205 <p>Consider using <a class="el" href="group__CMSIS__SCTLR.html#ga3070304d6180433c91c4e6daef3f3c73">__get_SCTLR</a> and <a class="el" href="group__CMSIS__SCTLR.html#gaf9b8e96ddd2e76c4475cf957600fd57a">__set_SCTLR</a> for accessing this register. </p>
 206 <h2 class="groupheader">Function Documentation</h2>
 207 <a id="ga3070304d6180433c91c4e6daef3f3c73" name="ga3070304d6180433c91c4e6daef3f3c73"></a>
 208 <h2 class="memtitle"><span class="permalink"><a href="#ga3070304d6180433c91c4e6daef3f3c73">&#9670;&#160;</a></span>__get_SCTLR()</h2>
 209
 210 <div class="memitem">
 211 <div class="memproto">
 212       <table class="memname">
 213         <tr>
 214           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t __get_SCTLR </td>
 215           <td>(</td>
 216           <td class="paramtype">void&#160;</td>
 217           <td class="paramname"></td><td>)</td>
 218           <td></td>
 219         </tr>
 220       </table>
 221 </div><div class="memdoc">
 222
 223 <p>Get SCTLR. </p>
 224 <dl class="section return"><dt>Returns</dt><dd>System Control Register value</dd></dl>
 225 <p>This function returns the value of the <a class="el" href="group__CMSIS__SCTLR.html">System Control Register (SCTLR)</a>. </p>
 226
 227 </div>
 228 </div>
 229 <a id="gaf9b8e96ddd2e76c4475cf957600fd57a" name="gaf9b8e96ddd2e76c4475cf957600fd57a"></a>
 230 <h2 class="memtitle"><span class="permalink"><a href="#gaf9b8e96ddd2e76c4475cf957600fd57a">&#9670;&#160;</a></span>__set_SCTLR()</h2>
 231
 232 <div class="memitem">
 233 <div class="memproto">
 234       <table class="memname">
 235         <tr>
 236           <td class="memname"><a class="el" href="group__comp__cntrl__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void __set_SCTLR </td>
 237           <td>(</td>
 238           <td class="paramtype">uint32_t&#160;</td>
 239           <td class="paramname"><em>sctlr</em></td><td>)</td>
 240           <td></td>
 241         </tr>
 242       </table>
 243 </div><div class="memdoc">
 244
 245 <p>Set SCTLR. </p>
 246 <p>This function assigns the given value to the System Control Register.</p>
 247 <dl class="params"><dt>Parameters</dt><dd>
 248   <table class="params">
 249     <tr><td class="paramdir">[in]</td><td class="paramname">sctlr</td><td>System Control Register value to set</td></tr>
 250   </table>
 251   </dd>
 252 </dl>
 253 <p>This function assigns the given value to the <a class="el" href="group__CMSIS__SCTLR.html">System Control Register (SCTLR)</a>. </p>
 254
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