begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.7.0-dev7">
  12       Active development...
  13       CMSIS-Core(M): 5.5.0
  14         - Fixed device config define checks.
  15       Devices:
  16         - Enable loop and branch info cache for Armv8.1-MML devices.
  17     </release>
  18     <release version="5.7.0-dev6">
  19       CMSIS-DSP:
  20         - reworked examples
  21     </release>
  22     <release version="5.7.0-dev5">
  23       CMSIS-NN: 1.3.0 (see revision history for details)
  24         - Added MVE support
  25         - Further optimizations for kernels using DSP extension
  26       CMSIS-Driver: 2.8.0
  27         - Added VIO API 0.1.0 (Preview)
  28     </release>
  29     <release version="5.7.0-dev4">
  30       CMSIS-DSP: 1.8.0 (see revision history for details)
  31         - Added new functions and function groups
  32         - Added MVE support
  33     </release>
  34     <release version="5.7.0-dev3">
  35       CMSIS-Core(M): 5.5.0
  36         - L1 Cache functions for Armv7-M and later
  37       Devices:
  38         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  39     </release>
  40     <release version="5.7.0-dev2">
  41       CMSIS-Core(M):
  42         - Cortex-M55 cpu support
  43         - Cortex-M55 core header file
  44         - PMU header file (place holder)
  45       Devices:
  46         - ARMCM55 device
  47     </release>
  48     <release version="5.7.0-dev1">
  49       Active development...
  50       CMSIS-Core(M): 5.4.0 (see revision history for details)
  51         - Enhanced MVE support for Armv8.1-MML
  52       CMSIS-RTOS2:
  53         - RTX 5.5.2 (see revision history for details)
  54       CMSIS-Driver: 2.8.0
  55         - removed volatile from status related typedefs in APIs
  56         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  57       CMSIS-Pack:
  58         - added custom attribute to components that require custom implementation
  59       Devices:
  60         - ARMv81MML startup code recognizing __MVE_USED macro
  61         - Refactored vector table references for all Cortex-M devices
  62     </release>
  63     <release version="5.6.0" date="2019-07-10">
  64       CMSIS-Core(M): 5.3.0 (see revision history for details)
  65         - Added provisions for compiler-independent C startup code.
  66       CMSIS-Core(A): 1.1.4 (see revision history for details)
  67         - Fixed __FPU_Enable.
  68       CMSIS-DSP: 1.7.0 (see revision history for details)
  69         - New Neon versions of f32 functions
  70         - Python wrapper
  71         - Preliminary cmake build
  72         - Compilation flags for FFTs
  73         - Changes to arm_math.h
  74       CMSIS-NN: 1.2.0 (see revision history for details)
  75         - New function for depthwise convolution with asymmetric quantization.
  76         - New support functions for requantization.
  77       CMSIS-RTOS:
  78         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  79       CMSIS-RTOS2:
  80         - RTX 5.5.1 (see revision history for details)
  81       CMSIS-Driver: 2.7.1
  82         - WiFi Interface API 1.0.0
  83       Devices:
  84         - Generalized C startup code for all Cortex-M familiy devices.
  85         - Updated Cortex-A default memory regions and MMU configurations
  86         - Moved Cortex-A memory and system config files to avoid include path issues
  87     </release>
  88     <release version="5.5.1" date="2019-03-20">
  89       The following folders are deprecated
  90         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  91
  92       CMSIS-Core(M): 5.2.1 (see revision history for details)
  93         - Fixed compilation issue in cmsis_armclang_ltm.h
  94     </release>
  95     <release version="5.5.0" date="2019-03-18">
  96       The following folders have been removed:
  97         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  98         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  99       The following folders are deprecated
 100         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 101
 102       CMSIS-Core(M): 5.2.0 (see revision history for details)
 103         - Reworked Stack/Heap configuration for ARM startup files.
 104         - Added Cortex-M35P device support.
 105         - Added generic Armv8.1-M Mainline device support.
 106       CMSIS-Core(A): 1.1.3 (see revision history for details)
 107       CMSIS-DSP: 1.6.0 (see revision history for details)
 108         - reworked DSP library source files
 109         - reworked DSP library documentation
 110         - Changed DSP folder structure
 111         - moved DSP libraries to folder ./DSP/Lib
 112         - ARM DSP Libraries are built with ARMCLANG
 113         - Added DSP Libraries Source variant
 114       CMSIS-RTOS2:
 115         - RTX 5.5.0 (see revision history for details)
 116       CMSIS-Driver: 2.7.0
 117         - Added WiFi Interface API 1.0.0-beta
 118         - Added components for project specific driver implementations
 119       CMSIS-Pack: 1.6.0 (see revision history for details)
 120       Devices:
 121         - Added Cortex-M35P and ARMv81MML device templates.
 122         - Fixed C-Startup Code for GCC (aligned with other compilers)
 123       Utilities:
 124         - SVDConv 3.3.25
 125         - PackChk 1.3.82
 126     </release>
 127     <release version="5.4.0" date="2018-08-01">
 128       Aligned pack structure with repository.
 129       The following folders are deprecated:
 130         - CMSIS/Include/
 131         - CMSIS/DSP_Lib/
 132
 133       CMSIS-Core(M): 5.1.2 (see revision history for details)
 134         - Added Cortex-M1 support (beta).
 135       CMSIS-Core(A): 1.1.2 (see revision history for details)
 136       CMSIS-NN: 1.1.0
 137         - Added new math functions.
 138       CMSIS-RTOS2:
 139         - API 2.1.3 (see revision history for details)
 140         - RTX 5.4.0 (see revision history for details)
 141           * Updated exception handling on Cortex-A
 142       CMSIS-Driver:
 143         - Flash Driver API V2.2.0
 144       Utilities:
 145         - SVDConv 3.3.21
 146         - PackChk 1.3.71
 147     </release>
 148     <release version="5.3.0" date="2018-02-22">
 149       Updated Arm company brand.
 150       CMSIS-Core(M): 5.1.1 (see revision history for details)
 151       CMSIS-Core(A): 1.1.1 (see revision history for details)
 152       CMSIS-DAP: 2.0.0 (see revision history for details)
 153       CMSIS-NN: 1.0.0
 154         - Initial contribution of the bare metal Neural Network Library.
 155       CMSIS-RTOS2:
 156         - RTX 5.3.0 (see revision history for details)
 157         - OS Tick API 1.0.1
 158     </release>
 159     <release version="5.2.0" date="2017-11-16">
 160       CMSIS-Core(M): 5.1.0 (see revision history for details)
 161         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 162         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 163       CMSIS-Core(A): 1.1.0 (see revision history for details)
 164         - Added compiler_iccarm.h.
 165         - Added additional access functions for physical timer.
 166       CMSIS-DAP: 1.2.0 (see revision history for details)
 167       CMSIS-DSP: 1.5.2 (see revision history for details)
 168       CMSIS-Driver: 2.6.0 (see revision history for details)
 169         - CAN Driver API V1.2.0
 170         - NAND Driver API V2.3.0
 171       CMSIS-RTOS:
 172         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 173       CMSIS-RTOS2:
 174         - API 2.1.2 (see revision history for details)
 175         - RTX 5.2.3 (see revision history for details)
 176       Devices:
 177         - Added GCC startup and linker script for Cortex-A9.
 178         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 179         - Added IAR startup code for Cortex-A9
 180     </release>
 181     <release version="5.1.1" date="2017-09-19">
 182       CMSIS-RTOS2:
 183       - RTX 5.2.1 (see revision history for details)
 184     </release>
 185     <release version="5.1.0" date="2017-08-04">
 186       CMSIS-Core(M): 5.0.2 (see revision history for details)
 187       - Changed Version Control macros to be core agnostic.
 188       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 189       CMSIS-Core(A): 1.0.0 (see revision history for details)
 190       - Initial release
 191       - IRQ Controller API 1.0.0
 192       CMSIS-Driver: 2.05 (see revision history for details)
 193       - All typedefs related to status have been made volatile.
 194       CMSIS-RTOS2:
 195       - API 2.1.1 (see revision history for details)
 196       - RTX 5.2.0 (see revision history for details)
 197       - OS Tick API 1.0.0
 198       CMSIS-DSP: 1.5.2 (see revision history for details)
 199       - Fixed GNU Compiler specific diagnostics.
 200       CMSIS-Pack: 1.5.0 (see revision history for details)
 201       - added System Description File (*.SDF) Format
 202       CMSIS-Zone: 0.0.1 (Preview)
 203       - Initial specification draft
 204     </release>
 205     <release version="5.0.1" date="2017-02-03">
 206       Package Description:
 207       - added taxonomy for Cclass RTOS
 208       CMSIS-RTOS2:
 209       - API 2.1   (see revision history for details)
 210       - RTX 5.1.0 (see revision history for details)
 211       CMSIS-Core: 5.0.1 (see revision history for details)
 212       - Added __PACKED_STRUCT macro
 213       - Added uVisior support
 214       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 215       - Updated template for secure main function (main_s.c)
 216       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 217       CMSIS-DSP: 1.5.1 (see revision history for details)
 218       - added ARMv8M DSP libraries.
 219       CMSIS-Pack:1.4.9 (see revision history for details)
 220       - added Pack Index File specification and schema file
 221     </release>
 222     <release version="5.0.0" date="2016-11-11">
 223       Changed open source license to Apache 2.0
 224       CMSIS_Core:
 225        - Added support for Cortex-M23 and Cortex-M33.
 226        - Added ARMv8-M device configurations for mainline and baseline.
 227        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 228        - Added cmsis_compiler.h to unify compiler behaviour.
 229        - Updated function SCB_EnableICache (for Cortex-M7).
 230        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 231       CMSIS-RTOS:
 232         - bug fix in RTX 4.82 (see revision history for details)
 233       CMSIS-RTOS2:
 234         - new API including compatibility layer to CMSIS-RTOS
 235         - reference implementation based on RTX5
 236         - supports all Cortex-M variants including TrustZone for ARMv8-M
 237       CMSIS-SVD:
 238        - reworked SVD format documentation
 239        - removed SVD file database documentation as SVD files are distributed in packs
 240        - updated SVDConv for Win32 and Linux
 241       CMSIS-DSP:
 242        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 243        - Added DSP libraries build projects to CMSIS pack.
 244     </release>
 245     <release version="4.5.0" date="2015-10-28">
 246       - CMSIS-Core     4.30.0  (see revision history for details)
 247       - CMSIS-DAP      1.1.0   (unchanged)
 248       - CMSIS-Driver   2.04.0  (see revision history for details)
 249       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 250       - CMSIS-Pack     1.4.1   (see revision history for details)
 251       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 252       - CMSIS-SVD      1.3.1   (see revision history for details)
 253     </release>
 254     <release version="4.4.0" date="2015-09-11">
 255       - CMSIS-Core     4.20   (see revision history for details)
 256       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 257       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 258       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 259       - CMSIS-RTOS
 260         -- API         1.02   (unchanged)
 261         -- RTX         4.79   (see revision history for details)
 262       - CMSIS-SVD      1.3.0  (see revision history for details)
 263       - CMSIS-DAP      1.1.0  (extended with SWO support)
 264     </release>
 265     <release version="4.3.0" date="2015-03-20">
 266       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 267       - CMSIS-DSP      1.4.5  (see revision history for details)
 268       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 269       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 270       - CMSIS-RTOS
 271         -- API         1.02   (unchanged)
 272         -- RTX         4.78   (see revision history for details)
 273       - CMSIS-SVD      1.2    (unchanged)
 274     </release>
 275     <release version="4.2.0" date="2014-09-24">
 276       Adding Cortex-M7 support
 277       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 278       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 279       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 280       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 281       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 282     </release>
 283     <release version="4.1.1" date="2014-06-30">
 284       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 285     </release>
 286     <release version="4.1.0" date="2014-06-12">
 287       - CMSIS-Driver   2.02  (incompatible update)
 288       - CMSIS-Pack     1.3   (see revision history for details)
 289       - CMSIS-DSP      1.4.2 (unchanged)
 290       - CMSIS-Core     3.30  (unchanged)
 291       - CMSIS-RTOS RTX 4.74  (unchanged)
 292       - CMSIS-RTOS API 1.02  (unchanged)
 293       - CMSIS-SVD      1.10  (unchanged)
 294       PACK:
 295       - removed G++ specific files from PACK
 296       - added Component Startup variant "C Startup"
 297       - added Pack Checking Utility
 298       - updated conditions to reflect tool-chain dependency
 299       - added Taxonomy for Graphics
 300       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 301     </release>
 302     <!-- release version="4.0.0">
 303       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 304       - CMSIS-Pack     1.1   Preliminary
 305       - CMSIS-DSP      1.4.2 (see revision history for details)
 306       - CMSIS-Core     3.30  (see revision history for details)
 307       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 308       - CMSIS-RTOS API 1.02  (unchanged)
 309       - CMSIS-SVD      1.10  (unchanged)
 310     </release -->
 311     <release version="3.20.4" date="2014-02-20">
 312       - CMSIS-RTOS 4.74 (see revision history for details)
 313       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 314     </release>
 315     <!-- release version="3.20.3">
 316       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 317       - CMSIS-RTOS 4.73 (see revision history for details)
 318     </release -->
 319     <!-- release version="3.20.2">
 320       - CMSIS-Pack documentation has been added
 321       - CMSIS-Drivers header and documentation have been added to PACK
 322       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 323     </release -->
 324     <!-- release version="3.20.1">
 325       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 326       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 327     </release -->
 328     <!-- release version="3.20.0">
 329       The software portions that are deployed in the application program are now under a BSD license which allows usage
 330       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 331       The individual components have been update as listed below:
 332       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 333       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 334       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 335       - CMSIS-SVD is unchanged.
 336     </release -->
 337   </releases>
 338
 339   <taxonomy>
 340     <description Cclass="Audio">Software components for audio processing</description>
 341     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 342     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 343     <description Cclass="Compiler">Compiler Software Extensions</description>
 344     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 345     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 346     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 347     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 348     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 349     <description Cclass="File System">File Drive Support and File System</description>
 350     <description Cclass="IoT Client">IoT cloud client connector</description>
 351     <description Cclass="IoT Service">IoT specific services</description>
 352     <description Cclass="IoT Utility">IoT specific software utility</description>
 353     <description Cclass="Graphics">Graphical User Interface</description>
 354     <description Cclass="Network">Network Stack using Internet Protocols</description>
 355     <description Cclass="RTOS">Real-time Operating System</description>
 356     <description Cclass="Security">Encryption for secure communication or storage</description>
 357     <description Cclass="USB">Universal Serial Bus Stack</description>
 358     <description Cclass="Utility">Generic software utility components</description>
 359   </taxonomy>
 360
 361   <devices>
 362     <!-- ******************************  Cortex-M0  ****************************** -->
 363     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 364       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 365       <description>
 366 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 367 - simple, easy-to-use programmers model
 368 - highly efficient ultra-low power operation
 369 - excellent code density
 370 - deterministic, high-performance interrupt handling
 371 - upward compatibility with the rest of the Cortex-M processor family.
 372       </description>
 373       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 374       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 375       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 376       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 377
 378       <device Dname="ARMCM0">
 379         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 380         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 381       </device>
 382     </family>
 383
 384     <!-- ******************************  Cortex-M0P  ****************************** -->
 385     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 386       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 387       <description>
 388 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 389 - simple, easy-to-use programmers model
 390 - highly efficient ultra-low power operation
 391 - excellent code density
 392 - deterministic, high-performance interrupt handling
 393 - upward compatibility with the rest of the Cortex-M processor family.
 394       </description>
 395       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 396       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 397       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 398       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 399
 400       <device Dname="ARMCM0P">
 401         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 402         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 403       </device>
 404
 405       <device Dname="ARMCM0P_MPU">
 406         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 407         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 408       </device>
 409     </family>
 410
 411     <!-- ******************************  Cortex-M1  ****************************** -->
 412     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 413       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 414       <description>
 415 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 416 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 417       </description>
 418       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 419       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 420       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 421       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 422
 423       <device Dname="ARMCM1">
 424         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 425         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 426       </device>
 427     </family>
 428
 429     <!-- ******************************  Cortex-M3  ****************************** -->
 430     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 431       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 432       <description>
 433 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 434 - simple, easy-to-use programmers model
 435 - highly efficient ultra-low power operation
 436 - excellent code density
 437 - deterministic, high-performance interrupt handling
 438 - upward compatibility with the rest of the Cortex-M processor family.
 439       </description>
 440       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 441       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 442       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 443       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 444
 445       <device Dname="ARMCM3">
 446         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 447         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 448       </device>
 449     </family>
 450
 451     <!-- ******************************  Cortex-M4  ****************************** -->
 452     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 453       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 454       <description>
 455 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 456 - simple, easy-to-use programmers model
 457 - highly efficient ultra-low power operation
 458 - excellent code density
 459 - deterministic, high-performance interrupt handling
 460 - upward compatibility with the rest of the Cortex-M processor family.
 461       </description>
 462       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 463       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 464       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 465       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 466
 467       <device Dname="ARMCM4">
 468         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 469         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 470       </device>
 471
 472       <device Dname="ARMCM4_FP">
 473         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 474         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 475       </device>
 476     </family>
 477
 478     <!-- ******************************  Cortex-M7  ****************************** -->
 479     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 480       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 481       <description>
 482 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 483 - simple, easy-to-use programmers model
 484 - highly efficient ultra-low power operation
 485 - excellent code density
 486 - deterministic, high-performance interrupt handling
 487 - upward compatibility with the rest of the Cortex-M processor family.
 488       </description>
 489       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 490       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 491       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 492       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 493
 494       <device Dname="ARMCM7">
 495         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 496         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 497       </device>
 498
 499       <device Dname="ARMCM7_SP">
 500         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 501         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 502       </device>
 503
 504       <device Dname="ARMCM7_DP">
 505         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 506         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 507       </device>
 508     </family>
 509
 510     <!-- ******************************  Cortex-M23  ********************** -->
 511     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 512       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 513       <description>
 514 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 515 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 516 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 517       </description>
 518       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 519       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 520       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 521       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 522       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 523       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 524
 525       <device Dname="ARMCM23">
 526         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 527         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 528       </device>
 529
 530       <device Dname="ARMCM23_TZ">
 531         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 532         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 533       </device>
 534     </family>
 535
 536     <!-- ******************************  Cortex-M33  ****************************** -->
 537     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 538       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 539       <description>
 540 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 541 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 542       </description>
 543       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 544       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 545       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 546       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 547       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 548       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 549
 550       <device Dname="ARMCM33">
 551         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 552         <description>
 553           no DSP Instructions, no Floating Point Unit, no TrustZone
 554         </description>
 555         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 556       </device>
 557
 558       <device Dname="ARMCM33_TZ">
 559         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 560         <description>
 561           no DSP Instructions, no Floating Point Unit, TrustZone
 562         </description>
 563         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 564       </device>
 565
 566       <device Dname="ARMCM33_DSP_FP">
 567         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 568         <description>
 569           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 570         </description>
 571         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 572       </device>
 573
 574       <device Dname="ARMCM33_DSP_FP_TZ">
 575         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 576         <description>
 577           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 578         </description>
 579         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 580       </device>
 581     </family>
 582
 583     <!-- ******************************  Cortex-M35P  ****************************** -->
 584     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 585       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 586       <description>
 587 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 588 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 589       </description>
 590
 591       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 592       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 593       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 594       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 595       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 596       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 597
 598       <device Dname="ARMCM35P">
 599         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 600         <description>
 601           no DSP Instructions, no Floating Point Unit, no TrustZone
 602         </description>
 603         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 604       </device>
 605
 606       <device Dname="ARMCM35P_TZ">
 607         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 608         <description>
 609           no DSP Instructions, no Floating Point Unit, TrustZone
 610         </description>
 611         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 612       </device>
 613
 614       <device Dname="ARMCM35P_DSP_FP">
 615         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 616         <description>
 617           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 618         </description>
 619         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 620       </device>
 621
 622       <device Dname="ARMCM35P_DSP_FP_TZ">
 623         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 624         <description>
 625           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 626         </description>
 627         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 628       </device>
 629     </family>
 630
 631     <!-- ******************************  Cortex-M55  ****************************** -->
 632     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 633       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 634       <description>
 635 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 636 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 637 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 638       </description>
 639
 640       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 641       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 642       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 643       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 644       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 645       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 646
 647       <device Dname="ARMCM55">
 648         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 649         <description>
 650           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 651         </description>
 652         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 653       </device>
 654     </family>
 655
 656     <!-- ******************************  ARMSC000  ****************************** -->
 657     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 658       <description>
 659 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 660 - simple, easy-to-use programmers model
 661 - highly efficient ultra-low power operation
 662 - excellent code density
 663 - deterministic, high-performance interrupt handling
 664       </description>
 665       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 666       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 667       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 668       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 669
 670       <device Dname="ARMSC000">
 671         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 672         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 673       </device>
 674     </family>
 675
 676     <!-- ******************************  ARMSC300  ****************************** -->
 677     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 678       <description>
 679 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 680 - simple, easy-to-use programmers model
 681 - highly efficient ultra-low power operation
 682 - excellent code density
 683 - deterministic, high-performance interrupt handling
 684       </description>
 685       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 686       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 687       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 688       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 689
 690       <device Dname="ARMSC300">
 691         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 692         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 693       </device>
 694     </family>
 695
 696     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 697     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 698       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 699       <description>
 700 Armv8-M Baseline based device with TrustZone
 701       </description>
 702       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 703       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 704       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 705       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 706       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 707       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 708
 709       <device Dname="ARMv8MBL">
 710         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 711         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 712       </device>
 713     </family>
 714
 715     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 716     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 717       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 718       <description>
 719 Armv8-M Mainline based device with TrustZone
 720       </description>
 721       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 722       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 723       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 724       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 725       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 726       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 727
 728       <device Dname="ARMv8MML">
 729         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 730         <description>
 731           no DSP Instructions, no Floating Point Unit, TrustZone
 732         </description>
 733         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 734       </device>
 735
 736       <device Dname="ARMv8MML_DSP">
 737         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 738         <description>
 739           DSP Instructions, no Floating Point Unit, TrustZone
 740         </description>
 741         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 742       </device>
 743
 744       <device Dname="ARMv8MML_SP">
 745         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 746         <description>
 747           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 748         </description>
 749         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 750       </device>
 751
 752       <device Dname="ARMv8MML_DSP_SP">
 753         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 754         <description>
 755           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 756         </description>
 757         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 758       </device>
 759
 760       <device Dname="ARMv8MML_DP">
 761         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 762         <description>
 763           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 764         </description>
 765         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 766       </device>
 767
 768       <device Dname="ARMv8MML_DSP_DP">
 769         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 770         <description>
 771           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 772         </description>
 773         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 774       </device>
 775     </family>
 776
 777     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 778     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 779       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 780       <description>
 781 Armv8.1-M Mainline based device with TrustZone and MVE
 782       </description>
 783       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 784       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 785       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 786       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 787       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 788       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 789
 790
 791       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 792         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 793         <description>
 794           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 795         </description>
 796         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 797       </device>
 798     </family>
 799
 800     <!-- ******************************  Cortex-A5  ****************************** -->
 801     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 802       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 803       <description>
 804 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 805 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 806 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 807       </description>
 808
 809       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 810       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 811       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 812       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 813
 814       <device Dname="ARMCA5">
 815         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 816         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 817       </device>
 818     </family>
 819
 820     <!-- ******************************  Cortex-A7  ****************************** -->
 821     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 822       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 823       <description>
 824 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 825 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 826 an optional integrated GIC, and an optional L2 cache controller.
 827       </description>
 828
 829       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 830       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 831       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 832       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 833
 834       <device Dname="ARMCA7">
 835         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 836         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 837       </device>
 838     </family>
 839
 840     <!-- ******************************  Cortex-A9  ****************************** -->
 841     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 842       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 843       <description>
 844 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 845 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 846 and 8-bit Java bytecodes in Jazelle state.
 847       </description>
 848
 849       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 850       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 851       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 852       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 853
 854       <device Dname="ARMCA9">
 855         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 856         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 857       </device>
 858     </family>
 859   </devices>
 860
 861
 862   <apis>
 863     <!-- CMSIS Device API -->
 864     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 865       <description>Device interrupt controller interface</description>
 866       <files>
 867         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 868       </files>
 869     </api>
 870     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 871       <description>RTOS Kernel system tick timer interface</description>
 872       <files>
 873         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 874       </files>
 875     </api>
 876     <!-- CMSIS-RTOS API -->
 877     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 878       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 879       <files>
 880         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 881       </files>
 882     </api>
 883     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 884       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 885       <files>
 886         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 887         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 888       </files>
 889     </api>
 890     <!-- CMSIS Driver API -->
 891     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 892       <description>USART Driver API for Cortex-M</description>
 893       <files>
 894         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 895         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 896       </files>
 897     </api>
 898     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 899       <description>SPI Driver API for Cortex-M</description>
 900       <files>
 901         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 902         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 903       </files>
 904     </api>
 905     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 906       <description>SAI Driver API for Cortex-M</description>
 907       <files>
 908         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 909         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 910       </files>
 911     </api>
 912     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 913       <description>I2C Driver API for Cortex-M</description>
 914       <files>
 915         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 916         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 917       </files>
 918     </api>
 919     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 920       <description>CAN Driver API for Cortex-M</description>
 921       <files>
 922         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 923         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 924       </files>
 925     </api>
 926     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 927       <description>Flash Driver API for Cortex-M</description>
 928       <files>
 929         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 930         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 931       </files>
 932     </api>
 933     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 934       <description>MCI Driver API for Cortex-M</description>
 935       <files>
 936         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 937         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 938       </files>
 939     </api>
 940     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 941       <description>NAND Flash Driver API for Cortex-M</description>
 942       <files>
 943         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 944         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 945       </files>
 946     </api>
 947     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 948       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 949       <files>
 950         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 951         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 952         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 953       </files>
 954     </api>
 955     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 956       <description>Ethernet MAC Driver API for Cortex-M</description>
 957       <files>
 958         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 959         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 960       </files>
 961     </api>
 962     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 963       <description>Ethernet PHY Driver API for Cortex-M</description>
 964       <files>
 965         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 966         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 967       </files>
 968     </api>
 969     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 970       <description>USB Device Driver API for Cortex-M</description>
 971       <files>
 972         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 973         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 974       </files>
 975     </api>
 976     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
 977       <description>USB Host Driver API for Cortex-M</description>
 978       <files>
 979         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 980         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 981       </files>
 982     </api>
 983     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
 984       <description>WiFi driver</description>
 985       <files>
 986         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 987         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 988       </files>
 989     </api>
 990     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
 991       <description>Virtual I/O</description>
 992       <files>
 993         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
 994         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
 995         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
 996       </files>
 997     </api>
 998   </apis>
 999
1000   <!-- conditions are dependency rules that can apply to a component or an individual file -->
1001   <conditions>
1002     <!-- compiler -->
1003     <condition id="ARMCC6">
1004       <accept Tcompiler="ARMCC" Toptions="AC6"/>
1005       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1006     </condition>
1007     <condition id="ARMCC5">
1008       <require Tcompiler="ARMCC" Toptions="AC5"/>
1009     </condition>
1010     <condition id="ARMCC">
1011       <require Tcompiler="ARMCC"/>
1012     </condition>
1013     <condition id="GCC">
1014       <require Tcompiler="GCC"/>
1015     </condition>
1016     <condition id="IAR">
1017       <require Tcompiler="IAR"/>
1018     </condition>
1019     <condition id="ARMCC GCC">
1020       <accept Tcompiler="ARMCC"/>
1021       <accept Tcompiler="GCC"/>
1022     </condition>
1023     <condition id="ARMCC GCC IAR">
1024       <accept Tcompiler="ARMCC"/>
1025       <accept Tcompiler="GCC"/>
1026       <accept Tcompiler="IAR"/>
1027     </condition>
1028
1029     <!-- Arm architecture -->
1030     <condition id="ARMv6-M Device">
1031       <description>Armv6-M architecture based device</description>
1032       <accept Dcore="Cortex-M0"/>
1033       <accept Dcore="Cortex-M1"/>
1034       <accept Dcore="Cortex-M0+"/>
1035       <accept Dcore="SC000"/>
1036     </condition>
1037     <condition id="ARMv7-M Device">
1038       <description>Armv7-M architecture based device</description>
1039       <accept Dcore="Cortex-M3"/>
1040       <accept Dcore="Cortex-M4"/>
1041       <accept Dcore="Cortex-M7"/>
1042       <accept Dcore="SC300"/>
1043     </condition>
1044     <condition id="ARMv8-M Device">
1045       <description>Armv8-M architecture based device</description>
1046       <accept Dcore="ARMV8MBL"/>
1047       <accept Dcore="ARMV8MML"/>
1048       <accept Dcore="ARMV81MML"/>
1049       <accept Dcore="Cortex-M23"/>
1050       <accept Dcore="Cortex-M33"/>
1051       <accept Dcore="Cortex-M35P"/>
1052       <accept Dcore="Cortex-M55"/>
1053     </condition>
1054     <condition id="ARMv6_7-M Device">
1055       <description>Armv6_7-M architecture based device</description>
1056       <accept condition="ARMv6-M Device"/>
1057       <accept condition="ARMv7-M Device"/>
1058     </condition>
1059     <condition id="ARMv6_7_8-M Device">
1060       <description>Armv6_7_8-M architecture based device</description>
1061       <accept condition="ARMv6-M Device"/>
1062       <accept condition="ARMv7-M Device"/>
1063       <accept condition="ARMv8-M Device"/>
1064     </condition>
1065     <condition id="ARMv7-A Device">
1066       <description>Armv7-A architecture based device</description>
1067       <accept Dcore="Cortex-A5"/>
1068       <accept Dcore="Cortex-A7"/>
1069       <accept Dcore="Cortex-A9"/>
1070     </condition>
1071
1072     <condition id="TrustZone">
1073       <description>TrustZone</description>
1074       <require Dtz="TZ"/>
1075     </condition>
1076     <condition id="TZ Secure">
1077       <description>TrustZone (Secure)</description>
1078       <require Dtz="TZ"/>
1079       <require Dsecure="Secure"/>
1080     </condition>
1081     <condition id="TZ Non-secure">
1082       <description>TrustZone (Non-secure)</description>
1083       <require Dtz="TZ"/>
1084       <require Dsecure="Non-secure"/>
1085     </condition>
1086
1087     <!-- ARM core -->
1088     <condition id="CM0">
1089       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1090       <accept Dcore="Cortex-M0"/>
1091       <accept Dcore="Cortex-M0+"/>
1092       <accept Dcore="SC000"/>
1093     </condition>
1094     <condition id="CM1">
1095       <description>Cortex-M1</description>
1096       <require Dcore="Cortex-M1"/>
1097     </condition>
1098     <condition id="CM3">
1099       <description>Cortex-M3 or SC300 processor based device</description>
1100       <accept Dcore="Cortex-M3"/>
1101       <accept Dcore="SC300"/>
1102     </condition>
1103     <condition id="CM4">
1104       <description>Cortex-M4 processor based device</description>
1105       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1106     </condition>
1107     <condition id="CM4_FP">
1108       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1109       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1110       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1111       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1112     </condition>
1113     <condition id="CM7">
1114       <description>Cortex-M7 processor based device</description>
1115       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1116     </condition>
1117     <condition id="CM7_FP">
1118       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1119       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1120       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1121     </condition>
1122     <condition id="CM7_SP">
1123       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1124       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1125     </condition>
1126     <condition id="CM7_DP">
1127       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1128       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1129     </condition>
1130     <condition id="CM23">
1131       <description>Cortex-M23 processor based device</description>
1132       <require Dcore="Cortex-M23"/>
1133     </condition>
1134     <condition id="CM33">
1135       <description>Cortex-M33 processor based device</description>
1136       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1137     </condition>
1138     <condition id="CM33_FP">
1139       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1140       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1141     </condition>
1142     <condition id="CM35P">
1143       <description>Cortex-M35P processor based device</description>
1144       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1145     </condition>
1146     <condition id="CM35P_FP">
1147       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1148       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1149     </condition>
1150     <condition id="ARMv8MBL">
1151       <description>Armv8-M Baseline processor based device</description>
1152       <require Dcore="ARMV8MBL"/>
1153     </condition>
1154     <condition id="ARMv8MML">
1155       <description>Armv8-M Mainline processor based device</description>
1156       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1157     </condition>
1158     <condition id="ARMv8MML_FP">
1159       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1160       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1161       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1162     </condition>
1163
1164     <condition id="CM33_NODSP_NOFPU">
1165       <description>CM33, no DSP, no FPU</description>
1166       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1167     </condition>
1168     <condition id="CM33_DSP_NOFPU">
1169       <description>CM33, DSP, no FPU</description>
1170       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1171     </condition>
1172     <condition id="CM33_NODSP_SP">
1173       <description>CM33, no DSP, SP FPU</description>
1174       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1175     </condition>
1176     <condition id="CM33_DSP_SP">
1177       <description>CM33, DSP, SP FPU</description>
1178       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1179     </condition>
1180
1181     <condition id="CM35P_NODSP_NOFPU">
1182       <description>CM35P, no DSP, no FPU</description>
1183       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1184     </condition>
1185     <condition id="CM35P_DSP_NOFPU">
1186       <description>CM35P, DSP, no FPU</description>
1187       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1188     </condition>
1189     <condition id="CM35P_NODSP_SP">
1190       <description>CM35P, no DSP, SP FPU</description>
1191       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1192     </condition>
1193     <condition id="CM35P_DSP_SP">
1194       <description>CM35P, DSP, SP FPU</description>
1195       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1196     </condition>
1197
1198     <condition id="CM55_NOFPU_NOMVE">
1199       <description>Cortex-M55, no FPU, no MVE</description>
1200       <require Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="NO_MVE"/>
1201     </condition>
1202     <condition id="CM55_NOFPU_MVE">
1203       <description>Cortex-M55, no FPU, MVE</description>
1204       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="MVE"/>
1205       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="FP_MVE"/>
1206     </condition>
1207     <condition id="CM55_FPU">
1208       <description>Cortex-M55, FPU</description>
1209       <accept  Dcore="Cortex-M55" Dfpu="SP_FPU"/>
1210       <accept  Dcore="Cortex-M55" Dfpu="DP_FPU"/>
1211     </condition>
1212
1213     <condition id="ARMv8MML_NODSP_NOFPU">
1214       <description>Armv8-M Mainline, no DSP, no FPU</description>
1215       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1216     </condition>
1217     <condition id="ARMv8MML_DSP_NOFPU">
1218       <description>Armv8-M Mainline, DSP, no FPU</description>
1219       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1220     </condition>
1221     <condition id="ARMv8MML_NODSP_SP">
1222       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1223       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1224     </condition>
1225     <condition id="ARMv8MML_DSP_SP">
1226       <description>Armv8-M Mainline, DSP, SP FPU</description>
1227       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1228     </condition>
1229
1230     <condition id="CA5_CA9">
1231       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1232       <accept Dcore="Cortex-A5"/>
1233       <accept Dcore="Cortex-A9"/>
1234     </condition>
1235
1236     <condition id="CA7">
1237       <description>Cortex-A7 processor based device</description>
1238       <accept Dcore="Cortex-A7"/>
1239     </condition>
1240
1241     <!-- ARMCC compiler -->
1242     <condition id="CA_ARMCC5">
1243       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1244       <require condition="ARMv7-A Device"/>
1245       <require condition="ARMCC5"/>
1246     </condition>
1247     <condition id="CA_ARMCC6">
1248       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1249       <require condition="ARMv7-A Device"/>
1250       <require condition="ARMCC6"/>
1251     </condition>
1252
1253     <condition id="CM0_ARMCC">
1254       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1255       <require condition="CM0"/>
1256       <require Tcompiler="ARMCC"/>
1257     </condition>
1258     <condition id="CM0_LE_ARMCC">
1259       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1260       <require condition="CM0_ARMCC"/>
1261       <require Dendian="Little-endian"/>
1262     </condition>
1263     <condition id="CM0_BE_ARMCC">
1264       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1265       <require condition="CM0_ARMCC"/>
1266       <require Dendian="Big-endian"/>
1267     </condition>
1268
1269     <condition id="CM1_ARMCC">
1270       <description>Cortex-M1 based device for the Arm Compiler</description>
1271       <require condition="CM1"/>
1272       <require Tcompiler="ARMCC"/>
1273     </condition>
1274     <condition id="CM1_LE_ARMCC">
1275       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1276       <require condition="CM1_ARMCC"/>
1277       <require Dendian="Little-endian"/>
1278     </condition>
1279     <condition id="CM1_BE_ARMCC">
1280       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1281       <require condition="CM1_ARMCC"/>
1282       <require Dendian="Big-endian"/>
1283     </condition>
1284
1285     <condition id="CM3_ARMCC">
1286       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1287       <require condition="CM3"/>
1288       <require Tcompiler="ARMCC"/>
1289     </condition>
1290     <condition id="CM3_LE_ARMCC">
1291       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1292       <require condition="CM3_ARMCC"/>
1293       <require Dendian="Little-endian"/>
1294     </condition>
1295     <condition id="CM3_BE_ARMCC">
1296       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1297       <require condition="CM3_ARMCC"/>
1298       <require Dendian="Big-endian"/>
1299     </condition>
1300
1301     <condition id="CM4_ARMCC">
1302       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1303       <require condition="CM4"/>
1304       <require Tcompiler="ARMCC"/>
1305     </condition>
1306     <condition id="CM4_LE_ARMCC">
1307       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1308       <require condition="CM4_ARMCC"/>
1309       <require Dendian="Little-endian"/>
1310     </condition>
1311     <condition id="CM4_BE_ARMCC">
1312       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1313       <require condition="CM4_ARMCC"/>
1314       <require Dendian="Big-endian"/>
1315     </condition>
1316
1317     <condition id="CM4_FP_ARMCC">
1318       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1319       <require condition="CM4_FP"/>
1320       <require Tcompiler="ARMCC"/>
1321     </condition>
1322     <condition id="CM4_FP_LE_ARMCC">
1323       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1324       <require condition="CM4_FP_ARMCC"/>
1325       <require Dendian="Little-endian"/>
1326     </condition>
1327     <condition id="CM4_FP_BE_ARMCC">
1328       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1329       <require condition="CM4_FP_ARMCC"/>
1330       <require Dendian="Big-endian"/>
1331     </condition>
1332
1333     <condition id="CM7_ARMCC">
1334       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1335       <require condition="CM7"/>
1336       <require Tcompiler="ARMCC"/>
1337     </condition>
1338     <condition id="CM7_LE_ARMCC">
1339       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1340       <require condition="CM7_ARMCC"/>
1341       <require Dendian="Little-endian"/>
1342     </condition>
1343     <condition id="CM7_BE_ARMCC">
1344       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1345       <require condition="CM7_ARMCC"/>
1346       <require Dendian="Big-endian"/>
1347     </condition>
1348
1349     <condition id="CM7_FP_ARMCC">
1350       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1351       <require condition="CM7_FP"/>
1352       <require Tcompiler="ARMCC"/>
1353     </condition>
1354     <condition id="CM7_FP_LE_ARMCC">
1355       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1356       <require condition="CM7_FP_ARMCC"/>
1357       <require Dendian="Little-endian"/>
1358     </condition>
1359     <condition id="CM7_FP_BE_ARMCC">
1360       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1361       <require condition="CM7_FP_ARMCC"/>
1362       <require Dendian="Big-endian"/>
1363     </condition>
1364
1365     <condition id="CM7_SP_ARMCC">
1366       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1367       <require condition="CM7_SP"/>
1368       <require Tcompiler="ARMCC"/>
1369     </condition>
1370     <condition id="CM7_SP_LE_ARMCC">
1371       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1372       <require condition="CM7_SP_ARMCC"/>
1373       <require Dendian="Little-endian"/>
1374     </condition>
1375     <condition id="CM7_SP_BE_ARMCC">
1376       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1377       <require condition="CM7_SP_ARMCC"/>
1378       <require Dendian="Big-endian"/>
1379     </condition>
1380
1381     <condition id="CM7_DP_ARMCC">
1382       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1383       <require condition="CM7_DP"/>
1384       <require Tcompiler="ARMCC"/>
1385     </condition>
1386     <condition id="CM7_DP_LE_ARMCC">
1387       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1388       <require condition="CM7_DP_ARMCC"/>
1389       <require Dendian="Little-endian"/>
1390     </condition>
1391     <condition id="CM7_DP_BE_ARMCC">
1392       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1393       <require condition="CM7_DP_ARMCC"/>
1394       <require Dendian="Big-endian"/>
1395     </condition>
1396
1397     <condition id="CM23_ARMCC">
1398       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1399       <require condition="CM23"/>
1400       <require Tcompiler="ARMCC"/>
1401     </condition>
1402     <condition id="CM23_LE_ARMCC">
1403       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1404       <require condition="CM23_ARMCC"/>
1405       <require Dendian="Little-endian"/>
1406     </condition>
1407
1408     <condition id="CM33_ARMCC">
1409       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1410       <require condition="CM33"/>
1411       <require Tcompiler="ARMCC"/>
1412     </condition>
1413     <condition id="CM33_LE_ARMCC">
1414       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1415       <require condition="CM33_ARMCC"/>
1416       <require Dendian="Little-endian"/>
1417     </condition>
1418
1419     <condition id="CM33_FP_ARMCC">
1420       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1421       <require condition="CM33_FP"/>
1422       <require Tcompiler="ARMCC"/>
1423     </condition>
1424     <condition id="CM33_FP_LE_ARMCC">
1425       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1426       <require condition="CM33_FP_ARMCC"/>
1427       <require Dendian="Little-endian"/>
1428     </condition>
1429
1430     <condition id="CM33_NODSP_NOFPU_ARMCC">
1431       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1432       <require condition="CM33_NODSP_NOFPU"/>
1433       <require Tcompiler="ARMCC"/>
1434     </condition>
1435     <condition id="CM33_DSP_NOFPU_ARMCC">
1436       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1437       <require condition="CM33_DSP_NOFPU"/>
1438       <require Tcompiler="ARMCC"/>
1439     </condition>
1440     <condition id="CM33_NODSP_SP_ARMCC">
1441       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1442       <require condition="CM33_NODSP_SP"/>
1443       <require Tcompiler="ARMCC"/>
1444     </condition>
1445     <condition id="CM33_DSP_SP_ARMCC">
1446       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1447       <require condition="CM33_DSP_SP"/>
1448       <require Tcompiler="ARMCC"/>
1449     </condition>
1450     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1451       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1452       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1453       <require Dendian="Little-endian"/>
1454     </condition>
1455     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1456       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1457       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1458       <require Dendian="Little-endian"/>
1459     </condition>
1460     <condition id="CM33_NODSP_SP_LE_ARMCC">
1461       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1462       <require condition="CM33_NODSP_SP_ARMCC"/>
1463       <require Dendian="Little-endian"/>
1464     </condition>
1465     <condition id="CM33_DSP_SP_LE_ARMCC">
1466       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1467       <require condition="CM33_DSP_SP_ARMCC"/>
1468       <require Dendian="Little-endian"/>
1469     </condition>
1470
1471     <condition id="CM35P_ARMCC">
1472       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1473       <require condition="CM35P"/>
1474       <require Tcompiler="ARMCC"/>
1475     </condition>
1476     <condition id="CM35P_LE_ARMCC">
1477       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1478       <require condition="CM35P_ARMCC"/>
1479       <require Dendian="Little-endian"/>
1480     </condition>
1481
1482     <condition id="CM35P_FP_ARMCC">
1483       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1484       <require condition="CM35P_FP"/>
1485       <require Tcompiler="ARMCC"/>
1486     </condition>
1487     <condition id="CM35P_FP_LE_ARMCC">
1488       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1489       <require condition="CM35P_FP_ARMCC"/>
1490       <require Dendian="Little-endian"/>
1491     </condition>
1492
1493     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1494       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1495       <require condition="CM35P_NODSP_NOFPU"/>
1496       <require Tcompiler="ARMCC"/>
1497     </condition>
1498     <condition id="CM35P_DSP_NOFPU_ARMCC">
1499       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1500       <require condition="CM35P_DSP_NOFPU"/>
1501       <require Tcompiler="ARMCC"/>
1502     </condition>
1503     <condition id="CM35P_NODSP_SP_ARMCC">
1504       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1505       <require condition="CM35P_NODSP_SP"/>
1506       <require Tcompiler="ARMCC"/>
1507     </condition>
1508     <condition id="CM35P_DSP_SP_ARMCC">
1509       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1510       <require condition="CM35P_DSP_SP"/>
1511       <require Tcompiler="ARMCC"/>
1512     </condition>
1513     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1514       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1515       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1516       <require Dendian="Little-endian"/>
1517     </condition>
1518     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1519       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1520       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1521       <require Dendian="Little-endian"/>
1522     </condition>
1523     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1524       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1525       <require condition="CM35P_NODSP_SP_ARMCC"/>
1526       <require Dendian="Little-endian"/>
1527     </condition>
1528     <condition id="CM35P_DSP_SP_LE_ARMCC">
1529       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1530       <require condition="CM35P_DSP_SP_ARMCC"/>
1531       <require Dendian="Little-endian"/>
1532     </condition>
1533
1534     <condition id="CM55_NOFPU_NOMVE_ARMCC">
1535       <description>Cortex-M55 processor, no FPU, no MVE, Arm Compiler</description>
1536       <require condition="CM55_NOFPU_NOMVE"/>
1537       <require Tcompiler="ARMCC"/>
1538     </condition>
1539     <condition id="CM55_NOFPU_MVE_ARMCC">
1540       <description>Cortex-M55 processor, no FPU, MVE, Arm Compiler</description>
1541       <require condition="CM55_NOFPU_MVE"/>
1542       <require Tcompiler="ARMCC"/>
1543     </condition>
1544     <condition id="CM55_FPU_ARMCC">
1545       <description>Cortex-M55 processor, FPU, Arm Compiler</description>
1546       <require condition="CM55_FPU"/>
1547       <require Tcompiler="ARMCC"/>
1548     </condition>
1549     <condition id="CM55_NOFPU_NOMVE_LE_ARMCC">
1550       <description>Cortex-M55 processor, little endian, no FPU, no MVE, Arm Compiler</description>
1551       <require condition="CM55_NOFPU_NOMVE_ARMCC"/>
1552       <require Dendian="Little-endian"/>
1553     </condition>
1554     <condition id="CM55_FPU_LE_ARMCC">
1555       <description>Cortex-M55 processor, little endian, FPU, Arm Compiler</description>
1556       <require condition="CM55_FPU_ARMCC"/>
1557       <require Dendian="Little-endian"/>
1558     </condition>
1559
1560     <condition id="ARMv8MBL_ARMCC">
1561       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1562       <require condition="ARMv8MBL"/>
1563       <require Tcompiler="ARMCC"/>
1564     </condition>
1565     <condition id="ARMv8MBL_LE_ARMCC">
1566       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1567       <require condition="ARMv8MBL_ARMCC"/>
1568       <require Dendian="Little-endian"/>
1569     </condition>
1570
1571     <condition id="ARMv8MML_ARMCC">
1572       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1573       <require condition="ARMv8MML"/>
1574       <require Tcompiler="ARMCC"/>
1575     </condition>
1576     <condition id="ARMv8MML_LE_ARMCC">
1577       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1578       <require condition="ARMv8MML_ARMCC"/>
1579       <require Dendian="Little-endian"/>
1580     </condition>
1581
1582     <condition id="ARMv8MML_FP_ARMCC">
1583       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1584       <require condition="ARMv8MML_FP"/>
1585       <require Tcompiler="ARMCC"/>
1586     </condition>
1587     <condition id="ARMv8MML_FP_LE_ARMCC">
1588       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1589       <require condition="ARMv8MML_FP_ARMCC"/>
1590       <require Dendian="Little-endian"/>
1591     </condition>
1592
1593     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1594       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1595       <require condition="ARMv8MML_NODSP_NOFPU"/>
1596       <require Tcompiler="ARMCC"/>
1597     </condition>
1598     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1599       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1600       <require condition="ARMv8MML_DSP_NOFPU"/>
1601       <require Tcompiler="ARMCC"/>
1602     </condition>
1603     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1604       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1605       <require condition="ARMv8MML_NODSP_SP"/>
1606       <require Tcompiler="ARMCC"/>
1607     </condition>
1608     <condition id="ARMv8MML_DSP_SP_ARMCC">
1609       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1610       <require condition="ARMv8MML_DSP_SP"/>
1611       <require Tcompiler="ARMCC"/>
1612     </condition>
1613     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1614       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1615       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1616       <require Dendian="Little-endian"/>
1617     </condition>
1618     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1619       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1620       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1621       <require Dendian="Little-endian"/>
1622     </condition>
1623     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1624       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1625       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1626       <require Dendian="Little-endian"/>
1627     </condition>
1628     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1629       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1630       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1631       <require Dendian="Little-endian"/>
1632     </condition>
1633
1634     <!-- GCC compiler -->
1635     <condition id="CA_GCC">
1636       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1637       <require condition="ARMv7-A Device"/>
1638       <require Tcompiler="GCC"/>
1639     </condition>
1640
1641     <condition id="CM0_GCC">
1642       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1643       <require condition="CM0"/>
1644       <require Tcompiler="GCC"/>
1645     </condition>
1646     <condition id="CM0_LE_GCC">
1647       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1648       <require condition="CM0_GCC"/>
1649       <require Dendian="Little-endian"/>
1650     </condition>
1651     <condition id="CM0_BE_GCC">
1652       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1653       <require condition="CM0_GCC"/>
1654       <require Dendian="Big-endian"/>
1655     </condition>
1656
1657     <condition id="CM1_GCC">
1658       <description>Cortex-M1 based device for the GCC Compiler</description>
1659       <require condition="CM1"/>
1660       <require Tcompiler="GCC"/>
1661     </condition>
1662     <condition id="CM1_LE_GCC">
1663       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1664       <require condition="CM1_GCC"/>
1665       <require Dendian="Little-endian"/>
1666     </condition>
1667     <condition id="CM1_BE_GCC">
1668       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1669       <require condition="CM1_GCC"/>
1670       <require Dendian="Big-endian"/>
1671     </condition>
1672
1673     <condition id="CM3_GCC">
1674       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1675       <require condition="CM3"/>
1676       <require Tcompiler="GCC"/>
1677     </condition>
1678     <condition id="CM3_LE_GCC">
1679       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1680       <require condition="CM3_GCC"/>
1681       <require Dendian="Little-endian"/>
1682     </condition>
1683     <condition id="CM3_BE_GCC">
1684       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1685       <require condition="CM3_GCC"/>
1686       <require Dendian="Big-endian"/>
1687     </condition>
1688
1689     <condition id="CM4_GCC">
1690       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1691       <require condition="CM4"/>
1692       <require Tcompiler="GCC"/>
1693     </condition>
1694     <condition id="CM4_LE_GCC">
1695       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1696       <require condition="CM4_GCC"/>
1697       <require Dendian="Little-endian"/>
1698     </condition>
1699     <condition id="CM4_BE_GCC">
1700       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1701       <require condition="CM4_GCC"/>
1702       <require Dendian="Big-endian"/>
1703     </condition>
1704
1705     <condition id="CM4_FP_GCC">
1706       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1707       <require condition="CM4_FP"/>
1708       <require Tcompiler="GCC"/>
1709     </condition>
1710     <condition id="CM4_FP_LE_GCC">
1711       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1712       <require condition="CM4_FP_GCC"/>
1713       <require Dendian="Little-endian"/>
1714     </condition>
1715     <condition id="CM4_FP_BE_GCC">
1716       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1717       <require condition="CM4_FP_GCC"/>
1718       <require Dendian="Big-endian"/>
1719     </condition>
1720
1721     <condition id="CM7_GCC">
1722       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1723       <require condition="CM7"/>
1724       <require Tcompiler="GCC"/>
1725     </condition>
1726     <condition id="CM7_LE_GCC">
1727       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1728       <require condition="CM7_GCC"/>
1729       <require Dendian="Little-endian"/>
1730     </condition>
1731     <condition id="CM7_BE_GCC">
1732       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1733       <require condition="CM7_GCC"/>
1734       <require Dendian="Big-endian"/>
1735     </condition>
1736
1737     <condition id="CM7_FP_GCC">
1738       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1739       <require condition="CM7_FP"/>
1740       <require Tcompiler="GCC"/>
1741     </condition>
1742     <condition id="CM7_FP_LE_GCC">
1743       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1744       <require condition="CM7_FP_GCC"/>
1745       <require Dendian="Little-endian"/>
1746     </condition>
1747     <condition id="CM7_FP_BE_GCC">
1748       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1749       <require condition="CM7_FP_GCC"/>
1750       <require Dendian="Big-endian"/>
1751     </condition>
1752
1753     <condition id="CM7_SP_GCC">
1754       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1755       <require condition="CM7_SP"/>
1756       <require Tcompiler="GCC"/>
1757     </condition>
1758     <condition id="CM7_SP_LE_GCC">
1759       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1760       <require condition="CM7_SP_GCC"/>
1761       <require Dendian="Little-endian"/>
1762     </condition>
1763
1764     <condition id="CM7_DP_GCC">
1765       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1766       <require condition="CM7_DP"/>
1767       <require Tcompiler="GCC"/>
1768     </condition>
1769     <condition id="CM7_DP_LE_GCC">
1770       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1771       <require condition="CM7_DP_GCC"/>
1772       <require Dendian="Little-endian"/>
1773     </condition>
1774
1775     <condition id="CM23_GCC">
1776       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1777       <require condition="CM23"/>
1778       <require Tcompiler="GCC"/>
1779     </condition>
1780     <condition id="CM23_LE_GCC">
1781       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1782       <require condition="CM23_GCC"/>
1783       <require Dendian="Little-endian"/>
1784     </condition>
1785
1786     <condition id="CM33_GCC">
1787       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1788       <require condition="CM33"/>
1789       <require Tcompiler="GCC"/>
1790     </condition>
1791     <condition id="CM33_LE_GCC">
1792       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1793       <require condition="CM33_GCC"/>
1794       <require Dendian="Little-endian"/>
1795     </condition>
1796
1797     <condition id="CM33_FP_GCC">
1798       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1799       <require condition="CM33_FP"/>
1800       <require Tcompiler="GCC"/>
1801     </condition>
1802     <condition id="CM33_FP_LE_GCC">
1803       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1804       <require condition="CM33_FP_GCC"/>
1805       <require Dendian="Little-endian"/>
1806     </condition>
1807
1808     <condition id="CM33_NODSP_NOFPU_GCC">
1809       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1810       <require condition="CM33_NODSP_NOFPU"/>
1811       <require Tcompiler="GCC"/>
1812     </condition>
1813     <condition id="CM33_DSP_NOFPU_GCC">
1814       <description>CM33, DSP, no FPU, GCC Compiler</description>
1815       <require condition="CM33_DSP_NOFPU"/>
1816       <require Tcompiler="GCC"/>
1817     </condition>
1818     <condition id="CM33_NODSP_SP_GCC">
1819       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1820       <require condition="CM33_NODSP_SP"/>
1821       <require Tcompiler="GCC"/>
1822     </condition>
1823     <condition id="CM33_DSP_SP_GCC">
1824       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1825       <require condition="CM33_DSP_SP"/>
1826       <require Tcompiler="GCC"/>
1827     </condition>
1828     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1829       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1830       <require condition="CM33_NODSP_NOFPU_GCC"/>
1831       <require Dendian="Little-endian"/>
1832     </condition>
1833     <condition id="CM33_DSP_NOFPU_LE_GCC">
1834       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1835       <require condition="CM33_DSP_NOFPU_GCC"/>
1836       <require Dendian="Little-endian"/>
1837     </condition>
1838     <condition id="CM33_NODSP_SP_LE_GCC">
1839       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1840       <require condition="CM33_NODSP_SP_GCC"/>
1841       <require Dendian="Little-endian"/>
1842     </condition>
1843     <condition id="CM33_DSP_SP_LE_GCC">
1844       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1845       <require condition="CM33_DSP_SP_GCC"/>
1846       <require Dendian="Little-endian"/>
1847     </condition>
1848
1849     <condition id="CM35P_GCC">
1850       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1851       <require condition="CM35P"/>
1852       <require Tcompiler="GCC"/>
1853     </condition>
1854     <condition id="CM35P_LE_GCC">
1855       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1856       <require condition="CM35P_GCC"/>
1857       <require Dendian="Little-endian"/>
1858     </condition>
1859
1860     <condition id="CM35P_FP_GCC">
1861       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1862       <require condition="CM35P_FP"/>
1863       <require Tcompiler="GCC"/>
1864     </condition>
1865     <condition id="CM35P_FP_LE_GCC">
1866       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1867       <require condition="CM35P_FP_GCC"/>
1868       <require Dendian="Little-endian"/>
1869     </condition>
1870
1871     <condition id="CM35P_NODSP_NOFPU_GCC">
1872       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1873       <require condition="CM35P_NODSP_NOFPU"/>
1874       <require Tcompiler="GCC"/>
1875     </condition>
1876     <condition id="CM35P_DSP_NOFPU_GCC">
1877       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1878       <require condition="CM35P_DSP_NOFPU"/>
1879       <require Tcompiler="GCC"/>
1880     </condition>
1881     <condition id="CM35P_NODSP_SP_GCC">
1882       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1883       <require condition="CM35P_NODSP_SP"/>
1884       <require Tcompiler="GCC"/>
1885     </condition>
1886     <condition id="CM35P_DSP_SP_GCC">
1887       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1888       <require condition="CM35P_DSP_SP"/>
1889       <require Tcompiler="GCC"/>
1890     </condition>
1891     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1892       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1893       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1894       <require Dendian="Little-endian"/>
1895     </condition>
1896     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1897       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1898       <require condition="CM35P_DSP_NOFPU_GCC"/>
1899       <require Dendian="Little-endian"/>
1900     </condition>
1901     <condition id="CM35P_NODSP_SP_LE_GCC">
1902       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1903       <require condition="CM35P_NODSP_SP_GCC"/>
1904       <require Dendian="Little-endian"/>
1905     </condition>
1906     <condition id="CM35P_DSP_SP_LE_GCC">
1907       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1908       <require condition="CM35P_DSP_SP_GCC"/>
1909       <require Dendian="Little-endian"/>
1910     </condition>
1911
1912     <condition id="CM55_NOFPU_NOMVE_GCC">
1913       <description>Cortex-M55 processor, no FPU, no MVE, GCC Compiler</description>
1914       <require condition="CM55_NOFPU_NOMVE"/>
1915       <require Tcompiler="GCC"/>
1916     </condition>
1917     <condition id="CM55_NOFPU_MVE_GCC">
1918       <description>Cortex-M55 processor, no FPU, MVE, GCC Compiler</description>
1919       <require condition="CM55_NOFPU_MVE"/>
1920       <require Tcompiler="GCC"/>
1921     </condition>
1922     <condition id="CM55_FPU_GCC">
1923       <description>Cortex-M55 processor, FPU, GCC Compiler</description>
1924       <require condition="CM55_FPU"/>
1925       <require Tcompiler="GCC"/>
1926     </condition>
1927     <condition id="CM55_NOFPU_NOMVE_LE_GCC">
1928       <description>Cortex-M55 processor, little endian, no FPU, no MVE, GCC Compiler</description>
1929       <require condition="CM55_NOFPU_NOMVE_GCC"/>
1930       <require Dendian="Little-endian"/>
1931     </condition>
1932     <condition id="CM55_FPU_LE_GCC">
1933       <description>Cortex-M55 processor, little endian, FPU, GCC Compiler</description>
1934       <require condition="CM55_FPU_GCC"/>
1935       <require Dendian="Little-endian"/>
1936     </condition>
1937
1938     <condition id="ARMv8MBL_GCC">
1939       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1940       <require condition="ARMv8MBL"/>
1941       <require Tcompiler="GCC"/>
1942     </condition>
1943     <condition id="ARMv8MBL_LE_GCC">
1944       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1945       <require condition="ARMv8MBL_GCC"/>
1946       <require Dendian="Little-endian"/>
1947     </condition>
1948
1949     <condition id="ARMv8MML_GCC">
1950       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1951       <require condition="ARMv8MML"/>
1952       <require Tcompiler="GCC"/>
1953     </condition>
1954     <condition id="ARMv8MML_LE_GCC">
1955       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1956       <require condition="ARMv8MML_GCC"/>
1957       <require Dendian="Little-endian"/>
1958     </condition>
1959
1960     <condition id="ARMv8MML_FP_GCC">
1961       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1962       <require condition="ARMv8MML_FP"/>
1963       <require Tcompiler="GCC"/>
1964     </condition>
1965     <condition id="ARMv8MML_FP_LE_GCC">
1966       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1967       <require condition="ARMv8MML_FP_GCC"/>
1968       <require Dendian="Little-endian"/>
1969     </condition>
1970
1971     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1972       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1973       <require condition="ARMv8MML_NODSP_NOFPU"/>
1974       <require Tcompiler="GCC"/>
1975     </condition>
1976     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1977       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1978       <require condition="ARMv8MML_DSP_NOFPU"/>
1979       <require Tcompiler="GCC"/>
1980     </condition>
1981     <condition id="ARMv8MML_NODSP_SP_GCC">
1982       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1983       <require condition="ARMv8MML_NODSP_SP"/>
1984       <require Tcompiler="GCC"/>
1985     </condition>
1986     <condition id="ARMv8MML_DSP_SP_GCC">
1987       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1988       <require condition="ARMv8MML_DSP_SP"/>
1989       <require Tcompiler="GCC"/>
1990     </condition>
1991     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1992       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1993       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1994       <require Dendian="Little-endian"/>
1995     </condition>
1996     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1997       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1998       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1999       <require Dendian="Little-endian"/>
2000     </condition>
2001     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
2002       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
2003       <require condition="ARMv8MML_NODSP_SP_GCC"/>
2004       <require Dendian="Little-endian"/>
2005     </condition>
2006     <condition id="ARMv8MML_DSP_SP_LE_GCC">
2007       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
2008       <require condition="ARMv8MML_DSP_SP_GCC"/>
2009       <require Dendian="Little-endian"/>
2010     </condition>
2011
2012     <!-- IAR compiler -->
2013     <condition id="CA_IAR">
2014       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
2015       <require condition="ARMv7-A Device"/>
2016       <require Tcompiler="IAR"/>
2017     </condition>
2018
2019     <condition id="CM0_IAR">
2020       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
2021       <require condition="CM0"/>
2022       <require Tcompiler="IAR"/>
2023     </condition>
2024     <condition id="CM0_LE_IAR">
2025       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
2026       <require condition="CM0_IAR"/>
2027       <require Dendian="Little-endian"/>
2028     </condition>
2029     <condition id="CM0_BE_IAR">
2030       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
2031       <require condition="CM0_IAR"/>
2032       <require Dendian="Big-endian"/>
2033     </condition>
2034
2035     <condition id="CM1_IAR">
2036       <description>Cortex-M1 based device for the IAR Compiler</description>
2037       <require condition="CM1"/>
2038       <require Tcompiler="IAR"/>
2039     </condition>
2040     <condition id="CM1_LE_IAR">
2041       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
2042       <require condition="CM1_IAR"/>
2043       <require Dendian="Little-endian"/>
2044     </condition>
2045     <condition id="CM1_BE_IAR">
2046       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
2047       <require condition="CM1_IAR"/>
2048       <require Dendian="Big-endian"/>
2049     </condition>
2050
2051     <condition id="CM3_IAR">
2052       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
2053       <require condition="CM3"/>
2054       <require Tcompiler="IAR"/>
2055     </condition>
2056     <condition id="CM3_LE_IAR">
2057       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
2058       <require condition="CM3_IAR"/>
2059       <require Dendian="Little-endian"/>
2060     </condition>
2061     <condition id="CM3_BE_IAR">
2062       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
2063       <require condition="CM3_IAR"/>
2064       <require Dendian="Big-endian"/>
2065     </condition>
2066
2067     <condition id="CM4_IAR">
2068       <description>Cortex-M4 processor based device for the IAR Compiler</description>
2069       <require condition="CM4"/>
2070       <require Tcompiler="IAR"/>
2071     </condition>
2072     <condition id="CM4_LE_IAR">
2073       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
2074       <require condition="CM4_IAR"/>
2075       <require Dendian="Little-endian"/>
2076     </condition>
2077     <condition id="CM4_BE_IAR">
2078       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
2079       <require condition="CM4_IAR"/>
2080       <require Dendian="Big-endian"/>
2081     </condition>
2082
2083     <condition id="CM4_FP_IAR">
2084       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
2085       <require condition="CM4_FP"/>
2086       <require Tcompiler="IAR"/>
2087     </condition>
2088     <condition id="CM4_FP_LE_IAR">
2089       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2090       <require condition="CM4_FP_IAR"/>
2091       <require Dendian="Little-endian"/>
2092     </condition>
2093     <condition id="CM4_FP_BE_IAR">
2094       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2095       <require condition="CM4_FP_IAR"/>
2096       <require Dendian="Big-endian"/>
2097     </condition>
2098
2099     <condition id="CM7_IAR">
2100       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2101       <require condition="CM7"/>
2102       <require Tcompiler="IAR"/>
2103     </condition>
2104     <condition id="CM7_LE_IAR">
2105       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2106       <require condition="CM7_IAR"/>
2107       <require Dendian="Little-endian"/>
2108     </condition>
2109     <condition id="CM7_BE_IAR">
2110       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2111       <require condition="CM7_IAR"/>
2112       <require Dendian="Big-endian"/>
2113     </condition>
2114
2115     <condition id="CM7_FP_IAR">
2116       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2117       <require condition="CM7_FP"/>
2118       <require Tcompiler="IAR"/>
2119     </condition>
2120     <condition id="CM7_FP_LE_IAR">
2121       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2122       <require condition="CM7_FP_IAR"/>
2123       <require Dendian="Little-endian"/>
2124     </condition>
2125     <condition id="CM7_FP_BE_IAR">
2126       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2127       <require condition="CM7_FP_IAR"/>
2128       <require Dendian="Big-endian"/>
2129     </condition>
2130
2131     <condition id="CM7_SP_IAR">
2132       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2133       <require condition="CM7_SP"/>
2134       <require Tcompiler="IAR"/>
2135     </condition>
2136     <condition id="CM7_SP_LE_IAR">
2137       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2138       <require condition="CM7_SP_IAR"/>
2139       <require Dendian="Little-endian"/>
2140     </condition>
2141     <condition id="CM7_SP_BE_IAR">
2142       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2143       <require condition="CM7_SP_IAR"/>
2144       <require Dendian="Big-endian"/>
2145     </condition>
2146
2147     <condition id="CM7_DP_IAR">
2148       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2149       <require condition="CM7_DP"/>
2150       <require Tcompiler="IAR"/>
2151     </condition>
2152     <condition id="CM7_DP_LE_IAR">
2153       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2154       <require condition="CM7_DP_IAR"/>
2155       <require Dendian="Little-endian"/>
2156     </condition>
2157     <condition id="CM7_DP_BE_IAR">
2158       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2159       <require condition="CM7_DP_IAR"/>
2160       <require Dendian="Big-endian"/>
2161     </condition>
2162
2163     <condition id="CM23_IAR">
2164       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2165       <require condition="CM23"/>
2166       <require Tcompiler="IAR"/>
2167     </condition>
2168     <condition id="CM23_LE_IAR">
2169       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2170       <require condition="CM23_IAR"/>
2171       <require Dendian="Little-endian"/>
2172     </condition>
2173
2174     <condition id="CM33_IAR">
2175       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2176       <require condition="CM33"/>
2177       <require Tcompiler="IAR"/>
2178     </condition>
2179     <condition id="CM33_LE_IAR">
2180       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2181       <require condition="CM33_IAR"/>
2182       <require Dendian="Little-endian"/>
2183     </condition>
2184
2185     <condition id="CM33_FP_IAR">
2186       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2187       <require condition="CM33_FP"/>
2188       <require Tcompiler="IAR"/>
2189     </condition>
2190     <condition id="CM33_FP_LE_IAR">
2191       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2192       <require condition="CM33_FP_IAR"/>
2193       <require Dendian="Little-endian"/>
2194     </condition>
2195
2196     <condition id="CM33_NODSP_NOFPU_IAR">
2197       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2198       <require condition="CM33_NODSP_NOFPU"/>
2199       <require Tcompiler="IAR"/>
2200     </condition>
2201     <condition id="CM33_DSP_NOFPU_IAR">
2202       <description>CM33, DSP, no FPU, IAR Compiler</description>
2203       <require condition="CM33_DSP_NOFPU"/>
2204       <require Tcompiler="IAR"/>
2205     </condition>
2206     <condition id="CM33_NODSP_SP_IAR">
2207       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2208       <require condition="CM33_NODSP_SP"/>
2209       <require Tcompiler="IAR"/>
2210     </condition>
2211     <condition id="CM33_DSP_SP_IAR">
2212       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2213       <require condition="CM33_DSP_SP"/>
2214       <require Tcompiler="IAR"/>
2215     </condition>
2216     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2217       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2218       <require condition="CM33_NODSP_NOFPU_IAR"/>
2219       <require Dendian="Little-endian"/>
2220     </condition>
2221     <condition id="CM33_DSP_NOFPU_LE_IAR">
2222       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2223       <require condition="CM33_DSP_NOFPU_IAR"/>
2224       <require Dendian="Little-endian"/>
2225     </condition>
2226     <condition id="CM33_NODSP_SP_LE_IAR">
2227       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2228       <require condition="CM33_NODSP_SP_IAR"/>
2229       <require Dendian="Little-endian"/>
2230     </condition>
2231     <condition id="CM33_DSP_SP_LE_IAR">
2232       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2233       <require condition="CM33_DSP_SP_IAR"/>
2234       <require Dendian="Little-endian"/>
2235     </condition>
2236
2237     <condition id="CM35P_IAR">
2238       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2239       <require condition="CM35P"/>
2240       <require Tcompiler="IAR"/>
2241     </condition>
2242     <condition id="CM35P_LE_IAR">
2243       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2244       <require condition="CM35P_IAR"/>
2245       <require Dendian="Little-endian"/>
2246     </condition>
2247
2248     <condition id="CM35P_FP_IAR">
2249       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2250       <require condition="CM35P_FP"/>
2251       <require Tcompiler="IAR"/>
2252     </condition>
2253     <condition id="CM35P_FP_LE_IAR">
2254       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2255       <require condition="CM35P_FP_IAR"/>
2256       <require Dendian="Little-endian"/>
2257     </condition>
2258
2259     <condition id="CM35P_NODSP_NOFPU_IAR">
2260       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2261       <require condition="CM35P_NODSP_NOFPU"/>
2262       <require Tcompiler="IAR"/>
2263     </condition>
2264     <condition id="CM35P_DSP_NOFPU_IAR">
2265       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2266       <require condition="CM35P_DSP_NOFPU"/>
2267       <require Tcompiler="IAR"/>
2268     </condition>
2269     <condition id="CM35P_NODSP_SP_IAR">
2270       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2271       <require condition="CM35P_NODSP_SP"/>
2272       <require Tcompiler="IAR"/>
2273     </condition>
2274     <condition id="CM35P_DSP_SP_IAR">
2275       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2276       <require condition="CM35P_DSP_SP"/>
2277       <require Tcompiler="IAR"/>
2278     </condition>
2279     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2280       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2281       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2282       <require Dendian="Little-endian"/>
2283     </condition>
2284     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2285       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2286       <require condition="CM35P_DSP_NOFPU_IAR"/>
2287       <require Dendian="Little-endian"/>
2288     </condition>
2289     <condition id="CM35P_NODSP_SP_LE_IAR">
2290       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2291       <require condition="CM35P_NODSP_SP_IAR"/>
2292       <require Dendian="Little-endian"/>
2293     </condition>
2294     <condition id="CM35P_DSP_SP_LE_IAR">
2295       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2296       <require condition="CM35P_DSP_SP_IAR"/>
2297       <require Dendian="Little-endian"/>
2298     </condition>
2299
2300     <condition id="CM55_NOFPU_NOMVE_IAR">
2301       <description>Cortex-M55 processor, no FPU, no MVE, IAR Compiler</description>
2302       <require condition="CM55_NOFPU_NOMVE"/>
2303       <require Tcompiler="IAR"/>
2304     </condition>
2305     <condition id="CM55_NOFPU_MVE_IAR">
2306       <description>Cortex-M55 processor, no FPU, MVE, IAR Compiler</description>
2307       <require condition="CM55_NOFPU_MVE"/>
2308       <require Tcompiler="IAR"/>
2309     </condition>
2310     <condition id="CM55_FPU_IAR">
2311       <description>Cortex-M55 processor, FPU, IAR Compiler</description>
2312       <require condition="CM55_FPU"/>
2313       <require Tcompiler="IAR"/>
2314     </condition>
2315     <condition id="CM55_NOFPU_NOMVE_LE_IAR">
2316       <description>Cortex-M55 processor, little endian, no FPU, no MVE, IAR Compiler</description>
2317       <require condition="CM55_NOFPU_NOMVE_IAR"/>
2318       <require Dendian="Little-endian"/>
2319     </condition>
2320     <condition id="CM55_FPU_LE_IAR">
2321       <description>Cortex-M55 processor, little endian, FPU, IAR Compiler</description>
2322       <require condition="CM55_FPU_IAR"/>
2323       <require Dendian="Little-endian"/>
2324     </condition>
2325
2326     <condition id="ARMv8MBL_IAR">
2327       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2328       <require condition="ARMv8MBL"/>
2329       <require Tcompiler="IAR"/>
2330     </condition>
2331     <condition id="ARMv8MBL_LE_IAR">
2332       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2333       <require condition="ARMv8MBL_IAR"/>
2334       <require Dendian="Little-endian"/>
2335     </condition>
2336
2337     <condition id="ARMv8MML_IAR">
2338       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2339       <require condition="ARMv8MML"/>
2340       <require Tcompiler="IAR"/>
2341     </condition>
2342     <condition id="ARMv8MML_LE_IAR">
2343       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2344       <require condition="ARMv8MML_IAR"/>
2345       <require Dendian="Little-endian"/>
2346     </condition>
2347
2348     <condition id="ARMv8MML_FP_IAR">
2349       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2350       <require condition="ARMv8MML_FP"/>
2351       <require Tcompiler="IAR"/>
2352     </condition>
2353     <condition id="ARMv8MML_FP_LE_IAR">
2354       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2355       <require condition="ARMv8MML_FP_IAR"/>
2356       <require Dendian="Little-endian"/>
2357     </condition>
2358
2359     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2360       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2361       <require condition="ARMv8MML_NODSP_NOFPU"/>
2362       <require Tcompiler="IAR"/>
2363     </condition>
2364     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2365       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2366       <require condition="ARMv8MML_DSP_NOFPU"/>
2367       <require Tcompiler="IAR"/>
2368     </condition>
2369     <condition id="ARMv8MML_NODSP_SP_IAR">
2370       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2371       <require condition="ARMv8MML_NODSP_SP"/>
2372       <require Tcompiler="IAR"/>
2373     </condition>
2374     <condition id="ARMv8MML_DSP_SP_IAR">
2375       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2376       <require condition="ARMv8MML_DSP_SP"/>
2377       <require Tcompiler="IAR"/>
2378     </condition>
2379     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2380       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2381       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2382       <require Dendian="Little-endian"/>
2383     </condition>
2384     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2385       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2386       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2387       <require Dendian="Little-endian"/>
2388     </condition>
2389     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2390       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2391       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2392       <require Dendian="Little-endian"/>
2393     </condition>
2394     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2395       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2396       <require condition="ARMv8MML_DSP_SP_IAR"/>
2397       <require Dendian="Little-endian"/>
2398     </condition>
2399
2400     <!-- conditions selecting single devices and CMSIS Core -->
2401     <condition id="ARMCM0 CMSIS">
2402       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2403       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2404       <require Cclass="CMSIS" Cgroup="CORE"/>
2405     </condition>
2406
2407     <condition id="ARMCM0+ CMSIS">
2408       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2409       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2410       <require Cclass="CMSIS" Cgroup="CORE"/>
2411     </condition>
2412
2413     <condition id="ARMCM1 CMSIS">
2414       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2415       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2416       <require Cclass="CMSIS" Cgroup="CORE"/>
2417     </condition>
2418
2419     <condition id="ARMCM3 CMSIS">
2420       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2421       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2422       <require Cclass="CMSIS" Cgroup="CORE"/>
2423     </condition>
2424
2425     <condition id="ARMCM4 CMSIS">
2426       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2427       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2428       <require Cclass="CMSIS" Cgroup="CORE"/>
2429     </condition>
2430
2431     <condition id="ARMCM7 CMSIS">
2432       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2433       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2434       <require Cclass="CMSIS" Cgroup="CORE"/>
2435     </condition>
2436
2437     <condition id="ARMCM23 CMSIS">
2438       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2439       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2440       <require Cclass="CMSIS" Cgroup="CORE"/>
2441     </condition>
2442
2443     <condition id="ARMCM33 CMSIS">
2444       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2445       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2446       <require Cclass="CMSIS" Cgroup="CORE"/>
2447     </condition>
2448
2449     <condition id="ARMCM35P CMSIS">
2450       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2451       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2452       <require Cclass="CMSIS" Cgroup="CORE"/>
2453     </condition>
2454
2455     <condition id="ARMCM55 CMSIS">
2456       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2457       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2458       <require Cclass="CMSIS" Cgroup="CORE"/>
2459     </condition>
2460
2461     <condition id="ARMSC000 CMSIS">
2462       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2463       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2464       <require Cclass="CMSIS" Cgroup="CORE"/>
2465     </condition>
2466
2467     <condition id="ARMSC300 CMSIS">
2468       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2469       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2470       <require Cclass="CMSIS" Cgroup="CORE"/>
2471     </condition>
2472
2473     <condition id="ARMv8MBL CMSIS">
2474       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2475       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2476       <require Cclass="CMSIS" Cgroup="CORE"/>
2477     </condition>
2478
2479     <condition id="ARMv8MML CMSIS">
2480       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2481       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2482       <require Cclass="CMSIS" Cgroup="CORE"/>
2483     </condition>
2484
2485     <condition id="ARMv81MML CMSIS">
2486       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2487       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2488       <require Cclass="CMSIS" Cgroup="CORE"/>
2489     </condition>
2490
2491     <condition id="ARMCA5 CMSIS">
2492       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2493       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2494       <require Cclass="CMSIS" Cgroup="CORE"/>
2495     </condition>
2496
2497     <condition id="ARMCA7 CMSIS">
2498       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2499       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2500       <require Cclass="CMSIS" Cgroup="CORE"/>
2501     </condition>
2502
2503     <condition id="ARMCA9 CMSIS">
2504       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2505       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2506       <require Cclass="CMSIS" Cgroup="CORE"/>
2507     </condition>
2508
2509     <!-- CMSIS DSP -->
2510     <condition id="CMSIS DSP">
2511       <description>Components required for DSP</description>
2512       <require condition="ARMv6_7_8-M Device"/>
2513       <require condition="ARMCC GCC IAR"/>
2514       <require Cclass="CMSIS" Cgroup="CORE"/>
2515     </condition>
2516
2517     <!-- CMSIS NN -->
2518     <condition id="CMSIS NN">
2519       <description>Components required for NN</description>
2520       <require Cclass="CMSIS" Cgroup="DSP"/>
2521     </condition>
2522
2523     <!-- RTOS RTX -->
2524     <condition id="RTOS RTX">
2525       <description>Components required for RTOS RTX</description>
2526       <require condition="ARMv6_7-M Device"/>
2527       <require condition="ARMCC GCC IAR"/>
2528       <require Cclass="Device" Cgroup="Startup"/>
2529       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2530     </condition>
2531     <condition id="RTOS RTX IFX">
2532       <description>Components required for RTOS RTX IFX</description>
2533       <require condition="ARMv6_7-M Device"/>
2534       <require condition="ARMCC GCC IAR"/>
2535       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2536       <require Cclass="Device" Cgroup="Startup"/>
2537       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2538     </condition>
2539     <condition id="RTOS RTX5">
2540       <description>Components required for RTOS RTX5</description>
2541       <require condition="ARMv6_7_8-M Device"/>
2542       <require condition="ARMCC GCC IAR"/>
2543       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2544     </condition>
2545     <condition id="RTOS2 RTX5">
2546       <description>Components required for RTOS2 RTX5</description>
2547       <require condition="ARMv6_7_8-M Device"/>
2548       <require condition="ARMCC GCC IAR"/>
2549       <require Cclass="CMSIS"  Cgroup="CORE"/>
2550       <require Cclass="Device" Cgroup="Startup"/>
2551     </condition>
2552     <condition id="RTOS2 RTX5 v7-A">
2553       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2554       <require condition="ARMv7-A Device"/>
2555       <require condition="ARMCC GCC IAR"/>
2556       <require Cclass="CMSIS"  Cgroup="CORE"/>
2557       <require Cclass="Device" Cgroup="Startup"/>
2558       <require Cclass="Device" Cgroup="OS Tick"/>
2559       <require Cclass="Device" Cgroup="IRQ Controller"/>
2560     </condition>
2561     <condition id="RTOS2 RTX5 NS">
2562       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2563       <require condition="ARMv8-M Device"/>
2564       <require condition="TZ Non-secure"/>
2565       <require condition="ARMCC GCC IAR"/>
2566       <require Cclass="CMSIS"  Cgroup="CORE"/>
2567       <require Cclass="Device" Cgroup="Startup"/>
2568     </condition>
2569
2570     <!-- OS Tick -->
2571     <condition id="OS Tick PTIM">
2572       <description>Components required for OS Tick Private Timer</description>
2573       <require condition="CA5_CA9"/>
2574       <require Cclass="Device" Cgroup="IRQ Controller"/>
2575     </condition>
2576
2577     <condition id="OS Tick GTIM">
2578       <description>Components required for OS Tick Generic Physical Timer</description>
2579       <require condition="CA7"/>
2580       <require Cclass="Device" Cgroup="IRQ Controller"/>
2581     </condition>
2582
2583   </conditions>
2584
2585   <components>
2586     <!-- CMSIS-Core component -->
2587     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.4.0"  condition="ARMv6_7_8-M Device" >
2588       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2589       <files>
2590         <!-- CPU independent -->
2591         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2592         <file category="include" name="CMSIS/Core/Include/"/>
2593         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
2594         <!-- Code template -->
2595         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2596         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2597       </files>
2598     </component>
2599
2600     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.4"  condition="ARMv7-A Device" >
2601       <description>CMSIS-CORE for Cortex-A</description>
2602       <files>
2603         <!-- CPU independent -->
2604         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2605         <file category="include" name="CMSIS/Core_A/Include/"/>
2606       </files>
2607     </component>
2608
2609     <!-- CMSIS-Startup components -->
2610     <!-- Cortex-M0 -->
2611     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM0 CMSIS">
2612       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2613       <files>
2614         <!-- include folder / device header file -->
2615         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2616         <!-- startup / system file -->
2617         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.2" attr="config"/>
2618         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2619         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2620         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2621         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2622       </files>
2623     </component>
2624     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2625       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2626       <files>
2627         <!-- include folder / device header file -->
2628         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2629         <!-- startup / system file -->
2630         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2631         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.0.1" attr="config" condition="GCC"/>
2632         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2633         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2634         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2635       </files>
2636     </component>
2637
2638     <!-- Cortex-M0+ -->
2639     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM0+ CMSIS">
2640       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2641       <files>
2642         <!-- include folder / device header file -->
2643         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2644         <!-- startup / system file -->
2645         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.2" attr="config"/>
2646         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2647         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2648         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2649         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2650       </files>
2651     </component>
2652     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0+ CMSIS">
2653       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2654       <files>
2655         <!-- include folder / device header file -->
2656         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2657         <!-- startup / system file -->
2658         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2659         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.0.1" attr="config" condition="GCC"/>
2660         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2661         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2662         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2663       </files>
2664     </component>
2665
2666     <!-- Cortex-M1 -->
2667     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM1 CMSIS">
2668       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2669       <files>
2670         <!-- include folder / device header file -->
2671         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2672         <!-- startup / system file -->
2673         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.2" attr="config"/>
2674         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2675         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2676         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2677         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2678       </files>
2679     </component>
2680     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2681       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2682       <files>
2683         <!-- include folder / device header file -->
2684         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2685         <!-- startup / system file -->
2686         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2687         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.0.1" attr="config" condition="GCC"/>
2688         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2689         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2690         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2691       </files>
2692     </component>
2693
2694     <!-- Cortex-M3 -->
2695     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM3 CMSIS">
2696       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2697       <files>
2698         <!-- include folder / device header file -->
2699         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2700         <!-- startup / system file -->
2701         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.2" attr="config"/>
2702         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2703         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2704         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2705         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2706       </files>
2707     </component>
2708     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2709       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2710       <files>
2711         <!-- include folder / device header file -->
2712         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2713         <!-- startup / system file -->
2714         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2715         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.0.1" attr="config" condition="GCC"/>
2716         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2717         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2718         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2719       </files>
2720     </component>
2721
2722     <!-- Cortex-M4 -->
2723     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM4 CMSIS">
2724       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2725       <files>
2726         <!-- include folder / device header file -->
2727         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2728         <!-- startup / system file -->
2729         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.2" attr="config"/>
2730         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2731         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2732         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2733        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2734       </files>
2735     </component>
2736     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2737       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2738       <files>
2739         <!-- include folder / device header file -->
2740         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2741         <!-- startup / system file -->
2742         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2743         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.0.1" attr="config" condition="GCC"/>
2744         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2745         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2746         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2747       </files>
2748     </component>
2749
2750     <!-- Cortex-M7 -->
2751     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM7 CMSIS">
2752       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2753       <files>
2754         <!-- include folder / device header file -->
2755         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2756         <!-- startup / system file -->
2757         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.2" attr="config"/>
2758         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2759         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2760         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2761         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2762       </files>
2763     </component>
2764     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2765       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2766       <files>
2767         <!-- include folder / device header file -->
2768         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2769         <!-- startup / system file -->
2770         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2771         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.0.1" attr="config" condition="GCC"/>
2772         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2773         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2774         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2775       </files>
2776     </component>
2777
2778     <!-- Cortex-M23 -->
2779     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM23 CMSIS">
2780       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2781       <files>
2782         <!-- include folder / device header file -->
2783         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2784         <!-- startup / system file -->
2785         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.2" attr="config"/>
2786         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
2787         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2788         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2789         <!-- SAU configuration -->
2790         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2791       </files>
2792     </component>
2793     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM23 CMSIS">
2794       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2795       <files>
2796         <!-- include folder / device header file -->
2797         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2798         <!-- startup / system file -->
2799         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.1" attr="config" condition="ARMCC"/>
2800         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.0.1" attr="config" condition="GCC"/>
2801         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.0.0" attr="config" condition="GCC"/>
2802         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2803         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2804         <!-- SAU configuration -->
2805         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2806       </files>
2807     </component>
2808
2809     <!-- Cortex-M33 -->
2810     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM33 CMSIS">
2811       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2812       <files>
2813         <!-- include folder / device header file -->
2814         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2815         <!-- startup / system file -->
2816         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.2" attr="config"/>
2817         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2818         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2819         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2820         <!-- SAU configuration -->
2821         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2822       </files>
2823     </component>
2824     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM33 CMSIS">
2825       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2826       <files>
2827         <!-- include folder / device header file -->
2828         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2829         <!-- startup / system file -->
2830         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2831         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.0.1" attr="config" condition="GCC"/>
2832         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2833         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2834         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2835         <!-- SAU configuration -->
2836         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2837       </files>
2838     </component>
2839
2840     <!-- Cortex-M35P -->
2841     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM35P CMSIS">
2842       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2843       <files>
2844         <!-- include folder / device header file -->
2845         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2846         <!-- startup / system file -->
2847         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.2" attr="config"/>
2848         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2849         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2850         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2851         <!-- SAU configuration -->
2852         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2853       </files>
2854     </component>
2855     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM35P CMSIS">
2856       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2857       <files>
2858         <!-- include folder / device header file -->
2859         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2860         <!-- startup / system file -->
2861         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2862         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.1" attr="config" condition="GCC"/>
2863         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2864         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
2865         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2866         <!-- SAU configuration -->
2867         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2868       </files>
2869     </component>
2870
2871     <!-- Cortex-M55 -->
2872     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM55 CMSIS">
2873       <description>System and Startup for Generic Cortex-M55 device</description>
2874       <files>
2875         <!-- include folder / device header file -->
2876         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2877         <!-- startup / system file -->
2878         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="2.0.2" attr="config"/>
2879         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2880         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2881         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.2.0" attr="config"/>
2882         <!-- SAU configuration -->
2883         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2884       </files>
2885     </component>
2886
2887     <!-- Cortex-SC000 -->
2888     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS">
2889       <description>System and Startup for Generic Arm SC000 device</description>
2890       <files>
2891         <!-- include folder / device header file -->
2892         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2893         <!-- startup / system file -->
2894         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.2" attr="config"/>
2895         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2896         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2897         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2898         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2899       </files>
2900     </component>
2901     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2902       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2903       <files>
2904         <!-- include folder / device header file -->
2905         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2906         <!-- startup / system file -->
2907         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2908         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.0.1" attr="config" condition="GCC"/>
2909         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2910         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2911         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2912       </files>
2913     </component>
2914
2915     <!-- Cortex-SC300 -->
2916     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS">
2917       <description>System and Startup for Generic Arm SC300 device</description>
2918       <files>
2919         <!-- include folder / device header file -->
2920         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2921         <!-- startup / system file -->
2922         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.2" attr="config"/>
2923         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2924         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2925         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2926         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2927       </files>
2928     </component>
2929     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2930       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2931       <files>
2932         <!-- include folder / device header file -->
2933         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2934         <!-- startup / system file -->
2935         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2936         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.0.1" attr="config" condition="GCC"/>
2937         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2938         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2939         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2940       </files>
2941     </component>
2942
2943     <!-- ARMv8MBL -->
2944     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMv8MBL CMSIS">
2945       <description>System and Startup for Generic Armv8-M Baseline device</description>
2946       <files>
2947         <!-- include folder / device header file -->
2948         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2949         <!-- startup / system file -->
2950         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.2" attr="config"/>
2951         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
2952         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2953         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2954         <!-- SAU configuration -->
2955         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2956       </files>
2957     </component>
2958     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMv8MBL CMSIS">
2959       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2960       <files>
2961         <!-- include folder / device header file -->
2962         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2963         <!-- startup / system file -->
2964         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.1" attr="config" condition="ARMCC"/>
2965         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.0.1" attr="config" condition="GCC"/>
2966         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2967         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2968         <!-- SAU configuration -->
2969         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2970       </files>
2971     </component>
2972
2973     <!-- ARMv8MML -->
2974     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMv8MML CMSIS">
2975       <description>System and Startup for Generic Armv8-M Mainline device</description>
2976       <files>
2977         <!-- include folder / device header file -->
2978         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2979         <!-- startup / system file -->
2980         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.2" attr="config"/>
2981         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2982         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2983         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2984         <!-- SAU configuration -->
2985         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2986       </files>
2987     </component>
2988     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMv8MML CMSIS">
2989       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2990       <files>
2991         <!-- include folder / device header file -->
2992         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2993         <!-- startup / system file -->
2994         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2995         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.0.1" attr="config" condition="GCC"/>
2996         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2997         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2998         <!-- SAU configuration -->
2999         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
3000       </files>
3001     </component>
3002
3003     <!-- ARMv81MML -->
3004     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.1" condition="ARMv81MML CMSIS">
3005       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
3006       <files>
3007         <!-- include folder / device header file -->
3008         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
3009         <!-- startup / system file -->
3010         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.2" attr="config"/>
3011         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
3012         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.0.0" attr="config" condition="GCC"/>
3013         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
3014         <!-- SAU configuration -->
3015         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
3016       </files>
3017     </component>
3018
3019     <!-- Cortex-A5 -->
3020     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
3021       <description>System and Startup for Generic Arm Cortex-A5 device</description>
3022       <files>
3023         <!-- include folder / device header file -->
3024         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
3025         <!-- startup / system / mmu files -->
3026         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3027         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3028         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3029         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3030         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
3031         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
3032         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
3033         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
3034         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
3035         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
3036         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
3037         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
3038
3039       </files>
3040     </component>
3041
3042     <!-- Cortex-A7 -->
3043     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
3044       <description>System and Startup for Generic Arm Cortex-A7 device</description>
3045       <files>
3046         <!-- include folder / device header file -->
3047         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
3048         <!-- startup / system / mmu files -->
3049         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3050         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3051         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3052         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3053         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
3054         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
3055         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
3056         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
3057         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
3058         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
3059         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
3060         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
3061       </files>
3062     </component>
3063
3064     <!-- Cortex-A9 -->
3065     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
3066       <description>System and Startup for Generic Arm Cortex-A9 device</description>
3067       <files>
3068         <!-- include folder / device header file -->
3069         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3070         <!-- startup / system / mmu files -->
3071         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3072         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3073         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3074         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3075         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3076         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3077         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3078         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3079         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
3080         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
3081         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
3082         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
3083       </files>
3084     </component>
3085
3086     <!-- IRQ Controller -->
3087     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3088       <description>IRQ Controller implementation using GIC</description>
3089       <files>
3090         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3091       </files>
3092     </component>
3093
3094     <!-- OS Tick -->
3095     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3096       <description>OS Tick implementation using Private Timer</description>
3097       <files>
3098         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3099       </files>
3100     </component>
3101
3102     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3103       <description>OS Tick implementation using Generic Physical Timer</description>
3104       <files>
3105         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3106       </files>
3107     </component>
3108
3109     <!-- CMSIS-DSP component -->
3110     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.8.0" isDefaultVariant="true" condition="CMSIS DSP">
3111       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3112       <files>
3113         <!-- CPU independent -->
3114         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3115         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3116
3117         <!-- CPU and Compiler dependent -->
3118         <!-- ARMCC -->
3119         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3120         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3121         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3122         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3123         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3124         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3125         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3126         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3127         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3128         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3129         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3130         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3131         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3132         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3133         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3134         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3135
3136         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3137         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3138         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3139         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3140         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3141         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3142         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3143         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3144         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3145         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3146         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3147         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3148         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3149         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3150         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3151         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3152
3153         <!-- GCC -->
3154         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3155         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3156         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3157         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3158         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3159         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3160         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3161         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3162
3163         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3164         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3165         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3166         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3167         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3168         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3169         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3170         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3171         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3172         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3173         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3174         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3175         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3176         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3177         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3178         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3179
3180         <!-- IAR -->
3181         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3182         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3183         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3184         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3185         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3186         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3187         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3188         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3189         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3190         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3191         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3192         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3193         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3194         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3195         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3196         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3197
3198         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3199         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3200         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3201         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3202         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3203         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3204         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3205         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3206         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3207         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3208         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3209         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3210         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3211         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3212         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3213         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3214
3215       </files>
3216     </component>
3217     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.8.0" condition="CMSIS DSP">
3218       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3219       <files>
3220         <!-- CPU independent -->
3221         <file category="doc"      name="CMSIS/Documentation/DSP/html/index.html"/>
3222         <file category="header"   name="CMSIS/DSP/Include/arm_math.h"/>
3223         <file category="include"  name="CMSIS/DSP/PrivateInclude/"/>
3224
3225         <!-- DSP sources (core) -->
3226         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3227         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
3228         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3229         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3230         <file category="source"   name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3231         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
3232         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3233         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3234         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3235         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3236         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3237         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
3238         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3239
3240         <!-- Compute Library for Cortex-A -->
3241         <file category="header"   name="CMSIS/DSP/ComputeLibrary/Include/NEMath.h"        condition="ARMv7-A Device"/>
3242         <file category="source"   name="CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c"  condition="ARMv7-A Device"/>
3243       </files>
3244     </component>
3245
3246     <!-- CMSIS-NN component -->
3247     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.3.0" condition="CMSIS NN">
3248       <description>CMSIS-NN Neural Network Library</description>
3249       <files>
3250         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3251         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3252         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
3253         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
3254
3255         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3256         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3257         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3258         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
3259         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
3260         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
3261         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c"/>
3262         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3263         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3264         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3265         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
3266         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
3267         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
3268         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
3269         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
3270         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
3271         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3272         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3273         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
3274         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3275         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3276         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
3277         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3278         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3279         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
3280         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
3281         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
3282         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
3283         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8_opt.c"/>
3284         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
3285         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
3286         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3287         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
3288         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
3289         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
3290         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3291         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3292         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3293         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3294         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
3295         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3296         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3297         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
3298         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
3299         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
3300         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
3301         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
3302         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
3303         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3304         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3305         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
3306         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3307         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
3308         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
3309         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3310         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3311         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3312         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3313         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3314         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3315         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3316         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
3317         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
3318         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3319         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
3320       </files>
3321     </component>
3322
3323     <!-- CMSIS-RTOS Keil RTX component -->
3324     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3325       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3326       <RTE_Components_h>
3327         <!-- the following content goes into file 'RTE_Components.h' -->
3328         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3329         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3330       </RTE_Components_h>
3331       <files>
3332         <!-- CPU independent -->
3333         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3334         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3335         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3336
3337         <!-- RTX templates -->
3338         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3339         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3340         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3341         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3342         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3343         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3344         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3345         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3346         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3347         <!-- tool-chain specific template file -->
3348         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3349         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3350         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3351
3352         <!-- CPU and Compiler dependent -->
3353         <!-- ARMCC -->
3354         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3355         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3356         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3357         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3358         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3359         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3360         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3361         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3362         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3363         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3364         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3365         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3366         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3367         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3368         <!-- GCC -->
3369         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3370         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3371         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3372         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3373         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3374         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3375         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3376         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3377         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3378         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3379         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3380         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3381         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3382         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3383         <!-- IAR -->
3384         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3385         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3386         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3387         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3388         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3389         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3390         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3391         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3392         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3393         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3394         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3395         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3396         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3397         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3398       </files>
3399     </component>
3400     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3401     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3402       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3403       <RTE_Components_h>
3404         <!-- the following content goes into file 'RTE_Components.h' -->
3405         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3406         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3407       </RTE_Components_h>
3408       <files>
3409         <!-- CPU independent -->
3410         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3411         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3412         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3413
3414         <!-- RTX templates -->
3415         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3416         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3417         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3418         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3419         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3420         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3421         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3422         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3423         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3424         <!-- tool-chain specific template file -->
3425         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3426         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3427         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3428
3429         <!-- CPU and Compiler dependent -->
3430         <!-- ARMCC -->
3431         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3432         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3433         <!-- GCC -->
3434         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3435         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3436         <!-- IAR -->
3437       </files>
3438     </component>
3439
3440     <!-- CMSIS-RTOS Keil RTX5 component -->
3441     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.2" Capiversion="1.0.0" condition="RTOS RTX5">
3442       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3443       <RTE_Components_h>
3444         <!-- the following content goes into file 'RTE_Components.h' -->
3445         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3446         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3447       </RTE_Components_h>
3448       <files>
3449         <!-- RTX header file -->
3450         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3451         <!-- RTX compatibility module for API V1 -->
3452         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3453       </files>
3454     </component>
3455
3456     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3457     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3458       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
3459       <RTE_Components_h>
3460         <!-- the following content goes into file 'RTE_Components.h' -->
3461         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3462         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3463       </RTE_Components_h>
3464       <files>
3465         <!-- RTX documentation -->
3466         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3467
3468         <!-- RTX header files -->
3469         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3470
3471         <!-- RTX configuration -->
3472         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3473         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3474
3475         <!-- RTX templates -->
3476         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3477         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3478         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3479         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3480         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3481         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3482         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3483         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3484         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3485         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3486
3487         <!-- RTX library configuration -->
3488         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3489
3490         <!-- RTX libraries (CPU and Compiler dependent) -->
3491         <!-- ARMCC -->
3492         <file category="library" condition="CM0_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3493         <file category="library" condition="CM1_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3494         <file category="library" condition="CM3_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3495         <file category="library" condition="CM4_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3496         <file category="library" condition="CM4_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3497         <file category="library" condition="CM7_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3498         <file category="library" condition="CM7_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3499         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3500         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3501         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3502         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3503         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3504         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3505         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3506         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3507         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3508         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3509         <!-- GCC -->
3510         <file category="library" condition="CM0_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3511         <file category="library" condition="CM1_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3512         <file category="library" condition="CM3_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3513         <file category="library" condition="CM4_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3514         <file category="library" condition="CM4_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3515         <file category="library" condition="CM7_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3516         <file category="library" condition="CM7_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3517         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3518         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3519         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3520         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3521         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3522         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3523         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3524         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3525         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3526         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3527         <!-- IAR -->
3528         <file category="library" condition="CM0_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3529         <file category="library" condition="CM1_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3530         <file category="library" condition="CM3_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3531         <file category="library" condition="CM4_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3532         <file category="library" condition="CM4_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3533         <file category="library" condition="CM7_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3534         <file category="library" condition="CM7_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3535         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3536         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3537         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3538         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3539         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3540         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3541         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3542         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3543         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3544         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3545       </files>
3546     </component>
3547     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3548       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
3549       <RTE_Components_h>
3550         <!-- the following content goes into file 'RTE_Components.h' -->
3551         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3552         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3553         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3554       </RTE_Components_h>
3555       <files>
3556         <!-- RTX documentation -->
3557         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3558
3559         <!-- RTX header files -->
3560         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3561
3562         <!-- RTX configuration -->
3563         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3564         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3565
3566         <!-- RTX templates -->
3567         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3568         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3569         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3570         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3571         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3572         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3573         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3574         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3575         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3576         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3577
3578         <!-- RTX library configuration -->
3579         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3580
3581         <!-- RTX libraries (CPU and Compiler dependent) -->
3582         <!-- ARMCC -->
3583         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3584         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3585         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3586         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3587         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3588         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3589         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3590         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3591         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3592         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3593         <!-- GCC -->
3594         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3595         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3596         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3597         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3598         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3599         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3600         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3601         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3602         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3603         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3604         <!-- IAR -->
3605         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3606         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3607         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3608         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3609         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3610         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3611         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3612         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3613         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3614         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3615       </files>
3616     </component>
3617     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3618       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
3619       <RTE_Components_h>
3620         <!-- the following content goes into file 'RTE_Components.h' -->
3621         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3622         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3623         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3624       </RTE_Components_h>
3625       <files>
3626         <!-- RTX documentation -->
3627         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3628
3629         <!-- RTX header files -->
3630         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3631
3632         <!-- RTX configuration -->
3633         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3634         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3635
3636         <!-- RTX templates -->
3637         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3638         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3639         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3640         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3641         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3642         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3643         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3644         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3645         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3646         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3647
3648         <!-- RTX sources (core) -->
3649         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3650         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3651         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3652         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3653         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3654         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3655         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3656         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3657         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3658         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3659         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3660         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3661         <!-- RTX sources (library configuration) -->
3662         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3663         <!-- RTX sources (handlers ARMCC) -->
3664         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3665         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3666         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3667         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3668         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3669         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3670         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3671         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3672         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3673         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3674         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3675         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3676         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_NOMVE_ARMCC"/>
3677         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_MVE_ARMCC"/>
3678         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_FPU_ARMCC"/>
3679         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3680         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3681         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3682         <!-- RTX sources (handlers GCC) -->
3683         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3684         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3685         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3686         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3687         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3688         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3689         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3690         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3691         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3692         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3693         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3694         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3695         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_NOMVE_GCC"/>
3696         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM55_NOFPU_MVE_GCC"/>
3697         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM55_FPU_GCC"/>
3698         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3699         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3700         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3701         <!-- RTX sources (handlers IAR) -->
3702         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3703         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3704         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3705         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3706         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3707         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3708         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3709         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3710         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3711         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3712         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3713         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3714         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM55_NOFPU_NOMVE_IAR"/>
3715         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM55_NOFPU_MVE_IAR"/>
3716         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM55_FPU_IAR"/>
3717         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3718         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3719         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3720         <!-- OS Tick (SysTick) -->
3721         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3722       </files>
3723     </component>
3724     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3725       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3726       <RTE_Components_h>
3727         <!-- the following content goes into file 'RTE_Components.h' -->
3728         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3729         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3730         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3731       </RTE_Components_h>
3732       <files>
3733         <!-- RTX documentation -->
3734         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3735
3736         <!-- RTX header files -->
3737         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3738
3739         <!-- RTX configuration -->
3740         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3741         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3742
3743         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3744
3745         <!-- RTX templates -->
3746         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3747         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3748         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3749         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3750         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3751         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3752         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3753         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3754         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3755         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3756
3757         <!-- RTX sources (core) -->
3758         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3759         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3760         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3761         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3762         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3763         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3764         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3765         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3766         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3767         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3768         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3769         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3770         <!-- RTX sources (library configuration) -->
3771         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3772         <!-- RTX sources (handlers ARMCC) -->
3773         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3774         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3775         <!-- RTX sources (handlers GCC) -->
3776         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3777         <!-- RTX sources (handlers IAR) -->
3778         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3779       </files>
3780     </component>
3781     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3782       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
3783       <RTE_Components_h>
3784         <!-- the following content goes into file 'RTE_Components.h' -->
3785         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3786         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3787         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3788         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3789       </RTE_Components_h>
3790       <files>
3791         <!-- RTX documentation -->
3792         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3793
3794         <!-- RTX header files -->
3795         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3796
3797         <!-- RTX configuration -->
3798         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3799         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3800
3801         <!-- RTX templates -->
3802         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3803         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3804         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3805         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3806         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3807         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3808         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3809         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3810         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3811         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3812
3813         <!-- RTX sources (core) -->
3814         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3815         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3816         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3817         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3818         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3819         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3820         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3821         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3822         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3823         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3824         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3825         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3826         <!-- RTX sources (library configuration) -->
3827         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3828         <!-- RTX sources (ARMCC handlers) -->
3829         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3830         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3831         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3832         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3833         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3834         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM55_NOFPU_NOMVE_ARMCC"/>
3835         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM55_NOFPU_MVE_ARMCC"/>
3836         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM55_FPU_ARMCC"/>
3837         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3838         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3839         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3840         <!-- RTX sources (GCC handlers) -->
3841         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3842         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3843         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3844         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3845         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3846         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM55_NOFPU_NOMVE_GCC"/>
3847         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM55_NOFPU_MVE_GCC"/>
3848         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM55_FPU_GCC"/>
3849         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3850         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3851         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3852         <!-- RTX sources (IAR handlers) -->
3853         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3854         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3855         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3856         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3857         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3858         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM55_NOFPU_NOMVE_IAR"/>
3859         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM55_NOFPU_MVE_IAR"/>
3860         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM55_FPU_IAR"/>
3861         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3862         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3863         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3864         <!-- OS Tick (SysTick) -->
3865         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3866       </files>
3867     </component>
3868
3869     <!-- CMSIS-Driver Custom components -->
3870     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3871       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3872       <files>
3873         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3874         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3875       </files>
3876     </component>
3877     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3878       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3879       <files>
3880         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3881         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3882       </files>
3883     </component>
3884     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3885       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3886       <files>
3887         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3888         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3889       </files>
3890     </component>
3891     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3892       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3893       <files>
3894         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3895         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3896       </files>
3897     </component>
3898     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3899       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3900       <files>
3901         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3902         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3903       </files>
3904     </component>
3905     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3906       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3907       <files>
3908         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3909         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3910       </files>
3911     </component>
3912     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3913       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3914       <files>
3915         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3916         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3917       </files>
3918     </component>
3919     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3920       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3921       <files>
3922         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3923         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3924       </files>
3925     </component>
3926     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3927       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3928       <files>
3929         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3930         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3931         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3932         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3933       </files>
3934     </component>
3935     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3936       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3937       <files>
3938         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3939         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3940       </files>
3941     </component>
3942     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3943       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3944       <files>
3945         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3946         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3947       </files>
3948     </component>
3949     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3950       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3951       <files>
3952         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3953         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3954       </files>
3955     </component>
3956     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3957       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3958       <files>
3959         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3960         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3961       </files>
3962     </component>
3963     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3964       <description>Access to #include Driver_WiFi.h file</description>
3965       <files>
3966         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3967         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3968       </files>
3969     </component>
3970
3971     <!-- VIO components -->
3972     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
3973       <description>Virtual I/O custom implementation template</description>
3974       <files>
3975         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
3976       </files>
3977     </component>
3978     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
3979       <description>Virtual I/O implementation using memory only</description>
3980       <files>
3981         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
3982       </files>
3983     </component>
3984
3985   </components>
3986
3987   <boards>
3988     <board name="uVision Simulator" vendor="Keil">
3989       <description>uVision Simulator</description>
3990       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3991       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3992       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3993       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3994       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3995       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3996       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3997       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3998       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3999       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
4000       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
4001       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
4002       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
4003       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
4004       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
4005       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
4006       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
4007       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
4008       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
4009       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
4010       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
4011       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
4012       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
4013       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
4014       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
4015       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
4016     </board>
4017
4018     <board name="EWARM Simulator" vendor="IAR">
4019       <description>EWARM Simulator</description>
4020       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
4021       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
4022       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
4023       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
4024       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
4025       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
4026       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
4027       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
4028       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
4029       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
4030       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
4031       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
4032       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
4033       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
4034       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
4035       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
4036       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
4037       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
4038       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
4039       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
4040       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
4041       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
4042       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
4043       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
4044       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
4045       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
4046     </board>
4047   </boards>
4048
4049   <examples>
4050     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
4051       <description>DSP_Lib Class Marks example</description>
4052       <board name="uVision Simulator" vendor="Keil"/>
4053       <project>
4054         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
4055       </project>
4056       <attributes>
4057         <component Cclass="CMSIS" Cgroup="CORE"/>
4058         <component Cclass="CMSIS" Cgroup="DSP"/>
4059         <component Cclass="Device" Cgroup="Startup"/>
4060         <category>Getting Started</category>
4061       </attributes>
4062     </example>
4063
4064     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
4065       <description>DSP_Lib Convolution example</description>
4066       <board name="uVision Simulator" vendor="Keil"/>
4067       <project>
4068         <environment name="uv" load="arm_convolution_example.uvprojx"/>
4069       </project>
4070       <attributes>
4071         <component Cclass="CMSIS" Cgroup="CORE"/>
4072         <component Cclass="CMSIS" Cgroup="DSP"/>
4073         <component Cclass="Device" Cgroup="Startup"/>
4074         <category>Getting Started</category>
4075       </attributes>
4076     </example>
4077
4078     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
4079       <description>DSP_Lib Dotproduct example</description>
4080       <board name="uVision Simulator" vendor="Keil"/>
4081       <project>
4082         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
4083       </project>
4084       <attributes>
4085         <component Cclass="CMSIS" Cgroup="CORE"/>
4086         <component Cclass="CMSIS" Cgroup="DSP"/>
4087         <component Cclass="Device" Cgroup="Startup"/>
4088         <category>Getting Started</category>
4089       </attributes>
4090     </example>
4091
4092     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
4093       <description>DSP_Lib FFT Bin example</description>
4094       <board name="uVision Simulator" vendor="Keil"/>
4095       <project>
4096         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
4097       </project>
4098       <attributes>
4099         <component Cclass="CMSIS" Cgroup="CORE"/>
4100         <component Cclass="CMSIS" Cgroup="DSP"/>
4101         <component Cclass="Device" Cgroup="Startup"/>
4102         <category>Getting Started</category>
4103       </attributes>
4104     </example>
4105
4106     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
4107       <description>DSP_Lib FIR example</description>
4108       <board name="uVision Simulator" vendor="Keil"/>
4109       <project>
4110         <environment name="uv" load="arm_fir_example.uvprojx"/>
4111       </project>
4112       <attributes>
4113         <component Cclass="CMSIS" Cgroup="CORE"/>
4114         <component Cclass="CMSIS" Cgroup="DSP"/>
4115         <component Cclass="Device" Cgroup="Startup"/>
4116         <category>Getting Started</category>
4117       </attributes>
4118     </example>
4119
4120     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
4121       <description>DSP_Lib Graphic Equalizer example</description>
4122       <board name="uVision Simulator" vendor="Keil"/>
4123       <project>
4124         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
4125       </project>
4126       <attributes>
4127         <component Cclass="CMSIS" Cgroup="CORE"/>
4128         <component Cclass="CMSIS" Cgroup="DSP"/>
4129         <component Cclass="Device" Cgroup="Startup"/>
4130         <category>Getting Started</category>
4131       </attributes>
4132     </example>
4133
4134     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4135       <description>DSP_Lib Linear Interpolation example</description>
4136       <board name="uVision Simulator" vendor="Keil"/>
4137       <project>
4138         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4139       </project>
4140       <attributes>
4141         <component Cclass="CMSIS" Cgroup="CORE"/>
4142         <component Cclass="CMSIS" Cgroup="DSP"/>
4143         <component Cclass="Device" Cgroup="Startup"/>
4144         <category>Getting Started</category>
4145       </attributes>
4146     </example>
4147
4148     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4149       <description>DSP_Lib Matrix example</description>
4150       <board name="uVision Simulator" vendor="Keil"/>
4151       <project>
4152         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4153       </project>
4154       <attributes>
4155         <component Cclass="CMSIS" Cgroup="CORE"/>
4156         <component Cclass="CMSIS" Cgroup="DSP"/>
4157         <component Cclass="Device" Cgroup="Startup"/>
4158         <category>Getting Started</category>
4159       </attributes>
4160     </example>
4161
4162     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4163       <description>DSP_Lib Signal Convergence example</description>
4164       <board name="uVision Simulator" vendor="Keil"/>
4165       <project>
4166         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4167       </project>
4168       <attributes>
4169         <component Cclass="CMSIS" Cgroup="CORE"/>
4170         <component Cclass="CMSIS" Cgroup="DSP"/>
4171         <component Cclass="Device" Cgroup="Startup"/>
4172         <category>Getting Started</category>
4173       </attributes>
4174     </example>
4175
4176     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4177       <description>DSP_Lib Sinus/Cosinus example</description>
4178       <board name="uVision Simulator" vendor="Keil"/>
4179       <project>
4180         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4181       </project>
4182       <attributes>
4183         <component Cclass="CMSIS" Cgroup="CORE"/>
4184         <component Cclass="CMSIS" Cgroup="DSP"/>
4185         <component Cclass="Device" Cgroup="Startup"/>
4186         <category>Getting Started</category>
4187       </attributes>
4188     </example>
4189
4190     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4191       <description>DSP_Lib Variance example</description>
4192       <board name="uVision Simulator" vendor="Keil"/>
4193       <project>
4194         <environment name="uv" load="arm_variance_example.uvprojx"/>
4195       </project>
4196       <attributes>
4197         <component Cclass="CMSIS" Cgroup="CORE"/>
4198         <component Cclass="CMSIS" Cgroup="DSP"/>
4199         <component Cclass="Device" Cgroup="Startup"/>
4200         <category>Getting Started</category>
4201       </attributes>
4202     </example>
4203
4204     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4205       <description>Neural Network CIFAR10 example</description>
4206       <board name="uVision Simulator" vendor="Keil"/>
4207       <project>
4208         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4209       </project>
4210       <attributes>
4211         <component Cclass="CMSIS" Cgroup="CORE"/>
4212         <component Cclass="CMSIS" Cgroup="DSP"/>
4213         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4214         <component Cclass="Device" Cgroup="Startup"/>
4215         <category>Getting Started</category>
4216       </attributes>
4217     </example>
4218
4219     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4220       <description>Neural Network CIFAR10 example</description>
4221       <board name="EWARM Simulator" vendor="IAR"/>
4222       <project>
4223         <environment name="iar" load="NN-example-cifar10.ewp"/>
4224       </project>
4225       <attributes>
4226         <component Cclass="CMSIS" Cgroup="CORE"/>
4227         <component Cclass="CMSIS" Cgroup="DSP"/>
4228         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4229         <component Cclass="Device" Cgroup="Startup"/>
4230         <category>Getting Started</category>
4231       </attributes>
4232     </example>
4233
4234     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4235       <description>Neural Network GRU example</description>
4236       <board name="uVision Simulator" vendor="Keil"/>
4237       <project>
4238         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4239       </project>
4240       <attributes>
4241         <component Cclass="CMSIS" Cgroup="CORE"/>
4242         <component Cclass="CMSIS" Cgroup="DSP"/>
4243         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4244         <component Cclass="Device" Cgroup="Startup"/>
4245         <category>Getting Started</category>
4246       </attributes>
4247     </example>
4248
4249     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4250       <description>Neural Network GRU example</description>
4251       <board name="EWARM Simulator" vendor="IAR"/>
4252       <project>
4253         <environment name="iar" load="NN-example-gru.ewp"/>
4254       </project>
4255       <attributes>
4256         <component Cclass="CMSIS" Cgroup="CORE"/>
4257         <component Cclass="CMSIS" Cgroup="DSP"/>
4258         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4259         <component Cclass="Device" Cgroup="Startup"/>
4260         <category>Getting Started</category>
4261       </attributes>
4262     </example>
4263
4264     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4265       <description>CMSIS-RTOS2 Blinky example</description>
4266       <board name="uVision Simulator" vendor="Keil"/>
4267       <project>
4268         <environment name="uv" load="Blinky.uvprojx"/>
4269       </project>
4270       <attributes>
4271         <component Cclass="CMSIS" Cgroup="CORE"/>
4272         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4273         <component Cclass="Device" Cgroup="Startup"/>
4274         <category>Getting Started</category>
4275       </attributes>
4276     </example>
4277
4278     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4279       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4280       <board name="uVision Simulator" vendor="Keil"/>
4281       <project>
4282         <environment name="uv" load="Blinky.uvprojx"/>
4283       </project>
4284       <attributes>
4285         <component Cclass="CMSIS" Cgroup="CORE"/>
4286         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4287         <component Cclass="Device" Cgroup="Startup"/>
4288         <category>Getting Started</category>
4289       </attributes>
4290     </example>
4291
4292     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4293       <description>CMSIS-RTOS2 Message Queue Example</description>
4294       <board name="uVision Simulator" vendor="Keil"/>
4295       <project>
4296         <environment name="uv" load="MsqQueue.uvprojx"/>
4297       </project>
4298       <attributes>
4299         <component Cclass="CMSIS" Cgroup="CORE"/>
4300         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4301         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4302         <component Cclass="Device" Cgroup="Startup"/>
4303         <category>Getting Started</category>
4304       </attributes>
4305     </example>
4306
4307     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4308       <description>CMSIS-RTOS2 Memory Pool Example</description>
4309       <board name="uVision Simulator" vendor="Keil"/>
4310       <project>
4311         <environment name="uv" load="MemPool.uvprojx"/>
4312       </project>
4313       <attributes>
4314         <component Cclass="CMSIS" Cgroup="CORE"/>
4315         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4316         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4317         <component Cclass="Device" Cgroup="Startup"/>
4318         <category>Getting Started</category>
4319       </attributes>
4320     </example>
4321
4322     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4323       <description>Bare-metal secure/non-secure example without RTOS</description>
4324       <board name="uVision Simulator" vendor="Keil"/>
4325       <project>
4326         <environment name="uv" load="NoRTOS.uvmpw"/>
4327       </project>
4328       <attributes>
4329         <component Cclass="CMSIS" Cgroup="CORE"/>
4330         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4331         <component Cclass="Device" Cgroup="Startup"/>
4332         <category>Getting Started</category>
4333       </attributes>
4334     </example>
4335
4336     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4337       <description>Secure/non-secure RTOS example with thread context management</description>
4338       <board name="uVision Simulator" vendor="Keil"/>
4339       <project>
4340         <environment name="uv" load="RTOS.uvmpw"/>
4341       </project>
4342       <attributes>
4343         <component Cclass="CMSIS" Cgroup="CORE"/>
4344         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4345         <component Cclass="Device" Cgroup="Startup"/>
4346         <category>Getting Started</category>
4347       </attributes>
4348     </example>
4349
4350     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4351       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4352       <board name="uVision Simulator" vendor="Keil"/>
4353       <project>
4354         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4355       </project>
4356       <attributes>
4357         <component Cclass="CMSIS" Cgroup="CORE"/>
4358         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4359         <component Cclass="Device" Cgroup="Startup"/>
4360         <category>Getting Started</category>
4361       </attributes>
4362     </example>
4363
4364     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
4365       <description>CMSIS-RTOS2 Blinky example</description>
4366       <board name="EWARM Simulator" vendor="iar"/>
4367       <project>
4368         <environment name="iar" load="Blinky/Blinky.ewp"/>
4369       </project>
4370       <attributes>
4371         <component Cclass="CMSIS" Cgroup="CORE"/>
4372         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4373         <component Cclass="Device" Cgroup="Startup"/>
4374         <category>Getting Started</category>
4375       </attributes>
4376     </example>
4377
4378     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
4379       <description>CMSIS-RTOS2 Message Queue Example</description>
4380       <board name="EWARM Simulator" vendor="iar"/>
4381       <project>
4382         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
4383       </project>
4384       <attributes>
4385         <component Cclass="CMSIS" Cgroup="CORE"/>
4386         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4387         <component Cclass="Device" Cgroup="Startup"/>
4388         <category>Getting Started</category>
4389       </attributes>
4390     </example>
4391
4392   </examples>
4393
4394 </package>