begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.7.0-dev5">
  12       Active development...
  13       CMSIS-NN: 1.3.0 (see revision history for details)
  14         - Added MVE support
  15         - Further optimizations for kernels using DSP extension
  16       CMSIS-Driver: 2.8.0
  17         - Added VIO API 0.1.0 (Preview)
  18     </release>
  19     <release version="5.7.0-dev4">
  20       CMSIS-DSP: 1.8.0 (see revision history for details)
  21         - Added new functions and function groups
  22         - Added MVE support
  23     </release>
  24     <release version="5.7.0-dev3">
  25       CMSIS-Core(M):
  26         - L1 Cache functions for Armv7-M and later
  27       Devices:
  28         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  29     </release>
  30     <release version="5.7.0-dev2">
  31       CMSIS-Core(M):
  32         - Cortex-M55 cpu support
  33         - Cortex-M55 core header file
  34         - PMU header file (place holder)
  35       Devices:
  36         - ARMCM55 device
  37     </release>
  38     <release version="5.7.0-dev1">
  39       Active development...
  40       CMSIS-Core(M): 5.4.0 (see revision history for details)
  41         - Enhanced MVE support for Armv8.1-MML
  42       CMSIS-RTOS2:
  43         - RTX 5.5.2 (see revision history for details)
  44       CMSIS-Driver: 2.8.0
  45         - removed volatile from status related typedefs in APIs
  46         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  47       CMSIS-Pack:
  48         - added custom attribute to components that require custom implementation
  49       Devices:
  50         - ARMv81MML startup code recognizing __MVE_USED macro
  51         - Refactored vector table references for all Cortex-M devices
  52     </release>
  53     <release version="5.6.0" date="2019-07-10">
  54       CMSIS-Core(M): 5.3.0 (see revision history for details)
  55         - Added provisions for compiler-independent C startup code.
  56       CMSIS-Core(A): 1.1.4 (see revision history for details)
  57         - Fixed __FPU_Enable.
  58       CMSIS-DSP: 1.7.0 (see revision history for details)
  59         - New Neon versions of f32 functions
  60         - Python wrapper
  61         - Preliminary cmake build
  62         - Compilation flags for FFTs
  63         - Changes to arm_math.h
  64       CMSIS-NN: 1.2.0 (see revision history for details)
  65         - New function for depthwise convolution with asymmetric quantization.
  66         - New support functions for requantization.
  67       CMSIS-RTOS:
  68         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  69       CMSIS-RTOS2:
  70         - RTX 5.5.1 (see revision history for details)
  71       CMSIS-Driver: 2.7.1
  72         - WiFi Interface API 1.0.0
  73       Devices:
  74         - Generalized C startup code for all Cortex-M familiy devices.
  75         - Updated Cortex-A default memory regions and MMU configurations
  76         - Moved Cortex-A memory and system config files to avoid include path issues
  77     </release>
  78     <release version="5.5.1" date="2019-03-20">
  79       The following folders are deprecated
  80         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  81
  82       CMSIS-Core(M): 5.2.1 (see revision history for details)
  83         - Fixed compilation issue in cmsis_armclang_ltm.h
  84     </release>
  85     <release version="5.5.0" date="2019-03-18">
  86       The following folders have been removed:
  87         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  88         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  89       The following folders are deprecated
  90         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  91
  92       CMSIS-Core(M): 5.2.0 (see revision history for details)
  93         - Reworked Stack/Heap configuration for ARM startup files.
  94         - Added Cortex-M35P device support.
  95         - Added generic Armv8.1-M Mainline device support.
  96       CMSIS-Core(A): 1.1.3 (see revision history for details)
  97       CMSIS-DSP: 1.6.0 (see revision history for details)
  98         - reworked DSP library source files
  99         - reworked DSP library documentation
 100         - Changed DSP folder structure
 101         - moved DSP libraries to folder ./DSP/Lib
 102         - ARM DSP Libraries are built with ARMCLANG
 103         - Added DSP Libraries Source variant
 104       CMSIS-RTOS2:
 105         - RTX 5.5.0 (see revision history for details)
 106       CMSIS-Driver: 2.7.0
 107         - Added WiFi Interface API 1.0.0-beta
 108         - Added components for project specific driver implementations
 109       CMSIS-Pack: 1.6.0 (see revision history for details)
 110       Devices:
 111         - Added Cortex-M35P and ARMv81MML device templates.
 112         - Fixed C-Startup Code for GCC (aligned with other compilers)
 113       Utilities:
 114         - SVDConv 3.3.25
 115         - PackChk 1.3.82
 116     </release>
 117     <release version="5.4.0" date="2018-08-01">
 118       Aligned pack structure with repository.
 119       The following folders are deprecated:
 120         - CMSIS/Include/
 121         - CMSIS/DSP_Lib/
 122
 123       CMSIS-Core(M): 5.1.2 (see revision history for details)
 124         - Added Cortex-M1 support (beta).
 125       CMSIS-Core(A): 1.1.2 (see revision history for details)
 126       CMSIS-NN: 1.1.0
 127         - Added new math functions.
 128       CMSIS-RTOS2:
 129         - API 2.1.3 (see revision history for details)
 130         - RTX 5.4.0 (see revision history for details)
 131           * Updated exception handling on Cortex-A
 132       CMSIS-Driver:
 133         - Flash Driver API V2.2.0
 134       Utilities:
 135         - SVDConv 3.3.21
 136         - PackChk 1.3.71
 137     </release>
 138     <release version="5.3.0" date="2018-02-22">
 139       Updated Arm company brand.
 140       CMSIS-Core(M): 5.1.1 (see revision history for details)
 141       CMSIS-Core(A): 1.1.1 (see revision history for details)
 142       CMSIS-DAP: 2.0.0 (see revision history for details)
 143       CMSIS-NN: 1.0.0
 144         - Initial contribution of the bare metal Neural Network Library.
 145       CMSIS-RTOS2:
 146         - RTX 5.3.0 (see revision history for details)
 147         - OS Tick API 1.0.1
 148     </release>
 149     <release version="5.2.0" date="2017-11-16">
 150       CMSIS-Core(M): 5.1.0 (see revision history for details)
 151         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 152         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 153       CMSIS-Core(A): 1.1.0 (see revision history for details)
 154         - Added compiler_iccarm.h.
 155         - Added additional access functions for physical timer.
 156       CMSIS-DAP: 1.2.0 (see revision history for details)
 157       CMSIS-DSP: 1.5.2 (see revision history for details)
 158       CMSIS-Driver: 2.6.0 (see revision history for details)
 159         - CAN Driver API V1.2.0
 160         - NAND Driver API V2.3.0
 161       CMSIS-RTOS:
 162         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 163       CMSIS-RTOS2:
 164         - API 2.1.2 (see revision history for details)
 165         - RTX 5.2.3 (see revision history for details)
 166       Devices:
 167         - Added GCC startup and linker script for Cortex-A9.
 168         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 169         - Added IAR startup code for Cortex-A9
 170     </release>
 171     <release version="5.1.1" date="2017-09-19">
 172       CMSIS-RTOS2:
 173       - RTX 5.2.1 (see revision history for details)
 174     </release>
 175     <release version="5.1.0" date="2017-08-04">
 176       CMSIS-Core(M): 5.0.2 (see revision history for details)
 177       - Changed Version Control macros to be core agnostic.
 178       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 179       CMSIS-Core(A): 1.0.0 (see revision history for details)
 180       - Initial release
 181       - IRQ Controller API 1.0.0
 182       CMSIS-Driver: 2.05 (see revision history for details)
 183       - All typedefs related to status have been made volatile.
 184       CMSIS-RTOS2:
 185       - API 2.1.1 (see revision history for details)
 186       - RTX 5.2.0 (see revision history for details)
 187       - OS Tick API 1.0.0
 188       CMSIS-DSP: 1.5.2 (see revision history for details)
 189       - Fixed GNU Compiler specific diagnostics.
 190       CMSIS-Pack: 1.5.0 (see revision history for details)
 191       - added System Description File (*.SDF) Format
 192       CMSIS-Zone: 0.0.1 (Preview)
 193       - Initial specification draft
 194     </release>
 195     <release version="5.0.1" date="2017-02-03">
 196       Package Description:
 197       - added taxonomy for Cclass RTOS
 198       CMSIS-RTOS2:
 199       - API 2.1   (see revision history for details)
 200       - RTX 5.1.0 (see revision history for details)
 201       CMSIS-Core: 5.0.1 (see revision history for details)
 202       - Added __PACKED_STRUCT macro
 203       - Added uVisior support
 204       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 205       - Updated template for secure main function (main_s.c)
 206       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 207       CMSIS-DSP: 1.5.1 (see revision history for details)
 208       - added ARMv8M DSP libraries.
 209       CMSIS-Pack:1.4.9 (see revision history for details)
 210       - added Pack Index File specification and schema file
 211     </release>
 212     <release version="5.0.0" date="2016-11-11">
 213       Changed open source license to Apache 2.0
 214       CMSIS_Core:
 215        - Added support for Cortex-M23 and Cortex-M33.
 216        - Added ARMv8-M device configurations for mainline and baseline.
 217        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 218        - Added cmsis_compiler.h to unify compiler behaviour.
 219        - Updated function SCB_EnableICache (for Cortex-M7).
 220        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 221       CMSIS-RTOS:
 222         - bug fix in RTX 4.82 (see revision history for details)
 223       CMSIS-RTOS2:
 224         - new API including compatibility layer to CMSIS-RTOS
 225         - reference implementation based on RTX5
 226         - supports all Cortex-M variants including TrustZone for ARMv8-M
 227       CMSIS-SVD:
 228        - reworked SVD format documentation
 229        - removed SVD file database documentation as SVD files are distributed in packs
 230        - updated SVDConv for Win32 and Linux
 231       CMSIS-DSP:
 232        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 233        - Added DSP libraries build projects to CMSIS pack.
 234     </release>
 235     <release version="4.5.0" date="2015-10-28">
 236       - CMSIS-Core     4.30.0  (see revision history for details)
 237       - CMSIS-DAP      1.1.0   (unchanged)
 238       - CMSIS-Driver   2.04.0  (see revision history for details)
 239       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 240       - CMSIS-Pack     1.4.1   (see revision history for details)
 241       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 242       - CMSIS-SVD      1.3.1   (see revision history for details)
 243     </release>
 244     <release version="4.4.0" date="2015-09-11">
 245       - CMSIS-Core     4.20   (see revision history for details)
 246       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 247       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 248       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 249       - CMSIS-RTOS
 250         -- API         1.02   (unchanged)
 251         -- RTX         4.79   (see revision history for details)
 252       - CMSIS-SVD      1.3.0  (see revision history for details)
 253       - CMSIS-DAP      1.1.0  (extended with SWO support)
 254     </release>
 255     <release version="4.3.0" date="2015-03-20">
 256       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 257       - CMSIS-DSP      1.4.5  (see revision history for details)
 258       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 259       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 260       - CMSIS-RTOS
 261         -- API         1.02   (unchanged)
 262         -- RTX         4.78   (see revision history for details)
 263       - CMSIS-SVD      1.2    (unchanged)
 264     </release>
 265     <release version="4.2.0" date="2014-09-24">
 266       Adding Cortex-M7 support
 267       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 268       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 269       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 270       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 271       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 272     </release>
 273     <release version="4.1.1" date="2014-06-30">
 274       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 275     </release>
 276     <release version="4.1.0" date="2014-06-12">
 277       - CMSIS-Driver   2.02  (incompatible update)
 278       - CMSIS-Pack     1.3   (see revision history for details)
 279       - CMSIS-DSP      1.4.2 (unchanged)
 280       - CMSIS-Core     3.30  (unchanged)
 281       - CMSIS-RTOS RTX 4.74  (unchanged)
 282       - CMSIS-RTOS API 1.02  (unchanged)
 283       - CMSIS-SVD      1.10  (unchanged)
 284       PACK:
 285       - removed G++ specific files from PACK
 286       - added Component Startup variant "C Startup"
 287       - added Pack Checking Utility
 288       - updated conditions to reflect tool-chain dependency
 289       - added Taxonomy for Graphics
 290       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 291     </release>
 292     <!-- release version="4.0.0">
 293       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 294       - CMSIS-Pack     1.1   Preliminary
 295       - CMSIS-DSP      1.4.2 (see revision history for details)
 296       - CMSIS-Core     3.30  (see revision history for details)
 297       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 298       - CMSIS-RTOS API 1.02  (unchanged)
 299       - CMSIS-SVD      1.10  (unchanged)
 300     </release -->
 301     <release version="3.20.4" date="2014-02-20">
 302       - CMSIS-RTOS 4.74 (see revision history for details)
 303       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 304     </release>
 305     <!-- release version="3.20.3">
 306       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 307       - CMSIS-RTOS 4.73 (see revision history for details)
 308     </release -->
 309     <!-- release version="3.20.2">
 310       - CMSIS-Pack documentation has been added
 311       - CMSIS-Drivers header and documentation have been added to PACK
 312       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 313     </release -->
 314     <!-- release version="3.20.1">
 315       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 316       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 317     </release -->
 318     <!-- release version="3.20.0">
 319       The software portions that are deployed in the application program are now under a BSD license which allows usage
 320       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 321       The individual components have been update as listed below:
 322       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 323       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 324       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 325       - CMSIS-SVD is unchanged.
 326     </release -->
 327   </releases>
 328
 329   <taxonomy>
 330     <description Cclass="Audio">Software components for audio processing</description>
 331     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 332     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 333     <description Cclass="Compiler">Compiler Software Extensions</description>
 334     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 335     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 336     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 337     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 338     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 339     <description Cclass="File System">File Drive Support and File System</description>
 340     <description Cclass="IoT Client">IoT cloud client connector</description>
 341     <description Cclass="IoT Service">IoT specific services</description>
 342     <description Cclass="IoT Utility">IoT specific software utility</description>
 343     <description Cclass="Graphics">Graphical User Interface</description>
 344     <description Cclass="Network">Network Stack using Internet Protocols</description>
 345     <description Cclass="RTOS">Real-time Operating System</description>
 346     <description Cclass="Security">Encryption for secure communication or storage</description>
 347     <description Cclass="USB">Universal Serial Bus Stack</description>
 348     <description Cclass="Utility">Generic software utility components</description>
 349   </taxonomy>
 350
 351   <devices>
 352     <!-- ******************************  Cortex-M0  ****************************** -->
 353     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 354       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 355       <description>
 356 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 357 - simple, easy-to-use programmers model
 358 - highly efficient ultra-low power operation
 359 - excellent code density
 360 - deterministic, high-performance interrupt handling
 361 - upward compatibility with the rest of the Cortex-M processor family.
 362       </description>
 363       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 364       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 365       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 366       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 367
 368       <device Dname="ARMCM0">
 369         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 370         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 371       </device>
 372     </family>
 373
 374     <!-- ******************************  Cortex-M0P  ****************************** -->
 375     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 376       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 377       <description>
 378 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 379 - simple, easy-to-use programmers model
 380 - highly efficient ultra-low power operation
 381 - excellent code density
 382 - deterministic, high-performance interrupt handling
 383 - upward compatibility with the rest of the Cortex-M processor family.
 384       </description>
 385       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 386       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 387       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 388       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 389
 390       <device Dname="ARMCM0P">
 391         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 392         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 393       </device>
 394
 395       <device Dname="ARMCM0P_MPU">
 396         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 397         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 398       </device>
 399     </family>
 400
 401     <!-- ******************************  Cortex-M1  ****************************** -->
 402     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 403       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 404       <description>
 405 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 406 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 407       </description>
 408       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 409       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 410       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 411       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 412
 413       <device Dname="ARMCM1">
 414         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 415         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 416       </device>
 417     </family>
 418
 419     <!-- ******************************  Cortex-M3  ****************************** -->
 420     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 421       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 422       <description>
 423 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 424 - simple, easy-to-use programmers model
 425 - highly efficient ultra-low power operation
 426 - excellent code density
 427 - deterministic, high-performance interrupt handling
 428 - upward compatibility with the rest of the Cortex-M processor family.
 429       </description>
 430       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 431       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 432       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 433       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 434
 435       <device Dname="ARMCM3">
 436         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 437         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 438       </device>
 439     </family>
 440
 441     <!-- ******************************  Cortex-M4  ****************************** -->
 442     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 443       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 444       <description>
 445 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 446 - simple, easy-to-use programmers model
 447 - highly efficient ultra-low power operation
 448 - excellent code density
 449 - deterministic, high-performance interrupt handling
 450 - upward compatibility with the rest of the Cortex-M processor family.
 451       </description>
 452       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 453       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 454       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 455       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 456
 457       <device Dname="ARMCM4">
 458         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 459         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 460       </device>
 461
 462       <device Dname="ARMCM4_FP">
 463         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 464         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 465       </device>
 466     </family>
 467
 468     <!-- ******************************  Cortex-M7  ****************************** -->
 469     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 470       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 471       <description>
 472 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 473 - simple, easy-to-use programmers model
 474 - highly efficient ultra-low power operation
 475 - excellent code density
 476 - deterministic, high-performance interrupt handling
 477 - upward compatibility with the rest of the Cortex-M processor family.
 478       </description>
 479       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 480       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 481       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 482       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 483
 484       <device Dname="ARMCM7">
 485         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 486         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 487       </device>
 488
 489       <device Dname="ARMCM7_SP">
 490         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 491         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 492       </device>
 493
 494       <device Dname="ARMCM7_DP">
 495         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 496         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 497       </device>
 498     </family>
 499
 500     <!-- ******************************  Cortex-M23  ********************** -->
 501     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 502       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 503       <description>
 504 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 505 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 506 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 507       </description>
 508       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 509       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 510       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 511       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 512       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 513       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 514
 515       <device Dname="ARMCM23">
 516         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 517         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 518       </device>
 519
 520       <device Dname="ARMCM23_TZ">
 521         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 522         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 523       </device>
 524     </family>
 525
 526     <!-- ******************************  Cortex-M33  ****************************** -->
 527     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 528       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 529       <description>
 530 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 531 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 532       </description>
 533       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 534       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 535       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 536       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 537       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 538       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 539
 540       <device Dname="ARMCM33">
 541         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 542         <description>
 543           no DSP Instructions, no Floating Point Unit, no TrustZone
 544         </description>
 545         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 546       </device>
 547
 548       <device Dname="ARMCM33_TZ">
 549         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 550         <description>
 551           no DSP Instructions, no Floating Point Unit, TrustZone
 552         </description>
 553         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 554       </device>
 555
 556       <device Dname="ARMCM33_DSP_FP">
 557         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 558         <description>
 559           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 560         </description>
 561         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 562       </device>
 563
 564       <device Dname="ARMCM33_DSP_FP_TZ">
 565         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 566         <description>
 567           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 568         </description>
 569         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 570       </device>
 571     </family>
 572
 573     <!-- ******************************  Cortex-M35P  ****************************** -->
 574     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 575       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 576       <description>
 577 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 578 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 579       </description>
 580
 581       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 582       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 583       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 584       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 585       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 586       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 587
 588       <device Dname="ARMCM35P">
 589         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 590         <description>
 591           no DSP Instructions, no Floating Point Unit, no TrustZone
 592         </description>
 593         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 594       </device>
 595
 596       <device Dname="ARMCM35P_TZ">
 597         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 598         <description>
 599           no DSP Instructions, no Floating Point Unit, TrustZone
 600         </description>
 601         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 602       </device>
 603
 604       <device Dname="ARMCM35P_DSP_FP">
 605         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 606         <description>
 607           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 608         </description>
 609         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 610       </device>
 611
 612       <device Dname="ARMCM35P_DSP_FP_TZ">
 613         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 614         <description>
 615           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 616         </description>
 617         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 618       </device>
 619     </family>
 620
 621     <!-- ******************************  Cortex-M55  ****************************** -->
 622     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 623       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 624       <description>
 625 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 626 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 627 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 628       </description>
 629
 630       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 631       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 632       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 633       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 634       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 635       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 636
 637       <device Dname="ARMCM55">
 638         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 639         <description>
 640           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 641         </description>
 642         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 643       </device>
 644     </family>
 645
 646     <!-- ******************************  ARMSC000  ****************************** -->
 647     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 648       <description>
 649 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 650 - simple, easy-to-use programmers model
 651 - highly efficient ultra-low power operation
 652 - excellent code density
 653 - deterministic, high-performance interrupt handling
 654       </description>
 655       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 656       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 657       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 658       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 659
 660       <device Dname="ARMSC000">
 661         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 662         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 663       </device>
 664     </family>
 665
 666     <!-- ******************************  ARMSC300  ****************************** -->
 667     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 668       <description>
 669 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 670 - simple, easy-to-use programmers model
 671 - highly efficient ultra-low power operation
 672 - excellent code density
 673 - deterministic, high-performance interrupt handling
 674       </description>
 675       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 676       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 677       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 678       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 679
 680       <device Dname="ARMSC300">
 681         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 682         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 683       </device>
 684     </family>
 685
 686     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 687     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 688       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 689       <description>
 690 Armv8-M Baseline based device with TrustZone
 691       </description>
 692       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 693       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 694       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 695       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 696       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 697       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 698
 699       <device Dname="ARMv8MBL">
 700         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 701         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 702       </device>
 703     </family>
 704
 705     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 706     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 707       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 708       <description>
 709 Armv8-M Mainline based device with TrustZone
 710       </description>
 711       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 712       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 713       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 714       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 715       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 716       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 717
 718       <device Dname="ARMv8MML">
 719         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 720         <description>
 721           no DSP Instructions, no Floating Point Unit, TrustZone
 722         </description>
 723         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 724       </device>
 725
 726       <device Dname="ARMv8MML_DSP">
 727         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 728         <description>
 729           DSP Instructions, no Floating Point Unit, TrustZone
 730         </description>
 731         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 732       </device>
 733
 734       <device Dname="ARMv8MML_SP">
 735         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 736         <description>
 737           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 738         </description>
 739         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 740       </device>
 741
 742       <device Dname="ARMv8MML_DSP_SP">
 743         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 744         <description>
 745           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 746         </description>
 747         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 748       </device>
 749
 750       <device Dname="ARMv8MML_DP">
 751         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 752         <description>
 753           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 754         </description>
 755         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 756       </device>
 757
 758       <device Dname="ARMv8MML_DSP_DP">
 759         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 760         <description>
 761           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 762         </description>
 763         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 764       </device>
 765     </family>
 766
 767     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 768     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 769       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 770       <description>
 771 Armv8.1-M Mainline based device with TrustZone and MVE
 772       </description>
 773       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 774       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 775       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 776       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 777       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 778       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 779
 780
 781       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 782         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 783         <description>
 784           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 785         </description>
 786         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 787       </device>
 788     </family>
 789
 790     <!-- ******************************  Cortex-A5  ****************************** -->
 791     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 792       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 793       <description>
 794 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 795 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 796 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 797       </description>
 798
 799       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 800       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 801       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 802       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 803
 804       <device Dname="ARMCA5">
 805         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 806         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 807       </device>
 808     </family>
 809
 810     <!-- ******************************  Cortex-A7  ****************************** -->
 811     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 812       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 813       <description>
 814 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 815 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 816 an optional integrated GIC, and an optional L2 cache controller.
 817       </description>
 818
 819       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 820       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 821       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 822       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 823
 824       <device Dname="ARMCA7">
 825         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 826         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 827       </device>
 828     </family>
 829
 830     <!-- ******************************  Cortex-A9  ****************************** -->
 831     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 832       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 833       <description>
 834 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 835 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 836 and 8-bit Java bytecodes in Jazelle state.
 837       </description>
 838
 839       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 840       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 841       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 842       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 843
 844       <device Dname="ARMCA9">
 845         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 846         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 847       </device>
 848     </family>
 849   </devices>
 850
 851
 852   <apis>
 853     <!-- CMSIS Device API -->
 854     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 855       <description>Device interrupt controller interface</description>
 856       <files>
 857         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 858       </files>
 859     </api>
 860     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 861       <description>RTOS Kernel system tick timer interface</description>
 862       <files>
 863         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 864       </files>
 865     </api>
 866     <!-- CMSIS-RTOS API -->
 867     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 868       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 869       <files>
 870         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 871       </files>
 872     </api>
 873     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 874       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 875       <files>
 876         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 877         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 878       </files>
 879     </api>
 880     <!-- CMSIS Driver API -->
 881     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 882       <description>USART Driver API for Cortex-M</description>
 883       <files>
 884         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 885         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 886       </files>
 887     </api>
 888     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 889       <description>SPI Driver API for Cortex-M</description>
 890       <files>
 891         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 892         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 893       </files>
 894     </api>
 895     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 896       <description>SAI Driver API for Cortex-M</description>
 897       <files>
 898         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 899         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 900       </files>
 901     </api>
 902     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 903       <description>I2C Driver API for Cortex-M</description>
 904       <files>
 905         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 906         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 907       </files>
 908     </api>
 909     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 910       <description>CAN Driver API for Cortex-M</description>
 911       <files>
 912         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 913         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 914       </files>
 915     </api>
 916     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 917       <description>Flash Driver API for Cortex-M</description>
 918       <files>
 919         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 920         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 921       </files>
 922     </api>
 923     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 924       <description>MCI Driver API for Cortex-M</description>
 925       <files>
 926         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 927         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 928       </files>
 929     </api>
 930     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 931       <description>NAND Flash Driver API for Cortex-M</description>
 932       <files>
 933         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 934         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 935       </files>
 936     </api>
 937     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 938       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 939       <files>
 940         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 941         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 942         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 943       </files>
 944     </api>
 945     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 946       <description>Ethernet MAC Driver API for Cortex-M</description>
 947       <files>
 948         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 949         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 950       </files>
 951     </api>
 952     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 953       <description>Ethernet PHY Driver API for Cortex-M</description>
 954       <files>
 955         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 956         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 957       </files>
 958     </api>
 959     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 960       <description>USB Device Driver API for Cortex-M</description>
 961       <files>
 962         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 963         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 964       </files>
 965     </api>
 966     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
 967       <description>USB Host Driver API for Cortex-M</description>
 968       <files>
 969         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 970         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 971       </files>
 972     </api>
 973     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
 974       <description>WiFi driver</description>
 975       <files>
 976         <file category="doc"  name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 977         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 978       </files>
 979     </api>
 980     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
 981       <description>Virtual I/O</description>
 982       <files>
 983   <!--  <file category="doc" name="CMSIS/Documentation/Driver/html/vio_pg.html"/> -->
 984         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
 985       </files>
 986     </api>
 987   </apis>
 988
 989   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 990   <conditions>
 991     <!-- compiler -->
 992     <condition id="ARMCC6">
 993       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 994       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 995     </condition>
 996     <condition id="ARMCC5">
 997       <require Tcompiler="ARMCC" Toptions="AC5"/>
 998     </condition>
 999     <condition id="ARMCC">
1000       <require Tcompiler="ARMCC"/>
1001     </condition>
1002     <condition id="GCC">
1003       <require Tcompiler="GCC"/>
1004     </condition>
1005     <condition id="IAR">
1006       <require Tcompiler="IAR"/>
1007     </condition>
1008     <condition id="ARMCC GCC">
1009       <accept Tcompiler="ARMCC"/>
1010       <accept Tcompiler="GCC"/>
1011     </condition>
1012     <condition id="ARMCC GCC IAR">
1013       <accept Tcompiler="ARMCC"/>
1014       <accept Tcompiler="GCC"/>
1015       <accept Tcompiler="IAR"/>
1016     </condition>
1017
1018     <!-- Arm architecture -->
1019     <condition id="ARMv6-M Device">
1020       <description>Armv6-M architecture based device</description>
1021       <accept Dcore="Cortex-M0"/>
1022       <accept Dcore="Cortex-M1"/>
1023       <accept Dcore="Cortex-M0+"/>
1024       <accept Dcore="SC000"/>
1025     </condition>
1026     <condition id="ARMv7-M Device">
1027       <description>Armv7-M architecture based device</description>
1028       <accept Dcore="Cortex-M3"/>
1029       <accept Dcore="Cortex-M4"/>
1030       <accept Dcore="Cortex-M7"/>
1031       <accept Dcore="SC300"/>
1032     </condition>
1033     <condition id="ARMv8-M Device">
1034       <description>Armv8-M architecture based device</description>
1035       <accept Dcore="ARMV8MBL"/>
1036       <accept Dcore="ARMV8MML"/>
1037       <accept Dcore="ARMV81MML"/>
1038       <accept Dcore="Cortex-M23"/>
1039       <accept Dcore="Cortex-M33"/>
1040       <accept Dcore="Cortex-M35P"/>
1041       <accept Dcore="Cortex-M55"/>
1042     </condition>
1043     <condition id="ARMv6_7-M Device">
1044       <description>Armv6_7-M architecture based device</description>
1045       <accept condition="ARMv6-M Device"/>
1046       <accept condition="ARMv7-M Device"/>
1047     </condition>
1048     <condition id="ARMv6_7_8-M Device">
1049       <description>Armv6_7_8-M architecture based device</description>
1050       <accept condition="ARMv6-M Device"/>
1051       <accept condition="ARMv7-M Device"/>
1052       <accept condition="ARMv8-M Device"/>
1053     </condition>
1054     <condition id="ARMv7-A Device">
1055       <description>Armv7-A architecture based device</description>
1056       <accept Dcore="Cortex-A5"/>
1057       <accept Dcore="Cortex-A7"/>
1058       <accept Dcore="Cortex-A9"/>
1059     </condition>
1060
1061     <condition id="TrustZone">
1062       <description>TrustZone</description>
1063       <require Dtz="TZ"/>
1064     </condition>
1065     <condition id="TZ Secure">
1066       <description>TrustZone (Secure)</description>
1067       <require Dtz="TZ"/>
1068       <require Dsecure="Secure"/>
1069     </condition>
1070     <condition id="TZ Non-secure">
1071       <description>TrustZone (Non-secure)</description>
1072       <require Dtz="TZ"/>
1073       <require Dsecure="Non-secure"/>
1074     </condition>
1075
1076     <!-- ARM core -->
1077     <condition id="CM0">
1078       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1079       <accept Dcore="Cortex-M0"/>
1080       <accept Dcore="Cortex-M0+"/>
1081       <accept Dcore="SC000"/>
1082     </condition>
1083     <condition id="CM1">
1084       <description>Cortex-M1</description>
1085       <require Dcore="Cortex-M1"/>
1086     </condition>
1087     <condition id="CM3">
1088       <description>Cortex-M3 or SC300 processor based device</description>
1089       <accept Dcore="Cortex-M3"/>
1090       <accept Dcore="SC300"/>
1091     </condition>
1092     <condition id="CM4">
1093       <description>Cortex-M4 processor based device</description>
1094       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1095     </condition>
1096     <condition id="CM4_FP">
1097       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1098       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1099       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1100       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1101     </condition>
1102     <condition id="CM7">
1103       <description>Cortex-M7 processor based device</description>
1104       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1105     </condition>
1106     <condition id="CM7_FP">
1107       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1108       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1109       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1110     </condition>
1111     <condition id="CM7_SP">
1112       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1113       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1114     </condition>
1115     <condition id="CM7_DP">
1116       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1117       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1118     </condition>
1119     <condition id="CM23">
1120       <description>Cortex-M23 processor based device</description>
1121       <require Dcore="Cortex-M23"/>
1122     </condition>
1123     <condition id="CM33">
1124       <description>Cortex-M33 processor based device</description>
1125       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1126     </condition>
1127     <condition id="CM33_FP">
1128       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1129       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1130     </condition>
1131     <condition id="CM35P">
1132       <description>Cortex-M35P processor based device</description>
1133       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1134     </condition>
1135     <condition id="CM35P_FP">
1136       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1137       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1138     </condition>
1139     <condition id="CM55">
1140       <description>Cortex-M55 processor based device</description>
1141       <require Dcore="Cortex-M55"/>
1142     </condition>
1143     <condition id="ARMv8MBL">
1144       <description>Armv8-M Baseline processor based device</description>
1145       <require Dcore="ARMV8MBL"/>
1146     </condition>
1147     <condition id="ARMv8MML">
1148       <description>Armv8-M Mainline processor based device</description>
1149       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1150     </condition>
1151     <condition id="ARMv8MML_FP">
1152       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1153       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1154       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1155     </condition>
1156
1157     <condition id="CM33_NODSP_NOFPU">
1158       <description>CM33, no DSP, no FPU</description>
1159       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1160     </condition>
1161     <condition id="CM33_DSP_NOFPU">
1162       <description>CM33, DSP, no FPU</description>
1163       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1164     </condition>
1165     <condition id="CM33_NODSP_SP">
1166       <description>CM33, no DSP, SP FPU</description>
1167       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1168     </condition>
1169     <condition id="CM33_DSP_SP">
1170       <description>CM33, DSP, SP FPU</description>
1171       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1172     </condition>
1173
1174     <condition id="CM35P_NODSP_NOFPU">
1175       <description>CM35P, no DSP, no FPU</description>
1176       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1177     </condition>
1178     <condition id="CM35P_DSP_NOFPU">
1179       <description>CM35P, DSP, no FPU</description>
1180       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1181     </condition>
1182     <condition id="CM35P_NODSP_SP">
1183       <description>CM35P, no DSP, SP FPU</description>
1184       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1185     </condition>
1186     <condition id="CM35P_DSP_SP">
1187       <description>CM35P, DSP, SP FPU</description>
1188       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1189     </condition>
1190
1191     <condition id="ARMv8MML_NODSP_NOFPU">
1192       <description>Armv8-M Mainline, no DSP, no FPU</description>
1193       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1194     </condition>
1195     <condition id="ARMv8MML_DSP_NOFPU">
1196       <description>Armv8-M Mainline, DSP, no FPU</description>
1197       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1198     </condition>
1199     <condition id="ARMv8MML_NODSP_SP">
1200       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1201       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1202     </condition>
1203     <condition id="ARMv8MML_DSP_SP">
1204       <description>Armv8-M Mainline, DSP, SP FPU</description>
1205       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1206     </condition>
1207
1208     <condition id="CA5_CA9">
1209       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1210       <accept Dcore="Cortex-A5"/>
1211       <accept Dcore="Cortex-A9"/>
1212     </condition>
1213
1214     <condition id="CA7">
1215       <description>Cortex-A7 processor based device</description>
1216       <accept Dcore="Cortex-A7"/>
1217     </condition>
1218
1219     <!-- ARMCC compiler -->
1220     <condition id="CA_ARMCC5">
1221       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1222       <require condition="ARMv7-A Device"/>
1223       <require condition="ARMCC5"/>
1224     </condition>
1225     <condition id="CA_ARMCC6">
1226       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1227       <require condition="ARMv7-A Device"/>
1228       <require condition="ARMCC6"/>
1229     </condition>
1230
1231     <condition id="CM0_ARMCC">
1232       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1233       <require condition="CM0"/>
1234       <require Tcompiler="ARMCC"/>
1235     </condition>
1236     <condition id="CM0_LE_ARMCC">
1237       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1238       <require condition="CM0_ARMCC"/>
1239       <require Dendian="Little-endian"/>
1240     </condition>
1241     <condition id="CM0_BE_ARMCC">
1242       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1243       <require condition="CM0_ARMCC"/>
1244       <require Dendian="Big-endian"/>
1245     </condition>
1246
1247     <condition id="CM1_ARMCC">
1248       <description>Cortex-M1 based device for the Arm Compiler</description>
1249       <require condition="CM1"/>
1250       <require Tcompiler="ARMCC"/>
1251     </condition>
1252     <condition id="CM1_LE_ARMCC">
1253       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1254       <require condition="CM1_ARMCC"/>
1255       <require Dendian="Little-endian"/>
1256     </condition>
1257     <condition id="CM1_BE_ARMCC">
1258       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1259       <require condition="CM1_ARMCC"/>
1260       <require Dendian="Big-endian"/>
1261     </condition>
1262
1263     <condition id="CM3_ARMCC">
1264       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1265       <require condition="CM3"/>
1266       <require Tcompiler="ARMCC"/>
1267     </condition>
1268     <condition id="CM3_LE_ARMCC">
1269       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1270       <require condition="CM3_ARMCC"/>
1271       <require Dendian="Little-endian"/>
1272     </condition>
1273     <condition id="CM3_BE_ARMCC">
1274       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1275       <require condition="CM3_ARMCC"/>
1276       <require Dendian="Big-endian"/>
1277     </condition>
1278
1279     <condition id="CM4_ARMCC">
1280       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1281       <require condition="CM4"/>
1282       <require Tcompiler="ARMCC"/>
1283     </condition>
1284     <condition id="CM4_LE_ARMCC">
1285       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1286       <require condition="CM4_ARMCC"/>
1287       <require Dendian="Little-endian"/>
1288     </condition>
1289     <condition id="CM4_BE_ARMCC">
1290       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1291       <require condition="CM4_ARMCC"/>
1292       <require Dendian="Big-endian"/>
1293     </condition>
1294
1295     <condition id="CM4_FP_ARMCC">
1296       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1297       <require condition="CM4_FP"/>
1298       <require Tcompiler="ARMCC"/>
1299     </condition>
1300     <condition id="CM4_FP_LE_ARMCC">
1301       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1302       <require condition="CM4_FP_ARMCC"/>
1303       <require Dendian="Little-endian"/>
1304     </condition>
1305     <condition id="CM4_FP_BE_ARMCC">
1306       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1307       <require condition="CM4_FP_ARMCC"/>
1308       <require Dendian="Big-endian"/>
1309     </condition>
1310
1311     <condition id="CM7_ARMCC">
1312       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1313       <require condition="CM7"/>
1314       <require Tcompiler="ARMCC"/>
1315     </condition>
1316     <condition id="CM7_LE_ARMCC">
1317       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1318       <require condition="CM7_ARMCC"/>
1319       <require Dendian="Little-endian"/>
1320     </condition>
1321     <condition id="CM7_BE_ARMCC">
1322       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1323       <require condition="CM7_ARMCC"/>
1324       <require Dendian="Big-endian"/>
1325     </condition>
1326
1327     <condition id="CM7_FP_ARMCC">
1328       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1329       <require condition="CM7_FP"/>
1330       <require Tcompiler="ARMCC"/>
1331     </condition>
1332     <condition id="CM7_FP_LE_ARMCC">
1333       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1334       <require condition="CM7_FP_ARMCC"/>
1335       <require Dendian="Little-endian"/>
1336     </condition>
1337     <condition id="CM7_FP_BE_ARMCC">
1338       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1339       <require condition="CM7_FP_ARMCC"/>
1340       <require Dendian="Big-endian"/>
1341     </condition>
1342
1343     <condition id="CM7_SP_ARMCC">
1344       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1345       <require condition="CM7_SP"/>
1346       <require Tcompiler="ARMCC"/>
1347     </condition>
1348     <condition id="CM7_SP_LE_ARMCC">
1349       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1350       <require condition="CM7_SP_ARMCC"/>
1351       <require Dendian="Little-endian"/>
1352     </condition>
1353     <condition id="CM7_SP_BE_ARMCC">
1354       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1355       <require condition="CM7_SP_ARMCC"/>
1356       <require Dendian="Big-endian"/>
1357     </condition>
1358
1359     <condition id="CM7_DP_ARMCC">
1360       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1361       <require condition="CM7_DP"/>
1362       <require Tcompiler="ARMCC"/>
1363     </condition>
1364     <condition id="CM7_DP_LE_ARMCC">
1365       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1366       <require condition="CM7_DP_ARMCC"/>
1367       <require Dendian="Little-endian"/>
1368     </condition>
1369     <condition id="CM7_DP_BE_ARMCC">
1370       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1371       <require condition="CM7_DP_ARMCC"/>
1372       <require Dendian="Big-endian"/>
1373     </condition>
1374
1375     <condition id="CM23_ARMCC">
1376       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1377       <require condition="CM23"/>
1378       <require Tcompiler="ARMCC"/>
1379     </condition>
1380     <condition id="CM23_LE_ARMCC">
1381       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1382       <require condition="CM23_ARMCC"/>
1383       <require Dendian="Little-endian"/>
1384     </condition>
1385
1386     <condition id="CM33_ARMCC">
1387       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1388       <require condition="CM33"/>
1389       <require Tcompiler="ARMCC"/>
1390     </condition>
1391     <condition id="CM33_LE_ARMCC">
1392       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1393       <require condition="CM33_ARMCC"/>
1394       <require Dendian="Little-endian"/>
1395     </condition>
1396
1397     <condition id="CM33_FP_ARMCC">
1398       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1399       <require condition="CM33_FP"/>
1400       <require Tcompiler="ARMCC"/>
1401     </condition>
1402     <condition id="CM33_FP_LE_ARMCC">
1403       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1404       <require condition="CM33_FP_ARMCC"/>
1405       <require Dendian="Little-endian"/>
1406     </condition>
1407
1408     <condition id="CM33_NODSP_NOFPU_ARMCC">
1409       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1410       <require condition="CM33_NODSP_NOFPU"/>
1411       <require Tcompiler="ARMCC"/>
1412     </condition>
1413     <condition id="CM33_DSP_NOFPU_ARMCC">
1414       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1415       <require condition="CM33_DSP_NOFPU"/>
1416       <require Tcompiler="ARMCC"/>
1417     </condition>
1418     <condition id="CM33_NODSP_SP_ARMCC">
1419       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1420       <require condition="CM33_NODSP_SP"/>
1421       <require Tcompiler="ARMCC"/>
1422     </condition>
1423     <condition id="CM33_DSP_SP_ARMCC">
1424       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1425       <require condition="CM33_DSP_SP"/>
1426       <require Tcompiler="ARMCC"/>
1427     </condition>
1428     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1429       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1430       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1431       <require Dendian="Little-endian"/>
1432     </condition>
1433     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1434       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1435       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1436       <require Dendian="Little-endian"/>
1437     </condition>
1438     <condition id="CM33_NODSP_SP_LE_ARMCC">
1439       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1440       <require condition="CM33_NODSP_SP_ARMCC"/>
1441       <require Dendian="Little-endian"/>
1442     </condition>
1443     <condition id="CM33_DSP_SP_LE_ARMCC">
1444       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1445       <require condition="CM33_DSP_SP_ARMCC"/>
1446       <require Dendian="Little-endian"/>
1447     </condition>
1448
1449     <condition id="CM35P_ARMCC">
1450       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1451       <require condition="CM35P"/>
1452       <require Tcompiler="ARMCC"/>
1453     </condition>
1454     <condition id="CM35P_LE_ARMCC">
1455       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1456       <require condition="CM35P_ARMCC"/>
1457       <require Dendian="Little-endian"/>
1458     </condition>
1459
1460     <condition id="CM35P_FP_ARMCC">
1461       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1462       <require condition="CM35P_FP"/>
1463       <require Tcompiler="ARMCC"/>
1464     </condition>
1465     <condition id="CM35P_FP_LE_ARMCC">
1466       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1467       <require condition="CM35P_FP_ARMCC"/>
1468       <require Dendian="Little-endian"/>
1469     </condition>
1470
1471     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1472       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1473       <require condition="CM35P_NODSP_NOFPU"/>
1474       <require Tcompiler="ARMCC"/>
1475     </condition>
1476     <condition id="CM35P_DSP_NOFPU_ARMCC">
1477       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1478       <require condition="CM35P_DSP_NOFPU"/>
1479       <require Tcompiler="ARMCC"/>
1480     </condition>
1481     <condition id="CM35P_NODSP_SP_ARMCC">
1482       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1483       <require condition="CM35P_NODSP_SP"/>
1484       <require Tcompiler="ARMCC"/>
1485     </condition>
1486     <condition id="CM35P_DSP_SP_ARMCC">
1487       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1488       <require condition="CM35P_DSP_SP"/>
1489       <require Tcompiler="ARMCC"/>
1490     </condition>
1491     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1492       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1493       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1494       <require Dendian="Little-endian"/>
1495     </condition>
1496     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1497       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1498       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1499       <require Dendian="Little-endian"/>
1500     </condition>
1501     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1502       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1503       <require condition="CM35P_NODSP_SP_ARMCC"/>
1504       <require Dendian="Little-endian"/>
1505     </condition>
1506     <condition id="CM35P_DSP_SP_LE_ARMCC">
1507       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1508       <require condition="CM35P_DSP_SP_ARMCC"/>
1509       <require Dendian="Little-endian"/>
1510     </condition>
1511
1512     <condition id="CM55_ARMCC">
1513       <description>Cortex-M55 processor based device for the Arm Compiler</description>
1514       <require condition="CM55"/>
1515       <require Tcompiler="ARMCC"/>
1516     </condition>
1517     <condition id="CM55_LE_ARMCC">
1518       <description>Cortex-M55 processor based device in little endian mode for the Arm Compiler</description>
1519       <require condition="CM55_ARMCC"/>
1520       <require Dendian="Little-endian"/>
1521     </condition>
1522
1523     <condition id="ARMv8MBL_ARMCC">
1524       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1525       <require condition="ARMv8MBL"/>
1526       <require Tcompiler="ARMCC"/>
1527     </condition>
1528     <condition id="ARMv8MBL_LE_ARMCC">
1529       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1530       <require condition="ARMv8MBL_ARMCC"/>
1531       <require Dendian="Little-endian"/>
1532     </condition>
1533
1534     <condition id="ARMv8MML_ARMCC">
1535       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1536       <require condition="ARMv8MML"/>
1537       <require Tcompiler="ARMCC"/>
1538     </condition>
1539     <condition id="ARMv8MML_LE_ARMCC">
1540       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1541       <require condition="ARMv8MML_ARMCC"/>
1542       <require Dendian="Little-endian"/>
1543     </condition>
1544
1545     <condition id="ARMv8MML_FP_ARMCC">
1546       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1547       <require condition="ARMv8MML_FP"/>
1548       <require Tcompiler="ARMCC"/>
1549     </condition>
1550     <condition id="ARMv8MML_FP_LE_ARMCC">
1551       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1552       <require condition="ARMv8MML_FP_ARMCC"/>
1553       <require Dendian="Little-endian"/>
1554     </condition>
1555
1556     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1557       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1558       <require condition="ARMv8MML_NODSP_NOFPU"/>
1559       <require Tcompiler="ARMCC"/>
1560     </condition>
1561     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1562       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1563       <require condition="ARMv8MML_DSP_NOFPU"/>
1564       <require Tcompiler="ARMCC"/>
1565     </condition>
1566     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1567       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1568       <require condition="ARMv8MML_NODSP_SP"/>
1569       <require Tcompiler="ARMCC"/>
1570     </condition>
1571     <condition id="ARMv8MML_DSP_SP_ARMCC">
1572       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1573       <require condition="ARMv8MML_DSP_SP"/>
1574       <require Tcompiler="ARMCC"/>
1575     </condition>
1576     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1577       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1578       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1579       <require Dendian="Little-endian"/>
1580     </condition>
1581     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1582       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1583       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1584       <require Dendian="Little-endian"/>
1585     </condition>
1586     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1587       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1588       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1589       <require Dendian="Little-endian"/>
1590     </condition>
1591     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1592       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1593       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1594       <require Dendian="Little-endian"/>
1595     </condition>
1596
1597     <!-- GCC compiler -->
1598     <condition id="CA_GCC">
1599       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1600       <require condition="ARMv7-A Device"/>
1601       <require Tcompiler="GCC"/>
1602     </condition>
1603
1604     <condition id="CM0_GCC">
1605       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1606       <require condition="CM0"/>
1607       <require Tcompiler="GCC"/>
1608     </condition>
1609     <condition id="CM0_LE_GCC">
1610       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1611       <require condition="CM0_GCC"/>
1612       <require Dendian="Little-endian"/>
1613     </condition>
1614     <condition id="CM0_BE_GCC">
1615       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1616       <require condition="CM0_GCC"/>
1617       <require Dendian="Big-endian"/>
1618     </condition>
1619
1620     <condition id="CM1_GCC">
1621       <description>Cortex-M1 based device for the GCC Compiler</description>
1622       <require condition="CM1"/>
1623       <require Tcompiler="GCC"/>
1624     </condition>
1625     <condition id="CM1_LE_GCC">
1626       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1627       <require condition="CM1_GCC"/>
1628       <require Dendian="Little-endian"/>
1629     </condition>
1630     <condition id="CM1_BE_GCC">
1631       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1632       <require condition="CM1_GCC"/>
1633       <require Dendian="Big-endian"/>
1634     </condition>
1635
1636     <condition id="CM3_GCC">
1637       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1638       <require condition="CM3"/>
1639       <require Tcompiler="GCC"/>
1640     </condition>
1641     <condition id="CM3_LE_GCC">
1642       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1643       <require condition="CM3_GCC"/>
1644       <require Dendian="Little-endian"/>
1645     </condition>
1646     <condition id="CM3_BE_GCC">
1647       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1648       <require condition="CM3_GCC"/>
1649       <require Dendian="Big-endian"/>
1650     </condition>
1651
1652     <condition id="CM4_GCC">
1653       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1654       <require condition="CM4"/>
1655       <require Tcompiler="GCC"/>
1656     </condition>
1657     <condition id="CM4_LE_GCC">
1658       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1659       <require condition="CM4_GCC"/>
1660       <require Dendian="Little-endian"/>
1661     </condition>
1662     <condition id="CM4_BE_GCC">
1663       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1664       <require condition="CM4_GCC"/>
1665       <require Dendian="Big-endian"/>
1666     </condition>
1667
1668     <condition id="CM4_FP_GCC">
1669       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1670       <require condition="CM4_FP"/>
1671       <require Tcompiler="GCC"/>
1672     </condition>
1673     <condition id="CM4_FP_LE_GCC">
1674       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1675       <require condition="CM4_FP_GCC"/>
1676       <require Dendian="Little-endian"/>
1677     </condition>
1678     <condition id="CM4_FP_BE_GCC">
1679       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1680       <require condition="CM4_FP_GCC"/>
1681       <require Dendian="Big-endian"/>
1682     </condition>
1683
1684     <condition id="CM7_GCC">
1685       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1686       <require condition="CM7"/>
1687       <require Tcompiler="GCC"/>
1688     </condition>
1689     <condition id="CM7_LE_GCC">
1690       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1691       <require condition="CM7_GCC"/>
1692       <require Dendian="Little-endian"/>
1693     </condition>
1694     <condition id="CM7_BE_GCC">
1695       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1696       <require condition="CM7_GCC"/>
1697       <require Dendian="Big-endian"/>
1698     </condition>
1699
1700     <condition id="CM7_FP_GCC">
1701       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1702       <require condition="CM7_FP"/>
1703       <require Tcompiler="GCC"/>
1704     </condition>
1705     <condition id="CM7_FP_LE_GCC">
1706       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1707       <require condition="CM7_FP_GCC"/>
1708       <require Dendian="Little-endian"/>
1709     </condition>
1710     <condition id="CM7_FP_BE_GCC">
1711       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1712       <require condition="CM7_FP_GCC"/>
1713       <require Dendian="Big-endian"/>
1714     </condition>
1715
1716     <condition id="CM7_SP_GCC">
1717       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1718       <require condition="CM7_SP"/>
1719       <require Tcompiler="GCC"/>
1720     </condition>
1721     <condition id="CM7_SP_LE_GCC">
1722       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1723       <require condition="CM7_SP_GCC"/>
1724       <require Dendian="Little-endian"/>
1725     </condition>
1726
1727     <condition id="CM7_DP_GCC">
1728       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1729       <require condition="CM7_DP"/>
1730       <require Tcompiler="GCC"/>
1731     </condition>
1732     <condition id="CM7_DP_LE_GCC">
1733       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1734       <require condition="CM7_DP_GCC"/>
1735       <require Dendian="Little-endian"/>
1736     </condition>
1737
1738     <condition id="CM23_GCC">
1739       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1740       <require condition="CM23"/>
1741       <require Tcompiler="GCC"/>
1742     </condition>
1743     <condition id="CM23_LE_GCC">
1744       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1745       <require condition="CM23_GCC"/>
1746       <require Dendian="Little-endian"/>
1747     </condition>
1748
1749     <condition id="CM33_GCC">
1750       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1751       <require condition="CM33"/>
1752       <require Tcompiler="GCC"/>
1753     </condition>
1754     <condition id="CM33_LE_GCC">
1755       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1756       <require condition="CM33_GCC"/>
1757       <require Dendian="Little-endian"/>
1758     </condition>
1759
1760     <condition id="CM33_FP_GCC">
1761       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1762       <require condition="CM33_FP"/>
1763       <require Tcompiler="GCC"/>
1764     </condition>
1765     <condition id="CM33_FP_LE_GCC">
1766       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1767       <require condition="CM33_FP_GCC"/>
1768       <require Dendian="Little-endian"/>
1769     </condition>
1770
1771     <condition id="CM33_NODSP_NOFPU_GCC">
1772       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1773       <require condition="CM33_NODSP_NOFPU"/>
1774       <require Tcompiler="GCC"/>
1775     </condition>
1776     <condition id="CM33_DSP_NOFPU_GCC">
1777       <description>CM33, DSP, no FPU, GCC Compiler</description>
1778       <require condition="CM33_DSP_NOFPU"/>
1779       <require Tcompiler="GCC"/>
1780     </condition>
1781     <condition id="CM33_NODSP_SP_GCC">
1782       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1783       <require condition="CM33_NODSP_SP"/>
1784       <require Tcompiler="GCC"/>
1785     </condition>
1786     <condition id="CM33_DSP_SP_GCC">
1787       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1788       <require condition="CM33_DSP_SP"/>
1789       <require Tcompiler="GCC"/>
1790     </condition>
1791     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1792       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1793       <require condition="CM33_NODSP_NOFPU_GCC"/>
1794       <require Dendian="Little-endian"/>
1795     </condition>
1796     <condition id="CM33_DSP_NOFPU_LE_GCC">
1797       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1798       <require condition="CM33_DSP_NOFPU_GCC"/>
1799       <require Dendian="Little-endian"/>
1800     </condition>
1801     <condition id="CM33_NODSP_SP_LE_GCC">
1802       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1803       <require condition="CM33_NODSP_SP_GCC"/>
1804       <require Dendian="Little-endian"/>
1805     </condition>
1806     <condition id="CM33_DSP_SP_LE_GCC">
1807       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1808       <require condition="CM33_DSP_SP_GCC"/>
1809       <require Dendian="Little-endian"/>
1810     </condition>
1811
1812     <condition id="CM35P_GCC">
1813       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1814       <require condition="CM35P"/>
1815       <require Tcompiler="GCC"/>
1816     </condition>
1817     <condition id="CM35P_LE_GCC">
1818       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1819       <require condition="CM35P_GCC"/>
1820       <require Dendian="Little-endian"/>
1821     </condition>
1822
1823     <condition id="CM35P_FP_GCC">
1824       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1825       <require condition="CM35P_FP"/>
1826       <require Tcompiler="GCC"/>
1827     </condition>
1828     <condition id="CM35P_FP_LE_GCC">
1829       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1830       <require condition="CM35P_FP_GCC"/>
1831       <require Dendian="Little-endian"/>
1832     </condition>
1833
1834     <condition id="CM35P_NODSP_NOFPU_GCC">
1835       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1836       <require condition="CM35P_NODSP_NOFPU"/>
1837       <require Tcompiler="GCC"/>
1838     </condition>
1839     <condition id="CM35P_DSP_NOFPU_GCC">
1840       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1841       <require condition="CM35P_DSP_NOFPU"/>
1842       <require Tcompiler="GCC"/>
1843     </condition>
1844     <condition id="CM35P_NODSP_SP_GCC">
1845       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1846       <require condition="CM35P_NODSP_SP"/>
1847       <require Tcompiler="GCC"/>
1848     </condition>
1849     <condition id="CM35P_DSP_SP_GCC">
1850       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1851       <require condition="CM35P_DSP_SP"/>
1852       <require Tcompiler="GCC"/>
1853     </condition>
1854     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1855       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1856       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1857       <require Dendian="Little-endian"/>
1858     </condition>
1859     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1860       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1861       <require condition="CM35P_DSP_NOFPU_GCC"/>
1862       <require Dendian="Little-endian"/>
1863     </condition>
1864     <condition id="CM35P_NODSP_SP_LE_GCC">
1865       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1866       <require condition="CM35P_NODSP_SP_GCC"/>
1867       <require Dendian="Little-endian"/>
1868     </condition>
1869     <condition id="CM35P_DSP_SP_LE_GCC">
1870       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1871       <require condition="CM35P_DSP_SP_GCC"/>
1872       <require Dendian="Little-endian"/>
1873     </condition>
1874
1875     <condition id="CM55_GCC">
1876       <description>Cortex-M55 processor based device for the GCC Compiler</description>
1877       <require condition="CM55"/>
1878       <require Tcompiler="GCC"/>
1879     </condition>
1880     <condition id="CM55_LE_GCC">
1881       <description>Cortex-M55 processor based device in little endian mode for the GCC Compiler</description>
1882       <require condition="CM55_GCC"/>
1883       <require Dendian="Little-endian"/>
1884     </condition>
1885
1886     <condition id="ARMv8MBL_GCC">
1887       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1888       <require condition="ARMv8MBL"/>
1889       <require Tcompiler="GCC"/>
1890     </condition>
1891     <condition id="ARMv8MBL_LE_GCC">
1892       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1893       <require condition="ARMv8MBL_GCC"/>
1894       <require Dendian="Little-endian"/>
1895     </condition>
1896
1897     <condition id="ARMv8MML_GCC">
1898       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1899       <require condition="ARMv8MML"/>
1900       <require Tcompiler="GCC"/>
1901     </condition>
1902     <condition id="ARMv8MML_LE_GCC">
1903       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1904       <require condition="ARMv8MML_GCC"/>
1905       <require Dendian="Little-endian"/>
1906     </condition>
1907
1908     <condition id="ARMv8MML_FP_GCC">
1909       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1910       <require condition="ARMv8MML_FP"/>
1911       <require Tcompiler="GCC"/>
1912     </condition>
1913     <condition id="ARMv8MML_FP_LE_GCC">
1914       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1915       <require condition="ARMv8MML_FP_GCC"/>
1916       <require Dendian="Little-endian"/>
1917     </condition>
1918
1919     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1920       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1921       <require condition="ARMv8MML_NODSP_NOFPU"/>
1922       <require Tcompiler="GCC"/>
1923     </condition>
1924     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1925       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1926       <require condition="ARMv8MML_DSP_NOFPU"/>
1927       <require Tcompiler="GCC"/>
1928     </condition>
1929     <condition id="ARMv8MML_NODSP_SP_GCC">
1930       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1931       <require condition="ARMv8MML_NODSP_SP"/>
1932       <require Tcompiler="GCC"/>
1933     </condition>
1934     <condition id="ARMv8MML_DSP_SP_GCC">
1935       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1936       <require condition="ARMv8MML_DSP_SP"/>
1937       <require Tcompiler="GCC"/>
1938     </condition>
1939     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1940       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1941       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1942       <require Dendian="Little-endian"/>
1943     </condition>
1944     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1945       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1946       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1947       <require Dendian="Little-endian"/>
1948     </condition>
1949     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1950       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1951       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1952       <require Dendian="Little-endian"/>
1953     </condition>
1954     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1955       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1956       <require condition="ARMv8MML_DSP_SP_GCC"/>
1957       <require Dendian="Little-endian"/>
1958     </condition>
1959
1960     <!-- IAR compiler -->
1961     <condition id="CA_IAR">
1962       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1963       <require condition="ARMv7-A Device"/>
1964       <require Tcompiler="IAR"/>
1965     </condition>
1966
1967     <condition id="CM0_IAR">
1968       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1969       <require condition="CM0"/>
1970       <require Tcompiler="IAR"/>
1971     </condition>
1972     <condition id="CM0_LE_IAR">
1973       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1974       <require condition="CM0_IAR"/>
1975       <require Dendian="Little-endian"/>
1976     </condition>
1977     <condition id="CM0_BE_IAR">
1978       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1979       <require condition="CM0_IAR"/>
1980       <require Dendian="Big-endian"/>
1981     </condition>
1982
1983     <condition id="CM1_IAR">
1984       <description>Cortex-M1 based device for the IAR Compiler</description>
1985       <require condition="CM1"/>
1986       <require Tcompiler="IAR"/>
1987     </condition>
1988     <condition id="CM1_LE_IAR">
1989       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1990       <require condition="CM1_IAR"/>
1991       <require Dendian="Little-endian"/>
1992     </condition>
1993     <condition id="CM1_BE_IAR">
1994       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1995       <require condition="CM1_IAR"/>
1996       <require Dendian="Big-endian"/>
1997     </condition>
1998
1999     <condition id="CM3_IAR">
2000       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
2001       <require condition="CM3"/>
2002       <require Tcompiler="IAR"/>
2003     </condition>
2004     <condition id="CM3_LE_IAR">
2005       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
2006       <require condition="CM3_IAR"/>
2007       <require Dendian="Little-endian"/>
2008     </condition>
2009     <condition id="CM3_BE_IAR">
2010       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
2011       <require condition="CM3_IAR"/>
2012       <require Dendian="Big-endian"/>
2013     </condition>
2014
2015     <condition id="CM4_IAR">
2016       <description>Cortex-M4 processor based device for the IAR Compiler</description>
2017       <require condition="CM4"/>
2018       <require Tcompiler="IAR"/>
2019     </condition>
2020     <condition id="CM4_LE_IAR">
2021       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
2022       <require condition="CM4_IAR"/>
2023       <require Dendian="Little-endian"/>
2024     </condition>
2025     <condition id="CM4_BE_IAR">
2026       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
2027       <require condition="CM4_IAR"/>
2028       <require Dendian="Big-endian"/>
2029     </condition>
2030
2031     <condition id="CM4_FP_IAR">
2032       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
2033       <require condition="CM4_FP"/>
2034       <require Tcompiler="IAR"/>
2035     </condition>
2036     <condition id="CM4_FP_LE_IAR">
2037       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2038       <require condition="CM4_FP_IAR"/>
2039       <require Dendian="Little-endian"/>
2040     </condition>
2041     <condition id="CM4_FP_BE_IAR">
2042       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2043       <require condition="CM4_FP_IAR"/>
2044       <require Dendian="Big-endian"/>
2045     </condition>
2046
2047     <condition id="CM7_IAR">
2048       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2049       <require condition="CM7"/>
2050       <require Tcompiler="IAR"/>
2051     </condition>
2052     <condition id="CM7_LE_IAR">
2053       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2054       <require condition="CM7_IAR"/>
2055       <require Dendian="Little-endian"/>
2056     </condition>
2057     <condition id="CM7_BE_IAR">
2058       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2059       <require condition="CM7_IAR"/>
2060       <require Dendian="Big-endian"/>
2061     </condition>
2062
2063     <condition id="CM7_FP_IAR">
2064       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2065       <require condition="CM7_FP"/>
2066       <require Tcompiler="IAR"/>
2067     </condition>
2068     <condition id="CM7_FP_LE_IAR">
2069       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2070       <require condition="CM7_FP_IAR"/>
2071       <require Dendian="Little-endian"/>
2072     </condition>
2073     <condition id="CM7_FP_BE_IAR">
2074       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2075       <require condition="CM7_FP_IAR"/>
2076       <require Dendian="Big-endian"/>
2077     </condition>
2078
2079     <condition id="CM7_SP_IAR">
2080       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2081       <require condition="CM7_SP"/>
2082       <require Tcompiler="IAR"/>
2083     </condition>
2084     <condition id="CM7_SP_LE_IAR">
2085       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2086       <require condition="CM7_SP_IAR"/>
2087       <require Dendian="Little-endian"/>
2088     </condition>
2089     <condition id="CM7_SP_BE_IAR">
2090       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2091       <require condition="CM7_SP_IAR"/>
2092       <require Dendian="Big-endian"/>
2093     </condition>
2094
2095     <condition id="CM7_DP_IAR">
2096       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2097       <require condition="CM7_DP"/>
2098       <require Tcompiler="IAR"/>
2099     </condition>
2100     <condition id="CM7_DP_LE_IAR">
2101       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2102       <require condition="CM7_DP_IAR"/>
2103       <require Dendian="Little-endian"/>
2104     </condition>
2105     <condition id="CM7_DP_BE_IAR">
2106       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2107       <require condition="CM7_DP_IAR"/>
2108       <require Dendian="Big-endian"/>
2109     </condition>
2110
2111     <condition id="CM23_IAR">
2112       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2113       <require condition="CM23"/>
2114       <require Tcompiler="IAR"/>
2115     </condition>
2116     <condition id="CM23_LE_IAR">
2117       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2118       <require condition="CM23_IAR"/>
2119       <require Dendian="Little-endian"/>
2120     </condition>
2121
2122     <condition id="CM33_IAR">
2123       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2124       <require condition="CM33"/>
2125       <require Tcompiler="IAR"/>
2126     </condition>
2127     <condition id="CM33_LE_IAR">
2128       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2129       <require condition="CM33_IAR"/>
2130       <require Dendian="Little-endian"/>
2131     </condition>
2132
2133     <condition id="CM33_FP_IAR">
2134       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2135       <require condition="CM33_FP"/>
2136       <require Tcompiler="IAR"/>
2137     </condition>
2138     <condition id="CM33_FP_LE_IAR">
2139       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2140       <require condition="CM33_FP_IAR"/>
2141       <require Dendian="Little-endian"/>
2142     </condition>
2143
2144     <condition id="CM33_NODSP_NOFPU_IAR">
2145       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2146       <require condition="CM33_NODSP_NOFPU"/>
2147       <require Tcompiler="IAR"/>
2148     </condition>
2149     <condition id="CM33_DSP_NOFPU_IAR">
2150       <description>CM33, DSP, no FPU, IAR Compiler</description>
2151       <require condition="CM33_DSP_NOFPU"/>
2152       <require Tcompiler="IAR"/>
2153     </condition>
2154     <condition id="CM33_NODSP_SP_IAR">
2155       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2156       <require condition="CM33_NODSP_SP"/>
2157       <require Tcompiler="IAR"/>
2158     </condition>
2159     <condition id="CM33_DSP_SP_IAR">
2160       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2161       <require condition="CM33_DSP_SP"/>
2162       <require Tcompiler="IAR"/>
2163     </condition>
2164     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2165       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2166       <require condition="CM33_NODSP_NOFPU_IAR"/>
2167       <require Dendian="Little-endian"/>
2168     </condition>
2169     <condition id="CM33_DSP_NOFPU_LE_IAR">
2170       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2171       <require condition="CM33_DSP_NOFPU_IAR"/>
2172       <require Dendian="Little-endian"/>
2173     </condition>
2174     <condition id="CM33_NODSP_SP_LE_IAR">
2175       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2176       <require condition="CM33_NODSP_SP_IAR"/>
2177       <require Dendian="Little-endian"/>
2178     </condition>
2179     <condition id="CM33_DSP_SP_LE_IAR">
2180       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2181       <require condition="CM33_DSP_SP_IAR"/>
2182       <require Dendian="Little-endian"/>
2183     </condition>
2184
2185     <condition id="CM35P_IAR">
2186       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2187       <require condition="CM35P"/>
2188       <require Tcompiler="IAR"/>
2189     </condition>
2190     <condition id="CM35P_LE_IAR">
2191       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2192       <require condition="CM35P_IAR"/>
2193       <require Dendian="Little-endian"/>
2194     </condition>
2195
2196     <condition id="CM35P_FP_IAR">
2197       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2198       <require condition="CM35P_FP"/>
2199       <require Tcompiler="IAR"/>
2200     </condition>
2201     <condition id="CM35P_FP_LE_IAR">
2202       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2203       <require condition="CM35P_FP_IAR"/>
2204       <require Dendian="Little-endian"/>
2205     </condition>
2206
2207     <condition id="CM35P_NODSP_NOFPU_IAR">
2208       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2209       <require condition="CM35P_NODSP_NOFPU"/>
2210       <require Tcompiler="IAR"/>
2211     </condition>
2212     <condition id="CM35P_DSP_NOFPU_IAR">
2213       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2214       <require condition="CM35P_DSP_NOFPU"/>
2215       <require Tcompiler="IAR"/>
2216     </condition>
2217     <condition id="CM35P_NODSP_SP_IAR">
2218       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2219       <require condition="CM35P_NODSP_SP"/>
2220       <require Tcompiler="IAR"/>
2221     </condition>
2222     <condition id="CM35P_DSP_SP_IAR">
2223       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2224       <require condition="CM35P_DSP_SP"/>
2225       <require Tcompiler="IAR"/>
2226     </condition>
2227     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2228       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2229       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2230       <require Dendian="Little-endian"/>
2231     </condition>
2232     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2233       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2234       <require condition="CM35P_DSP_NOFPU_IAR"/>
2235       <require Dendian="Little-endian"/>
2236     </condition>
2237     <condition id="CM35P_NODSP_SP_LE_IAR">
2238       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2239       <require condition="CM35P_NODSP_SP_IAR"/>
2240       <require Dendian="Little-endian"/>
2241     </condition>
2242     <condition id="CM35P_DSP_SP_LE_IAR">
2243       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2244       <require condition="CM35P_DSP_SP_IAR"/>
2245       <require Dendian="Little-endian"/>
2246     </condition>
2247
2248     <condition id="CM55_IAR">
2249       <description>Cortex-M55 processor based device for the IAR Compiler</description>
2250       <require condition="CM55"/>
2251       <require Tcompiler="IAR"/>
2252     </condition>
2253     <condition id="CM55_LE_IAR">
2254       <description>Cortex-M55 processor based device in little endian mode for the IAR Compiler</description>
2255       <require condition="CM55_IAR"/>
2256       <require Dendian="Little-endian"/>
2257     </condition>
2258
2259     <condition id="ARMv8MBL_IAR">
2260       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2261       <require condition="ARMv8MBL"/>
2262       <require Tcompiler="IAR"/>
2263     </condition>
2264     <condition id="ARMv8MBL_LE_IAR">
2265       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2266       <require condition="ARMv8MBL_IAR"/>
2267       <require Dendian="Little-endian"/>
2268     </condition>
2269
2270     <condition id="ARMv8MML_IAR">
2271       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2272       <require condition="ARMv8MML"/>
2273       <require Tcompiler="IAR"/>
2274     </condition>
2275     <condition id="ARMv8MML_LE_IAR">
2276       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2277       <require condition="ARMv8MML_IAR"/>
2278       <require Dendian="Little-endian"/>
2279     </condition>
2280
2281     <condition id="ARMv8MML_FP_IAR">
2282       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2283       <require condition="ARMv8MML_FP"/>
2284       <require Tcompiler="IAR"/>
2285     </condition>
2286     <condition id="ARMv8MML_FP_LE_IAR">
2287       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2288       <require condition="ARMv8MML_FP_IAR"/>
2289       <require Dendian="Little-endian"/>
2290     </condition>
2291
2292     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2293       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2294       <require condition="ARMv8MML_NODSP_NOFPU"/>
2295       <require Tcompiler="IAR"/>
2296     </condition>
2297     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2298       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2299       <require condition="ARMv8MML_DSP_NOFPU"/>
2300       <require Tcompiler="IAR"/>
2301     </condition>
2302     <condition id="ARMv8MML_NODSP_SP_IAR">
2303       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2304       <require condition="ARMv8MML_NODSP_SP"/>
2305       <require Tcompiler="IAR"/>
2306     </condition>
2307     <condition id="ARMv8MML_DSP_SP_IAR">
2308       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2309       <require condition="ARMv8MML_DSP_SP"/>
2310       <require Tcompiler="IAR"/>
2311     </condition>
2312     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2313       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2314       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2315       <require Dendian="Little-endian"/>
2316     </condition>
2317     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2318       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2319       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2320       <require Dendian="Little-endian"/>
2321     </condition>
2322     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2323       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2324       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2325       <require Dendian="Little-endian"/>
2326     </condition>
2327     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2328       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2329       <require condition="ARMv8MML_DSP_SP_IAR"/>
2330       <require Dendian="Little-endian"/>
2331     </condition>
2332
2333     <!-- conditions selecting single devices and CMSIS Core -->
2334     <condition id="ARMCM0 CMSIS">
2335       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2336       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2337       <require Cclass="CMSIS" Cgroup="CORE"/>
2338     </condition>
2339
2340     <condition id="ARMCM0+ CMSIS">
2341       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2342       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2343       <require Cclass="CMSIS" Cgroup="CORE"/>
2344     </condition>
2345
2346     <condition id="ARMCM1 CMSIS">
2347       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2348       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2349       <require Cclass="CMSIS" Cgroup="CORE"/>
2350     </condition>
2351
2352     <condition id="ARMCM3 CMSIS">
2353       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2354       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2355       <require Cclass="CMSIS" Cgroup="CORE"/>
2356     </condition>
2357
2358     <condition id="ARMCM4 CMSIS">
2359       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2360       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2361       <require Cclass="CMSIS" Cgroup="CORE"/>
2362     </condition>
2363
2364     <condition id="ARMCM7 CMSIS">
2365       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2366       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2367       <require Cclass="CMSIS" Cgroup="CORE"/>
2368     </condition>
2369
2370     <condition id="ARMCM23 CMSIS">
2371       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2372       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2373       <require Cclass="CMSIS" Cgroup="CORE"/>
2374     </condition>
2375
2376     <condition id="ARMCM33 CMSIS">
2377       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2378       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2379       <require Cclass="CMSIS" Cgroup="CORE"/>
2380     </condition>
2381
2382     <condition id="ARMCM35P CMSIS">
2383       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2384       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2385       <require Cclass="CMSIS" Cgroup="CORE"/>
2386     </condition>
2387
2388     <condition id="ARMCM55 CMSIS">
2389       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2390       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2391       <require Cclass="CMSIS" Cgroup="CORE"/>
2392     </condition>
2393
2394     <condition id="ARMSC000 CMSIS">
2395       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2396       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2397       <require Cclass="CMSIS" Cgroup="CORE"/>
2398     </condition>
2399
2400     <condition id="ARMSC300 CMSIS">
2401       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2402       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2403       <require Cclass="CMSIS" Cgroup="CORE"/>
2404     </condition>
2405
2406     <condition id="ARMv8MBL CMSIS">
2407       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2408       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2409       <require Cclass="CMSIS" Cgroup="CORE"/>
2410     </condition>
2411
2412     <condition id="ARMv8MML CMSIS">
2413       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2414       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2415       <require Cclass="CMSIS" Cgroup="CORE"/>
2416     </condition>
2417
2418     <condition id="ARMv81MML CMSIS">
2419       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2420       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2421       <require Cclass="CMSIS" Cgroup="CORE"/>
2422     </condition>
2423
2424     <condition id="ARMCA5 CMSIS">
2425       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2426       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2427       <require Cclass="CMSIS" Cgroup="CORE"/>
2428     </condition>
2429
2430     <condition id="ARMCA7 CMSIS">
2431       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2432       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2433       <require Cclass="CMSIS" Cgroup="CORE"/>
2434     </condition>
2435
2436     <condition id="ARMCA9 CMSIS">
2437       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2438       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2439       <require Cclass="CMSIS" Cgroup="CORE"/>
2440     </condition>
2441
2442     <!-- CMSIS DSP -->
2443     <condition id="CMSIS DSP">
2444       <description>Components required for DSP</description>
2445       <require condition="ARMv6_7_8-M Device"/>
2446       <require condition="ARMCC GCC IAR"/>
2447       <require Cclass="CMSIS" Cgroup="CORE"/>
2448     </condition>
2449
2450     <!-- CMSIS NN -->
2451     <condition id="CMSIS NN">
2452       <description>Components required for NN</description>
2453       <require Cclass="CMSIS" Cgroup="DSP"/>
2454     </condition>
2455
2456     <!-- RTOS RTX -->
2457     <condition id="RTOS RTX">
2458       <description>Components required for RTOS RTX</description>
2459       <require condition="ARMv6_7-M Device"/>
2460       <require condition="ARMCC GCC IAR"/>
2461       <require Cclass="Device" Cgroup="Startup"/>
2462       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2463     </condition>
2464     <condition id="RTOS RTX IFX">
2465       <description>Components required for RTOS RTX IFX</description>
2466       <require condition="ARMv6_7-M Device"/>
2467       <require condition="ARMCC GCC IAR"/>
2468       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2469       <require Cclass="Device" Cgroup="Startup"/>
2470       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2471     </condition>
2472     <condition id="RTOS RTX5">
2473       <description>Components required for RTOS RTX5</description>
2474       <require condition="ARMv6_7_8-M Device"/>
2475       <require condition="ARMCC GCC IAR"/>
2476       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2477     </condition>
2478     <condition id="RTOS2 RTX5">
2479       <description>Components required for RTOS2 RTX5</description>
2480       <require condition="ARMv6_7_8-M Device"/>
2481       <require condition="ARMCC GCC IAR"/>
2482       <require Cclass="CMSIS"  Cgroup="CORE"/>
2483       <require Cclass="Device" Cgroup="Startup"/>
2484     </condition>
2485     <condition id="RTOS2 RTX5 v7-A">
2486       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2487       <require condition="ARMv7-A Device"/>
2488       <require condition="ARMCC GCC IAR"/>
2489       <require Cclass="CMSIS"  Cgroup="CORE"/>
2490       <require Cclass="Device" Cgroup="Startup"/>
2491       <require Cclass="Device" Cgroup="OS Tick"/>
2492       <require Cclass="Device" Cgroup="IRQ Controller"/>
2493     </condition>
2494     <condition id="RTOS2 RTX5 Lib">
2495       <description>Components required for RTOS2 RTX5 Library</description>
2496       <require condition="ARMv6_7_8-M Device"/>
2497       <require condition="ARMCC GCC IAR"/>
2498       <require Cclass="CMSIS"  Cgroup="CORE"/>
2499       <require Cclass="Device" Cgroup="Startup"/>
2500     </condition>
2501     <condition id="RTOS2 RTX5 NS">
2502       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2503       <require condition="ARMv8-M Device"/>
2504       <require condition="TZ Non-secure"/>
2505       <require condition="ARMCC GCC IAR"/>
2506       <require Cclass="CMSIS"  Cgroup="CORE"/>
2507       <require Cclass="Device" Cgroup="Startup"/>
2508     </condition>
2509
2510     <!-- OS Tick -->
2511     <condition id="OS Tick PTIM">
2512       <description>Components required for OS Tick Private Timer</description>
2513       <require condition="CA5_CA9"/>
2514       <require Cclass="Device" Cgroup="IRQ Controller"/>
2515     </condition>
2516
2517     <condition id="OS Tick GTIM">
2518       <description>Components required for OS Tick Generic Physical Timer</description>
2519       <require condition="CA7"/>
2520       <require Cclass="Device" Cgroup="IRQ Controller"/>
2521     </condition>
2522
2523   </conditions>
2524
2525   <components>
2526     <!-- CMSIS-Core component -->
2527     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.4.0"  condition="ARMv6_7_8-M Device" >
2528       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2529       <files>
2530         <!-- CPU independent -->
2531         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2532         <file category="include" name="CMSIS/Core/Include/"/>
2533         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
2534         <!-- Code template -->
2535         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2536         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2537       </files>
2538     </component>
2539
2540     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.4"  condition="ARMv7-A Device" >
2541       <description>CMSIS-CORE for Cortex-A</description>
2542       <files>
2543         <!-- CPU independent -->
2544         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2545         <file category="include" name="CMSIS/Core_A/Include/"/>
2546       </files>
2547     </component>
2548
2549     <!-- CMSIS-Startup components -->
2550     <!-- Cortex-M0 -->
2551     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM0 CMSIS">
2552       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2553       <files>
2554         <!-- include folder / device header file -->
2555         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2556         <!-- startup / system file -->
2557         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.2" attr="config"/>
2558         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2559         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2560         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2561         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2562       </files>
2563     </component>
2564     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2565       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2566       <files>
2567         <!-- include folder / device header file -->
2568         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2569         <!-- startup / system file -->
2570         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2571         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.0.1" attr="config" condition="GCC"/>
2572         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2573         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2574         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2575       </files>
2576     </component>
2577
2578     <!-- Cortex-M0+ -->
2579     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM0+ CMSIS">
2580       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2581       <files>
2582         <!-- include folder / device header file -->
2583         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2584         <!-- startup / system file -->
2585         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.2" attr="config"/>
2586         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2587         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2588         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2589         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2590       </files>
2591     </component>
2592     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0+ CMSIS">
2593       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2594       <files>
2595         <!-- include folder / device header file -->
2596         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2597         <!-- startup / system file -->
2598         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2599         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.0.1" attr="config" condition="GCC"/>
2600         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2601         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2602         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2603       </files>
2604     </component>
2605
2606     <!-- Cortex-M1 -->
2607     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM1 CMSIS">
2608       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2609       <files>
2610         <!-- include folder / device header file -->
2611         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2612         <!-- startup / system file -->
2613         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.2" attr="config"/>
2614         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2615         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2616         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2617         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2618       </files>
2619     </component>
2620     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2621       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2622       <files>
2623         <!-- include folder / device header file -->
2624         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2625         <!-- startup / system file -->
2626         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2627         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.0.1" attr="config" condition="GCC"/>
2628         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2629         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2630         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2631       </files>
2632     </component>
2633
2634     <!-- Cortex-M3 -->
2635     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM3 CMSIS">
2636       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2637       <files>
2638         <!-- include folder / device header file -->
2639         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2640         <!-- startup / system file -->
2641         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.2" attr="config"/>
2642         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2643         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2644         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2645         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2646       </files>
2647     </component>
2648     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2649       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2650       <files>
2651         <!-- include folder / device header file -->
2652         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2653         <!-- startup / system file -->
2654         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2655         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.0.1" attr="config" condition="GCC"/>
2656         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2657         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2658         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2659       </files>
2660     </component>
2661
2662     <!-- Cortex-M4 -->
2663     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM4 CMSIS">
2664       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2665       <files>
2666         <!-- include folder / device header file -->
2667         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2668         <!-- startup / system file -->
2669         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.2" attr="config"/>
2670         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2671         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2672         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2673        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2674       </files>
2675     </component>
2676     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2677       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2678       <files>
2679         <!-- include folder / device header file -->
2680         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2681         <!-- startup / system file -->
2682         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2683         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.0.1" attr="config" condition="GCC"/>
2684         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2685         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2686         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2687       </files>
2688     </component>
2689
2690     <!-- Cortex-M7 -->
2691     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM7 CMSIS">
2692       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2693       <files>
2694         <!-- include folder / device header file -->
2695         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2696         <!-- startup / system file -->
2697         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.2" attr="config"/>
2698         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2699         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2700         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2701         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2702       </files>
2703     </component>
2704     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2705       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2706       <files>
2707         <!-- include folder / device header file -->
2708         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2709         <!-- startup / system file -->
2710         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2711         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.0.1" attr="config" condition="GCC"/>
2712         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2713         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2714         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2715       </files>
2716     </component>
2717
2718     <!-- Cortex-M23 -->
2719     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM23 CMSIS">
2720       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2721       <files>
2722         <!-- include folder / device header file -->
2723         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2724         <!-- startup / system file -->
2725         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.2" attr="config"/>
2726         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
2727         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2728         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2729         <!-- SAU configuration -->
2730         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2731       </files>
2732     </component>
2733     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM23 CMSIS">
2734       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2735       <files>
2736         <!-- include folder / device header file -->
2737         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2738         <!-- startup / system file -->
2739         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.1" attr="config" condition="ARMCC"/>
2740         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.0.1" attr="config" condition="GCC"/>
2741         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.0.0" attr="config" condition="GCC"/>
2742         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2743         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2744         <!-- SAU configuration -->
2745         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2746       </files>
2747     </component>
2748
2749     <!-- Cortex-M33 -->
2750     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM33 CMSIS">
2751       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2752       <files>
2753         <!-- include folder / device header file -->
2754         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2755         <!-- startup / system file -->
2756         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.2" attr="config"/>
2757         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2758         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2759         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2760         <!-- SAU configuration -->
2761         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2762       </files>
2763     </component>
2764     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM33 CMSIS">
2765       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2766       <files>
2767         <!-- include folder / device header file -->
2768         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2769         <!-- startup / system file -->
2770         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2771         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.0.1" attr="config" condition="GCC"/>
2772         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2773         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2774         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2775         <!-- SAU configuration -->
2776         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2777       </files>
2778     </component>
2779
2780     <!-- Cortex-M35P -->
2781     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM35P CMSIS">
2782       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2783       <files>
2784         <!-- include folder / device header file -->
2785         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2786         <!-- startup / system file -->
2787         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.2" attr="config"/>
2788         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2789         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2790         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2791         <!-- SAU configuration -->
2792         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2793       </files>
2794     </component>
2795     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM35P CMSIS">
2796       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2797       <files>
2798         <!-- include folder / device header file -->
2799         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2800         <!-- startup / system file -->
2801         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2802         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.1" attr="config" condition="GCC"/>
2803         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2804         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
2805         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2806         <!-- SAU configuration -->
2807         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2808       </files>
2809     </component>
2810
2811     <!-- Cortex-M55 -->
2812     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM55 CMSIS">
2813       <description>System and Startup for Generic Cortex-M55 device</description>
2814       <files>
2815         <!-- include folder / device header file -->
2816         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2817         <!-- startup / system file -->
2818         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="2.0.2" attr="config"/>
2819         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2820         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2821         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.2.0" attr="config"/>
2822         <!-- SAU configuration -->
2823         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2824       </files>
2825     </component>
2826
2827     <!-- Cortex-SC000 -->
2828     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS">
2829       <description>System and Startup for Generic Arm SC000 device</description>
2830       <files>
2831         <!-- include folder / device header file -->
2832         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2833         <!-- startup / system file -->
2834         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.2" attr="config"/>
2835         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2836         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2837         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2838         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2839       </files>
2840     </component>
2841     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2842       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2843       <files>
2844         <!-- include folder / device header file -->
2845         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2846         <!-- startup / system file -->
2847         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2848         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.0.1" attr="config" condition="GCC"/>
2849         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2850         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2851         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2852       </files>
2853     </component>
2854
2855     <!-- Cortex-SC300 -->
2856     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS">
2857       <description>System and Startup for Generic Arm SC300 device</description>
2858       <files>
2859         <!-- include folder / device header file -->
2860         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2861         <!-- startup / system file -->
2862         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.2" attr="config"/>
2863         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2864         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2865         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2866         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2867       </files>
2868     </component>
2869     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2870       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2871       <files>
2872         <!-- include folder / device header file -->
2873         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2874         <!-- startup / system file -->
2875         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2876         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.0.1" attr="config" condition="GCC"/>
2877         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2878         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2879         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2880       </files>
2881     </component>
2882
2883     <!-- ARMv8MBL -->
2884     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMv8MBL CMSIS">
2885       <description>System and Startup for Generic Armv8-M Baseline device</description>
2886       <files>
2887         <!-- include folder / device header file -->
2888         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2889         <!-- startup / system file -->
2890         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.2" attr="config"/>
2891         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
2892         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2893         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2894         <!-- SAU configuration -->
2895         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2896       </files>
2897     </component>
2898     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMv8MBL CMSIS">
2899       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2900       <files>
2901         <!-- include folder / device header file -->
2902         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2903         <!-- startup / system file -->
2904         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.1" attr="config" condition="ARMCC"/>
2905         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.0.1" attr="config" condition="GCC"/>
2906         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2907         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2908         <!-- SAU configuration -->
2909         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2910       </files>
2911     </component>
2912
2913     <!-- ARMv8MML -->
2914     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMv8MML CMSIS">
2915       <description>System and Startup for Generic Armv8-M Mainline device</description>
2916       <files>
2917         <!-- include folder / device header file -->
2918         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2919         <!-- startup / system file -->
2920         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.2" attr="config"/>
2921         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2922         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2923         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2924         <!-- SAU configuration -->
2925         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2926       </files>
2927     </component>
2928     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMv8MML CMSIS">
2929       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2930       <files>
2931         <!-- include folder / device header file -->
2932         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2933         <!-- startup / system file -->
2934         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2935         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.0.1" attr="config" condition="GCC"/>
2936         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2937         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2938         <!-- SAU configuration -->
2939         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2940       </files>
2941     </component>
2942
2943     <!-- ARMv81MML -->
2944     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv81MML CMSIS">
2945       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2946       <files>
2947         <!-- include folder / device header file -->
2948         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2949         <!-- startup / system file -->
2950         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.2" attr="config"/>
2951         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2952         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.0.0" attr="config" condition="GCC"/>
2953         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.0" attr="config"/>
2954         <!-- SAU configuration -->
2955         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2956       </files>
2957     </component>
2958
2959     <!-- Cortex-A5 -->
2960     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2961       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2962       <files>
2963         <!-- include folder / device header file -->
2964         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2965         <!-- startup / system / mmu files -->
2966         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2967         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2968         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2969         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2970         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2971         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2972         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2973         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2974         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2975         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2976         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2977         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2978
2979       </files>
2980     </component>
2981
2982     <!-- Cortex-A7 -->
2983     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2984       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2985       <files>
2986         <!-- include folder / device header file -->
2987         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2988         <!-- startup / system / mmu files -->
2989         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2990         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2991         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2992         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2993         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2994         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2995         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2996         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2997         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2998         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2999         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
3000         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
3001       </files>
3002     </component>
3003
3004     <!-- Cortex-A9 -->
3005     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
3006       <description>System and Startup for Generic Arm Cortex-A9 device</description>
3007       <files>
3008         <!-- include folder / device header file -->
3009         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3010         <!-- startup / system / mmu files -->
3011         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3012         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3013         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3014         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3015         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3016         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3017         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3018         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3019         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
3020         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
3021         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
3022         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
3023       </files>
3024     </component>
3025
3026     <!-- IRQ Controller -->
3027     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3028       <description>IRQ Controller implementation using GIC</description>
3029       <files>
3030         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3031       </files>
3032     </component>
3033
3034     <!-- OS Tick -->
3035     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3036       <description>OS Tick implementation using Private Timer</description>
3037       <files>
3038         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3039       </files>
3040     </component>
3041
3042     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3043       <description>OS Tick implementation using Generic Physical Timer</description>
3044       <files>
3045         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3046       </files>
3047     </component>
3048
3049     <!-- CMSIS-DSP component -->
3050     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.8.0" isDefaultVariant="true" condition="CMSIS DSP">
3051       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3052       <files>
3053         <!-- CPU independent -->
3054         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3055         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3056
3057         <!-- CPU and Compiler dependent -->
3058         <!-- ARMCC -->
3059         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3060         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3061         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3062         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3063         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3064         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3065         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3066         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3067         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3068         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3069         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3070         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3071         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3072         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3073         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3074         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3075
3076         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3077         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3078         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3079         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3080         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3081         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3082         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3083         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3084         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3085         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3086         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3087         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3088         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3089         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3090         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3091         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3092
3093         <!-- GCC -->
3094         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3095         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3096         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3097         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3098         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3099         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3100         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3101         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3102
3103         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3104         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3105         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3106         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3107         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3108         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3109         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3110         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3111         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3112         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3113         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3114         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3115         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3116         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3117         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3118         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3119
3120         <!-- IAR -->
3121         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3122         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3123         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3124         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3125         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3126         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3127         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3128         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3129         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3130         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3131         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3132         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3133         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3134         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3135         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3136         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3137
3138         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3139         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3140         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3141         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3142         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3143         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3144         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3145         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3146         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3147         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3148         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3149         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3150         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3151         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3152         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3153         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3154
3155       </files>
3156     </component>
3157     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.8.0" condition="CMSIS DSP">
3158       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3159       <files>
3160         <!-- CPU independent -->
3161         <file category="doc"      name="CMSIS/Documentation/DSP/html/index.html"/>
3162         <file category="header"   name="CMSIS/DSP/Include/arm_math.h"/>
3163         <file category="include"  name="CMSIS/DSP/PrivateInclude/"/>
3164
3165         <!-- DSP sources (core) -->
3166         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3167         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
3168         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3169         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3170         <file category="source"   name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3171         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
3172         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3173         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3174         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3175         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3176         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3177         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
3178         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3179
3180         <!-- Compute Library for Cortex-A -->
3181         <file category="header"   name="CMSIS/DSP/ComputeLibrary/Include/NEMath.h"        condition="ARMv7-A Device"/>
3182         <file category="source"   name="CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c"  condition="ARMv7-A Device"/>
3183       </files>
3184     </component>
3185
3186     <!-- CMSIS-NN component -->
3187     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.2.0" condition="CMSIS NN">
3188       <description>CMSIS-NN Neural Network Library</description>
3189       <files>
3190         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3191         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3192         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
3193         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
3194
3195         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3196         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3197         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3198         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
3199         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
3200         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
3201         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c"/>
3202         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3203         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3204         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3205         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
3206         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
3207         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
3208         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
3209         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
3210         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
3211         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3212         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3213         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
3214         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3215         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3216         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
3217         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3218         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3219         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
3220         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
3221         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
3222         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
3223         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8_opt.c"/>
3224         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
3225         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
3226         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3227         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
3228         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
3229         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
3230         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3231         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3232         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3233         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3234         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
3235         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3236         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3237         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
3238         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
3239         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
3240         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
3241         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
3242         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
3243         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3244         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3245         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
3246         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3247         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
3248         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
3249         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3250         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3251         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3252         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3253         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3254         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3255         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3256         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
3257         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
3258         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3259         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
3260       </files>
3261     </component>
3262
3263     <!-- CMSIS-RTOS Keil RTX component -->
3264     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3265       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3266       <RTE_Components_h>
3267         <!-- the following content goes into file 'RTE_Components.h' -->
3268         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3269         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3270       </RTE_Components_h>
3271       <files>
3272         <!-- CPU independent -->
3273         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3274         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3275         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3276
3277         <!-- RTX templates -->
3278         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3279         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3280         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3281         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3282         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3283         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3284         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3285         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3286         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3287         <!-- tool-chain specific template file -->
3288         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3289         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3290         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3291
3292         <!-- CPU and Compiler dependent -->
3293         <!-- ARMCC -->
3294         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3295         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3296         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3297         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3298         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3299         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3300         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3301         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3302         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3303         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3304         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3305         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3306         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3307         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3308         <!-- GCC -->
3309         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3310         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3311         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3312         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3313         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3314         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3315         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3316         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3317         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3318         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3319         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3320         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3321         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3322         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3323         <!-- IAR -->
3324         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3325         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3326         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3327         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3328         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3329         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3330         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3331         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3332         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3333         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3334         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3335         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3336         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3337         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3338       </files>
3339     </component>
3340     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3341     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3342       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3343       <RTE_Components_h>
3344         <!-- the following content goes into file 'RTE_Components.h' -->
3345         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3346         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3347       </RTE_Components_h>
3348       <files>
3349         <!-- CPU independent -->
3350         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3351         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3352         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3353
3354         <!-- RTX templates -->
3355         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3356         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3357         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3358         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3359         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3360         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3361         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3362         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3363         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3364         <!-- tool-chain specific template file -->
3365         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3366         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3367         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3368
3369         <!-- CPU and Compiler dependent -->
3370         <!-- ARMCC -->
3371         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3372         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3373         <!-- GCC -->
3374         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3375         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3376         <!-- IAR -->
3377       </files>
3378     </component>
3379
3380     <!-- CMSIS-RTOS Keil RTX5 component -->
3381     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.2" Capiversion="1.0.0" condition="RTOS RTX5">
3382       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3383       <RTE_Components_h>
3384         <!-- the following content goes into file 'RTE_Components.h' -->
3385         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3386         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3387       </RTE_Components_h>
3388       <files>
3389         <!-- RTX header file -->
3390         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3391         <!-- RTX compatibility module for API V1 -->
3392         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3393       </files>
3394     </component>
3395
3396     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3397     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
3398       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
3399       <RTE_Components_h>
3400         <!-- the following content goes into file 'RTE_Components.h' -->
3401         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3402         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3403       </RTE_Components_h>
3404       <files>
3405         <!-- RTX documentation -->
3406         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3407
3408         <!-- RTX header files -->
3409         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3410
3411         <!-- RTX configuration -->
3412         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3413         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3414
3415         <!-- RTX templates -->
3416         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3417         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3418         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3419         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3420         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3421         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3422         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3423         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3424         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3425         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3426
3427         <!-- RTX library configuration -->
3428         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3429
3430         <!-- RTX libraries (CPU and Compiler dependent) -->
3431         <!-- ARMCC -->
3432         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3433         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3434         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3435         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3436         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3437         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3438         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3439         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3440         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3441         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3442         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3443         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3444         <file category="library" condition="CM55_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3445         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3446         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3447         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3448         <!-- GCC -->
3449         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3450         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3451         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3452         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3453         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3454         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3455         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3456         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3457         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3458         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3459         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3460         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3461         <file category="library" condition="CM55_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3462         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3463         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3464         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3465         <!-- IAR -->
3466         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3467         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3468         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3469         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3470         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3471         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3472         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3473         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3474         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3475         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3476         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3477         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3478         <file category="library" condition="CM55_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3479         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3480         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3481         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3482       </files>
3483     </component>
3484     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3485       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
3486       <RTE_Components_h>
3487         <!-- the following content goes into file 'RTE_Components.h' -->
3488         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3489         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3490         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3491       </RTE_Components_h>
3492       <files>
3493         <!-- RTX documentation -->
3494         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3495
3496         <!-- RTX header files -->
3497         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3498
3499         <!-- RTX configuration -->
3500         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3501         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3502
3503         <!-- RTX templates -->
3504         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3505         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3506         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3507         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3508         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3509         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3510         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3511         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3512         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3513         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3514
3515         <!-- RTX library configuration -->
3516         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3517
3518         <!-- RTX libraries (CPU and Compiler dependent) -->
3519         <!-- ARMCC -->
3520         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3521         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3522         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3523         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3524         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3525         <file category="library" condition="CM55_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3526         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3527         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3528         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3529         <!-- GCC -->
3530         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3531         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3532         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3533         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3534         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3535         <file category="library" condition="CM55_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3536         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3537         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3538         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3539         <!-- IAR -->
3540         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3541         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3542         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3543         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3544         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3545         <file category="library" condition="CM55_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3546         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3547         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3548         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3549       </files>
3550     </component>
3551     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3552       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3553       <RTE_Components_h>
3554         <!-- the following content goes into file 'RTE_Components.h' -->
3555         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3556         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3557         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3558       </RTE_Components_h>
3559       <files>
3560         <!-- RTX documentation -->
3561         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3562
3563         <!-- RTX header files -->
3564         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3565
3566         <!-- RTX configuration -->
3567         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3568         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3569
3570         <!-- RTX templates -->
3571         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3572         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3573         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3574         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3575         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3576         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3577         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3578         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3579         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3580         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3581
3582         <!-- RTX sources (core) -->
3583         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3584         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3585         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3586         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3587         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3588         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3589         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3590         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3591         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3592         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3593         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3594         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3595         <!-- RTX sources (library configuration) -->
3596         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3597         <!-- RTX sources (handlers ARMCC) -->
3598         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3599         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3600         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3601         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3602         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3603         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3604         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3605         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3606         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3607         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3608         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3609         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3610         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM55_ARMCC"/>
3611         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3612         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3613         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3614         <!-- RTX sources (handlers GCC) -->
3615         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3616         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3617         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3618         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3619         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3620         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3621         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3622         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3623         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3624         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3625         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3626         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3627         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM55_GCC"/>
3628         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3629         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3630         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3631         <!-- RTX sources (handlers IAR) -->
3632         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3633         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3634         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3635         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3636         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3637         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3638         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3639         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3640         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3641         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3642         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3643         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3644         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM55_IAR"/>
3645         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3646         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3647         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3648         <!-- OS Tick (SysTick) -->
3649         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3650       </files>
3651     </component>
3652     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3653       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3654       <RTE_Components_h>
3655         <!-- the following content goes into file 'RTE_Components.h' -->
3656         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3657         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3658         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3659       </RTE_Components_h>
3660       <files>
3661         <!-- RTX documentation -->
3662         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3663
3664         <!-- RTX header files -->
3665         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3666
3667         <!-- RTX configuration -->
3668         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3669         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3670
3671         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3672
3673         <!-- RTX templates -->
3674         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3675         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3676         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3677         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3678         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3679         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3680         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3681         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3682         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3683         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3684
3685         <!-- RTX sources (core) -->
3686         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3687         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3688         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3689         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3690         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3691         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3692         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3693         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3694         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3695         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3696         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3697         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3698         <!-- RTX sources (library configuration) -->
3699         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3700         <!-- RTX sources (handlers ARMCC) -->
3701         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3702         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3703         <!-- RTX sources (handlers GCC) -->
3704         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3705         <!-- RTX sources (handlers IAR) -->
3706         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3707       </files>
3708     </component>
3709     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3710       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3711       <RTE_Components_h>
3712         <!-- the following content goes into file 'RTE_Components.h' -->
3713         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3714         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3715         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3716         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3717       </RTE_Components_h>
3718       <files>
3719         <!-- RTX documentation -->
3720         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3721
3722         <!-- RTX header files -->
3723         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3724
3725         <!-- RTX configuration -->
3726         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3727         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3728
3729         <!-- RTX templates -->
3730         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3731         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3732         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3733         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3734         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3735         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3736         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3737         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3738         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3739         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3740
3741         <!-- RTX sources (core) -->
3742         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3743         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3744         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3745         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3746         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3747         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3748         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3749         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3750         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3751         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3752         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3753         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3754         <!-- RTX sources (library configuration) -->
3755         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3756         <!-- RTX sources (ARMCC handlers) -->
3757         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3758         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3759         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3760         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3761         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3762         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM55_ARMCC"/>
3763         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3764         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3765         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3766         <!-- RTX sources (GCC handlers) -->
3767         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3768         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3769         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3770         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3771         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3772         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM55_GCC"/>
3773         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3774         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3775         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3776         <!-- RTX sources (IAR handlers) -->
3777         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3778         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3779         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3780         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3781         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3782         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM55_IAR"/>
3783         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3784         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3785         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3786         <!-- OS Tick (SysTick) -->
3787         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3788       </files>
3789     </component>
3790
3791     <!-- CMSIS-Driver Custom components -->
3792     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3793       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3794       <files>
3795         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3796         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3797       </files>
3798     </component>
3799     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3800       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3801       <files>
3802         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3803         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3804       </files>
3805     </component>
3806     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3807       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3808       <files>
3809         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3810         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3811       </files>
3812     </component>
3813     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3814       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3815       <files>
3816         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3817         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3818       </files>
3819     </component>
3820     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3821       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3822       <files>
3823         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3824         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3825       </files>
3826     </component>
3827     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3828       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3829       <files>
3830         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3831         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3832       </files>
3833     </component>
3834     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3835       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3836       <files>
3837         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3838         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3839       </files>
3840     </component>
3841     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3842       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3843       <files>
3844         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3845         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3846       </files>
3847     </component>
3848     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3849       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3850       <files>
3851         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3852         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3853         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3854         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3855       </files>
3856     </component>
3857     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3858       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3859       <files>
3860         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3861         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3862       </files>
3863     </component>
3864     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3865       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3866       <files>
3867         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3868         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3869       </files>
3870     </component>
3871     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3872       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3873       <files>
3874         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3875         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3876       </files>
3877     </component>
3878     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3879       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3880       <files>
3881         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3882         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3883       </files>
3884     </component>
3885     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3886       <description>Access to #include Driver_WiFi.h file</description>
3887       <files>
3888         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3889         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3890       </files>
3891     </component>
3892
3893     <!-- VIO components -->
3894     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
3895       <description>Virtual I/O custom implementation template</description>
3896       <files>
3897         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
3898         <file category="other"   name="CMSIS/Driver/VIO/cmsis_vio.scvd"/>
3899       </files>
3900     </component>
3901     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
3902       <description>Virtual I/O implementation using memory only</description>
3903       <files>
3904         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
3905         <file category="other"   name="CMSIS/Driver/VIO/cmsis_vio.scvd"/>
3906       </files>
3907     </component>
3908
3909   </components>
3910
3911   <boards>
3912     <board name="uVision Simulator" vendor="Keil">
3913       <description>uVision Simulator</description>
3914       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3915       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3916       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3917       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3918       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3919       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3920       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3921       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3922       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3923       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3924       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3925       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3926       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3927       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3928       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3929       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3930       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3931       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3932       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3933       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3934       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3935       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3936       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3937       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3938     </board>
3939
3940     <board name="EWARM Simulator" vendor="IAR">
3941       <description>EWARM Simulator</description>
3942       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3943       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3944       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3945       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3946       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3947       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3948       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3949       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3950       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3951       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3952       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3953       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3954       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3955       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3956       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3957       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3958       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3959       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3960       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3961       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3962       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3963       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3964       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3965       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3966     </board>
3967   </boards>
3968
3969   <examples>
3970     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3971       <description>DSP_Lib Class Marks example</description>
3972       <board name="uVision Simulator" vendor="Keil"/>
3973       <project>
3974         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3975       </project>
3976       <attributes>
3977         <component Cclass="CMSIS" Cgroup="CORE"/>
3978         <component Cclass="CMSIS" Cgroup="DSP"/>
3979         <component Cclass="Device" Cgroup="Startup"/>
3980         <category>Getting Started</category>
3981       </attributes>
3982     </example>
3983
3984     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3985       <description>DSP_Lib Convolution example</description>
3986       <board name="uVision Simulator" vendor="Keil"/>
3987       <project>
3988         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3989       </project>
3990       <attributes>
3991         <component Cclass="CMSIS" Cgroup="CORE"/>
3992         <component Cclass="CMSIS" Cgroup="DSP"/>
3993         <component Cclass="Device" Cgroup="Startup"/>
3994         <category>Getting Started</category>
3995       </attributes>
3996     </example>
3997
3998     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3999       <description>DSP_Lib Dotproduct example</description>
4000       <board name="uVision Simulator" vendor="Keil"/>
4001       <project>
4002         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
4003       </project>
4004       <attributes>
4005         <component Cclass="CMSIS" Cgroup="CORE"/>
4006         <component Cclass="CMSIS" Cgroup="DSP"/>
4007         <component Cclass="Device" Cgroup="Startup"/>
4008         <category>Getting Started</category>
4009       </attributes>
4010     </example>
4011
4012     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
4013       <description>DSP_Lib FFT Bin example</description>
4014       <board name="uVision Simulator" vendor="Keil"/>
4015       <project>
4016         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
4017       </project>
4018       <attributes>
4019         <component Cclass="CMSIS" Cgroup="CORE"/>
4020         <component Cclass="CMSIS" Cgroup="DSP"/>
4021         <component Cclass="Device" Cgroup="Startup"/>
4022         <category>Getting Started</category>
4023       </attributes>
4024     </example>
4025
4026     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
4027       <description>DSP_Lib FIR example</description>
4028       <board name="uVision Simulator" vendor="Keil"/>
4029       <project>
4030         <environment name="uv" load="arm_fir_example.uvprojx"/>
4031       </project>
4032       <attributes>
4033         <component Cclass="CMSIS" Cgroup="CORE"/>
4034         <component Cclass="CMSIS" Cgroup="DSP"/>
4035         <component Cclass="Device" Cgroup="Startup"/>
4036         <category>Getting Started</category>
4037       </attributes>
4038     </example>
4039
4040     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
4041       <description>DSP_Lib Graphic Equalizer example</description>
4042       <board name="uVision Simulator" vendor="Keil"/>
4043       <project>
4044         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
4045       </project>
4046       <attributes>
4047         <component Cclass="CMSIS" Cgroup="CORE"/>
4048         <component Cclass="CMSIS" Cgroup="DSP"/>
4049         <component Cclass="Device" Cgroup="Startup"/>
4050         <category>Getting Started</category>
4051       </attributes>
4052     </example>
4053
4054     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4055       <description>DSP_Lib Linear Interpolation example</description>
4056       <board name="uVision Simulator" vendor="Keil"/>
4057       <project>
4058         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4059       </project>
4060       <attributes>
4061         <component Cclass="CMSIS" Cgroup="CORE"/>
4062         <component Cclass="CMSIS" Cgroup="DSP"/>
4063         <component Cclass="Device" Cgroup="Startup"/>
4064         <category>Getting Started</category>
4065       </attributes>
4066     </example>
4067
4068     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4069       <description>DSP_Lib Matrix example</description>
4070       <board name="uVision Simulator" vendor="Keil"/>
4071       <project>
4072         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4073       </project>
4074       <attributes>
4075         <component Cclass="CMSIS" Cgroup="CORE"/>
4076         <component Cclass="CMSIS" Cgroup="DSP"/>
4077         <component Cclass="Device" Cgroup="Startup"/>
4078         <category>Getting Started</category>
4079       </attributes>
4080     </example>
4081
4082     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4083       <description>DSP_Lib Signal Convergence example</description>
4084       <board name="uVision Simulator" vendor="Keil"/>
4085       <project>
4086         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4087       </project>
4088       <attributes>
4089         <component Cclass="CMSIS" Cgroup="CORE"/>
4090         <component Cclass="CMSIS" Cgroup="DSP"/>
4091         <component Cclass="Device" Cgroup="Startup"/>
4092         <category>Getting Started</category>
4093       </attributes>
4094     </example>
4095
4096     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4097       <description>DSP_Lib Sinus/Cosinus example</description>
4098       <board name="uVision Simulator" vendor="Keil"/>
4099       <project>
4100         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4101       </project>
4102       <attributes>
4103         <component Cclass="CMSIS" Cgroup="CORE"/>
4104         <component Cclass="CMSIS" Cgroup="DSP"/>
4105         <component Cclass="Device" Cgroup="Startup"/>
4106         <category>Getting Started</category>
4107       </attributes>
4108     </example>
4109
4110     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4111       <description>DSP_Lib Variance example</description>
4112       <board name="uVision Simulator" vendor="Keil"/>
4113       <project>
4114         <environment name="uv" load="arm_variance_example.uvprojx"/>
4115       </project>
4116       <attributes>
4117         <component Cclass="CMSIS" Cgroup="CORE"/>
4118         <component Cclass="CMSIS" Cgroup="DSP"/>
4119         <component Cclass="Device" Cgroup="Startup"/>
4120         <category>Getting Started</category>
4121       </attributes>
4122     </example>
4123
4124     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4125       <description>Neural Network CIFAR10 example</description>
4126       <board name="uVision Simulator" vendor="Keil"/>
4127       <project>
4128         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4129       </project>
4130       <attributes>
4131         <component Cclass="CMSIS" Cgroup="CORE"/>
4132         <component Cclass="CMSIS" Cgroup="DSP"/>
4133         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4134         <component Cclass="Device" Cgroup="Startup"/>
4135         <category>Getting Started</category>
4136       </attributes>
4137     </example>
4138
4139     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4140       <description>Neural Network CIFAR10 example</description>
4141       <board name="EWARM Simulator" vendor="IAR"/>
4142       <project>
4143         <environment name="iar" load="NN-example-cifar10.ewp"/>
4144       </project>
4145       <attributes>
4146         <component Cclass="CMSIS" Cgroup="CORE"/>
4147         <component Cclass="CMSIS" Cgroup="DSP"/>
4148         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4149         <component Cclass="Device" Cgroup="Startup"/>
4150         <category>Getting Started</category>
4151       </attributes>
4152     </example>
4153
4154     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4155       <description>Neural Network GRU example</description>
4156       <board name="uVision Simulator" vendor="Keil"/>
4157       <project>
4158         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4159       </project>
4160       <attributes>
4161         <component Cclass="CMSIS" Cgroup="CORE"/>
4162         <component Cclass="CMSIS" Cgroup="DSP"/>
4163         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4164         <component Cclass="Device" Cgroup="Startup"/>
4165         <category>Getting Started</category>
4166       </attributes>
4167     </example>
4168
4169     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4170       <description>Neural Network GRU example</description>
4171       <board name="EWARM Simulator" vendor="IAR"/>
4172       <project>
4173         <environment name="iar" load="NN-example-gru.ewp"/>
4174       </project>
4175       <attributes>
4176         <component Cclass="CMSIS" Cgroup="CORE"/>
4177         <component Cclass="CMSIS" Cgroup="DSP"/>
4178         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4179         <component Cclass="Device" Cgroup="Startup"/>
4180         <category>Getting Started</category>
4181       </attributes>
4182     </example>
4183
4184     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4185       <description>CMSIS-RTOS2 Blinky example</description>
4186       <board name="uVision Simulator" vendor="Keil"/>
4187       <project>
4188         <environment name="uv" load="Blinky.uvprojx"/>
4189       </project>
4190       <attributes>
4191         <component Cclass="CMSIS" Cgroup="CORE"/>
4192         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4193         <component Cclass="Device" Cgroup="Startup"/>
4194         <category>Getting Started</category>
4195       </attributes>
4196     </example>
4197
4198     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4199       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4200       <board name="uVision Simulator" vendor="Keil"/>
4201       <project>
4202         <environment name="uv" load="Blinky.uvprojx"/>
4203       </project>
4204       <attributes>
4205         <component Cclass="CMSIS" Cgroup="CORE"/>
4206         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4207         <component Cclass="Device" Cgroup="Startup"/>
4208         <category>Getting Started</category>
4209       </attributes>
4210     </example>
4211
4212     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4213       <description>CMSIS-RTOS2 Message Queue Example</description>
4214       <board name="uVision Simulator" vendor="Keil"/>
4215       <project>
4216         <environment name="uv" load="MsqQueue.uvprojx"/>
4217       </project>
4218       <attributes>
4219         <component Cclass="CMSIS" Cgroup="CORE"/>
4220         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4221         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4222         <component Cclass="Device" Cgroup="Startup"/>
4223         <category>Getting Started</category>
4224       </attributes>
4225     </example>
4226
4227     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4228       <description>CMSIS-RTOS2 Memory Pool Example</description>
4229       <board name="uVision Simulator" vendor="Keil"/>
4230       <project>
4231         <environment name="uv" load="MemPool.uvprojx"/>
4232       </project>
4233       <attributes>
4234         <component Cclass="CMSIS" Cgroup="CORE"/>
4235         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4236         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4237         <component Cclass="Device" Cgroup="Startup"/>
4238         <category>Getting Started</category>
4239       </attributes>
4240     </example>
4241
4242     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4243       <description>Bare-metal secure/non-secure example without RTOS</description>
4244       <board name="uVision Simulator" vendor="Keil"/>
4245       <project>
4246         <environment name="uv" load="NoRTOS.uvmpw"/>
4247       </project>
4248       <attributes>
4249         <component Cclass="CMSIS" Cgroup="CORE"/>
4250         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4251         <component Cclass="Device" Cgroup="Startup"/>
4252         <category>Getting Started</category>
4253       </attributes>
4254     </example>
4255
4256     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4257       <description>Secure/non-secure RTOS example with thread context management</description>
4258       <board name="uVision Simulator" vendor="Keil"/>
4259       <project>
4260         <environment name="uv" load="RTOS.uvmpw"/>
4261       </project>
4262       <attributes>
4263         <component Cclass="CMSIS" Cgroup="CORE"/>
4264         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4265         <component Cclass="Device" Cgroup="Startup"/>
4266         <category>Getting Started</category>
4267       </attributes>
4268     </example>
4269
4270     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4271       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4272       <board name="uVision Simulator" vendor="Keil"/>
4273       <project>
4274         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4275       </project>
4276       <attributes>
4277         <component Cclass="CMSIS" Cgroup="CORE"/>
4278         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4279         <component Cclass="Device" Cgroup="Startup"/>
4280         <category>Getting Started</category>
4281       </attributes>
4282     </example>
4283
4284   </examples>
4285
4286 </package>