begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.4.0-rc0">
  12       Aligned pack structure with repository.
  13       The following folders are deprecated:
  14         - CMSIS/Include/
  15         - CMSIS/DSP_Lib/
  16
  17       CMSIS-Core(M): 5.1.2 (see revision history for details)
  18         - Added Cortex-M1 support (beta).
  19       CMSIS-Core(A): 1.1.2 (see revision history for details)
  20       CMSIS-RTOS2:
  21         - API 2.1.3 (see revision history for details)
  22         - RTX 5.4.0 (see revision history for details)
  23           * Updated exception handling on Cortex-A
  24       CMSIS-Driver:
  25         - Flash Driver API V2.2.0
  26       Utilities:
  27         - SVDConv 3.3.21
  28         - PackChk 1.3.71
  29     </release>
  30     <release version="5.3.0" date="2018-02-22">
  31       Updated Arm company brand.
  32       CMSIS-Core(M): 5.1.1 (see revision history for details)
  33       CMSIS-Core(A): 1.1.1 (see revision history for details)
  34       CMSIS-DAP: 2.0.0 (see revision history for details)
  35       CMSIS-NN: 1.0.0
  36         - Initial contribution of the bare metal Neural Network Library.
  37       CMSIS-RTOS2:
  38         - RTX 5.3.0 (see revision history for details)
  39         - OS Tick API 1.0.1
  40     </release>
  41     <release version="5.2.0" date="2017-11-16">
  42       CMSIS-Core(M): 5.1.0 (see revision history for details)
  43         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  44         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  45       CMSIS-Core(A): 1.1.0 (see revision history for details)
  46         - Added compiler_iccarm.h.
  47         - Added additional access functions for physical timer.
  48       CMSIS-DAP: 1.2.0 (see revision history for details)
  49       CMSIS-DSP: 1.5.2 (see revision history for details)
  50       CMSIS-Driver: 2.6.0 (see revision history for details)
  51         - CAN Driver API V1.2.0
  52         - NAND Driver API V2.3.0
  53       CMSIS-RTOS:
  54         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
  55       CMSIS-RTOS2:
  56         - API 2.1.2 (see revision history for details)
  57         - RTX 5.2.3 (see revision history for details)
  58       Devices:
  59         - Added GCC startup and linker script for Cortex-A9.
  60         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
  61         - Added IAR startup code for Cortex-A9
  62     </release>
  63     <release version="5.1.1" date="2017-09-19">
  64       CMSIS-RTOS2:
  65       - RTX 5.2.1 (see revision history for details)
  66     </release>
  67     <release version="5.1.0" date="2017-08-04">
  68       CMSIS-Core(M): 5.0.2 (see revision history for details)
  69       - Changed Version Control macros to be core agnostic.
  70       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  71       CMSIS-Core(A): 1.0.0 (see revision history for details)
  72       - Initial release
  73       - IRQ Controller API 1.0.0
  74       CMSIS-Driver: 2.05 (see revision history for details)
  75       - All typedefs related to status have been made volatile.
  76       CMSIS-RTOS2:
  77       - API 2.1.1 (see revision history for details)
  78       - RTX 5.2.0 (see revision history for details)
  79       - OS Tick API 1.0.0
  80       CMSIS-DSP: 1.5.2 (see revision history for details)
  81       - Fixed GNU Compiler specific diagnostics.
  82       CMSIS-Pack: 1.5.0 (see revision history for details)
  83       - added System Description File (*.SDF) Format
  84       CMSIS-Zone: 0.0.1 (Preview)
  85       - Initial specification draft
  86     </release>
  87     <release version="5.0.1" date="2017-02-03">
  88       Package Description:
  89       - added taxonomy for Cclass RTOS
  90       CMSIS-RTOS2:
  91       - API 2.1   (see revision history for details)
  92       - RTX 5.1.0 (see revision history for details)
  93       CMSIS-Core: 5.0.1 (see revision history for details)
  94       - Added __PACKED_STRUCT macro
  95       - Added uVisior support
  96       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  97       - Updated template for secure main function (main_s.c)
  98       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  99       CMSIS-DSP: 1.5.1 (see revision history for details)
 100       - added ARMv8M DSP libraries.
 101       CMSIS-Pack:1.4.9 (see revision history for details)
 102       - added Pack Index File specification and schema file
 103     </release>
 104     <release version="5.0.0" date="2016-11-11">
 105       Changed open source license to Apache 2.0
 106       CMSIS_Core:
 107        - Added support for Cortex-M23 and Cortex-M33.
 108        - Added ARMv8-M device configurations for mainline and baseline.
 109        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 110        - Added cmsis_compiler.h to unify compiler behaviour.
 111        - Updated function SCB_EnableICache (for Cortex-M7).
 112        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 113       CMSIS-RTOS:
 114         - bug fix in RTX 4.82 (see revision history for details)
 115       CMSIS-RTOS2:
 116         - new API including compatibility layer to CMSIS-RTOS
 117         - reference implementation based on RTX5
 118         - supports all Cortex-M variants including TrustZone for ARMv8-M
 119       CMSIS-SVD:
 120        - reworked SVD format documentation
 121        - removed SVD file database documentation as SVD files are distributed in packs
 122        - updated SVDConv for Win32 and Linux
 123       CMSIS-DSP:
 124        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 125        - Added DSP libraries build projects to CMSIS pack.
 126     </release>
 127     <release version="4.5.0" date="2015-10-28">
 128       - CMSIS-Core     4.30.0  (see revision history for details)
 129       - CMSIS-DAP      1.1.0   (unchanged)
 130       - CMSIS-Driver   2.04.0  (see revision history for details)
 131       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 132       - CMSIS-Pack     1.4.1   (see revision history for details)
 133       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 134       - CMSIS-SVD      1.3.1   (see revision history for details)
 135     </release>
 136     <release version="4.4.0" date="2015-09-11">
 137       - CMSIS-Core     4.20   (see revision history for details)
 138       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 139       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 140       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 141       - CMSIS-RTOS
 142         -- API         1.02   (unchanged)
 143         -- RTX         4.79   (see revision history for details)
 144       - CMSIS-SVD      1.3.0  (see revision history for details)
 145       - CMSIS-DAP      1.1.0  (extended with SWO support)
 146     </release>
 147     <release version="4.3.0" date="2015-03-20">
 148       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 149       - CMSIS-DSP      1.4.5  (see revision history for details)
 150       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 151       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 152       - CMSIS-RTOS
 153         -- API         1.02   (unchanged)
 154         -- RTX         4.78   (see revision history for details)
 155       - CMSIS-SVD      1.2    (unchanged)
 156     </release>
 157     <release version="4.2.0" date="2014-09-24">
 158       Adding Cortex-M7 support
 159       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 160       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 161       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 162       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 163       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 164     </release>
 165     <release version="4.1.1" date="2014-06-30">
 166       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 167     </release>
 168     <release version="4.1.0" date="2014-06-12">
 169       - CMSIS-Driver   2.02  (incompatible update)
 170       - CMSIS-Pack     1.3   (see revision history for details)
 171       - CMSIS-DSP      1.4.2 (unchanged)
 172       - CMSIS-Core     3.30  (unchanged)
 173       - CMSIS-RTOS RTX 4.74  (unchanged)
 174       - CMSIS-RTOS API 1.02  (unchanged)
 175       - CMSIS-SVD      1.10  (unchanged)
 176       PACK:
 177       - removed G++ specific files from PACK
 178       - added Component Startup variant "C Startup"
 179       - added Pack Checking Utility
 180       - updated conditions to reflect tool-chain dependency
 181       - added Taxonomy for Graphics
 182       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 183     </release>
 184     <release version="4.0.0">
 185       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 186       - CMSIS-Pack     1.1   Preliminary
 187       - CMSIS-DSP      1.4.2 (see revision history for details)
 188       - CMSIS-Core     3.30  (see revision history for details)
 189       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 190       - CMSIS-RTOS API 1.02  (unchanged)
 191       - CMSIS-SVD      1.10  (unchanged)
 192     </release>
 193     <release version="3.20.4">
 194       - CMSIS-RTOS 4.74 (see revision history for details)
 195       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 196     </release>
 197     <release version="3.20.3">
 198       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 199       - CMSIS-RTOS 4.73 (see revision history for details)
 200     </release>
 201     <release version="3.20.2">
 202       - CMSIS-Pack documentation has been added
 203       - CMSIS-Drivers header and documentation have been added to PACK
 204       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 205     </release>
 206     <release version="3.20.1">
 207       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 208       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 209     </release>
 210     <release version="3.20.0">
 211       The software portions that are deployed in the application program are now under a BSD license which allows usage
 212       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 213       The individual components have been update as listed below:
 214       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 215       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 216       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 217       - CMSIS-SVD is unchanged.
 218     </release>
 219   </releases>
 220
 221   <taxonomy>
 222     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 223     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 224     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 225     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 226     <description Cclass="File System">File Drive Support and File System</description>
 227     <description Cclass="Graphics">Graphical User Interface</description>
 228     <description Cclass="Network">Network Stack using Internet Protocols</description>
 229     <description Cclass="USB">Universal Serial Bus Stack</description>
 230     <description Cclass="Compiler">Compiler Software Extensions</description>
 231     <description Cclass="RTOS">Real-time Operating System</description>
 232   </taxonomy>
 233
 234   <devices>
 235     <!-- ******************************  Cortex-M0  ****************************** -->
 236     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 237       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 238       <description>
 239 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 240 - simple, easy-to-use programmers model
 241 - highly efficient ultra-low power operation
 242 - excellent code density
 243 - deterministic, high-performance interrupt handling
 244 - upward compatibility with the rest of the Cortex-M processor family.
 245       </description>
 246       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 247       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 248       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 249       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 250
 251       <device Dname="ARMCM0">
 252         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 253         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 254       </device>
 255     </family>
 256
 257     <!-- ******************************  Cortex-M0P  ****************************** -->
 258     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 259       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 260       <description>
 261 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 262 - simple, easy-to-use programmers model
 263 - highly efficient ultra-low power operation
 264 - excellent code density
 265 - deterministic, high-performance interrupt handling
 266 - upward compatibility with the rest of the Cortex-M processor family.
 267       </description>
 268       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 269       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 270       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 271       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 272
 273       <device Dname="ARMCM0P">
 274         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 275         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 276       </device>
 277
 278       <device Dname="ARMCM0P_MPU">
 279         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 280         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 281       </device>
 282     </family>
 283
 284     <!-- ******************************  Cortex-M1  ****************************** -->
 285     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 286       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 287       <description>
 288 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 289 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 290       </description>
 291       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 292       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 293       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 294       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 295
 296       <device Dname="ARMCM1">
 297         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 298         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 299       </device>
 300     </family>
 301
 302     <!-- ******************************  Cortex-M3  ****************************** -->
 303     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 304       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 305       <description>
 306 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 307 - simple, easy-to-use programmers model
 308 - highly efficient ultra-low power operation
 309 - excellent code density
 310 - deterministic, high-performance interrupt handling
 311 - upward compatibility with the rest of the Cortex-M processor family.
 312       </description>
 313       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 314       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 315       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 316       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 317
 318       <device Dname="ARMCM3">
 319         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 320         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 321       </device>
 322     </family>
 323
 324     <!-- ******************************  Cortex-M4  ****************************** -->
 325     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 326       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 327       <description>
 328 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 329 - simple, easy-to-use programmers model
 330 - highly efficient ultra-low power operation
 331 - excellent code density
 332 - deterministic, high-performance interrupt handling
 333 - upward compatibility with the rest of the Cortex-M processor family.
 334       </description>
 335       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 336       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 337       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 338       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 339
 340       <device Dname="ARMCM4">
 341         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 342         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 343       </device>
 344
 345       <device Dname="ARMCM4_FP">
 346         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 347         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 348       </device>
 349     </family>
 350
 351     <!-- ******************************  Cortex-M7  ****************************** -->
 352     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 353       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 354       <description>
 355 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 356 - simple, easy-to-use programmers model
 357 - highly efficient ultra-low power operation
 358 - excellent code density
 359 - deterministic, high-performance interrupt handling
 360 - upward compatibility with the rest of the Cortex-M processor family.
 361       </description>
 362       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 363       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 364       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 365       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 366
 367       <device Dname="ARMCM7">
 368         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 369         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 370       </device>
 371
 372       <device Dname="ARMCM7_SP">
 373         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 374         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 375       </device>
 376
 377       <device Dname="ARMCM7_DP">
 378         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 379         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 380       </device>
 381     </family>
 382
 383     <!-- ******************************  Cortex-M23  ********************** -->
 384     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 385       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 386       <description>
 387 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 388 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 389 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 390       </description>
 391       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 392       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 393       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 394       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 395       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 396       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 397
 398       <device Dname="ARMCM23">
 399         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 400         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 401       </device>
 402
 403       <device Dname="ARMCM23_TZ">
 404         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 405         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 406       </device>
 407     </family>
 408
 409     <!-- ******************************  Cortex-M33  ****************************** -->
 410     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 411       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 412       <description>
 413 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 414 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 415       </description>
 416       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 417       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 418       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 419       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 420       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 421       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 422
 423       <device Dname="ARMCM33">
 424         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 425         <description>
 426           no DSP Instructions, no Floating Point Unit, no TrustZone
 427         </description>
 428         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 429       </device>
 430
 431       <device Dname="ARMCM33_TZ">
 432         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 433         <description>
 434           no DSP Instructions, no Floating Point Unit, TrustZone
 435         </description>
 436         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 437       </device>
 438
 439       <device Dname="ARMCM33_DSP_FP">
 440         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 441         <description>
 442           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 443         </description>
 444         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 445       </device>
 446
 447       <device Dname="ARMCM33_DSP_FP_TZ">
 448         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 449         <description>
 450           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 451         </description>
 452         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 453       </device>
 454     </family>
 455
 456     <!-- ******************************  ARMSC000  ****************************** -->
 457     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 458       <description>
 459 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 460 - simple, easy-to-use programmers model
 461 - highly efficient ultra-low power operation
 462 - excellent code density
 463 - deterministic, high-performance interrupt handling
 464       </description>
 465       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 466       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 467       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 468       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 469
 470       <device Dname="ARMSC000">
 471         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 472         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 473       </device>
 474     </family>
 475
 476     <!-- ******************************  ARMSC300  ****************************** -->
 477     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 478       <description>
 479 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 480 - simple, easy-to-use programmers model
 481 - highly efficient ultra-low power operation
 482 - excellent code density
 483 - deterministic, high-performance interrupt handling
 484       </description>
 485       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 486       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 487       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 488       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 489
 490       <device Dname="ARMSC300">
 491         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 492         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 493       </device>
 494     </family>
 495
 496     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 497     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 498       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 499       <description>
 500 Armv8-M Baseline based device with TrustZone
 501       </description>
 502       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 503       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 504       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 505       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 506       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 507       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 508
 509       <device Dname="ARMv8MBL">
 510         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 511         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 512       </device>
 513     </family>
 514
 515     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 516     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 517       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 518       <description>
 519 Armv8-M Mainline based device with TrustZone
 520       </description>
 521       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 522       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 523       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 524       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 525       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 526       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 527
 528       <device Dname="ARMv8MML">
 529         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 530         <description>
 531           no DSP Instructions, no Floating Point Unit, TrustZone
 532         </description>
 533         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 534       </device>
 535
 536       <device Dname="ARMv8MML_DSP">
 537         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 538         <description>
 539           DSP Instructions, no Floating Point Unit, TrustZone
 540         </description>
 541         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 542       </device>
 543
 544       <device Dname="ARMv8MML_SP">
 545         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 546         <description>
 547           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 548         </description>
 549         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 550       </device>
 551
 552       <device Dname="ARMv8MML_DSP_SP">
 553         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 554         <description>
 555           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 556         </description>
 557         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 558       </device>
 559
 560       <device Dname="ARMv8MML_DP">
 561         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 562         <description>
 563           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 564         </description>
 565         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 566       </device>
 567
 568       <device Dname="ARMv8MML_DSP_DP">
 569         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 570         <description>
 571           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 572         </description>
 573         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 574       </device>
 575     </family>
 576
 577     <!-- ******************************  Cortex-A5  ****************************** -->
 578     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 579       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 580       <description>
 581 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 582 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 583 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 584       </description>
 585
 586       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 587       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 588
 589       <device Dname="ARMCA5">
 590         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 591         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 592       </device>
 593     </family>
 594
 595     <!-- ******************************  Cortex-A7  ****************************** -->
 596     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 597       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 598       <description>
 599 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 600 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 601 an optional integrated GIC, and an optional L2 cache controller.
 602       </description>
 603
 604       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 605       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 606
 607       <device Dname="ARMCA7">
 608         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 609         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 610       </device>
 611     </family>
 612
 613     <!-- ******************************  Cortex-A9  ****************************** -->
 614     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 615       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 616       <description>
 617 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 618 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 619 and 8-bit Java bytecodes in Jazelle state.
 620       </description>
 621
 622       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 623       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 624
 625       <device Dname="ARMCA9">
 626         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 627         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 628       </device>
 629     </family>
 630   </devices>
 631
 632
 633   <apis>
 634     <!-- CMSIS Device API -->
 635     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 636       <description>Device interrupt controller interface</description>
 637       <files>
 638         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 639       </files>
 640     </api>
 641     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 642       <description>RTOS Kernel system tick timer interface</description>
 643       <files>
 644         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 645       </files>
 646     </api>
 647     <!-- CMSIS-RTOS API -->
 648     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 649       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 650       <files>
 651         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 652       </files>
 653     </api>
 654     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 655       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 656       <files>
 657         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 658         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 659       </files>
 660     </api>
 661     <!-- CMSIS Driver API -->
 662     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 663       <description>USART Driver API for Cortex-M</description>
 664       <files>
 665         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 666         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 667       </files>
 668     </api>
 669     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 670       <description>SPI Driver API for Cortex-M</description>
 671       <files>
 672         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 673         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 674       </files>
 675     </api>
 676     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 677       <description>SAI Driver API for Cortex-M</description>
 678       <files>
 679         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 680         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 681       </files>
 682     </api>
 683     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 684       <description>I2C Driver API for Cortex-M</description>
 685       <files>
 686         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 687         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 688       </files>
 689     </api>
 690     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 691       <description>CAN Driver API for Cortex-M</description>
 692       <files>
 693         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 694         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 695       </files>
 696     </api>
 697     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 698       <description>Flash Driver API for Cortex-M</description>
 699       <files>
 700         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 701         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 702       </files>
 703     </api>
 704     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 705       <description>MCI Driver API for Cortex-M</description>
 706       <files>
 707         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 708         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 709       </files>
 710     </api>
 711     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 712       <description>NAND Flash Driver API for Cortex-M</description>
 713       <files>
 714         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 715         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 716       </files>
 717     </api>
 718     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 719       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 720       <files>
 721         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 722         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 723         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 724       </files>
 725     </api>
 726     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 727       <description>Ethernet MAC Driver API for Cortex-M</description>
 728       <files>
 729         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 730         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 731       </files>
 732     </api>
 733     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 734       <description>Ethernet PHY Driver API for Cortex-M</description>
 735       <files>
 736         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 737         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 738       </files>
 739     </api>
 740     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 741       <description>USB Device Driver API for Cortex-M</description>
 742       <files>
 743         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 744         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 745       </files>
 746     </api>
 747     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 748       <description>USB Host Driver API for Cortex-M</description>
 749       <files>
 750         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 751         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 752       </files>
 753     </api>
 754   </apis>
 755
 756   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 757   <conditions>
 758     <!-- compiler -->
 759     <condition id="ARMCC6">
 760       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 761       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 762     </condition>
 763     <condition id="ARMCC5">
 764       <require Tcompiler="ARMCC" Toptions="AC5"/>
 765     </condition>
 766     <condition id="ARMCC">
 767       <require Tcompiler="ARMCC"/>
 768     </condition>
 769     <condition id="GCC">
 770       <require Tcompiler="GCC"/>
 771     </condition>
 772     <condition id="IAR">
 773       <require Tcompiler="IAR"/>
 774     </condition>
 775     <condition id="ARMCC GCC">
 776       <accept Tcompiler="ARMCC"/>
 777       <accept Tcompiler="GCC"/>
 778     </condition>
 779     <condition id="ARMCC GCC IAR">
 780       <accept Tcompiler="ARMCC"/>
 781       <accept Tcompiler="GCC"/>
 782       <accept Tcompiler="IAR"/>
 783     </condition>
 784
 785     <!-- Arm architecture -->
 786     <condition id="ARMv6-M Device">
 787       <description>Armv6-M architecture based device</description>
 788       <accept Dcore="Cortex-M0"/>
 789       <accept Dcore="Cortex-M1"/>
 790       <accept Dcore="Cortex-M0+"/>
 791       <accept Dcore="SC000"/>
 792     </condition>
 793     <condition id="ARMv7-M Device">
 794       <description>Armv7-M architecture based device</description>
 795       <accept Dcore="Cortex-M3"/>
 796       <accept Dcore="Cortex-M4"/>
 797       <accept Dcore="Cortex-M7"/>
 798       <accept Dcore="SC300"/>
 799     </condition>
 800     <condition id="ARMv8-M Device">
 801       <description>Armv8-M architecture based device</description>
 802       <accept Dcore="ARMV8MBL"/>
 803       <accept Dcore="ARMV8MML"/>
 804       <accept Dcore="Cortex-M23"/>
 805       <accept Dcore="Cortex-M33"/>
 806     </condition>
 807     <condition id="ARMv8-M TZ Device">
 808       <description>Armv8-M architecture based device with TrustZone</description>
 809       <require condition="ARMv8-M Device"/>
 810       <require Dtz="TZ"/>
 811     </condition>
 812     <condition id="ARMv6_7-M Device">
 813       <description>Armv6_7-M architecture based device</description>
 814       <accept condition="ARMv6-M Device"/>
 815       <accept condition="ARMv7-M Device"/>
 816     </condition>
 817     <condition id="ARMv6_7_8-M Device">
 818       <description>Armv6_7_8-M architecture based device</description>
 819       <accept condition="ARMv6-M Device"/>
 820       <accept condition="ARMv7-M Device"/>
 821       <accept condition="ARMv8-M Device"/>
 822     </condition>
 823     <condition id="ARMv7-A Device">
 824       <description>Armv7-A architecture based device</description>
 825       <accept Dcore="Cortex-A5"/>
 826       <accept Dcore="Cortex-A7"/>
 827       <accept Dcore="Cortex-A9"/>
 828     </condition>
 829
 830     <!-- ARM core -->
 831     <condition id="CM0">
 832       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 833       <accept Dcore="Cortex-M0"/>
 834       <accept Dcore="Cortex-M0+"/>
 835       <accept Dcore="SC000"/>
 836     </condition>
 837     <condition id="CM1">
 838       <description>Cortex-M1</description>
 839       <require Dcore="Cortex-M1"/>
 840     </condition>
 841     <condition id="CM3">
 842       <description>Cortex-M3 or SC300 processor based device</description>
 843       <accept Dcore="Cortex-M3"/>
 844       <accept Dcore="SC300"/>
 845     </condition>
 846     <condition id="CM4">
 847       <description>Cortex-M4 processor based device</description>
 848       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 849     </condition>
 850     <condition id="CM4_FP">
 851       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 852       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 853       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 854       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 855     </condition>
 856     <condition id="CM7">
 857       <description>Cortex-M7 processor based device</description>
 858       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 859     </condition>
 860     <condition id="CM7_FP">
 861       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 862       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 863       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 864     </condition>
 865     <condition id="CM7_SP">
 866       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 867       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 868     </condition>
 869     <condition id="CM7_DP">
 870       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 871       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 872     </condition>
 873     <condition id="CM23">
 874       <description>Cortex-M23 processor based device</description>
 875       <require Dcore="Cortex-M23"/>
 876     </condition>
 877     <condition id="CM33">
 878       <description>Cortex-M33 processor based device</description>
 879       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 880     </condition>
 881     <condition id="CM33_FP">
 882       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 883       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 884     </condition>
 885     <condition id="ARMv8MBL">
 886       <description>Armv8-M Baseline processor based device</description>
 887       <require Dcore="ARMV8MBL"/>
 888     </condition>
 889     <condition id="ARMv8MML">
 890       <description>Armv8-M Mainline processor based device</description>
 891       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 892     </condition>
 893     <condition id="ARMv8MML_FP">
 894       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
 895       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 896       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 897     </condition>
 898
 899     <condition id="CM33_NODSP_NOFPU">
 900       <description>CM33, no DSP, no FPU</description>
 901       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 902     </condition>
 903     <condition id="CM33_DSP_NOFPU">
 904       <description>CM33, DSP, no FPU</description>
 905       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 906     </condition>
 907     <condition id="CM33_NODSP_SP">
 908       <description>CM33, no DSP, SP FPU</description>
 909       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 910     </condition>
 911     <condition id="CM33_DSP_SP">
 912       <description>CM33, DSP, SP FPU</description>
 913       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 914     </condition>
 915
 916     <condition id="ARMv8MML_NODSP_NOFPU">
 917       <description>Armv8-M Mainline, no DSP, no FPU</description>
 918       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 919     </condition>
 920     <condition id="ARMv8MML_DSP_NOFPU">
 921       <description>Armv8-M Mainline, DSP, no FPU</description>
 922       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 923     </condition>
 924     <condition id="ARMv8MML_NODSP_SP">
 925       <description>Armv8-M Mainline, no DSP, SP FPU</description>
 926       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 927     </condition>
 928     <condition id="ARMv8MML_DSP_SP">
 929       <description>Armv8-M Mainline, DSP, SP FPU</description>
 930       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 931     </condition>
 932
 933     <condition id="CA5_CA9">
 934       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 935       <accept Dcore="Cortex-A5"/>
 936       <accept Dcore="Cortex-A9"/>
 937     </condition>
 938
 939     <condition id="CA7">
 940       <description>Cortex-A7 processor based device</description>
 941       <accept Dcore="Cortex-A7"/>
 942     </condition>
 943
 944     <!-- ARMCC compiler -->
 945     <condition id="CA_ARMCC5">
 946       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
 947       <require condition="ARMv7-A Device"/>
 948       <require condition="ARMCC5"/>
 949     </condition>
 950     <condition id="CA_ARMCC6">
 951       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
 952       <require condition="ARMv7-A Device"/>
 953       <require condition="ARMCC6"/>
 954     </condition>
 955
 956     <condition id="CM0_ARMCC">
 957       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
 958       <require condition="CM0"/>
 959       <require Tcompiler="ARMCC"/>
 960     </condition>
 961     <condition id="CM0_LE_ARMCC">
 962       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
 963       <require condition="CM0_ARMCC"/>
 964       <require Dendian="Little-endian"/>
 965     </condition>
 966     <condition id="CM0_BE_ARMCC">
 967       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
 968       <require condition="CM0_ARMCC"/>
 969       <require Dendian="Big-endian"/>
 970     </condition>
 971
 972     <condition id="CM1_ARMCC">
 973       <description>Cortex-M1 based device for the Arm Compiler</description>
 974       <require condition="CM1"/>
 975       <require Tcompiler="ARMCC"/>
 976     </condition>
 977     <condition id="CM1_LE_ARMCC">
 978       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
 979       <require condition="CM1_ARMCC"/>
 980       <require Dendian="Little-endian"/>
 981     </condition>
 982     <condition id="CM1_BE_ARMCC">
 983       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
 984       <require condition="CM1_ARMCC"/>
 985       <require Dendian="Big-endian"/>
 986     </condition>
 987
 988     <condition id="CM3_ARMCC">
 989       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
 990       <require condition="CM3"/>
 991       <require Tcompiler="ARMCC"/>
 992     </condition>
 993     <condition id="CM3_LE_ARMCC">
 994       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
 995       <require condition="CM3_ARMCC"/>
 996       <require Dendian="Little-endian"/>
 997     </condition>
 998     <condition id="CM3_BE_ARMCC">
 999       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1000       <require condition="CM3_ARMCC"/>
1001       <require Dendian="Big-endian"/>
1002     </condition>
1003
1004     <condition id="CM4_ARMCC">
1005       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1006       <require condition="CM4"/>
1007       <require Tcompiler="ARMCC"/>
1008     </condition>
1009     <condition id="CM4_LE_ARMCC">
1010       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1011       <require condition="CM4_ARMCC"/>
1012       <require Dendian="Little-endian"/>
1013     </condition>
1014     <condition id="CM4_BE_ARMCC">
1015       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1016       <require condition="CM4_ARMCC"/>
1017       <require Dendian="Big-endian"/>
1018     </condition>
1019
1020     <condition id="CM4_FP_ARMCC">
1021       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1022       <require condition="CM4_FP"/>
1023       <require Tcompiler="ARMCC"/>
1024     </condition>
1025     <condition id="CM4_FP_LE_ARMCC">
1026       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1027       <require condition="CM4_FP_ARMCC"/>
1028       <require Dendian="Little-endian"/>
1029     </condition>
1030     <condition id="CM4_FP_BE_ARMCC">
1031       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1032       <require condition="CM4_FP_ARMCC"/>
1033       <require Dendian="Big-endian"/>
1034     </condition>
1035
1036     <condition id="CM7_ARMCC">
1037       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1038       <require condition="CM7"/>
1039       <require Tcompiler="ARMCC"/>
1040     </condition>
1041     <condition id="CM7_LE_ARMCC">
1042       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1043       <require condition="CM7_ARMCC"/>
1044       <require Dendian="Little-endian"/>
1045     </condition>
1046     <condition id="CM7_BE_ARMCC">
1047       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1048       <require condition="CM7_ARMCC"/>
1049       <require Dendian="Big-endian"/>
1050     </condition>
1051
1052     <condition id="CM7_FP_ARMCC">
1053       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1054       <require condition="CM7_FP"/>
1055       <require Tcompiler="ARMCC"/>
1056     </condition>
1057     <condition id="CM7_FP_LE_ARMCC">
1058       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1059       <require condition="CM7_FP_ARMCC"/>
1060       <require Dendian="Little-endian"/>
1061     </condition>
1062     <condition id="CM7_FP_BE_ARMCC">
1063       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1064       <require condition="CM7_FP_ARMCC"/>
1065       <require Dendian="Big-endian"/>
1066     </condition>
1067
1068     <condition id="CM7_SP_ARMCC">
1069       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1070       <require condition="CM7_SP"/>
1071       <require Tcompiler="ARMCC"/>
1072     </condition>
1073     <condition id="CM7_SP_LE_ARMCC">
1074       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1075       <require condition="CM7_SP_ARMCC"/>
1076       <require Dendian="Little-endian"/>
1077     </condition>
1078     <condition id="CM7_SP_BE_ARMCC">
1079       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1080       <require condition="CM7_SP_ARMCC"/>
1081       <require Dendian="Big-endian"/>
1082     </condition>
1083
1084     <condition id="CM7_DP_ARMCC">
1085       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1086       <require condition="CM7_DP"/>
1087       <require Tcompiler="ARMCC"/>
1088     </condition>
1089     <condition id="CM7_DP_LE_ARMCC">
1090       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1091       <require condition="CM7_DP_ARMCC"/>
1092       <require Dendian="Little-endian"/>
1093     </condition>
1094     <condition id="CM7_DP_BE_ARMCC">
1095       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1096       <require condition="CM7_DP_ARMCC"/>
1097       <require Dendian="Big-endian"/>
1098     </condition>
1099
1100     <condition id="CM23_ARMCC">
1101       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1102       <require condition="CM23"/>
1103       <require Tcompiler="ARMCC"/>
1104     </condition>
1105     <condition id="CM23_LE_ARMCC">
1106       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1107       <require condition="CM23_ARMCC"/>
1108       <require Dendian="Little-endian"/>
1109     </condition>
1110     <condition id="CM23_BE_ARMCC">
1111       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1112       <require condition="CM23_ARMCC"/>
1113       <require Dendian="Big-endian"/>
1114     </condition>
1115
1116     <condition id="CM33_ARMCC">
1117       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1118       <require condition="CM33"/>
1119       <require Tcompiler="ARMCC"/>
1120     </condition>
1121     <condition id="CM33_LE_ARMCC">
1122       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1123       <require condition="CM33_ARMCC"/>
1124       <require Dendian="Little-endian"/>
1125     </condition>
1126     <condition id="CM33_BE_ARMCC">
1127       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1128       <require condition="CM33_ARMCC"/>
1129       <require Dendian="Big-endian"/>
1130     </condition>
1131
1132     <condition id="CM33_FP_ARMCC">
1133       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1134       <require condition="CM33_FP"/>
1135       <require Tcompiler="ARMCC"/>
1136     </condition>
1137     <condition id="CM33_FP_LE_ARMCC">
1138       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1139       <require condition="CM33_FP_ARMCC"/>
1140       <require Dendian="Little-endian"/>
1141     </condition>
1142     <condition id="CM33_FP_BE_ARMCC">
1143       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1144       <require condition="CM33_FP_ARMCC"/>
1145       <require Dendian="Big-endian"/>
1146     </condition>
1147
1148     <condition id="CM33_NODSP_NOFPU_ARMCC">
1149       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1150       <require condition="CM33_NODSP_NOFPU"/>
1151       <require Tcompiler="ARMCC"/>
1152     </condition>
1153     <condition id="CM33_DSP_NOFPU_ARMCC">
1154       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1155       <require condition="CM33_DSP_NOFPU"/>
1156       <require Tcompiler="ARMCC"/>
1157     </condition>
1158     <condition id="CM33_NODSP_SP_ARMCC">
1159       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1160       <require condition="CM33_NODSP_SP"/>
1161       <require Tcompiler="ARMCC"/>
1162     </condition>
1163     <condition id="CM33_DSP_SP_ARMCC">
1164       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1165       <require condition="CM33_DSP_SP"/>
1166       <require Tcompiler="ARMCC"/>
1167     </condition>
1168     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1169       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1170       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1171       <require Dendian="Little-endian"/>
1172     </condition>
1173     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1174       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1175       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1176       <require Dendian="Little-endian"/>
1177     </condition>
1178     <condition id="CM33_NODSP_SP_LE_ARMCC">
1179       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1180       <require condition="CM33_NODSP_SP_ARMCC"/>
1181       <require Dendian="Little-endian"/>
1182     </condition>
1183     <condition id="CM33_DSP_SP_LE_ARMCC">
1184       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1185       <require condition="CM33_DSP_SP_ARMCC"/>
1186       <require Dendian="Little-endian"/>
1187     </condition>
1188
1189     <condition id="ARMv8MBL_ARMCC">
1190       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1191       <require condition="ARMv8MBL"/>
1192       <require Tcompiler="ARMCC"/>
1193     </condition>
1194     <condition id="ARMv8MBL_LE_ARMCC">
1195       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1196       <require condition="ARMv8MBL_ARMCC"/>
1197       <require Dendian="Little-endian"/>
1198     </condition>
1199     <condition id="ARMv8MBL_BE_ARMCC">
1200       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1201       <require condition="ARMv8MBL_ARMCC"/>
1202       <require Dendian="Big-endian"/>
1203     </condition>
1204
1205     <condition id="ARMv8MML_ARMCC">
1206       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1207       <require condition="ARMv8MML"/>
1208       <require Tcompiler="ARMCC"/>
1209     </condition>
1210     <condition id="ARMv8MML_LE_ARMCC">
1211       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1212       <require condition="ARMv8MML_ARMCC"/>
1213       <require Dendian="Little-endian"/>
1214     </condition>
1215     <condition id="ARMv8MML_BE_ARMCC">
1216       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1217       <require condition="ARMv8MML_ARMCC"/>
1218       <require Dendian="Big-endian"/>
1219     </condition>
1220
1221     <condition id="ARMv8MML_FP_ARMCC">
1222       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1223       <require condition="ARMv8MML_FP"/>
1224       <require Tcompiler="ARMCC"/>
1225     </condition>
1226     <condition id="ARMv8MML_FP_LE_ARMCC">
1227       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1228       <require condition="ARMv8MML_FP_ARMCC"/>
1229       <require Dendian="Little-endian"/>
1230     </condition>
1231     <condition id="ARMv8MML_FP_BE_ARMCC">
1232       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1233       <require condition="ARMv8MML_FP_ARMCC"/>
1234       <require Dendian="Big-endian"/>
1235     </condition>
1236
1237     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1238       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1239       <require condition="ARMv8MML_NODSP_NOFPU"/>
1240       <require Tcompiler="ARMCC"/>
1241     </condition>
1242     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1243       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1244       <require condition="ARMv8MML_DSP_NOFPU"/>
1245       <require Tcompiler="ARMCC"/>
1246     </condition>
1247     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1248       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1249       <require condition="ARMv8MML_NODSP_SP"/>
1250       <require Tcompiler="ARMCC"/>
1251     </condition>
1252     <condition id="ARMv8MML_DSP_SP_ARMCC">
1253       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1254       <require condition="ARMv8MML_DSP_SP"/>
1255       <require Tcompiler="ARMCC"/>
1256     </condition>
1257     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1258       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1259       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1260       <require Dendian="Little-endian"/>
1261     </condition>
1262     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1263       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1264       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1265       <require Dendian="Little-endian"/>
1266     </condition>
1267     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1268       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1269       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1270       <require Dendian="Little-endian"/>
1271     </condition>
1272     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1273       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1274       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1275       <require Dendian="Little-endian"/>
1276     </condition>
1277
1278     <!-- GCC compiler -->
1279     <condition id="CA_GCC">
1280       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1281       <require condition="ARMv7-A Device"/>
1282       <require Tcompiler="GCC"/>
1283     </condition>
1284
1285     <condition id="CM0_GCC">
1286       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1287       <require condition="CM0"/>
1288       <require Tcompiler="GCC"/>
1289     </condition>
1290     <condition id="CM0_LE_GCC">
1291       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1292       <require condition="CM0_GCC"/>
1293       <require Dendian="Little-endian"/>
1294     </condition>
1295     <condition id="CM0_BE_GCC">
1296       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1297       <require condition="CM0_GCC"/>
1298       <require Dendian="Big-endian"/>
1299     </condition>
1300
1301     <condition id="CM1_GCC">
1302       <description>Cortex-M1 based device for the GCC Compiler</description>
1303       <require condition="CM1"/>
1304       <require Tcompiler="GCC"/>
1305     </condition>
1306     <condition id="CM1_LE_GCC">
1307       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1308       <require condition="CM1_GCC"/>
1309       <require Dendian="Little-endian"/>
1310     </condition>
1311     <condition id="CM1_BE_GCC">
1312       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1313       <require condition="CM1_GCC"/>
1314       <require Dendian="Big-endian"/>
1315     </condition>
1316
1317     <condition id="CM3_GCC">
1318       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1319       <require condition="CM3"/>
1320       <require Tcompiler="GCC"/>
1321     </condition>
1322     <condition id="CM3_LE_GCC">
1323       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1324       <require condition="CM3_GCC"/>
1325       <require Dendian="Little-endian"/>
1326     </condition>
1327     <condition id="CM3_BE_GCC">
1328       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1329       <require condition="CM3_GCC"/>
1330       <require Dendian="Big-endian"/>
1331     </condition>
1332
1333     <condition id="CM4_GCC">
1334       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1335       <require condition="CM4"/>
1336       <require Tcompiler="GCC"/>
1337     </condition>
1338     <condition id="CM4_LE_GCC">
1339       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1340       <require condition="CM4_GCC"/>
1341       <require Dendian="Little-endian"/>
1342     </condition>
1343     <condition id="CM4_BE_GCC">
1344       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1345       <require condition="CM4_GCC"/>
1346       <require Dendian="Big-endian"/>
1347     </condition>
1348
1349     <condition id="CM4_FP_GCC">
1350       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1351       <require condition="CM4_FP"/>
1352       <require Tcompiler="GCC"/>
1353     </condition>
1354     <condition id="CM4_FP_LE_GCC">
1355       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1356       <require condition="CM4_FP_GCC"/>
1357       <require Dendian="Little-endian"/>
1358     </condition>
1359     <condition id="CM4_FP_BE_GCC">
1360       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1361       <require condition="CM4_FP_GCC"/>
1362       <require Dendian="Big-endian"/>
1363     </condition>
1364
1365     <condition id="CM7_GCC">
1366       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1367       <require condition="CM7"/>
1368       <require Tcompiler="GCC"/>
1369     </condition>
1370     <condition id="CM7_LE_GCC">
1371       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1372       <require condition="CM7_GCC"/>
1373       <require Dendian="Little-endian"/>
1374     </condition>
1375     <condition id="CM7_BE_GCC">
1376       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1377       <require condition="CM7_GCC"/>
1378       <require Dendian="Big-endian"/>
1379     </condition>
1380
1381     <condition id="CM7_FP_GCC">
1382       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1383       <require condition="CM7_FP"/>
1384       <require Tcompiler="GCC"/>
1385     </condition>
1386     <condition id="CM7_FP_LE_GCC">
1387       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1388       <require condition="CM7_FP_GCC"/>
1389       <require Dendian="Little-endian"/>
1390     </condition>
1391     <condition id="CM7_FP_BE_GCC">
1392       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1393       <require condition="CM7_FP_GCC"/>
1394       <require Dendian="Big-endian"/>
1395     </condition>
1396
1397     <condition id="CM7_SP_GCC">
1398       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1399       <require condition="CM7_SP"/>
1400       <require Tcompiler="GCC"/>
1401     </condition>
1402     <condition id="CM7_SP_LE_GCC">
1403       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1404       <require condition="CM7_SP_GCC"/>
1405       <require Dendian="Little-endian"/>
1406     </condition>
1407     <condition id="CM7_SP_BE_GCC">
1408       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1409       <require condition="CM7_SP_GCC"/>
1410       <require Dendian="Big-endian"/>
1411     </condition>
1412
1413     <condition id="CM7_DP_GCC">
1414       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1415       <require condition="CM7_DP"/>
1416       <require Tcompiler="GCC"/>
1417     </condition>
1418     <condition id="CM7_DP_LE_GCC">
1419       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1420       <require condition="CM7_DP_GCC"/>
1421       <require Dendian="Little-endian"/>
1422     </condition>
1423     <condition id="CM7_DP_BE_GCC">
1424       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1425       <require condition="CM7_DP_GCC"/>
1426       <require Dendian="Big-endian"/>
1427     </condition>
1428
1429     <condition id="CM23_GCC">
1430       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1431       <require condition="CM23"/>
1432       <require Tcompiler="GCC"/>
1433     </condition>
1434     <condition id="CM23_LE_GCC">
1435       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1436       <require condition="CM23_GCC"/>
1437       <require Dendian="Little-endian"/>
1438     </condition>
1439     <condition id="CM23_BE_GCC">
1440       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1441       <require condition="CM23_GCC"/>
1442       <require Dendian="Big-endian"/>
1443     </condition>
1444
1445     <condition id="CM33_GCC">
1446       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1447       <require condition="CM33"/>
1448       <require Tcompiler="GCC"/>
1449     </condition>
1450     <condition id="CM33_LE_GCC">
1451       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1452       <require condition="CM33_GCC"/>
1453       <require Dendian="Little-endian"/>
1454     </condition>
1455     <condition id="CM33_BE_GCC">
1456       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1457       <require condition="CM33_GCC"/>
1458       <require Dendian="Big-endian"/>
1459     </condition>
1460
1461     <condition id="CM33_FP_GCC">
1462       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1463       <require condition="CM33_FP"/>
1464       <require Tcompiler="GCC"/>
1465     </condition>
1466     <condition id="CM33_FP_LE_GCC">
1467       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1468       <require condition="CM33_FP_GCC"/>
1469       <require Dendian="Little-endian"/>
1470     </condition>
1471     <condition id="CM33_FP_BE_GCC">
1472       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1473       <require condition="CM33_FP_GCC"/>
1474       <require Dendian="Big-endian"/>
1475     </condition>
1476
1477     <condition id="CM33_NODSP_NOFPU_GCC">
1478       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1479       <require condition="CM33_NODSP_NOFPU"/>
1480       <require Tcompiler="GCC"/>
1481     </condition>
1482     <condition id="CM33_DSP_NOFPU_GCC">
1483       <description>CM33, DSP, no FPU, GCC Compiler</description>
1484       <require condition="CM33_DSP_NOFPU"/>
1485       <require Tcompiler="GCC"/>
1486     </condition>
1487     <condition id="CM33_NODSP_SP_GCC">
1488       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1489       <require condition="CM33_NODSP_SP"/>
1490       <require Tcompiler="GCC"/>
1491     </condition>
1492     <condition id="CM33_DSP_SP_GCC">
1493       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1494       <require condition="CM33_DSP_SP"/>
1495       <require Tcompiler="GCC"/>
1496     </condition>
1497     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1498       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1499       <require condition="CM33_NODSP_NOFPU_GCC"/>
1500       <require Dendian="Little-endian"/>
1501     </condition>
1502     <condition id="CM33_DSP_NOFPU_LE_GCC">
1503       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1504       <require condition="CM33_DSP_NOFPU_GCC"/>
1505       <require Dendian="Little-endian"/>
1506     </condition>
1507     <condition id="CM33_NODSP_SP_LE_GCC">
1508       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1509       <require condition="CM33_NODSP_SP_GCC"/>
1510       <require Dendian="Little-endian"/>
1511     </condition>
1512     <condition id="CM33_DSP_SP_LE_GCC">
1513       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1514       <require condition="CM33_DSP_SP_GCC"/>
1515       <require Dendian="Little-endian"/>
1516     </condition>
1517
1518     <condition id="ARMv8MBL_GCC">
1519       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1520       <require condition="ARMv8MBL"/>
1521       <require Tcompiler="GCC"/>
1522     </condition>
1523     <condition id="ARMv8MBL_LE_GCC">
1524       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1525       <require condition="ARMv8MBL_GCC"/>
1526       <require Dendian="Little-endian"/>
1527     </condition>
1528     <condition id="ARMv8MBL_BE_GCC">
1529       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1530       <require condition="ARMv8MBL_GCC"/>
1531       <require Dendian="Big-endian"/>
1532     </condition>
1533
1534     <condition id="ARMv8MML_GCC">
1535       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1536       <require condition="ARMv8MML"/>
1537       <require Tcompiler="GCC"/>
1538     </condition>
1539     <condition id="ARMv8MML_LE_GCC">
1540       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1541       <require condition="ARMv8MML_GCC"/>
1542       <require Dendian="Little-endian"/>
1543     </condition>
1544     <condition id="ARMv8MML_BE_GCC">
1545       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1546       <require condition="ARMv8MML_GCC"/>
1547       <require Dendian="Big-endian"/>
1548     </condition>
1549
1550     <condition id="ARMv8MML_FP_GCC">
1551       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1552       <require condition="ARMv8MML_FP"/>
1553       <require Tcompiler="GCC"/>
1554     </condition>
1555     <condition id="ARMv8MML_FP_LE_GCC">
1556       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1557       <require condition="ARMv8MML_FP_GCC"/>
1558       <require Dendian="Little-endian"/>
1559     </condition>
1560     <condition id="ARMv8MML_FP_BE_GCC">
1561       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1562       <require condition="ARMv8MML_FP_GCC"/>
1563       <require Dendian="Big-endian"/>
1564     </condition>
1565
1566     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1567       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1568       <require condition="ARMv8MML_NODSP_NOFPU"/>
1569       <require Tcompiler="GCC"/>
1570     </condition>
1571     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1572       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1573       <require condition="ARMv8MML_DSP_NOFPU"/>
1574       <require Tcompiler="GCC"/>
1575     </condition>
1576     <condition id="ARMv8MML_NODSP_SP_GCC">
1577       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1578       <require condition="ARMv8MML_NODSP_SP"/>
1579       <require Tcompiler="GCC"/>
1580     </condition>
1581     <condition id="ARMv8MML_DSP_SP_GCC">
1582       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1583       <require condition="ARMv8MML_DSP_SP"/>
1584       <require Tcompiler="GCC"/>
1585     </condition>
1586     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1587       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1588       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1589       <require Dendian="Little-endian"/>
1590     </condition>
1591     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1592       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1593       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1594       <require Dendian="Little-endian"/>
1595     </condition>
1596     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1597       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1598       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1599       <require Dendian="Little-endian"/>
1600     </condition>
1601     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1602       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1603       <require condition="ARMv8MML_DSP_SP_GCC"/>
1604       <require Dendian="Little-endian"/>
1605     </condition>
1606
1607     <!-- IAR compiler -->
1608     <condition id="CA_IAR">
1609       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1610       <require condition="ARMv7-A Device"/>
1611       <require Tcompiler="IAR"/>
1612     </condition>
1613
1614     <condition id="CM0_IAR">
1615       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1616       <require condition="CM0"/>
1617       <require Tcompiler="IAR"/>
1618     </condition>
1619     <condition id="CM0_LE_IAR">
1620       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1621       <require condition="CM0_IAR"/>
1622       <require Dendian="Little-endian"/>
1623     </condition>
1624     <condition id="CM0_BE_IAR">
1625       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1626       <require condition="CM0_IAR"/>
1627       <require Dendian="Big-endian"/>
1628     </condition>
1629
1630     <condition id="CM1_IAR">
1631       <description>Cortex-M1 based device for the IAR Compiler</description>
1632       <require condition="CM1"/>
1633       <require Tcompiler="IAR"/>
1634     </condition>
1635     <condition id="CM1_LE_IAR">
1636       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1637       <require condition="CM1_IAR"/>
1638       <require Dendian="Little-endian"/>
1639     </condition>
1640     <condition id="CM1_BE_IAR">
1641       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1642       <require condition="CM1_IAR"/>
1643       <require Dendian="Big-endian"/>
1644     </condition>
1645
1646     <condition id="CM3_IAR">
1647       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1648       <require condition="CM3"/>
1649       <require Tcompiler="IAR"/>
1650     </condition>
1651     <condition id="CM3_LE_IAR">
1652       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1653       <require condition="CM3_IAR"/>
1654       <require Dendian="Little-endian"/>
1655     </condition>
1656     <condition id="CM3_BE_IAR">
1657       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1658       <require condition="CM3_IAR"/>
1659       <require Dendian="Big-endian"/>
1660     </condition>
1661
1662     <condition id="CM4_IAR">
1663       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1664       <require condition="CM4"/>
1665       <require Tcompiler="IAR"/>
1666     </condition>
1667     <condition id="CM4_LE_IAR">
1668       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1669       <require condition="CM4_IAR"/>
1670       <require Dendian="Little-endian"/>
1671     </condition>
1672     <condition id="CM4_BE_IAR">
1673       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1674       <require condition="CM4_IAR"/>
1675       <require Dendian="Big-endian"/>
1676     </condition>
1677
1678     <condition id="CM4_FP_IAR">
1679       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1680       <require condition="CM4_FP"/>
1681       <require Tcompiler="IAR"/>
1682     </condition>
1683     <condition id="CM4_FP_LE_IAR">
1684       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1685       <require condition="CM4_FP_IAR"/>
1686       <require Dendian="Little-endian"/>
1687     </condition>
1688     <condition id="CM4_FP_BE_IAR">
1689       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1690       <require condition="CM4_FP_IAR"/>
1691       <require Dendian="Big-endian"/>
1692     </condition>
1693
1694     <condition id="CM7_IAR">
1695       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1696       <require condition="CM7"/>
1697       <require Tcompiler="IAR"/>
1698     </condition>
1699     <condition id="CM7_LE_IAR">
1700       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1701       <require condition="CM7_IAR"/>
1702       <require Dendian="Little-endian"/>
1703     </condition>
1704     <condition id="CM7_BE_IAR">
1705       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1706       <require condition="CM7_IAR"/>
1707       <require Dendian="Big-endian"/>
1708     </condition>
1709
1710     <condition id="CM7_FP_IAR">
1711       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1712       <require condition="CM7_FP"/>
1713       <require Tcompiler="IAR"/>
1714     </condition>
1715     <condition id="CM7_FP_LE_IAR">
1716       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1717       <require condition="CM7_FP_IAR"/>
1718       <require Dendian="Little-endian"/>
1719     </condition>
1720     <condition id="CM7_FP_BE_IAR">
1721       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1722       <require condition="CM7_FP_IAR"/>
1723       <require Dendian="Big-endian"/>
1724     </condition>
1725
1726     <condition id="CM7_SP_IAR">
1727       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1728       <require condition="CM7_SP"/>
1729       <require Tcompiler="IAR"/>
1730     </condition>
1731     <condition id="CM7_SP_LE_IAR">
1732       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1733       <require condition="CM7_SP_IAR"/>
1734       <require Dendian="Little-endian"/>
1735     </condition>
1736     <condition id="CM7_SP_BE_IAR">
1737       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1738       <require condition="CM7_SP_IAR"/>
1739       <require Dendian="Big-endian"/>
1740     </condition>
1741
1742     <condition id="CM7_DP_IAR">
1743       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1744       <require condition="CM7_DP"/>
1745       <require Tcompiler="IAR"/>
1746     </condition>
1747     <condition id="CM7_DP_LE_IAR">
1748       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1749       <require condition="CM7_DP_IAR"/>
1750       <require Dendian="Little-endian"/>
1751     </condition>
1752     <condition id="CM7_DP_BE_IAR">
1753       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1754       <require condition="CM7_DP_IAR"/>
1755       <require Dendian="Big-endian"/>
1756     </condition>
1757
1758     <condition id="CM23_IAR">
1759       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1760       <require condition="CM23"/>
1761       <require Tcompiler="IAR"/>
1762     </condition>
1763     <condition id="CM23_LE_IAR">
1764       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1765       <require condition="CM23_IAR"/>
1766       <require Dendian="Little-endian"/>
1767     </condition>
1768     <condition id="CM23_BE_IAR">
1769       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
1770       <require condition="CM23_IAR"/>
1771       <require Dendian="Big-endian"/>
1772     </condition>
1773
1774     <condition id="CM33_IAR">
1775       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1776       <require condition="CM33"/>
1777       <require Tcompiler="IAR"/>
1778     </condition>
1779     <condition id="CM33_LE_IAR">
1780       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1781       <require condition="CM33_IAR"/>
1782       <require Dendian="Little-endian"/>
1783     </condition>
1784     <condition id="CM33_BE_IAR">
1785       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
1786       <require condition="CM33_IAR"/>
1787       <require Dendian="Big-endian"/>
1788     </condition>
1789
1790     <condition id="CM33_FP_IAR">
1791       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1792       <require condition="CM33_FP"/>
1793       <require Tcompiler="IAR"/>
1794     </condition>
1795     <condition id="CM33_FP_LE_IAR">
1796       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1797       <require condition="CM33_FP_IAR"/>
1798       <require Dendian="Little-endian"/>
1799     </condition>
1800     <condition id="CM33_FP_BE_IAR">
1801       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1802       <require condition="CM33_FP_IAR"/>
1803       <require Dendian="Big-endian"/>
1804     </condition>
1805
1806     <condition id="CM33_NODSP_NOFPU_IAR">
1807       <description>CM33, no DSP, no FPU, IAR Compiler</description>
1808       <require condition="CM33_NODSP_NOFPU"/>
1809       <require Tcompiler="IAR"/>
1810     </condition>
1811     <condition id="CM33_DSP_NOFPU_IAR">
1812       <description>CM33, DSP, no FPU, IAR Compiler</description>
1813       <require condition="CM33_DSP_NOFPU"/>
1814       <require Tcompiler="IAR"/>
1815     </condition>
1816     <condition id="CM33_NODSP_SP_IAR">
1817       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
1818       <require condition="CM33_NODSP_SP"/>
1819       <require Tcompiler="IAR"/>
1820     </condition>
1821     <condition id="CM33_DSP_SP_IAR">
1822       <description>CM33, DSP, SP FPU, IAR Compiler</description>
1823       <require condition="CM33_DSP_SP"/>
1824       <require Tcompiler="IAR"/>
1825     </condition>
1826     <condition id="CM33_NODSP_NOFPU_LE_IAR">
1827       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
1828       <require condition="CM33_NODSP_NOFPU_IAR"/>
1829       <require Dendian="Little-endian"/>
1830     </condition>
1831     <condition id="CM33_DSP_NOFPU_LE_IAR">
1832       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
1833       <require condition="CM33_DSP_NOFPU_IAR"/>
1834       <require Dendian="Little-endian"/>
1835     </condition>
1836     <condition id="CM33_NODSP_SP_LE_IAR">
1837       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
1838       <require condition="CM33_NODSP_SP_IAR"/>
1839       <require Dendian="Little-endian"/>
1840     </condition>
1841     <condition id="CM33_DSP_SP_LE_IAR">
1842       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
1843       <require condition="CM33_DSP_SP_IAR"/>
1844       <require Dendian="Little-endian"/>
1845     </condition>
1846
1847     <condition id="ARMv8MBL_IAR">
1848       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1849       <require condition="ARMv8MBL"/>
1850       <require Tcompiler="IAR"/>
1851     </condition>
1852     <condition id="ARMv8MBL_LE_IAR">
1853       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1854       <require condition="ARMv8MBL_IAR"/>
1855       <require Dendian="Little-endian"/>
1856     </condition>
1857     <condition id="ARMv8MBL_BE_IAR">
1858       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
1859       <require condition="ARMv8MBL_IAR"/>
1860       <require Dendian="Big-endian"/>
1861     </condition>
1862
1863     <condition id="ARMv8MML_IAR">
1864       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1865       <require condition="ARMv8MML"/>
1866       <require Tcompiler="IAR"/>
1867     </condition>
1868     <condition id="ARMv8MML_LE_IAR">
1869       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1870       <require condition="ARMv8MML_IAR"/>
1871       <require Dendian="Little-endian"/>
1872     </condition>
1873     <condition id="ARMv8MML_BE_IAR">
1874       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
1875       <require condition="ARMv8MML_IAR"/>
1876       <require Dendian="Big-endian"/>
1877     </condition>
1878
1879     <condition id="ARMv8MML_FP_IAR">
1880       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1881       <require condition="ARMv8MML_FP"/>
1882       <require Tcompiler="IAR"/>
1883     </condition>
1884     <condition id="ARMv8MML_FP_LE_IAR">
1885       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1886       <require condition="ARMv8MML_FP_IAR"/>
1887       <require Dendian="Little-endian"/>
1888     </condition>
1889     <condition id="ARMv8MML_FP_BE_IAR">
1890       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1891       <require condition="ARMv8MML_FP_IAR"/>
1892       <require Dendian="Big-endian"/>
1893     </condition>
1894
1895     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
1896       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
1897       <require condition="ARMv8MML_NODSP_NOFPU"/>
1898       <require Tcompiler="IAR"/>
1899     </condition>
1900     <condition id="ARMv8MML_DSP_NOFPU_IAR">
1901       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
1902       <require condition="ARMv8MML_DSP_NOFPU"/>
1903       <require Tcompiler="IAR"/>
1904     </condition>
1905     <condition id="ARMv8MML_NODSP_SP_IAR">
1906       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
1907       <require condition="ARMv8MML_NODSP_SP"/>
1908       <require Tcompiler="IAR"/>
1909     </condition>
1910     <condition id="ARMv8MML_DSP_SP_IAR">
1911       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
1912       <require condition="ARMv8MML_DSP_SP"/>
1913       <require Tcompiler="IAR"/>
1914     </condition>
1915     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
1916       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
1917       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
1918       <require Dendian="Little-endian"/>
1919     </condition>
1920     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
1921       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
1922       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
1923       <require Dendian="Little-endian"/>
1924     </condition>
1925     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
1926       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
1927       <require condition="ARMv8MML_NODSP_SP_IAR"/>
1928       <require Dendian="Little-endian"/>
1929     </condition>
1930     <condition id="ARMv8MML_DSP_SP_LE_IAR">
1931       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
1932       <require condition="ARMv8MML_DSP_SP_IAR"/>
1933       <require Dendian="Little-endian"/>
1934     </condition>
1935
1936     <!-- conditions selecting single devices and CMSIS Core -->
1937     <!-- used for component startup, GCC version is used for C-Startup -->
1938     <condition id="ARMCM0 CMSIS">
1939       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
1940       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1941       <require Cclass="CMSIS" Cgroup="CORE"/>
1942     </condition>
1943     <condition id="ARMCM0 CMSIS GCC">
1944       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1945       <require condition="ARMCM0 CMSIS"/>
1946       <require condition="GCC"/>
1947     </condition>
1948
1949     <condition id="ARMCM0+ CMSIS">
1950       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
1951       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1952       <require Cclass="CMSIS" Cgroup="CORE"/>
1953     </condition>
1954     <condition id="ARMCM0+ CMSIS GCC">
1955       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1956       <require condition="ARMCM0+ CMSIS"/>
1957       <require condition="GCC"/>
1958     </condition>
1959
1960     <condition id="ARMCM1 CMSIS">
1961       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
1962       <require Dvendor="ARM:82" Dname="ARMCM1"/>
1963       <require Cclass="CMSIS" Cgroup="CORE"/>
1964     </condition>
1965     <condition id="ARMCM1 CMSIS GCC">
1966       <description>Generic ARM Cortex-M1 device startup and depends on CMSIS Core requiring GCC</description>
1967       <require condition="ARMCM1 CMSIS"/>
1968       <require condition="GCC"/>
1969     </condition>
1970
1971     <condition id="ARMCM3 CMSIS">
1972       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
1973       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1974       <require Cclass="CMSIS" Cgroup="CORE"/>
1975     </condition>
1976     <condition id="ARMCM3 CMSIS GCC">
1977       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1978       <require condition="ARMCM3 CMSIS"/>
1979       <require condition="GCC"/>
1980     </condition>
1981
1982     <condition id="ARMCM4 CMSIS">
1983       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
1984       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1985       <require Cclass="CMSIS" Cgroup="CORE"/>
1986     </condition>
1987     <condition id="ARMCM4 CMSIS GCC">
1988       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1989       <require condition="ARMCM4 CMSIS"/>
1990       <require condition="GCC"/>
1991     </condition>
1992
1993     <condition id="ARMCM7 CMSIS">
1994       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
1995       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1996       <require Cclass="CMSIS" Cgroup="CORE"/>
1997     </condition>
1998     <condition id="ARMCM7 CMSIS GCC">
1999       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
2000       <require condition="ARMCM7 CMSIS"/>
2001       <require condition="GCC"/>
2002     </condition>
2003
2004     <condition id="ARMCM23 CMSIS">
2005       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2006       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2007       <require Cclass="CMSIS" Cgroup="CORE"/>
2008     </condition>
2009     <condition id="ARMCM23 CMSIS GCC">
2010       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
2011       <require condition="ARMCM23 CMSIS"/>
2012       <require condition="GCC"/>
2013     </condition>
2014
2015     <condition id="ARMCM33 CMSIS">
2016       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2017       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2018       <require Cclass="CMSIS" Cgroup="CORE"/>
2019     </condition>
2020     <condition id="ARMCM33 CMSIS GCC">
2021       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
2022       <require condition="ARMCM33 CMSIS"/>
2023       <require condition="GCC"/>
2024     </condition>
2025
2026     <condition id="ARMSC000 CMSIS">
2027       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2028       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2029       <require Cclass="CMSIS" Cgroup="CORE"/>
2030     </condition>
2031     <condition id="ARMSC000 CMSIS GCC">
2032       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
2033       <require condition="ARMSC000 CMSIS"/>
2034       <require condition="GCC"/>
2035     </condition>
2036
2037     <condition id="ARMSC300 CMSIS">
2038       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2039       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2040       <require Cclass="CMSIS" Cgroup="CORE"/>
2041     </condition>
2042     <condition id="ARMSC300 CMSIS GCC">
2043       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
2044       <require condition="ARMSC300 CMSIS"/>
2045       <require condition="GCC"/>
2046     </condition>
2047
2048     <condition id="ARMv8MBL CMSIS">
2049       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2050       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2051       <require Cclass="CMSIS" Cgroup="CORE"/>
2052     </condition>
2053     <condition id="ARMv8MBL CMSIS GCC">
2054       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
2055       <require condition="ARMv8MBL CMSIS"/>
2056       <require condition="GCC"/>
2057     </condition>
2058
2059     <condition id="ARMv8MML CMSIS">
2060       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2061       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2062       <require Cclass="CMSIS" Cgroup="CORE"/>
2063     </condition>
2064     <condition id="ARMv8MML CMSIS GCC">
2065       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2066       <require condition="ARMv8MML CMSIS"/>
2067       <require condition="GCC"/>
2068     </condition>
2069
2070     <condition id="ARMCA5 CMSIS">
2071       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2072       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2073       <require Cclass="CMSIS" Cgroup="CORE"/>
2074     </condition>
2075
2076     <condition id="ARMCA7 CMSIS">
2077       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2078       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2079       <require Cclass="CMSIS" Cgroup="CORE"/>
2080     </condition>
2081
2082     <condition id="ARMCA9 CMSIS">
2083       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2084       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2085       <require Cclass="CMSIS" Cgroup="CORE"/>
2086     </condition>
2087
2088     <!-- CMSIS DSP -->
2089     <condition id="CMSIS DSP">
2090       <description>Components required for DSP</description>
2091       <require condition="ARMv6_7_8-M Device"/>
2092       <require condition="ARMCC GCC IAR"/>
2093       <require Cclass="CMSIS" Cgroup="CORE"/>
2094     </condition>
2095
2096     <!-- CMSIS NN -->
2097     <condition id="CMSIS NN">
2098       <description>Components required for NN</description>
2099       <require condition="CMSIS DSP"/>
2100     </condition>
2101
2102     <!-- RTOS RTX -->
2103     <condition id="RTOS RTX">
2104       <description>Components required for RTOS RTX</description>
2105       <require condition="ARMv6_7-M Device"/>
2106       <require condition="ARMCC GCC IAR"/>
2107       <require Cclass="Device" Cgroup="Startup"/>
2108       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2109     </condition>
2110     <condition id="RTOS RTX IFX">
2111       <description>Components required for RTOS RTX IFX</description>
2112       <require condition="ARMv6_7-M Device"/>
2113       <require condition="ARMCC GCC IAR"/>
2114       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2115       <require Cclass="Device" Cgroup="Startup"/>
2116       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2117     </condition>
2118     <condition id="RTOS RTX5">
2119       <description>Components required for RTOS RTX5</description>
2120       <require condition="ARMv6_7_8-M Device"/>
2121       <require condition="ARMCC GCC IAR"/>
2122       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2123     </condition>
2124     <condition id="RTOS2 RTX5">
2125       <description>Components required for RTOS2 RTX5</description>
2126       <require condition="ARMv6_7_8-M Device"/>
2127       <require condition="ARMCC GCC IAR"/>
2128       <require Cclass="CMSIS"  Cgroup="CORE"/>
2129       <require Cclass="Device" Cgroup="Startup"/>
2130     </condition>
2131     <condition id="RTOS2 RTX5 v7-A">
2132       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2133       <require condition="ARMv7-A Device"/>
2134       <require condition="ARMCC GCC IAR"/>
2135       <require Cclass="CMSIS"  Cgroup="CORE"/>
2136       <require Cclass="Device" Cgroup="Startup"/>
2137       <require Cclass="Device" Cgroup="OS Tick"/>
2138       <require Cclass="Device" Cgroup="IRQ Controller"/>
2139     </condition>
2140     <condition id="RTOS2 RTX5 Lib">
2141       <description>Components required for RTOS2 RTX5 Library</description>
2142       <require condition="ARMv6_7_8-M Device"/>
2143       <require condition="ARMCC GCC IAR"/>
2144       <require Cclass="CMSIS"  Cgroup="CORE"/>
2145       <require Cclass="Device" Cgroup="Startup"/>
2146     </condition>
2147     <condition id="RTOS2 RTX5 NS">
2148       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2149       <require condition="ARMv8-M TZ Device"/>
2150       <require condition="ARMCC GCC IAR"/>
2151       <require Cclass="CMSIS"  Cgroup="CORE"/>
2152       <require Cclass="Device" Cgroup="Startup"/>
2153     </condition>
2154
2155     <!-- OS Tick -->
2156     <condition id="OS Tick PTIM">
2157       <description>Components required for OS Tick Private Timer</description>
2158       <require condition="CA5_CA9"/>
2159       <require Cclass="Device" Cgroup="IRQ Controller"/>
2160     </condition>
2161
2162     <condition id="OS Tick GTIM">
2163       <description>Components required for OS Tick Generic Physical Timer</description>
2164       <require condition="CA7"/>
2165       <require Cclass="Device" Cgroup="IRQ Controller"/>
2166     </condition>
2167
2168   </conditions>
2169
2170   <components>
2171     <!-- CMSIS-Core component -->
2172     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.1.2"  condition="ARMv6_7_8-M Device" >
2173       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
2174       <files>
2175         <!-- CPU independent -->
2176         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2177         <file category="include" name="CMSIS/Core/Include/"/>
2178         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2179         <!-- Code template -->
2180         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
2181         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2182       </files>
2183     </component>
2184
2185     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.2"  condition="ARMv7-A Device" >
2186       <description>CMSIS-CORE for Cortex-A</description>
2187       <files>
2188         <!-- CPU independent -->
2189         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2190         <file category="include" name="CMSIS/Core_A/Include/"/>
2191       </files>
2192     </component>
2193
2194     <!-- CMSIS-Startup components -->
2195     <!-- Cortex-M0 -->
2196     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
2197       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2198       <files>
2199         <!-- include folder / device header file -->
2200         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2201         <!-- startup / system file -->
2202         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2203         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
2204         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2205         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2206         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2207       </files>
2208     </component>
2209     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
2210       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2211       <files>
2212         <!-- include folder / device header file -->
2213         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2214         <!-- startup / system file -->
2215         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
2216         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2217         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2218       </files>
2219     </component>
2220
2221     <!-- Cortex-M0+ -->
2222     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
2223       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2224       <files>
2225         <!-- include folder / device header file -->
2226         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2227         <!-- startup / system file -->
2228         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2229         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
2230         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2231         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2232         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2233       </files>
2234     </component>
2235     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
2236       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2237       <files>
2238         <!-- include folder / device header file -->
2239         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2240         <!-- startup / system file -->
2241         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
2242         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2243         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2244       </files>
2245     </component>
2246
2247     <!-- Cortex-M1 -->
2248     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM1 CMSIS">
2249       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2250       <files>
2251         <!-- include folder / device header file -->
2252         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2253         <!-- startup / system file -->
2254         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.0" attr="config" condition="ARMCC"/>
2255         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="1.0.0" attr="config" condition="GCC"/>
2256         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2257         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2258         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2259       </files>
2260     </component>
2261     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM1 CMSIS GCC">
2262       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2263       <files>
2264         <!-- include folder / device header file -->
2265         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2266         <!-- startup / system file -->
2267         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.c" version="1.0.0" attr="config" condition="GCC"/>
2268         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2269         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2270       </files>
2271     </component>
2272
2273     <!-- Cortex-M3 -->
2274     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
2275       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2276       <files>
2277         <!-- include folder / device header file -->
2278         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2279         <!-- startup / system file -->
2280         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2281         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
2282         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2283         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2284         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2285       </files>
2286     </component>
2287     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
2288       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2289       <files>
2290         <!-- include folder / device header file -->
2291         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2292         <!-- startup / system file -->
2293         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
2294         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2295         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2296       </files>
2297     </component>
2298
2299     <!-- Cortex-M4 -->
2300     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
2301       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2302       <files>
2303         <!-- include folder / device header file -->
2304         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2305         <!-- startup / system file -->
2306         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2307         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2308         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2309         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2310         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2311       </files>
2312     </component>
2313     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2314       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2315       <files>
2316         <!-- include folder / device header file -->
2317         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2318         <!-- startup / system file -->
2319         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2320         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2321         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2322       </files>
2323     </component>
2324
2325     <!-- Cortex-M7 -->
2326     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2327       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2328       <files>
2329         <!-- include folder / device header file -->
2330         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2331         <!-- startup / system file -->
2332         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2333         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2334         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2335         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2336         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2337       </files>
2338     </component>
2339     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2340       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2341       <files>
2342         <!-- include folder / device header file -->
2343         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2344         <!-- startup / system file -->
2345         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2346         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2347         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2348       </files>
2349     </component>
2350
2351     <!-- Cortex-M23 -->
2352     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2353       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2354       <files>
2355         <!-- include folder / device header file -->
2356         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2357         <!-- startup / system file -->
2358         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2359         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2360         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2361         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2362         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2363         <!-- SAU configuration -->
2364         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2365       </files>
2366     </component>
2367     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2368       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2369       <files>
2370         <!-- include folder / device header file -->
2371         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2372         <!-- startup / system file -->
2373         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2374         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2375         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2376         <!-- SAU configuration -->
2377         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2378       </files>
2379     </component>
2380
2381     <!-- Cortex-M33 -->
2382     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2383       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2384       <files>
2385         <!-- include folder / device header file -->
2386         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2387         <!-- startup / system file -->
2388         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2389         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2390         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2391         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2392         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2393         <!-- SAU configuration -->
2394         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2395       </files>
2396     </component>
2397     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2398       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2399       <files>
2400         <!-- include folder / device header file -->
2401         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2402         <!-- startup / system file -->
2403         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2404         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2405         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2406         <!-- SAU configuration -->
2407         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2408       </files>
2409     </component>
2410
2411     <!-- Cortex-SC000 -->
2412     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2413       <description>System and Startup for Generic Arm SC000 device</description>
2414       <files>
2415         <!-- include folder / device header file -->
2416         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2417         <!-- startup / system file -->
2418         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2419         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2420         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2421         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2422         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2423       </files>
2424     </component>
2425     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2426       <description>System and Startup for Generic Arm SC000 device</description>
2427       <files>
2428         <!-- include folder / device header file -->
2429         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2430         <!-- startup / system file -->
2431         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2432         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2433         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2434       </files>
2435     </component>
2436
2437     <!-- Cortex-SC300 -->
2438     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2439       <description>System and Startup for Generic Arm SC300 device</description>
2440       <files>
2441         <!-- include folder / device header file -->
2442         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2443         <!-- startup / system file -->
2444         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2445         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2446         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2447         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2448         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2449       </files>
2450     </component>
2451     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2452       <description>System and Startup for Generic Arm SC300 device</description>
2453       <files>
2454         <!-- include folder / device header file -->
2455         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2456         <!-- startup / system file -->
2457         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2458         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2459         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2460       </files>
2461     </component>
2462
2463     <!-- ARMv8MBL -->
2464     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2465       <description>System and Startup for Generic Armv8-M Baseline device</description>
2466       <files>
2467         <!-- include folder / device header file -->
2468         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2469         <!-- startup / system file -->
2470         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2471         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2472         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2473         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2474         <!-- SAU configuration -->
2475         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2476       </files>
2477     </component>
2478     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2479       <description>System and Startup for Generic Armv8-M Baseline device</description>
2480       <files>
2481         <!-- include folder / device header file -->
2482         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2483         <!-- startup / system file -->
2484         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2485         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2486         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2487         <!-- SAU configuration -->
2488         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2489       </files>
2490     </component>
2491
2492     <!-- ARMv8MML -->
2493     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2494       <description>System and Startup for Generic Armv8-M Mainline device</description>
2495       <files>
2496         <!-- include folder / device header file -->
2497         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2498         <!-- startup / system file -->
2499         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2500         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2501         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2502         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2503         <!-- SAU configuration -->
2504         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2505       </files>
2506     </component>
2507     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2508       <description>System and Startup for Generic Armv8-M Mainline device</description>
2509       <files>
2510         <!-- include folder / device header file -->
2511         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2512         <!-- startup / system file -->
2513         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2514         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2515         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2516         <!-- SAU configuration -->
2517         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2518       </files>
2519     </component>
2520
2521     <!-- Cortex-A5 -->
2522     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2523       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2524       <files>
2525         <!-- include folder / device header file -->
2526         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2527         <!-- startup / system / mmu files -->
2528         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2529         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2530         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2531         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2532         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2533         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2534         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2535         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2536         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2537         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2538         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2539         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2540
2541       </files>
2542     </component>
2543
2544     <!-- Cortex-A7 -->
2545     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2546       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2547       <files>
2548         <!-- include folder / device header file -->
2549         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2550         <!-- startup / system / mmu files -->
2551         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2552         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2553         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2554         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2555         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2556         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2557         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2558         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2559         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2560         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2561         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2562         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2563       </files>
2564     </component>
2565
2566     <!-- Cortex-A9 -->
2567     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2568       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2569       <files>
2570         <!-- include folder / device header file -->
2571         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2572         <!-- startup / system / mmu files -->
2573         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2574         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2575         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2576         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2577         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2578         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2579         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2580         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2581         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2582         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2583         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2584         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2585       </files>
2586     </component>
2587
2588     <!-- IRQ Controller -->
2589     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2590       <description>IRQ Controller implementation using GIC</description>
2591       <files>
2592         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2593       </files>
2594     </component>
2595
2596     <!-- OS Tick -->
2597     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2598       <description>OS Tick implementation using Private Timer</description>
2599       <files>
2600         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2601       </files>
2602     </component>
2603
2604     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2605       <description>OS Tick implementation using Generic Physical Timer</description>
2606       <files>
2607         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2608       </files>
2609     </component>
2610
2611     <!-- CMSIS-DSP component -->
2612     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2613       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2614       <files>
2615         <!-- CPU independent -->
2616         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2617         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
2618
2619         <!-- CPU and Compiler dependent -->
2620         <!-- ARMCC -->
2621         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2622         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2623         <file category="library" condition="CM1_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2624         <file category="library" condition="CM1_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2625         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2626         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2627         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2628         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2629         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2630         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2631         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2632         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2633         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2634         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2635         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2636         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2637
2638         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2639         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2640         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2641         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2642         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2643         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2644         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2645         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2646         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2647         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2648         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
2649         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
2650
2651         <!-- GCC -->
2652         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2653         <file category="library" condition="CM1_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2654         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2655         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2656         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
2657         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2658         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2659         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2660
2661         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2662         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2663         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2664         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2665         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2666         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2667         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2668         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2669         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2670         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2671         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
2672         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
2673
2674         <!-- IAR -->
2675         <file category="library" condition="CM0_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2676         <file category="library" condition="CM0_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2677         <file category="library" condition="CM1_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2678         <file category="library" condition="CM1_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2679         <file category="library" condition="CM3_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2680         <file category="library" condition="CM3_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2681         <file category="library" condition="CM4_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2682         <file category="library" condition="CM4_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2683         <file category="library" condition="CM4_FP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2684         <file category="library" condition="CM4_FP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2685         <file category="library" condition="CM7_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2686         <file category="library" condition="CM7_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2687         <file category="library" condition="CM7_DP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2688         <file category="library" condition="CM7_DP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2689         <file category="library" condition="CM7_SP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
2690         <file category="library" condition="CM7_SP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
2691
2692         <file category="library" condition="CM23_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2693         <file category="library" condition="CM33_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2694         <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2695         <file category="library" condition="CM33_FP_LE_IAR"           name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2696         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"    name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
2697         <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
2698         <!--file category="library" condition="CM33_DSP_DP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
2699         <file category="library" condition="ARMv8MBL_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2700         <file category="library" condition="ARMv8MML_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
2701         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2702         <file category="library" condition="ARMv8MML_FP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/>
2703         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
2704         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
2705         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
2706
2707       </files>
2708     </component>
2709
2710     <!-- CMSIS-NN component -->
2711     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.0.0" condition="CMSIS NN">
2712       <description>CMSIS-NN Neural Network Library</description>
2713       <files>
2714         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2715         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2716
2717         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2718         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2719         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2720         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2721
2722         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2723         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2724         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2725         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2726         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2727         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2728         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2729         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2730         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2731         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
2732         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2733         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2734
2735         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2736         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2737         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2738         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2739         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2740         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2741
2742         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2743         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2744         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2745         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
2746         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
2747
2748         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2749
2750         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2751         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2752       </files>
2753     </component>
2754
2755     <!-- CMSIS-RTOS Keil RTX component -->
2756     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2757       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2758       <RTE_Components_h>
2759         <!-- the following content goes into file 'RTE_Components.h' -->
2760         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2761         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2762       </RTE_Components_h>
2763       <files>
2764         <!-- CPU independent -->
2765         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2766         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2767         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2768
2769         <!-- RTX templates -->
2770         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2771         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2772         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2773         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2774         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2775         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2776         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2777         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2778         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2779         <!-- tool-chain specific template file -->
2780         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2781         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2782         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2783
2784         <!-- CPU and Compiler dependent -->
2785         <!-- ARMCC -->
2786         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2787         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2788         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2789         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2790         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2791         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2792         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2793         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2794         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2795         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2796         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2797         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2798         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2799         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2800         <!-- GCC -->
2801         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2802         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2803         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2804         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2805         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2806         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2807         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2808         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2809         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2810         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2811         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2812         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2813         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2814         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2815         <!-- IAR -->
2816         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2817         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2818         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2819         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2820         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2821         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2822         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2823         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2824         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2825         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2826         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2827         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2828         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2829         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2830       </files>
2831     </component>
2832     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2833     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2834       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2835       <RTE_Components_h>
2836         <!-- the following content goes into file 'RTE_Components.h' -->
2837         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2838         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2839       </RTE_Components_h>
2840       <files>
2841         <!-- CPU independent -->
2842         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2843         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2844         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2845
2846         <!-- RTX templates -->
2847         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2848         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2849         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2850         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2851         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2852         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2853         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2854         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2855         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2856         <!-- tool-chain specific template file -->
2857         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2858         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2859         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2860
2861         <!-- CPU and Compiler dependent -->
2862         <!-- ARMCC -->
2863         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2864         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2865         <!-- GCC -->
2866         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2867         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2868         <!-- IAR -->
2869       </files>
2870     </component>
2871
2872     <!-- CMSIS-RTOS Keil RTX5 component -->
2873     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.4.0" Capiversion="1.0.0" condition="RTOS RTX5">
2874       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2875       <RTE_Components_h>
2876         <!-- the following content goes into file 'RTE_Components.h' -->
2877         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2878         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2879       </RTE_Components_h>
2880       <files>
2881         <!-- RTX header file -->
2882         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2883         <!-- RTX compatibility module for API V1 -->
2884         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2885       </files>
2886     </component>
2887
2888     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2889     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
2890       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
2891       <RTE_Components_h>
2892         <!-- the following content goes into file 'RTE_Components.h' -->
2893         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2894         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2895       </RTE_Components_h>
2896       <files>
2897         <!-- RTX documentation -->
2898         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2899
2900         <!-- RTX header files -->
2901         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2902
2903         <!-- RTX configuration -->
2904         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2905         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2906
2907         <!-- RTX templates -->
2908         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2909         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2910         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2911         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2912         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2913         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2914         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2915         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2916         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2917         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2918
2919         <!-- RTX library configuration -->
2920         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2921
2922         <!-- RTX libraries (CPU and Compiler dependent) -->
2923         <!-- ARMCC -->
2924         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2925         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2926         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2927         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2928         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2929         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2930         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2931         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2932         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2933         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2934         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2935         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2936         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2937         <!-- GCC -->
2938         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2939         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2940         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2941         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2942         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2943         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2944         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2945         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2946         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2947         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2948         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2949         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2950         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2951         <!-- IAR -->
2952         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2953         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2954         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2955         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2956         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2957         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2958         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2959       </files>
2960     </component>
2961     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
2962       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
2963       <RTE_Components_h>
2964         <!-- the following content goes into file 'RTE_Components.h' -->
2965         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2966         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2967         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2968       </RTE_Components_h>
2969       <files>
2970         <!-- RTX documentation -->
2971         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2972
2973         <!-- RTX header files -->
2974         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2975
2976         <!-- RTX configuration -->
2977         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
2978         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2979
2980         <!-- RTX templates -->
2981         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2982         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2983         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2984         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2985         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2986         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2987         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2988         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2989         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2990         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2991
2992         <!-- RTX library configuration -->
2993         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2994
2995         <!-- RTX libraries (CPU and Compiler dependent) -->
2996         <!-- ARMCC -->
2997         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2998         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2999         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3000         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3001         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3002         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3003         <!-- GCC -->
3004         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3005         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3006         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3007         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3008         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3009         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3010       </files>
3011     </component>
3012     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5">
3013       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3014       <RTE_Components_h>
3015         <!-- the following content goes into file 'RTE_Components.h' -->
3016         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3017         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3018         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3019       </RTE_Components_h>
3020       <files>
3021         <!-- RTX documentation -->
3022         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3023
3024         <!-- RTX header files -->
3025         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3026
3027         <!-- RTX configuration -->
3028         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3029         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3030
3031         <!-- RTX templates -->
3032         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3033         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3034         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3035         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3036         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3037         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3038         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3039         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3040         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3041         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3042
3043         <!-- RTX sources (core) -->
3044         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3045         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3046         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3047         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3048         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3049         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3050         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3051         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3052         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3053         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3054         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3055         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3056         <!-- RTX sources (library configuration) -->
3057         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3058         <!-- RTX sources (handlers ARMCC) -->
3059         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3060         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3061         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3062         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3063         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3064         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3065         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3066         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3067         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3068         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3069         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3070         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3071         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3072         <!-- RTX sources (handlers GCC) -->
3073         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3074         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3075         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3076         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3077         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3078         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3079         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3080         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3081         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3082         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3083         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3084         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3085         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3086         <!-- RTX sources (handlers IAR) -->
3087         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3088         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3089         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3090         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3091         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3092         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3093         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3094         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3095         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3096         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3097         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3098         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3099         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3100         <!-- OS Tick (SysTick) -->
3101         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3102       </files>
3103     </component>
3104     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3105       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3106       <RTE_Components_h>
3107         <!-- the following content goes into file 'RTE_Components.h' -->
3108         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3109         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3110         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3111       </RTE_Components_h>
3112       <files>
3113         <!-- RTX documentation -->
3114         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3115
3116         <!-- RTX header files -->
3117         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3118
3119         <!-- RTX configuration -->
3120         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3121         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3122
3123         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3124
3125         <!-- RTX templates -->
3126         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3127         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3128         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3129         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3130         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3131         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3132         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3133         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3134         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3135         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3136
3137         <!-- RTX sources (core) -->
3138         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3139         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3140         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3141         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3142         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3143         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3144         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3145         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3146         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3147         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3148         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3149         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3150         <!-- RTX sources (library configuration) -->
3151         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3152         <!-- RTX sources (handlers ARMCC) -->
3153         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3154         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3155         <!-- RTX sources (handlers GCC) -->
3156         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3157         <!-- RTX sources (handlers IAR) -->
3158         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3159       </files>
3160     </component>
3161     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.4.0" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3162       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3163       <RTE_Components_h>
3164         <!-- the following content goes into file 'RTE_Components.h' -->
3165         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3166         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3167         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3168         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3169       </RTE_Components_h>
3170       <files>
3171         <!-- RTX documentation -->
3172         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3173
3174         <!-- RTX header files -->
3175         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3176
3177         <!-- RTX configuration -->
3178         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.4.0"/>
3179         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3180
3181         <!-- RTX templates -->
3182         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3183         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3184         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3185         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3186         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3187         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3188         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3189         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3190         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3191         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3192
3193         <!-- RTX sources (core) -->
3194         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3195         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3196         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3197         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3198         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3199         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3200         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3201         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3202         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3203         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3204         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3205         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3206         <!-- RTX sources (library configuration) -->
3207         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3208         <!-- RTX sources (ARMCC handlers) -->
3209         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3210         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3211         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3212         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3213         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3214         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3215         <!-- RTX sources (GCC handlers) -->
3216         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3217         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3218         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3219         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3220         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3221         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3222         <!-- RTX sources (IAR handlers) -->
3223         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3224         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3225         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3226         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3227         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3228         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3229         <!-- OS Tick (SysTick) -->
3230         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3231       </files>
3232     </component>
3233
3234   </components>
3235
3236   <boards>
3237     <board name="uVision Simulator" vendor="Keil">
3238       <description>uVision Simulator</description>
3239       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3240       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3241       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3242       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3243       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3244       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3245       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3246       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3247       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3248       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3249       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3250       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3251       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3252       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3253       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3254       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3255       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3256       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3257       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3258       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3259     </board>
3260
3261     <board name="Fixed Virtual Platform" vendor="ARM">
3262       <description>Fixed Virtual Platform</description>
3263       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
3264       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
3265       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
3266     </board>
3267   </boards>
3268
3269   <examples>
3270     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3271       <description>DSP_Lib Class Marks example</description>
3272       <board name="uVision Simulator" vendor="Keil"/>
3273       <project>
3274         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3275       </project>
3276       <attributes>
3277         <component Cclass="CMSIS" Cgroup="CORE"/>
3278         <component Cclass="CMSIS" Cgroup="DSP"/>
3279         <component Cclass="Device" Cgroup="Startup"/>
3280         <category>Getting Started</category>
3281       </attributes>
3282     </example>
3283
3284     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3285       <description>DSP_Lib Convolution example</description>
3286       <board name="uVision Simulator" vendor="Keil"/>
3287       <project>
3288         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3289       </project>
3290       <attributes>
3291         <component Cclass="CMSIS" Cgroup="CORE"/>
3292         <component Cclass="CMSIS" Cgroup="DSP"/>
3293         <component Cclass="Device" Cgroup="Startup"/>
3294         <category>Getting Started</category>
3295       </attributes>
3296     </example>
3297
3298     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3299       <description>DSP_Lib Dotproduct example</description>
3300       <board name="uVision Simulator" vendor="Keil"/>
3301       <project>
3302         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3303       </project>
3304       <attributes>
3305         <component Cclass="CMSIS" Cgroup="CORE"/>
3306         <component Cclass="CMSIS" Cgroup="DSP"/>
3307         <component Cclass="Device" Cgroup="Startup"/>
3308         <category>Getting Started</category>
3309       </attributes>
3310     </example>
3311
3312     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3313       <description>DSP_Lib FFT Bin example</description>
3314       <board name="uVision Simulator" vendor="Keil"/>
3315       <project>
3316         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3317       </project>
3318       <attributes>
3319         <component Cclass="CMSIS" Cgroup="CORE"/>
3320         <component Cclass="CMSIS" Cgroup="DSP"/>
3321         <component Cclass="Device" Cgroup="Startup"/>
3322         <category>Getting Started</category>
3323       </attributes>
3324     </example>
3325
3326     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3327       <description>DSP_Lib FIR example</description>
3328       <board name="uVision Simulator" vendor="Keil"/>
3329       <project>
3330         <environment name="uv" load="arm_fir_example.uvprojx"/>
3331       </project>
3332       <attributes>
3333         <component Cclass="CMSIS" Cgroup="CORE"/>
3334         <component Cclass="CMSIS" Cgroup="DSP"/>
3335         <component Cclass="Device" Cgroup="Startup"/>
3336         <category>Getting Started</category>
3337       </attributes>
3338     </example>
3339
3340     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3341       <description>DSP_Lib Graphic Equalizer example</description>
3342       <board name="uVision Simulator" vendor="Keil"/>
3343       <project>
3344         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3345       </project>
3346       <attributes>
3347         <component Cclass="CMSIS" Cgroup="CORE"/>
3348         <component Cclass="CMSIS" Cgroup="DSP"/>
3349         <component Cclass="Device" Cgroup="Startup"/>
3350         <category>Getting Started</category>
3351       </attributes>
3352     </example>
3353
3354     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3355       <description>DSP_Lib Linear Interpolation example</description>
3356       <board name="uVision Simulator" vendor="Keil"/>
3357       <project>
3358         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3359       </project>
3360       <attributes>
3361         <component Cclass="CMSIS" Cgroup="CORE"/>
3362         <component Cclass="CMSIS" Cgroup="DSP"/>
3363         <component Cclass="Device" Cgroup="Startup"/>
3364         <category>Getting Started</category>
3365       </attributes>
3366     </example>
3367
3368     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3369       <description>DSP_Lib Matrix example</description>
3370       <board name="uVision Simulator" vendor="Keil"/>
3371       <project>
3372         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3373       </project>
3374       <attributes>
3375         <component Cclass="CMSIS" Cgroup="CORE"/>
3376         <component Cclass="CMSIS" Cgroup="DSP"/>
3377         <component Cclass="Device" Cgroup="Startup"/>
3378         <category>Getting Started</category>
3379       </attributes>
3380     </example>
3381
3382     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3383       <description>DSP_Lib Signal Convergence example</description>
3384       <board name="uVision Simulator" vendor="Keil"/>
3385       <project>
3386         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3387       </project>
3388       <attributes>
3389         <component Cclass="CMSIS" Cgroup="CORE"/>
3390         <component Cclass="CMSIS" Cgroup="DSP"/>
3391         <component Cclass="Device" Cgroup="Startup"/>
3392         <category>Getting Started</category>
3393       </attributes>
3394     </example>
3395
3396     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3397       <description>DSP_Lib Sinus/Cosinus example</description>
3398       <board name="uVision Simulator" vendor="Keil"/>
3399       <project>
3400         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3401       </project>
3402       <attributes>
3403         <component Cclass="CMSIS" Cgroup="CORE"/>
3404         <component Cclass="CMSIS" Cgroup="DSP"/>
3405         <component Cclass="Device" Cgroup="Startup"/>
3406         <category>Getting Started</category>
3407       </attributes>
3408     </example>
3409
3410     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3411       <description>DSP_Lib Variance example</description>
3412       <board name="uVision Simulator" vendor="Keil"/>
3413       <project>
3414         <environment name="uv" load="arm_variance_example.uvprojx"/>
3415       </project>
3416       <attributes>
3417         <component Cclass="CMSIS" Cgroup="CORE"/>
3418         <component Cclass="CMSIS" Cgroup="DSP"/>
3419         <component Cclass="Device" Cgroup="Startup"/>
3420         <category>Getting Started</category>
3421       </attributes>
3422     </example>
3423
3424     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3425       <description>Neural Network CIFAR10 example</description>
3426       <board name="uVision Simulator" vendor="Keil"/>
3427       <project>
3428         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3429       </project>
3430       <attributes>
3431         <component Cclass="CMSIS" Cgroup="CORE"/>
3432         <component Cclass="CMSIS" Cgroup="DSP"/>
3433         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3434         <component Cclass="Device" Cgroup="Startup"/>
3435         <category>Getting Started</category>
3436       </attributes>
3437     </example>
3438
3439     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
3440       <description>Neural Network GRU example</description>
3441       <board name="uVision Simulator" vendor="Keil"/>
3442       <project>
3443         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3444       </project>
3445       <attributes>
3446         <component Cclass="CMSIS" Cgroup="CORE"/>
3447         <component Cclass="CMSIS" Cgroup="DSP"/>
3448         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3449         <component Cclass="Device" Cgroup="Startup"/>
3450         <category>Getting Started</category>
3451       </attributes>
3452     </example>
3453
3454     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3455       <description>CMSIS-RTOS2 Blinky example</description>
3456       <board name="uVision Simulator" vendor="Keil"/>
3457       <project>
3458         <environment name="uv" load="Blinky.uvprojx"/>
3459       </project>
3460       <attributes>
3461         <component Cclass="CMSIS" Cgroup="CORE"/>
3462         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3463         <component Cclass="Device" Cgroup="Startup"/>
3464         <category>Getting Started</category>
3465       </attributes>
3466     </example>
3467
3468     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3469       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3470       <board name="uVision Simulator" vendor="Keil"/>
3471       <project>
3472         <environment name="uv" load="Blinky.uvprojx"/>
3473       </project>
3474       <attributes>
3475         <component Cclass="CMSIS" Cgroup="CORE"/>
3476         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3477         <component Cclass="Device" Cgroup="Startup"/>
3478         <category>Getting Started</category>
3479       </attributes>
3480     </example>
3481
3482     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3483       <description>CMSIS-RTOS2 Message Queue Example</description>
3484       <board name="uVision Simulator" vendor="Keil"/>
3485       <project>
3486         <environment name="uv" load="MsqQueue.uvprojx"/>
3487       </project>
3488       <attributes>
3489         <component Cclass="CMSIS" Cgroup="CORE"/>
3490         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3491         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3492         <component Cclass="Device" Cgroup="Startup"/>
3493         <category>Getting Started</category>
3494       </attributes>
3495     </example>
3496
3497     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3498       <description>CMSIS-RTOS2 Memory Pool Example</description>
3499       <board name="Fixed Virtual Platform" vendor="ARM"/>
3500       <project>
3501         <environment name="uv" load="MemPool.uvprojx"/>
3502       </project>
3503       <attributes>
3504         <component Cclass="CMSIS" Cgroup="CORE"/>
3505         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3506         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3507         <component Cclass="Device" Cgroup="Startup"/>
3508         <category>Getting Started</category>
3509       </attributes>
3510     </example>
3511
3512     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3513       <description>Bare-metal secure/non-secure example without RTOS</description>
3514       <board name="uVision Simulator" vendor="Keil"/>
3515       <project>
3516         <environment name="uv" load="NoRTOS.uvmpw"/>
3517       </project>
3518       <attributes>
3519         <component Cclass="CMSIS" Cgroup="CORE"/>
3520         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3521         <component Cclass="Device" Cgroup="Startup"/>
3522         <category>Getting Started</category>
3523       </attributes>
3524     </example>
3525
3526     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3527       <description>Secure/non-secure RTOS example with thread context management</description>
3528       <board name="uVision Simulator" vendor="Keil"/>
3529       <project>
3530         <environment name="uv" load="RTOS.uvmpw"/>
3531       </project>
3532       <attributes>
3533         <component Cclass="CMSIS" Cgroup="CORE"/>
3534         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3535         <component Cclass="Device" Cgroup="Startup"/>
3536         <category>Getting Started</category>
3537       </attributes>
3538     </example>
3539
3540     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3541       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3542       <board name="uVision Simulator" vendor="Keil"/>
3543       <project>
3544         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3545       </project>
3546       <attributes>
3547         <component Cclass="CMSIS" Cgroup="CORE"/>
3548         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3549         <component Cclass="Device" Cgroup="Startup"/>
3550         <category>Getting Started</category>
3551       </attributes>
3552     </example>
3553
3554   </examples>
3555
3556 </package>