begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.7.0-dev3">
  12       Active development...
  13       CMSIS-Core(M):
  14         - L1 Cache functions for Armv7-M and later
  15       Devices:
  16         - Include L1 Cache functions  in ARMv8MML/ARMv81MML devices
  17     </release>
  18     <release version="5.7.0-dev2">
  19       CMSIS-Core(M):
  20         - Cortex-M55 cpu support
  21         - Cortex-M55 core header file
  22         - PMU header file (place holder)
  23       Devices:
  24         - ARMCM55 device
  25     </release>
  26     <release version="5.7.0-dev1">
  27       Active development...
  28       CMSIS-Core(M): 5.4.0 (see revision history for details)
  29          - Enhanced MVE support for Armv8.1-MML
  30       CMSIS-RTOS2:
  31         - RTX 5.5.2 (see revision history for details)
  32       CMSIS-Driver: 2.8.0
  33         - removed volatile from status related typedefs in APIs
  34         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  35       CMSIS-Pack:
  36         - added custom attribute to components that require custom implementation
  37       Devices:
  38         - ARMv81MML startup code recognizing __MVE_USED macro
  39         - Refactored vector table references for all Cortex-M devices
  40     </release>
  41     <release version="5.6.0" date="2019-07-10">
  42       CMSIS-Core(M): 5.3.0 (see revision history for details)
  43         - Added provisions for compiler-independent C startup code.
  44       CMSIS-Core(A): 1.1.4 (see revision history for details)
  45         - Fixed __FPU_Enable.
  46       CMSIS-DSP: 1.7.0 (see revision history for details)
  47         - New Neon versions of f32 functions
  48         - Python wrapper
  49         - Preliminary cmake build
  50         - Compilation flags for FFTs
  51         - Changes to arm_math.h
  52       CMSIS-NN: 1.2.0 (see revision history for details)
  53         - New function for depthwise convolution with asymmetric quantization.
  54         - New support functions for requantization.
  55       CMSIS-RTOS:
  56         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  57       CMSIS-RTOS2:
  58         - RTX 5.5.1 (see revision history for details)
  59       CMSIS-Driver: 2.7.1
  60         - WiFi Interface API 1.0.0
  61       Devices:
  62         - Generalized C startup code for all Cortex-M familiy devices.
  63         - Updated Cortex-A default memory regions and MMU configurations
  64         - Moved Cortex-A memory and system config files to avoid include path issues
  65     </release>
  66     <release version="5.5.1" date="2019-03-20">
  67       The following folders are deprecated
  68         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  69
  70       CMSIS-Core(M): 5.2.1 (see revision history for details)
  71         - Fixed compilation issue in cmsis_armclang_ltm.h
  72     </release>
  73     <release version="5.5.0" date="2019-03-18">
  74       The following folders have been removed:
  75         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  76         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  77       The following folders are deprecated
  78         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  79
  80       CMSIS-Core(M): 5.2.0 (see revision history for details)
  81         - Reworked Stack/Heap configuration for ARM startup files.
  82         - Added Cortex-M35P device support.
  83         - Added generic Armv8.1-M Mainline device support.
  84       CMSIS-Core(A): 1.1.3 (see revision history for details)
  85       CMSIS-DSP: 1.6.0 (see revision history for details)
  86         - reworked DSP library source files
  87         - reworked DSP library documentation
  88         - Changed DSP folder structure
  89         - moved DSP libraries to folder ./DSP/Lib
  90         - ARM DSP Libraries are built with ARMCLANG
  91         - Added DSP Libraries Source variant
  92       CMSIS-RTOS2:
  93         - RTX 5.5.0 (see revision history for details)
  94       CMSIS-Driver: 2.7.0
  95         - Added WiFi Interface API 1.0.0-beta
  96         - Added components for project specific driver implementations
  97       CMSIS-Pack: 1.6.0 (see revision history for details)
  98       Devices:
  99         - Added Cortex-M35P and ARMv81MML device templates.
 100         - Fixed C-Startup Code for GCC (aligned with other compilers)
 101       Utilities:
 102         - SVDConv 3.3.25
 103         - PackChk 1.3.82
 104     </release>
 105     <release version="5.4.0" date="2018-08-01">
 106       Aligned pack structure with repository.
 107       The following folders are deprecated:
 108         - CMSIS/Include/
 109         - CMSIS/DSP_Lib/
 110
 111       CMSIS-Core(M): 5.1.2 (see revision history for details)
 112         - Added Cortex-M1 support (beta).
 113       CMSIS-Core(A): 1.1.2 (see revision history for details)
 114       CMSIS-NN: 1.1.0
 115         - Added new math functions.
 116       CMSIS-RTOS2:
 117         - API 2.1.3 (see revision history for details)
 118         - RTX 5.4.0 (see revision history for details)
 119           * Updated exception handling on Cortex-A
 120       CMSIS-Driver:
 121         - Flash Driver API V2.2.0
 122       Utilities:
 123         - SVDConv 3.3.21
 124         - PackChk 1.3.71
 125     </release>
 126     <release version="5.3.0" date="2018-02-22">
 127       Updated Arm company brand.
 128       CMSIS-Core(M): 5.1.1 (see revision history for details)
 129       CMSIS-Core(A): 1.1.1 (see revision history for details)
 130       CMSIS-DAP: 2.0.0 (see revision history for details)
 131       CMSIS-NN: 1.0.0
 132         - Initial contribution of the bare metal Neural Network Library.
 133       CMSIS-RTOS2:
 134         - RTX 5.3.0 (see revision history for details)
 135         - OS Tick API 1.0.1
 136     </release>
 137     <release version="5.2.0" date="2017-11-16">
 138       CMSIS-Core(M): 5.1.0 (see revision history for details)
 139         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 140         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 141       CMSIS-Core(A): 1.1.0 (see revision history for details)
 142         - Added compiler_iccarm.h.
 143         - Added additional access functions for physical timer.
 144       CMSIS-DAP: 1.2.0 (see revision history for details)
 145       CMSIS-DSP: 1.5.2 (see revision history for details)
 146       CMSIS-Driver: 2.6.0 (see revision history for details)
 147         - CAN Driver API V1.2.0
 148         - NAND Driver API V2.3.0
 149       CMSIS-RTOS:
 150         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 151       CMSIS-RTOS2:
 152         - API 2.1.2 (see revision history for details)
 153         - RTX 5.2.3 (see revision history for details)
 154       Devices:
 155         - Added GCC startup and linker script for Cortex-A9.
 156         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 157         - Added IAR startup code for Cortex-A9
 158     </release>
 159     <release version="5.1.1" date="2017-09-19">
 160       CMSIS-RTOS2:
 161       - RTX 5.2.1 (see revision history for details)
 162     </release>
 163     <release version="5.1.0" date="2017-08-04">
 164       CMSIS-Core(M): 5.0.2 (see revision history for details)
 165       - Changed Version Control macros to be core agnostic.
 166       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 167       CMSIS-Core(A): 1.0.0 (see revision history for details)
 168       - Initial release
 169       - IRQ Controller API 1.0.0
 170       CMSIS-Driver: 2.05 (see revision history for details)
 171       - All typedefs related to status have been made volatile.
 172       CMSIS-RTOS2:
 173       - API 2.1.1 (see revision history for details)
 174       - RTX 5.2.0 (see revision history for details)
 175       - OS Tick API 1.0.0
 176       CMSIS-DSP: 1.5.2 (see revision history for details)
 177       - Fixed GNU Compiler specific diagnostics.
 178       CMSIS-Pack: 1.5.0 (see revision history for details)
 179       - added System Description File (*.SDF) Format
 180       CMSIS-Zone: 0.0.1 (Preview)
 181       - Initial specification draft
 182     </release>
 183     <release version="5.0.1" date="2017-02-03">
 184       Package Description:
 185       - added taxonomy for Cclass RTOS
 186       CMSIS-RTOS2:
 187       - API 2.1   (see revision history for details)
 188       - RTX 5.1.0 (see revision history for details)
 189       CMSIS-Core: 5.0.1 (see revision history for details)
 190       - Added __PACKED_STRUCT macro
 191       - Added uVisior support
 192       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 193       - Updated template for secure main function (main_s.c)
 194       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 195       CMSIS-DSP: 1.5.1 (see revision history for details)
 196       - added ARMv8M DSP libraries.
 197       CMSIS-Pack:1.4.9 (see revision history for details)
 198       - added Pack Index File specification and schema file
 199     </release>
 200     <release version="5.0.0" date="2016-11-11">
 201       Changed open source license to Apache 2.0
 202       CMSIS_Core:
 203        - Added support for Cortex-M23 and Cortex-M33.
 204        - Added ARMv8-M device configurations for mainline and baseline.
 205        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 206        - Added cmsis_compiler.h to unify compiler behaviour.
 207        - Updated function SCB_EnableICache (for Cortex-M7).
 208        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 209       CMSIS-RTOS:
 210         - bug fix in RTX 4.82 (see revision history for details)
 211       CMSIS-RTOS2:
 212         - new API including compatibility layer to CMSIS-RTOS
 213         - reference implementation based on RTX5
 214         - supports all Cortex-M variants including TrustZone for ARMv8-M
 215       CMSIS-SVD:
 216        - reworked SVD format documentation
 217        - removed SVD file database documentation as SVD files are distributed in packs
 218        - updated SVDConv for Win32 and Linux
 219       CMSIS-DSP:
 220        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 221        - Added DSP libraries build projects to CMSIS pack.
 222     </release>
 223     <release version="4.5.0" date="2015-10-28">
 224       - CMSIS-Core     4.30.0  (see revision history for details)
 225       - CMSIS-DAP      1.1.0   (unchanged)
 226       - CMSIS-Driver   2.04.0  (see revision history for details)
 227       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 228       - CMSIS-Pack     1.4.1   (see revision history for details)
 229       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 230       - CMSIS-SVD      1.3.1   (see revision history for details)
 231     </release>
 232     <release version="4.4.0" date="2015-09-11">
 233       - CMSIS-Core     4.20   (see revision history for details)
 234       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 235       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 236       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 237       - CMSIS-RTOS
 238         -- API         1.02   (unchanged)
 239         -- RTX         4.79   (see revision history for details)
 240       - CMSIS-SVD      1.3.0  (see revision history for details)
 241       - CMSIS-DAP      1.1.0  (extended with SWO support)
 242     </release>
 243     <release version="4.3.0" date="2015-03-20">
 244       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 245       - CMSIS-DSP      1.4.5  (see revision history for details)
 246       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 247       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 248       - CMSIS-RTOS
 249         -- API         1.02   (unchanged)
 250         -- RTX         4.78   (see revision history for details)
 251       - CMSIS-SVD      1.2    (unchanged)
 252     </release>
 253     <release version="4.2.0" date="2014-09-24">
 254       Adding Cortex-M7 support
 255       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 256       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 257       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 258       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 259       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 260     </release>
 261     <release version="4.1.1" date="2014-06-30">
 262       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 263     </release>
 264     <release version="4.1.0" date="2014-06-12">
 265       - CMSIS-Driver   2.02  (incompatible update)
 266       - CMSIS-Pack     1.3   (see revision history for details)
 267       - CMSIS-DSP      1.4.2 (unchanged)
 268       - CMSIS-Core     3.30  (unchanged)
 269       - CMSIS-RTOS RTX 4.74  (unchanged)
 270       - CMSIS-RTOS API 1.02  (unchanged)
 271       - CMSIS-SVD      1.10  (unchanged)
 272       PACK:
 273       - removed G++ specific files from PACK
 274       - added Component Startup variant "C Startup"
 275       - added Pack Checking Utility
 276       - updated conditions to reflect tool-chain dependency
 277       - added Taxonomy for Graphics
 278       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 279     </release>
 280     <!-- release version="4.0.0">
 281       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 282       - CMSIS-Pack     1.1   Preliminary
 283       - CMSIS-DSP      1.4.2 (see revision history for details)
 284       - CMSIS-Core     3.30  (see revision history for details)
 285       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 286       - CMSIS-RTOS API 1.02  (unchanged)
 287       - CMSIS-SVD      1.10  (unchanged)
 288     </release -->
 289     <release version="3.20.4" date="2014-02-20">
 290       - CMSIS-RTOS 4.74 (see revision history for details)
 291       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 292     </release>
 293     <!-- release version="3.20.3">
 294       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 295       - CMSIS-RTOS 4.73 (see revision history for details)
 296     </release -->
 297     <!-- release version="3.20.2">
 298       - CMSIS-Pack documentation has been added
 299       - CMSIS-Drivers header and documentation have been added to PACK
 300       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 301     </release -->
 302     <!-- release version="3.20.1">
 303       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 304       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 305     </release -->
 306     <!-- release version="3.20.0">
 307       The software portions that are deployed in the application program are now under a BSD license which allows usage
 308       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 309       The individual components have been update as listed below:
 310       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 311       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 312       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 313       - CMSIS-SVD is unchanged.
 314     </release -->
 315   </releases>
 316
 317   <taxonomy>
 318     <description Cclass="Audio">Software components for audio processing</description>
 319     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 320     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 321     <description Cclass="Compiler">Compiler Software Extensions</description>
 322     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 323     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 324     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 325     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 326     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 327     <description Cclass="File System">File Drive Support and File System</description>
 328     <description Cclass="IoT Client">IoT cloud client connector</description>
 329     <description Cclass="IoT Service">IoT specific services</description>
 330     <description Cclass="IoT Utility">IoT specific software utility</description>
 331     <description Cclass="Graphics">Graphical User Interface</description>
 332     <description Cclass="Network">Network Stack using Internet Protocols</description>
 333     <description Cclass="RTOS">Real-time Operating System</description>
 334     <description Cclass="Security">Encryption for secure communication or storage</description>
 335     <description Cclass="USB">Universal Serial Bus Stack</description>
 336     <description Cclass="Utility">Generic software utility components</description>
 337   </taxonomy>
 338
 339   <devices>
 340     <!-- ******************************  Cortex-M0  ****************************** -->
 341     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 342       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 343       <description>
 344 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 345 - simple, easy-to-use programmers model
 346 - highly efficient ultra-low power operation
 347 - excellent code density
 348 - deterministic, high-performance interrupt handling
 349 - upward compatibility with the rest of the Cortex-M processor family.
 350       </description>
 351       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 352       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 353       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 354       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 355
 356       <device Dname="ARMCM0">
 357         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 358         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 359       </device>
 360     </family>
 361
 362     <!-- ******************************  Cortex-M0P  ****************************** -->
 363     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 364       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 365       <description>
 366 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 367 - simple, easy-to-use programmers model
 368 - highly efficient ultra-low power operation
 369 - excellent code density
 370 - deterministic, high-performance interrupt handling
 371 - upward compatibility with the rest of the Cortex-M processor family.
 372       </description>
 373       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 374       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 375       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 376       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 377
 378       <device Dname="ARMCM0P">
 379         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 380         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 381       </device>
 382
 383       <device Dname="ARMCM0P_MPU">
 384         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 385         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 386       </device>
 387     </family>
 388
 389     <!-- ******************************  Cortex-M1  ****************************** -->
 390     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 391       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 392       <description>
 393 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 394 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 395       </description>
 396       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 397       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 398       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 399       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 400
 401       <device Dname="ARMCM1">
 402         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 403         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 404       </device>
 405     </family>
 406
 407     <!-- ******************************  Cortex-M3  ****************************** -->
 408     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 409       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 410       <description>
 411 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 412 - simple, easy-to-use programmers model
 413 - highly efficient ultra-low power operation
 414 - excellent code density
 415 - deterministic, high-performance interrupt handling
 416 - upward compatibility with the rest of the Cortex-M processor family.
 417       </description>
 418       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 419       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 420       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 421       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 422
 423       <device Dname="ARMCM3">
 424         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 425         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 426       </device>
 427     </family>
 428
 429     <!-- ******************************  Cortex-M4  ****************************** -->
 430     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 431       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 432       <description>
 433 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 434 - simple, easy-to-use programmers model
 435 - highly efficient ultra-low power operation
 436 - excellent code density
 437 - deterministic, high-performance interrupt handling
 438 - upward compatibility with the rest of the Cortex-M processor family.
 439       </description>
 440       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 441       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 442       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 443       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 444
 445       <device Dname="ARMCM4">
 446         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 447         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 448       </device>
 449
 450       <device Dname="ARMCM4_FP">
 451         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 452         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 453       </device>
 454     </family>
 455
 456     <!-- ******************************  Cortex-M7  ****************************** -->
 457     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 458       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 459       <description>
 460 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 461 - simple, easy-to-use programmers model
 462 - highly efficient ultra-low power operation
 463 - excellent code density
 464 - deterministic, high-performance interrupt handling
 465 - upward compatibility with the rest of the Cortex-M processor family.
 466       </description>
 467       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 468       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 469       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 470       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 471
 472       <device Dname="ARMCM7">
 473         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 474         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 475       </device>
 476
 477       <device Dname="ARMCM7_SP">
 478         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 479         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 480       </device>
 481
 482       <device Dname="ARMCM7_DP">
 483         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 484         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 485       </device>
 486     </family>
 487
 488     <!-- ******************************  Cortex-M23  ********************** -->
 489     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 490       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 491       <description>
 492 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 493 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 494 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 495       </description>
 496       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 497       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 498       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 499       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 500       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 501       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 502
 503       <device Dname="ARMCM23">
 504         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 505         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 506       </device>
 507
 508       <device Dname="ARMCM23_TZ">
 509         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 510         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 511       </device>
 512     </family>
 513
 514     <!-- ******************************  Cortex-M33  ****************************** -->
 515     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 516       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 517       <description>
 518 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 519 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 520       </description>
 521       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 522       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 523       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 524       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 525       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 526       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 527
 528       <device Dname="ARMCM33">
 529         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 530         <description>
 531           no DSP Instructions, no Floating Point Unit, no TrustZone
 532         </description>
 533         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 534       </device>
 535
 536       <device Dname="ARMCM33_TZ">
 537         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 538         <description>
 539           no DSP Instructions, no Floating Point Unit, TrustZone
 540         </description>
 541         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 542       </device>
 543
 544       <device Dname="ARMCM33_DSP_FP">
 545         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 546         <description>
 547           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 548         </description>
 549         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 550       </device>
 551
 552       <device Dname="ARMCM33_DSP_FP_TZ">
 553         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 554         <description>
 555           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 556         </description>
 557         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 558       </device>
 559     </family>
 560
 561     <!-- ******************************  Cortex-M35P  ****************************** -->
 562     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 563       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 564       <description>
 565 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 566 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 567       </description>
 568
 569       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 570       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 571       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 572       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 573       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 574       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 575
 576       <device Dname="ARMCM35P">
 577         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 578         <description>
 579           no DSP Instructions, no Floating Point Unit, no TrustZone
 580         </description>
 581         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 582       </device>
 583
 584       <device Dname="ARMCM35P_TZ">
 585         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 586         <description>
 587           no DSP Instructions, no Floating Point Unit, TrustZone
 588         </description>
 589         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 590       </device>
 591
 592       <device Dname="ARMCM35P_DSP_FP">
 593         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 594         <description>
 595           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 596         </description>
 597         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 598       </device>
 599
 600       <device Dname="ARMCM35P_DSP_FP_TZ">
 601         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 602         <description>
 603           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 604         </description>
 605         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 606       </device>
 607     </family>
 608
 609     <!-- ******************************  Cortex-M55  ****************************** -->
 610     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 611       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 612       <description>
 613 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 614 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 615 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 616       </description>
 617
 618       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 619       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 620       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 621       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 622       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 623       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 624
 625       <device Dname="ARMCM55_DSP_DP_MVE_FP_TZARMCM55_DSP_DP_MVE_FP_TZ">
 626         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 627         <description>
 628           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 629         </description>
 630         <compile header="Device/ARM/ARMCM55/Include/ARMCM55_DSP_DP_MVE_FP_TZ.h" define="ARMCM55_DSP_DP_MVE_FP_TZ"/>
 631       </device>
 632     </family>
 633
 634     <!-- ******************************  ARMSC000  ****************************** -->
 635     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 636       <description>
 637 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 638 - simple, easy-to-use programmers model
 639 - highly efficient ultra-low power operation
 640 - excellent code density
 641 - deterministic, high-performance interrupt handling
 642       </description>
 643       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 644       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 645       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 646       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 647
 648       <device Dname="ARMSC000">
 649         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 650         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 651       </device>
 652     </family>
 653
 654     <!-- ******************************  ARMSC300  ****************************** -->
 655     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 656       <description>
 657 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 658 - simple, easy-to-use programmers model
 659 - highly efficient ultra-low power operation
 660 - excellent code density
 661 - deterministic, high-performance interrupt handling
 662       </description>
 663       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 664       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 665       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 666       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 667
 668       <device Dname="ARMSC300">
 669         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 670         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 671       </device>
 672     </family>
 673
 674     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 675     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 676       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 677       <description>
 678 Armv8-M Baseline based device with TrustZone
 679       </description>
 680       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 681       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 682       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 683       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 684       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 685       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 686
 687       <device Dname="ARMv8MBL">
 688         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 689         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 690       </device>
 691     </family>
 692
 693     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 694     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 695       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 696       <description>
 697 Armv8-M Mainline based device with TrustZone
 698       </description>
 699       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 700       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 701       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 702       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 703       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 704       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 705
 706       <device Dname="ARMv8MML">
 707         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 708         <description>
 709           no DSP Instructions, no Floating Point Unit, TrustZone
 710         </description>
 711         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 712       </device>
 713
 714       <device Dname="ARMv8MML_DSP">
 715         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 716         <description>
 717           DSP Instructions, no Floating Point Unit, TrustZone
 718         </description>
 719         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 720       </device>
 721
 722       <device Dname="ARMv8MML_SP">
 723         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 724         <description>
 725           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 726         </description>
 727         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 728       </device>
 729
 730       <device Dname="ARMv8MML_DSP_SP">
 731         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 732         <description>
 733           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 734         </description>
 735         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 736       </device>
 737
 738       <device Dname="ARMv8MML_DP">
 739         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 740         <description>
 741           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 742         </description>
 743         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 744       </device>
 745
 746       <device Dname="ARMv8MML_DSP_DP">
 747         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 748         <description>
 749           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 750         </description>
 751         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 752       </device>
 753     </family>
 754
 755     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 756     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 757       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 758       <description>
 759 Armv8.1-M Mainline based device with TrustZone and MVE
 760       </description>
 761       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 762       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 763       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 764       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 765       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 766       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 767
 768
 769       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 770         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 771         <description>
 772           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 773         </description>
 774         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 775       </device>
 776     </family>
 777
 778     <!-- ******************************  Cortex-A5  ****************************** -->
 779     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 780       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 781       <description>
 782 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 783 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 784 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 785       </description>
 786
 787       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 788       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 789       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 790       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 791
 792       <device Dname="ARMCA5">
 793         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 794         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 795       </device>
 796     </family>
 797
 798     <!-- ******************************  Cortex-A7  ****************************** -->
 799     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 800       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 801       <description>
 802 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 803 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 804 an optional integrated GIC, and an optional L2 cache controller.
 805       </description>
 806
 807       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 808       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 809       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 810       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 811
 812       <device Dname="ARMCA7">
 813         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 814         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 815       </device>
 816     </family>
 817
 818     <!-- ******************************  Cortex-A9  ****************************** -->
 819     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 820       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 821       <description>
 822 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 823 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 824 and 8-bit Java bytecodes in Jazelle state.
 825       </description>
 826
 827       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 828       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 829       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 830       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 831
 832       <device Dname="ARMCA9">
 833         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 834         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 835       </device>
 836     </family>
 837   </devices>
 838
 839
 840   <apis>
 841     <!-- CMSIS Device API -->
 842     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 843       <description>Device interrupt controller interface</description>
 844       <files>
 845         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 846       </files>
 847     </api>
 848     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 849       <description>RTOS Kernel system tick timer interface</description>
 850       <files>
 851         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 852       </files>
 853     </api>
 854     <!-- CMSIS-RTOS API -->
 855     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 856       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 857       <files>
 858         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 859       </files>
 860     </api>
 861     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 862       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 863       <files>
 864         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 865         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 866       </files>
 867     </api>
 868     <!-- CMSIS Driver API -->
 869     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 870       <description>USART Driver API for Cortex-M</description>
 871       <files>
 872         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 873         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 874       </files>
 875     </api>
 876     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 877       <description>SPI Driver API for Cortex-M</description>
 878       <files>
 879         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 880         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 881       </files>
 882     </api>
 883     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 884       <description>SAI Driver API for Cortex-M</description>
 885       <files>
 886         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 887         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 888       </files>
 889     </api>
 890     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 891       <description>I2C Driver API for Cortex-M</description>
 892       <files>
 893         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 894         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 895       </files>
 896     </api>
 897     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 898       <description>CAN Driver API for Cortex-M</description>
 899       <files>
 900         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 901         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 902       </files>
 903     </api>
 904     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 905       <description>Flash Driver API for Cortex-M</description>
 906       <files>
 907         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 908         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 909       </files>
 910     </api>
 911     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 912       <description>MCI Driver API for Cortex-M</description>
 913       <files>
 914         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 915         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 916       </files>
 917     </api>
 918     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 919       <description>NAND Flash Driver API for Cortex-M</description>
 920       <files>
 921         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 922         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 923       </files>
 924     </api>
 925     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 926       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 927       <files>
 928         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 929         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 930         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 931       </files>
 932     </api>
 933     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 934       <description>Ethernet MAC Driver API for Cortex-M</description>
 935       <files>
 936         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 937         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 938       </files>
 939     </api>
 940     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 941       <description>Ethernet PHY Driver API for Cortex-M</description>
 942       <files>
 943         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 944         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 945       </files>
 946     </api>
 947     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 948       <description>USB Device Driver API for Cortex-M</description>
 949       <files>
 950         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 951         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 952       </files>
 953     </api>
 954     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
 955       <description>USB Host Driver API for Cortex-M</description>
 956       <files>
 957         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 958         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 959       </files>
 960     </api>
 961     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
 962       <description>WiFi driver</description>
 963       <files>
 964         <file category="doc"  name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 965         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 966       </files>
 967     </api>
 968   </apis>
 969
 970   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 971   <conditions>
 972     <!-- compiler -->
 973     <condition id="ARMCC6">
 974       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 975       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 976     </condition>
 977     <condition id="ARMCC5">
 978       <require Tcompiler="ARMCC" Toptions="AC5"/>
 979     </condition>
 980     <condition id="ARMCC">
 981       <require Tcompiler="ARMCC"/>
 982     </condition>
 983     <condition id="GCC">
 984       <require Tcompiler="GCC"/>
 985     </condition>
 986     <condition id="IAR">
 987       <require Tcompiler="IAR"/>
 988     </condition>
 989     <condition id="ARMCC GCC">
 990       <accept Tcompiler="ARMCC"/>
 991       <accept Tcompiler="GCC"/>
 992     </condition>
 993     <condition id="ARMCC GCC IAR">
 994       <accept Tcompiler="ARMCC"/>
 995       <accept Tcompiler="GCC"/>
 996       <accept Tcompiler="IAR"/>
 997     </condition>
 998
 999     <!-- Arm architecture -->
1000     <condition id="ARMv6-M Device">
1001       <description>Armv6-M architecture based device</description>
1002       <accept Dcore="Cortex-M0"/>
1003       <accept Dcore="Cortex-M1"/>
1004       <accept Dcore="Cortex-M0+"/>
1005       <accept Dcore="SC000"/>
1006     </condition>
1007     <condition id="ARMv7-M Device">
1008       <description>Armv7-M architecture based device</description>
1009       <accept Dcore="Cortex-M3"/>
1010       <accept Dcore="Cortex-M4"/>
1011       <accept Dcore="Cortex-M7"/>
1012       <accept Dcore="SC300"/>
1013     </condition>
1014     <condition id="ARMv8-M Device">
1015       <description>Armv8-M architecture based device</description>
1016       <accept Dcore="ARMV8MBL"/>
1017       <accept Dcore="ARMV8MML"/>
1018       <accept Dcore="ARMV81MML"/>
1019       <accept Dcore="Cortex-M23"/>
1020       <accept Dcore="Cortex-M33"/>
1021       <accept Dcore="Cortex-M35P"/>
1022       <accept Dcore="Cortex-M55"/>
1023     </condition>
1024     <condition id="ARMv8-M TZ Device">
1025       <description>Armv8-M architecture based device with TrustZone</description>
1026       <require condition="ARMv8-M Device"/>
1027       <require Dtz="TZ"/>
1028     </condition>
1029     <condition id="ARMv6_7-M Device">
1030       <description>Armv6_7-M architecture based device</description>
1031       <accept condition="ARMv6-M Device"/>
1032       <accept condition="ARMv7-M Device"/>
1033     </condition>
1034     <condition id="ARMv6_7_8-M Device">
1035       <description>Armv6_7_8-M architecture based device</description>
1036       <accept condition="ARMv6-M Device"/>
1037       <accept condition="ARMv7-M Device"/>
1038       <accept condition="ARMv8-M Device"/>
1039     </condition>
1040     <condition id="ARMv7-A Device">
1041       <description>Armv7-A architecture based device</description>
1042       <accept Dcore="Cortex-A5"/>
1043       <accept Dcore="Cortex-A7"/>
1044       <accept Dcore="Cortex-A9"/>
1045     </condition>
1046
1047     <!-- ARM core -->
1048     <condition id="CM0">
1049       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1050       <accept Dcore="Cortex-M0"/>
1051       <accept Dcore="Cortex-M0+"/>
1052       <accept Dcore="SC000"/>
1053     </condition>
1054     <condition id="CM1">
1055       <description>Cortex-M1</description>
1056       <require Dcore="Cortex-M1"/>
1057     </condition>
1058     <condition id="CM3">
1059       <description>Cortex-M3 or SC300 processor based device</description>
1060       <accept Dcore="Cortex-M3"/>
1061       <accept Dcore="SC300"/>
1062     </condition>
1063     <condition id="CM4">
1064       <description>Cortex-M4 processor based device</description>
1065       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1066     </condition>
1067     <condition id="CM4_FP">
1068       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1069       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1070       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1071       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1072     </condition>
1073     <condition id="CM7">
1074       <description>Cortex-M7 processor based device</description>
1075       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1076     </condition>
1077     <condition id="CM7_FP">
1078       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1079       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1080       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1081     </condition>
1082     <condition id="CM7_SP">
1083       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1084       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1085     </condition>
1086     <condition id="CM7_DP">
1087       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1088       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1089     </condition>
1090     <condition id="CM23">
1091       <description>Cortex-M23 processor based device</description>
1092       <require Dcore="Cortex-M23"/>
1093     </condition>
1094     <condition id="CM33">
1095       <description>Cortex-M33 processor based device</description>
1096       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1097     </condition>
1098     <condition id="CM33_FP">
1099       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1100       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1101     </condition>
1102     <condition id="CM35P">
1103       <description>Cortex-M35P processor based device</description>
1104       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1105     </condition>
1106     <condition id="CM35P_FP">
1107       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1108       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1109     </condition>
1110     <condition id="ARMv8MBL">
1111       <description>Armv8-M Baseline processor based device</description>
1112       <require Dcore="ARMV8MBL"/>
1113     </condition>
1114     <condition id="ARMv8MML">
1115       <description>Armv8-M Mainline processor based device</description>
1116       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1117     </condition>
1118     <condition id="ARMv8MML_FP">
1119       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1120       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1121       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1122     </condition>
1123
1124     <condition id="CM33_NODSP_NOFPU">
1125       <description>CM33, no DSP, no FPU</description>
1126       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1127     </condition>
1128     <condition id="CM33_DSP_NOFPU">
1129       <description>CM33, DSP, no FPU</description>
1130       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1131     </condition>
1132     <condition id="CM33_NODSP_SP">
1133       <description>CM33, no DSP, SP FPU</description>
1134       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1135     </condition>
1136     <condition id="CM33_DSP_SP">
1137       <description>CM33, DSP, SP FPU</description>
1138       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1139     </condition>
1140
1141     <condition id="CM35P_NODSP_NOFPU">
1142       <description>CM35P, no DSP, no FPU</description>
1143       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1144     </condition>
1145     <condition id="CM35P_DSP_NOFPU">
1146       <description>CM35P, DSP, no FPU</description>
1147       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1148     </condition>
1149     <condition id="CM35P_NODSP_SP">
1150       <description>CM35P, no DSP, SP FPU</description>
1151       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1152     </condition>
1153     <condition id="CM35P_DSP_SP">
1154       <description>CM35P, DSP, SP FPU</description>
1155       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1156     </condition>
1157
1158     <condition id="ARMv8MML_NODSP_NOFPU">
1159       <description>Armv8-M Mainline, no DSP, no FPU</description>
1160       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1161     </condition>
1162     <condition id="ARMv8MML_DSP_NOFPU">
1163       <description>Armv8-M Mainline, DSP, no FPU</description>
1164       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1165     </condition>
1166     <condition id="ARMv8MML_NODSP_SP">
1167       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1168       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1169     </condition>
1170     <condition id="ARMv8MML_DSP_SP">
1171       <description>Armv8-M Mainline, DSP, SP FPU</description>
1172       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1173     </condition>
1174
1175     <condition id="CA5_CA9">
1176       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1177       <accept Dcore="Cortex-A5"/>
1178       <accept Dcore="Cortex-A9"/>
1179     </condition>
1180
1181     <condition id="CA7">
1182       <description>Cortex-A7 processor based device</description>
1183       <accept Dcore="Cortex-A7"/>
1184     </condition>
1185
1186     <!-- ARMCC compiler -->
1187     <condition id="CA_ARMCC5">
1188       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1189       <require condition="ARMv7-A Device"/>
1190       <require condition="ARMCC5"/>
1191     </condition>
1192     <condition id="CA_ARMCC6">
1193       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1194       <require condition="ARMv7-A Device"/>
1195       <require condition="ARMCC6"/>
1196     </condition>
1197
1198     <condition id="CM0_ARMCC">
1199       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1200       <require condition="CM0"/>
1201       <require Tcompiler="ARMCC"/>
1202     </condition>
1203     <condition id="CM0_LE_ARMCC">
1204       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1205       <require condition="CM0_ARMCC"/>
1206       <require Dendian="Little-endian"/>
1207     </condition>
1208     <condition id="CM0_BE_ARMCC">
1209       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1210       <require condition="CM0_ARMCC"/>
1211       <require Dendian="Big-endian"/>
1212     </condition>
1213
1214     <condition id="CM1_ARMCC">
1215       <description>Cortex-M1 based device for the Arm Compiler</description>
1216       <require condition="CM1"/>
1217       <require Tcompiler="ARMCC"/>
1218     </condition>
1219     <condition id="CM1_LE_ARMCC">
1220       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1221       <require condition="CM1_ARMCC"/>
1222       <require Dendian="Little-endian"/>
1223     </condition>
1224     <condition id="CM1_BE_ARMCC">
1225       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1226       <require condition="CM1_ARMCC"/>
1227       <require Dendian="Big-endian"/>
1228     </condition>
1229
1230     <condition id="CM3_ARMCC">
1231       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1232       <require condition="CM3"/>
1233       <require Tcompiler="ARMCC"/>
1234     </condition>
1235     <condition id="CM3_LE_ARMCC">
1236       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1237       <require condition="CM3_ARMCC"/>
1238       <require Dendian="Little-endian"/>
1239     </condition>
1240     <condition id="CM3_BE_ARMCC">
1241       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1242       <require condition="CM3_ARMCC"/>
1243       <require Dendian="Big-endian"/>
1244     </condition>
1245
1246     <condition id="CM4_ARMCC">
1247       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1248       <require condition="CM4"/>
1249       <require Tcompiler="ARMCC"/>
1250     </condition>
1251     <condition id="CM4_LE_ARMCC">
1252       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1253       <require condition="CM4_ARMCC"/>
1254       <require Dendian="Little-endian"/>
1255     </condition>
1256     <condition id="CM4_BE_ARMCC">
1257       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1258       <require condition="CM4_ARMCC"/>
1259       <require Dendian="Big-endian"/>
1260     </condition>
1261
1262     <condition id="CM4_FP_ARMCC">
1263       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1264       <require condition="CM4_FP"/>
1265       <require Tcompiler="ARMCC"/>
1266     </condition>
1267     <condition id="CM4_FP_LE_ARMCC">
1268       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1269       <require condition="CM4_FP_ARMCC"/>
1270       <require Dendian="Little-endian"/>
1271     </condition>
1272     <condition id="CM4_FP_BE_ARMCC">
1273       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1274       <require condition="CM4_FP_ARMCC"/>
1275       <require Dendian="Big-endian"/>
1276     </condition>
1277
1278     <condition id="CM7_ARMCC">
1279       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1280       <require condition="CM7"/>
1281       <require Tcompiler="ARMCC"/>
1282     </condition>
1283     <condition id="CM7_LE_ARMCC">
1284       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1285       <require condition="CM7_ARMCC"/>
1286       <require Dendian="Little-endian"/>
1287     </condition>
1288     <condition id="CM7_BE_ARMCC">
1289       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1290       <require condition="CM7_ARMCC"/>
1291       <require Dendian="Big-endian"/>
1292     </condition>
1293
1294     <condition id="CM7_FP_ARMCC">
1295       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1296       <require condition="CM7_FP"/>
1297       <require Tcompiler="ARMCC"/>
1298     </condition>
1299     <condition id="CM7_FP_LE_ARMCC">
1300       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1301       <require condition="CM7_FP_ARMCC"/>
1302       <require Dendian="Little-endian"/>
1303     </condition>
1304     <condition id="CM7_FP_BE_ARMCC">
1305       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1306       <require condition="CM7_FP_ARMCC"/>
1307       <require Dendian="Big-endian"/>
1308     </condition>
1309
1310     <condition id="CM7_SP_ARMCC">
1311       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1312       <require condition="CM7_SP"/>
1313       <require Tcompiler="ARMCC"/>
1314     </condition>
1315     <condition id="CM7_SP_LE_ARMCC">
1316       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1317       <require condition="CM7_SP_ARMCC"/>
1318       <require Dendian="Little-endian"/>
1319     </condition>
1320     <condition id="CM7_SP_BE_ARMCC">
1321       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1322       <require condition="CM7_SP_ARMCC"/>
1323       <require Dendian="Big-endian"/>
1324     </condition>
1325
1326     <condition id="CM7_DP_ARMCC">
1327       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1328       <require condition="CM7_DP"/>
1329       <require Tcompiler="ARMCC"/>
1330     </condition>
1331     <condition id="CM7_DP_LE_ARMCC">
1332       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1333       <require condition="CM7_DP_ARMCC"/>
1334       <require Dendian="Little-endian"/>
1335     </condition>
1336     <condition id="CM7_DP_BE_ARMCC">
1337       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1338       <require condition="CM7_DP_ARMCC"/>
1339       <require Dendian="Big-endian"/>
1340     </condition>
1341
1342     <condition id="CM23_ARMCC">
1343       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1344       <require condition="CM23"/>
1345       <require Tcompiler="ARMCC"/>
1346     </condition>
1347     <condition id="CM23_LE_ARMCC">
1348       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1349       <require condition="CM23_ARMCC"/>
1350       <require Dendian="Little-endian"/>
1351     </condition>
1352
1353     <condition id="CM33_ARMCC">
1354       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1355       <require condition="CM33"/>
1356       <require Tcompiler="ARMCC"/>
1357     </condition>
1358     <condition id="CM33_LE_ARMCC">
1359       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1360       <require condition="CM33_ARMCC"/>
1361       <require Dendian="Little-endian"/>
1362     </condition>
1363
1364     <condition id="CM33_FP_ARMCC">
1365       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1366       <require condition="CM33_FP"/>
1367       <require Tcompiler="ARMCC"/>
1368     </condition>
1369     <condition id="CM33_FP_LE_ARMCC">
1370       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1371       <require condition="CM33_FP_ARMCC"/>
1372       <require Dendian="Little-endian"/>
1373     </condition>
1374
1375     <condition id="CM33_NODSP_NOFPU_ARMCC">
1376       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1377       <require condition="CM33_NODSP_NOFPU"/>
1378       <require Tcompiler="ARMCC"/>
1379     </condition>
1380     <condition id="CM33_DSP_NOFPU_ARMCC">
1381       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1382       <require condition="CM33_DSP_NOFPU"/>
1383       <require Tcompiler="ARMCC"/>
1384     </condition>
1385     <condition id="CM33_NODSP_SP_ARMCC">
1386       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1387       <require condition="CM33_NODSP_SP"/>
1388       <require Tcompiler="ARMCC"/>
1389     </condition>
1390     <condition id="CM33_DSP_SP_ARMCC">
1391       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1392       <require condition="CM33_DSP_SP"/>
1393       <require Tcompiler="ARMCC"/>
1394     </condition>
1395     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1396       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1397       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1398       <require Dendian="Little-endian"/>
1399     </condition>
1400     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1401       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1402       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1403       <require Dendian="Little-endian"/>
1404     </condition>
1405     <condition id="CM33_NODSP_SP_LE_ARMCC">
1406       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1407       <require condition="CM33_NODSP_SP_ARMCC"/>
1408       <require Dendian="Little-endian"/>
1409     </condition>
1410     <condition id="CM33_DSP_SP_LE_ARMCC">
1411       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1412       <require condition="CM33_DSP_SP_ARMCC"/>
1413       <require Dendian="Little-endian"/>
1414     </condition>
1415
1416     <condition id="CM35P_ARMCC">
1417       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1418       <require condition="CM35P"/>
1419       <require Tcompiler="ARMCC"/>
1420     </condition>
1421     <condition id="CM35P_LE_ARMCC">
1422       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1423       <require condition="CM35P_ARMCC"/>
1424       <require Dendian="Little-endian"/>
1425     </condition>
1426
1427     <condition id="CM35P_FP_ARMCC">
1428       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1429       <require condition="CM35P_FP"/>
1430       <require Tcompiler="ARMCC"/>
1431     </condition>
1432     <condition id="CM35P_FP_LE_ARMCC">
1433       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1434       <require condition="CM35P_FP_ARMCC"/>
1435       <require Dendian="Little-endian"/>
1436     </condition>
1437
1438     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1439       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1440       <require condition="CM35P_NODSP_NOFPU"/>
1441       <require Tcompiler="ARMCC"/>
1442     </condition>
1443     <condition id="CM35P_DSP_NOFPU_ARMCC">
1444       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1445       <require condition="CM35P_DSP_NOFPU"/>
1446       <require Tcompiler="ARMCC"/>
1447     </condition>
1448     <condition id="CM35P_NODSP_SP_ARMCC">
1449       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1450       <require condition="CM35P_NODSP_SP"/>
1451       <require Tcompiler="ARMCC"/>
1452     </condition>
1453     <condition id="CM35P_DSP_SP_ARMCC">
1454       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1455       <require condition="CM35P_DSP_SP"/>
1456       <require Tcompiler="ARMCC"/>
1457     </condition>
1458     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1459       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1460       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1461       <require Dendian="Little-endian"/>
1462     </condition>
1463     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1464       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1465       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1466       <require Dendian="Little-endian"/>
1467     </condition>
1468     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1469       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1470       <require condition="CM35P_NODSP_SP_ARMCC"/>
1471       <require Dendian="Little-endian"/>
1472     </condition>
1473     <condition id="CM35P_DSP_SP_LE_ARMCC">
1474       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1475       <require condition="CM35P_DSP_SP_ARMCC"/>
1476       <require Dendian="Little-endian"/>
1477     </condition>
1478
1479     <condition id="ARMv8MBL_ARMCC">
1480       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1481       <require condition="ARMv8MBL"/>
1482       <require Tcompiler="ARMCC"/>
1483     </condition>
1484     <condition id="ARMv8MBL_LE_ARMCC">
1485       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1486       <require condition="ARMv8MBL_ARMCC"/>
1487       <require Dendian="Little-endian"/>
1488     </condition>
1489
1490     <condition id="ARMv8MML_ARMCC">
1491       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1492       <require condition="ARMv8MML"/>
1493       <require Tcompiler="ARMCC"/>
1494     </condition>
1495     <condition id="ARMv8MML_LE_ARMCC">
1496       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1497       <require condition="ARMv8MML_ARMCC"/>
1498       <require Dendian="Little-endian"/>
1499     </condition>
1500
1501     <condition id="ARMv8MML_FP_ARMCC">
1502       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1503       <require condition="ARMv8MML_FP"/>
1504       <require Tcompiler="ARMCC"/>
1505     </condition>
1506     <condition id="ARMv8MML_FP_LE_ARMCC">
1507       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1508       <require condition="ARMv8MML_FP_ARMCC"/>
1509       <require Dendian="Little-endian"/>
1510     </condition>
1511
1512     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1513       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1514       <require condition="ARMv8MML_NODSP_NOFPU"/>
1515       <require Tcompiler="ARMCC"/>
1516     </condition>
1517     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1518       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1519       <require condition="ARMv8MML_DSP_NOFPU"/>
1520       <require Tcompiler="ARMCC"/>
1521     </condition>
1522     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1523       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1524       <require condition="ARMv8MML_NODSP_SP"/>
1525       <require Tcompiler="ARMCC"/>
1526     </condition>
1527     <condition id="ARMv8MML_DSP_SP_ARMCC">
1528       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1529       <require condition="ARMv8MML_DSP_SP"/>
1530       <require Tcompiler="ARMCC"/>
1531     </condition>
1532     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1533       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1534       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1535       <require Dendian="Little-endian"/>
1536     </condition>
1537     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1538       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1539       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1540       <require Dendian="Little-endian"/>
1541     </condition>
1542     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1543       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1544       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1545       <require Dendian="Little-endian"/>
1546     </condition>
1547     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1548       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1549       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1550       <require Dendian="Little-endian"/>
1551     </condition>
1552
1553     <!-- GCC compiler -->
1554     <condition id="CA_GCC">
1555       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1556       <require condition="ARMv7-A Device"/>
1557       <require Tcompiler="GCC"/>
1558     </condition>
1559
1560     <condition id="CM0_GCC">
1561       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1562       <require condition="CM0"/>
1563       <require Tcompiler="GCC"/>
1564     </condition>
1565     <condition id="CM0_LE_GCC">
1566       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1567       <require condition="CM0_GCC"/>
1568       <require Dendian="Little-endian"/>
1569     </condition>
1570     <condition id="CM0_BE_GCC">
1571       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1572       <require condition="CM0_GCC"/>
1573       <require Dendian="Big-endian"/>
1574     </condition>
1575
1576     <condition id="CM1_GCC">
1577       <description>Cortex-M1 based device for the GCC Compiler</description>
1578       <require condition="CM1"/>
1579       <require Tcompiler="GCC"/>
1580     </condition>
1581     <condition id="CM1_LE_GCC">
1582       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1583       <require condition="CM1_GCC"/>
1584       <require Dendian="Little-endian"/>
1585     </condition>
1586     <condition id="CM1_BE_GCC">
1587       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1588       <require condition="CM1_GCC"/>
1589       <require Dendian="Big-endian"/>
1590     </condition>
1591
1592     <condition id="CM3_GCC">
1593       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1594       <require condition="CM3"/>
1595       <require Tcompiler="GCC"/>
1596     </condition>
1597     <condition id="CM3_LE_GCC">
1598       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1599       <require condition="CM3_GCC"/>
1600       <require Dendian="Little-endian"/>
1601     </condition>
1602     <condition id="CM3_BE_GCC">
1603       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1604       <require condition="CM3_GCC"/>
1605       <require Dendian="Big-endian"/>
1606     </condition>
1607
1608     <condition id="CM4_GCC">
1609       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1610       <require condition="CM4"/>
1611       <require Tcompiler="GCC"/>
1612     </condition>
1613     <condition id="CM4_LE_GCC">
1614       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1615       <require condition="CM4_GCC"/>
1616       <require Dendian="Little-endian"/>
1617     </condition>
1618     <condition id="CM4_BE_GCC">
1619       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1620       <require condition="CM4_GCC"/>
1621       <require Dendian="Big-endian"/>
1622     </condition>
1623
1624     <condition id="CM4_FP_GCC">
1625       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1626       <require condition="CM4_FP"/>
1627       <require Tcompiler="GCC"/>
1628     </condition>
1629     <condition id="CM4_FP_LE_GCC">
1630       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1631       <require condition="CM4_FP_GCC"/>
1632       <require Dendian="Little-endian"/>
1633     </condition>
1634     <condition id="CM4_FP_BE_GCC">
1635       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1636       <require condition="CM4_FP_GCC"/>
1637       <require Dendian="Big-endian"/>
1638     </condition>
1639
1640     <condition id="CM7_GCC">
1641       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1642       <require condition="CM7"/>
1643       <require Tcompiler="GCC"/>
1644     </condition>
1645     <condition id="CM7_LE_GCC">
1646       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1647       <require condition="CM7_GCC"/>
1648       <require Dendian="Little-endian"/>
1649     </condition>
1650     <condition id="CM7_BE_GCC">
1651       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1652       <require condition="CM7_GCC"/>
1653       <require Dendian="Big-endian"/>
1654     </condition>
1655
1656     <condition id="CM7_FP_GCC">
1657       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1658       <require condition="CM7_FP"/>
1659       <require Tcompiler="GCC"/>
1660     </condition>
1661     <condition id="CM7_FP_LE_GCC">
1662       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1663       <require condition="CM7_FP_GCC"/>
1664       <require Dendian="Little-endian"/>
1665     </condition>
1666     <condition id="CM7_FP_BE_GCC">
1667       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1668       <require condition="CM7_FP_GCC"/>
1669       <require Dendian="Big-endian"/>
1670     </condition>
1671
1672     <condition id="CM7_SP_GCC">
1673       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1674       <require condition="CM7_SP"/>
1675       <require Tcompiler="GCC"/>
1676     </condition>
1677     <condition id="CM7_SP_LE_GCC">
1678       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1679       <require condition="CM7_SP_GCC"/>
1680       <require Dendian="Little-endian"/>
1681     </condition>
1682
1683     <condition id="CM7_DP_GCC">
1684       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1685       <require condition="CM7_DP"/>
1686       <require Tcompiler="GCC"/>
1687     </condition>
1688     <condition id="CM7_DP_LE_GCC">
1689       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1690       <require condition="CM7_DP_GCC"/>
1691       <require Dendian="Little-endian"/>
1692     </condition>
1693
1694     <condition id="CM23_GCC">
1695       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1696       <require condition="CM23"/>
1697       <require Tcompiler="GCC"/>
1698     </condition>
1699     <condition id="CM23_LE_GCC">
1700       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1701       <require condition="CM23_GCC"/>
1702       <require Dendian="Little-endian"/>
1703     </condition>
1704
1705     <condition id="CM33_GCC">
1706       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1707       <require condition="CM33"/>
1708       <require Tcompiler="GCC"/>
1709     </condition>
1710     <condition id="CM33_LE_GCC">
1711       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1712       <require condition="CM33_GCC"/>
1713       <require Dendian="Little-endian"/>
1714     </condition>
1715
1716     <condition id="CM33_FP_GCC">
1717       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1718       <require condition="CM33_FP"/>
1719       <require Tcompiler="GCC"/>
1720     </condition>
1721     <condition id="CM33_FP_LE_GCC">
1722       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1723       <require condition="CM33_FP_GCC"/>
1724       <require Dendian="Little-endian"/>
1725     </condition>
1726
1727     <condition id="CM33_NODSP_NOFPU_GCC">
1728       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1729       <require condition="CM33_NODSP_NOFPU"/>
1730       <require Tcompiler="GCC"/>
1731     </condition>
1732     <condition id="CM33_DSP_NOFPU_GCC">
1733       <description>CM33, DSP, no FPU, GCC Compiler</description>
1734       <require condition="CM33_DSP_NOFPU"/>
1735       <require Tcompiler="GCC"/>
1736     </condition>
1737     <condition id="CM33_NODSP_SP_GCC">
1738       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1739       <require condition="CM33_NODSP_SP"/>
1740       <require Tcompiler="GCC"/>
1741     </condition>
1742     <condition id="CM33_DSP_SP_GCC">
1743       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1744       <require condition="CM33_DSP_SP"/>
1745       <require Tcompiler="GCC"/>
1746     </condition>
1747     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1748       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1749       <require condition="CM33_NODSP_NOFPU_GCC"/>
1750       <require Dendian="Little-endian"/>
1751     </condition>
1752     <condition id="CM33_DSP_NOFPU_LE_GCC">
1753       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1754       <require condition="CM33_DSP_NOFPU_GCC"/>
1755       <require Dendian="Little-endian"/>
1756     </condition>
1757     <condition id="CM33_NODSP_SP_LE_GCC">
1758       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1759       <require condition="CM33_NODSP_SP_GCC"/>
1760       <require Dendian="Little-endian"/>
1761     </condition>
1762     <condition id="CM33_DSP_SP_LE_GCC">
1763       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1764       <require condition="CM33_DSP_SP_GCC"/>
1765       <require Dendian="Little-endian"/>
1766     </condition>
1767
1768     <condition id="CM35P_GCC">
1769       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1770       <require condition="CM35P"/>
1771       <require Tcompiler="GCC"/>
1772     </condition>
1773     <condition id="CM35P_LE_GCC">
1774       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1775       <require condition="CM35P_GCC"/>
1776       <require Dendian="Little-endian"/>
1777     </condition>
1778
1779     <condition id="CM35P_FP_GCC">
1780       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1781       <require condition="CM35P_FP"/>
1782       <require Tcompiler="GCC"/>
1783     </condition>
1784     <condition id="CM35P_FP_LE_GCC">
1785       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1786       <require condition="CM35P_FP_GCC"/>
1787       <require Dendian="Little-endian"/>
1788     </condition>
1789
1790     <condition id="CM35P_NODSP_NOFPU_GCC">
1791       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1792       <require condition="CM35P_NODSP_NOFPU"/>
1793       <require Tcompiler="GCC"/>
1794     </condition>
1795     <condition id="CM35P_DSP_NOFPU_GCC">
1796       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1797       <require condition="CM35P_DSP_NOFPU"/>
1798       <require Tcompiler="GCC"/>
1799     </condition>
1800     <condition id="CM35P_NODSP_SP_GCC">
1801       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1802       <require condition="CM35P_NODSP_SP"/>
1803       <require Tcompiler="GCC"/>
1804     </condition>
1805     <condition id="CM35P_DSP_SP_GCC">
1806       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1807       <require condition="CM35P_DSP_SP"/>
1808       <require Tcompiler="GCC"/>
1809     </condition>
1810     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1811       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1812       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1813       <require Dendian="Little-endian"/>
1814     </condition>
1815     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1816       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1817       <require condition="CM35P_DSP_NOFPU_GCC"/>
1818       <require Dendian="Little-endian"/>
1819     </condition>
1820     <condition id="CM35P_NODSP_SP_LE_GCC">
1821       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1822       <require condition="CM35P_NODSP_SP_GCC"/>
1823       <require Dendian="Little-endian"/>
1824     </condition>
1825     <condition id="CM35P_DSP_SP_LE_GCC">
1826       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1827       <require condition="CM35P_DSP_SP_GCC"/>
1828       <require Dendian="Little-endian"/>
1829     </condition>
1830
1831     <condition id="ARMv8MBL_GCC">
1832       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1833       <require condition="ARMv8MBL"/>
1834       <require Tcompiler="GCC"/>
1835     </condition>
1836     <condition id="ARMv8MBL_LE_GCC">
1837       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1838       <require condition="ARMv8MBL_GCC"/>
1839       <require Dendian="Little-endian"/>
1840     </condition>
1841
1842     <condition id="ARMv8MML_GCC">
1843       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1844       <require condition="ARMv8MML"/>
1845       <require Tcompiler="GCC"/>
1846     </condition>
1847     <condition id="ARMv8MML_LE_GCC">
1848       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1849       <require condition="ARMv8MML_GCC"/>
1850       <require Dendian="Little-endian"/>
1851     </condition>
1852
1853     <condition id="ARMv8MML_FP_GCC">
1854       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1855       <require condition="ARMv8MML_FP"/>
1856       <require Tcompiler="GCC"/>
1857     </condition>
1858     <condition id="ARMv8MML_FP_LE_GCC">
1859       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1860       <require condition="ARMv8MML_FP_GCC"/>
1861       <require Dendian="Little-endian"/>
1862     </condition>
1863
1864     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1865       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1866       <require condition="ARMv8MML_NODSP_NOFPU"/>
1867       <require Tcompiler="GCC"/>
1868     </condition>
1869     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1870       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1871       <require condition="ARMv8MML_DSP_NOFPU"/>
1872       <require Tcompiler="GCC"/>
1873     </condition>
1874     <condition id="ARMv8MML_NODSP_SP_GCC">
1875       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1876       <require condition="ARMv8MML_NODSP_SP"/>
1877       <require Tcompiler="GCC"/>
1878     </condition>
1879     <condition id="ARMv8MML_DSP_SP_GCC">
1880       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1881       <require condition="ARMv8MML_DSP_SP"/>
1882       <require Tcompiler="GCC"/>
1883     </condition>
1884     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1885       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1886       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1887       <require Dendian="Little-endian"/>
1888     </condition>
1889     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1890       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1891       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1892       <require Dendian="Little-endian"/>
1893     </condition>
1894     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1895       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1896       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1897       <require Dendian="Little-endian"/>
1898     </condition>
1899     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1900       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1901       <require condition="ARMv8MML_DSP_SP_GCC"/>
1902       <require Dendian="Little-endian"/>
1903     </condition>
1904
1905     <!-- IAR compiler -->
1906     <condition id="CA_IAR">
1907       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1908       <require condition="ARMv7-A Device"/>
1909       <require Tcompiler="IAR"/>
1910     </condition>
1911
1912     <condition id="CM0_IAR">
1913       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1914       <require condition="CM0"/>
1915       <require Tcompiler="IAR"/>
1916     </condition>
1917     <condition id="CM0_LE_IAR">
1918       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1919       <require condition="CM0_IAR"/>
1920       <require Dendian="Little-endian"/>
1921     </condition>
1922     <condition id="CM0_BE_IAR">
1923       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1924       <require condition="CM0_IAR"/>
1925       <require Dendian="Big-endian"/>
1926     </condition>
1927
1928     <condition id="CM1_IAR">
1929       <description>Cortex-M1 based device for the IAR Compiler</description>
1930       <require condition="CM1"/>
1931       <require Tcompiler="IAR"/>
1932     </condition>
1933     <condition id="CM1_LE_IAR">
1934       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1935       <require condition="CM1_IAR"/>
1936       <require Dendian="Little-endian"/>
1937     </condition>
1938     <condition id="CM1_BE_IAR">
1939       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1940       <require condition="CM1_IAR"/>
1941       <require Dendian="Big-endian"/>
1942     </condition>
1943
1944     <condition id="CM3_IAR">
1945       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1946       <require condition="CM3"/>
1947       <require Tcompiler="IAR"/>
1948     </condition>
1949     <condition id="CM3_LE_IAR">
1950       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1951       <require condition="CM3_IAR"/>
1952       <require Dendian="Little-endian"/>
1953     </condition>
1954     <condition id="CM3_BE_IAR">
1955       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1956       <require condition="CM3_IAR"/>
1957       <require Dendian="Big-endian"/>
1958     </condition>
1959
1960     <condition id="CM4_IAR">
1961       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1962       <require condition="CM4"/>
1963       <require Tcompiler="IAR"/>
1964     </condition>
1965     <condition id="CM4_LE_IAR">
1966       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1967       <require condition="CM4_IAR"/>
1968       <require Dendian="Little-endian"/>
1969     </condition>
1970     <condition id="CM4_BE_IAR">
1971       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1972       <require condition="CM4_IAR"/>
1973       <require Dendian="Big-endian"/>
1974     </condition>
1975
1976     <condition id="CM4_FP_IAR">
1977       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1978       <require condition="CM4_FP"/>
1979       <require Tcompiler="IAR"/>
1980     </condition>
1981     <condition id="CM4_FP_LE_IAR">
1982       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1983       <require condition="CM4_FP_IAR"/>
1984       <require Dendian="Little-endian"/>
1985     </condition>
1986     <condition id="CM4_FP_BE_IAR">
1987       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1988       <require condition="CM4_FP_IAR"/>
1989       <require Dendian="Big-endian"/>
1990     </condition>
1991
1992     <condition id="CM7_IAR">
1993       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1994       <require condition="CM7"/>
1995       <require Tcompiler="IAR"/>
1996     </condition>
1997     <condition id="CM7_LE_IAR">
1998       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1999       <require condition="CM7_IAR"/>
2000       <require Dendian="Little-endian"/>
2001     </condition>
2002     <condition id="CM7_BE_IAR">
2003       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2004       <require condition="CM7_IAR"/>
2005       <require Dendian="Big-endian"/>
2006     </condition>
2007
2008     <condition id="CM7_FP_IAR">
2009       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2010       <require condition="CM7_FP"/>
2011       <require Tcompiler="IAR"/>
2012     </condition>
2013     <condition id="CM7_FP_LE_IAR">
2014       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2015       <require condition="CM7_FP_IAR"/>
2016       <require Dendian="Little-endian"/>
2017     </condition>
2018     <condition id="CM7_FP_BE_IAR">
2019       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2020       <require condition="CM7_FP_IAR"/>
2021       <require Dendian="Big-endian"/>
2022     </condition>
2023
2024     <condition id="CM7_SP_IAR">
2025       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2026       <require condition="CM7_SP"/>
2027       <require Tcompiler="IAR"/>
2028     </condition>
2029     <condition id="CM7_SP_LE_IAR">
2030       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2031       <require condition="CM7_SP_IAR"/>
2032       <require Dendian="Little-endian"/>
2033     </condition>
2034     <condition id="CM7_SP_BE_IAR">
2035       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2036       <require condition="CM7_SP_IAR"/>
2037       <require Dendian="Big-endian"/>
2038     </condition>
2039
2040     <condition id="CM7_DP_IAR">
2041       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2042       <require condition="CM7_DP"/>
2043       <require Tcompiler="IAR"/>
2044     </condition>
2045     <condition id="CM7_DP_LE_IAR">
2046       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2047       <require condition="CM7_DP_IAR"/>
2048       <require Dendian="Little-endian"/>
2049     </condition>
2050     <condition id="CM7_DP_BE_IAR">
2051       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2052       <require condition="CM7_DP_IAR"/>
2053       <require Dendian="Big-endian"/>
2054     </condition>
2055
2056     <condition id="CM23_IAR">
2057       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2058       <require condition="CM23"/>
2059       <require Tcompiler="IAR"/>
2060     </condition>
2061     <condition id="CM23_LE_IAR">
2062       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2063       <require condition="CM23_IAR"/>
2064       <require Dendian="Little-endian"/>
2065     </condition>
2066
2067     <condition id="CM33_IAR">
2068       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2069       <require condition="CM33"/>
2070       <require Tcompiler="IAR"/>
2071     </condition>
2072     <condition id="CM33_LE_IAR">
2073       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2074       <require condition="CM33_IAR"/>
2075       <require Dendian="Little-endian"/>
2076     </condition>
2077
2078     <condition id="CM33_FP_IAR">
2079       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2080       <require condition="CM33_FP"/>
2081       <require Tcompiler="IAR"/>
2082     </condition>
2083     <condition id="CM33_FP_LE_IAR">
2084       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2085       <require condition="CM33_FP_IAR"/>
2086       <require Dendian="Little-endian"/>
2087     </condition>
2088
2089     <condition id="CM33_NODSP_NOFPU_IAR">
2090       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2091       <require condition="CM33_NODSP_NOFPU"/>
2092       <require Tcompiler="IAR"/>
2093     </condition>
2094     <condition id="CM33_DSP_NOFPU_IAR">
2095       <description>CM33, DSP, no FPU, IAR Compiler</description>
2096       <require condition="CM33_DSP_NOFPU"/>
2097       <require Tcompiler="IAR"/>
2098     </condition>
2099     <condition id="CM33_NODSP_SP_IAR">
2100       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2101       <require condition="CM33_NODSP_SP"/>
2102       <require Tcompiler="IAR"/>
2103     </condition>
2104     <condition id="CM33_DSP_SP_IAR">
2105       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2106       <require condition="CM33_DSP_SP"/>
2107       <require Tcompiler="IAR"/>
2108     </condition>
2109     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2110       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2111       <require condition="CM33_NODSP_NOFPU_IAR"/>
2112       <require Dendian="Little-endian"/>
2113     </condition>
2114     <condition id="CM33_DSP_NOFPU_LE_IAR">
2115       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2116       <require condition="CM33_DSP_NOFPU_IAR"/>
2117       <require Dendian="Little-endian"/>
2118     </condition>
2119     <condition id="CM33_NODSP_SP_LE_IAR">
2120       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2121       <require condition="CM33_NODSP_SP_IAR"/>
2122       <require Dendian="Little-endian"/>
2123     </condition>
2124     <condition id="CM33_DSP_SP_LE_IAR">
2125       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2126       <require condition="CM33_DSP_SP_IAR"/>
2127       <require Dendian="Little-endian"/>
2128     </condition>
2129
2130     <condition id="CM35P_IAR">
2131       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2132       <require condition="CM35P"/>
2133       <require Tcompiler="IAR"/>
2134     </condition>
2135     <condition id="CM35P_LE_IAR">
2136       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2137       <require condition="CM35P_IAR"/>
2138       <require Dendian="Little-endian"/>
2139     </condition>
2140
2141     <condition id="CM35P_FP_IAR">
2142       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2143       <require condition="CM35P_FP"/>
2144       <require Tcompiler="IAR"/>
2145     </condition>
2146     <condition id="CM35P_FP_LE_IAR">
2147       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2148       <require condition="CM35P_FP_IAR"/>
2149       <require Dendian="Little-endian"/>
2150     </condition>
2151
2152     <condition id="CM35P_NODSP_NOFPU_IAR">
2153       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2154       <require condition="CM35P_NODSP_NOFPU"/>
2155       <require Tcompiler="IAR"/>
2156     </condition>
2157     <condition id="CM35P_DSP_NOFPU_IAR">
2158       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2159       <require condition="CM35P_DSP_NOFPU"/>
2160       <require Tcompiler="IAR"/>
2161     </condition>
2162     <condition id="CM35P_NODSP_SP_IAR">
2163       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2164       <require condition="CM35P_NODSP_SP"/>
2165       <require Tcompiler="IAR"/>
2166     </condition>
2167     <condition id="CM35P_DSP_SP_IAR">
2168       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2169       <require condition="CM35P_DSP_SP"/>
2170       <require Tcompiler="IAR"/>
2171     </condition>
2172     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2173       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2174       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2175       <require Dendian="Little-endian"/>
2176     </condition>
2177     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2178       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2179       <require condition="CM35P_DSP_NOFPU_IAR"/>
2180       <require Dendian="Little-endian"/>
2181     </condition>
2182     <condition id="CM35P_NODSP_SP_LE_IAR">
2183       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2184       <require condition="CM35P_NODSP_SP_IAR"/>
2185       <require Dendian="Little-endian"/>
2186     </condition>
2187     <condition id="CM35P_DSP_SP_LE_IAR">
2188       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2189       <require condition="CM35P_DSP_SP_IAR"/>
2190       <require Dendian="Little-endian"/>
2191     </condition>
2192
2193     <condition id="ARMv8MBL_IAR">
2194       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2195       <require condition="ARMv8MBL"/>
2196       <require Tcompiler="IAR"/>
2197     </condition>
2198     <condition id="ARMv8MBL_LE_IAR">
2199       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2200       <require condition="ARMv8MBL_IAR"/>
2201       <require Dendian="Little-endian"/>
2202     </condition>
2203
2204     <condition id="ARMv8MML_IAR">
2205       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2206       <require condition="ARMv8MML"/>
2207       <require Tcompiler="IAR"/>
2208     </condition>
2209     <condition id="ARMv8MML_LE_IAR">
2210       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2211       <require condition="ARMv8MML_IAR"/>
2212       <require Dendian="Little-endian"/>
2213     </condition>
2214
2215     <condition id="ARMv8MML_FP_IAR">
2216       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2217       <require condition="ARMv8MML_FP"/>
2218       <require Tcompiler="IAR"/>
2219     </condition>
2220     <condition id="ARMv8MML_FP_LE_IAR">
2221       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2222       <require condition="ARMv8MML_FP_IAR"/>
2223       <require Dendian="Little-endian"/>
2224     </condition>
2225
2226     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2227       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2228       <require condition="ARMv8MML_NODSP_NOFPU"/>
2229       <require Tcompiler="IAR"/>
2230     </condition>
2231     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2232       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2233       <require condition="ARMv8MML_DSP_NOFPU"/>
2234       <require Tcompiler="IAR"/>
2235     </condition>
2236     <condition id="ARMv8MML_NODSP_SP_IAR">
2237       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2238       <require condition="ARMv8MML_NODSP_SP"/>
2239       <require Tcompiler="IAR"/>
2240     </condition>
2241     <condition id="ARMv8MML_DSP_SP_IAR">
2242       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2243       <require condition="ARMv8MML_DSP_SP"/>
2244       <require Tcompiler="IAR"/>
2245     </condition>
2246     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2247       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2248       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2249       <require Dendian="Little-endian"/>
2250     </condition>
2251     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2252       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2253       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2254       <require Dendian="Little-endian"/>
2255     </condition>
2256     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2257       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2258       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2259       <require Dendian="Little-endian"/>
2260     </condition>
2261     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2262       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2263       <require condition="ARMv8MML_DSP_SP_IAR"/>
2264       <require Dendian="Little-endian"/>
2265     </condition>
2266
2267     <!-- conditions selecting single devices and CMSIS Core -->
2268     <condition id="ARMCM0 CMSIS">
2269       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2270       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2271       <require Cclass="CMSIS" Cgroup="CORE"/>
2272     </condition>
2273
2274     <condition id="ARMCM0+ CMSIS">
2275       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2276       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2277       <require Cclass="CMSIS" Cgroup="CORE"/>
2278     </condition>
2279
2280     <condition id="ARMCM1 CMSIS">
2281       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2282       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2283       <require Cclass="CMSIS" Cgroup="CORE"/>
2284     </condition>
2285
2286     <condition id="ARMCM3 CMSIS">
2287       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2288       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2289       <require Cclass="CMSIS" Cgroup="CORE"/>
2290     </condition>
2291
2292     <condition id="ARMCM4 CMSIS">
2293       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2294       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2295       <require Cclass="CMSIS" Cgroup="CORE"/>
2296     </condition>
2297
2298     <condition id="ARMCM7 CMSIS">
2299       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2300       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2301       <require Cclass="CMSIS" Cgroup="CORE"/>
2302     </condition>
2303
2304     <condition id="ARMCM23 CMSIS">
2305       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2306       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2307       <require Cclass="CMSIS" Cgroup="CORE"/>
2308     </condition>
2309
2310     <condition id="ARMCM33 CMSIS">
2311       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2312       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2313       <require Cclass="CMSIS" Cgroup="CORE"/>
2314     </condition>
2315
2316     <condition id="ARMCM35P CMSIS">
2317       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2318       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2319       <require Cclass="CMSIS" Cgroup="CORE"/>
2320     </condition>
2321
2322     <condition id="ARMCM55 CMSIS">
2323       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2324       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2325       <require Cclass="CMSIS" Cgroup="CORE"/>
2326     </condition>
2327
2328     <condition id="ARMSC000 CMSIS">
2329       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2330       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2331       <require Cclass="CMSIS" Cgroup="CORE"/>
2332     </condition>
2333
2334     <condition id="ARMSC300 CMSIS">
2335       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2336       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2337       <require Cclass="CMSIS" Cgroup="CORE"/>
2338     </condition>
2339
2340     <condition id="ARMv8MBL CMSIS">
2341       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2342       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2343       <require Cclass="CMSIS" Cgroup="CORE"/>
2344     </condition>
2345
2346     <condition id="ARMv8MML CMSIS">
2347       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2348       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2349       <require Cclass="CMSIS" Cgroup="CORE"/>
2350     </condition>
2351
2352     <condition id="ARMv81MML CMSIS">
2353       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2354       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2355       <require Cclass="CMSIS" Cgroup="CORE"/>
2356     </condition>
2357
2358     <condition id="ARMCA5 CMSIS">
2359       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2360       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2361       <require Cclass="CMSIS" Cgroup="CORE"/>
2362     </condition>
2363
2364     <condition id="ARMCA7 CMSIS">
2365       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2366       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2367       <require Cclass="CMSIS" Cgroup="CORE"/>
2368     </condition>
2369
2370     <condition id="ARMCA9 CMSIS">
2371       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2372       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2373       <require Cclass="CMSIS" Cgroup="CORE"/>
2374     </condition>
2375
2376     <!-- CMSIS DSP -->
2377     <condition id="CMSIS DSP">
2378       <description>Components required for DSP</description>
2379       <require condition="ARMv6_7_8-M Device"/>
2380       <require condition="ARMCC GCC IAR"/>
2381       <require Cclass="CMSIS" Cgroup="CORE"/>
2382     </condition>
2383
2384     <!-- CMSIS NN -->
2385     <condition id="CMSIS NN">
2386       <description>Components required for NN</description>
2387       <require Cclass="CMSIS" Cgroup="DSP"/>
2388     </condition>
2389
2390     <!-- RTOS RTX -->
2391     <condition id="RTOS RTX">
2392       <description>Components required for RTOS RTX</description>
2393       <require condition="ARMv6_7-M Device"/>
2394       <require condition="ARMCC GCC IAR"/>
2395       <require Cclass="Device" Cgroup="Startup"/>
2396       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2397     </condition>
2398     <condition id="RTOS RTX IFX">
2399       <description>Components required for RTOS RTX IFX</description>
2400       <require condition="ARMv6_7-M Device"/>
2401       <require condition="ARMCC GCC IAR"/>
2402       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2403       <require Cclass="Device" Cgroup="Startup"/>
2404       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2405     </condition>
2406     <condition id="RTOS RTX5">
2407       <description>Components required for RTOS RTX5</description>
2408       <require condition="ARMv6_7_8-M Device"/>
2409       <require condition="ARMCC GCC IAR"/>
2410       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2411     </condition>
2412     <condition id="RTOS2 RTX5">
2413       <description>Components required for RTOS2 RTX5</description>
2414       <require condition="ARMv6_7_8-M Device"/>
2415       <require condition="ARMCC GCC IAR"/>
2416       <require Cclass="CMSIS"  Cgroup="CORE"/>
2417       <require Cclass="Device" Cgroup="Startup"/>
2418     </condition>
2419     <condition id="RTOS2 RTX5 v7-A">
2420       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2421       <require condition="ARMv7-A Device"/>
2422       <require condition="ARMCC GCC IAR"/>
2423       <require Cclass="CMSIS"  Cgroup="CORE"/>
2424       <require Cclass="Device" Cgroup="Startup"/>
2425       <require Cclass="Device" Cgroup="OS Tick"/>
2426       <require Cclass="Device" Cgroup="IRQ Controller"/>
2427     </condition>
2428     <condition id="RTOS2 RTX5 Lib">
2429       <description>Components required for RTOS2 RTX5 Library</description>
2430       <require condition="ARMv6_7_8-M Device"/>
2431       <require condition="ARMCC GCC IAR"/>
2432       <require Cclass="CMSIS"  Cgroup="CORE"/>
2433       <require Cclass="Device" Cgroup="Startup"/>
2434     </condition>
2435     <condition id="RTOS2 RTX5 NS">
2436       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2437       <require condition="ARMv8-M TZ Device"/>
2438       <require condition="ARMCC GCC IAR"/>
2439       <require Cclass="CMSIS"  Cgroup="CORE"/>
2440       <require Cclass="Device" Cgroup="Startup"/>
2441     </condition>
2442
2443     <!-- OS Tick -->
2444     <condition id="OS Tick PTIM">
2445       <description>Components required for OS Tick Private Timer</description>
2446       <require condition="CA5_CA9"/>
2447       <require Cclass="Device" Cgroup="IRQ Controller"/>
2448     </condition>
2449
2450     <condition id="OS Tick GTIM">
2451       <description>Components required for OS Tick Generic Physical Timer</description>
2452       <require condition="CA7"/>
2453       <require Cclass="Device" Cgroup="IRQ Controller"/>
2454     </condition>
2455
2456   </conditions>
2457
2458   <components>
2459     <!-- CMSIS-Core component -->
2460     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.4.0"  condition="ARMv6_7_8-M Device" >
2461       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2462       <files>
2463         <!-- CPU independent -->
2464         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2465         <file category="include" name="CMSIS/Core/Include/"/>
2466         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2467         <!-- Code template -->
2468         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2469         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2470       </files>
2471     </component>
2472
2473     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.4"  condition="ARMv7-A Device" >
2474       <description>CMSIS-CORE for Cortex-A</description>
2475       <files>
2476         <!-- CPU independent -->
2477         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2478         <file category="include" name="CMSIS/Core_A/Include/"/>
2479       </files>
2480     </component>
2481
2482     <!-- CMSIS-Startup components -->
2483     <!-- Cortex-M0 -->
2484     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM0 CMSIS">
2485       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2486       <files>
2487         <!-- include folder / device header file -->
2488         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2489         <!-- startup / system file -->
2490         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.2" attr="config"/>
2491         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2492         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2493         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2494         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2495       </files>
2496     </component>
2497     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2498       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2499       <files>
2500         <!-- include folder / device header file -->
2501         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2502         <!-- startup / system file -->
2503         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2504         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.0.1" attr="config" condition="GCC"/>
2505         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2506         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2507         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2508       </files>
2509     </component>
2510
2511     <!-- Cortex-M0+ -->
2512     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM0+ CMSIS">
2513       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2514       <files>
2515         <!-- include folder / device header file -->
2516         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2517         <!-- startup / system file -->
2518         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.2" attr="config"/>
2519         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2520         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2521         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2522         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2523       </files>
2524     </component>
2525     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0+ CMSIS">
2526       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2527       <files>
2528         <!-- include folder / device header file -->
2529         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2530         <!-- startup / system file -->
2531         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2532         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.0.1" attr="config" condition="GCC"/>
2533         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2534         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2535         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2536       </files>
2537     </component>
2538
2539     <!-- Cortex-M1 -->
2540     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM1 CMSIS">
2541       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2542       <files>
2543         <!-- include folder / device header file -->
2544         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2545         <!-- startup / system file -->
2546         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.2" attr="config"/>
2547         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2548         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2549         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2550         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2551       </files>
2552     </component>
2553     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2554       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2555       <files>
2556         <!-- include folder / device header file -->
2557         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2558         <!-- startup / system file -->
2559         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2560         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.0.1" attr="config" condition="GCC"/>
2561         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2562         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2563         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2564       </files>
2565     </component>
2566
2567     <!-- Cortex-M3 -->
2568     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM3 CMSIS">
2569       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2570       <files>
2571         <!-- include folder / device header file -->
2572         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2573         <!-- startup / system file -->
2574         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.2" attr="config"/>
2575         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2576         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2577         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2578         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2579       </files>
2580     </component>
2581     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2582       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2583       <files>
2584         <!-- include folder / device header file -->
2585         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2586         <!-- startup / system file -->
2587         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2588         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.0.1" attr="config" condition="GCC"/>
2589         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2590         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2591         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2592       </files>
2593     </component>
2594
2595     <!-- Cortex-M4 -->
2596     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM4 CMSIS">
2597       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2598       <files>
2599         <!-- include folder / device header file -->
2600         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2601         <!-- startup / system file -->
2602         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.2" attr="config"/>
2603         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2604         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2605         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2606        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2607       </files>
2608     </component>
2609     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2610       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2611       <files>
2612         <!-- include folder / device header file -->
2613         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2614         <!-- startup / system file -->
2615         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2616         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.0.1" attr="config" condition="GCC"/>
2617         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2618         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2619         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2620       </files>
2621     </component>
2622
2623     <!-- Cortex-M7 -->
2624     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM7 CMSIS">
2625       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2626       <files>
2627         <!-- include folder / device header file -->
2628         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2629         <!-- startup / system file -->
2630         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.2" attr="config"/>
2631         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2632         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2633         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2634         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2635       </files>
2636     </component>
2637     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2638       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2639       <files>
2640         <!-- include folder / device header file -->
2641         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2642         <!-- startup / system file -->
2643         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2644         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.0.1" attr="config" condition="GCC"/>
2645         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2646         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2647         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2648       </files>
2649     </component>
2650
2651     <!-- Cortex-M23 -->
2652     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM23 CMSIS">
2653       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2654       <files>
2655         <!-- include folder / device header file -->
2656         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2657         <!-- startup / system file -->
2658         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.2" attr="config"/>
2659         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
2660         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2661         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2662         <!-- SAU configuration -->
2663         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2664       </files>
2665     </component>
2666     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM23 CMSIS">
2667       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2668       <files>
2669         <!-- include folder / device header file -->
2670         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2671         <!-- startup / system file -->
2672         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.1" attr="config" condition="ARMCC"/>
2673         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.0.1" attr="config" condition="GCC"/>
2674         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.0.0" attr="config" condition="GCC"/>
2675         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2676         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2677         <!-- SAU configuration -->
2678         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2679       </files>
2680     </component>
2681
2682     <!-- Cortex-M33 -->
2683     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM33 CMSIS">
2684       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2685       <files>
2686         <!-- include folder / device header file -->
2687         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2688         <!-- startup / system file -->
2689         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.2" attr="config"/>
2690         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2691         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2692         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2693         <!-- SAU configuration -->
2694         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2695       </files>
2696     </component>
2697     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM33 CMSIS">
2698       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2699       <files>
2700         <!-- include folder / device header file -->
2701         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2702         <!-- startup / system file -->
2703         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2704         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.0.1" attr="config" condition="GCC"/>
2705         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2706         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2707         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2708         <!-- SAU configuration -->
2709         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2710       </files>
2711     </component>
2712
2713     <!-- Cortex-M35P -->
2714     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM35P CMSIS">
2715       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2716       <files>
2717         <!-- include folder / device header file -->
2718         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2719         <!-- startup / system file -->
2720         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.2" attr="config"/>
2721         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2722         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2723         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2724         <!-- SAU configuration -->
2725         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2726       </files>
2727     </component>
2728     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM35P CMSIS">
2729       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2730       <files>
2731         <!-- include folder / device header file -->
2732         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2733         <!-- startup / system file -->
2734         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2735         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.1" attr="config" condition="GCC"/>
2736         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2737         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
2738         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2739         <!-- SAU configuration -->
2740         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2741       </files>
2742     </component>
2743
2744     <!-- Cortex-M55 -->
2745     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM55 CMSIS">
2746       <description>System and Startup for Generic Cortex-M55 device</description>
2747       <files>
2748         <!-- include folder / device header file -->
2749         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2750         <!-- startup / system file -->
2751         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="2.0.2" attr="config"/>
2752         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2753         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2754         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.2.0" attr="config"/>
2755         <!-- SAU configuration -->
2756         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2757       </files>
2758     </component>
2759
2760     <!-- Cortex-SC000 -->
2761     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS">
2762       <description>System and Startup for Generic Arm SC000 device</description>
2763       <files>
2764         <!-- include folder / device header file -->
2765         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2766         <!-- startup / system file -->
2767         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.2" attr="config"/>
2768         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2769         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2770         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2771         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2772       </files>
2773     </component>
2774     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2775       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2776       <files>
2777         <!-- include folder / device header file -->
2778         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2779         <!-- startup / system file -->
2780         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2781         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.0.1" attr="config" condition="GCC"/>
2782         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2783         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2784         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2785       </files>
2786     </component>
2787
2788     <!-- Cortex-SC300 -->
2789     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS">
2790       <description>System and Startup for Generic Arm SC300 device</description>
2791       <files>
2792         <!-- include folder / device header file -->
2793         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2794         <!-- startup / system file -->
2795         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.2" attr="config"/>
2796         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2797         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2798         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2799         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2800       </files>
2801     </component>
2802     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2803       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2804       <files>
2805         <!-- include folder / device header file -->
2806         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2807         <!-- startup / system file -->
2808         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2809         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.0.1" attr="config" condition="GCC"/>
2810         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2811         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2812         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2813       </files>
2814     </component>
2815
2816     <!-- ARMv8MBL -->
2817     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMv8MBL CMSIS">
2818       <description>System and Startup for Generic Armv8-M Baseline device</description>
2819       <files>
2820         <!-- include folder / device header file -->
2821         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2822         <!-- startup / system file -->
2823         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.2" attr="config"/>
2824         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
2825         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2826         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2827         <!-- SAU configuration -->
2828         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2829       </files>
2830     </component>
2831     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMv8MBL CMSIS">
2832       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2833       <files>
2834         <!-- include folder / device header file -->
2835         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2836         <!-- startup / system file -->
2837         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.1" attr="config" condition="ARMCC"/>
2838         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.0.1" attr="config" condition="GCC"/>
2839         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2840         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2841         <!-- SAU configuration -->
2842         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2843       </files>
2844     </component>
2845
2846     <!-- ARMv8MML -->
2847     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMv8MML CMSIS">
2848       <description>System and Startup for Generic Armv8-M Mainline device</description>
2849       <files>
2850         <!-- include folder / device header file -->
2851         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2852         <!-- startup / system file -->
2853         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.2" attr="config"/>
2854         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2855         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2856         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2857         <!-- SAU configuration -->
2858         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2859       </files>
2860     </component>
2861     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMv8MML CMSIS">
2862       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2863       <files>
2864         <!-- include folder / device header file -->
2865         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2866         <!-- startup / system file -->
2867         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2868         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.0.1" attr="config" condition="GCC"/>
2869         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2870         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2871         <!-- SAU configuration -->
2872         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2873       </files>
2874     </component>
2875
2876     <!-- ARMv81MML -->
2877     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv81MML CMSIS">
2878       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2879       <files>
2880         <!-- include folder / device header file -->
2881         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2882         <!-- startup / system file -->
2883         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.2" attr="config"/>
2884         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2885         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.0.0" attr="config" condition="GCC"/>
2886         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.0" attr="config"/>
2887         <!-- SAU configuration -->
2888         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2889       </files>
2890     </component>
2891
2892     <!-- Cortex-A5 -->
2893     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2894       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2895       <files>
2896         <!-- include folder / device header file -->
2897         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2898         <!-- startup / system / mmu files -->
2899         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2900         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2901         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2902         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2903         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2904         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2905         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2906         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2907         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2908         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2909         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2910         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2911
2912       </files>
2913     </component>
2914
2915     <!-- Cortex-A7 -->
2916     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2917       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2918       <files>
2919         <!-- include folder / device header file -->
2920         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2921         <!-- startup / system / mmu files -->
2922         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2923         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2924         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2925         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2926         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2927         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2928         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2929         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2930         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2931         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2932         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2933         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2934       </files>
2935     </component>
2936
2937     <!-- Cortex-A9 -->
2938     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2939       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2940       <files>
2941         <!-- include folder / device header file -->
2942         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2943         <!-- startup / system / mmu files -->
2944         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2945         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2946         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2947         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2948         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2949         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2950         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2951         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2952         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2953         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2954         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2955         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2956       </files>
2957     </component>
2958
2959     <!-- IRQ Controller -->
2960     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2961       <description>IRQ Controller implementation using GIC</description>
2962       <files>
2963         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2964       </files>
2965     </component>
2966
2967     <!-- OS Tick -->
2968     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2969       <description>OS Tick implementation using Private Timer</description>
2970       <files>
2971         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2972       </files>
2973     </component>
2974
2975     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2976       <description>OS Tick implementation using Generic Physical Timer</description>
2977       <files>
2978         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2979       </files>
2980     </component>
2981
2982     <!-- CMSIS-DSP component -->
2983     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.7.0" isDefaultVariant="true" condition="CMSIS DSP">
2984       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2985       <files>
2986         <!-- CPU independent -->
2987         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2988         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
2989
2990         <!-- CPU and Compiler dependent -->
2991         <!-- ARMCC -->
2992         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2993         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2994         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2995         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2996         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2997         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2998         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2999         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3000         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3001         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3002         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3003         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3004         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3005         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3006         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3007         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3008
3009         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3010         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3011         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3012         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3013         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3014         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3015         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3016         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3017         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3018         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3019         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3020         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3021         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3022         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3023         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3024         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3025
3026         <!-- GCC -->
3027         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3028         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3029         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3030         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3031         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3032         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3033         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3034         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3035
3036         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3037         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3038         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3039         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3040         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3041         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3042         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3043         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3044         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3045         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3046         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3047         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3048         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3049         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3050         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3051         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3052
3053   <!-- IAR -->
3054         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3055         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3056         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3057         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3058         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3059         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3060         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3061         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3062         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3063         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3064         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3065         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3066         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3067         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3068         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3069         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3070
3071         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3072         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3073         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3074         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3075         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3076         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3077         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3078         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3079         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3080         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3081         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3082         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3083         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3084         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3085         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3086         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3087
3088       </files>
3089     </component>
3090     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.7.0" condition="CMSIS DSP">
3091       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3092       <files>
3093         <!-- CPU independent -->
3094         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3095         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3096
3097         <!-- DSP sources (core) -->
3098         <file category="source" name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3099         <file category="source" name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3100         <file category="source" name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3101         <file category="source" name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3102         <file category="source" name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3103         <file category="source" name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3104         <file category="source" name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3105         <file category="source" name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3106         <file category="source" name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3107         <file category="source" name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3108
3109       </files>
3110     </component>
3111
3112     <!-- CMSIS-NN component -->
3113     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.2.0" condition="CMSIS NN">
3114       <description>CMSIS-NN Neural Network Library</description>
3115       <files>
3116         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3117         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3118
3119         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3120         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3121         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3122         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3123
3124         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3125         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3126         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3127         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3128         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3129         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3130         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3131         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3132         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3133         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3134         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3135         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3136         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
3137
3138         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3139         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3140         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3141         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3142         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3143         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3144
3145         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3146         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3147         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3148         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3149         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3150
3151         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3152
3153         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3154         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3155       </files>
3156     </component>
3157
3158     <!-- CMSIS-RTOS Keil RTX component -->
3159     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3160       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3161       <RTE_Components_h>
3162         <!-- the following content goes into file 'RTE_Components.h' -->
3163         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3164         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3165       </RTE_Components_h>
3166       <files>
3167         <!-- CPU independent -->
3168         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3169         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3170         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3171
3172         <!-- RTX templates -->
3173         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3174         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3175         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3176         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3177         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3178         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3179         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3180         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3181         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3182         <!-- tool-chain specific template file -->
3183         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3184         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3185         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3186
3187         <!-- CPU and Compiler dependent -->
3188         <!-- ARMCC -->
3189         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3190         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3191         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3192         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3193         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3194         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3195         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3196         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3197         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3198         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3199         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3200         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3201         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3202         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3203         <!-- GCC -->
3204         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3205         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3206         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3207         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3208         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3209         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3210         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3211         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3212         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3213         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3214         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3215         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3216         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3217         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3218         <!-- IAR -->
3219         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3220         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3221         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3222         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3223         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3224         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3225         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3226         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3227         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3228         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3229         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3230         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3231         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3232         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3233       </files>
3234     </component>
3235     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3236     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3237       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3238       <RTE_Components_h>
3239         <!-- the following content goes into file 'RTE_Components.h' -->
3240         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3241         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3242       </RTE_Components_h>
3243       <files>
3244         <!-- CPU independent -->
3245         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3246         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3247         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3248
3249         <!-- RTX templates -->
3250         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3251         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3252         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3253         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3254         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3255         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3256         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3257         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3258         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3259         <!-- tool-chain specific template file -->
3260         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3261         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3262         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3263
3264         <!-- CPU and Compiler dependent -->
3265         <!-- ARMCC -->
3266         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3267         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3268         <!-- GCC -->
3269         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3270         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3271         <!-- IAR -->
3272       </files>
3273     </component>
3274
3275     <!-- CMSIS-RTOS Keil RTX5 component -->
3276     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.2" Capiversion="1.0.0" condition="RTOS RTX5">
3277       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3278       <RTE_Components_h>
3279         <!-- the following content goes into file 'RTE_Components.h' -->
3280         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3281         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3282       </RTE_Components_h>
3283       <files>
3284         <!-- RTX header file -->
3285         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3286         <!-- RTX compatibility module for API V1 -->
3287         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3288       </files>
3289     </component>
3290
3291     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3292     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
3293       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
3294       <RTE_Components_h>
3295         <!-- the following content goes into file 'RTE_Components.h' -->
3296         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3297         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3298       </RTE_Components_h>
3299       <files>
3300         <!-- RTX documentation -->
3301         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3302
3303         <!-- RTX header files -->
3304         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3305
3306         <!-- RTX configuration -->
3307         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3308         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3309
3310         <!-- RTX templates -->
3311         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3312         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3313         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3314         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3315         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3316         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3317         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3318         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3319         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3320         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3321
3322         <!-- RTX library configuration -->
3323         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3324
3325         <!-- RTX libraries (CPU and Compiler dependent) -->
3326         <!-- ARMCC -->
3327         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3328         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3329         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3330         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3331         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3332         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3333         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3334         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3335         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3336         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3337         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3338         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3339         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3340         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3341         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3342         <!-- GCC -->
3343         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3344         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3345         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3346         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3347         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3348         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3349         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3350         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3351         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3352         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3353         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3354         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3355         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3356         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3357         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3358         <!-- IAR -->
3359         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3360         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3361         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3362         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3363         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3364         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3365         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3366         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3367         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3368         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3369         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3370         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3371         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3372         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3373         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3374       </files>
3375     </component>
3376     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3377       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
3378       <RTE_Components_h>
3379         <!-- the following content goes into file 'RTE_Components.h' -->
3380         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3381         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3382         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3383       </RTE_Components_h>
3384       <files>
3385         <!-- RTX documentation -->
3386         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3387
3388         <!-- RTX header files -->
3389         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3390
3391         <!-- RTX configuration -->
3392         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3393         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3394
3395         <!-- RTX templates -->
3396         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3397         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3398         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3399         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3400         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3401         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3402         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3403         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3404         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3405         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3406
3407         <!-- RTX library configuration -->
3408         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3409
3410         <!-- RTX libraries (CPU and Compiler dependent) -->
3411         <!-- ARMCC -->
3412         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3413         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3414         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3415         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3416         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3417         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3418         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3419         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3420         <!-- GCC -->
3421         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3422         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3423         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3424         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3425         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3426         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3427         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3428         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3429         <!-- IAR -->
3430         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3431         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3432         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3433         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3434         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3435         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3436         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3437         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3438       </files>
3439     </component>
3440     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3441       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3442       <RTE_Components_h>
3443         <!-- the following content goes into file 'RTE_Components.h' -->
3444         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3445         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3446         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3447       </RTE_Components_h>
3448       <files>
3449         <!-- RTX documentation -->
3450         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3451
3452         <!-- RTX header files -->
3453         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3454
3455         <!-- RTX configuration -->
3456         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3457         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3458
3459         <!-- RTX templates -->
3460         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3461         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3462         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3463         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3464         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3465         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3466         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3467         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3468         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3469         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3470
3471         <!-- RTX sources (core) -->
3472         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3473         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3474         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3475         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3476         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3477         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3478         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3479         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3480         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3481         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3482         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3483         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3484         <!-- RTX sources (library configuration) -->
3485         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3486         <!-- RTX sources (handlers ARMCC) -->
3487         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3488         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3489         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3490         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3491         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3492         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3493         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3494         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3495         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3496         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3497         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3498         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3499         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3500         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3501         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3502         <!-- RTX sources (handlers GCC) -->
3503         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3504         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3505         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3506         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3507         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3508         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3509         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3510         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3511         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3512         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3513         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3514         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3515         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3516         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3517         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3518         <!-- RTX sources (handlers IAR) -->
3519         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3520         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3521         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3522         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3523         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3524         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3525         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3526         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3527         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3528         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3529         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3530         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3531         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3532         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3533         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3534         <!-- OS Tick (SysTick) -->
3535         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3536       </files>
3537     </component>
3538     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3539       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3540       <RTE_Components_h>
3541         <!-- the following content goes into file 'RTE_Components.h' -->
3542         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3543         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3544         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3545       </RTE_Components_h>
3546       <files>
3547         <!-- RTX documentation -->
3548         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3549
3550         <!-- RTX header files -->
3551         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3552
3553         <!-- RTX configuration -->
3554         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3555         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3556
3557         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3558
3559         <!-- RTX templates -->
3560         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3561         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3562         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3563         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3564         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3565         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3566         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3567         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3568         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3569         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3570
3571         <!-- RTX sources (core) -->
3572         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3573         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3574         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3575         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3576         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3577         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3578         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3579         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3580         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3581         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3582         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3583         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3584         <!-- RTX sources (library configuration) -->
3585         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3586         <!-- RTX sources (handlers ARMCC) -->
3587         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3588         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3589         <!-- RTX sources (handlers GCC) -->
3590         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3591         <!-- RTX sources (handlers IAR) -->
3592         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3593       </files>
3594     </component>
3595     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3596       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3597       <RTE_Components_h>
3598         <!-- the following content goes into file 'RTE_Components.h' -->
3599         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3600         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3601         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3602         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3603       </RTE_Components_h>
3604       <files>
3605         <!-- RTX documentation -->
3606         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3607
3608         <!-- RTX header files -->
3609         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3610
3611         <!-- RTX configuration -->
3612         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3613         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3614
3615         <!-- RTX templates -->
3616         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3617         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3618         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3619         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3620         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3621         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3622         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3623         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3624         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3625         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3626
3627         <!-- RTX sources (core) -->
3628         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3629         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3630         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3631         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3632         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3633         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3634         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3635         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3636         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3637         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3638         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3639         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3640         <!-- RTX sources (library configuration) -->
3641         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3642         <!-- RTX sources (ARMCC handlers) -->
3643         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3644         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3645         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3646         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3647         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3648         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3649         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3650         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3651         <!-- RTX sources (GCC handlers) -->
3652         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3653         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3654         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3655         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3656         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3657         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3658         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3659         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3660         <!-- RTX sources (IAR handlers) -->
3661         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3662         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3663         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3664         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3665         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3666         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3667         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3668         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3669         <!-- OS Tick (SysTick) -->
3670         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3671       </files>
3672     </component>
3673
3674     <!-- CMSIS-Driver Custom components -->
3675     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3676       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3677       <files>
3678         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3679         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3680       </files>
3681     </component>
3682     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3683       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3684       <files>
3685         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3686         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3687       </files>
3688     </component>
3689     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3690       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3691       <files>
3692         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3693         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3694       </files>
3695     </component>
3696     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3697       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3698       <files>
3699         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3700         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3701       </files>
3702     </component>
3703     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3704       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3705       <files>
3706         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3707         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3708       </files>
3709     </component>
3710     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3711       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3712       <files>
3713         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3714         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3715       </files>
3716     </component>
3717     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3718       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3719       <files>
3720         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3721         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3722       </files>
3723     </component>
3724     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3725       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3726       <files>
3727         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3728         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3729       </files>
3730     </component>
3731     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3732       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3733       <files>
3734         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3735         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3736         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3737         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3738       </files>
3739     </component>
3740     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3741       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3742       <files>
3743         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3744         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3745       </files>
3746     </component>
3747     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3748       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3749       <files>
3750         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3751         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3752       </files>
3753     </component>
3754     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3755       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3756       <files>
3757         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3758         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3759       </files>
3760     </component>
3761     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3762       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3763       <files>
3764         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3765         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3766       </files>
3767     </component>
3768     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3769       <description>Access to #include Driver_WiFi.h file</description>
3770       <files>
3771         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3772         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3773       </files>
3774     </component>
3775   </components>
3776
3777   <boards>
3778     <board name="uVision Simulator" vendor="Keil">
3779       <description>uVision Simulator</description>
3780       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3781       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3782       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3783       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3784       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3785       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3786       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3787       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3788       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3789       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3790       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3791       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3792       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3793       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3794       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3795       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3796       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3797       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3798       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3799       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3800       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3801       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3802       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3803       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3804     </board>
3805
3806     <board name="EWARM Simulator" vendor="IAR">
3807       <description>EWARM Simulator</description>
3808       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3809       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3810       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3811       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3812       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3813       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3814       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3815       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3816       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3817       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3818       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3819       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3820       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3821       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3822       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3823       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3824       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3825       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3826       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3827       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3828       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3829       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3830       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3831       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3832     </board>
3833   </boards>
3834
3835   <examples>
3836     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3837       <description>DSP_Lib Class Marks example</description>
3838       <board name="uVision Simulator" vendor="Keil"/>
3839       <project>
3840         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3841       </project>
3842       <attributes>
3843         <component Cclass="CMSIS" Cgroup="CORE"/>
3844         <component Cclass="CMSIS" Cgroup="DSP"/>
3845         <component Cclass="Device" Cgroup="Startup"/>
3846         <category>Getting Started</category>
3847       </attributes>
3848     </example>
3849
3850     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3851       <description>DSP_Lib Convolution example</description>
3852       <board name="uVision Simulator" vendor="Keil"/>
3853       <project>
3854         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3855       </project>
3856       <attributes>
3857         <component Cclass="CMSIS" Cgroup="CORE"/>
3858         <component Cclass="CMSIS" Cgroup="DSP"/>
3859         <component Cclass="Device" Cgroup="Startup"/>
3860         <category>Getting Started</category>
3861       </attributes>
3862     </example>
3863
3864     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3865       <description>DSP_Lib Dotproduct example</description>
3866       <board name="uVision Simulator" vendor="Keil"/>
3867       <project>
3868         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3869       </project>
3870       <attributes>
3871         <component Cclass="CMSIS" Cgroup="CORE"/>
3872         <component Cclass="CMSIS" Cgroup="DSP"/>
3873         <component Cclass="Device" Cgroup="Startup"/>
3874         <category>Getting Started</category>
3875       </attributes>
3876     </example>
3877
3878     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3879       <description>DSP_Lib FFT Bin example</description>
3880       <board name="uVision Simulator" vendor="Keil"/>
3881       <project>
3882         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3883       </project>
3884       <attributes>
3885         <component Cclass="CMSIS" Cgroup="CORE"/>
3886         <component Cclass="CMSIS" Cgroup="DSP"/>
3887         <component Cclass="Device" Cgroup="Startup"/>
3888         <category>Getting Started</category>
3889       </attributes>
3890     </example>
3891
3892     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3893       <description>DSP_Lib FIR example</description>
3894       <board name="uVision Simulator" vendor="Keil"/>
3895       <project>
3896         <environment name="uv" load="arm_fir_example.uvprojx"/>
3897       </project>
3898       <attributes>
3899         <component Cclass="CMSIS" Cgroup="CORE"/>
3900         <component Cclass="CMSIS" Cgroup="DSP"/>
3901         <component Cclass="Device" Cgroup="Startup"/>
3902         <category>Getting Started</category>
3903       </attributes>
3904     </example>
3905
3906     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3907       <description>DSP_Lib Graphic Equalizer example</description>
3908       <board name="uVision Simulator" vendor="Keil"/>
3909       <project>
3910         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3911       </project>
3912       <attributes>
3913         <component Cclass="CMSIS" Cgroup="CORE"/>
3914         <component Cclass="CMSIS" Cgroup="DSP"/>
3915         <component Cclass="Device" Cgroup="Startup"/>
3916         <category>Getting Started</category>
3917       </attributes>
3918     </example>
3919
3920     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3921       <description>DSP_Lib Linear Interpolation example</description>
3922       <board name="uVision Simulator" vendor="Keil"/>
3923       <project>
3924         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3925       </project>
3926       <attributes>
3927         <component Cclass="CMSIS" Cgroup="CORE"/>
3928         <component Cclass="CMSIS" Cgroup="DSP"/>
3929         <component Cclass="Device" Cgroup="Startup"/>
3930         <category>Getting Started</category>
3931       </attributes>
3932     </example>
3933
3934     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3935       <description>DSP_Lib Matrix example</description>
3936       <board name="uVision Simulator" vendor="Keil"/>
3937       <project>
3938         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3939       </project>
3940       <attributes>
3941         <component Cclass="CMSIS" Cgroup="CORE"/>
3942         <component Cclass="CMSIS" Cgroup="DSP"/>
3943         <component Cclass="Device" Cgroup="Startup"/>
3944         <category>Getting Started</category>
3945       </attributes>
3946     </example>
3947
3948     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3949       <description>DSP_Lib Signal Convergence example</description>
3950       <board name="uVision Simulator" vendor="Keil"/>
3951       <project>
3952         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3953       </project>
3954       <attributes>
3955         <component Cclass="CMSIS" Cgroup="CORE"/>
3956         <component Cclass="CMSIS" Cgroup="DSP"/>
3957         <component Cclass="Device" Cgroup="Startup"/>
3958         <category>Getting Started</category>
3959       </attributes>
3960     </example>
3961
3962     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3963       <description>DSP_Lib Sinus/Cosinus example</description>
3964       <board name="uVision Simulator" vendor="Keil"/>
3965       <project>
3966         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3967       </project>
3968       <attributes>
3969         <component Cclass="CMSIS" Cgroup="CORE"/>
3970         <component Cclass="CMSIS" Cgroup="DSP"/>
3971         <component Cclass="Device" Cgroup="Startup"/>
3972         <category>Getting Started</category>
3973       </attributes>
3974     </example>
3975
3976     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3977       <description>DSP_Lib Variance example</description>
3978       <board name="uVision Simulator" vendor="Keil"/>
3979       <project>
3980         <environment name="uv" load="arm_variance_example.uvprojx"/>
3981       </project>
3982       <attributes>
3983         <component Cclass="CMSIS" Cgroup="CORE"/>
3984         <component Cclass="CMSIS" Cgroup="DSP"/>
3985         <component Cclass="Device" Cgroup="Startup"/>
3986         <category>Getting Started</category>
3987       </attributes>
3988     </example>
3989
3990     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3991       <description>Neural Network CIFAR10 example</description>
3992       <board name="uVision Simulator" vendor="Keil"/>
3993       <project>
3994         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3995       </project>
3996       <attributes>
3997         <component Cclass="CMSIS" Cgroup="CORE"/>
3998         <component Cclass="CMSIS" Cgroup="DSP"/>
3999         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4000         <component Cclass="Device" Cgroup="Startup"/>
4001         <category>Getting Started</category>
4002       </attributes>
4003     </example>
4004
4005     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4006       <description>Neural Network CIFAR10 example</description>
4007       <board name="EWARM Simulator" vendor="IAR"/>
4008       <project>
4009         <environment name="iar" load="NN-example-cifar10.ewp"/>
4010       </project>
4011       <attributes>
4012         <component Cclass="CMSIS" Cgroup="CORE"/>
4013         <component Cclass="CMSIS" Cgroup="DSP"/>
4014         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4015         <component Cclass="Device" Cgroup="Startup"/>
4016         <category>Getting Started</category>
4017       </attributes>
4018     </example>
4019
4020     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4021       <description>Neural Network GRU example</description>
4022       <board name="uVision Simulator" vendor="Keil"/>
4023       <project>
4024         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4025       </project>
4026       <attributes>
4027         <component Cclass="CMSIS" Cgroup="CORE"/>
4028         <component Cclass="CMSIS" Cgroup="DSP"/>
4029         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4030         <component Cclass="Device" Cgroup="Startup"/>
4031         <category>Getting Started</category>
4032       </attributes>
4033     </example>
4034
4035     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4036       <description>Neural Network GRU example</description>
4037       <board name="EWARM Simulator" vendor="IAR"/>
4038       <project>
4039         <environment name="iar" load="NN-example-gru.ewp"/>
4040       </project>
4041       <attributes>
4042         <component Cclass="CMSIS" Cgroup="CORE"/>
4043         <component Cclass="CMSIS" Cgroup="DSP"/>
4044         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4045         <component Cclass="Device" Cgroup="Startup"/>
4046         <category>Getting Started</category>
4047       </attributes>
4048     </example>
4049
4050     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4051       <description>CMSIS-RTOS2 Blinky example</description>
4052       <board name="uVision Simulator" vendor="Keil"/>
4053       <project>
4054         <environment name="uv" load="Blinky.uvprojx"/>
4055       </project>
4056       <attributes>
4057         <component Cclass="CMSIS" Cgroup="CORE"/>
4058         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4059         <component Cclass="Device" Cgroup="Startup"/>
4060         <category>Getting Started</category>
4061       </attributes>
4062     </example>
4063
4064     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4065       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4066       <board name="uVision Simulator" vendor="Keil"/>
4067       <project>
4068         <environment name="uv" load="Blinky.uvprojx"/>
4069       </project>
4070       <attributes>
4071         <component Cclass="CMSIS" Cgroup="CORE"/>
4072         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4073         <component Cclass="Device" Cgroup="Startup"/>
4074         <category>Getting Started</category>
4075       </attributes>
4076     </example>
4077
4078     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4079       <description>CMSIS-RTOS2 Message Queue Example</description>
4080       <board name="uVision Simulator" vendor="Keil"/>
4081       <project>
4082         <environment name="uv" load="MsqQueue.uvprojx"/>
4083       </project>
4084       <attributes>
4085         <component Cclass="CMSIS" Cgroup="CORE"/>
4086         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4087         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4088         <component Cclass="Device" Cgroup="Startup"/>
4089         <category>Getting Started</category>
4090       </attributes>
4091     </example>
4092
4093     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4094       <description>CMSIS-RTOS2 Memory Pool Example</description>
4095       <board name="uVision Simulator" vendor="Keil"/>
4096       <project>
4097         <environment name="uv" load="MemPool.uvprojx"/>
4098       </project>
4099       <attributes>
4100         <component Cclass="CMSIS" Cgroup="CORE"/>
4101         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4102         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4103         <component Cclass="Device" Cgroup="Startup"/>
4104         <category>Getting Started</category>
4105       </attributes>
4106     </example>
4107
4108     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4109       <description>Bare-metal secure/non-secure example without RTOS</description>
4110       <board name="uVision Simulator" vendor="Keil"/>
4111       <project>
4112         <environment name="uv" load="NoRTOS.uvmpw"/>
4113       </project>
4114       <attributes>
4115         <component Cclass="CMSIS" Cgroup="CORE"/>
4116         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4117         <component Cclass="Device" Cgroup="Startup"/>
4118         <category>Getting Started</category>
4119       </attributes>
4120     </example>
4121
4122     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4123       <description>Secure/non-secure RTOS example with thread context management</description>
4124       <board name="uVision Simulator" vendor="Keil"/>
4125       <project>
4126         <environment name="uv" load="RTOS.uvmpw"/>
4127       </project>
4128       <attributes>
4129         <component Cclass="CMSIS" Cgroup="CORE"/>
4130         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4131         <component Cclass="Device" Cgroup="Startup"/>
4132         <category>Getting Started</category>
4133       </attributes>
4134     </example>
4135
4136     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4137       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4138       <board name="uVision Simulator" vendor="Keil"/>
4139       <project>
4140         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4141       </project>
4142       <attributes>
4143         <component Cclass="CMSIS" Cgroup="CORE"/>
4144         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4145         <component Cclass="Device" Cgroup="Startup"/>
4146         <category>Getting Started</category>
4147       </attributes>
4148     </example>
4149
4150   </examples>
4151
4152 </package>