begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Common Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.8.1">
  12       Active development ...
  13       CMSIS-DSP: 1.10.0 (see revision history for details)
  14       CMSIS-NN: 3.1.0 (see revision history for details)
  15        - Support for int16 convolution and fully connected for reference implementation
  16        - Support for DSP extension optimization for int16 convolution and fully connected
  17        - Support dilation for int8 convolution
  18        - Support dilation for int8 depthwise convolution
  19       CMSIS-RTOS2:
  20         - RTX 5.5.4 (see revision history for details)
  21     </release>
  22     <release version="5.8.0" date="2021-06-24">
  23       CMSIS-Core(M): 5.5.0 (see revision history for details)
  24         - Updated GCC LinkerDescription, GCC Assembler startup
  25         - Added Armv8-M Stack Sealing (to linker, startup) for toolchain ARM, GCC
  26         - Changed C-Startup to default Startup.
  27         - Updated Armv8-M Assembler startup to use GAS syntax
  28           Note: Updating existing projects may need manual user interaction!
  29       CMSIS-Core(A): 1.2.1 (see revision history for details)
  30         - Bugfixes for Cortex-A32
  31       CMSIS-DAP: 2.1.0 (see revision history for details)
  32         - Enhanced DAP_Info
  33         - Added extra UART support
  34       CMSIS-DSP: 1.9.0 (see revision history for details)
  35         - Purged pre-built libs from Git
  36         - Enhanced support for f16 datatype
  37         - Fixed couple of GCC issues
  38       CMSIS-NN: 3.0.0 (see revision history for details including version 2.0.0)
  39         - Major interface change for functions compatible with TensorFlow Lite for Microcontroller
  40         - Added optimization for SVDF kernel
  41         - Improved MVE performance for fully Connected and max pool operator
  42         - NULL bias support for fully connected operator in non-MVE case(Can affect performance)
  43         - Expanded existing unit test suite along with support for FVP
  44         - Removed Examples folder
  45       CMSIS-RTOS2:
  46         - RTX 5.5.3 (see revision history for details)
  47           - CVE-2021-27431 vulnerability mitigation.
  48           - Enhanced stack overrun checking.
  49           - Various bug fixes and improvements.
  50       CMSIS-Pack: 1.7.2 (see revision history for details)
  51         - Support for Microchip XC32 compiler
  52         - Support for Custom Datapath Extension
  53     </release>
  54     <release version="5.7.0" date="2020-04-09">
  55       CMSIS-Build: 0.9.0 (beta)
  56         - Draft for CMSIS Project description (CPRJ)
  57       CMSIS-Core(M): 5.4.0 (see revision history for details)
  58         - Cortex-M55 cpu support
  59         - Enhanced MVE support for Armv8.1-MML
  60         - Fixed device config define checks.
  61         - L1 Cache functions for Armv7-M and later
  62       CMSIS-Core(A): 1.2.0 (see revision history for details)
  63         - Fixed GIC_SetPendingIRQ to use GICD_SGIR
  64         - Added missing DSP intrinsics
  65         - Reworked assembly intrinsics: volatile, barriers and clobber
  66       CMSIS-DSP: 1.8.0 (see revision history for details)
  67         - Added new functions and function groups
  68         - Added MVE support
  69       CMSIS-NN: 1.3.0 (see revision history for details)
  70         - Added MVE support
  71         - Further optimizations for kernels using DSP extension
  72       CMSIS-RTOS2:
  73         - RTX 5.5.2 (see revision history for details)
  74       CMSIS-Driver: 2.8.0
  75         - Added VIO API 0.1.0 (Preview)
  76         - removed volatile from status related typedefs in APIs
  77         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  78       CMSIS-Pack: 1.6.3 (see revision history for details)
  79         - deprecating all types specific to cpdsc format. Cpdsc is replaced by Cprj with dedicated schema.
  80       Devices:
  81         - ARMCM55 device
  82         - ARMv81MML startup code recognizing __MVE_USED macro
  83         - Refactored vector table references for all Cortex-M devices
  84         - Reworked ARMCM* C-StartUp files.
  85         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  86       Utilities:
  87         Attention: Linux binaries moved to Linux64 folder!
  88         - SVDConv 3.3.35
  89         - PackChk 1.3.89
  90     </release>
  91     <release version="5.6.0" date="2019-07-10">
  92       CMSIS-Core(M): 5.3.0 (see revision history for details)
  93         - Added provisions for compiler-independent C startup code.
  94       CMSIS-Core(A): 1.1.4 (see revision history for details)
  95         - Fixed __FPU_Enable.
  96       CMSIS-DSP: 1.7.0 (see revision history for details)
  97         - New Neon versions of f32 functions
  98         - Python wrapper
  99         - Preliminary cmake build
 100         - Compilation flags for FFTs
 101         - Changes to arm_math.h
 102       CMSIS-NN: 1.2.0 (see revision history for details)
 103         - New function for depthwise convolution with asymmetric quantization.
 104         - New support functions for requantization.
 105       CMSIS-RTOS:
 106         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
 107       CMSIS-RTOS2:
 108         - RTX 5.5.1 (see revision history for details)
 109       CMSIS-Driver: 2.7.1
 110         - WiFi Interface API 1.0.0
 111       Devices:
 112         - Generalized C startup code for all Cortex-M family devices.
 113         - Updated Cortex-A default memory regions and MMU configurations
 114         - Moved Cortex-A memory and system config files to avoid include path issues
 115     </release>
 116     <release version="5.5.1" date="2019-03-20">
 117       The following folders are deprecated
 118         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 119
 120       CMSIS-Core(M): 5.2.1 (see revision history for details)
 121         - Fixed compilation issue in cmsis_armclang_ltm.h
 122     </release>
 123     <release version="5.5.0" date="2019-03-18">
 124       The following folders have been removed:
 125         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
 126         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
 127       The following folders are deprecated
 128         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 129
 130       CMSIS-Core(M): 5.2.0 (see revision history for details)
 131         - Reworked Stack/Heap configuration for ARM startup files.
 132         - Added Cortex-M35P device support.
 133         - Added generic Armv8.1-M Mainline device support.
 134       CMSIS-Core(A): 1.1.3 (see revision history for details)
 135       CMSIS-DSP: 1.6.0 (see revision history for details)
 136         - reworked DSP library source files
 137         - reworked DSP library documentation
 138         - Changed DSP folder structure
 139         - moved DSP libraries to folder ./DSP/Lib
 140         - ARM DSP Libraries are built with ARMCLANG
 141         - Added DSP Libraries Source variant
 142       CMSIS-RTOS2:
 143         - RTX 5.5.0 (see revision history for details)
 144       CMSIS-Driver: 2.7.0
 145         - Added WiFi Interface API 1.0.0-beta
 146         - Added components for project specific driver implementations
 147       CMSIS-Pack: 1.6.0 (see revision history for details)
 148       Devices:
 149         - Added Cortex-M35P and ARMv81MML device templates.
 150         - Fixed C-Startup Code for GCC (aligned with other compilers)
 151       Utilities:
 152         - SVDConv 3.3.25
 153         - PackChk 1.3.82
 154     </release>
 155     <release version="5.4.0" date="2018-08-01">
 156       Aligned pack structure with repository.
 157       The following folders are deprecated:
 158         - CMSIS/Include/
 159         - CMSIS/DSP_Lib/
 160
 161       CMSIS-Core(M): 5.1.2 (see revision history for details)
 162         - Added Cortex-M1 support (beta).
 163       CMSIS-Core(A): 1.1.2 (see revision history for details)
 164       CMSIS-NN: 1.1.0
 165         - Added new math functions.
 166       CMSIS-RTOS2:
 167         - API 2.1.3 (see revision history for details)
 168         - RTX 5.4.0 (see revision history for details)
 169           * Updated exception handling on Cortex-A
 170       CMSIS-Driver:
 171         - Flash Driver API V2.2.0
 172       Utilities:
 173         - SVDConv 3.3.21
 174         - PackChk 1.3.71
 175     </release>
 176     <release version="5.3.0" date="2018-02-22">
 177       Updated Arm company brand.
 178       CMSIS-Core(M): 5.1.1 (see revision history for details)
 179       CMSIS-Core(A): 1.1.1 (see revision history for details)
 180       CMSIS-DAP: 2.0.0 (see revision history for details)
 181       CMSIS-NN: 1.0.0
 182         - Initial contribution of the bare metal Neural Network Library.
 183       CMSIS-RTOS2:
 184         - RTX 5.3.0 (see revision history for details)
 185         - OS Tick API 1.0.1
 186     </release>
 187     <release version="5.2.0" date="2017-11-16">
 188       CMSIS-Core(M): 5.1.0 (see revision history for details)
 189         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 190         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 191       CMSIS-Core(A): 1.1.0 (see revision history for details)
 192         - Added compiler_iccarm.h.
 193         - Added additional access functions for physical timer.
 194       CMSIS-DAP: 1.2.0 (see revision history for details)
 195       CMSIS-DSP: 1.5.2 (see revision history for details)
 196       CMSIS-Driver: 2.6.0 (see revision history for details)
 197         - CAN Driver API V1.2.0
 198         - NAND Driver API V2.3.0
 199       CMSIS-RTOS:
 200         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 201       CMSIS-RTOS2:
 202         - API 2.1.2 (see revision history for details)
 203         - RTX 5.2.3 (see revision history for details)
 204       Devices:
 205         - Added GCC startup and linker script for Cortex-A9.
 206         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 207         - Added IAR startup code for Cortex-A9
 208     </release>
 209     <release version="5.1.1" date="2017-09-19">
 210       CMSIS-RTOS2:
 211       - RTX 5.2.1 (see revision history for details)
 212     </release>
 213     <release version="5.1.0" date="2017-08-04">
 214       CMSIS-Core(M): 5.0.2 (see revision history for details)
 215       - Changed Version Control macros to be core agnostic.
 216       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 217       CMSIS-Core(A): 1.0.0 (see revision history for details)
 218       - Initial release
 219       - IRQ Controller API 1.0.0
 220       CMSIS-Driver: 2.05 (see revision history for details)
 221       - All typedefs related to status have been made volatile.
 222       CMSIS-RTOS2:
 223       - API 2.1.1 (see revision history for details)
 224       - RTX 5.2.0 (see revision history for details)
 225       - OS Tick API 1.0.0
 226       CMSIS-DSP: 1.5.2 (see revision history for details)
 227       - Fixed GNU Compiler specific diagnostics.
 228       CMSIS-Pack: 1.5.0 (see revision history for details)
 229       - added System Description File (*.SDF) Format
 230       CMSIS-Zone: 0.0.1 (Preview)
 231       - Initial specification draft
 232     </release>
 233     <release version="5.0.1" date="2017-02-03">
 234       Package Description:
 235       - added taxonomy for Cclass RTOS
 236       CMSIS-RTOS2:
 237       - API 2.1   (see revision history for details)
 238       - RTX 5.1.0 (see revision history for details)
 239       CMSIS-Core: 5.0.1 (see revision history for details)
 240       - Added __PACKED_STRUCT macro
 241       - Added uVisior support
 242       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 243       - Updated template for secure main function (main_s.c)
 244       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 245       CMSIS-DSP: 1.5.1 (see revision history for details)
 246       - added ARMv8M DSP libraries.
 247       CMSIS-Pack:1.4.9 (see revision history for details)
 248       - added Pack Index File specification and schema file
 249     </release>
 250     <release version="5.0.0" date="2016-11-11">
 251       Changed open source license to Apache 2.0
 252       CMSIS_Core:
 253        - Added support for Cortex-M23 and Cortex-M33.
 254        - Added ARMv8-M device configurations for mainline and baseline.
 255        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 256        - Added cmsis_compiler.h to unify compiler behaviour.
 257        - Updated function SCB_EnableICache (for Cortex-M7).
 258        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 259       CMSIS-RTOS:
 260         - bug fix in RTX 4.82 (see revision history for details)
 261       CMSIS-RTOS2:
 262         - new API including compatibility layer to CMSIS-RTOS
 263         - reference implementation based on RTX5
 264         - supports all Cortex-M variants including TrustZone for ARMv8-M
 265       CMSIS-SVD:
 266        - reworked SVD format documentation
 267        - removed SVD file database documentation as SVD files are distributed in packs
 268        - updated SVDConv for Win32 and Linux
 269       CMSIS-DSP:
 270        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 271        - Added DSP libraries build projects to CMSIS pack.
 272     </release>
 273     <release version="4.5.0" date="2015-10-28">
 274       - CMSIS-Core     4.30.0  (see revision history for details)
 275       - CMSIS-DAP      1.1.0   (unchanged)
 276       - CMSIS-Driver   2.04.0  (see revision history for details)
 277       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 278       - CMSIS-Pack     1.4.1   (see revision history for details)
 279       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 280       - CMSIS-SVD      1.3.1   (see revision history for details)
 281     </release>
 282     <release version="4.4.0" date="2015-09-11">
 283       - CMSIS-Core     4.20   (see revision history for details)
 284       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 285       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 286       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 287       - CMSIS-RTOS
 288         -- API         1.02   (unchanged)
 289         -- RTX         4.79   (see revision history for details)
 290       - CMSIS-SVD      1.3.0  (see revision history for details)
 291       - CMSIS-DAP      1.1.0  (extended with SWO support)
 292     </release>
 293     <release version="4.3.0" date="2015-03-20">
 294       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 295       - CMSIS-DSP      1.4.5  (see revision history for details)
 296       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 297       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 298       - CMSIS-RTOS
 299         -- API         1.02   (unchanged)
 300         -- RTX         4.78   (see revision history for details)
 301       - CMSIS-SVD      1.2    (unchanged)
 302     </release>
 303     <release version="4.2.0" date="2014-09-24">
 304       Adding Cortex-M7 support
 305       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 306       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 307       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 308       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 309       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 310     </release>
 311     <release version="4.1.1" date="2014-06-30">
 312       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 313     </release>
 314     <release version="4.1.0" date="2014-06-12">
 315       - CMSIS-Driver   2.02  (incompatible update)
 316       - CMSIS-Pack     1.3   (see revision history for details)
 317       - CMSIS-DSP      1.4.2 (unchanged)
 318       - CMSIS-Core     3.30  (unchanged)
 319       - CMSIS-RTOS RTX 4.74  (unchanged)
 320       - CMSIS-RTOS API 1.02  (unchanged)
 321       - CMSIS-SVD      1.10  (unchanged)
 322       PACK:
 323       - removed G++ specific files from PACK
 324       - added Component Startup variant "C Startup"
 325       - added Pack Checking Utility
 326       - updated conditions to reflect tool-chain dependency
 327       - added Taxonomy for Graphics
 328       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 329     </release>
 330     <!-- release version="4.0.0">
 331       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 332       - CMSIS-Pack     1.1   Preliminary
 333       - CMSIS-DSP      1.4.2 (see revision history for details)
 334       - CMSIS-Core     3.30  (see revision history for details)
 335       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 336       - CMSIS-RTOS API 1.02  (unchanged)
 337       - CMSIS-SVD      1.10  (unchanged)
 338     </release -->
 339     <release version="3.20.4" date="2014-02-20">
 340       - CMSIS-RTOS 4.74 (see revision history for details)
 341       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 342     </release>
 343     <!-- release version="3.20.3">
 344       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 345       - CMSIS-RTOS 4.73 (see revision history for details)
 346     </release -->
 347     <!-- release version="3.20.2">
 348       - CMSIS-Pack documentation has been added
 349       - CMSIS-Drivers header and documentation have been added to PACK
 350       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 351     </release -->
 352     <!-- release version="3.20.1">
 353       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 354       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 355     </release -->
 356     <!-- release version="3.20.0">
 357       The software portions that are deployed in the application program are now under a BSD license which allows usage
 358       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 359       The individual components have been update as listed below:
 360       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 361       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 362       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 363       - CMSIS-SVD is unchanged.
 364     </release -->
 365   </releases>
 366
 367   <taxonomy>
 368     <description Cclass="Audio">Software components for audio processing</description>
 369     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 370     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 371     <description Cclass="Compiler">Compiler Software Extensions</description>
 372     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 373     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 374     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 375     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 376     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 377     <description Cclass="File System">File Drive Support and File System</description>
 378     <description Cclass="IoT Client">IoT cloud client connector</description>
 379     <description Cclass="IoT Service">IoT specific services</description>
 380     <description Cclass="IoT Utility">IoT specific software utility</description>
 381     <description Cclass="Graphics">Graphical User Interface</description>
 382     <description Cclass="Network">Network Stack using Internet Protocols</description>
 383     <description Cclass="RTOS">Real-time Operating System</description>
 384     <description Cclass="Security">Encryption for secure communication or storage</description>
 385     <description Cclass="USB">Universal Serial Bus Stack</description>
 386     <description Cclass="Utility">Generic software utility components</description>
 387   </taxonomy>
 388
 389   <devices>
 390     <!-- ******************************  Cortex-M0  ****************************** -->
 391     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 392       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 393       <description>
 394 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 395 - simple, easy-to-use programmers model
 396 - highly efficient ultra-low power operation
 397 - excellent code density
 398 - deterministic, high-performance interrupt handling
 399 - upward compatibility with the rest of the Cortex-M processor family.
 400       </description>
 401       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 402       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 403       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 404       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 405
 406       <device Dname="ARMCM0">
 407         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 408         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 409       </device>
 410     </family>
 411
 412     <!-- ******************************  Cortex-M0P  ****************************** -->
 413     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 414       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 415       <description>
 416 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 417 - simple, easy-to-use programmers model
 418 - highly efficient ultra-low power operation
 419 - excellent code density
 420 - deterministic, high-performance interrupt handling
 421 - upward compatibility with the rest of the Cortex-M processor family.
 422       </description>
 423       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 424       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 425       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 426       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 427
 428       <device Dname="ARMCM0P">
 429         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 430         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 431       </device>
 432
 433       <device Dname="ARMCM0P_MPU">
 434         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 435         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 436       </device>
 437     </family>
 438
 439     <!-- ******************************  Cortex-M1  ****************************** -->
 440     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 441       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 442       <description>
 443 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 444 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 445       </description>
 446       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 447       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 448       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 449       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 450
 451       <device Dname="ARMCM1">
 452         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 453         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 454       </device>
 455     </family>
 456
 457     <!-- ******************************  Cortex-M3  ****************************** -->
 458     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 459       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 460       <description>
 461 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 462 - simple, easy-to-use programmers model
 463 - highly efficient ultra-low power operation
 464 - excellent code density
 465 - deterministic, high-performance interrupt handling
 466 - upward compatibility with the rest of the Cortex-M processor family.
 467       </description>
 468       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 469       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 470       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 471       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 472
 473       <device Dname="ARMCM3">
 474         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 475         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 476       </device>
 477     </family>
 478
 479     <!-- ******************************  Cortex-M4  ****************************** -->
 480     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 481       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 482       <description>
 483 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 484 - simple, easy-to-use programmers model
 485 - highly efficient ultra-low power operation
 486 - excellent code density
 487 - deterministic, high-performance interrupt handling
 488 - upward compatibility with the rest of the Cortex-M processor family.
 489       </description>
 490       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 491       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 492       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 493       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 494
 495       <device Dname="ARMCM4">
 496         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 497         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 498       </device>
 499
 500       <device Dname="ARMCM4_FP">
 501         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 502         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 503       </device>
 504     </family>
 505
 506     <!-- ******************************  Cortex-M7  ****************************** -->
 507     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 508       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 509       <description>
 510 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 511 - simple, easy-to-use programmers model
 512 - highly efficient ultra-low power operation
 513 - excellent code density
 514 - deterministic, high-performance interrupt handling
 515 - upward compatibility with the rest of the Cortex-M processor family.
 516       </description>
 517       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 518       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 519       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 520       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 521
 522       <device Dname="ARMCM7">
 523         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 524         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 525       </device>
 526
 527       <device Dname="ARMCM7_SP">
 528         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 529         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 530       </device>
 531
 532       <device Dname="ARMCM7_DP">
 533         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 534         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 535       </device>
 536     </family>
 537
 538     <!-- ******************************  Cortex-M23  ********************** -->
 539     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 540       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 541       <description>
 542 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 543 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 544 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 545       </description>
 546       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 547       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 548       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 549       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 550       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 551       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 552
 553       <device Dname="ARMCM23">
 554         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 555         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 556       </device>
 557
 558       <device Dname="ARMCM23_TZ">
 559         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 560         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 561       </device>
 562     </family>
 563
 564     <!-- ******************************  Cortex-M33  ****************************** -->
 565     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 566       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 567       <description>
 568 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 569 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 570       </description>
 571       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 572       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 573       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 574       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 575       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 576       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 577
 578       <device Dname="ARMCM33">
 579         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 580         <description>
 581           no DSP Instructions, no Floating Point Unit, no TrustZone
 582         </description>
 583         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 584       </device>
 585
 586       <device Dname="ARMCM33_TZ">
 587         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 588         <description>
 589           no DSP Instructions, no Floating Point Unit, TrustZone
 590         </description>
 591         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 592       </device>
 593
 594       <device Dname="ARMCM33_DSP_FP">
 595         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 596         <description>
 597           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 598         </description>
 599         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 600       </device>
 601
 602       <device Dname="ARMCM33_DSP_FP_TZ">
 603         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 604         <description>
 605           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 606         </description>
 607         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 608       </device>
 609     </family>
 610
 611     <!-- ******************************  Cortex-M35P  ****************************** -->
 612     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 613       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 614       <description>
 615 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 616 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 617       </description>
 618
 619       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 620       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 621       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 622       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 623       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 624       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 625
 626       <device Dname="ARMCM35P">
 627         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 628         <description>
 629           no DSP Instructions, no Floating Point Unit, no TrustZone
 630         </description>
 631         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 632       </device>
 633
 634       <device Dname="ARMCM35P_TZ">
 635         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 636         <description>
 637           no DSP Instructions, no Floating Point Unit, TrustZone
 638         </description>
 639         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 640       </device>
 641
 642       <device Dname="ARMCM35P_DSP_FP">
 643         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 644         <description>
 645           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 646         </description>
 647         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 648       </device>
 649
 650       <device Dname="ARMCM35P_DSP_FP_TZ">
 651         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 652         <description>
 653           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 654         </description>
 655         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 656       </device>
 657     </family>
 658
 659     <!-- ******************************  Cortex-M55  ****************************** -->
 660     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 661       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 662       <description>
 663 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 664 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 665 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 666       </description>
 667
 668       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 669       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 670       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 671       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 672       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 673       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 674
 675       <device Dname="ARMCM55">
 676         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 677         <description>
 678           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 679         </description>
 680         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 681       </device>
 682     </family>
 683
 684     <!-- ******************************  ARMSC000  ****************************** -->
 685     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 686       <description>
 687 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 688 - simple, easy-to-use programmers model
 689 - highly efficient ultra-low power operation
 690 - excellent code density
 691 - deterministic, high-performance interrupt handling
 692       </description>
 693       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 694       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 695       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 696       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 697
 698       <device Dname="ARMSC000">
 699         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 700         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 701       </device>
 702     </family>
 703
 704     <!-- ******************************  ARMSC300  ****************************** -->
 705     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 706       <description>
 707 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 708 - simple, easy-to-use programmers model
 709 - highly efficient ultra-low power operation
 710 - excellent code density
 711 - deterministic, high-performance interrupt handling
 712       </description>
 713       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 714       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 715       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 716       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 717
 718       <device Dname="ARMSC300">
 719         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 720         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 721       </device>
 722     </family>
 723
 724     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 725     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 726       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 727       <description>
 728 Armv8-M Baseline based device with TrustZone
 729       </description>
 730       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 731       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 732       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 733       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 734       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 735       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 736
 737       <device Dname="ARMv8MBL">
 738         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 739         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 740       </device>
 741     </family>
 742
 743     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 744     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 745       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 746       <description>
 747 Armv8-M Mainline based device with TrustZone
 748       </description>
 749       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 750       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 751       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 752       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 753       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 754       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 755
 756       <device Dname="ARMv8MML">
 757         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 758         <description>
 759           no DSP Instructions, no Floating Point Unit, TrustZone
 760         </description>
 761         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 762       </device>
 763
 764       <device Dname="ARMv8MML_DSP">
 765         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 766         <description>
 767           DSP Instructions, no Floating Point Unit, TrustZone
 768         </description>
 769         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 770       </device>
 771
 772       <device Dname="ARMv8MML_SP">
 773         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 774         <description>
 775           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 776         </description>
 777         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 778       </device>
 779
 780       <device Dname="ARMv8MML_DSP_SP">
 781         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 782         <description>
 783           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 784         </description>
 785         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 786       </device>
 787
 788       <device Dname="ARMv8MML_DP">
 789         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 790         <description>
 791           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 792         </description>
 793         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 794       </device>
 795
 796       <device Dname="ARMv8MML_DSP_DP">
 797         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 798         <description>
 799           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 800         </description>
 801         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 802       </device>
 803     </family>
 804
 805     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 806     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 807       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 808       <description>
 809 Armv8.1-M Mainline based device with TrustZone and MVE
 810       </description>
 811       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 812       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 813       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 814       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 815       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 816       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 817
 818
 819       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 820         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 821         <description>
 822           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 823         </description>
 824         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 825       </device>
 826     </family>
 827
 828     <!-- ******************************  Cortex-A5  ****************************** -->
 829     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 830       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 831       <description>
 832 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 833 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 834 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 835       </description>
 836
 837       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 838       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 839       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 840       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 841
 842       <device Dname="ARMCA5">
 843         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 844         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 845       </device>
 846     </family>
 847
 848     <!-- ******************************  Cortex-A7  ****************************** -->
 849     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 850       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 851       <description>
 852 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 853 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 854 an optional integrated GIC, and an optional L2 cache controller.
 855       </description>
 856
 857       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 858       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 859       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 860       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 861
 862       <device Dname="ARMCA7">
 863         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 864         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 865       </device>
 866     </family>
 867
 868     <!-- ******************************  Cortex-A9  ****************************** -->
 869     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 870       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 871       <description>
 872 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 873 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 874 and 8-bit Java bytecodes in Jazelle state.
 875       </description>
 876
 877       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 878       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 879       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 880       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 881
 882       <device Dname="ARMCA9">
 883         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 884         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 885       </device>
 886     </family>
 887   </devices>
 888
 889
 890   <apis>
 891     <!-- CMSIS Device API -->
 892     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 893       <description>Device interrupt controller interface</description>
 894       <files>
 895         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 896       </files>
 897     </api>
 898     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 899       <description>RTOS Kernel system tick timer interface</description>
 900       <files>
 901         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 902       </files>
 903     </api>
 904     <!-- CMSIS-RTOS API -->
 905     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 906       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 907       <files>
 908         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 909       </files>
 910     </api>
 911     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 912       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 913       <files>
 914         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 915         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 916       </files>
 917     </api>
 918     <!-- CMSIS Driver API -->
 919     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 920       <description>USART Driver API for Cortex-M</description>
 921       <files>
 922         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 923         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 924       </files>
 925     </api>
 926     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 927       <description>SPI Driver API for Cortex-M</description>
 928       <files>
 929         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 930         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 931       </files>
 932     </api>
 933     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 934       <description>SAI Driver API for Cortex-M</description>
 935       <files>
 936         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 937         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 938       </files>
 939     </api>
 940     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 941       <description>I2C Driver API for Cortex-M</description>
 942       <files>
 943         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 944         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 945       </files>
 946     </api>
 947     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 948       <description>CAN Driver API for Cortex-M</description>
 949       <files>
 950         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 951         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 952       </files>
 953     </api>
 954     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 955       <description>Flash Driver API for Cortex-M</description>
 956       <files>
 957         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 958         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 959       </files>
 960     </api>
 961     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 962       <description>MCI Driver API for Cortex-M</description>
 963       <files>
 964         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 965         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 966       </files>
 967     </api>
 968     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 969       <description>NAND Flash Driver API for Cortex-M</description>
 970       <files>
 971         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 972         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 973       </files>
 974     </api>
 975     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 976       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 977       <files>
 978         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 979         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 980         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 981       </files>
 982     </api>
 983     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 984       <description>Ethernet MAC Driver API for Cortex-M</description>
 985       <files>
 986         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 987         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 988       </files>
 989     </api>
 990     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 991       <description>Ethernet PHY Driver API for Cortex-M</description>
 992       <files>
 993         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 994         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 995       </files>
 996     </api>
 997     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 998       <description>USB Device Driver API for Cortex-M</description>
 999       <files>
1000         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
1001         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
1002       </files>
1003     </api>
1004     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
1005       <description>USB Host Driver API for Cortex-M</description>
1006       <files>
1007         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
1008         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
1009       </files>
1010     </api>
1011     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
1012       <description>WiFi driver</description>
1013       <files>
1014         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
1015         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
1016       </files>
1017     </api>
1018     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
1019       <description>Virtual I/O</description>
1020       <files>
1021         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
1022         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
1023         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
1024       </files>
1025     </api>
1026   </apis>
1027
1028   <!-- conditions are dependency rules that can apply to a component or an individual file -->
1029   <conditions>
1030     <!-- compiler -->
1031     <condition id="ARMCC6">
1032       <accept Tcompiler="ARMCC" Toptions="AC6"/>
1033       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1034     </condition>
1035     <condition id="ARMCC5">
1036       <require Tcompiler="ARMCC" Toptions="AC5"/>
1037     </condition>
1038     <condition id="ARMCC">
1039       <require Tcompiler="ARMCC"/>
1040     </condition>
1041     <condition id="GCC">
1042       <require Tcompiler="GCC"/>
1043     </condition>
1044     <condition id="IAR">
1045       <require Tcompiler="IAR"/>
1046     </condition>
1047     <condition id="ARMCC GCC">
1048       <accept Tcompiler="ARMCC"/>
1049       <accept Tcompiler="GCC"/>
1050     </condition>
1051     <condition id="ARMCC GCC IAR">
1052       <accept Tcompiler="ARMCC"/>
1053       <accept Tcompiler="GCC"/>
1054       <accept Tcompiler="IAR"/>
1055     </condition>
1056
1057     <!-- Arm architecture -->
1058     <condition id="ARMv6-M Device">
1059       <description>Armv6-M architecture based device</description>
1060       <accept Dcore="Cortex-M0"/>
1061       <accept Dcore="Cortex-M1"/>
1062       <accept Dcore="Cortex-M0+"/>
1063       <accept Dcore="SC000"/>
1064     </condition>
1065     <condition id="ARMv7-M Device">
1066       <description>Armv7-M architecture based device</description>
1067       <accept Dcore="Cortex-M3"/>
1068       <accept Dcore="Cortex-M4"/>
1069       <accept Dcore="Cortex-M7"/>
1070       <accept Dcore="SC300"/>
1071     </condition>
1072     <condition id="ARMv8-M Device">
1073       <description>Armv8-M architecture based device</description>
1074       <accept Dcore="ARMV8MBL"/>
1075       <accept Dcore="ARMV8MML"/>
1076       <accept Dcore="ARMV81MML"/>
1077       <accept Dcore="Cortex-M23"/>
1078       <accept Dcore="Cortex-M33"/>
1079       <accept Dcore="Cortex-M35P"/>
1080       <accept Dcore="Cortex-M55"/>
1081     </condition>
1082     <condition id="ARMv6_7-M Device">
1083       <description>Armv6_7-M architecture based device</description>
1084       <accept condition="ARMv6-M Device"/>
1085       <accept condition="ARMv7-M Device"/>
1086     </condition>
1087     <condition id="ARMv6_7_8-M Device">
1088       <description>Armv6_7_8-M architecture based device</description>
1089       <accept condition="ARMv6-M Device"/>
1090       <accept condition="ARMv7-M Device"/>
1091       <accept condition="ARMv8-M Device"/>
1092     </condition>
1093     <condition id="ARMv7-A Device">
1094       <description>Armv7-A architecture based device</description>
1095       <accept Dcore="Cortex-A5"/>
1096       <accept Dcore="Cortex-A7"/>
1097       <accept Dcore="Cortex-A9"/>
1098     </condition>
1099
1100     <condition id="TrustZone">
1101       <description>TrustZone</description>
1102       <require Dtz="TZ"/>
1103     </condition>
1104     <condition id="TZ Secure">
1105       <description>TrustZone (Secure)</description>
1106       <require Dtz="TZ"/>
1107       <require Dsecure="Secure"/>
1108     </condition>
1109     <condition id="TZ Non-secure">
1110       <description>TrustZone (Non-secure)</description>
1111       <require Dtz="TZ"/>
1112       <accept Dsecure="Non-secure"/>
1113       <accept Dsecure="TZ-disabled"/>
1114     </condition>
1115     <condition id="TZ Unavailable">
1116       <description>TrustZone not available</description>
1117       <deny Dtz="TZ"/>
1118     </condition>
1119
1120     <!-- ARM core -->
1121     <condition id="CM0">
1122       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1123       <accept Dcore="Cortex-M0"/>
1124       <accept Dcore="Cortex-M0+"/>
1125       <accept Dcore="SC000"/>
1126     </condition>
1127     <condition id="CM1">
1128       <description>Cortex-M1</description>
1129       <require Dcore="Cortex-M1"/>
1130     </condition>
1131     <condition id="CM3">
1132       <description>Cortex-M3 or SC300 processor based device</description>
1133       <accept Dcore="Cortex-M3"/>
1134       <accept Dcore="SC300"/>
1135     </condition>
1136     <condition id="CM4">
1137       <description>Cortex-M4 processor based device</description>
1138       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1139     </condition>
1140     <condition id="CM4_FP">
1141       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1142       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1143       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1144       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1145     </condition>
1146     <condition id="CM7">
1147       <description>Cortex-M7 processor based device</description>
1148       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1149     </condition>
1150     <condition id="CM7_FP">
1151       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1152       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1153       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1154     </condition>
1155     <condition id="CM23">
1156       <description>Cortex-M23 processor based device</description>
1157       <require Dcore="Cortex-M23"/>
1158     </condition>
1159     <condition id="CM33">
1160       <description>Cortex-M33 processor based device</description>
1161       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1162     </condition>
1163     <condition id="CM33_FP">
1164       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1165       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1166     </condition>
1167     <condition id="CM35P">
1168       <description>Cortex-M35P processor based device</description>
1169       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1170     </condition>
1171     <condition id="CM35P_FP">
1172       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1173       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1174     </condition>
1175     <condition id="ARMv8MBL">
1176       <description>Armv8-M Baseline processor based device</description>
1177       <require Dcore="ARMV8MBL"/>
1178     </condition>
1179     <condition id="ARMv8MML">
1180       <description>Armv8-M Mainline processor based device</description>
1181       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1182     </condition>
1183     <condition id="ARMv8MML_FP">
1184       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1185       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1186       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1187     </condition>
1188
1189     <condition id="CM55_NOFPU_NOMVE">
1190       <description>Cortex-M55, no FPU, no MVE</description>
1191       <require Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="NO_MVE"/>
1192     </condition>
1193     <condition id="CM55_NOFPU_MVE">
1194       <description>Cortex-M55, no FPU, MVE</description>
1195       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="MVE"/>
1196       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="FP_MVE"/>
1197     </condition>
1198     <condition id="CM55_FPU">
1199       <description>Cortex-M55, FPU</description>
1200       <accept  Dcore="Cortex-M55" Dfpu="SP_FPU"/>
1201       <accept  Dcore="Cortex-M55" Dfpu="DP_FPU"/>
1202     </condition>
1203
1204     <condition id="CA5_CA9">
1205       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1206       <accept Dcore="Cortex-A5"/>
1207       <accept Dcore="Cortex-A9"/>
1208     </condition>
1209
1210     <condition id="CA7">
1211       <description>Cortex-A7 processor based device</description>
1212       <accept Dcore="Cortex-A7"/>
1213     </condition>
1214
1215     <!-- ARMCC compiler -->
1216     <condition id="CA_ARMCC5">
1217       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1218       <require condition="ARMv7-A Device"/>
1219       <require condition="ARMCC5"/>
1220     </condition>
1221     <condition id="CA_ARMCC6">
1222       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1223       <require condition="ARMv7-A Device"/>
1224       <require condition="ARMCC6"/>
1225     </condition>
1226
1227     <condition id="CM0_ARMCC">
1228       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1229       <require condition="CM0"/>
1230       <require Tcompiler="ARMCC"/>
1231     </condition>
1232     <condition id="CM0_ARMCC5">
1233       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler 5</description>
1234       <require condition="CM0"/>
1235       <require condition="ARMCC5"/>
1236     </condition>
1237     <condition id="CM0_ARMCC6">
1238       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler 6</description>
1239       <require condition="CM0"/>
1240       <require condition="ARMCC6"/>
1241     </condition>
1242     <condition id="CM0_LE_ARMCC">
1243       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1244       <require condition="CM0_ARMCC"/>
1245       <require Dendian="Little-endian"/>
1246     </condition>
1247     <condition id="CM0_BE_ARMCC">
1248       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1249       <require condition="CM0_ARMCC"/>
1250       <require Dendian="Big-endian"/>
1251     </condition>
1252
1253     <condition id="CM1_ARMCC">
1254       <description>Cortex-M1 based device for the Arm Compiler</description>
1255       <require condition="CM1"/>
1256       <require Tcompiler="ARMCC"/>
1257     </condition>
1258     <condition id="CM1_ARMCC5">
1259       <description>Cortex-M1 based device for the Arm Compiler 5</description>
1260       <require condition="CM1"/>
1261       <require condition="ARMCC5"/>
1262     </condition>
1263     <condition id="CM1_ARMCC6">
1264       <description>Cortex-M1 based device for the Arm Compiler 6</description>
1265       <require condition="CM1"/>
1266       <require condition="ARMCC6"/>
1267     </condition>
1268     <condition id="CM1_LE_ARMCC">
1269       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1270       <require condition="CM1_ARMCC"/>
1271       <require Dendian="Little-endian"/>
1272     </condition>
1273     <condition id="CM1_BE_ARMCC">
1274       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1275       <require condition="CM1_ARMCC"/>
1276       <require Dendian="Big-endian"/>
1277     </condition>
1278
1279     <condition id="CM3_ARMCC">
1280       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1281       <require condition="CM3"/>
1282       <require Tcompiler="ARMCC"/>
1283     </condition>
1284     <condition id="CM3_ARMCC5">
1285       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler 5</description>
1286       <require condition="CM3"/>
1287       <require condition="ARMCC5"/>
1288     </condition>
1289     <condition id="CM3_ARMCC6">
1290       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler 6</description>
1291       <require condition="CM3"/>
1292       <require condition="ARMCC6"/>
1293     </condition>
1294     <condition id="CM3_LE_ARMCC">
1295       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1296       <require condition="CM3_ARMCC"/>
1297       <require Dendian="Little-endian"/>
1298     </condition>
1299     <condition id="CM3_BE_ARMCC">
1300       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1301       <require condition="CM3_ARMCC"/>
1302       <require Dendian="Big-endian"/>
1303     </condition>
1304
1305     <condition id="CM4_ARMCC">
1306       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1307       <require condition="CM4"/>
1308       <require Tcompiler="ARMCC"/>
1309     </condition>
1310     <condition id="CM4_ARMCC5">
1311       <description>Cortex-M4 processor based device for the Arm Compiler 5</description>
1312       <require condition="CM4"/>
1313       <require condition="ARMCC5"/>
1314     </condition>
1315     <condition id="CM4_ARMCC6">
1316       <description>Cortex-M4 processor based device for the Arm Compiler 6</description>
1317       <require condition="CM4"/>
1318       <require condition="ARMCC6"/>
1319     </condition>
1320     <condition id="CM4_LE_ARMCC">
1321       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1322       <require condition="CM4_ARMCC"/>
1323       <require Dendian="Little-endian"/>
1324     </condition>
1325     <condition id="CM4_BE_ARMCC">
1326       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1327       <require condition="CM4_ARMCC"/>
1328       <require Dendian="Big-endian"/>
1329     </condition>
1330
1331     <condition id="CM4_FP_ARMCC">
1332       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1333       <require condition="CM4_FP"/>
1334       <require Tcompiler="ARMCC"/>
1335     </condition>
1336     <condition id="CM4_FP_ARMCC5">
1337       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler 5</description>
1338       <require condition="CM4_FP"/>
1339       <require condition="ARMCC5"/>
1340     </condition>
1341     <condition id="CM4_FP_ARMCC6">
1342       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler 6</description>
1343       <require condition="CM4_FP"/>
1344       <require condition="ARMCC6"/>
1345     </condition>
1346     <condition id="CM4_FP_LE_ARMCC">
1347       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1348       <require condition="CM4_FP_ARMCC"/>
1349       <require Dendian="Little-endian"/>
1350     </condition>
1351     <condition id="CM4_FP_BE_ARMCC">
1352       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1353       <require condition="CM4_FP_ARMCC"/>
1354       <require Dendian="Big-endian"/>
1355     </condition>
1356
1357     <condition id="CM7_ARMCC">
1358       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1359       <require condition="CM7"/>
1360       <require Tcompiler="ARMCC"/>
1361     </condition>
1362     <condition id="CM7_ARMCC5">
1363       <description>Cortex-M7 processor based device for the Arm Compiler 5</description>
1364       <require condition="CM7"/>
1365       <require condition="ARMCC5"/>
1366     </condition>
1367     <condition id="CM7_ARMCC6">
1368       <description>Cortex-M7 processor based device for the Arm Compiler 6</description>
1369       <require condition="CM7"/>
1370       <require condition="ARMCC6"/>
1371     </condition>
1372     <condition id="CM7_LE_ARMCC">
1373       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1374       <require condition="CM7_ARMCC"/>
1375       <require Dendian="Little-endian"/>
1376     </condition>
1377     <condition id="CM7_BE_ARMCC">
1378       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1379       <require condition="CM7_ARMCC"/>
1380       <require Dendian="Big-endian"/>
1381     </condition>
1382
1383     <condition id="CM7_FP_ARMCC">
1384       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1385       <require condition="CM7_FP"/>
1386       <require Tcompiler="ARMCC"/>
1387     </condition>
1388     <condition id="CM7_FP_ARMCC5">
1389       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler 5</description>
1390       <require condition="CM7_FP"/>
1391       <require condition="ARMCC5"/>
1392     </condition>
1393     <condition id="CM7_FP_ARMCC6">
1394       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler 6</description>
1395       <require condition="CM7_FP"/>
1396       <require condition="ARMCC6"/>
1397     </condition>
1398     <condition id="CM7_FP_LE_ARMCC">
1399       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1400       <require condition="CM7_FP_ARMCC"/>
1401       <require Dendian="Little-endian"/>
1402     </condition>
1403     <condition id="CM7_FP_BE_ARMCC">
1404       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1405       <require condition="CM7_FP_ARMCC"/>
1406       <require Dendian="Big-endian"/>
1407     </condition>
1408
1409     <condition id="CM23_ARMCC">
1410       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1411       <require condition="CM23"/>
1412       <require Tcompiler="ARMCC"/>
1413     </condition>
1414     <condition id="CM23_LE_ARMCC">
1415       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1416       <require condition="CM23_ARMCC"/>
1417       <require Dendian="Little-endian"/>
1418     </condition>
1419
1420     <condition id="CM33_ARMCC">
1421       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1422       <require condition="CM33"/>
1423       <require Tcompiler="ARMCC"/>
1424     </condition>
1425     <condition id="CM33_LE_ARMCC">
1426       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1427       <require condition="CM33_ARMCC"/>
1428       <require Dendian="Little-endian"/>
1429     </condition>
1430
1431     <condition id="CM33_FP_ARMCC">
1432       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1433       <require condition="CM33_FP"/>
1434       <require Tcompiler="ARMCC"/>
1435     </condition>
1436     <condition id="CM33_FP_LE_ARMCC">
1437       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1438       <require condition="CM33_FP_ARMCC"/>
1439       <require Dendian="Little-endian"/>
1440     </condition>
1441
1442     <condition id="CM35P_ARMCC">
1443       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1444       <require condition="CM35P"/>
1445       <require Tcompiler="ARMCC"/>
1446     </condition>
1447     <condition id="CM35P_LE_ARMCC">
1448       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1449       <require condition="CM35P_ARMCC"/>
1450       <require Dendian="Little-endian"/>
1451     </condition>
1452
1453     <condition id="CM35P_FP_ARMCC">
1454       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1455       <require condition="CM35P_FP"/>
1456       <require Tcompiler="ARMCC"/>
1457     </condition>
1458     <condition id="CM35P_FP_LE_ARMCC">
1459       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1460       <require condition="CM35P_FP_ARMCC"/>
1461       <require Dendian="Little-endian"/>
1462     </condition>
1463
1464     <condition id="CM55_NOFPU_NOMVE_ARMCC">
1465       <description>Cortex-M55 processor, no FPU, no MVE, Arm Compiler</description>
1466       <require condition="CM55_NOFPU_NOMVE"/>
1467       <require Tcompiler="ARMCC"/>
1468     </condition>
1469     <condition id="CM55_NOFPU_MVE_ARMCC">
1470       <description>Cortex-M55 processor, no FPU, MVE, Arm Compiler</description>
1471       <require condition="CM55_NOFPU_MVE"/>
1472       <require Tcompiler="ARMCC"/>
1473     </condition>
1474     <condition id="CM55_FPU_ARMCC">
1475       <description>Cortex-M55 processor, FPU, Arm Compiler</description>
1476       <require condition="CM55_FPU"/>
1477       <require Tcompiler="ARMCC"/>
1478     </condition>
1479     <condition id="CM55_NOFPU_NOMVE_LE_ARMCC">
1480       <description>Cortex-M55 processor, little endian, no FPU, no MVE, Arm Compiler</description>
1481       <require condition="CM55_NOFPU_NOMVE_ARMCC"/>
1482       <require Dendian="Little-endian"/>
1483     </condition>
1484     <condition id="CM55_FPU_LE_ARMCC">
1485       <description>Cortex-M55 processor, little endian, FPU, Arm Compiler</description>
1486       <require condition="CM55_FPU_ARMCC"/>
1487       <require Dendian="Little-endian"/>
1488     </condition>
1489
1490     <condition id="ARMv8MBL_ARMCC">
1491       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1492       <require condition="ARMv8MBL"/>
1493       <require Tcompiler="ARMCC"/>
1494     </condition>
1495     <condition id="ARMv8MBL_LE_ARMCC">
1496       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1497       <require condition="ARMv8MBL_ARMCC"/>
1498       <require Dendian="Little-endian"/>
1499     </condition>
1500
1501     <condition id="ARMv8MML_ARMCC">
1502       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1503       <require condition="ARMv8MML"/>
1504       <require Tcompiler="ARMCC"/>
1505     </condition>
1506     <condition id="ARMv8MML_LE_ARMCC">
1507       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1508       <require condition="ARMv8MML_ARMCC"/>
1509       <require Dendian="Little-endian"/>
1510     </condition>
1511
1512     <condition id="ARMv8MML_FP_ARMCC">
1513       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1514       <require condition="ARMv8MML_FP"/>
1515       <require Tcompiler="ARMCC"/>
1516     </condition>
1517     <condition id="ARMv8MML_FP_LE_ARMCC">
1518       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1519       <require condition="ARMv8MML_FP_ARMCC"/>
1520       <require Dendian="Little-endian"/>
1521     </condition>
1522
1523     <condition id="TZ Secure ARMCC6">
1524       <description>TrustZone (Secure), Arm Compiler</description>
1525       <require condition="TZ Secure"/>
1526       <require condition="ARMCC6"/>
1527     </condition>
1528     <condition id="TZ Non-secure ARMCC6">
1529       <description>TrustZone (Non-secure), Arm Compiler</description>
1530       <require condition="TZ Non-secure"/>
1531       <require condition="ARMCC6"/>
1532     </condition>
1533     <condition id="TZ Unavailable ARMCC6">
1534       <description>TrustZone not available, Arm Compiler</description>
1535       <require condition="TZ Unavailable"/>
1536       <require condition="ARMCC6"/>
1537     </condition>
1538
1539     <!-- GCC compiler -->
1540     <condition id="CA_GCC">
1541       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1542       <require condition="ARMv7-A Device"/>
1543       <require Tcompiler="GCC"/>
1544     </condition>
1545
1546     <condition id="CM0_GCC">
1547       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1548       <require condition="CM0"/>
1549       <require Tcompiler="GCC"/>
1550     </condition>
1551     <condition id="CM0_LE_GCC">
1552       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1553       <require condition="CM0_GCC"/>
1554       <require Dendian="Little-endian"/>
1555     </condition>
1556     <condition id="CM0_BE_GCC">
1557       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1558       <require condition="CM0_GCC"/>
1559       <require Dendian="Big-endian"/>
1560     </condition>
1561
1562     <condition id="CM1_GCC">
1563       <description>Cortex-M1 based device for the GCC Compiler</description>
1564       <require condition="CM1"/>
1565       <require Tcompiler="GCC"/>
1566     </condition>
1567     <condition id="CM1_LE_GCC">
1568       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1569       <require condition="CM1_GCC"/>
1570       <require Dendian="Little-endian"/>
1571     </condition>
1572     <condition id="CM1_BE_GCC">
1573       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1574       <require condition="CM1_GCC"/>
1575       <require Dendian="Big-endian"/>
1576     </condition>
1577
1578     <condition id="CM3_GCC">
1579       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1580       <require condition="CM3"/>
1581       <require Tcompiler="GCC"/>
1582     </condition>
1583     <condition id="CM3_LE_GCC">
1584       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1585       <require condition="CM3_GCC"/>
1586       <require Dendian="Little-endian"/>
1587     </condition>
1588     <condition id="CM3_BE_GCC">
1589       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1590       <require condition="CM3_GCC"/>
1591       <require Dendian="Big-endian"/>
1592     </condition>
1593
1594     <condition id="CM4_GCC">
1595       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1596       <require condition="CM4"/>
1597       <require Tcompiler="GCC"/>
1598     </condition>
1599     <condition id="CM4_LE_GCC">
1600       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1601       <require condition="CM4_GCC"/>
1602       <require Dendian="Little-endian"/>
1603     </condition>
1604     <condition id="CM4_BE_GCC">
1605       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1606       <require condition="CM4_GCC"/>
1607       <require Dendian="Big-endian"/>
1608     </condition>
1609
1610     <condition id="CM4_FP_GCC">
1611       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1612       <require condition="CM4_FP"/>
1613       <require Tcompiler="GCC"/>
1614     </condition>
1615     <condition id="CM4_FP_LE_GCC">
1616       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1617       <require condition="CM4_FP_GCC"/>
1618       <require Dendian="Little-endian"/>
1619     </condition>
1620     <condition id="CM4_FP_BE_GCC">
1621       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1622       <require condition="CM4_FP_GCC"/>
1623       <require Dendian="Big-endian"/>
1624     </condition>
1625
1626     <condition id="CM7_GCC">
1627       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1628       <require condition="CM7"/>
1629       <require Tcompiler="GCC"/>
1630     </condition>
1631     <condition id="CM7_LE_GCC">
1632       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1633       <require condition="CM7_GCC"/>
1634       <require Dendian="Little-endian"/>
1635     </condition>
1636     <condition id="CM7_BE_GCC">
1637       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1638       <require condition="CM7_GCC"/>
1639       <require Dendian="Big-endian"/>
1640     </condition>
1641
1642     <condition id="CM7_FP_GCC">
1643       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1644       <require condition="CM7_FP"/>
1645       <require Tcompiler="GCC"/>
1646     </condition>
1647     <condition id="CM7_FP_LE_GCC">
1648       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1649       <require condition="CM7_FP_GCC"/>
1650       <require Dendian="Little-endian"/>
1651     </condition>
1652     <condition id="CM7_FP_BE_GCC">
1653       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1654       <require condition="CM7_FP_GCC"/>
1655       <require Dendian="Big-endian"/>
1656     </condition>
1657
1658     <condition id="CM23_GCC">
1659       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1660       <require condition="CM23"/>
1661       <require Tcompiler="GCC"/>
1662     </condition>
1663     <condition id="CM23_LE_GCC">
1664       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1665       <require condition="CM23_GCC"/>
1666       <require Dendian="Little-endian"/>
1667     </condition>
1668
1669     <condition id="CM33_GCC">
1670       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1671       <require condition="CM33"/>
1672       <require Tcompiler="GCC"/>
1673     </condition>
1674     <condition id="CM33_LE_GCC">
1675       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1676       <require condition="CM33_GCC"/>
1677       <require Dendian="Little-endian"/>
1678     </condition>
1679
1680     <condition id="CM33_FP_GCC">
1681       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1682       <require condition="CM33_FP"/>
1683       <require Tcompiler="GCC"/>
1684     </condition>
1685     <condition id="CM33_FP_LE_GCC">
1686       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1687       <require condition="CM33_FP_GCC"/>
1688       <require Dendian="Little-endian"/>
1689     </condition>
1690
1691     <condition id="CM35P_GCC">
1692       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1693       <require condition="CM35P"/>
1694       <require Tcompiler="GCC"/>
1695     </condition>
1696     <condition id="CM35P_LE_GCC">
1697       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1698       <require condition="CM35P_GCC"/>
1699       <require Dendian="Little-endian"/>
1700     </condition>
1701
1702     <condition id="CM35P_FP_GCC">
1703       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1704       <require condition="CM35P_FP"/>
1705       <require Tcompiler="GCC"/>
1706     </condition>
1707     <condition id="CM35P_FP_LE_GCC">
1708       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1709       <require condition="CM35P_FP_GCC"/>
1710       <require Dendian="Little-endian"/>
1711     </condition>
1712
1713     <condition id="CM55_NOFPU_NOMVE_GCC">
1714       <description>Cortex-M55 processor, no FPU, no MVE, GCC Compiler</description>
1715       <require condition="CM55_NOFPU_NOMVE"/>
1716       <require Tcompiler="GCC"/>
1717     </condition>
1718     <condition id="CM55_NOFPU_MVE_GCC">
1719       <description>Cortex-M55 processor, no FPU, MVE, GCC Compiler</description>
1720       <require condition="CM55_NOFPU_MVE"/>
1721       <require Tcompiler="GCC"/>
1722     </condition>
1723     <condition id="CM55_FPU_GCC">
1724       <description>Cortex-M55 processor, FPU, GCC Compiler</description>
1725       <require condition="CM55_FPU"/>
1726       <require Tcompiler="GCC"/>
1727     </condition>
1728     <condition id="CM55_NOFPU_NOMVE_LE_GCC">
1729       <description>Cortex-M55 processor, little endian, no FPU, no MVE, GCC Compiler</description>
1730       <require condition="CM55_NOFPU_NOMVE_GCC"/>
1731       <require Dendian="Little-endian"/>
1732     </condition>
1733     <condition id="CM55_FPU_LE_GCC">
1734       <description>Cortex-M55 processor, little endian, FPU, GCC Compiler</description>
1735       <require condition="CM55_FPU_GCC"/>
1736       <require Dendian="Little-endian"/>
1737     </condition>
1738
1739     <condition id="ARMv8MBL_GCC">
1740       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1741       <require condition="ARMv8MBL"/>
1742       <require Tcompiler="GCC"/>
1743     </condition>
1744     <condition id="ARMv8MBL_LE_GCC">
1745       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1746       <require condition="ARMv8MBL_GCC"/>
1747       <require Dendian="Little-endian"/>
1748     </condition>
1749
1750     <condition id="ARMv8MML_GCC">
1751       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1752       <require condition="ARMv8MML"/>
1753       <require Tcompiler="GCC"/>
1754     </condition>
1755     <condition id="ARMv8MML_LE_GCC">
1756       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1757       <require condition="ARMv8MML_GCC"/>
1758       <require Dendian="Little-endian"/>
1759     </condition>
1760
1761     <condition id="ARMv8MML_FP_GCC">
1762       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1763       <require condition="ARMv8MML_FP"/>
1764       <require Tcompiler="GCC"/>
1765     </condition>
1766     <condition id="ARMv8MML_FP_LE_GCC">
1767       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1768       <require condition="ARMv8MML_FP_GCC"/>
1769       <require Dendian="Little-endian"/>
1770     </condition>
1771
1772     <!-- IAR compiler -->
1773     <condition id="CA_IAR">
1774       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1775       <require condition="ARMv7-A Device"/>
1776       <require Tcompiler="IAR"/>
1777     </condition>
1778
1779     <condition id="CM0_IAR">
1780       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1781       <require condition="CM0"/>
1782       <require Tcompiler="IAR"/>
1783     </condition>
1784     <condition id="CM0_LE_IAR">
1785       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1786       <require condition="CM0_IAR"/>
1787       <require Dendian="Little-endian"/>
1788     </condition>
1789     <condition id="CM0_BE_IAR">
1790       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1791       <require condition="CM0_IAR"/>
1792       <require Dendian="Big-endian"/>
1793     </condition>
1794
1795     <condition id="CM1_IAR">
1796       <description>Cortex-M1 based device for the IAR Compiler</description>
1797       <require condition="CM1"/>
1798       <require Tcompiler="IAR"/>
1799     </condition>
1800     <condition id="CM1_LE_IAR">
1801       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1802       <require condition="CM1_IAR"/>
1803       <require Dendian="Little-endian"/>
1804     </condition>
1805     <condition id="CM1_BE_IAR">
1806       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1807       <require condition="CM1_IAR"/>
1808       <require Dendian="Big-endian"/>
1809     </condition>
1810
1811     <condition id="CM3_IAR">
1812       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1813       <require condition="CM3"/>
1814       <require Tcompiler="IAR"/>
1815     </condition>
1816     <condition id="CM3_LE_IAR">
1817       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1818       <require condition="CM3_IAR"/>
1819       <require Dendian="Little-endian"/>
1820     </condition>
1821     <condition id="CM3_BE_IAR">
1822       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1823       <require condition="CM3_IAR"/>
1824       <require Dendian="Big-endian"/>
1825     </condition>
1826
1827     <condition id="CM4_IAR">
1828       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1829       <require condition="CM4"/>
1830       <require Tcompiler="IAR"/>
1831     </condition>
1832     <condition id="CM4_LE_IAR">
1833       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1834       <require condition="CM4_IAR"/>
1835       <require Dendian="Little-endian"/>
1836     </condition>
1837     <condition id="CM4_BE_IAR">
1838       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1839       <require condition="CM4_IAR"/>
1840       <require Dendian="Big-endian"/>
1841     </condition>
1842
1843     <condition id="CM4_FP_IAR">
1844       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1845       <require condition="CM4_FP"/>
1846       <require Tcompiler="IAR"/>
1847     </condition>
1848     <condition id="CM4_FP_LE_IAR">
1849       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1850       <require condition="CM4_FP_IAR"/>
1851       <require Dendian="Little-endian"/>
1852     </condition>
1853     <condition id="CM4_FP_BE_IAR">
1854       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1855       <require condition="CM4_FP_IAR"/>
1856       <require Dendian="Big-endian"/>
1857     </condition>
1858
1859     <condition id="CM7_IAR">
1860       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1861       <require condition="CM7"/>
1862       <require Tcompiler="IAR"/>
1863     </condition>
1864     <condition id="CM7_LE_IAR">
1865       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1866       <require condition="CM7_IAR"/>
1867       <require Dendian="Little-endian"/>
1868     </condition>
1869     <condition id="CM7_BE_IAR">
1870       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1871       <require condition="CM7_IAR"/>
1872       <require Dendian="Big-endian"/>
1873     </condition>
1874
1875     <condition id="CM7_FP_IAR">
1876       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1877       <require condition="CM7_FP"/>
1878       <require Tcompiler="IAR"/>
1879     </condition>
1880     <condition id="CM7_FP_LE_IAR">
1881       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1882       <require condition="CM7_FP_IAR"/>
1883       <require Dendian="Little-endian"/>
1884     </condition>
1885     <condition id="CM7_FP_BE_IAR">
1886       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1887       <require condition="CM7_FP_IAR"/>
1888       <require Dendian="Big-endian"/>
1889     </condition>
1890
1891     <condition id="CM23_IAR">
1892       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1893       <require condition="CM23"/>
1894       <require Tcompiler="IAR"/>
1895     </condition>
1896     <condition id="CM23_LE_IAR">
1897       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1898       <require condition="CM23_IAR"/>
1899       <require Dendian="Little-endian"/>
1900     </condition>
1901
1902     <condition id="CM33_IAR">
1903       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1904       <require condition="CM33"/>
1905       <require Tcompiler="IAR"/>
1906     </condition>
1907     <condition id="CM33_LE_IAR">
1908       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1909       <require condition="CM33_IAR"/>
1910       <require Dendian="Little-endian"/>
1911     </condition>
1912
1913     <condition id="CM33_FP_IAR">
1914       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1915       <require condition="CM33_FP"/>
1916       <require Tcompiler="IAR"/>
1917     </condition>
1918     <condition id="CM33_FP_LE_IAR">
1919       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1920       <require condition="CM33_FP_IAR"/>
1921       <require Dendian="Little-endian"/>
1922     </condition>
1923
1924     <condition id="CM35P_IAR">
1925       <description>Cortex-M35P processor based device for the IAR Compiler</description>
1926       <require condition="CM35P"/>
1927       <require Tcompiler="IAR"/>
1928     </condition>
1929     <condition id="CM35P_LE_IAR">
1930       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
1931       <require condition="CM35P_IAR"/>
1932       <require Dendian="Little-endian"/>
1933     </condition>
1934
1935     <condition id="CM35P_FP_IAR">
1936       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
1937       <require condition="CM35P_FP"/>
1938       <require Tcompiler="IAR"/>
1939     </condition>
1940     <condition id="CM35P_FP_LE_IAR">
1941       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1942       <require condition="CM35P_FP_IAR"/>
1943       <require Dendian="Little-endian"/>
1944     </condition>
1945
1946     <condition id="CM55_NOFPU_NOMVE_IAR">
1947       <description>Cortex-M55 processor, no FPU, no MVE, IAR Compiler</description>
1948       <require condition="CM55_NOFPU_NOMVE"/>
1949       <require Tcompiler="IAR"/>
1950     </condition>
1951     <condition id="CM55_NOFPU_MVE_IAR">
1952       <description>Cortex-M55 processor, no FPU, MVE, IAR Compiler</description>
1953       <require condition="CM55_NOFPU_MVE"/>
1954       <require Tcompiler="IAR"/>
1955     </condition>
1956     <condition id="CM55_FPU_IAR">
1957       <description>Cortex-M55 processor, FPU, IAR Compiler</description>
1958       <require condition="CM55_FPU"/>
1959       <require Tcompiler="IAR"/>
1960     </condition>
1961     <condition id="CM55_NOFPU_NOMVE_LE_IAR">
1962       <description>Cortex-M55 processor, little endian, no FPU, no MVE, IAR Compiler</description>
1963       <require condition="CM55_NOFPU_NOMVE_IAR"/>
1964       <require Dendian="Little-endian"/>
1965     </condition>
1966     <condition id="CM55_FPU_LE_IAR">
1967       <description>Cortex-M55 processor, little endian, FPU, IAR Compiler</description>
1968       <require condition="CM55_FPU_IAR"/>
1969       <require Dendian="Little-endian"/>
1970     </condition>
1971
1972     <condition id="ARMv8MBL_IAR">
1973       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1974       <require condition="ARMv8MBL"/>
1975       <require Tcompiler="IAR"/>
1976     </condition>
1977     <condition id="ARMv8MBL_LE_IAR">
1978       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1979       <require condition="ARMv8MBL_IAR"/>
1980       <require Dendian="Little-endian"/>
1981     </condition>
1982
1983     <condition id="ARMv8MML_IAR">
1984       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1985       <require condition="ARMv8MML"/>
1986       <require Tcompiler="IAR"/>
1987     </condition>
1988     <condition id="ARMv8MML_LE_IAR">
1989       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1990       <require condition="ARMv8MML_IAR"/>
1991       <require Dendian="Little-endian"/>
1992     </condition>
1993
1994     <condition id="ARMv8MML_FP_IAR">
1995       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1996       <require condition="ARMv8MML_FP"/>
1997       <require Tcompiler="IAR"/>
1998     </condition>
1999     <condition id="ARMv8MML_FP_LE_IAR">
2000       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2001       <require condition="ARMv8MML_FP_IAR"/>
2002       <require Dendian="Little-endian"/>
2003     </condition>
2004
2005     <!-- conditions selecting single devices and CMSIS Core -->
2006     <condition id="ARMCM0 CMSIS">
2007       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2008       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2009       <require Cclass="CMSIS" Cgroup="CORE"/>
2010     </condition>
2011
2012     <condition id="ARMCM0+ CMSIS">
2013       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2014       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2015       <require Cclass="CMSIS" Cgroup="CORE"/>
2016     </condition>
2017
2018     <condition id="ARMCM1 CMSIS">
2019       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2020       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2021       <require Cclass="CMSIS" Cgroup="CORE"/>
2022     </condition>
2023
2024     <condition id="ARMCM3 CMSIS">
2025       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2026       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2027       <require Cclass="CMSIS" Cgroup="CORE"/>
2028     </condition>
2029
2030     <condition id="ARMCM4 CMSIS">
2031       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2032       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2033       <require Cclass="CMSIS" Cgroup="CORE"/>
2034     </condition>
2035
2036     <condition id="ARMCM7 CMSIS">
2037       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2038       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2039       <require Cclass="CMSIS" Cgroup="CORE"/>
2040     </condition>
2041
2042     <condition id="ARMCM23 CMSIS">
2043       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2044       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2045       <require Cclass="CMSIS" Cgroup="CORE"/>
2046     </condition>
2047
2048     <condition id="ARMCM33 CMSIS">
2049       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2050       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2051       <require Cclass="CMSIS" Cgroup="CORE"/>
2052     </condition>
2053
2054     <condition id="ARMCM35P CMSIS">
2055       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2056       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2057       <require Cclass="CMSIS" Cgroup="CORE"/>
2058     </condition>
2059
2060     <condition id="ARMCM55 CMSIS">
2061       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2062       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2063       <require Cclass="CMSIS" Cgroup="CORE"/>
2064     </condition>
2065
2066     <condition id="ARMSC000 CMSIS">
2067       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2068       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2069       <require Cclass="CMSIS" Cgroup="CORE"/>
2070     </condition>
2071
2072     <condition id="ARMSC300 CMSIS">
2073       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2074       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2075       <require Cclass="CMSIS" Cgroup="CORE"/>
2076     </condition>
2077
2078     <condition id="ARMv8MBL CMSIS">
2079       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2080       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2081       <require Cclass="CMSIS" Cgroup="CORE"/>
2082     </condition>
2083
2084     <condition id="ARMv8MML CMSIS">
2085       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2086       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2087       <require Cclass="CMSIS" Cgroup="CORE"/>
2088     </condition>
2089
2090     <condition id="ARMv81MML CMSIS">
2091       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2092       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2093       <require Cclass="CMSIS" Cgroup="CORE"/>
2094     </condition>
2095
2096     <condition id="ARMCA5 CMSIS">
2097       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2098       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2099       <require Cclass="CMSIS" Cgroup="CORE"/>
2100     </condition>
2101
2102     <condition id="ARMCA7 CMSIS">
2103       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2104       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2105       <require Cclass="CMSIS" Cgroup="CORE"/>
2106     </condition>
2107
2108     <condition id="ARMCA9 CMSIS">
2109       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2110       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2111       <require Cclass="CMSIS" Cgroup="CORE"/>
2112     </condition>
2113
2114     <!-- CMSIS DSP -->
2115     <condition id="CMSIS DSP">
2116       <description>Components required for DSP</description>
2117       <require condition="ARMv6_7_8-M Device"/>
2118       <require condition="ARMCC GCC IAR"/>
2119       <require Cclass="CMSIS" Cgroup="CORE"/>
2120     </condition>
2121
2122     <!-- CMSIS NN -->
2123     <condition id="CMSIS NN">
2124       <description>Components required for NN</description>
2125       <require Cclass="CMSIS" Cgroup="DSP"/>
2126     </condition>
2127
2128     <!-- RTOS RTX -->
2129     <condition id="RTOS RTX">
2130       <description>Components required for RTOS RTX</description>
2131       <require condition="ARMv6_7-M Device"/>
2132       <require condition="ARMCC GCC IAR"/>
2133       <require Cclass="Device" Cgroup="Startup"/>
2134       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2135     </condition>
2136     <condition id="RTOS RTX IFX">
2137       <description>Components required for RTOS RTX IFX</description>
2138       <require condition="ARMv6_7-M Device"/>
2139       <require condition="ARMCC GCC IAR"/>
2140       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2141       <require Cclass="Device" Cgroup="Startup"/>
2142       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2143     </condition>
2144     <condition id="RTOS RTX5">
2145       <description>Components required for RTOS RTX5</description>
2146       <require condition="ARMv6_7_8-M Device"/>
2147       <require condition="ARMCC GCC IAR"/>
2148       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2149     </condition>
2150     <condition id="RTOS2 RTX5">
2151       <description>Components required for RTOS2 RTX5</description>
2152       <require condition="ARMv6_7_8-M Device"/>
2153       <require condition="ARMCC GCC IAR"/>
2154       <require Cclass="CMSIS"  Cgroup="CORE"/>
2155       <require Cclass="Device" Cgroup="Startup"/>
2156     </condition>
2157     <condition id="RTOS2 RTX5 v7-A">
2158       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2159       <require condition="ARMv7-A Device"/>
2160       <require condition="ARMCC GCC IAR"/>
2161       <require Cclass="CMSIS"  Cgroup="CORE"/>
2162       <require Cclass="Device" Cgroup="Startup"/>
2163       <require Cclass="Device" Cgroup="OS Tick"/>
2164       <require Cclass="Device" Cgroup="IRQ Controller"/>
2165     </condition>
2166     <condition id="RTOS2 RTX5 NS">
2167       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2168       <require condition="ARMv8-M Device"/>
2169       <require condition="TZ Non-secure"/>
2170       <require condition="ARMCC GCC IAR"/>
2171       <require Cclass="CMSIS"  Cgroup="CORE"/>
2172       <require Cclass="Device" Cgroup="Startup"/>
2173     </condition>
2174
2175     <!-- OS Tick -->
2176     <condition id="OS Tick PTIM">
2177       <description>Components required for OS Tick Private Timer</description>
2178       <require condition="CA5_CA9"/>
2179       <require Cclass="Device" Cgroup="IRQ Controller"/>
2180     </condition>
2181
2182     <condition id="OS Tick GTIM">
2183       <description>Components required for OS Tick Generic Physical Timer</description>
2184       <require condition="CA7"/>
2185       <require Cclass="Device" Cgroup="IRQ Controller"/>
2186     </condition>
2187
2188   </conditions>
2189
2190   <components>
2191     <!-- CMSIS-Core component -->
2192     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.5.0"  condition="ARMv6_7_8-M Device" >
2193       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2194       <files>
2195         <!-- CPU independent -->
2196         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2197         <file category="include" name="CMSIS/Core/Include/"/>
2198         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
2199         <!-- Code template -->
2200         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2201         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2202       </files>
2203     </component>
2204
2205     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.2.1"  condition="ARMv7-A Device" >
2206       <description>CMSIS-CORE for Cortex-A</description>
2207       <files>
2208         <!-- CPU independent -->
2209         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2210         <file category="include" name="CMSIS/Core_A/Include/"/>
2211       </files>
2212     </component>
2213
2214     <!-- CMSIS-Startup components -->
2215     <!-- Cortex-M0 -->
2216     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS" isDefaultVariant="true">
2217       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2218       <files>
2219         <!-- include folder / device header file -->
2220         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2221         <!-- startup / system file -->
2222         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
2223         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2224         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2225         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2226         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2227       </files>
2228     </component>
2229     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2230       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2231       <files>
2232         <!-- include folder / device header file -->
2233         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2234         <!-- startup / system file -->
2235         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2236         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.2.0" attr="config" condition="GCC"/>
2237         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2238         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2239         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2240       </files>
2241     </component>
2242
2243     <!-- Cortex-M0+ -->
2244     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS" isDefaultVariant="true">
2245       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2246       <files>
2247         <!-- include folder / device header file -->
2248         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2249         <!-- startup / system file -->
2250         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
2251         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2252         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2253         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
2254         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2255       </files>
2256     </component>
2257     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM0+ CMSIS">
2258       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2259       <files>
2260         <!-- include folder / device header file -->
2261         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2262         <!-- startup / system file -->
2263         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2264         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.2.0" attr="config" condition="GCC"/>
2265         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
2266         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2267         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2268       </files>
2269     </component>
2270
2271     <!-- Cortex-M1 -->
2272     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS" isDefaultVariant="true">
2273       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2274       <files>
2275         <!-- include folder / device header file -->
2276         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2277         <!-- startup / system file -->
2278         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
2279         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2280         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2281         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2282         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2283       </files>
2284     </component>
2285     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2286       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2287       <files>
2288         <!-- include folder / device header file -->
2289         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2290         <!-- startup / system file -->
2291         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2292         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.2.0" attr="config" condition="GCC"/>
2293         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2294         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2295         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2296       </files>
2297     </component>
2298
2299     <!-- Cortex-M3 -->
2300     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="true">
2301       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2302       <files>
2303         <!-- include folder / device header file -->
2304         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2305         <!-- startup / system file -->
2306         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
2307         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2308         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2309         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2310         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2311       </files>
2312     </component>
2313     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2314       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2315       <files>
2316         <!-- include folder / device header file -->
2317         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2318         <!-- startup / system file -->
2319         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2320         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.2.0" attr="config" condition="GCC"/>
2321         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2322         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2323         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2324       </files>
2325     </component>
2326
2327     <!-- Cortex-M4 -->
2328     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS" isDefaultVariant="true">
2329       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2330       <files>
2331         <!-- include folder / device header file -->
2332         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2333         <!-- startup / system file -->
2334         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
2335         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2336         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2337         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2338        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2339       </files>
2340     </component>
2341     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2342       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2343       <files>
2344         <!-- include folder / device header file -->
2345         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2346         <!-- startup / system file -->
2347         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2348         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.2.0" attr="config" condition="GCC"/>
2349         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2350         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2351         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2352       </files>
2353     </component>
2354
2355     <!-- Cortex-M7 -->
2356     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS" isDefaultVariant="true">
2357       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2358       <files>
2359         <!-- include folder / device header file -->
2360         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2361         <!-- startup / system file -->
2362         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
2363         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2364         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2365         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2366         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2367       </files>
2368     </component>
2369     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2370       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2371       <files>
2372         <!-- include folder / device header file -->
2373         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2374         <!-- startup / system file -->
2375         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2376         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.2.0" attr="config" condition="GCC"/>
2377         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2378         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2379         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2380       </files>
2381     </component>
2382
2383     <!-- Cortex-M23 -->
2384     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM23 CMSIS" isDefaultVariant="true">
2385       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2386       <files>
2387         <!-- include folder / device header file -->
2388         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2389         <!-- startup / system file -->
2390         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"             version="2.1.0" attr="config"/>
2391         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2392         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2393         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2394         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2395         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2396         <!-- SAU configuration -->
2397         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2398       </files>
2399     </component>
2400     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM23 CMSIS">
2401       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2402       <files>
2403         <!-- include folder / device header file -->
2404         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2405         <!-- startup / system file -->
2406         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2407         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2408         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2409         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2410         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S"         version="2.2.0" attr="config" condition="GCC"/>
2411         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2412         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.1.0" attr="config" condition="IAR"/>
2413         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2414         <!-- SAU configuration -->
2415         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2416       </files>
2417     </component>
2418
2419     <!-- Cortex-M33 -->
2420     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM33 CMSIS" isDefaultVariant="true">
2421       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2422       <files>
2423         <!-- include folder / device header file -->
2424         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2425         <!-- startup / system file -->
2426         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.1.0" attr="config"/>
2427         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2428         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2429         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2430         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2431         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2432         <!-- SAU configuration -->
2433         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2434       </files>
2435     </component>
2436     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM33 CMSIS">
2437       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2438       <files>
2439         <!-- include folder / device header file -->
2440         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2441         <!-- startup / system file -->
2442         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2443         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2444         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2445         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2446         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.3.0" attr="config" condition="GCC"/>
2447         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2448         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.1.0" attr="config" condition="IAR"/>
2449         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2450         <!-- SAU configuration -->
2451         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2452       </files>
2453     </component>
2454
2455     <!-- Cortex-M35P -->
2456     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM35P CMSIS" isDefaultVariant="true">
2457       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2458       <files>
2459         <!-- include folder / device header file -->
2460         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2461         <!-- startup / system file -->
2462         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.1.0" attr="config"/>
2463         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2464         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2465         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2466         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2467         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2468         <!-- SAU configuration -->
2469         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2470       </files>
2471     </component>
2472     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM35P CMSIS">
2473       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2474       <files>
2475         <!-- include folder / device header file -->
2476         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2477         <!-- startup / system file -->
2478         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2479         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2480         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2481         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2482         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.3.0" attr="config" condition="GCC"/>
2483         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2484         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.1.0" attr="config" condition="IAR"/>
2485         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2486         <!-- SAU configuration -->
2487         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2488       </files>
2489     </component>
2490
2491     <!-- Cortex-M55 -->
2492     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM55 CMSIS" isDefaultVariant="true">
2493       <description>System and Startup for Generic Cortex-M55 device</description>
2494       <files>
2495         <!-- include folder / device header file -->
2496         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2497         <!-- startup / system file -->
2498         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.1.0" attr="config"/>
2499         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2500         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2501         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2502         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2503         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.0.1" attr="config"/>
2504         <!-- SAU configuration -->
2505         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2506       </files>
2507     </component>
2508
2509     <!-- Cortex-SC000 -->
2510     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS" isDefaultVariant="true">
2511       <description>System and Startup for Generic Arm SC000 device</description>
2512       <files>
2513         <!-- include folder / device header file -->
2514         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2515         <!-- startup / system file -->
2516         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
2517         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2518         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2519         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2520         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2521       </files>
2522     </component>
2523     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2524       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2525       <files>
2526         <!-- include folder / device header file -->
2527         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2528         <!-- startup / system file -->
2529         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2530         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.2.0" attr="config" condition="GCC"/>
2531         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2532         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2533         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2534       </files>
2535     </component>
2536
2537     <!-- Cortex-SC300 -->
2538     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS" isDefaultVariant="true">
2539       <description>System and Startup for Generic Arm SC300 device</description>
2540       <files>
2541         <!-- include folder / device header file -->
2542         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2543         <!-- startup / system file -->
2544         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
2545         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2546         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2547         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2548         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2549       </files>
2550     </component>
2551     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2552       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2553       <files>
2554         <!-- include folder / device header file -->
2555         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2556         <!-- startup / system file -->
2557         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2558         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.2.0" attr="config" condition="GCC"/>
2559         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2560         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2561         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2562       </files>
2563     </component>
2564
2565     <!-- ARMv8MBL -->
2566     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MBL CMSIS" isDefaultVariant="true">
2567       <description>System and Startup for Generic Armv8-M Baseline device</description>
2568       <files>
2569         <!-- include folder / device header file -->
2570         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2571         <!-- startup / system file -->
2572         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"             version="2.1.0" attr="config"/>
2573         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2574         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2575         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2576         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2577         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2578         <!-- SAU configuration -->
2579         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2580       </files>
2581     </component>
2582     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMv8MBL CMSIS">
2583       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2584       <files>
2585         <!-- include folder / device header file -->
2586         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2587         <!-- startup / system file -->
2588         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2589         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2590         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2591         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2592         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S"         version="2.2.0" attr="config" condition="GCC"/>
2593         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2594         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2595         <!-- SAU configuration -->
2596         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2597       </files>
2598     </component>
2599
2600     <!-- ARMv8MML -->
2601     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MML CMSIS" isDefaultVariant="true">
2602       <description>System and Startup for Generic Armv8-M Mainline device</description>
2603       <files>
2604         <!-- include folder / device header file -->
2605         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2606         <!-- startup / system file -->
2607         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.1.0" attr="config"/>
2608         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2609         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2610         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2611         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2612         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2613         <!-- SAU configuration -->
2614         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2615       </files>
2616     </component>
2617     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMv8MML CMSIS">
2618       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2619       <files>
2620         <!-- include folder / device header file -->
2621         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2622         <!-- startup / system file -->
2623         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2624         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2625         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2626         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2627         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.3.0" attr="config" condition="GCC"/>
2628         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2629         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2630         <!-- SAU configuration -->
2631         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2632       </files>
2633     </component>
2634
2635     <!-- ARMv81MML -->
2636     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.2.0" condition="ARMv81MML CMSIS" isDefaultVariant="true">
2637       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2638       <files>
2639         <!-- include folder / device header file -->
2640         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2641         <!-- startup / system file -->
2642         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.1.0" attr="config"/>
2643         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2644         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2645         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2646         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.2.0" attr="config" condition="GCC"/>
2647         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
2648         <!-- SAU configuration -->
2649         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
2650       </files>
2651     </component>
2652
2653     <!-- Cortex-A5 -->
2654     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA5 CMSIS">
2655       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2656       <files>
2657         <!-- include folder / device header file -->
2658         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2659         <!-- startup / system / mmu files -->
2660         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2661         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2662         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2663         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2664         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.1" attr="config" condition="GCC"/>
2665         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2666         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2667         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2668         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2669         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2670         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2671         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2672
2673       </files>
2674     </component>
2675
2676     <!-- Cortex-A7 -->
2677     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA7 CMSIS">
2678       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2679       <files>
2680         <!-- include folder / device header file -->
2681         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2682         <!-- startup / system / mmu files -->
2683         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2684         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2685         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2686         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2687         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.1" attr="config" condition="GCC"/>
2688         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2689         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2690         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2691         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2692         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2693         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2694         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2695       </files>
2696     </component>
2697
2698     <!-- Cortex-A9 -->
2699     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.2" condition="ARMCA9 CMSIS">
2700       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2701       <files>
2702         <!-- include folder / device header file -->
2703         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2704         <!-- startup / system / mmu files -->
2705         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2706         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2707         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2708         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2709         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.1" attr="config" condition="GCC"/>
2710         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2711         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2712         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2713         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2714         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2715         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2716         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2717       </files>
2718     </component>
2719
2720     <!-- IRQ Controller -->
2721     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2722       <description>IRQ Controller implementation using GIC</description>
2723       <files>
2724         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2725       </files>
2726     </component>
2727
2728     <!-- OS Tick -->
2729     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2730       <description>OS Tick implementation using Private Timer</description>
2731       <files>
2732         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2733       </files>
2734     </component>
2735
2736     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2737       <description>OS Tick implementation using Generic Physical Timer</description>
2738       <files>
2739         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2740       </files>
2741     </component>
2742
2743     <!-- CMSIS-DSP component -->
2744     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.10.0-dev" isDefaultVariant="true" condition="CMSIS DSP">
2745       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2746       <files>
2747         <!-- CPU independent -->
2748         <file category="doc"      name="CMSIS/Documentation/DSP/html/index.html"/>
2749         <file category="header"   name="CMSIS/DSP/Include/arm_math.h"/>
2750         <file category="header"   name="CMSIS/DSP/Include/arm_math_f16.h"/>
2751         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables.h"/>
2752         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables_f16.h"/>
2753         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs.h"/>
2754         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs_f16.h"/>
2755
2756         <file category="include"  name="CMSIS/DSP/PrivateInclude/"/>
2757         <file category="include"  name="CMSIS/DSP/Include/"/>
2758
2759         <!-- DSP sources (core) -->
2760         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
2761
2762         <file category="source"   name="CMSIS/DSP/Source/QuaternionMathFunctions/QuaternionMathFunctions.c"/>
2763
2764         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
2765         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
2766         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
2767         <file category="source"   name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
2768         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
2769         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
2770         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
2771         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
2772         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
2773         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
2774         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
2775         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
2776
2777         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctions.c"/>
2778
2779         <!-- DSP sources F16 versions -->
2780         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.c"/>
2781         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c"/>
2782         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.c"/>
2783         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTablesF16.c"/>
2784         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctionsF16.c"/>
2785         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctionsF16.c"/>
2786         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.c"/>
2787         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c"/>
2788         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctionsF16.c"/>
2789         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctionsF16.c"/>
2790         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctionsF16.c"/>
2791         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctionsF16.c"/>
2792         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctionsF16.c"/>
2793
2794         <!-- Compute Library for Cortex-A -->
2795         <file category="header"   name="CMSIS/DSP/ComputeLibrary/Include/NEMath.h"        condition="ARMv7-A Device"/>
2796         <file category="source"   name="CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c"  condition="ARMv7-A Device"/>
2797       </files>
2798     </component>
2799
2800     <!-- CMSIS-NN component -->
2801     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="3.0.0" condition="CMSIS NN">
2802       <description>CMSIS-NN Neural Network Library</description>
2803       <files>
2804         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2805         <file category="header" name="CMSIS/NN/Include/arm_nn_types.h"/>
2806         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2807         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
2808         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
2809
2810         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2811         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2812         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2813         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
2814         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
2815         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
2816         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c"/>
2817         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2818         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.c"/>
2819         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2820         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2821         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
2822         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
2823         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_fast_s16.c"/>
2824         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
2825         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
2826         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s16.c"/>
2827         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
2828         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
2829         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2830         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2831         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
2832         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c"/>
2833         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s16.c"/>
2834         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2835         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2836         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
2837         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
2838         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2839         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
2840         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
2841         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
2842         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
2843         <file category="source" name="CMSIS/NN/Source/SVDFunctions/arm_svdf_s8.c"/>
2844         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
2845         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
2846         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2847         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
2848         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
2849         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
2850         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2851         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2852         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2853         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2854         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
2855         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
2856         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2857         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
2858         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s16.c"/>
2859         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c"/>
2860         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
2861         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
2862         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
2863         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_kernel_s16.c"/>
2864         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.c"/>
2865         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
2866         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
2867         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2868         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c"/>
2869         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2870         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
2871         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
2872         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
2873         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
2874         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s16.c"/>
2875         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2876         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2877         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2878         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2879         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2880         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2881         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2882         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
2883         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
2884         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2885         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
2886       </files>
2887     </component>
2888
2889     <!-- CMSIS-RTOS Keil RTX component -->
2890     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2891       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2892       <RTE_Components_h>
2893         <!-- the following content goes into file 'RTE_Components.h' -->
2894         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2895         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2896       </RTE_Components_h>
2897       <files>
2898         <!-- CPU independent -->
2899         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2900         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2901         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2902
2903         <!-- RTX templates -->
2904         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2905         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2906         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2907         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2908         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2909         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2910         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2911         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2912         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2913         <!-- tool-chain specific template file -->
2914         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2915         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2916         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2917
2918         <!-- CPU and Compiler dependent -->
2919         <!-- ARMCC -->
2920         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2921         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2922         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2923         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2924         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2925         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2926         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2927         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2928         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2929         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2930         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2931         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2932         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2933         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2934         <!-- GCC -->
2935         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2936         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2937         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2938         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2939         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2940         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2941         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2942         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2943         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2944         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2945         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2946         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2947         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2948         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2949         <!-- IAR -->
2950         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2951         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2952         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2953         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2954         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2955         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2956         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2957         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2958         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2959         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2960         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2961         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2962         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2963         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2964       </files>
2965     </component>
2966     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2967     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
2968       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2969       <RTE_Components_h>
2970         <!-- the following content goes into file 'RTE_Components.h' -->
2971         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2972         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2973       </RTE_Components_h>
2974       <files>
2975         <!-- CPU independent -->
2976         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2977         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2978         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2979
2980         <!-- RTX templates -->
2981         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2982         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2983         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2984         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2985         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2986         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2987         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2988         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2989         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2990         <!-- tool-chain specific template file -->
2991         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2992         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2993         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2994
2995         <!-- CPU and Compiler dependent -->
2996         <!-- ARMCC -->
2997         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2998         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2999         <!-- GCC -->
3000         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3001         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3002         <!-- IAR -->
3003       </files>
3004     </component>
3005
3006     <!-- CMSIS-RTOS Keil RTX5 component -->
3007     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.4" Capiversion="1.0.0" condition="RTOS RTX5">
3008       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3009       <RTE_Components_h>
3010         <!-- the following content goes into file 'RTE_Components.h' -->
3011         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3012         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3013       </RTE_Components_h>
3014       <files>
3015         <!-- RTX header file -->
3016         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3017         <!-- RTX compatibility module for API V1 -->
3018         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3019       </files>
3020     </component>
3021
3022     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3023     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5">
3024       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
3025       <RTE_Components_h>
3026         <!-- the following content goes into file 'RTE_Components.h' -->
3027         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3028         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3029       </RTE_Components_h>
3030       <files>
3031         <!-- RTX documentation -->
3032         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3033
3034         <!-- RTX header files -->
3035         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3036
3037         <!-- RTX configuration -->
3038         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3039         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3040
3041         <!-- RTX templates -->
3042         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3043         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3044         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3045         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3046         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3047         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3048         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3049         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3050         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3051         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3052
3053         <!-- RTX library configuration -->
3054         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3055
3056         <!-- RTX libraries (CPU and Compiler dependent) -->
3057         <!-- ARMCC -->
3058         <file category="library" condition="CM0_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3059         <file category="library" condition="CM1_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3060         <file category="library" condition="CM3_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3061         <file category="library" condition="CM4_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3062         <file category="library" condition="CM4_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3063         <file category="library" condition="CM7_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3064         <file category="library" condition="CM7_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3065         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3066         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3067         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3068         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3069         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3070         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3071         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3072         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3073         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3074         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3075         <!-- GCC -->
3076         <file category="library" condition="CM0_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3077         <file category="library" condition="CM1_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3078         <file category="library" condition="CM3_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3079         <file category="library" condition="CM4_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3080         <file category="library" condition="CM4_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3081         <file category="library" condition="CM7_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3082         <file category="library" condition="CM7_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3083         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3084         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3085         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3086         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3087         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3088         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3089         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3090         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3091         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3092         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3093         <!-- IAR -->
3094         <file category="library" condition="CM0_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3095         <file category="library" condition="CM1_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3096         <file category="library" condition="CM3_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3097         <file category="library" condition="CM4_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3098         <file category="library" condition="CM4_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3099         <file category="library" condition="CM7_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3100         <file category="library" condition="CM7_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3101         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3102         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3103         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3104         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3105         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3106         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3107         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3108         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3109         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3110         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3111       </files>
3112     </component>
3113     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3114       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
3115       <RTE_Components_h>
3116         <!-- the following content goes into file 'RTE_Components.h' -->
3117         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3118         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3119         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3120       </RTE_Components_h>
3121       <files>
3122         <!-- RTX documentation -->
3123         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3124
3125         <!-- RTX header files -->
3126         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3127
3128         <!-- RTX configuration -->
3129         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3130         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3131
3132         <!-- RTX templates -->
3133         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3134         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3135         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3136         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3137         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3138         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3139         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3140         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3141         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3142         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3143
3144         <!-- RTX library configuration -->
3145         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3146
3147         <!-- RTX libraries (CPU and Compiler dependent) -->
3148         <!-- ARMCC -->
3149         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3150         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3151         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3152         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3153         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3154         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3155         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3156         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3157         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3158         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3159         <!-- GCC -->
3160         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3161         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3162         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3163         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3164         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3165         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3166         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3167         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3168         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3169         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3170         <!-- IAR -->
3171         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3172         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3173         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3174         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3175         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3176         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3177         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3178         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3179         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3180         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3181       </files>
3182     </component>
3183     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5">
3184       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
3185       <RTE_Components_h>
3186         <!-- the following content goes into file 'RTE_Components.h' -->
3187         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3188         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3189         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3190       </RTE_Components_h>
3191       <files>
3192         <!-- RTX documentation -->
3193         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3194
3195         <!-- RTX header files -->
3196         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3197
3198         <!-- RTX configuration -->
3199         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3200         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3201
3202         <!-- RTX templates -->
3203         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3204         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3205         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3206         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3207         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3208         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3209         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3210         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3211         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3212         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3213
3214         <!-- RTX sources (core) -->
3215         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3216         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3217         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3218         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3219         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3220         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3221         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3222         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3223         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3224         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3225         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3226         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3227         <!-- RTX sources (library configuration) -->
3228         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3229         <!-- RTX sources (handlers ARMCC) -->
3230         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="CM0_ARMCC5"/>
3231         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM0_ARMCC6"/>
3232         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="CM1_ARMCC5"/>
3233         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM1_ARMCC6"/>
3234         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM3_ARMCC5"/>
3235         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM3_ARMCC6"/>
3236         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM4_ARMCC5"/>
3237         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_ARMCC6"/>
3238         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM4_FP_ARMCC5"/>
3239         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_FP_ARMCC6"/>
3240         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM7_ARMCC5"/>
3241         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_ARMCC6"/>
3242         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM7_FP_ARMCC5"/>
3243         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_FP_ARMCC6"/>
3244         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_ARMCC"/>
3245         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_ARMCC"/>
3246         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_ARMCC"/>
3247         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_ARMCC"/>
3248         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_ARMCC"/>
3249         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3250         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3251         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3252         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_ARMCC"/>
3253         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_ARMCC"/>
3254         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_ARMCC"/>
3255         <!-- RTX sources (handlers GCC) -->
3256         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM0_GCC"/>
3257         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM1_GCC"/>
3258         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM3_GCC"/>
3259         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_GCC"/>
3260         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_FP_GCC"/>
3261         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_GCC"/>
3262         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_FP_GCC"/>
3263         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3264         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3265         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3266         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3267         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3268         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3269         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3270         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3271         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3272         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3273         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3274         <!-- RTX sources (handlers IAR) -->
3275         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="CM0_IAR"/>
3276         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="CM1_IAR"/>
3277         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM3_IAR"/>
3278         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM4_IAR"/>
3279         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM4_FP_IAR"/>
3280         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM7_IAR"/>
3281         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM7_FP_IAR"/>
3282         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3283         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3284         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3285         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3286         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3287         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3288         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3289         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3290         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3291         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3292         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3293         <!-- OS Tick (SysTick) -->
3294         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3295       </files>
3296     </component>
3297     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3298       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3299       <RTE_Components_h>
3300         <!-- the following content goes into file 'RTE_Components.h' -->
3301         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3302         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3303         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3304       </RTE_Components_h>
3305       <files>
3306         <!-- RTX documentation -->
3307         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3308
3309         <!-- RTX header files -->
3310         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3311
3312         <!-- RTX configuration -->
3313         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3314         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3315
3316         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3317
3318         <!-- RTX templates -->
3319         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3320         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3321         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3322         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3323         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3324         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3325         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3326         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3327         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3328         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3329
3330         <!-- RTX sources (core) -->
3331         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3332         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3333         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3334         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3335         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3336         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3337         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3338         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3339         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3340         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3341         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3342         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3343         <!-- RTX sources (library configuration) -->
3344         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3345         <!-- RTX sources (handlers ARMCC) -->
3346         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7a.s" condition="CA_ARMCC5"/>
3347         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="CA_ARMCC6"/>
3348         <!-- RTX sources (handlers GCC) -->
3349         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="CA_GCC"/>
3350         <!-- RTX sources (handlers IAR) -->
3351         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7a.s" condition="CA_IAR"/>
3352       </files>
3353     </component>
3354     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.4" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3355       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
3356       <RTE_Components_h>
3357         <!-- the following content goes into file 'RTE_Components.h' -->
3358         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3359         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3360         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3361         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3362       </RTE_Components_h>
3363       <files>
3364         <!-- RTX documentation -->
3365         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3366
3367         <!-- RTX header files -->
3368         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3369
3370         <!-- RTX configuration -->
3371         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3372         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3373
3374         <!-- RTX templates -->
3375         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3376         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3377         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3378         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3379         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3380         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3381         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3382         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3383         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3384         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3385
3386         <!-- RTX sources (core) -->
3387         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3388         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3389         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3390         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3391         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3392         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3393         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3394         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3395         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3396         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3397         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3398         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3399         <!-- RTX sources (library configuration) -->
3400         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3401         <!-- RTX sources (ARMCC handlers) -->
3402         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_ARMCC"/>
3403         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_ARMCC"/>
3404         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_ARMCC"/>
3405         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_ARMCC"/>
3406         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_ARMCC"/>
3407         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3408         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3409         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3410         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_ARMCC"/>
3411         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_ARMCC"/>
3412         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_ARMCC"/>
3413         <!-- RTX sources (GCC handlers) -->
3414         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3415         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3416         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3417         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3418         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3419         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3420         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3421         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3422         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3423         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3424         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3425         <!-- RTX sources (IAR handlers) -->
3426         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3427         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3428         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3429         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3430         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3431         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3432         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3433         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3434         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3435         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3436         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3437         <!-- OS Tick (SysTick) -->
3438         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3439       </files>
3440     </component>
3441
3442     <!-- CMSIS-Driver Custom components -->
3443     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3444       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3445       <files>
3446         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3447         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3448       </files>
3449     </component>
3450     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3451       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3452       <files>
3453         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3454         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3455       </files>
3456     </component>
3457     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3458       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3459       <files>
3460         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3461         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3462       </files>
3463     </component>
3464     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3465       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3466       <files>
3467         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3468         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3469       </files>
3470     </component>
3471     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3472       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3473       <files>
3474         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3475         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3476       </files>
3477     </component>
3478     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3479       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3480       <files>
3481         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3482         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3483       </files>
3484     </component>
3485     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3486       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3487       <files>
3488         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3489         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3490       </files>
3491     </component>
3492     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3493       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3494       <files>
3495         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3496         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
3497       </files>
3498     </component>
3499     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3500       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3501       <files>
3502         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3503         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3504         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3505         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3506       </files>
3507     </component>
3508     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3509       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3510       <files>
3511         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3512         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3513       </files>
3514     </component>
3515     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3516       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3517       <files>
3518         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3519         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3520       </files>
3521     </component>
3522     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3523       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3524       <files>
3525         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3526         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3527       </files>
3528     </component>
3529     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3530       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3531       <files>
3532         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3533         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3534       </files>
3535     </component>
3536     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3537       <description>Access to #include Driver_WiFi.h file</description>
3538       <files>
3539         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3540         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
3541       </files>
3542     </component>
3543
3544     <!-- VIO components -->
3545     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
3546       <description>Virtual I/O custom implementation template</description>
3547       <files>
3548         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
3549       </files>
3550     </component>
3551     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
3552       <description>Virtual I/O implementation using memory only</description>
3553       <files>
3554         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
3555       </files>
3556     </component>
3557
3558   </components>
3559
3560   <boards>
3561     <board name="uVision Simulator" vendor="Keil">
3562       <description>uVision Simulator</description>
3563       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3564       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3565       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3566       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3567       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3568       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3569       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3570       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3571       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3572       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3573       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3574       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3575       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3576       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3577       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
3578       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3579       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3580       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3581       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3582       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3583       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3584       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3585       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3586       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3587       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3588       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
3589     </board>
3590
3591     <board name="EWARM Simulator" vendor="IAR">
3592       <description>EWARM Simulator</description>
3593       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3594       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3595       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3596       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3597       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3598       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3599       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3600       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3601       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3602       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3603       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3604       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3605       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3606       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3607       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
3608       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3609       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3610       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3611       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3612       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3613       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3614       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3615       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3616       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3617       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3618       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
3619     </board>
3620   </boards>
3621
3622   <examples>
3623     <example name="DSP_Lib Bayes example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_bayes_example">
3624       <description>DSP_Lib Bayes example</description>
3625       <board name="uVision Simulator" vendor="Keil"/>
3626       <project>
3627         <environment name="uv" load="arm_bayes_example.uvprojx"/>
3628       </project>
3629       <attributes>
3630         <component Cclass="CMSIS" Cgroup="CORE"/>
3631         <component Cclass="CMSIS" Cgroup="DSP"/>
3632         <component Cclass="Device" Cgroup="Startup"/>
3633         <category>Getting Started</category>
3634       </attributes>
3635     </example>
3636
3637     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3638       <description>DSP_Lib Class Marks example</description>
3639       <board name="uVision Simulator" vendor="Keil"/>
3640       <project>
3641         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3642       </project>
3643       <attributes>
3644         <component Cclass="CMSIS" Cgroup="CORE"/>
3645         <component Cclass="CMSIS" Cgroup="DSP"/>
3646         <component Cclass="Device" Cgroup="Startup"/>
3647         <category>Getting Started</category>
3648       </attributes>
3649     </example>
3650
3651     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3652       <description>DSP_Lib Convolution example</description>
3653       <board name="uVision Simulator" vendor="Keil"/>
3654       <project>
3655         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3656       </project>
3657       <attributes>
3658         <component Cclass="CMSIS" Cgroup="CORE"/>
3659         <component Cclass="CMSIS" Cgroup="DSP"/>
3660         <component Cclass="Device" Cgroup="Startup"/>
3661         <category>Getting Started</category>
3662       </attributes>
3663     </example>
3664
3665     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3666       <description>DSP_Lib Dotproduct example</description>
3667       <board name="uVision Simulator" vendor="Keil"/>
3668       <project>
3669         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3670       </project>
3671       <attributes>
3672         <component Cclass="CMSIS" Cgroup="CORE"/>
3673         <component Cclass="CMSIS" Cgroup="DSP"/>
3674         <component Cclass="Device" Cgroup="Startup"/>
3675         <category>Getting Started</category>
3676       </attributes>
3677     </example>
3678
3679     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3680       <description>DSP_Lib FFT Bin example</description>
3681       <board name="uVision Simulator" vendor="Keil"/>
3682       <project>
3683         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3684       </project>
3685       <attributes>
3686         <component Cclass="CMSIS" Cgroup="CORE"/>
3687         <component Cclass="CMSIS" Cgroup="DSP"/>
3688         <component Cclass="Device" Cgroup="Startup"/>
3689         <category>Getting Started</category>
3690       </attributes>
3691     </example>
3692
3693     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3694       <description>DSP_Lib FIR example</description>
3695       <board name="uVision Simulator" vendor="Keil"/>
3696       <project>
3697         <environment name="uv" load="arm_fir_example.uvprojx"/>
3698       </project>
3699       <attributes>
3700         <component Cclass="CMSIS" Cgroup="CORE"/>
3701         <component Cclass="CMSIS" Cgroup="DSP"/>
3702         <component Cclass="Device" Cgroup="Startup"/>
3703         <category>Getting Started</category>
3704       </attributes>
3705     </example>
3706
3707     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3708       <description>DSP_Lib Graphic Equalizer example</description>
3709       <board name="uVision Simulator" vendor="Keil"/>
3710       <project>
3711         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3712       </project>
3713       <attributes>
3714         <component Cclass="CMSIS" Cgroup="CORE"/>
3715         <component Cclass="CMSIS" Cgroup="DSP"/>
3716         <component Cclass="Device" Cgroup="Startup"/>
3717         <category>Getting Started</category>
3718       </attributes>
3719     </example>
3720
3721     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3722       <description>DSP_Lib Linear Interpolation example</description>
3723       <board name="uVision Simulator" vendor="Keil"/>
3724       <project>
3725         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3726       </project>
3727       <attributes>
3728         <component Cclass="CMSIS" Cgroup="CORE"/>
3729         <component Cclass="CMSIS" Cgroup="DSP"/>
3730         <component Cclass="Device" Cgroup="Startup"/>
3731         <category>Getting Started</category>
3732       </attributes>
3733     </example>
3734
3735     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3736       <description>DSP_Lib Matrix example</description>
3737       <board name="uVision Simulator" vendor="Keil"/>
3738       <project>
3739         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3740       </project>
3741       <attributes>
3742         <component Cclass="CMSIS" Cgroup="CORE"/>
3743         <component Cclass="CMSIS" Cgroup="DSP"/>
3744         <component Cclass="Device" Cgroup="Startup"/>
3745         <category>Getting Started</category>
3746       </attributes>
3747     </example>
3748
3749     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3750       <description>DSP_Lib Signal Convergence example</description>
3751       <board name="uVision Simulator" vendor="Keil"/>
3752       <project>
3753         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3754       </project>
3755       <attributes>
3756         <component Cclass="CMSIS" Cgroup="CORE"/>
3757         <component Cclass="CMSIS" Cgroup="DSP"/>
3758         <component Cclass="Device" Cgroup="Startup"/>
3759         <category>Getting Started</category>
3760       </attributes>
3761     </example>
3762
3763     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3764       <description>DSP_Lib Sinus/Cosinus example</description>
3765       <board name="uVision Simulator" vendor="Keil"/>
3766       <project>
3767         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3768       </project>
3769       <attributes>
3770         <component Cclass="CMSIS" Cgroup="CORE"/>
3771         <component Cclass="CMSIS" Cgroup="DSP"/>
3772         <component Cclass="Device" Cgroup="Startup"/>
3773         <category>Getting Started</category>
3774       </attributes>
3775     </example>
3776
3777     <example name="DSP_Lib SVM example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_svm_example">
3778       <description>DSP_Lib SVM example</description>
3779       <board name="uVision Simulator" vendor="Keil"/>
3780       <project>
3781         <environment name="uv" load="arm_svm_example.uvprojx"/>
3782       </project>
3783       <attributes>
3784         <component Cclass="CMSIS" Cgroup="CORE"/>
3785         <component Cclass="CMSIS" Cgroup="DSP"/>
3786         <component Cclass="Device" Cgroup="Startup"/>
3787         <category>Getting Started</category>
3788       </attributes>
3789     </example>
3790
3791     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3792       <description>DSP_Lib Variance example</description>
3793       <board name="uVision Simulator" vendor="Keil"/>
3794       <project>
3795         <environment name="uv" load="arm_variance_example.uvprojx"/>
3796       </project>
3797       <attributes>
3798         <component Cclass="CMSIS" Cgroup="CORE"/>
3799         <component Cclass="CMSIS" Cgroup="DSP"/>
3800         <component Cclass="Device" Cgroup="Startup"/>
3801         <category>Getting Started</category>
3802       </attributes>
3803     </example>
3804
3805     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3806       <description>CMSIS-RTOS2 Blinky example</description>
3807       <board name="uVision Simulator" vendor="Keil"/>
3808       <project>
3809         <environment name="uv" load="Blinky.uvprojx"/>
3810       </project>
3811       <attributes>
3812         <component Cclass="CMSIS" Cgroup="CORE"/>
3813         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3814         <component Cclass="Device" Cgroup="Startup"/>
3815         <category>Getting Started</category>
3816       </attributes>
3817     </example>
3818
3819     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3820       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3821       <board name="uVision Simulator" vendor="Keil"/>
3822       <project>
3823         <environment name="uv" load="Blinky.uvprojx"/>
3824       </project>
3825       <attributes>
3826         <component Cclass="CMSIS" Cgroup="CORE"/>
3827         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3828         <component Cclass="Device" Cgroup="Startup"/>
3829         <category>Getting Started</category>
3830       </attributes>
3831     </example>
3832
3833     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3834       <description>CMSIS-RTOS2 Message Queue Example</description>
3835       <board name="uVision Simulator" vendor="Keil"/>
3836       <project>
3837         <environment name="uv" load="MsqQueue.uvprojx"/>
3838       </project>
3839       <attributes>
3840         <component Cclass="CMSIS" Cgroup="CORE"/>
3841         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3842         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3843         <component Cclass="Device" Cgroup="Startup"/>
3844         <category>Getting Started</category>
3845       </attributes>
3846     </example>
3847
3848     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3849       <description>CMSIS-RTOS2 Memory Pool Example</description>
3850       <board name="uVision Simulator" vendor="Keil"/>
3851       <project>
3852         <environment name="uv" load="MemPool.uvprojx"/>
3853       </project>
3854       <attributes>
3855         <component Cclass="CMSIS" Cgroup="CORE"/>
3856         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3857         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3858         <component Cclass="Device" Cgroup="Startup"/>
3859         <category>Getting Started</category>
3860       </attributes>
3861     </example>
3862
3863     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3864       <description>Bare-metal secure/non-secure example without RTOS</description>
3865       <board name="uVision Simulator" vendor="Keil"/>
3866       <project>
3867         <environment name="uv" load="NoRTOS.uvmpw"/>
3868       </project>
3869       <attributes>
3870         <component Cclass="CMSIS" Cgroup="CORE"/>
3871         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3872         <component Cclass="Device" Cgroup="Startup"/>
3873         <category>Getting Started</category>
3874       </attributes>
3875     </example>
3876
3877     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3878       <description>Secure/non-secure RTOS example with thread context management</description>
3879       <board name="uVision Simulator" vendor="Keil"/>
3880       <project>
3881         <environment name="uv" load="RTOS.uvmpw"/>
3882       </project>
3883       <attributes>
3884         <component Cclass="CMSIS" Cgroup="CORE"/>
3885         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3886         <component Cclass="Device" Cgroup="Startup"/>
3887         <category>Getting Started</category>
3888       </attributes>
3889     </example>
3890
3891     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3892       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3893       <board name="uVision Simulator" vendor="Keil"/>
3894       <project>
3895         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3896       </project>
3897       <attributes>
3898         <component Cclass="CMSIS" Cgroup="CORE"/>
3899         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3900         <component Cclass="Device" Cgroup="Startup"/>
3901         <category>Getting Started</category>
3902       </attributes>
3903     </example>
3904
3905     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
3906       <description>CMSIS-RTOS2 Blinky example</description>
3907       <board name="EWARM Simulator" vendor="IAR"/>
3908       <project>
3909         <environment name="iar" load="Blinky/Blinky.ewp"/>
3910       </project>
3911       <attributes>
3912         <component Cclass="CMSIS" Cgroup="CORE"/>
3913         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3914         <component Cclass="Device" Cgroup="Startup"/>
3915         <category>Getting Started</category>
3916       </attributes>
3917     </example>
3918
3919     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
3920       <description>CMSIS-RTOS2 Message Queue Example</description>
3921       <board name="EWARM Simulator" vendor="IAR"/>
3922       <project>
3923         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
3924       </project>
3925       <attributes>
3926         <component Cclass="CMSIS" Cgroup="CORE"/>
3927         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3928         <component Cclass="Device" Cgroup="Startup"/>
3929         <category>Getting Started</category>
3930       </attributes>
3931     </example>
3932
3933   </examples>
3934
3935 </package>