begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.3.1-dev1">
  12       CMSIS-Core(M): 5.1.2 (see revision history for details)
  13       CMSIS-Core(A): 1.1.2 (see revision history for details)
  14       CMSIS-RTOS2:
  15         - RTX 5.3.1 (see revision history for details)
  16       CMSIS-Driver:
  17         - Flash Driver API V2.2.0
  18     </release>
  19     <release version="5.3.1-dev0">
  20       Patch release scheduled for after EW18.
  21     </release>
  22     <release version="5.3.0" date="2018-02-22">
  23       Updated Arm company brand.
  24       CMSIS-Core(M): 5.1.1 (see revision history for details)
  25       CMSIS-Core(A): 1.1.1 (see revision history for details)
  26       CMSIS-DAP: 2.0.0 (see revision history for details)
  27       CMSIS-NN: 1.0.0
  28         - Initial contribution of the bare metal Neural Network Library.
  29       CMSIS-RTOS2:
  30         - RTX 5.3.0 (see revision history for details)
  31         - OS Tick API 1.0.1
  32     </release>
  33     <release version="5.2.0" date="2017-11-16">
  34       CMSIS-Core(M): 5.1.0 (see revision history for details)
  35         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  36         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  37       CMSIS-Core(A): 1.1.0 (see revision history for details)
  38         - Added compiler_iccarm.h.
  39         - Added additional access functions for physical timer.
  40       CMSIS-DAP: 1.2.0 (see revision history for details)
  41       CMSIS-DSP: 1.5.2 (see revision history for details)
  42       CMSIS-Driver: 2.6.0 (see revision history for details)
  43         - CAN Driver API V1.2.0
  44         - NAND Driver API V2.3.0
  45       CMSIS-RTOS:
  46         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
  47       CMSIS-RTOS2:
  48         - API 2.1.2 (see revision history for details)
  49         - RTX 5.2.3 (see revision history for details)
  50       Devices:
  51         - Added GCC startup and linker script for Cortex-A9.
  52         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
  53         - Added IAR startup code for Cortex-A9
  54     </release>
  55     <release version="5.1.1" date="2017-09-19">
  56       CMSIS-RTOS2:
  57       - RTX 5.2.1 (see revision history for details)
  58     </release>
  59     <release version="5.1.0" date="2017-08-04">
  60       CMSIS-Core(M): 5.0.2 (see revision history for details)
  61       - Changed Version Control macros to be core agnostic.
  62       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  63       CMSIS-Core(A): 1.0.0 (see revision history for details)
  64       - Initial release
  65       - IRQ Controller API 1.0.0
  66       CMSIS-Driver: 2.05 (see revision history for details)
  67       - All typedefs related to status have been made volatile.
  68       CMSIS-RTOS2:
  69       - API 2.1.1 (see revision history for details)
  70       - RTX 5.2.0 (see revision history for details)
  71       - OS Tick API 1.0.0
  72       CMSIS-DSP: 1.5.2 (see revision history for details)
  73       - Fixed GNU Compiler specific diagnostics.
  74       CMSIS-PACK: 1.5.0 (see revision history for details)
  75       - added System Description File (*.SDF) Format
  76       CMSIS-Zone: 0.0.1 (Preview)
  77       - Initial specification draft
  78     </release>
  79     <release version="5.0.1" date="2017-02-03">
  80       Package Description:
  81       - added taxonomy for Cclass RTOS
  82       CMSIS-RTOS2:
  83       - API 2.1   (see revision history for details)
  84       - RTX 5.1.0 (see revision history for details)
  85       CMSIS-Core: 5.0.1 (see revision history for details)
  86       - Added __PACKED_STRUCT macro
  87       - Added uVisior support
  88       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  89       - Updated template for secure main function (main_s.c)
  90       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  91       CMSIS-DSP: 1.5.1 (see revision history for details)
  92       - added ARMv8M DSP libraries.
  93       CMSIS-PACK:1.4.9 (see revision history for details)
  94       - added Pack Index File specification and schema file
  95     </release>
  96     <release version="5.0.0" date="2016-11-11">
  97       Changed open source license to Apache 2.0
  98       CMSIS_Core:
  99        - Added support for Cortex-M23 and Cortex-M33.
 100        - Added ARMv8-M device configurations for mainline and baseline.
 101        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 102        - Added cmsis_compiler.h to unify compiler behaviour.
 103        - Updated function SCB_EnableICache (for Cortex-M7).
 104        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 105       CMSIS-RTOS:
 106         - bug fix in RTX 4.82 (see revision history for details)
 107       CMSIS-RTOS2:
 108         - new API including compatibility layer to CMSIS-RTOS
 109         - reference implementation based on RTX5
 110         - supports all Cortex-M variants including TrustZone for ARMv8-M
 111       CMSIS-SVD:
 112        - reworked SVD format documentation
 113        - removed SVD file database documentation as SVD files are distributed in packs
 114        - updated SVDConv for Win32 and Linux
 115       CMSIS-DSP:
 116        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 117        - Added DSP libraries build projects to CMSIS pack.
 118     </release>
 119     <release version="4.5.0" date="2015-10-28">
 120       - CMSIS-Core     4.30.0  (see revision history for details)
 121       - CMSIS-DAP      1.1.0   (unchanged)
 122       - CMSIS-Driver   2.04.0  (see revision history for details)
 123       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 124       - CMSIS-PACK     1.4.1   (see revision history for details)
 125       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 126       - CMSIS-SVD      1.3.1   (see revision history for details)
 127     </release>
 128     <release version="4.4.0" date="2015-09-11">
 129       - CMSIS-Core     4.20   (see revision history for details)
 130       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 131       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 132       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 133       - CMSIS-RTOS
 134         -- API         1.02   (unchanged)
 135         -- RTX         4.79   (see revision history for details)
 136       - CMSIS-SVD      1.3.0  (see revision history for details)
 137       - CMSIS-DAP      1.1.0  (extended with SWO support)
 138     </release>
 139     <release version="4.3.0" date="2015-03-20">
 140       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 141       - CMSIS-DSP      1.4.5  (see revision history for details)
 142       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 143       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 144       - CMSIS-RTOS
 145         -- API         1.02   (unchanged)
 146         -- RTX         4.78   (see revision history for details)
 147       - CMSIS-SVD      1.2    (unchanged)
 148     </release>
 149     <release version="4.2.0" date="2014-09-24">
 150       Adding Cortex-M7 support
 151       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 152       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 153       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 154       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 155       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 156     </release>
 157     <release version="4.1.1" date="2014-06-30">
 158       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 159     </release>
 160     <release version="4.1.0" date="2014-06-12">
 161       - CMSIS-Driver   2.02  (incompatible update)
 162       - CMSIS-Pack     1.3   (see revision history for details)
 163       - CMSIS-DSP      1.4.2 (unchanged)
 164       - CMSIS-Core     3.30  (unchanged)
 165       - CMSIS-RTOS RTX 4.74  (unchanged)
 166       - CMSIS-RTOS API 1.02  (unchanged)
 167       - CMSIS-SVD      1.10  (unchanged)
 168       PACK:
 169       - removed G++ specific files from PACK
 170       - added Component Startup variant "C Startup"
 171       - added Pack Checking Utility
 172       - updated conditions to reflect tool-chain dependency
 173       - added Taxonomy for Graphics
 174       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 175     </release>
 176     <release version="4.0.0">
 177       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 178       - CMSIS-Pack     1.1   Preliminary
 179       - CMSIS-DSP      1.4.2 (see revision history for details)
 180       - CMSIS-Core     3.30  (see revision history for details)
 181       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 182       - CMSIS-RTOS API 1.02  (unchanged)
 183       - CMSIS-SVD      1.10  (unchanged)
 184     </release>
 185     <release version="3.20.4">
 186       - CMSIS-RTOS 4.74 (see revision history for details)
 187       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 188     </release>
 189     <release version="3.20.3">
 190       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 191       - CMSIS-RTOS 4.73 (see revision history for details)
 192     </release>
 193     <release version="3.20.2">
 194       - CMSIS-Pack documentation has been added
 195       - CMSIS-Drivers header and documentation have been added to PACK
 196       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 197     </release>
 198     <release version="3.20.1">
 199       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 200       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 201     </release>
 202     <release version="3.20.0">
 203       The software portions that are deployed in the application program are now under a BSD license which allows usage
 204       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 205       The individual components have been update as listed below:
 206       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 207       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 208       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 209       - CMSIS-SVD is unchanged.
 210     </release>
 211   </releases>
 212
 213   <taxonomy>
 214     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 215     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 216     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 217     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 218     <description Cclass="File System">File Drive Support and File System</description>
 219     <description Cclass="Graphics">Graphical User Interface</description>
 220     <description Cclass="Network">Network Stack using Internet Protocols</description>
 221     <description Cclass="USB">Universal Serial Bus Stack</description>
 222     <description Cclass="Compiler">Compiler Software Extensions</description>
 223     <description Cclass="RTOS">Real-time Operating System</description>
 224   </taxonomy>
 225
 226   <devices>
 227     <!-- ******************************  Cortex-M0  ****************************** -->
 228     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 229       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 230       <description>
 231 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 232 - simple, easy-to-use programmers model
 233 - highly efficient ultra-low power operation
 234 - excellent code density
 235 - deterministic, high-performance interrupt handling
 236 - upward compatibility with the rest of the Cortex-M processor family.
 237       </description>
 238       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 239       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 240       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 241       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 242
 243       <device Dname="ARMCM0">
 244         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 245         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 246       </device>
 247     </family>
 248
 249     <!-- ******************************  Cortex-M0P  ****************************** -->
 250     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 251       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 252       <description>
 253 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 254 - simple, easy-to-use programmers model
 255 - highly efficient ultra-low power operation
 256 - excellent code density
 257 - deterministic, high-performance interrupt handling
 258 - upward compatibility with the rest of the Cortex-M processor family.
 259       </description>
 260       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 261       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 262       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 263       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 264
 265       <device Dname="ARMCM0P">
 266         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 267         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 268       </device>
 269
 270       <device Dname="ARMCM0P_MPU">
 271         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 272         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 273       </device>
 274     </family>
 275
 276     <!-- ******************************  Cortex-M3  ****************************** -->
 277     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 278       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 279       <description>
 280 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 281 - simple, easy-to-use programmers model
 282 - highly efficient ultra-low power operation
 283 - excellent code density
 284 - deterministic, high-performance interrupt handling
 285 - upward compatibility with the rest of the Cortex-M processor family.
 286       </description>
 287       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 288       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 289       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 290       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 291
 292       <device Dname="ARMCM3">
 293         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 294         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 295       </device>
 296     </family>
 297
 298     <!-- ******************************  Cortex-M4  ****************************** -->
 299     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 300       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 301       <description>
 302 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 303 - simple, easy-to-use programmers model
 304 - highly efficient ultra-low power operation
 305 - excellent code density
 306 - deterministic, high-performance interrupt handling
 307 - upward compatibility with the rest of the Cortex-M processor family.
 308       </description>
 309       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 310       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 311       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 312       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 313
 314       <device Dname="ARMCM4">
 315         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 316         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 317       </device>
 318
 319       <device Dname="ARMCM4_FP">
 320         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 321         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 322       </device>
 323     </family>
 324
 325     <!-- ******************************  Cortex-M7  ****************************** -->
 326     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 327       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 328       <description>
 329 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 330 - simple, easy-to-use programmers model
 331 - highly efficient ultra-low power operation
 332 - excellent code density
 333 - deterministic, high-performance interrupt handling
 334 - upward compatibility with the rest of the Cortex-M processor family.
 335       </description>
 336       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 337       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 338       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 339       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 340
 341       <device Dname="ARMCM7">
 342         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 343         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 344       </device>
 345
 346       <device Dname="ARMCM7_SP">
 347         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 348         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 349       </device>
 350
 351       <device Dname="ARMCM7_DP">
 352         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 353         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 354       </device>
 355     </family>
 356
 357     <!-- ******************************  Cortex-M23  ********************** -->
 358     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 359       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 360       <description>
 361 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 362 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 363 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 364       </description>
 365       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 366       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 367       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 368       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 369       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 370       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 371
 372       <device Dname="ARMCM23">
 373         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 374         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 375       </device>
 376
 377       <device Dname="ARMCM23_TZ">
 378         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 379         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 380       </device>
 381     </family>
 382
 383     <!-- ******************************  Cortex-M33  ****************************** -->
 384     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 385       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 386       <description>
 387 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 388 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 389       </description>
 390       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 391       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 392       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 393       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 394       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 395       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 396
 397       <device Dname="ARMCM33">
 398         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 399         <description>
 400           no DSP Instructions, no Floating Point Unit, no TrustZone
 401         </description>
 402         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 403       </device>
 404
 405       <device Dname="ARMCM33_TZ">
 406         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 407         <description>
 408           no DSP Instructions, no Floating Point Unit, TrustZone
 409         </description>
 410         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 411       </device>
 412
 413       <device Dname="ARMCM33_DSP_FP">
 414         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 415         <description>
 416           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 417         </description>
 418         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 419       </device>
 420
 421       <device Dname="ARMCM33_DSP_FP_TZ">
 422         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 423         <description>
 424           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 425         </description>
 426         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 427       </device>
 428     </family>
 429
 430     <!-- ******************************  ARMSC000  ****************************** -->
 431     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 432       <description>
 433 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 434 - simple, easy-to-use programmers model
 435 - highly efficient ultra-low power operation
 436 - excellent code density
 437 - deterministic, high-performance interrupt handling
 438       </description>
 439       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 440       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 441       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 442       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 443
 444       <device Dname="ARMSC000">
 445         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 446         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 447       </device>
 448     </family>
 449
 450     <!-- ******************************  ARMSC300  ****************************** -->
 451     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 452       <description>
 453 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 454 - simple, easy-to-use programmers model
 455 - highly efficient ultra-low power operation
 456 - excellent code density
 457 - deterministic, high-performance interrupt handling
 458       </description>
 459       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 460       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 461       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 462       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 463
 464       <device Dname="ARMSC300">
 465         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 466         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 467       </device>
 468     </family>
 469
 470     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 471     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 472       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 473       <description>
 474 Armv8-M Baseline based device with TrustZone
 475       </description>
 476       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 477       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 478       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 479       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 480       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 481       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 482
 483       <device Dname="ARMv8MBL">
 484         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 485         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 486       </device>
 487     </family>
 488
 489     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 490     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 491       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 492       <description>
 493 Armv8-M Mainline based device with TrustZone
 494       </description>
 495       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 496       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 497       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 498       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 499       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 500       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 501
 502       <device Dname="ARMv8MML">
 503         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 504         <description>
 505           no DSP Instructions, no Floating Point Unit, TrustZone
 506         </description>
 507         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 508       </device>
 509
 510       <device Dname="ARMv8MML_DSP">
 511         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 512         <description>
 513           DSP Instructions, no Floating Point Unit, TrustZone
 514         </description>
 515         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 516       </device>
 517
 518       <device Dname="ARMv8MML_SP">
 519         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 520         <description>
 521           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 522         </description>
 523         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 524       </device>
 525
 526       <device Dname="ARMv8MML_DSP_SP">
 527         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 528         <description>
 529           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 530         </description>
 531         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 532       </device>
 533
 534       <device Dname="ARMv8MML_DP">
 535         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 536         <description>
 537           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 538         </description>
 539         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 540       </device>
 541
 542       <device Dname="ARMv8MML_DSP_DP">
 543         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 544         <description>
 545           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 546         </description>
 547         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 548       </device>
 549     </family>
 550
 551     <!-- ******************************  Cortex-A5  ****************************** -->
 552     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 553       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 554       <description>
 555 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 556 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 557 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 558       </description>
 559
 560       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 561       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 562
 563       <device Dname="ARMCA5">
 564         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 565         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 566       </device>
 567     </family>
 568
 569     <!-- ******************************  Cortex-A7  ****************************** -->
 570     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 571       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 572       <description>
 573 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 574 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 575 an optional integrated GIC, and an optional L2 cache controller.
 576       </description>
 577
 578       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 579       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 580
 581       <device Dname="ARMCA7">
 582         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 583         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 584       </device>
 585     </family>
 586
 587     <!-- ******************************  Cortex-A9  ****************************** -->
 588     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 589       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 590       <description>
 591 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 592 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 593 and 8-bit Java bytecodes in Jazelle state.
 594       </description>
 595
 596       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 597       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 598
 599       <device Dname="ARMCA9">
 600         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 601         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 602       </device>
 603     </family>
 604   </devices>
 605
 606
 607   <apis>
 608     <!-- CMSIS Device API -->
 609     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 610       <description>Device interrupt controller interface</description>
 611       <files>
 612         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 613       </files>
 614     </api>
 615     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 616       <description>RTOS Kernel system tick timer interface</description>
 617       <files>
 618         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 619       </files>
 620     </api>
 621     <!-- CMSIS-RTOS API -->
 622     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 623       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 624       <files>
 625         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 626       </files>
 627     </api>
 628     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.2" exclusive="1">
 629       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 630       <files>
 631         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 632         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 633       </files>
 634     </api>
 635     <!-- CMSIS Driver API -->
 636     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 637       <description>USART Driver API for Cortex-M</description>
 638       <files>
 639         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 640         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 641       </files>
 642     </api>
 643     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 644       <description>SPI Driver API for Cortex-M</description>
 645       <files>
 646         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 647         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 648       </files>
 649     </api>
 650     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 651       <description>SAI Driver API for Cortex-M</description>
 652       <files>
 653         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 654         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 655       </files>
 656     </api>
 657     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 658       <description>I2C Driver API for Cortex-M</description>
 659       <files>
 660         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 661         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 662       </files>
 663     </api>
 664     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 665       <description>CAN Driver API for Cortex-M</description>
 666       <files>
 667         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 668         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 669       </files>
 670     </api>
 671     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 672       <description>Flash Driver API for Cortex-M</description>
 673       <files>
 674         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 675         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 676       </files>
 677     </api>
 678     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 679       <description>MCI Driver API for Cortex-M</description>
 680       <files>
 681         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 682         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 683       </files>
 684     </api>
 685     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 686       <description>NAND Flash Driver API for Cortex-M</description>
 687       <files>
 688         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 689         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 690       </files>
 691     </api>
 692     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 693       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 694       <files>
 695         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 696         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 697         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 698       </files>
 699     </api>
 700     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 701       <description>Ethernet MAC Driver API for Cortex-M</description>
 702       <files>
 703         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 704         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 705       </files>
 706     </api>
 707     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 708       <description>Ethernet PHY Driver API for Cortex-M</description>
 709       <files>
 710         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 711         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 712       </files>
 713     </api>
 714     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 715       <description>USB Device Driver API for Cortex-M</description>
 716       <files>
 717         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 718         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 719       </files>
 720     </api>
 721     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 722       <description>USB Host Driver API for Cortex-M</description>
 723       <files>
 724         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 725         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 726       </files>
 727     </api>
 728   </apis>
 729
 730   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 731   <conditions>
 732     <!-- compiler -->
 733     <condition id="ARMCC6">
 734       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 735       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 736     </condition>
 737     <condition id="ARMCC5">
 738       <require Tcompiler="ARMCC" Toptions="AC5"/>
 739     </condition>
 740     <condition id="ARMCC">
 741       <require Tcompiler="ARMCC"/>
 742     </condition>
 743     <condition id="GCC">
 744       <require Tcompiler="GCC"/>
 745     </condition>
 746     <condition id="IAR">
 747       <require Tcompiler="IAR"/>
 748     </condition>
 749     <condition id="ARMCC GCC">
 750       <accept Tcompiler="ARMCC"/>
 751       <accept Tcompiler="GCC"/>
 752     </condition>
 753     <condition id="ARMCC GCC IAR">
 754       <accept Tcompiler="ARMCC"/>
 755       <accept Tcompiler="GCC"/>
 756       <accept Tcompiler="IAR"/>
 757     </condition>
 758
 759     <!-- Arm architecture -->
 760     <condition id="ARMv6-M Device">
 761       <description>Armv6-M architecture based device</description>
 762       <accept Dcore="Cortex-M0"/>
 763       <accept Dcore="Cortex-M0+"/>
 764       <accept Dcore="SC000"/>
 765     </condition>
 766     <condition id="ARMv7-M Device">
 767       <description>Armv7-M architecture based device</description>
 768       <accept Dcore="Cortex-M3"/>
 769       <accept Dcore="Cortex-M4"/>
 770       <accept Dcore="Cortex-M7"/>
 771       <accept Dcore="SC300"/>
 772     </condition>
 773     <condition id="ARMv8-M Device">
 774       <description>Armv8-M architecture based device</description>
 775       <accept Dcore="ARMV8MBL"/>
 776       <accept Dcore="ARMV8MML"/>
 777       <accept Dcore="Cortex-M23"/>
 778       <accept Dcore="Cortex-M33"/>
 779     </condition>
 780     <condition id="ARMv8-M TZ Device">
 781       <description>Armv8-M architecture based device with TrustZone</description>
 782       <require condition="ARMv8-M Device"/>
 783       <require Dtz="TZ"/>
 784     </condition>
 785     <condition id="ARMv6_7-M Device">
 786       <description>Armv6_7-M architecture based device</description>
 787       <accept condition="ARMv6-M Device"/>
 788       <accept condition="ARMv7-M Device"/>
 789     </condition>
 790     <condition id="ARMv6_7_8-M Device">
 791       <description>Armv6_7_8-M architecture based device</description>
 792       <accept condition="ARMv6-M Device"/>
 793       <accept condition="ARMv7-M Device"/>
 794       <accept condition="ARMv8-M Device"/>
 795     </condition>
 796     <condition id="ARMv7-A Device">
 797       <description>Armv7-A architecture based device</description>
 798       <accept Dcore="Cortex-A5"/>
 799       <accept Dcore="Cortex-A7"/>
 800       <accept Dcore="Cortex-A9"/>
 801     </condition>
 802
 803     <!-- ARM core -->
 804     <condition id="CM0">
 805       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 806       <accept Dcore="Cortex-M0"/>
 807       <accept Dcore="Cortex-M0+"/>
 808       <accept Dcore="SC000"/>
 809     </condition>
 810     <condition id="CM3">
 811       <description>Cortex-M3 or SC300 processor based device</description>
 812       <accept Dcore="Cortex-M3"/>
 813       <accept Dcore="SC300"/>
 814     </condition>
 815     <condition id="CM4">
 816       <description>Cortex-M4 processor based device</description>
 817       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 818     </condition>
 819     <condition id="CM4_FP">
 820       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 821       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 822       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 823       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 824     </condition>
 825     <condition id="CM7">
 826       <description>Cortex-M7 processor based device</description>
 827       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 828     </condition>
 829     <condition id="CM7_FP">
 830       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 831       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 832       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 833     </condition>
 834     <condition id="CM7_SP">
 835       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 836       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 837     </condition>
 838     <condition id="CM7_DP">
 839       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 840       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 841     </condition>
 842     <condition id="CM23">
 843       <description>Cortex-M23 processor based device</description>
 844       <require Dcore="Cortex-M23"/>
 845     </condition>
 846     <condition id="CM33">
 847       <description>Cortex-M33 processor based device</description>
 848       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 849     </condition>
 850     <condition id="CM33_FP">
 851       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 852       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 853     </condition>
 854     <condition id="ARMv8MBL">
 855       <description>Armv8-M Baseline processor based device</description>
 856       <require Dcore="ARMV8MBL"/>
 857     </condition>
 858     <condition id="ARMv8MML">
 859       <description>Armv8-M Mainline processor based device</description>
 860       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 861     </condition>
 862     <condition id="ARMv8MML_FP">
 863       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
 864       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 865       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 866     </condition>
 867
 868     <condition id="CM33_NODSP_NOFPU">
 869       <description>CM33, no DSP, no FPU</description>
 870       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 871     </condition>
 872     <condition id="CM33_DSP_NOFPU">
 873       <description>CM33, DSP, no FPU</description>
 874       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 875     </condition>
 876     <condition id="CM33_NODSP_SP">
 877       <description>CM33, no DSP, SP FPU</description>
 878       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 879     </condition>
 880     <condition id="CM33_DSP_SP">
 881       <description>CM33, DSP, SP FPU</description>
 882       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 883     </condition>
 884
 885     <condition id="ARMv8MML_NODSP_NOFPU">
 886       <description>Armv8-M Mainline, no DSP, no FPU</description>
 887       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 888     </condition>
 889     <condition id="ARMv8MML_DSP_NOFPU">
 890       <description>Armv8-M Mainline, DSP, no FPU</description>
 891       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 892     </condition>
 893     <condition id="ARMv8MML_NODSP_SP">
 894       <description>Armv8-M Mainline, no DSP, SP FPU</description>
 895       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 896     </condition>
 897     <condition id="ARMv8MML_DSP_SP">
 898       <description>Armv8-M Mainline, DSP, SP FPU</description>
 899       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 900     </condition>
 901
 902     <condition id="CA5_CA9">
 903       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 904       <accept Dcore="Cortex-A5"/>
 905       <accept Dcore="Cortex-A9"/>
 906     </condition>
 907
 908     <condition id="CA7">
 909       <description>Cortex-A7 processor based device</description>
 910       <accept Dcore="Cortex-A7"/>
 911     </condition>
 912
 913     <!-- ARMCC compiler -->
 914     <condition id="CA_ARMCC5">
 915       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
 916       <require condition="ARMv7-A Device"/>
 917       <require condition="ARMCC5"/>
 918     </condition>
 919     <condition id="CA_ARMCC6">
 920       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
 921       <require condition="ARMv7-A Device"/>
 922       <require condition="ARMCC6"/>
 923     </condition>
 924
 925     <condition id="CM0_ARMCC">
 926       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
 927       <require condition="CM0"/>
 928       <require Tcompiler="ARMCC"/>
 929     </condition>
 930     <condition id="CM0_LE_ARMCC">
 931       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
 932       <require condition="CM0_ARMCC"/>
 933       <require Dendian="Little-endian"/>
 934     </condition>
 935     <condition id="CM0_BE_ARMCC">
 936       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
 937       <require condition="CM0_ARMCC"/>
 938       <require Dendian="Big-endian"/>
 939     </condition>
 940
 941     <condition id="CM3_ARMCC">
 942       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
 943       <require condition="CM3"/>
 944       <require Tcompiler="ARMCC"/>
 945     </condition>
 946     <condition id="CM3_LE_ARMCC">
 947       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
 948       <require condition="CM3_ARMCC"/>
 949       <require Dendian="Little-endian"/>
 950     </condition>
 951     <condition id="CM3_BE_ARMCC">
 952       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
 953       <require condition="CM3_ARMCC"/>
 954       <require Dendian="Big-endian"/>
 955     </condition>
 956
 957     <condition id="CM4_ARMCC">
 958       <description>Cortex-M4 processor based device for the Arm Compiler</description>
 959       <require condition="CM4"/>
 960       <require Tcompiler="ARMCC"/>
 961     </condition>
 962     <condition id="CM4_LE_ARMCC">
 963       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
 964       <require condition="CM4_ARMCC"/>
 965       <require Dendian="Little-endian"/>
 966     </condition>
 967     <condition id="CM4_BE_ARMCC">
 968       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
 969       <require condition="CM4_ARMCC"/>
 970       <require Dendian="Big-endian"/>
 971     </condition>
 972
 973     <condition id="CM4_FP_ARMCC">
 974       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
 975       <require condition="CM4_FP"/>
 976       <require Tcompiler="ARMCC"/>
 977     </condition>
 978     <condition id="CM4_FP_LE_ARMCC">
 979       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
 980       <require condition="CM4_FP_ARMCC"/>
 981       <require Dendian="Little-endian"/>
 982     </condition>
 983     <condition id="CM4_FP_BE_ARMCC">
 984       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
 985       <require condition="CM4_FP_ARMCC"/>
 986       <require Dendian="Big-endian"/>
 987     </condition>
 988
 989     <condition id="CM7_ARMCC">
 990       <description>Cortex-M7 processor based device for the Arm Compiler</description>
 991       <require condition="CM7"/>
 992       <require Tcompiler="ARMCC"/>
 993     </condition>
 994     <condition id="CM7_LE_ARMCC">
 995       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
 996       <require condition="CM7_ARMCC"/>
 997       <require Dendian="Little-endian"/>
 998     </condition>
 999     <condition id="CM7_BE_ARMCC">
1000       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1001       <require condition="CM7_ARMCC"/>
1002       <require Dendian="Big-endian"/>
1003     </condition>
1004
1005     <condition id="CM7_FP_ARMCC">
1006       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1007       <require condition="CM7_FP"/>
1008       <require Tcompiler="ARMCC"/>
1009     </condition>
1010     <condition id="CM7_FP_LE_ARMCC">
1011       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1012       <require condition="CM7_FP_ARMCC"/>
1013       <require Dendian="Little-endian"/>
1014     </condition>
1015     <condition id="CM7_FP_BE_ARMCC">
1016       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1017       <require condition="CM7_FP_ARMCC"/>
1018       <require Dendian="Big-endian"/>
1019     </condition>
1020
1021     <condition id="CM7_SP_ARMCC">
1022       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1023       <require condition="CM7_SP"/>
1024       <require Tcompiler="ARMCC"/>
1025     </condition>
1026     <condition id="CM7_SP_LE_ARMCC">
1027       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1028       <require condition="CM7_SP_ARMCC"/>
1029       <require Dendian="Little-endian"/>
1030     </condition>
1031     <condition id="CM7_SP_BE_ARMCC">
1032       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1033       <require condition="CM7_SP_ARMCC"/>
1034       <require Dendian="Big-endian"/>
1035     </condition>
1036
1037     <condition id="CM7_DP_ARMCC">
1038       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1039       <require condition="CM7_DP"/>
1040       <require Tcompiler="ARMCC"/>
1041     </condition>
1042     <condition id="CM7_DP_LE_ARMCC">
1043       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1044       <require condition="CM7_DP_ARMCC"/>
1045       <require Dendian="Little-endian"/>
1046     </condition>
1047     <condition id="CM7_DP_BE_ARMCC">
1048       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1049       <require condition="CM7_DP_ARMCC"/>
1050       <require Dendian="Big-endian"/>
1051     </condition>
1052
1053     <condition id="CM23_ARMCC">
1054       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1055       <require condition="CM23"/>
1056       <require Tcompiler="ARMCC"/>
1057     </condition>
1058     <condition id="CM23_LE_ARMCC">
1059       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1060       <require condition="CM23_ARMCC"/>
1061       <require Dendian="Little-endian"/>
1062     </condition>
1063     <condition id="CM23_BE_ARMCC">
1064       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1065       <require condition="CM23_ARMCC"/>
1066       <require Dendian="Big-endian"/>
1067     </condition>
1068
1069     <condition id="CM33_ARMCC">
1070       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1071       <require condition="CM33"/>
1072       <require Tcompiler="ARMCC"/>
1073     </condition>
1074     <condition id="CM33_LE_ARMCC">
1075       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1076       <require condition="CM33_ARMCC"/>
1077       <require Dendian="Little-endian"/>
1078     </condition>
1079     <condition id="CM33_BE_ARMCC">
1080       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1081       <require condition="CM33_ARMCC"/>
1082       <require Dendian="Big-endian"/>
1083     </condition>
1084
1085     <condition id="CM33_FP_ARMCC">
1086       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1087       <require condition="CM33_FP"/>
1088       <require Tcompiler="ARMCC"/>
1089     </condition>
1090     <condition id="CM33_FP_LE_ARMCC">
1091       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1092       <require condition="CM33_FP_ARMCC"/>
1093       <require Dendian="Little-endian"/>
1094     </condition>
1095     <condition id="CM33_FP_BE_ARMCC">
1096       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1097       <require condition="CM33_FP_ARMCC"/>
1098       <require Dendian="Big-endian"/>
1099     </condition>
1100
1101     <condition id="CM33_NODSP_NOFPU_ARMCC">
1102       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1103       <require condition="CM33_NODSP_NOFPU"/>
1104       <require Tcompiler="ARMCC"/>
1105     </condition>
1106     <condition id="CM33_DSP_NOFPU_ARMCC">
1107       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1108       <require condition="CM33_DSP_NOFPU"/>
1109       <require Tcompiler="ARMCC"/>
1110     </condition>
1111     <condition id="CM33_NODSP_SP_ARMCC">
1112       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1113       <require condition="CM33_NODSP_SP"/>
1114       <require Tcompiler="ARMCC"/>
1115     </condition>
1116     <condition id="CM33_DSP_SP_ARMCC">
1117       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1118       <require condition="CM33_DSP_SP"/>
1119       <require Tcompiler="ARMCC"/>
1120     </condition>
1121     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1122       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1123       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1124       <require Dendian="Little-endian"/>
1125     </condition>
1126     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1127       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1128       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1129       <require Dendian="Little-endian"/>
1130     </condition>
1131     <condition id="CM33_NODSP_SP_LE_ARMCC">
1132       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1133       <require condition="CM33_NODSP_SP_ARMCC"/>
1134       <require Dendian="Little-endian"/>
1135     </condition>
1136     <condition id="CM33_DSP_SP_LE_ARMCC">
1137       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1138       <require condition="CM33_DSP_SP_ARMCC"/>
1139       <require Dendian="Little-endian"/>
1140     </condition>
1141
1142     <condition id="ARMv8MBL_ARMCC">
1143       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1144       <require condition="ARMv8MBL"/>
1145       <require Tcompiler="ARMCC"/>
1146     </condition>
1147     <condition id="ARMv8MBL_LE_ARMCC">
1148       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1149       <require condition="ARMv8MBL_ARMCC"/>
1150       <require Dendian="Little-endian"/>
1151     </condition>
1152     <condition id="ARMv8MBL_BE_ARMCC">
1153       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1154       <require condition="ARMv8MBL_ARMCC"/>
1155       <require Dendian="Big-endian"/>
1156     </condition>
1157
1158     <condition id="ARMv8MML_ARMCC">
1159       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1160       <require condition="ARMv8MML"/>
1161       <require Tcompiler="ARMCC"/>
1162     </condition>
1163     <condition id="ARMv8MML_LE_ARMCC">
1164       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1165       <require condition="ARMv8MML_ARMCC"/>
1166       <require Dendian="Little-endian"/>
1167     </condition>
1168     <condition id="ARMv8MML_BE_ARMCC">
1169       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1170       <require condition="ARMv8MML_ARMCC"/>
1171       <require Dendian="Big-endian"/>
1172     </condition>
1173
1174     <condition id="ARMv8MML_FP_ARMCC">
1175       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1176       <require condition="ARMv8MML_FP"/>
1177       <require Tcompiler="ARMCC"/>
1178     </condition>
1179     <condition id="ARMv8MML_FP_LE_ARMCC">
1180       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1181       <require condition="ARMv8MML_FP_ARMCC"/>
1182       <require Dendian="Little-endian"/>
1183     </condition>
1184     <condition id="ARMv8MML_FP_BE_ARMCC">
1185       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1186       <require condition="ARMv8MML_FP_ARMCC"/>
1187       <require Dendian="Big-endian"/>
1188     </condition>
1189
1190     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1191       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1192       <require condition="ARMv8MML_NODSP_NOFPU"/>
1193       <require Tcompiler="ARMCC"/>
1194     </condition>
1195     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1196       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1197       <require condition="ARMv8MML_DSP_NOFPU"/>
1198       <require Tcompiler="ARMCC"/>
1199     </condition>
1200     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1201       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1202       <require condition="ARMv8MML_NODSP_SP"/>
1203       <require Tcompiler="ARMCC"/>
1204     </condition>
1205     <condition id="ARMv8MML_DSP_SP_ARMCC">
1206       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1207       <require condition="ARMv8MML_DSP_SP"/>
1208       <require Tcompiler="ARMCC"/>
1209     </condition>
1210     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1211       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1212       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1213       <require Dendian="Little-endian"/>
1214     </condition>
1215     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1216       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1217       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1218       <require Dendian="Little-endian"/>
1219     </condition>
1220     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1221       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1222       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1223       <require Dendian="Little-endian"/>
1224     </condition>
1225     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1226       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1227       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1228       <require Dendian="Little-endian"/>
1229     </condition>
1230
1231     <!-- GCC compiler -->
1232     <condition id="CA_GCC">
1233       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1234       <require condition="ARMv7-A Device"/>
1235       <require Tcompiler="GCC"/>
1236     </condition>
1237
1238     <condition id="CM0_GCC">
1239       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1240       <require condition="CM0"/>
1241       <require Tcompiler="GCC"/>
1242     </condition>
1243     <condition id="CM0_LE_GCC">
1244       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1245       <require condition="CM0_GCC"/>
1246       <require Dendian="Little-endian"/>
1247     </condition>
1248     <condition id="CM0_BE_GCC">
1249       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1250       <require condition="CM0_GCC"/>
1251       <require Dendian="Big-endian"/>
1252     </condition>
1253
1254     <condition id="CM3_GCC">
1255       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1256       <require condition="CM3"/>
1257       <require Tcompiler="GCC"/>
1258     </condition>
1259     <condition id="CM3_LE_GCC">
1260       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1261       <require condition="CM3_GCC"/>
1262       <require Dendian="Little-endian"/>
1263     </condition>
1264     <condition id="CM3_BE_GCC">
1265       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1266       <require condition="CM3_GCC"/>
1267       <require Dendian="Big-endian"/>
1268     </condition>
1269
1270     <condition id="CM4_GCC">
1271       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1272       <require condition="CM4"/>
1273       <require Tcompiler="GCC"/>
1274     </condition>
1275     <condition id="CM4_LE_GCC">
1276       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1277       <require condition="CM4_GCC"/>
1278       <require Dendian="Little-endian"/>
1279     </condition>
1280     <condition id="CM4_BE_GCC">
1281       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1282       <require condition="CM4_GCC"/>
1283       <require Dendian="Big-endian"/>
1284     </condition>
1285
1286     <condition id="CM4_FP_GCC">
1287       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1288       <require condition="CM4_FP"/>
1289       <require Tcompiler="GCC"/>
1290     </condition>
1291     <condition id="CM4_FP_LE_GCC">
1292       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1293       <require condition="CM4_FP_GCC"/>
1294       <require Dendian="Little-endian"/>
1295     </condition>
1296     <condition id="CM4_FP_BE_GCC">
1297       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1298       <require condition="CM4_FP_GCC"/>
1299       <require Dendian="Big-endian"/>
1300     </condition>
1301
1302     <condition id="CM7_GCC">
1303       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1304       <require condition="CM7"/>
1305       <require Tcompiler="GCC"/>
1306     </condition>
1307     <condition id="CM7_LE_GCC">
1308       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1309       <require condition="CM7_GCC"/>
1310       <require Dendian="Little-endian"/>
1311     </condition>
1312     <condition id="CM7_BE_GCC">
1313       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1314       <require condition="CM7_GCC"/>
1315       <require Dendian="Big-endian"/>
1316     </condition>
1317
1318     <condition id="CM7_FP_GCC">
1319       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1320       <require condition="CM7_FP"/>
1321       <require Tcompiler="GCC"/>
1322     </condition>
1323     <condition id="CM7_FP_LE_GCC">
1324       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1325       <require condition="CM7_FP_GCC"/>
1326       <require Dendian="Little-endian"/>
1327     </condition>
1328     <condition id="CM7_FP_BE_GCC">
1329       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1330       <require condition="CM7_FP_GCC"/>
1331       <require Dendian="Big-endian"/>
1332     </condition>
1333
1334     <condition id="CM7_SP_GCC">
1335       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1336       <require condition="CM7_SP"/>
1337       <require Tcompiler="GCC"/>
1338     </condition>
1339     <condition id="CM7_SP_LE_GCC">
1340       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1341       <require condition="CM7_SP_GCC"/>
1342       <require Dendian="Little-endian"/>
1343     </condition>
1344     <condition id="CM7_SP_BE_GCC">
1345       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1346       <require condition="CM7_SP_GCC"/>
1347       <require Dendian="Big-endian"/>
1348     </condition>
1349
1350     <condition id="CM7_DP_GCC">
1351       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1352       <require condition="CM7_DP"/>
1353       <require Tcompiler="GCC"/>
1354     </condition>
1355     <condition id="CM7_DP_LE_GCC">
1356       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1357       <require condition="CM7_DP_GCC"/>
1358       <require Dendian="Little-endian"/>
1359     </condition>
1360     <condition id="CM7_DP_BE_GCC">
1361       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1362       <require condition="CM7_DP_GCC"/>
1363       <require Dendian="Big-endian"/>
1364     </condition>
1365
1366     <condition id="CM23_GCC">
1367       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1368       <require condition="CM23"/>
1369       <require Tcompiler="GCC"/>
1370     </condition>
1371     <condition id="CM23_LE_GCC">
1372       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1373       <require condition="CM23_GCC"/>
1374       <require Dendian="Little-endian"/>
1375     </condition>
1376     <condition id="CM23_BE_GCC">
1377       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1378       <require condition="CM23_GCC"/>
1379       <require Dendian="Big-endian"/>
1380     </condition>
1381
1382     <condition id="CM33_GCC">
1383       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1384       <require condition="CM33"/>
1385       <require Tcompiler="GCC"/>
1386     </condition>
1387     <condition id="CM33_LE_GCC">
1388       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1389       <require condition="CM33_GCC"/>
1390       <require Dendian="Little-endian"/>
1391     </condition>
1392     <condition id="CM33_BE_GCC">
1393       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1394       <require condition="CM33_GCC"/>
1395       <require Dendian="Big-endian"/>
1396     </condition>
1397
1398     <condition id="CM33_FP_GCC">
1399       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1400       <require condition="CM33_FP"/>
1401       <require Tcompiler="GCC"/>
1402     </condition>
1403     <condition id="CM33_FP_LE_GCC">
1404       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1405       <require condition="CM33_FP_GCC"/>
1406       <require Dendian="Little-endian"/>
1407     </condition>
1408     <condition id="CM33_FP_BE_GCC">
1409       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1410       <require condition="CM33_FP_GCC"/>
1411       <require Dendian="Big-endian"/>
1412     </condition>
1413
1414     <condition id="CM33_NODSP_NOFPU_GCC">
1415       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1416       <require condition="CM33_NODSP_NOFPU"/>
1417       <require Tcompiler="GCC"/>
1418     </condition>
1419     <condition id="CM33_DSP_NOFPU_GCC">
1420       <description>CM33, DSP, no FPU, GCC Compiler</description>
1421       <require condition="CM33_DSP_NOFPU"/>
1422       <require Tcompiler="GCC"/>
1423     </condition>
1424     <condition id="CM33_NODSP_SP_GCC">
1425       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1426       <require condition="CM33_NODSP_SP"/>
1427       <require Tcompiler="GCC"/>
1428     </condition>
1429     <condition id="CM33_DSP_SP_GCC">
1430       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1431       <require condition="CM33_DSP_SP"/>
1432       <require Tcompiler="GCC"/>
1433     </condition>
1434     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1435       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1436       <require condition="CM33_NODSP_NOFPU_GCC"/>
1437       <require Dendian="Little-endian"/>
1438     </condition>
1439     <condition id="CM33_DSP_NOFPU_LE_GCC">
1440       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1441       <require condition="CM33_DSP_NOFPU_GCC"/>
1442       <require Dendian="Little-endian"/>
1443     </condition>
1444     <condition id="CM33_NODSP_SP_LE_GCC">
1445       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1446       <require condition="CM33_NODSP_SP_GCC"/>
1447       <require Dendian="Little-endian"/>
1448     </condition>
1449     <condition id="CM33_DSP_SP_LE_GCC">
1450       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1451       <require condition="CM33_DSP_SP_GCC"/>
1452       <require Dendian="Little-endian"/>
1453     </condition>
1454
1455     <condition id="ARMv8MBL_GCC">
1456       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1457       <require condition="ARMv8MBL"/>
1458       <require Tcompiler="GCC"/>
1459     </condition>
1460     <condition id="ARMv8MBL_LE_GCC">
1461       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1462       <require condition="ARMv8MBL_GCC"/>
1463       <require Dendian="Little-endian"/>
1464     </condition>
1465     <condition id="ARMv8MBL_BE_GCC">
1466       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1467       <require condition="ARMv8MBL_GCC"/>
1468       <require Dendian="Big-endian"/>
1469     </condition>
1470
1471     <condition id="ARMv8MML_GCC">
1472       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1473       <require condition="ARMv8MML"/>
1474       <require Tcompiler="GCC"/>
1475     </condition>
1476     <condition id="ARMv8MML_LE_GCC">
1477       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1478       <require condition="ARMv8MML_GCC"/>
1479       <require Dendian="Little-endian"/>
1480     </condition>
1481     <condition id="ARMv8MML_BE_GCC">
1482       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1483       <require condition="ARMv8MML_GCC"/>
1484       <require Dendian="Big-endian"/>
1485     </condition>
1486
1487     <condition id="ARMv8MML_FP_GCC">
1488       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1489       <require condition="ARMv8MML_FP"/>
1490       <require Tcompiler="GCC"/>
1491     </condition>
1492     <condition id="ARMv8MML_FP_LE_GCC">
1493       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1494       <require condition="ARMv8MML_FP_GCC"/>
1495       <require Dendian="Little-endian"/>
1496     </condition>
1497     <condition id="ARMv8MML_FP_BE_GCC">
1498       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1499       <require condition="ARMv8MML_FP_GCC"/>
1500       <require Dendian="Big-endian"/>
1501     </condition>
1502
1503     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1504       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1505       <require condition="ARMv8MML_NODSP_NOFPU"/>
1506       <require Tcompiler="GCC"/>
1507     </condition>
1508     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1509       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1510       <require condition="ARMv8MML_DSP_NOFPU"/>
1511       <require Tcompiler="GCC"/>
1512     </condition>
1513     <condition id="ARMv8MML_NODSP_SP_GCC">
1514       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1515       <require condition="ARMv8MML_NODSP_SP"/>
1516       <require Tcompiler="GCC"/>
1517     </condition>
1518     <condition id="ARMv8MML_DSP_SP_GCC">
1519       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1520       <require condition="ARMv8MML_DSP_SP"/>
1521       <require Tcompiler="GCC"/>
1522     </condition>
1523     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1524       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1525       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1526       <require Dendian="Little-endian"/>
1527     </condition>
1528     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1529       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1530       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1531       <require Dendian="Little-endian"/>
1532     </condition>
1533     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1534       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1535       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1536       <require Dendian="Little-endian"/>
1537     </condition>
1538     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1539       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1540       <require condition="ARMv8MML_DSP_SP_GCC"/>
1541       <require Dendian="Little-endian"/>
1542     </condition>
1543
1544     <!-- IAR compiler -->
1545     <condition id="CA_IAR">
1546       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1547       <require condition="ARMv7-A Device"/>
1548       <require Tcompiler="IAR"/>
1549     </condition>
1550
1551     <condition id="CM0_IAR">
1552       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1553       <require condition="CM0"/>
1554       <require Tcompiler="IAR"/>
1555     </condition>
1556     <condition id="CM0_LE_IAR">
1557       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1558       <require condition="CM0_IAR"/>
1559       <require Dendian="Little-endian"/>
1560     </condition>
1561     <condition id="CM0_BE_IAR">
1562       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1563       <require condition="CM0_IAR"/>
1564       <require Dendian="Big-endian"/>
1565     </condition>
1566
1567     <condition id="CM3_IAR">
1568       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1569       <require condition="CM3"/>
1570       <require Tcompiler="IAR"/>
1571     </condition>
1572     <condition id="CM3_LE_IAR">
1573       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1574       <require condition="CM3_IAR"/>
1575       <require Dendian="Little-endian"/>
1576     </condition>
1577     <condition id="CM3_BE_IAR">
1578       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1579       <require condition="CM3_IAR"/>
1580       <require Dendian="Big-endian"/>
1581     </condition>
1582
1583     <condition id="CM4_IAR">
1584       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1585       <require condition="CM4"/>
1586       <require Tcompiler="IAR"/>
1587     </condition>
1588     <condition id="CM4_LE_IAR">
1589       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1590       <require condition="CM4_IAR"/>
1591       <require Dendian="Little-endian"/>
1592     </condition>
1593     <condition id="CM4_BE_IAR">
1594       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1595       <require condition="CM4_IAR"/>
1596       <require Dendian="Big-endian"/>
1597     </condition>
1598
1599     <condition id="CM4_FP_IAR">
1600       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1601       <require condition="CM4_FP"/>
1602       <require Tcompiler="IAR"/>
1603     </condition>
1604     <condition id="CM4_FP_LE_IAR">
1605       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1606       <require condition="CM4_FP_IAR"/>
1607       <require Dendian="Little-endian"/>
1608     </condition>
1609     <condition id="CM4_FP_BE_IAR">
1610       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1611       <require condition="CM4_FP_IAR"/>
1612       <require Dendian="Big-endian"/>
1613     </condition>
1614
1615     <condition id="CM7_IAR">
1616       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1617       <require condition="CM7"/>
1618       <require Tcompiler="IAR"/>
1619     </condition>
1620     <condition id="CM7_LE_IAR">
1621       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1622       <require condition="CM7_IAR"/>
1623       <require Dendian="Little-endian"/>
1624     </condition>
1625     <condition id="CM7_BE_IAR">
1626       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1627       <require condition="CM7_IAR"/>
1628       <require Dendian="Big-endian"/>
1629     </condition>
1630
1631     <condition id="CM7_FP_IAR">
1632       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1633       <require condition="CM7_FP"/>
1634       <require Tcompiler="IAR"/>
1635     </condition>
1636     <condition id="CM7_FP_LE_IAR">
1637       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1638       <require condition="CM7_FP_IAR"/>
1639       <require Dendian="Little-endian"/>
1640     </condition>
1641     <condition id="CM7_FP_BE_IAR">
1642       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1643       <require condition="CM7_FP_IAR"/>
1644       <require Dendian="Big-endian"/>
1645     </condition>
1646
1647     <condition id="CM7_SP_IAR">
1648       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1649       <require condition="CM7_SP"/>
1650       <require Tcompiler="IAR"/>
1651     </condition>
1652     <condition id="CM7_SP_LE_IAR">
1653       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1654       <require condition="CM7_SP_IAR"/>
1655       <require Dendian="Little-endian"/>
1656     </condition>
1657     <condition id="CM7_SP_BE_IAR">
1658       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1659       <require condition="CM7_SP_IAR"/>
1660       <require Dendian="Big-endian"/>
1661     </condition>
1662
1663     <condition id="CM7_DP_IAR">
1664       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1665       <require condition="CM7_DP"/>
1666       <require Tcompiler="IAR"/>
1667     </condition>
1668     <condition id="CM7_DP_LE_IAR">
1669       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1670       <require condition="CM7_DP_IAR"/>
1671       <require Dendian="Little-endian"/>
1672     </condition>
1673     <condition id="CM7_DP_BE_IAR">
1674       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1675       <require condition="CM7_DP_IAR"/>
1676       <require Dendian="Big-endian"/>
1677     </condition>
1678
1679     <condition id="CM23_IAR">
1680       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1681       <require condition="CM23"/>
1682       <require Tcompiler="IAR"/>
1683     </condition>
1684     <condition id="CM23_LE_IAR">
1685       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1686       <require condition="CM23_IAR"/>
1687       <require Dendian="Little-endian"/>
1688     </condition>
1689     <condition id="CM23_BE_IAR">
1690       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
1691       <require condition="CM23_IAR"/>
1692       <require Dendian="Big-endian"/>
1693     </condition>
1694
1695     <condition id="CM33_IAR">
1696       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1697       <require condition="CM33"/>
1698       <require Tcompiler="IAR"/>
1699     </condition>
1700     <condition id="CM33_LE_IAR">
1701       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1702       <require condition="CM33_IAR"/>
1703       <require Dendian="Little-endian"/>
1704     </condition>
1705     <condition id="CM33_BE_IAR">
1706       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
1707       <require condition="CM33_IAR"/>
1708       <require Dendian="Big-endian"/>
1709     </condition>
1710
1711     <condition id="CM33_FP_IAR">
1712       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1713       <require condition="CM33_FP"/>
1714       <require Tcompiler="IAR"/>
1715     </condition>
1716     <condition id="CM33_FP_LE_IAR">
1717       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1718       <require condition="CM33_FP_IAR"/>
1719       <require Dendian="Little-endian"/>
1720     </condition>
1721     <condition id="CM33_FP_BE_IAR">
1722       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1723       <require condition="CM33_FP_IAR"/>
1724       <require Dendian="Big-endian"/>
1725     </condition>
1726
1727     <condition id="CM33_NODSP_NOFPU_IAR">
1728       <description>CM33, no DSP, no FPU, IAR Compiler</description>
1729       <require condition="CM33_NODSP_NOFPU"/>
1730       <require Tcompiler="IAR"/>
1731     </condition>
1732     <condition id="CM33_DSP_NOFPU_IAR">
1733       <description>CM33, DSP, no FPU, IAR Compiler</description>
1734       <require condition="CM33_DSP_NOFPU"/>
1735       <require Tcompiler="IAR"/>
1736     </condition>
1737     <condition id="CM33_NODSP_SP_IAR">
1738       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
1739       <require condition="CM33_NODSP_SP"/>
1740       <require Tcompiler="IAR"/>
1741     </condition>
1742     <condition id="CM33_DSP_SP_IAR">
1743       <description>CM33, DSP, SP FPU, IAR Compiler</description>
1744       <require condition="CM33_DSP_SP"/>
1745       <require Tcompiler="IAR"/>
1746     </condition>
1747     <condition id="CM33_NODSP_NOFPU_LE_IAR">
1748       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
1749       <require condition="CM33_NODSP_NOFPU_IAR"/>
1750       <require Dendian="Little-endian"/>
1751     </condition>
1752     <condition id="CM33_DSP_NOFPU_LE_IAR">
1753       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
1754       <require condition="CM33_DSP_NOFPU_IAR"/>
1755       <require Dendian="Little-endian"/>
1756     </condition>
1757     <condition id="CM33_NODSP_SP_LE_IAR">
1758       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
1759       <require condition="CM33_NODSP_SP_IAR"/>
1760       <require Dendian="Little-endian"/>
1761     </condition>
1762     <condition id="CM33_DSP_SP_LE_IAR">
1763       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
1764       <require condition="CM33_DSP_SP_IAR"/>
1765       <require Dendian="Little-endian"/>
1766     </condition>
1767
1768     <condition id="ARMv8MBL_IAR">
1769       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1770       <require condition="ARMv8MBL"/>
1771       <require Tcompiler="IAR"/>
1772     </condition>
1773     <condition id="ARMv8MBL_LE_IAR">
1774       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1775       <require condition="ARMv8MBL_IAR"/>
1776       <require Dendian="Little-endian"/>
1777     </condition>
1778     <condition id="ARMv8MBL_BE_IAR">
1779       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
1780       <require condition="ARMv8MBL_IAR"/>
1781       <require Dendian="Big-endian"/>
1782     </condition>
1783
1784     <condition id="ARMv8MML_IAR">
1785       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1786       <require condition="ARMv8MML"/>
1787       <require Tcompiler="IAR"/>
1788     </condition>
1789     <condition id="ARMv8MML_LE_IAR">
1790       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1791       <require condition="ARMv8MML_IAR"/>
1792       <require Dendian="Little-endian"/>
1793     </condition>
1794     <condition id="ARMv8MML_BE_IAR">
1795       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
1796       <require condition="ARMv8MML_IAR"/>
1797       <require Dendian="Big-endian"/>
1798     </condition>
1799
1800     <condition id="ARMv8MML_FP_IAR">
1801       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1802       <require condition="ARMv8MML_FP"/>
1803       <require Tcompiler="IAR"/>
1804     </condition>
1805     <condition id="ARMv8MML_FP_LE_IAR">
1806       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1807       <require condition="ARMv8MML_FP_IAR"/>
1808       <require Dendian="Little-endian"/>
1809     </condition>
1810     <condition id="ARMv8MML_FP_BE_IAR">
1811       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1812       <require condition="ARMv8MML_FP_IAR"/>
1813       <require Dendian="Big-endian"/>
1814     </condition>
1815
1816     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
1817       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
1818       <require condition="ARMv8MML_NODSP_NOFPU"/>
1819       <require Tcompiler="IAR"/>
1820     </condition>
1821     <condition id="ARMv8MML_DSP_NOFPU_IAR">
1822       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
1823       <require condition="ARMv8MML_DSP_NOFPU"/>
1824       <require Tcompiler="IAR"/>
1825     </condition>
1826     <condition id="ARMv8MML_NODSP_SP_IAR">
1827       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
1828       <require condition="ARMv8MML_NODSP_SP"/>
1829       <require Tcompiler="IAR"/>
1830     </condition>
1831     <condition id="ARMv8MML_DSP_SP_IAR">
1832       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
1833       <require condition="ARMv8MML_DSP_SP"/>
1834       <require Tcompiler="IAR"/>
1835     </condition>
1836     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
1837       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
1838       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
1839       <require Dendian="Little-endian"/>
1840     </condition>
1841     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
1842       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
1843       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
1844       <require Dendian="Little-endian"/>
1845     </condition>
1846     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
1847       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
1848       <require condition="ARMv8MML_NODSP_SP_IAR"/>
1849       <require Dendian="Little-endian"/>
1850     </condition>
1851     <condition id="ARMv8MML_DSP_SP_LE_IAR">
1852       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
1853       <require condition="ARMv8MML_DSP_SP_IAR"/>
1854       <require Dendian="Little-endian"/>
1855     </condition>
1856
1857     <!-- conditions selecting single devices and CMSIS Core -->
1858     <!-- used for component startup, GCC version is used for C-Startup -->
1859     <condition id="ARMCM0 CMSIS">
1860       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
1861       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1862       <require Cclass="CMSIS" Cgroup="CORE"/>
1863     </condition>
1864     <condition id="ARMCM0 CMSIS GCC">
1865       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1866       <require condition="ARMCM0 CMSIS"/>
1867       <require condition="GCC"/>
1868     </condition>
1869
1870     <condition id="ARMCM0+ CMSIS">
1871       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
1872       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1873       <require Cclass="CMSIS" Cgroup="CORE"/>
1874     </condition>
1875     <condition id="ARMCM0+ CMSIS GCC">
1876       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1877       <require condition="ARMCM0+ CMSIS"/>
1878       <require condition="GCC"/>
1879     </condition>
1880
1881     <condition id="ARMCM3 CMSIS">
1882       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
1883       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1884       <require Cclass="CMSIS" Cgroup="CORE"/>
1885     </condition>
1886     <condition id="ARMCM3 CMSIS GCC">
1887       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1888       <require condition="ARMCM3 CMSIS"/>
1889       <require condition="GCC"/>
1890     </condition>
1891
1892     <condition id="ARMCM4 CMSIS">
1893       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
1894       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1895       <require Cclass="CMSIS" Cgroup="CORE"/>
1896     </condition>
1897     <condition id="ARMCM4 CMSIS GCC">
1898       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1899       <require condition="ARMCM4 CMSIS"/>
1900       <require condition="GCC"/>
1901     </condition>
1902
1903     <condition id="ARMCM7 CMSIS">
1904       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
1905       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1906       <require Cclass="CMSIS" Cgroup="CORE"/>
1907     </condition>
1908     <condition id="ARMCM7 CMSIS GCC">
1909       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1910       <require condition="ARMCM7 CMSIS"/>
1911       <require condition="GCC"/>
1912     </condition>
1913
1914     <condition id="ARMCM23 CMSIS">
1915       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
1916       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1917       <require Cclass="CMSIS" Cgroup="CORE"/>
1918     </condition>
1919     <condition id="ARMCM23 CMSIS GCC">
1920       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1921       <require condition="ARMCM23 CMSIS"/>
1922       <require condition="GCC"/>
1923     </condition>
1924
1925     <condition id="ARMCM33 CMSIS">
1926       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
1927       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1928       <require Cclass="CMSIS" Cgroup="CORE"/>
1929     </condition>
1930     <condition id="ARMCM33 CMSIS GCC">
1931       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1932       <require condition="ARMCM33 CMSIS"/>
1933       <require condition="GCC"/>
1934     </condition>
1935
1936     <condition id="ARMSC000 CMSIS">
1937       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
1938       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1939       <require Cclass="CMSIS" Cgroup="CORE"/>
1940     </condition>
1941     <condition id="ARMSC000 CMSIS GCC">
1942       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
1943       <require condition="ARMSC000 CMSIS"/>
1944       <require condition="GCC"/>
1945     </condition>
1946
1947     <condition id="ARMSC300 CMSIS">
1948       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
1949       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1950       <require Cclass="CMSIS" Cgroup="CORE"/>
1951     </condition>
1952     <condition id="ARMSC300 CMSIS GCC">
1953       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
1954       <require condition="ARMSC300 CMSIS"/>
1955       <require condition="GCC"/>
1956     </condition>
1957
1958     <condition id="ARMv8MBL CMSIS">
1959       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
1960       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1961       <require Cclass="CMSIS" Cgroup="CORE"/>
1962     </condition>
1963     <condition id="ARMv8MBL CMSIS GCC">
1964       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
1965       <require condition="ARMv8MBL CMSIS"/>
1966       <require condition="GCC"/>
1967     </condition>
1968
1969     <condition id="ARMv8MML CMSIS">
1970       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
1971       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1972       <require Cclass="CMSIS" Cgroup="CORE"/>
1973     </condition>
1974     <condition id="ARMv8MML CMSIS GCC">
1975       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
1976       <require condition="ARMv8MML CMSIS"/>
1977       <require condition="GCC"/>
1978     </condition>
1979
1980     <condition id="ARMCA5 CMSIS">
1981       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
1982       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1983       <require Cclass="CMSIS" Cgroup="CORE"/>
1984     </condition>
1985
1986     <condition id="ARMCA7 CMSIS">
1987       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
1988       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1989       <require Cclass="CMSIS" Cgroup="CORE"/>
1990     </condition>
1991
1992     <condition id="ARMCA9 CMSIS">
1993       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
1994       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1995       <require Cclass="CMSIS" Cgroup="CORE"/>
1996     </condition>
1997
1998     <!-- CMSIS DSP -->
1999     <condition id="CMSIS DSP">
2000       <description>Components required for DSP</description>
2001       <require condition="ARMv6_7_8-M Device"/>
2002       <require condition="ARMCC GCC IAR"/>
2003       <require Cclass="CMSIS" Cgroup="CORE"/>
2004     </condition>
2005
2006     <!-- CMSIS NN -->
2007     <condition id="CMSIS NN">
2008       <description>Components required for NN</description>
2009       <require condition="CMSIS DSP"/>
2010     </condition>
2011
2012     <!-- RTOS RTX -->
2013     <condition id="RTOS RTX">
2014       <description>Components required for RTOS RTX</description>
2015       <require condition="ARMv6_7-M Device"/>
2016       <require condition="ARMCC GCC IAR"/>
2017       <require Cclass="Device" Cgroup="Startup"/>
2018       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2019     </condition>
2020     <condition id="RTOS RTX IFX">
2021       <description>Components required for RTOS RTX IFX</description>
2022       <require condition="ARMv6_7-M Device"/>
2023       <require condition="ARMCC GCC IAR"/>
2024       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2025       <require Cclass="Device" Cgroup="Startup"/>
2026       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2027     </condition>
2028     <condition id="RTOS RTX5">
2029       <description>Components required for RTOS RTX5</description>
2030       <require condition="ARMv6_7_8-M Device"/>
2031       <require condition="ARMCC GCC IAR"/>
2032       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2033     </condition>
2034     <condition id="RTOS2 RTX5">
2035       <description>Components required for RTOS2 RTX5</description>
2036       <require condition="ARMv6_7_8-M Device"/>
2037       <require condition="ARMCC GCC IAR"/>
2038       <require Cclass="CMSIS"  Cgroup="CORE"/>
2039       <require Cclass="Device" Cgroup="Startup"/>
2040     </condition>
2041     <condition id="RTOS2 RTX5 v7-A">
2042       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2043       <require condition="ARMv7-A Device"/>
2044       <require condition="ARMCC GCC IAR"/>
2045       <require Cclass="CMSIS"  Cgroup="CORE"/>
2046       <require Cclass="Device" Cgroup="Startup"/>
2047       <require Cclass="Device" Cgroup="OS Tick"/>
2048       <require Cclass="Device" Cgroup="IRQ Controller"/>
2049     </condition>
2050     <condition id="RTOS2 RTX5 Lib">
2051       <description>Components required for RTOS2 RTX5 Library</description>
2052       <require condition="ARMv6_7_8-M Device"/>
2053       <require condition="ARMCC GCC IAR"/>
2054       <require Cclass="CMSIS"  Cgroup="CORE"/>
2055       <require Cclass="Device" Cgroup="Startup"/>
2056     </condition>
2057     <condition id="RTOS2 RTX5 NS">
2058       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2059       <require condition="ARMv8-M TZ Device"/>
2060       <require condition="ARMCC GCC IAR"/>
2061       <require Cclass="CMSIS"  Cgroup="CORE"/>
2062       <require Cclass="Device" Cgroup="Startup"/>
2063     </condition>
2064
2065     <!-- OS Tick -->
2066     <condition id="OS Tick PTIM">
2067       <description>Components required for OS Tick Private Timer</description>
2068       <require condition="CA5_CA9"/>
2069       <require Cclass="Device" Cgroup="IRQ Controller"/>
2070     </condition>
2071
2072     <condition id="OS Tick GTIM">
2073       <description>Components required for OS Tick Generic Physical Timer</description>
2074       <require condition="CA7"/>
2075       <require Cclass="Device" Cgroup="IRQ Controller"/>
2076     </condition>
2077
2078   </conditions>
2079
2080   <components>
2081     <!-- CMSIS-Core component -->
2082     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.1.1"  condition="ARMv6_7_8-M Device" >
2083       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
2084       <files>
2085         <!-- CPU independent -->
2086         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2087         <file category="include" name="CMSIS/Include/"/>
2088         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2089         <!-- Code template -->
2090         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
2091         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2092       </files>
2093     </component>
2094
2095     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.1"  condition="ARMv7-A Device" >
2096       <description>CMSIS-CORE for Cortex-A</description>
2097       <files>
2098         <!-- CPU independent -->
2099         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2100         <file category="include" name="CMSIS/Core_A/Include/"/>
2101       </files>
2102     </component>
2103
2104     <!-- CMSIS-Startup components -->
2105     <!-- Cortex-M0 -->
2106     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
2107       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2108       <files>
2109         <!-- include folder / device header file -->
2110         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2111         <!-- startup / system file -->
2112         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2113         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
2114         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2115         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2116         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2117       </files>
2118     </component>
2119     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
2120       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2121       <files>
2122         <!-- include folder / device header file -->
2123         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2124         <!-- startup / system file -->
2125         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
2126         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2127         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2128       </files>
2129     </component>
2130
2131     <!-- Cortex-M0+ -->
2132     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
2133       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2134       <files>
2135         <!-- include folder / device header file -->
2136         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2137         <!-- startup / system file -->
2138         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2139         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
2140         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2141         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2142         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2143       </files>
2144     </component>
2145     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
2146       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2147       <files>
2148         <!-- include folder / device header file -->
2149         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2150         <!-- startup / system file -->
2151         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
2152         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2153         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2154       </files>
2155     </component>
2156
2157     <!-- Cortex-M3 -->
2158     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
2159       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2160       <files>
2161         <!-- include folder / device header file -->
2162         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2163         <!-- startup / system file -->
2164         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2165         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
2166         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2167         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2168         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2169       </files>
2170     </component>
2171     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
2172       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2173       <files>
2174         <!-- include folder / device header file -->
2175         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2176         <!-- startup / system file -->
2177         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
2178         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2179         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2180       </files>
2181     </component>
2182
2183     <!-- Cortex-M4 -->
2184     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
2185       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2186       <files>
2187         <!-- include folder / device header file -->
2188         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2189         <!-- startup / system file -->
2190         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2191         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2192         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2193         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2194         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2195       </files>
2196     </component>
2197     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2198       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2199       <files>
2200         <!-- include folder / device header file -->
2201         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2202         <!-- startup / system file -->
2203         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2204         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2205         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2206       </files>
2207     </component>
2208
2209     <!-- Cortex-M7 -->
2210     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2211       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2212       <files>
2213         <!-- include folder / device header file -->
2214         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2215         <!-- startup / system file -->
2216         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2217         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2218         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2219         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2220         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2221       </files>
2222     </component>
2223     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2224       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2225       <files>
2226         <!-- include folder / device header file -->
2227         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2228         <!-- startup / system file -->
2229         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2230         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2231         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2232       </files>
2233     </component>
2234
2235     <!-- Cortex-M23 -->
2236     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2237       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2238       <files>
2239         <!-- include folder / device header file -->
2240         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2241         <!-- startup / system file -->
2242         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2243         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2244         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2245         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2246         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2247         <!-- SAU configuration -->
2248         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2249       </files>
2250     </component>
2251     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2252       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2253       <files>
2254         <!-- include folder / device header file -->
2255         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2256         <!-- startup / system file -->
2257         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2258         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2259         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2260         <!-- SAU configuration -->
2261         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2262       </files>
2263     </component>
2264
2265     <!-- Cortex-M33 -->
2266     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2267       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2268       <files>
2269         <!-- include folder / device header file -->
2270         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2271         <!-- startup / system file -->
2272         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2273         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2274         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2275         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2276         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2277         <!-- SAU configuration -->
2278         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2279       </files>
2280     </component>
2281     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2282       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2283       <files>
2284         <!-- include folder / device header file -->
2285         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2286         <!-- startup / system file -->
2287         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2288         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2289         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2290         <!-- SAU configuration -->
2291         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2292       </files>
2293     </component>
2294
2295     <!-- Cortex-SC000 -->
2296     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2297       <description>System and Startup for Generic Arm SC000 device</description>
2298       <files>
2299         <!-- include folder / device header file -->
2300         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2301         <!-- startup / system file -->
2302         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2303         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2304         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2305         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2306         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2307       </files>
2308     </component>
2309     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2310       <description>System and Startup for Generic Arm SC000 device</description>
2311       <files>
2312         <!-- include folder / device header file -->
2313         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2314         <!-- startup / system file -->
2315         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2316         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2317         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2318       </files>
2319     </component>
2320
2321     <!-- Cortex-SC300 -->
2322     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2323       <description>System and Startup for Generic Arm SC300 device</description>
2324       <files>
2325         <!-- include folder / device header file -->
2326         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2327         <!-- startup / system file -->
2328         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2329         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2330         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2331         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2332         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2333       </files>
2334     </component>
2335     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2336       <description>System and Startup for Generic Arm SC300 device</description>
2337       <files>
2338         <!-- include folder / device header file -->
2339         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2340         <!-- startup / system file -->
2341         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2342         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2343         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2344       </files>
2345     </component>
2346
2347     <!-- ARMv8MBL -->
2348     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2349       <description>System and Startup for Generic Armv8-M Baseline device</description>
2350       <files>
2351         <!-- include folder / device header file -->
2352         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2353         <!-- startup / system file -->
2354         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2355         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2356         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2357         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2358         <!-- SAU configuration -->
2359         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2360       </files>
2361     </component>
2362     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2363       <description>System and Startup for Generic Armv8-M Baseline device</description>
2364       <files>
2365         <!-- include folder / device header file -->
2366         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2367         <!-- startup / system file -->
2368         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2369         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2370         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2371         <!-- SAU configuration -->
2372         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2373       </files>
2374     </component>
2375
2376     <!-- ARMv8MML -->
2377     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2378       <description>System and Startup for Generic Armv8-M Mainline device</description>
2379       <files>
2380         <!-- include folder / device header file -->
2381         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2382         <!-- startup / system file -->
2383         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2384         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2385         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2386         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2387         <!-- SAU configuration -->
2388         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2389       </files>
2390     </component>
2391     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2392       <description>System and Startup for Generic Armv8-M Mainline device</description>
2393       <files>
2394         <!-- include folder / device header file -->
2395         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2396         <!-- startup / system file -->
2397         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2398         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2399         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2400         <!-- SAU configuration -->
2401         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2402       </files>
2403     </component>
2404
2405     <!-- Cortex-A5 -->
2406     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2407       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2408       <files>
2409         <!-- include folder / device header file -->
2410         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2411         <!-- startup / system / mmu files -->
2412         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2413         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2414         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2415         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2416         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2417         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2418         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2419         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2420         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2421         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2422         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2423         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2424
2425       </files>
2426     </component>
2427
2428     <!-- Cortex-A7 -->
2429     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2430       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2431       <files>
2432         <!-- include folder / device header file -->
2433         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2434         <!-- startup / system / mmu files -->
2435         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2436         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2437         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2438         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2439         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2440         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2441         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2442         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2443         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2444         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2445         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2446         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2447       </files>
2448     </component>
2449
2450     <!-- Cortex-A9 -->
2451     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2452       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2453       <files>
2454         <!-- include folder / device header file -->
2455         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2456         <!-- startup / system / mmu files -->
2457         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2458         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2459         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2460         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2461         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2462         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2463         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2464         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2465         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2466         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2467         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2468         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2469       </files>
2470     </component>
2471
2472     <!-- IRQ Controller -->
2473     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2474       <description>IRQ Controller implementation using GIC</description>
2475       <files>
2476         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2477       </files>
2478     </component>
2479
2480     <!-- OS Tick -->
2481     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2482       <description>OS Tick implementation using Private Timer</description>
2483       <files>
2484         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2485       </files>
2486     </component>
2487
2488     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2489       <description>OS Tick implementation using Generic Physical Timer</description>
2490       <files>
2491         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2492       </files>
2493     </component>
2494
2495     <!-- CMSIS-DSP component -->
2496     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2497       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2498       <files>
2499         <!-- CPU independent -->
2500         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2501         <file category="header" name="CMSIS/Include/arm_math.h"/>
2502
2503         <!-- CPU and Compiler dependent -->
2504         <!-- ARMCC -->
2505         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2506         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2507         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2508         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2509         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2510         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2511         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2512         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2513         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2514         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2515         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2516         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2517         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2518         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2519
2520         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2521         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2522         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2523         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2524         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2525         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2526         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2527         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2528         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2529         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2530         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2531         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2532
2533         <!-- GCC -->
2534         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2535         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2536         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2537         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2538         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2539         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2540         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2541
2542         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2543         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2544         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2545         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2546         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2547         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2548         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2549         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2550         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2551         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2552         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2553         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2554
2555         <!-- IAR -->
2556         <file category="library" condition="CM0_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2557         <file category="library" condition="CM0_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2558         <file category="library" condition="CM3_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2559         <file category="library" condition="CM3_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2560         <file category="library" condition="CM4_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2561         <file category="library" condition="CM4_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2562         <file category="library" condition="CM4_FP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/IAR"/>
2563         <file category="library" condition="CM4_FP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP_Lib/Source/IAR"/>
2564         <file category="library" condition="CM7_LE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2565         <file category="library" condition="CM7_BE_IAR"               name="CMSIS/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2566         <file category="library" condition="CM7_DP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP_Lib/Source/IAR"/>
2567         <file category="library" condition="CM7_DP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP_Lib/Source/IAR"/>
2568         <file category="library" condition="CM7_SP_LE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP_Lib/Source/IAR"/>
2569         <file category="library" condition="CM7_SP_BE_IAR"            name="CMSIS/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP_Lib/Source/IAR"/>
2570
2571         <file category="library" condition="CM23_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2572         <file category="library" condition="CM33_LE_IAR"              name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2573         <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/IAR"/>
2574         <file category="library" condition="CM33_FP_LE_IAR"           name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/IAR"/>
2575         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"    name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/IAR"/>
2576         <file category="library" condition="CM33_DSP_SP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2577         <!--file category="library" condition="CM33_DSP_DP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/IAR"/-->
2578         <file category="library" condition="ARMv8MBL_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2579         <file category="library" condition="ARMv8MML_LE_IAR"          name="CMSIS/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/IAR"/>
2580         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/IAR"/>
2581         <file category="library" condition="ARMv8MML_FP_LE_IAR"       name="CMSIS/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/IAR"/>
2582         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR" name="CMSIS/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/IAR"/>
2583         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/IAR"/>
2584         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"   name="CMSIS/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/IAR"/-->
2585
2586       </files>
2587     </component>
2588
2589     <!-- CMSIS-NN component -->
2590     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.0.0" condition="CMSIS NN">
2591       <description>CMSIS-NN Neural Network Library</description>
2592       <files>
2593         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2594         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2595
2596         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2597         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2598         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2599         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2600
2601         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2602         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2603         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2604         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2605         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2606         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2607         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2608         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2609         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2610         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2611         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2612
2613         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2614         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2615         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2616         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2617         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2618         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2619
2620         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2621         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2622         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2623
2624         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2625
2626         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2627         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2628       </files>
2629     </component>
2630
2631     <!-- CMSIS-RTOS Keil RTX component -->
2632     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2633       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2634       <RTE_Components_h>
2635         <!-- the following content goes into file 'RTE_Components.h' -->
2636         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2637         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2638       </RTE_Components_h>
2639       <files>
2640         <!-- CPU independent -->
2641         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2642         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2643         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2644
2645         <!-- RTX templates -->
2646         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2647         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2648         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2649         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2650         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2651         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2652         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2653         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2654         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2655         <!-- tool-chain specific template file -->
2656         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2657         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2658         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2659
2660         <!-- CPU and Compiler dependent -->
2661         <!-- ARMCC -->
2662         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2663         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2664         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2665         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2666         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2667         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2668         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2669         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2670         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2671         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2672         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2673         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2674         <!-- GCC -->
2675         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2676         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2677         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2678         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2679         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2680         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2681         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2682         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2683         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2684         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2685         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2686         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2687         <!-- IAR -->
2688         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2689         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2690         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2691         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2692         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2693         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2694         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2695         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2696         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2697         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2698         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2699         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2700       </files>
2701     </component>
2702     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2703     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2704       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2705       <RTE_Components_h>
2706         <!-- the following content goes into file 'RTE_Components.h' -->
2707         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2708         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2709       </RTE_Components_h>
2710       <files>
2711         <!-- CPU independent -->
2712         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2713         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2714         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2715
2716         <!-- RTX templates -->
2717         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2718         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2719         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2720         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2721         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2722         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2723         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2724         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2725         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2726         <!-- tool-chain specific template file -->
2727         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2728         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2729         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2730
2731         <!-- CPU and Compiler dependent -->
2732         <!-- ARMCC -->
2733         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2734         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2735         <!-- GCC -->
2736         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2737         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2738         <!-- IAR -->
2739       </files>
2740     </component>
2741
2742     <!-- CMSIS-RTOS Keil RTX5 component -->
2743     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.3.1" Capiversion="1.0.0" condition="RTOS RTX5">
2744       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2745       <RTE_Components_h>
2746         <!-- the following content goes into file 'RTE_Components.h' -->
2747         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2748         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2749       </RTE_Components_h>
2750       <files>
2751         <!-- RTX header file -->
2752         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2753         <!-- RTX compatibility module for API V1 -->
2754         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2755       </files>
2756     </component>
2757
2758     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2759     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.3.1" Capiversion="2.1.2" condition="RTOS2 RTX5 Lib">
2760       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
2761       <RTE_Components_h>
2762         <!-- the following content goes into file 'RTE_Components.h' -->
2763         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2764         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2765       </RTE_Components_h>
2766       <files>
2767         <!-- RTX documentation -->
2768         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2769
2770         <!-- RTX header files -->
2771         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2772
2773         <!-- RTX configuration -->
2774         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.3.0"/>
2775         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2776
2777         <!-- RTX templates -->
2778         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2779         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2780         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2781         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2782         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2783         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2784         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2785         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2786         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2787         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2788
2789         <!-- RTX library configuration -->
2790         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2791
2792         <!-- RTX libraries (CPU and Compiler dependent) -->
2793         <!-- ARMCC -->
2794         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2795         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2796         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2797         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2798         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2799         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2800         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2801         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2802         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2803         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2804         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2805         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2806         <!-- GCC -->
2807         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2808         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2809         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2810         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2811         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2812         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2813         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2814         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2815         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2816         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2817         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2818         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2819         <!-- IAR -->
2820         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2821         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2822         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2823         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2824         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2825         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2826       </files>
2827     </component>
2828     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.3.1" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
2829       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
2830       <RTE_Components_h>
2831         <!-- the following content goes into file 'RTE_Components.h' -->
2832         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2833         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2834         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2835       </RTE_Components_h>
2836       <files>
2837         <!-- RTX documentation -->
2838         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2839
2840         <!-- RTX header files -->
2841         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2842
2843         <!-- RTX configuration -->
2844         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.3.0"/>
2845         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2846
2847         <!-- RTX templates -->
2848         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2849         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2850         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2851         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2852         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2853         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2854         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2855         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2856         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2857         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2858
2859         <!-- RTX library configuration -->
2860         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2861
2862         <!-- RTX libraries (CPU and Compiler dependent) -->
2863         <!-- ARMCC -->
2864         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2865         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2866         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2867         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2868         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2869         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2870         <!-- GCC -->
2871         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2872         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2873         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2874         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2875         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2876         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2877       </files>
2878     </component>
2879     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.3.1" Capiversion="2.1.2" condition="RTOS2 RTX5">
2880       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
2881       <RTE_Components_h>
2882         <!-- the following content goes into file 'RTE_Components.h' -->
2883         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2884         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2885         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2886       </RTE_Components_h>
2887       <files>
2888         <!-- RTX documentation -->
2889         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2890
2891         <!-- RTX header files -->
2892         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2893
2894         <!-- RTX configuration -->
2895         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.3.0"/>
2896         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2897
2898         <!-- RTX templates -->
2899         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2900         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2901         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2902         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2903         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2904         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2905         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2906         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2907         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2908         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2909
2910         <!-- RTX sources (core) -->
2911         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2912         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2913         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2914         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2915         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2916         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2917         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2918         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2919         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2920         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2921         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2922         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2923         <!-- RTX sources (library configuration) -->
2924         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2925         <!-- RTX sources (handlers ARMCC) -->
2926         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2927         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2928         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2929         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2930         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2931         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2932         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2933         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2934         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2935         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2936         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2937         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2938         <!-- RTX sources (handlers GCC) -->
2939         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2940         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2941         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2942         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2943         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2944         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2945         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2946         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2947         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2948         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2949         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2950         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2951         <!-- RTX sources (handlers IAR) -->
2952         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2953         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2954         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2955         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2956         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2957         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2958         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
2959         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
2960         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
2961         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
2962         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
2963         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
2964         <!-- OS Tick (SysTick) -->
2965         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2966       </files>
2967     </component>
2968     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.3.1" Capiversion="2.1.2" condition="RTOS2 RTX5 v7-A">
2969       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
2970       <RTE_Components_h>
2971         <!-- the following content goes into file 'RTE_Components.h' -->
2972         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2973         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2974         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2975       </RTE_Components_h>
2976       <files>
2977         <!-- RTX documentation -->
2978         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2979
2980         <!-- RTX header files -->
2981         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2982
2983         <!-- RTX configuration -->
2984         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.3.0"/>
2985         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2986
2987         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2988
2989         <!-- RTX templates -->
2990         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2991         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2992         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2993         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2994         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2995         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2996         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2997         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2998         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2999         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3000
3001         <!-- RTX sources (core) -->
3002         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3003         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3004         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3005         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3006         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3007         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3008         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3009         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3010         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3011         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3012         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3013         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3014         <!-- RTX sources (library configuration) -->
3015         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3016         <!-- RTX sources (handlers ARMCC) -->
3017         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3018         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3019         <!-- RTX sources (handlers GCC) -->
3020         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3021         <!-- RTX sources (handlers IAR) -->
3022         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3023       </files>
3024     </component>
3025     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.3.1" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
3026       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3027       <RTE_Components_h>
3028         <!-- the following content goes into file 'RTE_Components.h' -->
3029         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3030         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3031         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3032         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3033       </RTE_Components_h>
3034       <files>
3035         <!-- RTX documentation -->
3036         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3037
3038         <!-- RTX header files -->
3039         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3040
3041         <!-- RTX configuration -->
3042         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.3.0"/>
3043         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3044
3045         <!-- RTX templates -->
3046         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3047         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3048         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3049         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3050         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3051         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3052         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3053         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3054         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3055         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3056
3057         <!-- RTX sources (core) -->
3058         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3059         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3060         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3061         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3062         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3063         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3064         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3065         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3066         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3067         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3068         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3069         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3070         <!-- RTX sources (library configuration) -->
3071         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3072         <!-- RTX sources (ARMCC handlers) -->
3073         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3074         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3075         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3076         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3077         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3078         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3079         <!-- RTX sources (GCC handlers) -->
3080         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3081         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3082         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3083         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3084         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3085         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3086         <!-- RTX sources (IAR handlers) -->
3087         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3088         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3089         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3090         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3091         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3092         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3093         <!-- OS Tick (SysTick) -->
3094         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3095       </files>
3096     </component>
3097
3098   </components>
3099
3100   <boards>
3101     <board name="uVision Simulator" vendor="Keil">
3102       <description>uVision Simulator</description>
3103       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3104       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3105       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3106       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3107       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3108       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3109       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3110       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3111       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3112       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3113       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3114       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3115       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3116       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3117       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3118       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3119       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3120       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3121       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3122     </board>
3123
3124     <board name="Fixed Virtual Platform" vendor="ARM">
3125       <description>Fixed Virtual Platform</description>
3126       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
3127       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
3128       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
3129     </board>
3130   </boards>
3131
3132   <examples>
3133     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
3134       <description>DSP_Lib Class Marks example</description>
3135       <board name="uVision Simulator" vendor="Keil"/>
3136       <project>
3137         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3138       </project>
3139       <attributes>
3140         <component Cclass="CMSIS" Cgroup="CORE"/>
3141         <component Cclass="CMSIS" Cgroup="DSP"/>
3142         <component Cclass="Device" Cgroup="Startup"/>
3143         <category>Getting Started</category>
3144       </attributes>
3145     </example>
3146
3147     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
3148       <description>DSP_Lib Convolution example</description>
3149       <board name="uVision Simulator" vendor="Keil"/>
3150       <project>
3151         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3152       </project>
3153       <attributes>
3154         <component Cclass="CMSIS" Cgroup="CORE"/>
3155         <component Cclass="CMSIS" Cgroup="DSP"/>
3156         <component Cclass="Device" Cgroup="Startup"/>
3157         <category>Getting Started</category>
3158       </attributes>
3159     </example>
3160
3161     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
3162       <description>DSP_Lib Dotproduct example</description>
3163       <board name="uVision Simulator" vendor="Keil"/>
3164       <project>
3165         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3166       </project>
3167       <attributes>
3168         <component Cclass="CMSIS" Cgroup="CORE"/>
3169         <component Cclass="CMSIS" Cgroup="DSP"/>
3170         <component Cclass="Device" Cgroup="Startup"/>
3171         <category>Getting Started</category>
3172       </attributes>
3173     </example>
3174
3175     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
3176       <description>DSP_Lib FFT Bin example</description>
3177       <board name="uVision Simulator" vendor="Keil"/>
3178       <project>
3179         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3180       </project>
3181       <attributes>
3182         <component Cclass="CMSIS" Cgroup="CORE"/>
3183         <component Cclass="CMSIS" Cgroup="DSP"/>
3184         <component Cclass="Device" Cgroup="Startup"/>
3185         <category>Getting Started</category>
3186       </attributes>
3187     </example>
3188
3189     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
3190       <description>DSP_Lib FIR example</description>
3191       <board name="uVision Simulator" vendor="Keil"/>
3192       <project>
3193         <environment name="uv" load="arm_fir_example.uvprojx"/>
3194       </project>
3195       <attributes>
3196         <component Cclass="CMSIS" Cgroup="CORE"/>
3197         <component Cclass="CMSIS" Cgroup="DSP"/>
3198         <component Cclass="Device" Cgroup="Startup"/>
3199         <category>Getting Started</category>
3200       </attributes>
3201     </example>
3202
3203     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
3204       <description>DSP_Lib Graphic Equalizer example</description>
3205       <board name="uVision Simulator" vendor="Keil"/>
3206       <project>
3207         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3208       </project>
3209       <attributes>
3210         <component Cclass="CMSIS" Cgroup="CORE"/>
3211         <component Cclass="CMSIS" Cgroup="DSP"/>
3212         <component Cclass="Device" Cgroup="Startup"/>
3213         <category>Getting Started</category>
3214       </attributes>
3215     </example>
3216
3217     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
3218       <description>DSP_Lib Linear Interpolation example</description>
3219       <board name="uVision Simulator" vendor="Keil"/>
3220       <project>
3221         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3222       </project>
3223       <attributes>
3224         <component Cclass="CMSIS" Cgroup="CORE"/>
3225         <component Cclass="CMSIS" Cgroup="DSP"/>
3226         <component Cclass="Device" Cgroup="Startup"/>
3227         <category>Getting Started</category>
3228       </attributes>
3229     </example>
3230
3231     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
3232       <description>DSP_Lib Matrix example</description>
3233       <board name="uVision Simulator" vendor="Keil"/>
3234       <project>
3235         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3236       </project>
3237       <attributes>
3238         <component Cclass="CMSIS" Cgroup="CORE"/>
3239         <component Cclass="CMSIS" Cgroup="DSP"/>
3240         <component Cclass="Device" Cgroup="Startup"/>
3241         <category>Getting Started</category>
3242       </attributes>
3243     </example>
3244
3245     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
3246       <description>DSP_Lib Signal Convergence example</description>
3247       <board name="uVision Simulator" vendor="Keil"/>
3248       <project>
3249         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3250       </project>
3251       <attributes>
3252         <component Cclass="CMSIS" Cgroup="CORE"/>
3253         <component Cclass="CMSIS" Cgroup="DSP"/>
3254         <component Cclass="Device" Cgroup="Startup"/>
3255         <category>Getting Started</category>
3256       </attributes>
3257     </example>
3258
3259     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
3260       <description>DSP_Lib Sinus/Cosinus example</description>
3261       <board name="uVision Simulator" vendor="Keil"/>
3262       <project>
3263         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3264       </project>
3265       <attributes>
3266         <component Cclass="CMSIS" Cgroup="CORE"/>
3267         <component Cclass="CMSIS" Cgroup="DSP"/>
3268         <component Cclass="Device" Cgroup="Startup"/>
3269         <category>Getting Started</category>
3270       </attributes>
3271     </example>
3272
3273     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
3274       <description>DSP_Lib Variance example</description>
3275       <board name="uVision Simulator" vendor="Keil"/>
3276       <project>
3277         <environment name="uv" load="arm_variance_example.uvprojx"/>
3278       </project>
3279       <attributes>
3280         <component Cclass="CMSIS" Cgroup="CORE"/>
3281         <component Cclass="CMSIS" Cgroup="DSP"/>
3282         <component Cclass="Device" Cgroup="Startup"/>
3283         <category>Getting Started</category>
3284       </attributes>
3285     </example>
3286
3287     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3288       <description>Neural Network CIFAR10 example</description>
3289       <board name="uVision Simulator" vendor="Keil"/>
3290       <project>
3291         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3292       </project>
3293       <attributes>
3294         <component Cclass="CMSIS" Cgroup="CORE"/>
3295         <component Cclass="CMSIS" Cgroup="DSP"/>
3296         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3297         <component Cclass="Device" Cgroup="Startup"/>
3298         <category>Getting Started</category>
3299       </attributes>
3300     </example>
3301
3302     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
3303       <description>Neural Network GRU example</description>
3304       <board name="uVision Simulator" vendor="Keil"/>
3305       <project>
3306         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3307       </project>
3308       <attributes>
3309         <component Cclass="CMSIS" Cgroup="CORE"/>
3310         <component Cclass="CMSIS" Cgroup="DSP"/>
3311         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3312         <component Cclass="Device" Cgroup="Startup"/>
3313         <category>Getting Started</category>
3314       </attributes>
3315     </example>
3316
3317     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3318       <description>CMSIS-RTOS2 Blinky example</description>
3319       <board name="uVision Simulator" vendor="Keil"/>
3320       <project>
3321         <environment name="uv" load="Blinky.uvprojx"/>
3322       </project>
3323       <attributes>
3324         <component Cclass="CMSIS" Cgroup="CORE"/>
3325         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3326         <component Cclass="Device" Cgroup="Startup"/>
3327         <category>Getting Started</category>
3328       </attributes>
3329     </example>
3330
3331     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3332       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3333       <board name="uVision Simulator" vendor="Keil"/>
3334       <project>
3335         <environment name="uv" load="Blinky.uvprojx"/>
3336       </project>
3337       <attributes>
3338         <component Cclass="CMSIS" Cgroup="CORE"/>
3339         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3340         <component Cclass="Device" Cgroup="Startup"/>
3341         <category>Getting Started</category>
3342       </attributes>
3343     </example>
3344
3345     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3346       <description>CMSIS-RTOS2 Message Queue Example</description>
3347       <board name="uVision Simulator" vendor="Keil"/>
3348       <project>
3349         <environment name="uv" load="MsqQueue.uvprojx"/>
3350       </project>
3351       <attributes>
3352         <component Cclass="CMSIS" Cgroup="CORE"/>
3353         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3354         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3355         <component Cclass="Device" Cgroup="Startup"/>
3356         <category>Getting Started</category>
3357       </attributes>
3358     </example>
3359
3360     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3361       <description>CMSIS-RTOS2 Memory Pool Example</description>
3362       <board name="Fixed Virtual Platform" vendor="ARM"/>
3363       <project>
3364         <environment name="uv" load="MemPool.uvprojx"/>
3365       </project>
3366       <attributes>
3367         <component Cclass="CMSIS" Cgroup="CORE"/>
3368         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3369         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3370         <component Cclass="Device" Cgroup="Startup"/>
3371         <category>Getting Started</category>
3372       </attributes>
3373     </example>
3374
3375     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3376       <description>Bare-metal secure/non-secure example without RTOS</description>
3377       <board name="uVision Simulator" vendor="Keil"/>
3378       <project>
3379         <environment name="uv" load="NoRTOS.uvmpw"/>
3380       </project>
3381       <attributes>
3382         <component Cclass="CMSIS" Cgroup="CORE"/>
3383         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3384         <component Cclass="Device" Cgroup="Startup"/>
3385         <category>Getting Started</category>
3386       </attributes>
3387     </example>
3388
3389     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3390       <description>Secure/non-secure RTOS example with thread context management</description>
3391       <board name="uVision Simulator" vendor="Keil"/>
3392       <project>
3393         <environment name="uv" load="RTOS.uvmpw"/>
3394       </project>
3395       <attributes>
3396         <component Cclass="CMSIS" Cgroup="CORE"/>
3397         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3398         <component Cclass="Device" Cgroup="Startup"/>
3399         <category>Getting Started</category>
3400       </attributes>
3401     </example>
3402
3403     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3404       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3405       <board name="uVision Simulator" vendor="Keil"/>
3406       <project>
3407         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3408       </project>
3409       <attributes>
3410         <component Cclass="CMSIS" Cgroup="CORE"/>
3411         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3412         <component Cclass="Device" Cgroup="Startup"/>
3413         <category>Getting Started</category>
3414       </attributes>
3415     </example>
3416
3417   </examples>
3418
3419 </package>