begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Common Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.8.1">
  12       Active development ...
  13       CMSIS-DSP: 1.10.0 (see revision history for details)
  14       CMSIS-NN: 3.1.0 (see revision history for details)
  15        - Support for int16 convolution and fully connected for reference implementation
  16        - Support for DSP extension optimization for int16 convolution
  17     </release>
  18     <release version="5.8.0" date="2021-06-24">
  19       CMSIS-Core(M): 5.5.0 (see revision history for details)
  20         - Updated GCC LinkerDescription, GCC Assembler startup
  21         - Added Armv8-M Stack Sealing (to linker, startup) for toolchain ARM, GCC
  22         - Changed C-Startup to default Startup.
  23         - Updated Armv8-M Assembler startup to use GAS syntax
  24           Note: Updating existing projects may need manual user interaction!
  25       CMSIS-Core(A): 1.2.1 (see revision history for details)
  26         - Bugfixes for Cortex-A32
  27       CMSIS-DAP: 2.1.0 (see revision history for details)
  28         - Enhanced DAP_Info
  29         - Added extra UART support
  30       CMSIS-DSP: 1.9.0 (see revision history for details)
  31         - Purged pre-built libs from Git
  32         - Enhanced support for f16 datatype
  33         - Fixed couple of GCC issues
  34       CMSIS-NN: 3.0.0 (see revision history for details including version 2.0.0)
  35         - Major interface change for functions compatible with TensorFlow Lite for Microcontroller
  36         - Added optimization for SVDF kernel
  37         - Improved MVE performance for fully Connected and max pool operator
  38         - NULL bias support for fully connected operator in non-MVE case(Can affect performance)
  39         - Expanded existing unit test suite along with support for FVP
  40         - Removed Examples folder
  41       CMSIS-RTOS2:
  42         - RTX 5.5.3 (see revision history for details)
  43           - CVE-2021-27431 vulnerability mitigation.
  44           - Enhanced stack overrun checking.
  45           - Various bug fixes and improvements.
  46       CMSIS-Pack: 1.7.2 (see revision history for details)
  47         - Support for Microchip XC32 compiler
  48         - Support for Custom Datapath Extension
  49     </release>
  50     <release version="5.7.0" date="2020-04-09">
  51       CMSIS-Build: 0.9.0 (beta)
  52         - Draft for CMSIS Project description (CPRJ)
  53       CMSIS-Core(M): 5.4.0 (see revision history for details)
  54         - Cortex-M55 cpu support
  55         - Enhanced MVE support for Armv8.1-MML
  56         - Fixed device config define checks.
  57         - L1 Cache functions for Armv7-M and later
  58       CMSIS-Core(A): 1.2.0 (see revision history for details)
  59         - Fixed GIC_SetPendingIRQ to use GICD_SGIR
  60         - Added missing DSP intrinsics
  61         - Reworked assembly intrinsics: volatile, barriers and clobber
  62       CMSIS-DSP: 1.8.0 (see revision history for details)
  63         - Added new functions and function groups
  64         - Added MVE support
  65       CMSIS-NN: 1.3.0 (see revision history for details)
  66         - Added MVE support
  67         - Further optimizations for kernels using DSP extension
  68       CMSIS-RTOS2:
  69         - RTX 5.5.2 (see revision history for details)
  70       CMSIS-Driver: 2.8.0
  71         - Added VIO API 0.1.0 (Preview)
  72         - removed volatile from status related typedefs in APIs
  73         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  74       CMSIS-Pack: 1.6.3 (see revision history for details)
  75         - deprecating all types specific to cpdsc format. Cpdsc is replaced by Cprj with dedicated schema.
  76       Devices:
  77         - ARMCM55 device
  78         - ARMv81MML startup code recognizing __MVE_USED macro
  79         - Refactored vector table references for all Cortex-M devices
  80         - Reworked ARMCM* C-StartUp files.
  81         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  82       Utilities:
  83         Attention: Linux binaries moved to Linux64 folder!
  84         - SVDConv 3.3.35
  85         - PackChk 1.3.89
  86     </release>
  87     <release version="5.6.0" date="2019-07-10">
  88       CMSIS-Core(M): 5.3.0 (see revision history for details)
  89         - Added provisions for compiler-independent C startup code.
  90       CMSIS-Core(A): 1.1.4 (see revision history for details)
  91         - Fixed __FPU_Enable.
  92       CMSIS-DSP: 1.7.0 (see revision history for details)
  93         - New Neon versions of f32 functions
  94         - Python wrapper
  95         - Preliminary cmake build
  96         - Compilation flags for FFTs
  97         - Changes to arm_math.h
  98       CMSIS-NN: 1.2.0 (see revision history for details)
  99         - New function for depthwise convolution with asymmetric quantization.
 100         - New support functions for requantization.
 101       CMSIS-RTOS:
 102         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
 103       CMSIS-RTOS2:
 104         - RTX 5.5.1 (see revision history for details)
 105       CMSIS-Driver: 2.7.1
 106         - WiFi Interface API 1.0.0
 107       Devices:
 108         - Generalized C startup code for all Cortex-M family devices.
 109         - Updated Cortex-A default memory regions and MMU configurations
 110         - Moved Cortex-A memory and system config files to avoid include path issues
 111     </release>
 112     <release version="5.5.1" date="2019-03-20">
 113       The following folders are deprecated
 114         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 115
 116       CMSIS-Core(M): 5.2.1 (see revision history for details)
 117         - Fixed compilation issue in cmsis_armclang_ltm.h
 118     </release>
 119     <release version="5.5.0" date="2019-03-18">
 120       The following folders have been removed:
 121         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
 122         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
 123       The following folders are deprecated
 124         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 125
 126       CMSIS-Core(M): 5.2.0 (see revision history for details)
 127         - Reworked Stack/Heap configuration for ARM startup files.
 128         - Added Cortex-M35P device support.
 129         - Added generic Armv8.1-M Mainline device support.
 130       CMSIS-Core(A): 1.1.3 (see revision history for details)
 131       CMSIS-DSP: 1.6.0 (see revision history for details)
 132         - reworked DSP library source files
 133         - reworked DSP library documentation
 134         - Changed DSP folder structure
 135         - moved DSP libraries to folder ./DSP/Lib
 136         - ARM DSP Libraries are built with ARMCLANG
 137         - Added DSP Libraries Source variant
 138       CMSIS-RTOS2:
 139         - RTX 5.5.0 (see revision history for details)
 140       CMSIS-Driver: 2.7.0
 141         - Added WiFi Interface API 1.0.0-beta
 142         - Added components for project specific driver implementations
 143       CMSIS-Pack: 1.6.0 (see revision history for details)
 144       Devices:
 145         - Added Cortex-M35P and ARMv81MML device templates.
 146         - Fixed C-Startup Code for GCC (aligned with other compilers)
 147       Utilities:
 148         - SVDConv 3.3.25
 149         - PackChk 1.3.82
 150     </release>
 151     <release version="5.4.0" date="2018-08-01">
 152       Aligned pack structure with repository.
 153       The following folders are deprecated:
 154         - CMSIS/Include/
 155         - CMSIS/DSP_Lib/
 156
 157       CMSIS-Core(M): 5.1.2 (see revision history for details)
 158         - Added Cortex-M1 support (beta).
 159       CMSIS-Core(A): 1.1.2 (see revision history for details)
 160       CMSIS-NN: 1.1.0
 161         - Added new math functions.
 162       CMSIS-RTOS2:
 163         - API 2.1.3 (see revision history for details)
 164         - RTX 5.4.0 (see revision history for details)
 165           * Updated exception handling on Cortex-A
 166       CMSIS-Driver:
 167         - Flash Driver API V2.2.0
 168       Utilities:
 169         - SVDConv 3.3.21
 170         - PackChk 1.3.71
 171     </release>
 172     <release version="5.3.0" date="2018-02-22">
 173       Updated Arm company brand.
 174       CMSIS-Core(M): 5.1.1 (see revision history for details)
 175       CMSIS-Core(A): 1.1.1 (see revision history for details)
 176       CMSIS-DAP: 2.0.0 (see revision history for details)
 177       CMSIS-NN: 1.0.0
 178         - Initial contribution of the bare metal Neural Network Library.
 179       CMSIS-RTOS2:
 180         - RTX 5.3.0 (see revision history for details)
 181         - OS Tick API 1.0.1
 182     </release>
 183     <release version="5.2.0" date="2017-11-16">
 184       CMSIS-Core(M): 5.1.0 (see revision history for details)
 185         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 186         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 187       CMSIS-Core(A): 1.1.0 (see revision history for details)
 188         - Added compiler_iccarm.h.
 189         - Added additional access functions for physical timer.
 190       CMSIS-DAP: 1.2.0 (see revision history for details)
 191       CMSIS-DSP: 1.5.2 (see revision history for details)
 192       CMSIS-Driver: 2.6.0 (see revision history for details)
 193         - CAN Driver API V1.2.0
 194         - NAND Driver API V2.3.0
 195       CMSIS-RTOS:
 196         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 197       CMSIS-RTOS2:
 198         - API 2.1.2 (see revision history for details)
 199         - RTX 5.2.3 (see revision history for details)
 200       Devices:
 201         - Added GCC startup and linker script for Cortex-A9.
 202         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 203         - Added IAR startup code for Cortex-A9
 204     </release>
 205     <release version="5.1.1" date="2017-09-19">
 206       CMSIS-RTOS2:
 207       - RTX 5.2.1 (see revision history for details)
 208     </release>
 209     <release version="5.1.0" date="2017-08-04">
 210       CMSIS-Core(M): 5.0.2 (see revision history for details)
 211       - Changed Version Control macros to be core agnostic.
 212       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 213       CMSIS-Core(A): 1.0.0 (see revision history for details)
 214       - Initial release
 215       - IRQ Controller API 1.0.0
 216       CMSIS-Driver: 2.05 (see revision history for details)
 217       - All typedefs related to status have been made volatile.
 218       CMSIS-RTOS2:
 219       - API 2.1.1 (see revision history for details)
 220       - RTX 5.2.0 (see revision history for details)
 221       - OS Tick API 1.0.0
 222       CMSIS-DSP: 1.5.2 (see revision history for details)
 223       - Fixed GNU Compiler specific diagnostics.
 224       CMSIS-Pack: 1.5.0 (see revision history for details)
 225       - added System Description File (*.SDF) Format
 226       CMSIS-Zone: 0.0.1 (Preview)
 227       - Initial specification draft
 228     </release>
 229     <release version="5.0.1" date="2017-02-03">
 230       Package Description:
 231       - added taxonomy for Cclass RTOS
 232       CMSIS-RTOS2:
 233       - API 2.1   (see revision history for details)
 234       - RTX 5.1.0 (see revision history for details)
 235       CMSIS-Core: 5.0.1 (see revision history for details)
 236       - Added __PACKED_STRUCT macro
 237       - Added uVisior support
 238       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 239       - Updated template for secure main function (main_s.c)
 240       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 241       CMSIS-DSP: 1.5.1 (see revision history for details)
 242       - added ARMv8M DSP libraries.
 243       CMSIS-Pack:1.4.9 (see revision history for details)
 244       - added Pack Index File specification and schema file
 245     </release>
 246     <release version="5.0.0" date="2016-11-11">
 247       Changed open source license to Apache 2.0
 248       CMSIS_Core:
 249        - Added support for Cortex-M23 and Cortex-M33.
 250        - Added ARMv8-M device configurations for mainline and baseline.
 251        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 252        - Added cmsis_compiler.h to unify compiler behaviour.
 253        - Updated function SCB_EnableICache (for Cortex-M7).
 254        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 255       CMSIS-RTOS:
 256         - bug fix in RTX 4.82 (see revision history for details)
 257       CMSIS-RTOS2:
 258         - new API including compatibility layer to CMSIS-RTOS
 259         - reference implementation based on RTX5
 260         - supports all Cortex-M variants including TrustZone for ARMv8-M
 261       CMSIS-SVD:
 262        - reworked SVD format documentation
 263        - removed SVD file database documentation as SVD files are distributed in packs
 264        - updated SVDConv for Win32 and Linux
 265       CMSIS-DSP:
 266        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 267        - Added DSP libraries build projects to CMSIS pack.
 268     </release>
 269     <release version="4.5.0" date="2015-10-28">
 270       - CMSIS-Core     4.30.0  (see revision history for details)
 271       - CMSIS-DAP      1.1.0   (unchanged)
 272       - CMSIS-Driver   2.04.0  (see revision history for details)
 273       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 274       - CMSIS-Pack     1.4.1   (see revision history for details)
 275       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 276       - CMSIS-SVD      1.3.1   (see revision history for details)
 277     </release>
 278     <release version="4.4.0" date="2015-09-11">
 279       - CMSIS-Core     4.20   (see revision history for details)
 280       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 281       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 282       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 283       - CMSIS-RTOS
 284         -- API         1.02   (unchanged)
 285         -- RTX         4.79   (see revision history for details)
 286       - CMSIS-SVD      1.3.0  (see revision history for details)
 287       - CMSIS-DAP      1.1.0  (extended with SWO support)
 288     </release>
 289     <release version="4.3.0" date="2015-03-20">
 290       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 291       - CMSIS-DSP      1.4.5  (see revision history for details)
 292       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 293       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 294       - CMSIS-RTOS
 295         -- API         1.02   (unchanged)
 296         -- RTX         4.78   (see revision history for details)
 297       - CMSIS-SVD      1.2    (unchanged)
 298     </release>
 299     <release version="4.2.0" date="2014-09-24">
 300       Adding Cortex-M7 support
 301       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 302       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 303       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 304       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 305       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 306     </release>
 307     <release version="4.1.1" date="2014-06-30">
 308       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 309     </release>
 310     <release version="4.1.0" date="2014-06-12">
 311       - CMSIS-Driver   2.02  (incompatible update)
 312       - CMSIS-Pack     1.3   (see revision history for details)
 313       - CMSIS-DSP      1.4.2 (unchanged)
 314       - CMSIS-Core     3.30  (unchanged)
 315       - CMSIS-RTOS RTX 4.74  (unchanged)
 316       - CMSIS-RTOS API 1.02  (unchanged)
 317       - CMSIS-SVD      1.10  (unchanged)
 318       PACK:
 319       - removed G++ specific files from PACK
 320       - added Component Startup variant "C Startup"
 321       - added Pack Checking Utility
 322       - updated conditions to reflect tool-chain dependency
 323       - added Taxonomy for Graphics
 324       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 325     </release>
 326     <!-- release version="4.0.0">
 327       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 328       - CMSIS-Pack     1.1   Preliminary
 329       - CMSIS-DSP      1.4.2 (see revision history for details)
 330       - CMSIS-Core     3.30  (see revision history for details)
 331       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 332       - CMSIS-RTOS API 1.02  (unchanged)
 333       - CMSIS-SVD      1.10  (unchanged)
 334     </release -->
 335     <release version="3.20.4" date="2014-02-20">
 336       - CMSIS-RTOS 4.74 (see revision history for details)
 337       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 338     </release>
 339     <!-- release version="3.20.3">
 340       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 341       - CMSIS-RTOS 4.73 (see revision history for details)
 342     </release -->
 343     <!-- release version="3.20.2">
 344       - CMSIS-Pack documentation has been added
 345       - CMSIS-Drivers header and documentation have been added to PACK
 346       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 347     </release -->
 348     <!-- release version="3.20.1">
 349       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 350       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 351     </release -->
 352     <!-- release version="3.20.0">
 353       The software portions that are deployed in the application program are now under a BSD license which allows usage
 354       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 355       The individual components have been update as listed below:
 356       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 357       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 358       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 359       - CMSIS-SVD is unchanged.
 360     </release -->
 361   </releases>
 362
 363   <taxonomy>
 364     <description Cclass="Audio">Software components for audio processing</description>
 365     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 366     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 367     <description Cclass="Compiler">Compiler Software Extensions</description>
 368     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 369     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 370     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 371     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 372     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 373     <description Cclass="File System">File Drive Support and File System</description>
 374     <description Cclass="IoT Client">IoT cloud client connector</description>
 375     <description Cclass="IoT Service">IoT specific services</description>
 376     <description Cclass="IoT Utility">IoT specific software utility</description>
 377     <description Cclass="Graphics">Graphical User Interface</description>
 378     <description Cclass="Network">Network Stack using Internet Protocols</description>
 379     <description Cclass="RTOS">Real-time Operating System</description>
 380     <description Cclass="Security">Encryption for secure communication or storage</description>
 381     <description Cclass="USB">Universal Serial Bus Stack</description>
 382     <description Cclass="Utility">Generic software utility components</description>
 383   </taxonomy>
 384
 385   <devices>
 386     <!-- ******************************  Cortex-M0  ****************************** -->
 387     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 388       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 389       <description>
 390 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 391 - simple, easy-to-use programmers model
 392 - highly efficient ultra-low power operation
 393 - excellent code density
 394 - deterministic, high-performance interrupt handling
 395 - upward compatibility with the rest of the Cortex-M processor family.
 396       </description>
 397       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 398       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 399       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 400       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 401
 402       <device Dname="ARMCM0">
 403         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 404         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 405       </device>
 406     </family>
 407
 408     <!-- ******************************  Cortex-M0P  ****************************** -->
 409     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 410       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 411       <description>
 412 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 413 - simple, easy-to-use programmers model
 414 - highly efficient ultra-low power operation
 415 - excellent code density
 416 - deterministic, high-performance interrupt handling
 417 - upward compatibility with the rest of the Cortex-M processor family.
 418       </description>
 419       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 420       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 421       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 422       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 423
 424       <device Dname="ARMCM0P">
 425         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 426         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 427       </device>
 428
 429       <device Dname="ARMCM0P_MPU">
 430         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 431         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 432       </device>
 433     </family>
 434
 435     <!-- ******************************  Cortex-M1  ****************************** -->
 436     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 437       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 438       <description>
 439 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 440 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 441       </description>
 442       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 443       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 444       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 445       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 446
 447       <device Dname="ARMCM1">
 448         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 449         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 450       </device>
 451     </family>
 452
 453     <!-- ******************************  Cortex-M3  ****************************** -->
 454     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 455       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 456       <description>
 457 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 458 - simple, easy-to-use programmers model
 459 - highly efficient ultra-low power operation
 460 - excellent code density
 461 - deterministic, high-performance interrupt handling
 462 - upward compatibility with the rest of the Cortex-M processor family.
 463       </description>
 464       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 465       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 466       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 467       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 468
 469       <device Dname="ARMCM3">
 470         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 471         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 472       </device>
 473     </family>
 474
 475     <!-- ******************************  Cortex-M4  ****************************** -->
 476     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 477       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 478       <description>
 479 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 480 - simple, easy-to-use programmers model
 481 - highly efficient ultra-low power operation
 482 - excellent code density
 483 - deterministic, high-performance interrupt handling
 484 - upward compatibility with the rest of the Cortex-M processor family.
 485       </description>
 486       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 487       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 488       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 489       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 490
 491       <device Dname="ARMCM4">
 492         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 493         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 494       </device>
 495
 496       <device Dname="ARMCM4_FP">
 497         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 498         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 499       </device>
 500     </family>
 501
 502     <!-- ******************************  Cortex-M7  ****************************** -->
 503     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 504       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 505       <description>
 506 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 507 - simple, easy-to-use programmers model
 508 - highly efficient ultra-low power operation
 509 - excellent code density
 510 - deterministic, high-performance interrupt handling
 511 - upward compatibility with the rest of the Cortex-M processor family.
 512       </description>
 513       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 514       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 515       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 516       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 517
 518       <device Dname="ARMCM7">
 519         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 520         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 521       </device>
 522
 523       <device Dname="ARMCM7_SP">
 524         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 525         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 526       </device>
 527
 528       <device Dname="ARMCM7_DP">
 529         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 530         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 531       </device>
 532     </family>
 533
 534     <!-- ******************************  Cortex-M23  ********************** -->
 535     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 536       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 537       <description>
 538 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 539 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 540 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 541       </description>
 542       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 543       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 544       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 545       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 546       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 547       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 548
 549       <device Dname="ARMCM23">
 550         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 551         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 552       </device>
 553
 554       <device Dname="ARMCM23_TZ">
 555         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 556         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 557       </device>
 558     </family>
 559
 560     <!-- ******************************  Cortex-M33  ****************************** -->
 561     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 562       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 563       <description>
 564 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 565 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 566       </description>
 567       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 568       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 569       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 570       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 571       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 572       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 573
 574       <device Dname="ARMCM33">
 575         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 576         <description>
 577           no DSP Instructions, no Floating Point Unit, no TrustZone
 578         </description>
 579         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 580       </device>
 581
 582       <device Dname="ARMCM33_TZ">
 583         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 584         <description>
 585           no DSP Instructions, no Floating Point Unit, TrustZone
 586         </description>
 587         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 588       </device>
 589
 590       <device Dname="ARMCM33_DSP_FP">
 591         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 592         <description>
 593           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 594         </description>
 595         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 596       </device>
 597
 598       <device Dname="ARMCM33_DSP_FP_TZ">
 599         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 600         <description>
 601           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 602         </description>
 603         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 604       </device>
 605     </family>
 606
 607     <!-- ******************************  Cortex-M35P  ****************************** -->
 608     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 609       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 610       <description>
 611 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 612 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 613       </description>
 614
 615       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 616       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 617       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 618       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 619       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 620       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 621
 622       <device Dname="ARMCM35P">
 623         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 624         <description>
 625           no DSP Instructions, no Floating Point Unit, no TrustZone
 626         </description>
 627         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 628       </device>
 629
 630       <device Dname="ARMCM35P_TZ">
 631         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 632         <description>
 633           no DSP Instructions, no Floating Point Unit, TrustZone
 634         </description>
 635         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 636       </device>
 637
 638       <device Dname="ARMCM35P_DSP_FP">
 639         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 640         <description>
 641           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 642         </description>
 643         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 644       </device>
 645
 646       <device Dname="ARMCM35P_DSP_FP_TZ">
 647         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 648         <description>
 649           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 650         </description>
 651         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 652       </device>
 653     </family>
 654
 655     <!-- ******************************  Cortex-M55  ****************************** -->
 656     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 657       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 658       <description>
 659 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 660 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 661 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 662       </description>
 663
 664       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 665       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 666       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 667       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 668       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 669       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 670
 671       <device Dname="ARMCM55">
 672         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 673         <description>
 674           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 675         </description>
 676         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 677       </device>
 678     </family>
 679
 680     <!-- ******************************  ARMSC000  ****************************** -->
 681     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 682       <description>
 683 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 684 - simple, easy-to-use programmers model
 685 - highly efficient ultra-low power operation
 686 - excellent code density
 687 - deterministic, high-performance interrupt handling
 688       </description>
 689       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 690       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 691       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 692       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 693
 694       <device Dname="ARMSC000">
 695         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 696         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 697       </device>
 698     </family>
 699
 700     <!-- ******************************  ARMSC300  ****************************** -->
 701     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 702       <description>
 703 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 704 - simple, easy-to-use programmers model
 705 - highly efficient ultra-low power operation
 706 - excellent code density
 707 - deterministic, high-performance interrupt handling
 708       </description>
 709       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 710       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 711       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 712       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 713
 714       <device Dname="ARMSC300">
 715         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 716         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 717       </device>
 718     </family>
 719
 720     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 721     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 722       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 723       <description>
 724 Armv8-M Baseline based device with TrustZone
 725       </description>
 726       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 727       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 728       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 729       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 730       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 731       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 732
 733       <device Dname="ARMv8MBL">
 734         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 735         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 736       </device>
 737     </family>
 738
 739     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 740     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 741       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 742       <description>
 743 Armv8-M Mainline based device with TrustZone
 744       </description>
 745       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 746       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 747       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 748       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 749       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 750       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 751
 752       <device Dname="ARMv8MML">
 753         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 754         <description>
 755           no DSP Instructions, no Floating Point Unit, TrustZone
 756         </description>
 757         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 758       </device>
 759
 760       <device Dname="ARMv8MML_DSP">
 761         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 762         <description>
 763           DSP Instructions, no Floating Point Unit, TrustZone
 764         </description>
 765         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 766       </device>
 767
 768       <device Dname="ARMv8MML_SP">
 769         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 770         <description>
 771           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 772         </description>
 773         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 774       </device>
 775
 776       <device Dname="ARMv8MML_DSP_SP">
 777         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 778         <description>
 779           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 780         </description>
 781         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 782       </device>
 783
 784       <device Dname="ARMv8MML_DP">
 785         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 786         <description>
 787           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 788         </description>
 789         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 790       </device>
 791
 792       <device Dname="ARMv8MML_DSP_DP">
 793         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 794         <description>
 795           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 796         </description>
 797         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 798       </device>
 799     </family>
 800
 801     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 802     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 803       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 804       <description>
 805 Armv8.1-M Mainline based device with TrustZone and MVE
 806       </description>
 807       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 808       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 809       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 810       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 811       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 812       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 813
 814
 815       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 816         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 817         <description>
 818           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 819         </description>
 820         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 821       </device>
 822     </family>
 823
 824     <!-- ******************************  Cortex-A5  ****************************** -->
 825     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 826       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 827       <description>
 828 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 829 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 830 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 831       </description>
 832
 833       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 834       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 835       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 836       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 837
 838       <device Dname="ARMCA5">
 839         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 840         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 841       </device>
 842     </family>
 843
 844     <!-- ******************************  Cortex-A7  ****************************** -->
 845     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 846       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 847       <description>
 848 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 849 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 850 an optional integrated GIC, and an optional L2 cache controller.
 851       </description>
 852
 853       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 854       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 855       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 856       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 857
 858       <device Dname="ARMCA7">
 859         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 860         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 861       </device>
 862     </family>
 863
 864     <!-- ******************************  Cortex-A9  ****************************** -->
 865     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 866       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 867       <description>
 868 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 869 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 870 and 8-bit Java bytecodes in Jazelle state.
 871       </description>
 872
 873       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 874       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 875       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 876       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 877
 878       <device Dname="ARMCA9">
 879         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 880         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 881       </device>
 882     </family>
 883   </devices>
 884
 885
 886   <apis>
 887     <!-- CMSIS Device API -->
 888     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 889       <description>Device interrupt controller interface</description>
 890       <files>
 891         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 892       </files>
 893     </api>
 894     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 895       <description>RTOS Kernel system tick timer interface</description>
 896       <files>
 897         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 898       </files>
 899     </api>
 900     <!-- CMSIS-RTOS API -->
 901     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 902       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 903       <files>
 904         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 905       </files>
 906     </api>
 907     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 908       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 909       <files>
 910         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 911         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 912       </files>
 913     </api>
 914     <!-- CMSIS Driver API -->
 915     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 916       <description>USART Driver API for Cortex-M</description>
 917       <files>
 918         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 919         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 920       </files>
 921     </api>
 922     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 923       <description>SPI Driver API for Cortex-M</description>
 924       <files>
 925         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 926         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 927       </files>
 928     </api>
 929     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 930       <description>SAI Driver API for Cortex-M</description>
 931       <files>
 932         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 933         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 934       </files>
 935     </api>
 936     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 937       <description>I2C Driver API for Cortex-M</description>
 938       <files>
 939         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 940         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 941       </files>
 942     </api>
 943     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 944       <description>CAN Driver API for Cortex-M</description>
 945       <files>
 946         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 947         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 948       </files>
 949     </api>
 950     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 951       <description>Flash Driver API for Cortex-M</description>
 952       <files>
 953         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 954         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 955       </files>
 956     </api>
 957     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 958       <description>MCI Driver API for Cortex-M</description>
 959       <files>
 960         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 961         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 962       </files>
 963     </api>
 964     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 965       <description>NAND Flash Driver API for Cortex-M</description>
 966       <files>
 967         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 968         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 969       </files>
 970     </api>
 971     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 972       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 973       <files>
 974         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 975         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 976         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 977       </files>
 978     </api>
 979     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 980       <description>Ethernet MAC Driver API for Cortex-M</description>
 981       <files>
 982         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 983         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 984       </files>
 985     </api>
 986     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 987       <description>Ethernet PHY Driver API for Cortex-M</description>
 988       <files>
 989         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 990         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 991       </files>
 992     </api>
 993     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 994       <description>USB Device Driver API for Cortex-M</description>
 995       <files>
 996         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 997         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 998       </files>
 999     </api>
1000     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
1001       <description>USB Host Driver API for Cortex-M</description>
1002       <files>
1003         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
1004         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
1005       </files>
1006     </api>
1007     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
1008       <description>WiFi driver</description>
1009       <files>
1010         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
1011         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
1012       </files>
1013     </api>
1014     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
1015       <description>Virtual I/O</description>
1016       <files>
1017         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
1018         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
1019         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
1020       </files>
1021     </api>
1022   </apis>
1023
1024   <!-- conditions are dependency rules that can apply to a component or an individual file -->
1025   <conditions>
1026     <!-- compiler -->
1027     <condition id="ARMCC6">
1028       <accept Tcompiler="ARMCC" Toptions="AC6"/>
1029       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1030     </condition>
1031     <condition id="ARMCC5">
1032       <require Tcompiler="ARMCC" Toptions="AC5"/>
1033     </condition>
1034     <condition id="ARMCC">
1035       <require Tcompiler="ARMCC"/>
1036     </condition>
1037     <condition id="GCC">
1038       <require Tcompiler="GCC"/>
1039     </condition>
1040     <condition id="IAR">
1041       <require Tcompiler="IAR"/>
1042     </condition>
1043     <condition id="ARMCC GCC">
1044       <accept Tcompiler="ARMCC"/>
1045       <accept Tcompiler="GCC"/>
1046     </condition>
1047     <condition id="ARMCC GCC IAR">
1048       <accept Tcompiler="ARMCC"/>
1049       <accept Tcompiler="GCC"/>
1050       <accept Tcompiler="IAR"/>
1051     </condition>
1052
1053     <!-- Arm architecture -->
1054     <condition id="ARMv6-M Device">
1055       <description>Armv6-M architecture based device</description>
1056       <accept Dcore="Cortex-M0"/>
1057       <accept Dcore="Cortex-M1"/>
1058       <accept Dcore="Cortex-M0+"/>
1059       <accept Dcore="SC000"/>
1060     </condition>
1061     <condition id="ARMv7-M Device">
1062       <description>Armv7-M architecture based device</description>
1063       <accept Dcore="Cortex-M3"/>
1064       <accept Dcore="Cortex-M4"/>
1065       <accept Dcore="Cortex-M7"/>
1066       <accept Dcore="SC300"/>
1067     </condition>
1068     <condition id="ARMv8-M Device">
1069       <description>Armv8-M architecture based device</description>
1070       <accept Dcore="ARMV8MBL"/>
1071       <accept Dcore="ARMV8MML"/>
1072       <accept Dcore="ARMV81MML"/>
1073       <accept Dcore="Cortex-M23"/>
1074       <accept Dcore="Cortex-M33"/>
1075       <accept Dcore="Cortex-M35P"/>
1076       <accept Dcore="Cortex-M55"/>
1077     </condition>
1078     <condition id="ARMv6_7-M Device">
1079       <description>Armv6_7-M architecture based device</description>
1080       <accept condition="ARMv6-M Device"/>
1081       <accept condition="ARMv7-M Device"/>
1082     </condition>
1083     <condition id="ARMv6_7_8-M Device">
1084       <description>Armv6_7_8-M architecture based device</description>
1085       <accept condition="ARMv6-M Device"/>
1086       <accept condition="ARMv7-M Device"/>
1087       <accept condition="ARMv8-M Device"/>
1088     </condition>
1089     <condition id="ARMv7-A Device">
1090       <description>Armv7-A architecture based device</description>
1091       <accept Dcore="Cortex-A5"/>
1092       <accept Dcore="Cortex-A7"/>
1093       <accept Dcore="Cortex-A9"/>
1094     </condition>
1095
1096     <condition id="TrustZone">
1097       <description>TrustZone</description>
1098       <require Dtz="TZ"/>
1099     </condition>
1100     <condition id="TZ Secure">
1101       <description>TrustZone (Secure)</description>
1102       <require Dtz="TZ"/>
1103       <require Dsecure="Secure"/>
1104     </condition>
1105     <condition id="TZ Non-secure">
1106       <description>TrustZone (Non-secure)</description>
1107       <require Dtz="TZ"/>
1108       <accept Dsecure="Non-secure"/>
1109       <accept Dsecure="TZ-disabled"/>
1110     </condition>
1111     <condition id="TZ Unavailable">
1112       <description>TrustZone not available</description>
1113       <deny Dtz="TZ"/>
1114     </condition>
1115
1116     <!-- ARM core -->
1117     <condition id="CM0">
1118       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1119       <accept Dcore="Cortex-M0"/>
1120       <accept Dcore="Cortex-M0+"/>
1121       <accept Dcore="SC000"/>
1122     </condition>
1123     <condition id="CM1">
1124       <description>Cortex-M1</description>
1125       <require Dcore="Cortex-M1"/>
1126     </condition>
1127     <condition id="CM3">
1128       <description>Cortex-M3 or SC300 processor based device</description>
1129       <accept Dcore="Cortex-M3"/>
1130       <accept Dcore="SC300"/>
1131     </condition>
1132     <condition id="CM4">
1133       <description>Cortex-M4 processor based device</description>
1134       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1135     </condition>
1136     <condition id="CM4_FP">
1137       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1138       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1139       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1140       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1141     </condition>
1142     <condition id="CM7">
1143       <description>Cortex-M7 processor based device</description>
1144       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1145     </condition>
1146     <condition id="CM7_FP">
1147       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1148       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1149       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1150     </condition>
1151     <condition id="CM23">
1152       <description>Cortex-M23 processor based device</description>
1153       <require Dcore="Cortex-M23"/>
1154     </condition>
1155     <condition id="CM33">
1156       <description>Cortex-M33 processor based device</description>
1157       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1158     </condition>
1159     <condition id="CM33_FP">
1160       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1161       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1162     </condition>
1163     <condition id="CM35P">
1164       <description>Cortex-M35P processor based device</description>
1165       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1166     </condition>
1167     <condition id="CM35P_FP">
1168       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1169       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1170     </condition>
1171     <condition id="ARMv8MBL">
1172       <description>Armv8-M Baseline processor based device</description>
1173       <require Dcore="ARMV8MBL"/>
1174     </condition>
1175     <condition id="ARMv8MML">
1176       <description>Armv8-M Mainline processor based device</description>
1177       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1178     </condition>
1179     <condition id="ARMv8MML_FP">
1180       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1181       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1182       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1183     </condition>
1184
1185     <condition id="CM55_NOFPU_NOMVE">
1186       <description>Cortex-M55, no FPU, no MVE</description>
1187       <require Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="NO_MVE"/>
1188     </condition>
1189     <condition id="CM55_NOFPU_MVE">
1190       <description>Cortex-M55, no FPU, MVE</description>
1191       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="MVE"/>
1192       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="FP_MVE"/>
1193     </condition>
1194     <condition id="CM55_FPU">
1195       <description>Cortex-M55, FPU</description>
1196       <accept  Dcore="Cortex-M55" Dfpu="SP_FPU"/>
1197       <accept  Dcore="Cortex-M55" Dfpu="DP_FPU"/>
1198     </condition>
1199
1200     <condition id="CA5_CA9">
1201       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1202       <accept Dcore="Cortex-A5"/>
1203       <accept Dcore="Cortex-A9"/>
1204     </condition>
1205
1206     <condition id="CA7">
1207       <description>Cortex-A7 processor based device</description>
1208       <accept Dcore="Cortex-A7"/>
1209     </condition>
1210
1211     <!-- ARMCC compiler -->
1212     <condition id="CA_ARMCC5">
1213       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1214       <require condition="ARMv7-A Device"/>
1215       <require condition="ARMCC5"/>
1216     </condition>
1217     <condition id="CA_ARMCC6">
1218       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1219       <require condition="ARMv7-A Device"/>
1220       <require condition="ARMCC6"/>
1221     </condition>
1222
1223     <condition id="CM0_ARMCC">
1224       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1225       <require condition="CM0"/>
1226       <require Tcompiler="ARMCC"/>
1227     </condition>
1228     <condition id="CM0_ARMCC5">
1229       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler 5</description>
1230       <require condition="CM0"/>
1231       <require condition="ARMCC5"/>
1232     </condition>
1233     <condition id="CM0_ARMCC6">
1234       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler 6</description>
1235       <require condition="CM0"/>
1236       <require condition="ARMCC6"/>
1237     </condition>
1238     <condition id="CM0_LE_ARMCC">
1239       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1240       <require condition="CM0_ARMCC"/>
1241       <require Dendian="Little-endian"/>
1242     </condition>
1243     <condition id="CM0_BE_ARMCC">
1244       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1245       <require condition="CM0_ARMCC"/>
1246       <require Dendian="Big-endian"/>
1247     </condition>
1248
1249     <condition id="CM1_ARMCC">
1250       <description>Cortex-M1 based device for the Arm Compiler</description>
1251       <require condition="CM1"/>
1252       <require Tcompiler="ARMCC"/>
1253     </condition>
1254     <condition id="CM1_ARMCC5">
1255       <description>Cortex-M1 based device for the Arm Compiler 5</description>
1256       <require condition="CM1"/>
1257       <require condition="ARMCC5"/>
1258     </condition>
1259     <condition id="CM1_ARMCC6">
1260       <description>Cortex-M1 based device for the Arm Compiler 6</description>
1261       <require condition="CM1"/>
1262       <require condition="ARMCC6"/>
1263     </condition>
1264     <condition id="CM1_LE_ARMCC">
1265       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1266       <require condition="CM1_ARMCC"/>
1267       <require Dendian="Little-endian"/>
1268     </condition>
1269     <condition id="CM1_BE_ARMCC">
1270       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1271       <require condition="CM1_ARMCC"/>
1272       <require Dendian="Big-endian"/>
1273     </condition>
1274
1275     <condition id="CM3_ARMCC">
1276       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1277       <require condition="CM3"/>
1278       <require Tcompiler="ARMCC"/>
1279     </condition>
1280     <condition id="CM3_ARMCC5">
1281       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler 5</description>
1282       <require condition="CM3"/>
1283       <require condition="ARMCC5"/>
1284     </condition>
1285     <condition id="CM3_ARMCC6">
1286       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler 6</description>
1287       <require condition="CM3"/>
1288       <require condition="ARMCC6"/>
1289     </condition>
1290     <condition id="CM3_LE_ARMCC">
1291       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1292       <require condition="CM3_ARMCC"/>
1293       <require Dendian="Little-endian"/>
1294     </condition>
1295     <condition id="CM3_BE_ARMCC">
1296       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1297       <require condition="CM3_ARMCC"/>
1298       <require Dendian="Big-endian"/>
1299     </condition>
1300
1301     <condition id="CM4_ARMCC">
1302       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1303       <require condition="CM4"/>
1304       <require Tcompiler="ARMCC"/>
1305     </condition>
1306     <condition id="CM4_ARMCC5">
1307       <description>Cortex-M4 processor based device for the Arm Compiler 5</description>
1308       <require condition="CM4"/>
1309       <require condition="ARMCC5"/>
1310     </condition>
1311     <condition id="CM4_ARMCC6">
1312       <description>Cortex-M4 processor based device for the Arm Compiler 6</description>
1313       <require condition="CM4"/>
1314       <require condition="ARMCC6"/>
1315     </condition>
1316     <condition id="CM4_LE_ARMCC">
1317       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1318       <require condition="CM4_ARMCC"/>
1319       <require Dendian="Little-endian"/>
1320     </condition>
1321     <condition id="CM4_BE_ARMCC">
1322       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1323       <require condition="CM4_ARMCC"/>
1324       <require Dendian="Big-endian"/>
1325     </condition>
1326
1327     <condition id="CM4_FP_ARMCC">
1328       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1329       <require condition="CM4_FP"/>
1330       <require Tcompiler="ARMCC"/>
1331     </condition>
1332     <condition id="CM4_FP_ARMCC5">
1333       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler 5</description>
1334       <require condition="CM4_FP"/>
1335       <require condition="ARMCC5"/>
1336     </condition>
1337     <condition id="CM4_FP_ARMCC6">
1338       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler 6</description>
1339       <require condition="CM4_FP"/>
1340       <require condition="ARMCC6"/>
1341     </condition>
1342     <condition id="CM4_FP_LE_ARMCC">
1343       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1344       <require condition="CM4_FP_ARMCC"/>
1345       <require Dendian="Little-endian"/>
1346     </condition>
1347     <condition id="CM4_FP_BE_ARMCC">
1348       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1349       <require condition="CM4_FP_ARMCC"/>
1350       <require Dendian="Big-endian"/>
1351     </condition>
1352
1353     <condition id="CM7_ARMCC">
1354       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1355       <require condition="CM7"/>
1356       <require Tcompiler="ARMCC"/>
1357     </condition>
1358     <condition id="CM7_ARMCC5">
1359       <description>Cortex-M7 processor based device for the Arm Compiler 5</description>
1360       <require condition="CM7"/>
1361       <require condition="ARMCC5"/>
1362     </condition>
1363     <condition id="CM7_ARMCC6">
1364       <description>Cortex-M7 processor based device for the Arm Compiler 6</description>
1365       <require condition="CM7"/>
1366       <require condition="ARMCC6"/>
1367     </condition>
1368     <condition id="CM7_LE_ARMCC">
1369       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1370       <require condition="CM7_ARMCC"/>
1371       <require Dendian="Little-endian"/>
1372     </condition>
1373     <condition id="CM7_BE_ARMCC">
1374       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1375       <require condition="CM7_ARMCC"/>
1376       <require Dendian="Big-endian"/>
1377     </condition>
1378
1379     <condition id="CM7_FP_ARMCC">
1380       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1381       <require condition="CM7_FP"/>
1382       <require Tcompiler="ARMCC"/>
1383     </condition>
1384     <condition id="CM7_FP_ARMCC5">
1385       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler 5</description>
1386       <require condition="CM7_FP"/>
1387       <require condition="ARMCC5"/>
1388     </condition>
1389     <condition id="CM7_FP_ARMCC6">
1390       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler 6</description>
1391       <require condition="CM7_FP"/>
1392       <require condition="ARMCC6"/>
1393     </condition>
1394     <condition id="CM7_FP_LE_ARMCC">
1395       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1396       <require condition="CM7_FP_ARMCC"/>
1397       <require Dendian="Little-endian"/>
1398     </condition>
1399     <condition id="CM7_FP_BE_ARMCC">
1400       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1401       <require condition="CM7_FP_ARMCC"/>
1402       <require Dendian="Big-endian"/>
1403     </condition>
1404
1405     <condition id="CM23_ARMCC">
1406       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1407       <require condition="CM23"/>
1408       <require Tcompiler="ARMCC"/>
1409     </condition>
1410     <condition id="CM23_LE_ARMCC">
1411       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1412       <require condition="CM23_ARMCC"/>
1413       <require Dendian="Little-endian"/>
1414     </condition>
1415
1416     <condition id="CM33_ARMCC">
1417       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1418       <require condition="CM33"/>
1419       <require Tcompiler="ARMCC"/>
1420     </condition>
1421     <condition id="CM33_LE_ARMCC">
1422       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1423       <require condition="CM33_ARMCC"/>
1424       <require Dendian="Little-endian"/>
1425     </condition>
1426
1427     <condition id="CM33_FP_ARMCC">
1428       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1429       <require condition="CM33_FP"/>
1430       <require Tcompiler="ARMCC"/>
1431     </condition>
1432     <condition id="CM33_FP_LE_ARMCC">
1433       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1434       <require condition="CM33_FP_ARMCC"/>
1435       <require Dendian="Little-endian"/>
1436     </condition>
1437
1438     <condition id="CM35P_ARMCC">
1439       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1440       <require condition="CM35P"/>
1441       <require Tcompiler="ARMCC"/>
1442     </condition>
1443     <condition id="CM35P_LE_ARMCC">
1444       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1445       <require condition="CM35P_ARMCC"/>
1446       <require Dendian="Little-endian"/>
1447     </condition>
1448
1449     <condition id="CM35P_FP_ARMCC">
1450       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1451       <require condition="CM35P_FP"/>
1452       <require Tcompiler="ARMCC"/>
1453     </condition>
1454     <condition id="CM35P_FP_LE_ARMCC">
1455       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1456       <require condition="CM35P_FP_ARMCC"/>
1457       <require Dendian="Little-endian"/>
1458     </condition>
1459
1460     <condition id="CM55_NOFPU_NOMVE_ARMCC">
1461       <description>Cortex-M55 processor, no FPU, no MVE, Arm Compiler</description>
1462       <require condition="CM55_NOFPU_NOMVE"/>
1463       <require Tcompiler="ARMCC"/>
1464     </condition>
1465     <condition id="CM55_NOFPU_MVE_ARMCC">
1466       <description>Cortex-M55 processor, no FPU, MVE, Arm Compiler</description>
1467       <require condition="CM55_NOFPU_MVE"/>
1468       <require Tcompiler="ARMCC"/>
1469     </condition>
1470     <condition id="CM55_FPU_ARMCC">
1471       <description>Cortex-M55 processor, FPU, Arm Compiler</description>
1472       <require condition="CM55_FPU"/>
1473       <require Tcompiler="ARMCC"/>
1474     </condition>
1475     <condition id="CM55_NOFPU_NOMVE_LE_ARMCC">
1476       <description>Cortex-M55 processor, little endian, no FPU, no MVE, Arm Compiler</description>
1477       <require condition="CM55_NOFPU_NOMVE_ARMCC"/>
1478       <require Dendian="Little-endian"/>
1479     </condition>
1480     <condition id="CM55_FPU_LE_ARMCC">
1481       <description>Cortex-M55 processor, little endian, FPU, Arm Compiler</description>
1482       <require condition="CM55_FPU_ARMCC"/>
1483       <require Dendian="Little-endian"/>
1484     </condition>
1485
1486     <condition id="ARMv8MBL_ARMCC">
1487       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1488       <require condition="ARMv8MBL"/>
1489       <require Tcompiler="ARMCC"/>
1490     </condition>
1491     <condition id="ARMv8MBL_LE_ARMCC">
1492       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1493       <require condition="ARMv8MBL_ARMCC"/>
1494       <require Dendian="Little-endian"/>
1495     </condition>
1496
1497     <condition id="ARMv8MML_ARMCC">
1498       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1499       <require condition="ARMv8MML"/>
1500       <require Tcompiler="ARMCC"/>
1501     </condition>
1502     <condition id="ARMv8MML_LE_ARMCC">
1503       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1504       <require condition="ARMv8MML_ARMCC"/>
1505       <require Dendian="Little-endian"/>
1506     </condition>
1507
1508     <condition id="ARMv8MML_FP_ARMCC">
1509       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1510       <require condition="ARMv8MML_FP"/>
1511       <require Tcompiler="ARMCC"/>
1512     </condition>
1513     <condition id="ARMv8MML_FP_LE_ARMCC">
1514       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1515       <require condition="ARMv8MML_FP_ARMCC"/>
1516       <require Dendian="Little-endian"/>
1517     </condition>
1518
1519     <condition id="TZ Secure ARMCC6">
1520       <description>TrustZone (Secure), Arm Compiler</description>
1521       <require condition="TZ Secure"/>
1522       <require condition="ARMCC6"/>
1523     </condition>
1524     <condition id="TZ Non-secure ARMCC6">
1525       <description>TrustZone (Non-secure), Arm Compiler</description>
1526       <require condition="TZ Non-secure"/>
1527       <require condition="ARMCC6"/>
1528     </condition>
1529     <condition id="TZ Unavailable ARMCC6">
1530       <description>TrustZone not available, Arm Compiler</description>
1531       <require condition="TZ Unavailable"/>
1532       <require condition="ARMCC6"/>
1533     </condition>
1534
1535     <!-- GCC compiler -->
1536     <condition id="CA_GCC">
1537       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1538       <require condition="ARMv7-A Device"/>
1539       <require Tcompiler="GCC"/>
1540     </condition>
1541
1542     <condition id="CM0_GCC">
1543       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1544       <require condition="CM0"/>
1545       <require Tcompiler="GCC"/>
1546     </condition>
1547     <condition id="CM0_LE_GCC">
1548       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1549       <require condition="CM0_GCC"/>
1550       <require Dendian="Little-endian"/>
1551     </condition>
1552     <condition id="CM0_BE_GCC">
1553       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1554       <require condition="CM0_GCC"/>
1555       <require Dendian="Big-endian"/>
1556     </condition>
1557
1558     <condition id="CM1_GCC">
1559       <description>Cortex-M1 based device for the GCC Compiler</description>
1560       <require condition="CM1"/>
1561       <require Tcompiler="GCC"/>
1562     </condition>
1563     <condition id="CM1_LE_GCC">
1564       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1565       <require condition="CM1_GCC"/>
1566       <require Dendian="Little-endian"/>
1567     </condition>
1568     <condition id="CM1_BE_GCC">
1569       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1570       <require condition="CM1_GCC"/>
1571       <require Dendian="Big-endian"/>
1572     </condition>
1573
1574     <condition id="CM3_GCC">
1575       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1576       <require condition="CM3"/>
1577       <require Tcompiler="GCC"/>
1578     </condition>
1579     <condition id="CM3_LE_GCC">
1580       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1581       <require condition="CM3_GCC"/>
1582       <require Dendian="Little-endian"/>
1583     </condition>
1584     <condition id="CM3_BE_GCC">
1585       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1586       <require condition="CM3_GCC"/>
1587       <require Dendian="Big-endian"/>
1588     </condition>
1589
1590     <condition id="CM4_GCC">
1591       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1592       <require condition="CM4"/>
1593       <require Tcompiler="GCC"/>
1594     </condition>
1595     <condition id="CM4_LE_GCC">
1596       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1597       <require condition="CM4_GCC"/>
1598       <require Dendian="Little-endian"/>
1599     </condition>
1600     <condition id="CM4_BE_GCC">
1601       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1602       <require condition="CM4_GCC"/>
1603       <require Dendian="Big-endian"/>
1604     </condition>
1605
1606     <condition id="CM4_FP_GCC">
1607       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1608       <require condition="CM4_FP"/>
1609       <require Tcompiler="GCC"/>
1610     </condition>
1611     <condition id="CM4_FP_LE_GCC">
1612       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1613       <require condition="CM4_FP_GCC"/>
1614       <require Dendian="Little-endian"/>
1615     </condition>
1616     <condition id="CM4_FP_BE_GCC">
1617       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1618       <require condition="CM4_FP_GCC"/>
1619       <require Dendian="Big-endian"/>
1620     </condition>
1621
1622     <condition id="CM7_GCC">
1623       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1624       <require condition="CM7"/>
1625       <require Tcompiler="GCC"/>
1626     </condition>
1627     <condition id="CM7_LE_GCC">
1628       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1629       <require condition="CM7_GCC"/>
1630       <require Dendian="Little-endian"/>
1631     </condition>
1632     <condition id="CM7_BE_GCC">
1633       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1634       <require condition="CM7_GCC"/>
1635       <require Dendian="Big-endian"/>
1636     </condition>
1637
1638     <condition id="CM7_FP_GCC">
1639       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1640       <require condition="CM7_FP"/>
1641       <require Tcompiler="GCC"/>
1642     </condition>
1643     <condition id="CM7_FP_LE_GCC">
1644       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1645       <require condition="CM7_FP_GCC"/>
1646       <require Dendian="Little-endian"/>
1647     </condition>
1648     <condition id="CM7_FP_BE_GCC">
1649       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1650       <require condition="CM7_FP_GCC"/>
1651       <require Dendian="Big-endian"/>
1652     </condition>
1653
1654     <condition id="CM23_GCC">
1655       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1656       <require condition="CM23"/>
1657       <require Tcompiler="GCC"/>
1658     </condition>
1659     <condition id="CM23_LE_GCC">
1660       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1661       <require condition="CM23_GCC"/>
1662       <require Dendian="Little-endian"/>
1663     </condition>
1664
1665     <condition id="CM33_GCC">
1666       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1667       <require condition="CM33"/>
1668       <require Tcompiler="GCC"/>
1669     </condition>
1670     <condition id="CM33_LE_GCC">
1671       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1672       <require condition="CM33_GCC"/>
1673       <require Dendian="Little-endian"/>
1674     </condition>
1675
1676     <condition id="CM33_FP_GCC">
1677       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1678       <require condition="CM33_FP"/>
1679       <require Tcompiler="GCC"/>
1680     </condition>
1681     <condition id="CM33_FP_LE_GCC">
1682       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1683       <require condition="CM33_FP_GCC"/>
1684       <require Dendian="Little-endian"/>
1685     </condition>
1686
1687     <condition id="CM35P_GCC">
1688       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1689       <require condition="CM35P"/>
1690       <require Tcompiler="GCC"/>
1691     </condition>
1692     <condition id="CM35P_LE_GCC">
1693       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1694       <require condition="CM35P_GCC"/>
1695       <require Dendian="Little-endian"/>
1696     </condition>
1697
1698     <condition id="CM35P_FP_GCC">
1699       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1700       <require condition="CM35P_FP"/>
1701       <require Tcompiler="GCC"/>
1702     </condition>
1703     <condition id="CM35P_FP_LE_GCC">
1704       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1705       <require condition="CM35P_FP_GCC"/>
1706       <require Dendian="Little-endian"/>
1707     </condition>
1708
1709     <condition id="CM55_NOFPU_NOMVE_GCC">
1710       <description>Cortex-M55 processor, no FPU, no MVE, GCC Compiler</description>
1711       <require condition="CM55_NOFPU_NOMVE"/>
1712       <require Tcompiler="GCC"/>
1713     </condition>
1714     <condition id="CM55_NOFPU_MVE_GCC">
1715       <description>Cortex-M55 processor, no FPU, MVE, GCC Compiler</description>
1716       <require condition="CM55_NOFPU_MVE"/>
1717       <require Tcompiler="GCC"/>
1718     </condition>
1719     <condition id="CM55_FPU_GCC">
1720       <description>Cortex-M55 processor, FPU, GCC Compiler</description>
1721       <require condition="CM55_FPU"/>
1722       <require Tcompiler="GCC"/>
1723     </condition>
1724     <condition id="CM55_NOFPU_NOMVE_LE_GCC">
1725       <description>Cortex-M55 processor, little endian, no FPU, no MVE, GCC Compiler</description>
1726       <require condition="CM55_NOFPU_NOMVE_GCC"/>
1727       <require Dendian="Little-endian"/>
1728     </condition>
1729     <condition id="CM55_FPU_LE_GCC">
1730       <description>Cortex-M55 processor, little endian, FPU, GCC Compiler</description>
1731       <require condition="CM55_FPU_GCC"/>
1732       <require Dendian="Little-endian"/>
1733     </condition>
1734
1735     <condition id="ARMv8MBL_GCC">
1736       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1737       <require condition="ARMv8MBL"/>
1738       <require Tcompiler="GCC"/>
1739     </condition>
1740     <condition id="ARMv8MBL_LE_GCC">
1741       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1742       <require condition="ARMv8MBL_GCC"/>
1743       <require Dendian="Little-endian"/>
1744     </condition>
1745
1746     <condition id="ARMv8MML_GCC">
1747       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1748       <require condition="ARMv8MML"/>
1749       <require Tcompiler="GCC"/>
1750     </condition>
1751     <condition id="ARMv8MML_LE_GCC">
1752       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1753       <require condition="ARMv8MML_GCC"/>
1754       <require Dendian="Little-endian"/>
1755     </condition>
1756
1757     <condition id="ARMv8MML_FP_GCC">
1758       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1759       <require condition="ARMv8MML_FP"/>
1760       <require Tcompiler="GCC"/>
1761     </condition>
1762     <condition id="ARMv8MML_FP_LE_GCC">
1763       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1764       <require condition="ARMv8MML_FP_GCC"/>
1765       <require Dendian="Little-endian"/>
1766     </condition>
1767
1768     <!-- IAR compiler -->
1769     <condition id="CA_IAR">
1770       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1771       <require condition="ARMv7-A Device"/>
1772       <require Tcompiler="IAR"/>
1773     </condition>
1774
1775     <condition id="CM0_IAR">
1776       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1777       <require condition="CM0"/>
1778       <require Tcompiler="IAR"/>
1779     </condition>
1780     <condition id="CM0_LE_IAR">
1781       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1782       <require condition="CM0_IAR"/>
1783       <require Dendian="Little-endian"/>
1784     </condition>
1785     <condition id="CM0_BE_IAR">
1786       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1787       <require condition="CM0_IAR"/>
1788       <require Dendian="Big-endian"/>
1789     </condition>
1790
1791     <condition id="CM1_IAR">
1792       <description>Cortex-M1 based device for the IAR Compiler</description>
1793       <require condition="CM1"/>
1794       <require Tcompiler="IAR"/>
1795     </condition>
1796     <condition id="CM1_LE_IAR">
1797       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1798       <require condition="CM1_IAR"/>
1799       <require Dendian="Little-endian"/>
1800     </condition>
1801     <condition id="CM1_BE_IAR">
1802       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1803       <require condition="CM1_IAR"/>
1804       <require Dendian="Big-endian"/>
1805     </condition>
1806
1807     <condition id="CM3_IAR">
1808       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1809       <require condition="CM3"/>
1810       <require Tcompiler="IAR"/>
1811     </condition>
1812     <condition id="CM3_LE_IAR">
1813       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1814       <require condition="CM3_IAR"/>
1815       <require Dendian="Little-endian"/>
1816     </condition>
1817     <condition id="CM3_BE_IAR">
1818       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1819       <require condition="CM3_IAR"/>
1820       <require Dendian="Big-endian"/>
1821     </condition>
1822
1823     <condition id="CM4_IAR">
1824       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1825       <require condition="CM4"/>
1826       <require Tcompiler="IAR"/>
1827     </condition>
1828     <condition id="CM4_LE_IAR">
1829       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1830       <require condition="CM4_IAR"/>
1831       <require Dendian="Little-endian"/>
1832     </condition>
1833     <condition id="CM4_BE_IAR">
1834       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1835       <require condition="CM4_IAR"/>
1836       <require Dendian="Big-endian"/>
1837     </condition>
1838
1839     <condition id="CM4_FP_IAR">
1840       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1841       <require condition="CM4_FP"/>
1842       <require Tcompiler="IAR"/>
1843     </condition>
1844     <condition id="CM4_FP_LE_IAR">
1845       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1846       <require condition="CM4_FP_IAR"/>
1847       <require Dendian="Little-endian"/>
1848     </condition>
1849     <condition id="CM4_FP_BE_IAR">
1850       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1851       <require condition="CM4_FP_IAR"/>
1852       <require Dendian="Big-endian"/>
1853     </condition>
1854
1855     <condition id="CM7_IAR">
1856       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1857       <require condition="CM7"/>
1858       <require Tcompiler="IAR"/>
1859     </condition>
1860     <condition id="CM7_LE_IAR">
1861       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1862       <require condition="CM7_IAR"/>
1863       <require Dendian="Little-endian"/>
1864     </condition>
1865     <condition id="CM7_BE_IAR">
1866       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1867       <require condition="CM7_IAR"/>
1868       <require Dendian="Big-endian"/>
1869     </condition>
1870
1871     <condition id="CM7_FP_IAR">
1872       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1873       <require condition="CM7_FP"/>
1874       <require Tcompiler="IAR"/>
1875     </condition>
1876     <condition id="CM7_FP_LE_IAR">
1877       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1878       <require condition="CM7_FP_IAR"/>
1879       <require Dendian="Little-endian"/>
1880     </condition>
1881     <condition id="CM7_FP_BE_IAR">
1882       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1883       <require condition="CM7_FP_IAR"/>
1884       <require Dendian="Big-endian"/>
1885     </condition>
1886
1887     <condition id="CM23_IAR">
1888       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1889       <require condition="CM23"/>
1890       <require Tcompiler="IAR"/>
1891     </condition>
1892     <condition id="CM23_LE_IAR">
1893       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1894       <require condition="CM23_IAR"/>
1895       <require Dendian="Little-endian"/>
1896     </condition>
1897
1898     <condition id="CM33_IAR">
1899       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1900       <require condition="CM33"/>
1901       <require Tcompiler="IAR"/>
1902     </condition>
1903     <condition id="CM33_LE_IAR">
1904       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1905       <require condition="CM33_IAR"/>
1906       <require Dendian="Little-endian"/>
1907     </condition>
1908
1909     <condition id="CM33_FP_IAR">
1910       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1911       <require condition="CM33_FP"/>
1912       <require Tcompiler="IAR"/>
1913     </condition>
1914     <condition id="CM33_FP_LE_IAR">
1915       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1916       <require condition="CM33_FP_IAR"/>
1917       <require Dendian="Little-endian"/>
1918     </condition>
1919
1920     <condition id="CM35P_IAR">
1921       <description>Cortex-M35P processor based device for the IAR Compiler</description>
1922       <require condition="CM35P"/>
1923       <require Tcompiler="IAR"/>
1924     </condition>
1925     <condition id="CM35P_LE_IAR">
1926       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
1927       <require condition="CM35P_IAR"/>
1928       <require Dendian="Little-endian"/>
1929     </condition>
1930
1931     <condition id="CM35P_FP_IAR">
1932       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
1933       <require condition="CM35P_FP"/>
1934       <require Tcompiler="IAR"/>
1935     </condition>
1936     <condition id="CM35P_FP_LE_IAR">
1937       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1938       <require condition="CM35P_FP_IAR"/>
1939       <require Dendian="Little-endian"/>
1940     </condition>
1941
1942     <condition id="CM55_NOFPU_NOMVE_IAR">
1943       <description>Cortex-M55 processor, no FPU, no MVE, IAR Compiler</description>
1944       <require condition="CM55_NOFPU_NOMVE"/>
1945       <require Tcompiler="IAR"/>
1946     </condition>
1947     <condition id="CM55_NOFPU_MVE_IAR">
1948       <description>Cortex-M55 processor, no FPU, MVE, IAR Compiler</description>
1949       <require condition="CM55_NOFPU_MVE"/>
1950       <require Tcompiler="IAR"/>
1951     </condition>
1952     <condition id="CM55_FPU_IAR">
1953       <description>Cortex-M55 processor, FPU, IAR Compiler</description>
1954       <require condition="CM55_FPU"/>
1955       <require Tcompiler="IAR"/>
1956     </condition>
1957     <condition id="CM55_NOFPU_NOMVE_LE_IAR">
1958       <description>Cortex-M55 processor, little endian, no FPU, no MVE, IAR Compiler</description>
1959       <require condition="CM55_NOFPU_NOMVE_IAR"/>
1960       <require Dendian="Little-endian"/>
1961     </condition>
1962     <condition id="CM55_FPU_LE_IAR">
1963       <description>Cortex-M55 processor, little endian, FPU, IAR Compiler</description>
1964       <require condition="CM55_FPU_IAR"/>
1965       <require Dendian="Little-endian"/>
1966     </condition>
1967
1968     <condition id="ARMv8MBL_IAR">
1969       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1970       <require condition="ARMv8MBL"/>
1971       <require Tcompiler="IAR"/>
1972     </condition>
1973     <condition id="ARMv8MBL_LE_IAR">
1974       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1975       <require condition="ARMv8MBL_IAR"/>
1976       <require Dendian="Little-endian"/>
1977     </condition>
1978
1979     <condition id="ARMv8MML_IAR">
1980       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1981       <require condition="ARMv8MML"/>
1982       <require Tcompiler="IAR"/>
1983     </condition>
1984     <condition id="ARMv8MML_LE_IAR">
1985       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1986       <require condition="ARMv8MML_IAR"/>
1987       <require Dendian="Little-endian"/>
1988     </condition>
1989
1990     <condition id="ARMv8MML_FP_IAR">
1991       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1992       <require condition="ARMv8MML_FP"/>
1993       <require Tcompiler="IAR"/>
1994     </condition>
1995     <condition id="ARMv8MML_FP_LE_IAR">
1996       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1997       <require condition="ARMv8MML_FP_IAR"/>
1998       <require Dendian="Little-endian"/>
1999     </condition>
2000
2001     <!-- conditions selecting single devices and CMSIS Core -->
2002     <condition id="ARMCM0 CMSIS">
2003       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2004       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2005       <require Cclass="CMSIS" Cgroup="CORE"/>
2006     </condition>
2007
2008     <condition id="ARMCM0+ CMSIS">
2009       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2010       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2011       <require Cclass="CMSIS" Cgroup="CORE"/>
2012     </condition>
2013
2014     <condition id="ARMCM1 CMSIS">
2015       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2016       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2017       <require Cclass="CMSIS" Cgroup="CORE"/>
2018     </condition>
2019
2020     <condition id="ARMCM3 CMSIS">
2021       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2022       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2023       <require Cclass="CMSIS" Cgroup="CORE"/>
2024     </condition>
2025
2026     <condition id="ARMCM4 CMSIS">
2027       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2028       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2029       <require Cclass="CMSIS" Cgroup="CORE"/>
2030     </condition>
2031
2032     <condition id="ARMCM7 CMSIS">
2033       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2034       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2035       <require Cclass="CMSIS" Cgroup="CORE"/>
2036     </condition>
2037
2038     <condition id="ARMCM23 CMSIS">
2039       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2040       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2041       <require Cclass="CMSIS" Cgroup="CORE"/>
2042     </condition>
2043
2044     <condition id="ARMCM33 CMSIS">
2045       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2046       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2047       <require Cclass="CMSIS" Cgroup="CORE"/>
2048     </condition>
2049
2050     <condition id="ARMCM35P CMSIS">
2051       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2052       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2053       <require Cclass="CMSIS" Cgroup="CORE"/>
2054     </condition>
2055
2056     <condition id="ARMCM55 CMSIS">
2057       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2058       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2059       <require Cclass="CMSIS" Cgroup="CORE"/>
2060     </condition>
2061
2062     <condition id="ARMSC000 CMSIS">
2063       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2064       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2065       <require Cclass="CMSIS" Cgroup="CORE"/>
2066     </condition>
2067
2068     <condition id="ARMSC300 CMSIS">
2069       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2070       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2071       <require Cclass="CMSIS" Cgroup="CORE"/>
2072     </condition>
2073
2074     <condition id="ARMv8MBL CMSIS">
2075       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2076       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2077       <require Cclass="CMSIS" Cgroup="CORE"/>
2078     </condition>
2079
2080     <condition id="ARMv8MML CMSIS">
2081       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2082       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2083       <require Cclass="CMSIS" Cgroup="CORE"/>
2084     </condition>
2085
2086     <condition id="ARMv81MML CMSIS">
2087       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2088       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2089       <require Cclass="CMSIS" Cgroup="CORE"/>
2090     </condition>
2091
2092     <condition id="ARMCA5 CMSIS">
2093       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2094       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2095       <require Cclass="CMSIS" Cgroup="CORE"/>
2096     </condition>
2097
2098     <condition id="ARMCA7 CMSIS">
2099       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2100       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2101       <require Cclass="CMSIS" Cgroup="CORE"/>
2102     </condition>
2103
2104     <condition id="ARMCA9 CMSIS">
2105       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2106       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2107       <require Cclass="CMSIS" Cgroup="CORE"/>
2108     </condition>
2109
2110     <!-- CMSIS DSP -->
2111     <condition id="CMSIS DSP">
2112       <description>Components required for DSP</description>
2113       <require condition="ARMv6_7_8-M Device"/>
2114       <require condition="ARMCC GCC IAR"/>
2115       <require Cclass="CMSIS" Cgroup="CORE"/>
2116     </condition>
2117
2118     <!-- CMSIS NN -->
2119     <condition id="CMSIS NN">
2120       <description>Components required for NN</description>
2121       <require Cclass="CMSIS" Cgroup="DSP"/>
2122     </condition>
2123
2124     <!-- RTOS RTX -->
2125     <condition id="RTOS RTX">
2126       <description>Components required for RTOS RTX</description>
2127       <require condition="ARMv6_7-M Device"/>
2128       <require condition="ARMCC GCC IAR"/>
2129       <require Cclass="Device" Cgroup="Startup"/>
2130       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2131     </condition>
2132     <condition id="RTOS RTX IFX">
2133       <description>Components required for RTOS RTX IFX</description>
2134       <require condition="ARMv6_7-M Device"/>
2135       <require condition="ARMCC GCC IAR"/>
2136       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2137       <require Cclass="Device" Cgroup="Startup"/>
2138       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2139     </condition>
2140     <condition id="RTOS RTX5">
2141       <description>Components required for RTOS RTX5</description>
2142       <require condition="ARMv6_7_8-M Device"/>
2143       <require condition="ARMCC GCC IAR"/>
2144       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2145     </condition>
2146     <condition id="RTOS2 RTX5">
2147       <description>Components required for RTOS2 RTX5</description>
2148       <require condition="ARMv6_7_8-M Device"/>
2149       <require condition="ARMCC GCC IAR"/>
2150       <require Cclass="CMSIS"  Cgroup="CORE"/>
2151       <require Cclass="Device" Cgroup="Startup"/>
2152     </condition>
2153     <condition id="RTOS2 RTX5 v7-A">
2154       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2155       <require condition="ARMv7-A Device"/>
2156       <require condition="ARMCC GCC IAR"/>
2157       <require Cclass="CMSIS"  Cgroup="CORE"/>
2158       <require Cclass="Device" Cgroup="Startup"/>
2159       <require Cclass="Device" Cgroup="OS Tick"/>
2160       <require Cclass="Device" Cgroup="IRQ Controller"/>
2161     </condition>
2162     <condition id="RTOS2 RTX5 NS">
2163       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2164       <require condition="ARMv8-M Device"/>
2165       <require condition="TZ Non-secure"/>
2166       <require condition="ARMCC GCC IAR"/>
2167       <require Cclass="CMSIS"  Cgroup="CORE"/>
2168       <require Cclass="Device" Cgroup="Startup"/>
2169     </condition>
2170
2171     <!-- OS Tick -->
2172     <condition id="OS Tick PTIM">
2173       <description>Components required for OS Tick Private Timer</description>
2174       <require condition="CA5_CA9"/>
2175       <require Cclass="Device" Cgroup="IRQ Controller"/>
2176     </condition>
2177
2178     <condition id="OS Tick GTIM">
2179       <description>Components required for OS Tick Generic Physical Timer</description>
2180       <require condition="CA7"/>
2181       <require Cclass="Device" Cgroup="IRQ Controller"/>
2182     </condition>
2183
2184   </conditions>
2185
2186   <components>
2187     <!-- CMSIS-Core component -->
2188     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.5.0"  condition="ARMv6_7_8-M Device" >
2189       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2190       <files>
2191         <!-- CPU independent -->
2192         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2193         <file category="include" name="CMSIS/Core/Include/"/>
2194         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
2195         <!-- Code template -->
2196         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2197         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2198       </files>
2199     </component>
2200
2201     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.2.1"  condition="ARMv7-A Device" >
2202       <description>CMSIS-CORE for Cortex-A</description>
2203       <files>
2204         <!-- CPU independent -->
2205         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2206         <file category="include" name="CMSIS/Core_A/Include/"/>
2207       </files>
2208     </component>
2209
2210     <!-- CMSIS-Startup components -->
2211     <!-- Cortex-M0 -->
2212     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS" isDefaultVariant="true">
2213       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2214       <files>
2215         <!-- include folder / device header file -->
2216         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2217         <!-- startup / system file -->
2218         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
2219         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2220         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2221         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2222         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2223       </files>
2224     </component>
2225     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2226       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2227       <files>
2228         <!-- include folder / device header file -->
2229         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2230         <!-- startup / system file -->
2231         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2232         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.2.0" attr="config" condition="GCC"/>
2233         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2234         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2235         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2236       </files>
2237     </component>
2238
2239     <!-- Cortex-M0+ -->
2240     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS" isDefaultVariant="true">
2241       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2242       <files>
2243         <!-- include folder / device header file -->
2244         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2245         <!-- startup / system file -->
2246         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
2247         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2248         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2249         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
2250         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2251       </files>
2252     </component>
2253     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM0+ CMSIS">
2254       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2255       <files>
2256         <!-- include folder / device header file -->
2257         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2258         <!-- startup / system file -->
2259         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2260         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.2.0" attr="config" condition="GCC"/>
2261         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
2262         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2263         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2264       </files>
2265     </component>
2266
2267     <!-- Cortex-M1 -->
2268     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS" isDefaultVariant="true">
2269       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2270       <files>
2271         <!-- include folder / device header file -->
2272         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2273         <!-- startup / system file -->
2274         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
2275         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2276         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2277         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2278         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2279       </files>
2280     </component>
2281     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2282       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2283       <files>
2284         <!-- include folder / device header file -->
2285         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2286         <!-- startup / system file -->
2287         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2288         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.2.0" attr="config" condition="GCC"/>
2289         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2290         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2291         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2292       </files>
2293     </component>
2294
2295     <!-- Cortex-M3 -->
2296     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="true">
2297       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2298       <files>
2299         <!-- include folder / device header file -->
2300         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2301         <!-- startup / system file -->
2302         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
2303         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2304         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2305         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2306         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2307       </files>
2308     </component>
2309     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2310       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2311       <files>
2312         <!-- include folder / device header file -->
2313         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2314         <!-- startup / system file -->
2315         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2316         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.2.0" attr="config" condition="GCC"/>
2317         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2318         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2319         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2320       </files>
2321     </component>
2322
2323     <!-- Cortex-M4 -->
2324     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS" isDefaultVariant="true">
2325       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2326       <files>
2327         <!-- include folder / device header file -->
2328         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2329         <!-- startup / system file -->
2330         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
2331         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2332         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2333         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2334        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2335       </files>
2336     </component>
2337     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2338       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2339       <files>
2340         <!-- include folder / device header file -->
2341         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2342         <!-- startup / system file -->
2343         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2344         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.2.0" attr="config" condition="GCC"/>
2345         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2346         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2347         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2348       </files>
2349     </component>
2350
2351     <!-- Cortex-M7 -->
2352     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS" isDefaultVariant="true">
2353       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2354       <files>
2355         <!-- include folder / device header file -->
2356         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2357         <!-- startup / system file -->
2358         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
2359         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2360         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2361         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2362         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2363       </files>
2364     </component>
2365     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2366       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2367       <files>
2368         <!-- include folder / device header file -->
2369         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2370         <!-- startup / system file -->
2371         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2372         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.2.0" attr="config" condition="GCC"/>
2373         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2374         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2375         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2376       </files>
2377     </component>
2378
2379     <!-- Cortex-M23 -->
2380     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM23 CMSIS" isDefaultVariant="true">
2381       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2382       <files>
2383         <!-- include folder / device header file -->
2384         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2385         <!-- startup / system file -->
2386         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"             version="2.1.0" attr="config"/>
2387         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2388         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2389         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2390         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2391         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2392         <!-- SAU configuration -->
2393         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2394       </files>
2395     </component>
2396     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM23 CMSIS">
2397       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2398       <files>
2399         <!-- include folder / device header file -->
2400         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2401         <!-- startup / system file -->
2402         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2403         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2404         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2405         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2406         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S"         version="2.2.0" attr="config" condition="GCC"/>
2407         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2408         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.1.0" attr="config" condition="IAR"/>
2409         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2410         <!-- SAU configuration -->
2411         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2412       </files>
2413     </component>
2414
2415     <!-- Cortex-M33 -->
2416     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM33 CMSIS" isDefaultVariant="true">
2417       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2418       <files>
2419         <!-- include folder / device header file -->
2420         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2421         <!-- startup / system file -->
2422         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.1.0" attr="config"/>
2423         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2424         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2425         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2426         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2427         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2428         <!-- SAU configuration -->
2429         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2430       </files>
2431     </component>
2432     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM33 CMSIS">
2433       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2434       <files>
2435         <!-- include folder / device header file -->
2436         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2437         <!-- startup / system file -->
2438         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2439         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2440         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2441         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2442         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.3.0" attr="config" condition="GCC"/>
2443         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2444         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.1.0" attr="config" condition="IAR"/>
2445         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2446         <!-- SAU configuration -->
2447         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2448       </files>
2449     </component>
2450
2451     <!-- Cortex-M35P -->
2452     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM35P CMSIS" isDefaultVariant="true">
2453       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2454       <files>
2455         <!-- include folder / device header file -->
2456         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2457         <!-- startup / system file -->
2458         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.1.0" attr="config"/>
2459         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2460         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2461         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2462         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2463         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2464         <!-- SAU configuration -->
2465         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2466       </files>
2467     </component>
2468     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM35P CMSIS">
2469       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2470       <files>
2471         <!-- include folder / device header file -->
2472         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2473         <!-- startup / system file -->
2474         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2475         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2476         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2477         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2478         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.3.0" attr="config" condition="GCC"/>
2479         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2480         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.1.0" attr="config" condition="IAR"/>
2481         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2482         <!-- SAU configuration -->
2483         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2484       </files>
2485     </component>
2486
2487     <!-- Cortex-M55 -->
2488     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM55 CMSIS" isDefaultVariant="true">
2489       <description>System and Startup for Generic Cortex-M55 device</description>
2490       <files>
2491         <!-- include folder / device header file -->
2492         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2493         <!-- startup / system file -->
2494         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.1.0" attr="config"/>
2495         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2496         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2497         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2498         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2499         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.0.1" attr="config"/>
2500         <!-- SAU configuration -->
2501         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2502       </files>
2503     </component>
2504
2505     <!-- Cortex-SC000 -->
2506     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS" isDefaultVariant="true">
2507       <description>System and Startup for Generic Arm SC000 device</description>
2508       <files>
2509         <!-- include folder / device header file -->
2510         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2511         <!-- startup / system file -->
2512         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
2513         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2514         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2515         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2516         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2517       </files>
2518     </component>
2519     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2520       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2521       <files>
2522         <!-- include folder / device header file -->
2523         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2524         <!-- startup / system file -->
2525         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2526         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.2.0" attr="config" condition="GCC"/>
2527         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2528         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2529         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2530       </files>
2531     </component>
2532
2533     <!-- Cortex-SC300 -->
2534     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS" isDefaultVariant="true">
2535       <description>System and Startup for Generic Arm SC300 device</description>
2536       <files>
2537         <!-- include folder / device header file -->
2538         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2539         <!-- startup / system file -->
2540         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
2541         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2542         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2543         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2544         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2545       </files>
2546     </component>
2547     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2548       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2549       <files>
2550         <!-- include folder / device header file -->
2551         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2552         <!-- startup / system file -->
2553         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2554         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.2.0" attr="config" condition="GCC"/>
2555         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2556         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2557         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2558       </files>
2559     </component>
2560
2561     <!-- ARMv8MBL -->
2562     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MBL CMSIS" isDefaultVariant="true">
2563       <description>System and Startup for Generic Armv8-M Baseline device</description>
2564       <files>
2565         <!-- include folder / device header file -->
2566         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2567         <!-- startup / system file -->
2568         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"             version="2.1.0" attr="config"/>
2569         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2570         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2571         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2572         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2573         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2574         <!-- SAU configuration -->
2575         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2576       </files>
2577     </component>
2578     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMv8MBL CMSIS">
2579       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2580       <files>
2581         <!-- include folder / device header file -->
2582         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2583         <!-- startup / system file -->
2584         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2585         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2586         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2587         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2588         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S"         version="2.2.0" attr="config" condition="GCC"/>
2589         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2590         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2591         <!-- SAU configuration -->
2592         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2593       </files>
2594     </component>
2595
2596     <!-- ARMv8MML -->
2597     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MML CMSIS" isDefaultVariant="true">
2598       <description>System and Startup for Generic Armv8-M Mainline device</description>
2599       <files>
2600         <!-- include folder / device header file -->
2601         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2602         <!-- startup / system file -->
2603         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.1.0" attr="config"/>
2604         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2605         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2606         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2607         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2608         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2609         <!-- SAU configuration -->
2610         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2611       </files>
2612     </component>
2613     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMv8MML CMSIS">
2614       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2615       <files>
2616         <!-- include folder / device header file -->
2617         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2618         <!-- startup / system file -->
2619         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S"         version="2.0.0" attr="config" condition="ARMCC6"/>
2620         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2621         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2622         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2623         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.3.0" attr="config" condition="GCC"/>
2624         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2625         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2626         <!-- SAU configuration -->
2627         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2628       </files>
2629     </component>
2630
2631     <!-- ARMv81MML -->
2632     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.2.0" condition="ARMv81MML CMSIS" isDefaultVariant="true">
2633       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2634       <files>
2635         <!-- include folder / device header file -->
2636         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2637         <!-- startup / system file -->
2638         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.1.0" attr="config"/>
2639         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2640         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2641         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2642         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.2.0" attr="config" condition="GCC"/>
2643         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
2644         <!-- SAU configuration -->
2645         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
2646       </files>
2647     </component>
2648
2649     <!-- Cortex-A5 -->
2650     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA5 CMSIS">
2651       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2652       <files>
2653         <!-- include folder / device header file -->
2654         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2655         <!-- startup / system / mmu files -->
2656         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2657         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2658         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2659         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2660         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.1" attr="config" condition="GCC"/>
2661         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2662         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2663         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2664         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2665         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2666         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2667         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2668
2669       </files>
2670     </component>
2671
2672     <!-- Cortex-A7 -->
2673     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA7 CMSIS">
2674       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2675       <files>
2676         <!-- include folder / device header file -->
2677         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2678         <!-- startup / system / mmu files -->
2679         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2680         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2681         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2682         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2683         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.1" attr="config" condition="GCC"/>
2684         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2685         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2686         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2687         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2688         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2689         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2690         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2691       </files>
2692     </component>
2693
2694     <!-- Cortex-A9 -->
2695     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.2" condition="ARMCA9 CMSIS">
2696       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2697       <files>
2698         <!-- include folder / device header file -->
2699         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2700         <!-- startup / system / mmu files -->
2701         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2702         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2703         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2704         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2705         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.1" attr="config" condition="GCC"/>
2706         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2707         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2708         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2709         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2710         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2711         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2712         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2713       </files>
2714     </component>
2715
2716     <!-- IRQ Controller -->
2717     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2718       <description>IRQ Controller implementation using GIC</description>
2719       <files>
2720         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2721       </files>
2722     </component>
2723
2724     <!-- OS Tick -->
2725     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2726       <description>OS Tick implementation using Private Timer</description>
2727       <files>
2728         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2729       </files>
2730     </component>
2731
2732     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2733       <description>OS Tick implementation using Generic Physical Timer</description>
2734       <files>
2735         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2736       </files>
2737     </component>
2738
2739     <!-- CMSIS-DSP component -->
2740     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.10.0-dev" isDefaultVariant="true" condition="CMSIS DSP">
2741       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2742       <files>
2743         <!-- CPU independent -->
2744         <file category="doc"      name="CMSIS/Documentation/DSP/html/index.html"/>
2745         <file category="header"   name="CMSIS/DSP/Include/arm_math.h"/>
2746         <file category="header"   name="CMSIS/DSP/Include/arm_math_f16.h"/>
2747         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables.h"/>
2748         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables_f16.h"/>
2749         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs.h"/>
2750         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs_f16.h"/>
2751
2752         <file category="include"  name="CMSIS/DSP/PrivateInclude/"/>
2753         <file category="include"  name="CMSIS/DSP/Include/"/>
2754
2755         <!-- DSP sources (core) -->
2756         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
2757
2758         <file category="source"   name="CMSIS/DSP/Source/QuaternionMathFunctions/QuaternionMathFunctions.c"/>
2759
2760         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
2761         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
2762         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
2763         <file category="source"   name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
2764         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
2765         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
2766         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
2767         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
2768         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
2769         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
2770         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
2771         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
2772
2773         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctions.c"/>
2774
2775         <!-- DSP sources F16 versions -->
2776         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.c"/>
2777         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c"/>
2778         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.c"/>
2779         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTablesF16.c"/>
2780         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctionsF16.c"/>
2781         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctionsF16.c"/>
2782         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.c"/>
2783         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c"/>
2784         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctionsF16.c"/>
2785         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctionsF16.c"/>
2786         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctionsF16.c"/>
2787         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctionsF16.c"/>
2788         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctionsF16.c"/>
2789
2790         <!-- Compute Library for Cortex-A -->
2791         <file category="header"   name="CMSIS/DSP/ComputeLibrary/Include/NEMath.h"        condition="ARMv7-A Device"/>
2792         <file category="source"   name="CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c"  condition="ARMv7-A Device"/>
2793       </files>
2794     </component>
2795
2796     <!-- CMSIS-NN component -->
2797     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="3.0.0" condition="CMSIS NN">
2798       <description>CMSIS-NN Neural Network Library</description>
2799       <files>
2800         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2801         <file category="header" name="CMSIS/NN/Include/arm_nn_types.h"/>
2802         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2803         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
2804         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
2805
2806         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2807         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2808         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2809         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
2810         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
2811         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
2812         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c"/>
2813         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2814         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.c"/>
2815         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2816         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2817         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
2818         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
2819         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_fast_s16.c"/>
2820         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
2821         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
2822         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s16.c"/>
2823         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
2824         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
2825         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2826         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2827         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
2828         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c"/>
2829         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s16.c"/>
2830         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2831         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2832         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
2833         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
2834         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2835         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
2836         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
2837         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
2838         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
2839         <file category="source" name="CMSIS/NN/Source/SVDFunctions/arm_svdf_s8.c"/>
2840         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
2841         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
2842         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2843         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
2844         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
2845         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
2846         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2847         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2848         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2849         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2850         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
2851         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
2852         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2853         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
2854         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s16.c"/>
2855         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c"/>
2856         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
2857         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
2858         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
2859         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_kernel_s16.c"/>
2860         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.c"/>
2861         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
2862         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
2863         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2864         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c"/>
2865         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2866         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
2867         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
2868         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
2869         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
2870         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s16.c"/>
2871         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2872         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2873         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2874         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2875         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2876         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2877         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2878         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
2879         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
2880         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2881         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
2882       </files>
2883     </component>
2884
2885     <!-- CMSIS-RTOS Keil RTX component -->
2886     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2887       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2888       <RTE_Components_h>
2889         <!-- the following content goes into file 'RTE_Components.h' -->
2890         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2891         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2892       </RTE_Components_h>
2893       <files>
2894         <!-- CPU independent -->
2895         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2896         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2897         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2898
2899         <!-- RTX templates -->
2900         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2901         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2902         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2903         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2904         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2905         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2906         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2907         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2908         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2909         <!-- tool-chain specific template file -->
2910         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2911         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2912         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2913
2914         <!-- CPU and Compiler dependent -->
2915         <!-- ARMCC -->
2916         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2917         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2918         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2919         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2920         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2921         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2922         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2923         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2924         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2925         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2926         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2927         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2928         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2929         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2930         <!-- GCC -->
2931         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2932         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2933         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2934         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2935         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2936         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2937         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2938         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2939         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2940         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2941         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2942         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2943         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2944         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2945         <!-- IAR -->
2946         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2947         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2948         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2949         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2950         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2951         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2952         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2953         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2954         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2955         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2956         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2957         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2958         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2959         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2960       </files>
2961     </component>
2962     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2963     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
2964       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2965       <RTE_Components_h>
2966         <!-- the following content goes into file 'RTE_Components.h' -->
2967         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2968         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2969       </RTE_Components_h>
2970       <files>
2971         <!-- CPU independent -->
2972         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2973         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2974         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2975
2976         <!-- RTX templates -->
2977         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2978         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2979         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2980         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2981         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2982         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2983         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2984         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2985         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2986         <!-- tool-chain specific template file -->
2987         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2988         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2989         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2990
2991         <!-- CPU and Compiler dependent -->
2992         <!-- ARMCC -->
2993         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2994         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2995         <!-- GCC -->
2996         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2997         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2998         <!-- IAR -->
2999       </files>
3000     </component>
3001
3002     <!-- CMSIS-RTOS Keil RTX5 component -->
3003     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.3" Capiversion="1.0.0" condition="RTOS RTX5">
3004       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3005       <RTE_Components_h>
3006         <!-- the following content goes into file 'RTE_Components.h' -->
3007         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3008         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3009       </RTE_Components_h>
3010       <files>
3011         <!-- RTX header file -->
3012         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3013         <!-- RTX compatibility module for API V1 -->
3014         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3015       </files>
3016     </component>
3017
3018     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3019     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5">
3020       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
3021       <RTE_Components_h>
3022         <!-- the following content goes into file 'RTE_Components.h' -->
3023         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3024         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3025       </RTE_Components_h>
3026       <files>
3027         <!-- RTX documentation -->
3028         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3029
3030         <!-- RTX header files -->
3031         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3032
3033         <!-- RTX configuration -->
3034         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3035         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3036
3037         <!-- RTX templates -->
3038         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3039         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3040         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3041         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3042         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3043         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3044         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3045         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3046         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3047         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3048
3049         <!-- RTX library configuration -->
3050         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3051
3052         <!-- RTX libraries (CPU and Compiler dependent) -->
3053         <!-- ARMCC -->
3054         <file category="library" condition="CM0_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3055         <file category="library" condition="CM1_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3056         <file category="library" condition="CM3_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3057         <file category="library" condition="CM4_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3058         <file category="library" condition="CM4_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3059         <file category="library" condition="CM7_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3060         <file category="library" condition="CM7_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3061         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3062         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3063         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3064         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3065         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3066         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3067         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3068         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3069         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3070         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3071         <!-- GCC -->
3072         <file category="library" condition="CM0_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3073         <file category="library" condition="CM1_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3074         <file category="library" condition="CM3_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3075         <file category="library" condition="CM4_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3076         <file category="library" condition="CM4_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3077         <file category="library" condition="CM7_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3078         <file category="library" condition="CM7_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3079         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3080         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3081         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3082         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3083         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3084         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3085         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3086         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3087         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3088         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3089         <!-- IAR -->
3090         <file category="library" condition="CM0_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3091         <file category="library" condition="CM1_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3092         <file category="library" condition="CM3_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3093         <file category="library" condition="CM4_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3094         <file category="library" condition="CM4_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3095         <file category="library" condition="CM7_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3096         <file category="library" condition="CM7_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3097         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3098         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3099         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3100         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3101         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3102         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3103         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3104         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3105         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3106         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3107       </files>
3108     </component>
3109     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3110       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
3111       <RTE_Components_h>
3112         <!-- the following content goes into file 'RTE_Components.h' -->
3113         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3114         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3115         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3116       </RTE_Components_h>
3117       <files>
3118         <!-- RTX documentation -->
3119         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3120
3121         <!-- RTX header files -->
3122         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3123
3124         <!-- RTX configuration -->
3125         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3126         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3127
3128         <!-- RTX templates -->
3129         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3130         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3131         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3132         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3133         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3134         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3135         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3136         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3137         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3138         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3139
3140         <!-- RTX library configuration -->
3141         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3142
3143         <!-- RTX libraries (CPU and Compiler dependent) -->
3144         <!-- ARMCC -->
3145         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3146         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3147         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3148         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3149         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3150         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3151         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3152         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3153         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3154         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3155         <!-- GCC -->
3156         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3157         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3158         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3159         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3160         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3161         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3162         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3163         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3164         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3165         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3166         <!-- IAR -->
3167         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3168         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3169         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3170         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3171         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3172         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3173         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3174         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3175         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3176         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3177       </files>
3178     </component>
3179     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5">
3180       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
3181       <RTE_Components_h>
3182         <!-- the following content goes into file 'RTE_Components.h' -->
3183         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3184         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3185         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3186       </RTE_Components_h>
3187       <files>
3188         <!-- RTX documentation -->
3189         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3190
3191         <!-- RTX header files -->
3192         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3193
3194         <!-- RTX configuration -->
3195         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3196         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3197
3198         <!-- RTX templates -->
3199         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3200         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3201         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3202         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3203         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3204         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3205         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3206         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3207         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3208         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3209
3210         <!-- RTX sources (core) -->
3211         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3212         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3213         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3214         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3215         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3216         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3217         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3218         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3219         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3220         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3221         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3222         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3223         <!-- RTX sources (library configuration) -->
3224         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3225         <!-- RTX sources (handlers ARMCC) -->
3226         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="CM0_ARMCC5"/>
3227         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM0_ARMCC6"/>
3228         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="CM1_ARMCC5"/>
3229         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM1_ARMCC6"/>
3230         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM3_ARMCC5"/>
3231         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM3_ARMCC6"/>
3232         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM4_ARMCC5"/>
3233         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_ARMCC6"/>
3234         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM4_FP_ARMCC5"/>
3235         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_FP_ARMCC6"/>
3236         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM7_ARMCC5"/>
3237         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_ARMCC6"/>
3238         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM7_FP_ARMCC5"/>
3239         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_FP_ARMCC6"/>
3240         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_ARMCC"/>
3241         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_ARMCC"/>
3242         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_ARMCC"/>
3243         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_ARMCC"/>
3244         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_ARMCC"/>
3245         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3246         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3247         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3248         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_ARMCC"/>
3249         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_ARMCC"/>
3250         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_ARMCC"/>
3251         <!-- RTX sources (handlers GCC) -->
3252         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM0_GCC"/>
3253         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM1_GCC"/>
3254         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM3_GCC"/>
3255         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_GCC"/>
3256         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_FP_GCC"/>
3257         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_GCC"/>
3258         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_FP_GCC"/>
3259         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3260         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3261         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3262         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3263         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3264         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3265         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3266         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3267         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3268         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3269         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3270         <!-- RTX sources (handlers IAR) -->
3271         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="CM0_IAR"/>
3272         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="CM1_IAR"/>
3273         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM3_IAR"/>
3274         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM4_IAR"/>
3275         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM4_FP_IAR"/>
3276         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM7_IAR"/>
3277         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM7_FP_IAR"/>
3278         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3279         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3280         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3281         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3282         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3283         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3284         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3285         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3286         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3287         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3288         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3289         <!-- OS Tick (SysTick) -->
3290         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3291       </files>
3292     </component>
3293     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3294       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3295       <RTE_Components_h>
3296         <!-- the following content goes into file 'RTE_Components.h' -->
3297         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3298         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3299         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3300       </RTE_Components_h>
3301       <files>
3302         <!-- RTX documentation -->
3303         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3304
3305         <!-- RTX header files -->
3306         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3307
3308         <!-- RTX configuration -->
3309         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3310         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3311
3312         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3313
3314         <!-- RTX templates -->
3315         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3316         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3317         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3318         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3319         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3320         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3321         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3322         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3323         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3324         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3325
3326         <!-- RTX sources (core) -->
3327         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3328         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3329         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3330         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3331         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3332         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3333         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3334         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3335         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3336         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3337         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3338         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3339         <!-- RTX sources (library configuration) -->
3340         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3341         <!-- RTX sources (handlers ARMCC) -->
3342         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7a.s" condition="CA_ARMCC5"/>
3343         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="CA_ARMCC6"/>
3344         <!-- RTX sources (handlers GCC) -->
3345         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="CA_GCC"/>
3346         <!-- RTX sources (handlers IAR) -->
3347         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7a.s" condition="CA_IAR"/>
3348       </files>
3349     </component>
3350     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3351       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
3352       <RTE_Components_h>
3353         <!-- the following content goes into file 'RTE_Components.h' -->
3354         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3355         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3356         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3357         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3358       </RTE_Components_h>
3359       <files>
3360         <!-- RTX documentation -->
3361         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3362
3363         <!-- RTX header files -->
3364         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3365
3366         <!-- RTX configuration -->
3367         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3368         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3369
3370         <!-- RTX templates -->
3371         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3372         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3373         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3374         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3375         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3376         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3377         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3378         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3379         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3380         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3381
3382         <!-- RTX sources (core) -->
3383         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3384         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3385         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3386         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3387         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3388         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3389         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3390         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3391         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3392         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3393         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3394         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3395         <!-- RTX sources (library configuration) -->
3396         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3397         <!-- RTX sources (ARMCC handlers) -->
3398         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_ARMCC"/>
3399         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_ARMCC"/>
3400         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_ARMCC"/>
3401         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_ARMCC"/>
3402         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_ARMCC"/>
3403         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3404         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3405         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3406         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_ARMCC"/>
3407         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_ARMCC"/>
3408         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_ARMCC"/>
3409         <!-- RTX sources (GCC handlers) -->
3410         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3411         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3412         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3413         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3414         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3415         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3416         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3417         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3418         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3419         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3420         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3421         <!-- RTX sources (IAR handlers) -->
3422         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3423         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3424         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3425         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3426         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3427         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3428         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3429         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3430         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3431         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3432         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3433         <!-- OS Tick (SysTick) -->
3434         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3435       </files>
3436     </component>
3437
3438     <!-- CMSIS-Driver Custom components -->
3439     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3440       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3441       <files>
3442         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3443         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3444       </files>
3445     </component>
3446     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3447       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3448       <files>
3449         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3450         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3451       </files>
3452     </component>
3453     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3454       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3455       <files>
3456         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3457         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3458       </files>
3459     </component>
3460     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3461       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3462       <files>
3463         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3464         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3465       </files>
3466     </component>
3467     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3468       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3469       <files>
3470         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3471         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3472       </files>
3473     </component>
3474     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3475       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3476       <files>
3477         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3478         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3479       </files>
3480     </component>
3481     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3482       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3483       <files>
3484         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3485         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3486       </files>
3487     </component>
3488     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3489       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3490       <files>
3491         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3492         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
3493       </files>
3494     </component>
3495     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3496       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3497       <files>
3498         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3499         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3500         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3501         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3502       </files>
3503     </component>
3504     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3505       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3506       <files>
3507         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3508         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3509       </files>
3510     </component>
3511     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3512       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3513       <files>
3514         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3515         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3516       </files>
3517     </component>
3518     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3519       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3520       <files>
3521         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3522         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3523       </files>
3524     </component>
3525     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3526       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3527       <files>
3528         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3529         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3530       </files>
3531     </component>
3532     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3533       <description>Access to #include Driver_WiFi.h file</description>
3534       <files>
3535         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3536         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
3537       </files>
3538     </component>
3539
3540     <!-- VIO components -->
3541     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
3542       <description>Virtual I/O custom implementation template</description>
3543       <files>
3544         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
3545       </files>
3546     </component>
3547     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
3548       <description>Virtual I/O implementation using memory only</description>
3549       <files>
3550         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
3551       </files>
3552     </component>
3553
3554   </components>
3555
3556   <boards>
3557     <board name="uVision Simulator" vendor="Keil">
3558       <description>uVision Simulator</description>
3559       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3560       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3561       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3562       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3563       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3564       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3565       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3566       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3567       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3568       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3569       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3570       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3571       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3572       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3573       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
3574       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3575       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3576       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3577       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3578       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3579       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3580       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3581       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3582       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3583       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3584       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
3585     </board>
3586
3587     <board name="EWARM Simulator" vendor="IAR">
3588       <description>EWARM Simulator</description>
3589       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3590       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3591       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3592       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3593       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3594       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3595       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3596       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3597       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3598       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3599       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3600       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3601       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3602       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3603       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
3604       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3605       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3606       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3607       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3608       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3609       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3610       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3611       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3612       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3613       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3614       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
3615     </board>
3616   </boards>
3617
3618   <examples>
3619     <example name="DSP_Lib Bayes example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_bayes_example">
3620       <description>DSP_Lib Bayes example</description>
3621       <board name="uVision Simulator" vendor="Keil"/>
3622       <project>
3623         <environment name="uv" load="arm_bayes_example.uvprojx"/>
3624       </project>
3625       <attributes>
3626         <component Cclass="CMSIS" Cgroup="CORE"/>
3627         <component Cclass="CMSIS" Cgroup="DSP"/>
3628         <component Cclass="Device" Cgroup="Startup"/>
3629         <category>Getting Started</category>
3630       </attributes>
3631     </example>
3632
3633     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3634       <description>DSP_Lib Class Marks example</description>
3635       <board name="uVision Simulator" vendor="Keil"/>
3636       <project>
3637         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3638       </project>
3639       <attributes>
3640         <component Cclass="CMSIS" Cgroup="CORE"/>
3641         <component Cclass="CMSIS" Cgroup="DSP"/>
3642         <component Cclass="Device" Cgroup="Startup"/>
3643         <category>Getting Started</category>
3644       </attributes>
3645     </example>
3646
3647     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3648       <description>DSP_Lib Convolution example</description>
3649       <board name="uVision Simulator" vendor="Keil"/>
3650       <project>
3651         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3652       </project>
3653       <attributes>
3654         <component Cclass="CMSIS" Cgroup="CORE"/>
3655         <component Cclass="CMSIS" Cgroup="DSP"/>
3656         <component Cclass="Device" Cgroup="Startup"/>
3657         <category>Getting Started</category>
3658       </attributes>
3659     </example>
3660
3661     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3662       <description>DSP_Lib Dotproduct example</description>
3663       <board name="uVision Simulator" vendor="Keil"/>
3664       <project>
3665         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3666       </project>
3667       <attributes>
3668         <component Cclass="CMSIS" Cgroup="CORE"/>
3669         <component Cclass="CMSIS" Cgroup="DSP"/>
3670         <component Cclass="Device" Cgroup="Startup"/>
3671         <category>Getting Started</category>
3672       </attributes>
3673     </example>
3674
3675     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3676       <description>DSP_Lib FFT Bin example</description>
3677       <board name="uVision Simulator" vendor="Keil"/>
3678       <project>
3679         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3680       </project>
3681       <attributes>
3682         <component Cclass="CMSIS" Cgroup="CORE"/>
3683         <component Cclass="CMSIS" Cgroup="DSP"/>
3684         <component Cclass="Device" Cgroup="Startup"/>
3685         <category>Getting Started</category>
3686       </attributes>
3687     </example>
3688
3689     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3690       <description>DSP_Lib FIR example</description>
3691       <board name="uVision Simulator" vendor="Keil"/>
3692       <project>
3693         <environment name="uv" load="arm_fir_example.uvprojx"/>
3694       </project>
3695       <attributes>
3696         <component Cclass="CMSIS" Cgroup="CORE"/>
3697         <component Cclass="CMSIS" Cgroup="DSP"/>
3698         <component Cclass="Device" Cgroup="Startup"/>
3699         <category>Getting Started</category>
3700       </attributes>
3701     </example>
3702
3703     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3704       <description>DSP_Lib Graphic Equalizer example</description>
3705       <board name="uVision Simulator" vendor="Keil"/>
3706       <project>
3707         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3708       </project>
3709       <attributes>
3710         <component Cclass="CMSIS" Cgroup="CORE"/>
3711         <component Cclass="CMSIS" Cgroup="DSP"/>
3712         <component Cclass="Device" Cgroup="Startup"/>
3713         <category>Getting Started</category>
3714       </attributes>
3715     </example>
3716
3717     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3718       <description>DSP_Lib Linear Interpolation example</description>
3719       <board name="uVision Simulator" vendor="Keil"/>
3720       <project>
3721         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3722       </project>
3723       <attributes>
3724         <component Cclass="CMSIS" Cgroup="CORE"/>
3725         <component Cclass="CMSIS" Cgroup="DSP"/>
3726         <component Cclass="Device" Cgroup="Startup"/>
3727         <category>Getting Started</category>
3728       </attributes>
3729     </example>
3730
3731     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3732       <description>DSP_Lib Matrix example</description>
3733       <board name="uVision Simulator" vendor="Keil"/>
3734       <project>
3735         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3736       </project>
3737       <attributes>
3738         <component Cclass="CMSIS" Cgroup="CORE"/>
3739         <component Cclass="CMSIS" Cgroup="DSP"/>
3740         <component Cclass="Device" Cgroup="Startup"/>
3741         <category>Getting Started</category>
3742       </attributes>
3743     </example>
3744
3745     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3746       <description>DSP_Lib Signal Convergence example</description>
3747       <board name="uVision Simulator" vendor="Keil"/>
3748       <project>
3749         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3750       </project>
3751       <attributes>
3752         <component Cclass="CMSIS" Cgroup="CORE"/>
3753         <component Cclass="CMSIS" Cgroup="DSP"/>
3754         <component Cclass="Device" Cgroup="Startup"/>
3755         <category>Getting Started</category>
3756       </attributes>
3757     </example>
3758
3759     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3760       <description>DSP_Lib Sinus/Cosinus example</description>
3761       <board name="uVision Simulator" vendor="Keil"/>
3762       <project>
3763         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3764       </project>
3765       <attributes>
3766         <component Cclass="CMSIS" Cgroup="CORE"/>
3767         <component Cclass="CMSIS" Cgroup="DSP"/>
3768         <component Cclass="Device" Cgroup="Startup"/>
3769         <category>Getting Started</category>
3770       </attributes>
3771     </example>
3772
3773     <example name="DSP_Lib SVM example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_svm_example">
3774       <description>DSP_Lib SVM example</description>
3775       <board name="uVision Simulator" vendor="Keil"/>
3776       <project>
3777         <environment name="uv" load="arm_svm_example.uvprojx"/>
3778       </project>
3779       <attributes>
3780         <component Cclass="CMSIS" Cgroup="CORE"/>
3781         <component Cclass="CMSIS" Cgroup="DSP"/>
3782         <component Cclass="Device" Cgroup="Startup"/>
3783         <category>Getting Started</category>
3784       </attributes>
3785     </example>
3786
3787     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3788       <description>DSP_Lib Variance example</description>
3789       <board name="uVision Simulator" vendor="Keil"/>
3790       <project>
3791         <environment name="uv" load="arm_variance_example.uvprojx"/>
3792       </project>
3793       <attributes>
3794         <component Cclass="CMSIS" Cgroup="CORE"/>
3795         <component Cclass="CMSIS" Cgroup="DSP"/>
3796         <component Cclass="Device" Cgroup="Startup"/>
3797         <category>Getting Started</category>
3798       </attributes>
3799     </example>
3800
3801     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3802       <description>CMSIS-RTOS2 Blinky example</description>
3803       <board name="uVision Simulator" vendor="Keil"/>
3804       <project>
3805         <environment name="uv" load="Blinky.uvprojx"/>
3806       </project>
3807       <attributes>
3808         <component Cclass="CMSIS" Cgroup="CORE"/>
3809         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3810         <component Cclass="Device" Cgroup="Startup"/>
3811         <category>Getting Started</category>
3812       </attributes>
3813     </example>
3814
3815     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3816       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3817       <board name="uVision Simulator" vendor="Keil"/>
3818       <project>
3819         <environment name="uv" load="Blinky.uvprojx"/>
3820       </project>
3821       <attributes>
3822         <component Cclass="CMSIS" Cgroup="CORE"/>
3823         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3824         <component Cclass="Device" Cgroup="Startup"/>
3825         <category>Getting Started</category>
3826       </attributes>
3827     </example>
3828
3829     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3830       <description>CMSIS-RTOS2 Message Queue Example</description>
3831       <board name="uVision Simulator" vendor="Keil"/>
3832       <project>
3833         <environment name="uv" load="MsqQueue.uvprojx"/>
3834       </project>
3835       <attributes>
3836         <component Cclass="CMSIS" Cgroup="CORE"/>
3837         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3838         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3839         <component Cclass="Device" Cgroup="Startup"/>
3840         <category>Getting Started</category>
3841       </attributes>
3842     </example>
3843
3844     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3845       <description>CMSIS-RTOS2 Memory Pool Example</description>
3846       <board name="uVision Simulator" vendor="Keil"/>
3847       <project>
3848         <environment name="uv" load="MemPool.uvprojx"/>
3849       </project>
3850       <attributes>
3851         <component Cclass="CMSIS" Cgroup="CORE"/>
3852         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3853         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3854         <component Cclass="Device" Cgroup="Startup"/>
3855         <category>Getting Started</category>
3856       </attributes>
3857     </example>
3858
3859     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3860       <description>Bare-metal secure/non-secure example without RTOS</description>
3861       <board name="uVision Simulator" vendor="Keil"/>
3862       <project>
3863         <environment name="uv" load="NoRTOS.uvmpw"/>
3864       </project>
3865       <attributes>
3866         <component Cclass="CMSIS" Cgroup="CORE"/>
3867         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3868         <component Cclass="Device" Cgroup="Startup"/>
3869         <category>Getting Started</category>
3870       </attributes>
3871     </example>
3872
3873     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3874       <description>Secure/non-secure RTOS example with thread context management</description>
3875       <board name="uVision Simulator" vendor="Keil"/>
3876       <project>
3877         <environment name="uv" load="RTOS.uvmpw"/>
3878       </project>
3879       <attributes>
3880         <component Cclass="CMSIS" Cgroup="CORE"/>
3881         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3882         <component Cclass="Device" Cgroup="Startup"/>
3883         <category>Getting Started</category>
3884       </attributes>
3885     </example>
3886
3887     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3888       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3889       <board name="uVision Simulator" vendor="Keil"/>
3890       <project>
3891         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3892       </project>
3893       <attributes>
3894         <component Cclass="CMSIS" Cgroup="CORE"/>
3895         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3896         <component Cclass="Device" Cgroup="Startup"/>
3897         <category>Getting Started</category>
3898       </attributes>
3899     </example>
3900
3901     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
3902       <description>CMSIS-RTOS2 Blinky example</description>
3903       <board name="EWARM Simulator" vendor="IAR"/>
3904       <project>
3905         <environment name="iar" load="Blinky/Blinky.ewp"/>
3906       </project>
3907       <attributes>
3908         <component Cclass="CMSIS" Cgroup="CORE"/>
3909         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3910         <component Cclass="Device" Cgroup="Startup"/>
3911         <category>Getting Started</category>
3912       </attributes>
3913     </example>
3914
3915     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
3916       <description>CMSIS-RTOS2 Message Queue Example</description>
3917       <board name="EWARM Simulator" vendor="IAR"/>
3918       <project>
3919         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
3920       </project>
3921       <attributes>
3922         <component Cclass="CMSIS" Cgroup="CORE"/>
3923         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3924         <component Cclass="Device" Cgroup="Startup"/>
3925         <category>Getting Started</category>
3926       </attributes>
3927     </example>
3928
3929   </examples>
3930
3931 </package>