begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.0.2-dev3">
  12       CMSIS-Core_A:
  13       - Added ARM Compiler 6 support
  14       - Updated Cortex-A core functions
  15       - Updated Startup and System files
  16       CMSIS-RTOS2:
  17       - RTX5: added support for Cortex-A
  18     </release>
  19     <release version="5.0.2-dev2">
  20       CMSIS-RTOS2:
  21       - RTX 5.1.1 (see revision history for details)
  22     </release>
  23     <release version="5.0.2-dev1">
  24       CMSIS-Core_A:
  25       - Added Cortex-A core support, ARMCC specific:
  26         - Core specific register definitions
  27         - Generic Interrupt Controller functions
  28         - Generic Timer functions
  29         - L1 and L2 Cache functions
  30         - MMU functions
  31       - Added ARMCA5, ARMCA7 and ARMCA9 devices
  32       - Added Startup, System and MMU configuration files
  33     </release>
  34     <release version="5.0.2-dev0">
  35       CMSIS-Core: 5.0.2 (see revision history for details)
  36       - Added macros __UNALIGNED_UINT16_READ, __UNALIGNED_UINT16_WRITE
  37       - Added macros __UNALIGNED_UINT32_READ, __UNALIGNED_UINT32_WRITE
  38       - Set macro __UNALIGNED_UINT32 to deprecated
  39     </release>
  40     <release version="5.0.1" date="2017-02-03">
  41       Package Description:
  42       - added taxonomy for Cclass RTOS
  43       CMSIS-RTOS2:
  44       - API 2.1   (see revision history for details)
  45       - RTX 5.1.0 (see revision history for details)
  46       CMSIS-Core: 5.0.1 (see revision history for details)
  47       - Added __PACKED_STRUCT macro
  48       - Added uVisior support
  49       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  50       - Updated template for secure main function (main_s.c)
  51       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  52       CMSIS-DSP: 1.5.1 (see revision history for details)
  53       - added ARMv8M DSP libraries.
  54       CMSIS-PACK:1.4.9 (see revision history for details)
  55       - added Pack Index File specification and schema file
  56     </release>
  57     <release version="5.0.0" date="2016-11-11">
  58       Changed open source license to Apache 2.0
  59       CMSIS_Core:
  60        - Added support for Cortex-M23 and Cortex-M33.
  61        - Added ARMv8-M device configurations for mainline and baseline.
  62        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  63        - Added cmsis_compiler.h to unify compiler behaviour.
  64        - Updated function SCB_EnableICache (for Cortex-M7).
  65        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  66       CMSIS-RTOS:
  67         - bug fix in RTX 4.82 (see revision history for details)
  68       CMSIS-RTOS2:
  69         - new API including compatibility layer to CMSIS-RTOS
  70         - reference implementation based on RTX5
  71         - supports all Cortex-M variants including TrustZone for ARMv8-M
  72       CMSIS-SVD:
  73        - reworked SVD format documentation
  74        - removed SVD file database documentation as SVD files are distributed in packs
  75        - updated SVDConv for Win32 and Linux
  76       CMSIS-DSP:
  77        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  78        - Added DSP libraries build projects to CMSIS pack.
  79     </release>
  80     <release version="4.5.0" date="2015-10-28">
  81       - CMSIS-Core     4.30.0  (see revision history for details)
  82       - CMSIS-DAP      1.1.0   (unchanged)
  83       - CMSIS-Driver   2.04.0  (see revision history for details)
  84       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
  85       - CMSIS-PACK     1.4.1   (see revision history for details)
  86       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
  87       - CMSIS-SVD      1.3.1   (see revision history for details)
  88     </release>
  89     <release version="4.4.0" date="2015-09-11">
  90       - CMSIS-Core     4.20   (see revision history for details)
  91       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
  92       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
  93       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
  94       - CMSIS-RTOS
  95         -- API         1.02   (unchanged)
  96         -- RTX         4.79   (see revision history for details)
  97       - CMSIS-SVD      1.3.0  (see revision history for details)
  98       - CMSIS-DAP      1.1.0  (extended with SWO support)
  99     </release>
 100     <release version="4.3.0" date="2015-03-20">
 101       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 102       - CMSIS-DSP      1.4.5  (see revision history for details)
 103       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 104       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 105       - CMSIS-RTOS
 106         -- API         1.02   (unchanged)
 107         -- RTX         4.78   (see revision history for details)
 108       - CMSIS-SVD      1.2    (unchanged)
 109     </release>
 110     <release version="4.2.0" date="2014-09-24">
 111       Adding Cortex-M7 support
 112       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 113       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 114       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 115       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 116       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 117     </release>
 118     <release version="4.1.1" date="2014-06-30">
 119       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 120     </release>
 121     <release version="4.1.0" date="2014-06-12">
 122       - CMSIS-Driver   2.02  (incompatible update)
 123       - CMSIS-Pack     1.3   (see revision history for details)
 124       - CMSIS-DSP      1.4.2 (unchanged)
 125       - CMSIS-Core     3.30  (unchanged)
 126       - CMSIS-RTOS RTX 4.74  (unchanged)
 127       - CMSIS-RTOS API 1.02  (unchanged)
 128       - CMSIS-SVD      1.10  (unchanged)
 129       PACK:
 130       - removed G++ specific files from PACK
 131       - added Component Startup variant "C Startup"
 132       - added Pack Checking Utility
 133       - updated conditions to reflect tool-chain dependency
 134       - added Taxonomy for Graphics
 135       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 136     </release>
 137     <release version="4.0.0">
 138       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 139       - CMSIS-Pack     1.1   Preliminary
 140       - CMSIS-DSP      1.4.2 (see revision history for details)
 141       - CMSIS-Core     3.30  (see revision history for details)
 142       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 143       - CMSIS-RTOS API 1.02  (unchanged)
 144       - CMSIS-SVD      1.10  (unchanged)
 145     </release>
 146     <release version="3.20.4">
 147       - CMSIS-RTOS 4.74 (see revision history for details)
 148       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 149     </release>
 150     <release version="3.20.3">
 151       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 152       - CMSIS-RTOS 4.73 (see revision history for details)
 153     </release>
 154     <release version="3.20.2">
 155       - CMSIS-Pack documentation has been added
 156       - CMSIS-Drivers header and documentation have been added to PACK
 157       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 158     </release>
 159     <release version="3.20.1">
 160       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 161       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 162     </release>
 163     <release version="3.20.0">
 164       The software portions that are deployed in the application program are now under a BSD license which allows usage
 165       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 166       The individual components have been update as listed below:
 167       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 168       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 169       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 170       - CMSIS-SVD is unchanged.
 171     </release>
 172   </releases>
 173
 174   <taxonomy>
 175     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 176     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 177     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 178     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 179     <description Cclass="File System">File Drive Support and File System</description>
 180     <description Cclass="Graphics">Graphical User Interface</description>
 181     <description Cclass="Network">Network Stack using Internet Protocols</description>
 182     <description Cclass="USB">Universal Serial Bus Stack</description>
 183     <description Cclass="Compiler">Compiler Software Extensions</description>
 184     <description Cclass="RTOS">Real-time Operating System</description>
 185   </taxonomy>
 186
 187   <devices>
 188     <!-- ******************************  Cortex-M0  ****************************** -->
 189     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 190       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 191       <description>
 192 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 193 - simple, easy-to-use programmers model
 194 - highly efficient ultra-low power operation
 195 - excellent code density
 196 - deterministic, high-performance interrupt handling
 197 - upward compatibility with the rest of the Cortex-M processor family.
 198       </description>
 199       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 200       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 201       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 202       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 203
 204       <device Dname="ARMCM0">
 205         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 206         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 207       </device>
 208     </family>
 209
 210     <!-- ******************************  Cortex-M0P  ****************************** -->
 211     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 212       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 213       <description>
 214 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 215 - simple, easy-to-use programmers model
 216 - highly efficient ultra-low power operation
 217 - excellent code density
 218 - deterministic, high-performance interrupt handling
 219 - upward compatibility with the rest of the Cortex-M processor family.
 220       </description>
 221       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 222       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 223       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 224       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 225
 226       <device Dname="ARMCM0P">
 227         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 228         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 229       </device>
 230     </family>
 231
 232     <!-- ******************************  Cortex-M3  ****************************** -->
 233     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 234       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 235       <description>
 236 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 237 - simple, easy-to-use programmers model
 238 - highly efficient ultra-low power operation
 239 - excellent code density
 240 - deterministic, high-performance interrupt handling
 241 - upward compatibility with the rest of the Cortex-M processor family.
 242       </description>
 243       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 244       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 245       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 246       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 247
 248       <device Dname="ARMCM3">
 249         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 250         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 251       </device>
 252     </family>
 253
 254     <!-- ******************************  Cortex-M4  ****************************** -->
 255     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 256       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 257       <description>
 258 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 259 - simple, easy-to-use programmers model
 260 - highly efficient ultra-low power operation
 261 - excellent code density
 262 - deterministic, high-performance interrupt handling
 263 - upward compatibility with the rest of the Cortex-M processor family.
 264       </description>
 265       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 266       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 267       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 268       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 269
 270       <device Dname="ARMCM4">
 271         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 272         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 273       </device>
 274
 275       <device Dname="ARMCM4_FP">
 276         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 277         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 278       </device>
 279     </family>
 280
 281     <!-- ******************************  Cortex-M7  ****************************** -->
 282     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 283       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 284       <description>
 285 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 286 - simple, easy-to-use programmers model
 287 - highly efficient ultra-low power operation
 288 - excellent code density
 289 - deterministic, high-performance interrupt handling
 290 - upward compatibility with the rest of the Cortex-M processor family.
 291       </description>
 292       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 293       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 294       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 295       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 296
 297       <device Dname="ARMCM7">
 298         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 299         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 300       </device>
 301
 302       <device Dname="ARMCM7_SP">
 303         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 304         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 305       </device>
 306
 307       <device Dname="ARMCM7_DP">
 308         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 309         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 310       </device>
 311     </family>
 312
 313     <!-- ******************************  Cortex-M23  ********************** -->
 314     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 315       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 316       <description>
 317 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 318 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 319 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 320       </description>
 321       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 322       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 323       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 324       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 325       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 326       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 327
 328       <device Dname="ARMCM23">
 329         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 330         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 331       </device>
 332
 333       <device Dname="ARMCM23_TZ">
 334         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 335         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 336       </device>
 337     </family>
 338
 339     <!-- ******************************  Cortex-M33  ****************************** -->
 340     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 341       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 342       <description>
 343 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 344 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 345       </description>
 346       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 347       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 348       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 349       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 350       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 351       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 352
 353       <device Dname="ARMCM33">
 354         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 355         <description>
 356           no DSP Instructions, no Floating Point Unit, no TrustZone
 357         </description>
 358         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 359       </device>
 360
 361       <device Dname="ARMCM33_TZ">
 362         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 363         <description>
 364           no DSP Instructions, no Floating Point Unit, TrustZone
 365         </description>
 366         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 367       </device>
 368
 369       <device Dname="ARMCM33_DSP_FP">
 370         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 371         <description>
 372           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 373         </description>
 374         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 375       </device>
 376
 377       <device Dname="ARMCM33_DSP_FP_TZ">
 378         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 379         <description>
 380           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 381         </description>
 382         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 383       </device>
 384     </family>
 385
 386     <!-- ******************************  ARMSC000  ****************************** -->
 387     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 388       <description>
 389 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 390 - simple, easy-to-use programmers model
 391 - highly efficient ultra-low power operation
 392 - excellent code density
 393 - deterministic, high-performance interrupt handling
 394       </description>
 395       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 396       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 397       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 398       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 399
 400       <device Dname="ARMSC000">
 401         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 402         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 403       </device>
 404     </family>
 405
 406     <!-- ******************************  ARMSC300  ****************************** -->
 407     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 408       <description>
 409 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 410 - simple, easy-to-use programmers model
 411 - highly efficient ultra-low power operation
 412 - excellent code density
 413 - deterministic, high-performance interrupt handling
 414       </description>
 415       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 416       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 417       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 418       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 419
 420       <device Dname="ARMSC300">
 421         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 422         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 423       </device>
 424     </family>
 425
 426     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 427     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 428       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 429       <description>
 430 ARMv8-M Baseline based device with TrustZone
 431       </description>
 432       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 433       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 434       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 435       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 436       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 437       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 438
 439       <device Dname="ARMv8MBL">
 440         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 441         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 442       </device>
 443     </family>
 444
 445     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 446     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 447       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 448       <description>
 449 ARMv8-M Mainline based device with TrustZone
 450       </description>
 451       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 452       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 453       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 454       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 455       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 456       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 457
 458       <device Dname="ARMv8MML">
 459         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 460         <description>
 461           no DSP Instructions, no Floating Point Unit, TrustZone
 462         </description>
 463         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 464       </device>
 465
 466       <device Dname="ARMv8MML_DSP">
 467         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 468         <description>
 469           DSP Instructions, no Floating Point Unit, TrustZone
 470         </description>
 471         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 472       </device>
 473
 474       <device Dname="ARMv8MML_SP">
 475         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 476         <description>
 477           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 478         </description>
 479         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 480       </device>
 481
 482       <device Dname="ARMv8MML_DSP_SP">
 483         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 484         <description>
 485           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 486         </description>
 487         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 488       </device>
 489
 490       <device Dname="ARMv8MML_DP">
 491         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 492         <description>
 493           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 494         </description>
 495         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 496       </device>
 497
 498       <device Dname="ARMv8MML_DSP_DP">
 499         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 500         <description>
 501           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 502         </description>
 503         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 504       </device>
 505     </family>
 506
 507     <!-- ******************************  Cortex-A5  ****************************** -->
 508     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 509       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 510       <description>
 511 The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
 512 virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
 513 ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 514       </description>
 515
 516       <device Dname="ARMCA5">
 517         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 518         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 519       </device>
 520     </family>
 521
 522     <!-- ******************************  Cortex-A7  ****************************** -->
 523     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 524       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 525       <description>
 526 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
 527 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 528 an optional integrated GIC, and an optional L2 cache controller.
 529       </description>
 530
 531       <device Dname="ARMCA7">
 532         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 533         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 534       </device>
 535     </family>
 536
 537     <!-- ******************************  Cortex-A9  ****************************** -->
 538     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 539       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 540       <description>
 541 The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 542 The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
 543 and 8-bit Java bytecodes in Jazelle state.
 544       </description>
 545
 546       <device Dname="ARMCA9">
 547         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 548         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 549       </device>
 550     </family>
 551   </devices>
 552
 553
 554   <apis>
 555     <!-- CMSIS-RTOS API -->
 556     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 557       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 558       <files>
 559         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 560       </files>
 561     </api>
 562     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.0" exclusive="1">
 563       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 564       <files>
 565         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 566         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 567       </files>
 568     </api>
 569     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 570       <description>USART Driver API for Cortex-M</description>
 571       <files>
 572         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 573         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 574       </files>
 575     </api>
 576     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 577       <description>SPI Driver API for Cortex-M</description>
 578       <files>
 579         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 580         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 581       </files>
 582     </api>
 583     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 584       <description>SAI Driver API for Cortex-M</description>
 585       <files>
 586         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 587         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 588       </files>
 589     </api>
 590     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 591       <description>I2C Driver API for Cortex-M</description>
 592       <files>
 593         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 594         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 595       </files>
 596     </api>
 597     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.1.0" exclusive="0">
 598       <description>CAN Driver API for Cortex-M</description>
 599       <files>
 600         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 601         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 602       </files>
 603     </api>
 604     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
 605       <description>Flash Driver API for Cortex-M</description>
 606       <files>
 607         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 608         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 609       </files>
 610     </api>
 611     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 612       <description>MCI Driver API for Cortex-M</description>
 613       <files>
 614         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 615         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 616       </files>
 617     </api>
 618     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
 619       <description>NAND Flash Driver API for Cortex-M</description>
 620       <files>
 621         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 622         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 623       </files>
 624     </api>
 625     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 626       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 627       <files>
 628         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 629         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 630         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 631       </files>
 632     </api>
 633     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 634       <description>Ethernet MAC Driver API for Cortex-M</description>
 635       <files>
 636         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 637         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 638       </files>
 639     </api>
 640     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 641       <description>Ethernet PHY Driver API for Cortex-M</description>
 642       <files>
 643         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 644         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 645       </files>
 646     </api>
 647     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 648       <description>USB Device Driver API for Cortex-M</description>
 649       <files>
 650         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 651         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 652       </files>
 653     </api>
 654     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 655       <description>USB Host Driver API for Cortex-M</description>
 656       <files>
 657         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 658         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 659       </files>
 660     </api>
 661   </apis>
 662
 663   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 664   <conditions>
 665     <!-- compiler -->
 666     <condition id="ARMCC6">
 667       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 668       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 669     </condition>
 670     <condition id="ARMCC">
 671       <require Tcompiler="ARMCC" Toptions="AC5"/>
 672     </condition>
 673     <condition id="GCC">
 674       <require Tcompiler="GCC"/>
 675     </condition>
 676     <condition id="IAR">
 677       <require Tcompiler="IAR"/>
 678     </condition>
 679     <condition id="ARMCC GCC">
 680       <accept Tcompiler="ARMCC"/>
 681       <accept Tcompiler="GCC"/>
 682     </condition>
 683     <condition id="ARMCC GCC IAR">
 684       <accept Tcompiler="ARMCC"/>
 685       <accept Tcompiler="GCC"/>
 686       <accept Tcompiler="IAR"/>
 687     </condition>
 688
 689     <!-- ARM architecture -->
 690     <condition id="ARMv6-M Device">
 691       <description>ARMv6-M architecture based device</description>
 692       <accept Dcore="Cortex-M0"/>
 693       <accept Dcore="Cortex-M0+"/>
 694       <accept Dcore="SC000"/>
 695     </condition>
 696     <condition id="ARMv7-M Device">
 697       <description>ARMv7-M architecture based device</description>
 698       <accept Dcore="Cortex-M3"/>
 699       <accept Dcore="Cortex-M4"/>
 700       <accept Dcore="Cortex-M7"/>
 701       <accept Dcore="SC300"/>
 702     </condition>
 703     <condition id="ARMv8-M Device">
 704       <description>ARMv8-M architecture based device</description>
 705       <accept Dcore="ARMV8MBL"/>
 706       <accept Dcore="ARMV8MML"/>
 707       <accept Dcore="Cortex-M23"/>
 708       <accept Dcore="Cortex-M33"/>
 709     </condition>
 710     <condition id="ARMv8-M TZ Device">
 711       <description>ARMv8-M architecture based device with TrustZone</description>
 712       <require condition="ARMv8-M Device"/>
 713       <require Dtz="TZ"/>
 714     </condition>
 715     <condition id="ARMv6_7-M Device">
 716       <description>ARMv6_7-M architecture based device</description>
 717       <accept condition="ARMv6-M Device"/>
 718       <accept condition="ARMv7-M Device"/>
 719     </condition>
 720     <condition id="ARMv6_7_8-M Device">
 721       <description>ARMv6_7_8-M architecture based device</description>
 722       <accept condition="ARMv6-M Device"/>
 723       <accept condition="ARMv7-M Device"/>
 724       <accept condition="ARMv8-M Device"/>
 725     </condition>
 726     <condition id="ARMv7-A Device">
 727       <description>ARMv7-A architecture based device</description>
 728       <accept Dcore="Cortex-A5"/>
 729       <accept Dcore="Cortex-A7"/>
 730       <accept Dcore="Cortex-A9"/>
 731     </condition>
 732
 733     <!-- ARM core -->
 734     <condition id="CM0">
 735       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 736       <accept Dcore="Cortex-M0"/>
 737       <accept Dcore="Cortex-M0+"/>
 738       <accept Dcore="SC000"/>
 739     </condition>
 740     <condition id="CM3">
 741       <description>Cortex-M3 or SC300 processor based device</description>
 742       <accept Dcore="Cortex-M3"/>
 743       <accept Dcore="SC300"/>
 744     </condition>
 745     <condition id="CM4">
 746       <description>Cortex-M4 processor based device</description>
 747       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 748     </condition>
 749     <condition id="CM4_FP">
 750       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 751       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 752     </condition>
 753     <condition id="CM7">
 754       <description>Cortex-M7 processor based device</description>
 755       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 756     </condition>
 757     <condition id="CM7_FP">
 758       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 759       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 760       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 761     </condition>
 762     <condition id="CM7_SP">
 763       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 764       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 765     </condition>
 766     <condition id="CM7_DP">
 767       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 768       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 769     </condition>
 770     <condition id="CM23">
 771       <description>Cortex-M23 processor based device</description>
 772       <require Dcore="Cortex-M23"/>
 773     </condition>
 774     <condition id="CM33">
 775       <description>Cortex-M33 processor based device</description>
 776       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 777     </condition>
 778     <condition id="CM33_FP">
 779       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 780       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 781     </condition>
 782     <condition id="ARMv8MBL">
 783       <description>ARMv8-M Baseline processor based device</description>
 784       <require Dcore="ARMV8MBL"/>
 785     </condition>
 786     <condition id="ARMv8MML">
 787       <description>ARMv8-M Mainline processor based device</description>
 788       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 789     </condition>
 790     <condition id="ARMv8MML_FP">
 791       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 792       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 793       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 794     </condition>
 795
 796     <condition id="CM33_NODSP_NOFPU">
 797       <description>CM33, no DSP, no FPU</description>
 798       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 799     </condition>
 800     <condition id="CM33_DSP_NOFPU">
 801       <description>CM33, DSP, no FPU</description>
 802       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 803     </condition>
 804     <condition id="CM33_NODSP_SP">
 805       <description>CM33, no DSP, SP FPU</description>
 806       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 807     </condition>
 808     <condition id="CM33_DSP_SP">
 809       <description>CM33, DSP, SP FPU</description>
 810       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 811     </condition>
 812
 813     <condition id="ARMv8MML_NODSP_NOFPU">
 814       <description>ARMv8MML, no DSP, no FPU</description>
 815       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 816     </condition>
 817     <condition id="ARMv8MML_DSP_NOFPU">
 818       <description>ARMv8MML, DSP, no FPU</description>
 819       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 820     </condition>
 821     <condition id="ARMv8MML_NODSP_SP">
 822       <description>ARMv8MML, no DSP, SP FPU</description>
 823       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 824     </condition>
 825     <condition id="ARMv8MML_DSP_SP">
 826       <description>ARMv8MML, DSP, SP FPU</description>
 827       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 828     </condition>
 829
 830     <!-- Cortex-A Devices -->
 831     <condition id="RZ_A Device">
 832       <description>Renesas RZ_A Device</description>
 833       <require Dvendor="Renesas:117"/>
 834       <require Dfamily="RZ_A"/>
 835     </condition>
 836     <condition id="Unknown Cortex-A Device">
 837       <description>Unknown Cortex-A Device</description>
 838       <require condition="ARMv7-A Device"/>
 839       <deny    condition="RZ_A Device"/>
 840     </condition>
 841
 842     <!-- ARMCC compiler -->
 843     <condition id="CA_ARMCC">
 844       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler</description>
 845       <require condition="ARMv7-A Device"/>
 846       <require condition="ARMCC"/>
 847     </condition>
 848         <condition id="CA_ARMCC6">
 849       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
 850       <require condition="ARMv7-A Device"/>
 851       <require condition="ARMCC6"/>
 852     </condition>
 853
 854     <condition id="CM0_ARMCC">
 855       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 856       <require condition="CM0"/>
 857       <require Tcompiler="ARMCC"/>
 858     </condition>
 859     <condition id="CM0_LE_ARMCC">
 860       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 861       <require condition="CM0_ARMCC"/>
 862       <require Dendian="Little-endian"/>
 863     </condition>
 864     <condition id="CM0_BE_ARMCC">
 865       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 866       <require condition="CM0_ARMCC"/>
 867       <require Dendian="Big-endian"/>
 868     </condition>
 869
 870     <condition id="CM3_ARMCC">
 871       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 872       <require condition="CM3"/>
 873       <require Tcompiler="ARMCC"/>
 874     </condition>
 875     <condition id="CM3_LE_ARMCC">
 876       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 877       <require condition="CM3_ARMCC"/>
 878       <require Dendian="Little-endian"/>
 879     </condition>
 880     <condition id="CM3_BE_ARMCC">
 881       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 882       <require condition="CM3_ARMCC"/>
 883       <require Dendian="Big-endian"/>
 884     </condition>
 885
 886     <condition id="CM4_ARMCC">
 887       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 888       <require condition="CM4"/>
 889       <require Tcompiler="ARMCC"/>
 890     </condition>
 891     <condition id="CM4_LE_ARMCC">
 892       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 893       <require condition="CM4_ARMCC"/>
 894       <require Dendian="Little-endian"/>
 895     </condition>
 896     <condition id="CM4_BE_ARMCC">
 897       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 898       <require condition="CM4_ARMCC"/>
 899       <require Dendian="Big-endian"/>
 900     </condition>
 901
 902     <condition id="CM4_FP_ARMCC">
 903       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 904       <require condition="CM4_FP"/>
 905       <require Tcompiler="ARMCC"/>
 906     </condition>
 907     <condition id="CM4_FP_LE_ARMCC">
 908       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 909       <require condition="CM4_FP_ARMCC"/>
 910       <require Dendian="Little-endian"/>
 911     </condition>
 912     <condition id="CM4_FP_BE_ARMCC">
 913       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 914       <require condition="CM4_FP_ARMCC"/>
 915       <require Dendian="Big-endian"/>
 916     </condition>
 917
 918     <!-- XMC 4000 Series devices from Infineon require a special library -->
 919     <condition id="CM4_LE_ARMCC_STD">
 920       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
 921       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
 922       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 923       <require Tcompiler="ARMCC"/>
 924     </condition>
 925     <condition id="CM4_LE_ARMCC_IFX">
 926       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
 927       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 928       <require Tcompiler="ARMCC"/>
 929     </condition>
 930     <condition id="CM4_FP_LE_ARMCC_STD">
 931       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
 932       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
 933       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 934       <require Tcompiler="ARMCC"/>
 935     </condition>
 936     <condition id="CM4_FP_LE_ARMCC_IFX">
 937       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
 938       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 939       <require Tcompiler="ARMCC"/>
 940     </condition>
 941
 942     <condition id="CM7_ARMCC">
 943       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 944       <require condition="CM7"/>
 945       <require Tcompiler="ARMCC"/>
 946     </condition>
 947     <condition id="CM7_LE_ARMCC">
 948       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 949       <require condition="CM7_ARMCC"/>
 950       <require Dendian="Little-endian"/>
 951     </condition>
 952     <condition id="CM7_BE_ARMCC">
 953       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 954       <require condition="CM7_ARMCC"/>
 955       <require Dendian="Big-endian"/>
 956     </condition>
 957
 958     <condition id="CM7_FP_ARMCC">
 959       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 960       <require condition="CM7_FP"/>
 961       <require Tcompiler="ARMCC"/>
 962     </condition>
 963     <condition id="CM7_FP_LE_ARMCC">
 964       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 965       <require condition="CM7_FP_ARMCC"/>
 966       <require Dendian="Little-endian"/>
 967     </condition>
 968     <condition id="CM7_FP_BE_ARMCC">
 969       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 970       <require condition="CM7_FP_ARMCC"/>
 971       <require Dendian="Big-endian"/>
 972     </condition>
 973
 974     <condition id="CM7_SP_ARMCC">
 975       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 976       <require condition="CM7_SP"/>
 977       <require Tcompiler="ARMCC"/>
 978     </condition>
 979     <condition id="CM7_SP_LE_ARMCC">
 980       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 981       <require condition="CM7_SP_ARMCC"/>
 982       <require Dendian="Little-endian"/>
 983     </condition>
 984     <condition id="CM7_SP_BE_ARMCC">
 985       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 986       <require condition="CM7_SP_ARMCC"/>
 987       <require Dendian="Big-endian"/>
 988     </condition>
 989
 990     <condition id="CM7_DP_ARMCC">
 991       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
 992       <require condition="CM7_DP"/>
 993       <require Tcompiler="ARMCC"/>
 994     </condition>
 995     <condition id="CM7_DP_LE_ARMCC">
 996       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
 997       <require condition="CM7_DP_ARMCC"/>
 998       <require Dendian="Little-endian"/>
 999     </condition>
1000     <condition id="CM7_DP_BE_ARMCC">
1001       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1002       <require condition="CM7_DP_ARMCC"/>
1003       <require Dendian="Big-endian"/>
1004     </condition>
1005
1006     <condition id="CM23_ARMCC">
1007       <description>Cortex-M23 processor based device for the ARM Compiler</description>
1008       <require condition="CM23"/>
1009       <require Tcompiler="ARMCC"/>
1010     </condition>
1011     <condition id="CM23_LE_ARMCC">
1012       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1013       <require condition="CM23_ARMCC"/>
1014       <require Dendian="Little-endian"/>
1015     </condition>
1016     <condition id="CM23_BE_ARMCC">
1017       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1018       <require condition="CM23_ARMCC"/>
1019       <require Dendian="Big-endian"/>
1020     </condition>
1021
1022     <condition id="CM33_ARMCC">
1023       <description>Cortex-M33 processor based device for the ARM Compiler</description>
1024       <require condition="CM33"/>
1025       <require Tcompiler="ARMCC"/>
1026     </condition>
1027     <condition id="CM33_LE_ARMCC">
1028       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1029       <require condition="CM33_ARMCC"/>
1030       <require Dendian="Little-endian"/>
1031     </condition>
1032     <condition id="CM33_BE_ARMCC">
1033       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1034       <require condition="CM33_ARMCC"/>
1035       <require Dendian="Big-endian"/>
1036     </condition>
1037
1038     <condition id="CM33_FP_ARMCC">
1039       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1040       <require condition="CM33_FP"/>
1041       <require Tcompiler="ARMCC"/>
1042     </condition>
1043     <condition id="CM33_FP_LE_ARMCC">
1044       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1045       <require condition="CM33_FP_ARMCC"/>
1046       <require Dendian="Little-endian"/>
1047     </condition>
1048     <condition id="CM33_FP_BE_ARMCC">
1049       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1050       <require condition="CM33_FP_ARMCC"/>
1051       <require Dendian="Big-endian"/>
1052     </condition>
1053
1054     <condition id="CM33_NODSP_NOFPU_ARMCC">
1055       <description>CM33, no DSP, no FPU, ARM Compiler</description>
1056       <require condition="CM33_NODSP_NOFPU"/>
1057       <require Tcompiler="ARMCC"/>
1058     </condition>
1059     <condition id="CM33_DSP_NOFPU_ARMCC">
1060       <description>CM33, DSP, no FPU, ARM Compiler</description>
1061       <require condition="CM33_DSP_NOFPU"/>
1062       <require Tcompiler="ARMCC"/>
1063     </condition>
1064     <condition id="CM33_NODSP_SP_ARMCC">
1065       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1066       <require condition="CM33_NODSP_SP"/>
1067       <require Tcompiler="ARMCC"/>
1068     </condition>
1069     <condition id="CM33_DSP_SP_ARMCC">
1070       <description>CM33, DSP, SP FPU, ARM Compiler</description>
1071       <require condition="CM33_DSP_SP"/>
1072       <require Tcompiler="ARMCC"/>
1073     </condition>
1074     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1075       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1076       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1077       <require Dendian="Little-endian"/>
1078     </condition>
1079     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1080       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1081       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1082       <require Dendian="Little-endian"/>
1083     </condition>
1084     <condition id="CM33_NODSP_SP_LE_ARMCC">
1085       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1086       <require condition="CM33_NODSP_SP_ARMCC"/>
1087       <require Dendian="Little-endian"/>
1088     </condition>
1089     <condition id="CM33_DSP_SP_LE_ARMCC">
1090       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
1091       <require condition="CM33_DSP_SP_ARMCC"/>
1092       <require Dendian="Little-endian"/>
1093     </condition>
1094
1095     <condition id="ARMv8MBL_ARMCC">
1096       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1097       <require condition="ARMv8MBL"/>
1098       <require Tcompiler="ARMCC"/>
1099     </condition>
1100     <condition id="ARMv8MBL_LE_ARMCC">
1101       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1102       <require condition="ARMv8MBL_ARMCC"/>
1103       <require Dendian="Little-endian"/>
1104     </condition>
1105     <condition id="ARMv8MBL_BE_ARMCC">
1106       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1107       <require condition="ARMv8MBL_ARMCC"/>
1108       <require Dendian="Big-endian"/>
1109     </condition>
1110
1111     <condition id="ARMv8MML_ARMCC">
1112       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1113       <require condition="ARMv8MML"/>
1114       <require Tcompiler="ARMCC"/>
1115     </condition>
1116     <condition id="ARMv8MML_LE_ARMCC">
1117       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1118       <require condition="ARMv8MML_ARMCC"/>
1119       <require Dendian="Little-endian"/>
1120     </condition>
1121     <condition id="ARMv8MML_BE_ARMCC">
1122       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1123       <require condition="ARMv8MML_ARMCC"/>
1124       <require Dendian="Big-endian"/>
1125     </condition>
1126
1127     <condition id="ARMv8MML_FP_ARMCC">
1128       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1129       <require condition="ARMv8MML_FP"/>
1130       <require Tcompiler="ARMCC"/>
1131     </condition>
1132     <condition id="ARMv8MML_FP_LE_ARMCC">
1133       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1134       <require condition="ARMv8MML_FP_ARMCC"/>
1135       <require Dendian="Little-endian"/>
1136     </condition>
1137     <condition id="ARMv8MML_FP_BE_ARMCC">
1138       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1139       <require condition="ARMv8MML_FP_ARMCC"/>
1140       <require Dendian="Big-endian"/>
1141     </condition>
1142
1143     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1144       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1145       <require condition="ARMv8MML_NODSP_NOFPU"/>
1146       <require Tcompiler="ARMCC"/>
1147     </condition>
1148     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1149       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1150       <require condition="ARMv8MML_DSP_NOFPU"/>
1151       <require Tcompiler="ARMCC"/>
1152     </condition>
1153     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1154       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1155       <require condition="ARMv8MML_NODSP_SP"/>
1156       <require Tcompiler="ARMCC"/>
1157     </condition>
1158     <condition id="ARMv8MML_DSP_SP_ARMCC">
1159       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1160       <require condition="ARMv8MML_DSP_SP"/>
1161       <require Tcompiler="ARMCC"/>
1162     </condition>
1163     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1164       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1165       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1166       <require Dendian="Little-endian"/>
1167     </condition>
1168     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1169       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1170       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1171       <require Dendian="Little-endian"/>
1172     </condition>
1173     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1174       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1175       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1176       <require Dendian="Little-endian"/>
1177     </condition>
1178     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1179       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1180       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1181       <require Dendian="Little-endian"/>
1182     </condition>
1183
1184     <!-- GCC compiler -->
1185     <condition id="CA_GCC">
1186       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1187       <require condition="ARMv7-A Device"/>
1188       <require Tcompiler="GCC"/>
1189     </condition>
1190
1191     <condition id="CM0_GCC">
1192       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1193       <require condition="CM0"/>
1194       <require Tcompiler="GCC"/>
1195     </condition>
1196     <condition id="CM0_LE_GCC">
1197       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1198       <require condition="CM0_GCC"/>
1199       <require Dendian="Little-endian"/>
1200     </condition>
1201     <condition id="CM0_BE_GCC">
1202       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1203       <require condition="CM0_GCC"/>
1204       <require Dendian="Big-endian"/>
1205     </condition>
1206
1207     <condition id="CM3_GCC">
1208       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1209       <require condition="CM3"/>
1210       <require Tcompiler="GCC"/>
1211     </condition>
1212     <condition id="CM3_LE_GCC">
1213       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1214       <require condition="CM3_GCC"/>
1215       <require Dendian="Little-endian"/>
1216     </condition>
1217     <condition id="CM3_BE_GCC">
1218       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1219       <require condition="CM3_GCC"/>
1220       <require Dendian="Big-endian"/>
1221     </condition>
1222
1223     <condition id="CM4_GCC">
1224       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1225       <require condition="CM4"/>
1226       <require Tcompiler="GCC"/>
1227     </condition>
1228     <condition id="CM4_LE_GCC">
1229       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1230       <require condition="CM4_GCC"/>
1231       <require Dendian="Little-endian"/>
1232     </condition>
1233     <condition id="CM4_BE_GCC">
1234       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1235       <require condition="CM4_GCC"/>
1236       <require Dendian="Big-endian"/>
1237     </condition>
1238
1239     <condition id="CM4_FP_GCC">
1240       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1241       <require condition="CM4_FP"/>
1242       <require Tcompiler="GCC"/>
1243     </condition>
1244     <condition id="CM4_FP_LE_GCC">
1245       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1246       <require condition="CM4_FP_GCC"/>
1247       <require Dendian="Little-endian"/>
1248     </condition>
1249     <condition id="CM4_FP_BE_GCC">
1250       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1251       <require condition="CM4_FP_GCC"/>
1252       <require Dendian="Big-endian"/>
1253     </condition>
1254
1255     <!-- XMC 4000 Series devices from Infineon require a special library -->
1256     <condition id="CM4_LE_GCC_STD">
1257       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1258       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1259       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1260       <require Tcompiler="GCC"/>
1261     </condition>
1262     <condition id="CM4_LE_GCC_IFX">
1263       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1264       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1265       <require Tcompiler="GCC"/>
1266     </condition>
1267     <condition id="CM4_FP_LE_GCC_STD">
1268       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1269       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1270       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1271       <require Tcompiler="GCC"/>
1272     </condition>
1273     <condition id="CM4_FP_LE_GCC_IFX">
1274       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1275       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1276       <require Tcompiler="GCC"/>
1277     </condition>
1278
1279     <condition id="CM7_GCC">
1280       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1281       <require condition="CM7"/>
1282       <require Tcompiler="GCC"/>
1283     </condition>
1284     <condition id="CM7_LE_GCC">
1285       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1286       <require condition="CM7_GCC"/>
1287       <require Dendian="Little-endian"/>
1288     </condition>
1289     <condition id="CM7_BE_GCC">
1290       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1291       <require condition="CM7_GCC"/>
1292       <require Dendian="Big-endian"/>
1293     </condition>
1294
1295     <condition id="CM7_FP_GCC">
1296       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1297       <require condition="CM7_FP"/>
1298       <require Tcompiler="GCC"/>
1299     </condition>
1300     <condition id="CM7_FP_LE_GCC">
1301       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1302       <require condition="CM7_FP_GCC"/>
1303       <require Dendian="Little-endian"/>
1304     </condition>
1305     <condition id="CM7_FP_BE_GCC">
1306       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1307       <require condition="CM7_FP_GCC"/>
1308       <require Dendian="Big-endian"/>
1309     </condition>
1310
1311     <condition id="CM7_SP_GCC">
1312       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1313       <require condition="CM7_SP"/>
1314       <require Tcompiler="GCC"/>
1315     </condition>
1316     <condition id="CM7_SP_LE_GCC">
1317       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1318       <require condition="CM7_SP_GCC"/>
1319       <require Dendian="Little-endian"/>
1320     </condition>
1321     <condition id="CM7_SP_BE_GCC">
1322       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1323       <require condition="CM7_SP_GCC"/>
1324       <require Dendian="Big-endian"/>
1325     </condition>
1326
1327     <condition id="CM7_DP_GCC">
1328       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1329       <require condition="CM7_DP"/>
1330       <require Tcompiler="GCC"/>
1331     </condition>
1332     <condition id="CM7_DP_LE_GCC">
1333       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1334       <require condition="CM7_DP_GCC"/>
1335       <require Dendian="Little-endian"/>
1336     </condition>
1337     <condition id="CM7_DP_BE_GCC">
1338       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1339       <require condition="CM7_DP_GCC"/>
1340       <require Dendian="Big-endian"/>
1341     </condition>
1342
1343     <condition id="CM23_GCC">
1344       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1345       <require condition="CM23"/>
1346       <require Tcompiler="GCC"/>
1347     </condition>
1348     <condition id="CM23_LE_GCC">
1349       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1350       <require condition="CM23_GCC"/>
1351       <require Dendian="Little-endian"/>
1352     </condition>
1353     <condition id="CM23_BE_GCC">
1354       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1355       <require condition="CM23_GCC"/>
1356       <require Dendian="Big-endian"/>
1357     </condition>
1358
1359     <condition id="CM33_GCC">
1360       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1361       <require condition="CM33"/>
1362       <require Tcompiler="GCC"/>
1363     </condition>
1364     <condition id="CM33_LE_GCC">
1365       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1366       <require condition="CM33_GCC"/>
1367       <require Dendian="Little-endian"/>
1368     </condition>
1369     <condition id="CM33_BE_GCC">
1370       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1371       <require condition="CM33_GCC"/>
1372       <require Dendian="Big-endian"/>
1373     </condition>
1374
1375     <condition id="CM33_FP_GCC">
1376       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1377       <require condition="CM33_FP"/>
1378       <require Tcompiler="GCC"/>
1379     </condition>
1380     <condition id="CM33_FP_LE_GCC">
1381       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1382       <require condition="CM33_FP_GCC"/>
1383       <require Dendian="Little-endian"/>
1384     </condition>
1385     <condition id="CM33_FP_BE_GCC">
1386       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1387       <require condition="CM33_FP_GCC"/>
1388       <require Dendian="Big-endian"/>
1389     </condition>
1390
1391     <condition id="CM33_NODSP_NOFPU_GCC">
1392       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1393       <require condition="CM33_NODSP_NOFPU"/>
1394       <require Tcompiler="GCC"/>
1395     </condition>
1396     <condition id="CM33_DSP_NOFPU_GCC">
1397       <description>CM33, DSP, no FPU, GCC Compiler</description>
1398       <require condition="CM33_DSP_NOFPU"/>
1399       <require Tcompiler="GCC"/>
1400     </condition>
1401     <condition id="CM33_NODSP_SP_GCC">
1402       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1403       <require condition="CM33_NODSP_SP"/>
1404       <require Tcompiler="GCC"/>
1405     </condition>
1406     <condition id="CM33_DSP_SP_GCC">
1407       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1408       <require condition="CM33_DSP_SP"/>
1409       <require Tcompiler="GCC"/>
1410     </condition>
1411     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1412       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1413       <require condition="CM33_NODSP_NOFPU_GCC"/>
1414       <require Dendian="Little-endian"/>
1415     </condition>
1416     <condition id="CM33_DSP_NOFPU_LE_GCC">
1417       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1418       <require condition="CM33_DSP_NOFPU_GCC"/>
1419       <require Dendian="Little-endian"/>
1420     </condition>
1421     <condition id="CM33_NODSP_SP_LE_GCC">
1422       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1423       <require condition="CM33_NODSP_SP_GCC"/>
1424       <require Dendian="Little-endian"/>
1425     </condition>
1426     <condition id="CM33_DSP_SP_LE_GCC">
1427       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1428       <require condition="CM33_DSP_SP_GCC"/>
1429       <require Dendian="Little-endian"/>
1430     </condition>
1431
1432     <condition id="ARMv8MBL_GCC">
1433       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1434       <require condition="ARMv8MBL"/>
1435       <require Tcompiler="GCC"/>
1436     </condition>
1437     <condition id="ARMv8MBL_LE_GCC">
1438       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1439       <require condition="ARMv8MBL_GCC"/>
1440       <require Dendian="Little-endian"/>
1441     </condition>
1442     <condition id="ARMv8MBL_BE_GCC">
1443       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1444       <require condition="ARMv8MBL_GCC"/>
1445       <require Dendian="Big-endian"/>
1446     </condition>
1447
1448     <condition id="ARMv8MML_GCC">
1449       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1450       <require condition="ARMv8MML"/>
1451       <require Tcompiler="GCC"/>
1452     </condition>
1453     <condition id="ARMv8MML_LE_GCC">
1454       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1455       <require condition="ARMv8MML_GCC"/>
1456       <require Dendian="Little-endian"/>
1457     </condition>
1458     <condition id="ARMv8MML_BE_GCC">
1459       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1460       <require condition="ARMv8MML_GCC"/>
1461       <require Dendian="Big-endian"/>
1462     </condition>
1463
1464     <condition id="ARMv8MML_FP_GCC">
1465       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1466       <require condition="ARMv8MML_FP"/>
1467       <require Tcompiler="GCC"/>
1468     </condition>
1469     <condition id="ARMv8MML_FP_LE_GCC">
1470       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1471       <require condition="ARMv8MML_FP_GCC"/>
1472       <require Dendian="Little-endian"/>
1473     </condition>
1474     <condition id="ARMv8MML_FP_BE_GCC">
1475       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1476       <require condition="ARMv8MML_FP_GCC"/>
1477       <require Dendian="Big-endian"/>
1478     </condition>
1479
1480     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1481       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1482       <require condition="ARMv8MML_NODSP_NOFPU"/>
1483       <require Tcompiler="GCC"/>
1484     </condition>
1485     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1486       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1487       <require condition="ARMv8MML_DSP_NOFPU"/>
1488       <require Tcompiler="GCC"/>
1489     </condition>
1490     <condition id="ARMv8MML_NODSP_SP_GCC">
1491       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1492       <require condition="ARMv8MML_NODSP_SP"/>
1493       <require Tcompiler="GCC"/>
1494     </condition>
1495     <condition id="ARMv8MML_DSP_SP_GCC">
1496       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1497       <require condition="ARMv8MML_DSP_SP"/>
1498       <require Tcompiler="GCC"/>
1499     </condition>
1500     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1501       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1502       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1503       <require Dendian="Little-endian"/>
1504     </condition>
1505     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1506       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1507       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1508       <require Dendian="Little-endian"/>
1509     </condition>
1510     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1511       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1512       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1513       <require Dendian="Little-endian"/>
1514     </condition>
1515     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1516       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1517       <require condition="ARMv8MML_DSP_SP_GCC"/>
1518       <require Dendian="Little-endian"/>
1519     </condition>
1520
1521     <!-- IAR compiler -->
1522     <condition id="CA_IAR">
1523       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1524       <require condition="ARMv7-A Device"/>
1525       <require Tcompiler="IAR"/>
1526     </condition>
1527
1528     <condition id="CM0_IAR">
1529       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1530       <require condition="CM0"/>
1531       <require Tcompiler="IAR"/>
1532     </condition>
1533     <condition id="CM0_LE_IAR">
1534       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1535       <require condition="CM0_IAR"/>
1536       <require Dendian="Little-endian"/>
1537     </condition>
1538     <condition id="CM0_BE_IAR">
1539       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1540       <require condition="CM0_IAR"/>
1541       <require Dendian="Big-endian"/>
1542     </condition>
1543
1544     <condition id="CM3_IAR">
1545       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1546       <require condition="CM3"/>
1547       <require Tcompiler="IAR"/>
1548     </condition>
1549     <condition id="CM3_LE_IAR">
1550       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1551       <require condition="CM3_IAR"/>
1552       <require Dendian="Little-endian"/>
1553     </condition>
1554     <condition id="CM3_BE_IAR">
1555       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1556       <require condition="CM3_IAR"/>
1557       <require Dendian="Big-endian"/>
1558     </condition>
1559
1560     <condition id="CM4_IAR">
1561       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1562       <require condition="CM4"/>
1563       <require Tcompiler="IAR"/>
1564     </condition>
1565     <condition id="CM4_LE_IAR">
1566       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1567       <require condition="CM4_IAR"/>
1568       <require Dendian="Little-endian"/>
1569     </condition>
1570     <condition id="CM4_BE_IAR">
1571       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1572       <require condition="CM4_IAR"/>
1573       <require Dendian="Big-endian"/>
1574     </condition>
1575
1576     <condition id="CM4_FP_IAR">
1577       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1578       <require condition="CM4_FP"/>
1579       <require Tcompiler="IAR"/>
1580     </condition>
1581     <condition id="CM4_FP_LE_IAR">
1582       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1583       <require condition="CM4_FP_IAR"/>
1584       <require Dendian="Little-endian"/>
1585     </condition>
1586     <condition id="CM4_FP_BE_IAR">
1587       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1588       <require condition="CM4_FP_IAR"/>
1589       <require Dendian="Big-endian"/>
1590     </condition>
1591
1592     <condition id="CM7_IAR">
1593       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1594       <require condition="CM7"/>
1595       <require Tcompiler="IAR"/>
1596     </condition>
1597     <condition id="CM7_LE_IAR">
1598       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1599       <require condition="CM7_IAR"/>
1600       <require Dendian="Little-endian"/>
1601     </condition>
1602     <condition id="CM7_BE_IAR">
1603       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1604       <require condition="CM7_IAR"/>
1605       <require Dendian="Big-endian"/>
1606     </condition>
1607
1608     <condition id="CM7_FP_IAR">
1609       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1610       <require condition="CM7_FP"/>
1611       <require Tcompiler="IAR"/>
1612     </condition>
1613     <condition id="CM7_FP_LE_IAR">
1614       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1615       <require condition="CM7_FP_IAR"/>
1616       <require Dendian="Little-endian"/>
1617     </condition>
1618     <condition id="CM7_FP_BE_IAR">
1619       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1620       <require condition="CM7_FP_IAR"/>
1621       <require Dendian="Big-endian"/>
1622     </condition>
1623
1624     <condition id="CM7_SP_IAR">
1625       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1626       <require condition="CM7_SP"/>
1627       <require Tcompiler="IAR"/>
1628     </condition>
1629     <condition id="CM7_SP_LE_IAR">
1630       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1631       <require condition="CM7_SP_IAR"/>
1632       <require Dendian="Little-endian"/>
1633     </condition>
1634     <condition id="CM7_SP_BE_IAR">
1635       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1636       <require condition="CM7_SP_IAR"/>
1637       <require Dendian="Big-endian"/>
1638     </condition>
1639
1640     <condition id="CM7_DP_IAR">
1641       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1642       <require condition="CM7_DP"/>
1643       <require Tcompiler="IAR"/>
1644     </condition>
1645     <condition id="CM7_DP_LE_IAR">
1646       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1647       <require condition="CM7_DP_IAR"/>
1648       <require Dendian="Little-endian"/>
1649     </condition>
1650     <condition id="CM7_DP_BE_IAR">
1651       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1652       <require condition="CM7_DP_IAR"/>
1653       <require Dendian="Big-endian"/>
1654     </condition>
1655
1656     <!-- conditions selecting single devices and CMSIS Core -->
1657     <!-- used for component startup, GCC version is used for C-Startup -->
1658     <condition id="ARMCM0 CMSIS">
1659       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1660       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1661       <require Cclass="CMSIS" Cgroup="CORE"/>
1662     </condition>
1663     <condition id="ARMCM0 CMSIS GCC">
1664       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1665       <require condition="ARMCM0 CMSIS"/>
1666       <require condition="GCC"/>
1667     </condition>
1668
1669     <condition id="ARMCM0+ CMSIS">
1670       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1671       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1672       <require Cclass="CMSIS" Cgroup="CORE"/>
1673     </condition>
1674     <condition id="ARMCM0+ CMSIS GCC">
1675       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1676       <require condition="ARMCM0+ CMSIS"/>
1677       <require condition="GCC"/>
1678     </condition>
1679
1680     <condition id="ARMCM3 CMSIS">
1681       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1682       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1683       <require Cclass="CMSIS" Cgroup="CORE"/>
1684     </condition>
1685     <condition id="ARMCM3 CMSIS GCC">
1686       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1687       <require condition="ARMCM3 CMSIS"/>
1688       <require condition="GCC"/>
1689     </condition>
1690
1691     <condition id="ARMCM4 CMSIS">
1692       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1693       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1694       <require Cclass="CMSIS" Cgroup="CORE"/>
1695     </condition>
1696     <condition id="ARMCM4 CMSIS GCC">
1697       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1698       <require condition="ARMCM4 CMSIS"/>
1699       <require condition="GCC"/>
1700     </condition>
1701
1702     <condition id="ARMCM7 CMSIS">
1703       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1704       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1705       <require Cclass="CMSIS" Cgroup="CORE"/>
1706     </condition>
1707     <condition id="ARMCM7 CMSIS GCC">
1708       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1709       <require condition="ARMCM7 CMSIS"/>
1710       <require condition="GCC"/>
1711     </condition>
1712
1713     <condition id="ARMCM23 CMSIS">
1714       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1715       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1716       <require Cclass="CMSIS" Cgroup="CORE"/>
1717     </condition>
1718     <condition id="ARMCM23 CMSIS GCC">
1719       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1720       <require condition="ARMCM23 CMSIS"/>
1721       <require condition="GCC"/>
1722     </condition>
1723
1724     <condition id="ARMCM33 CMSIS">
1725       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1726       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1727       <require Cclass="CMSIS" Cgroup="CORE"/>
1728     </condition>
1729     <condition id="ARMCM33 CMSIS GCC">
1730       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1731       <require condition="ARMCM33 CMSIS"/>
1732       <require condition="GCC"/>
1733     </condition>
1734
1735     <condition id="ARMSC000 CMSIS">
1736       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1737       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1738       <require Cclass="CMSIS" Cgroup="CORE"/>
1739     </condition>
1740     <condition id="ARMSC000 CMSIS GCC">
1741       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1742       <require condition="ARMSC000 CMSIS"/>
1743       <require condition="GCC"/>
1744     </condition>
1745
1746     <condition id="ARMSC300 CMSIS">
1747       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1748       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1749       <require Cclass="CMSIS" Cgroup="CORE"/>
1750     </condition>
1751     <condition id="ARMSC300 CMSIS GCC">
1752       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1753       <require condition="ARMSC300 CMSIS"/>
1754       <require condition="GCC"/>
1755     </condition>
1756
1757     <condition id="ARMv8MBL CMSIS">
1758       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1759       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1760       <require Cclass="CMSIS" Cgroup="CORE"/>
1761     </condition>
1762     <condition id="ARMv8MBL CMSIS GCC">
1763       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1764       <require condition="ARMv8MBL CMSIS"/>
1765       <require condition="GCC"/>
1766     </condition>
1767
1768     <condition id="ARMv8MML CMSIS">
1769       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1770       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1771       <require Cclass="CMSIS" Cgroup="CORE"/>
1772     </condition>
1773     <condition id="ARMv8MML CMSIS GCC">
1774       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1775       <require condition="ARMv8MML CMSIS"/>
1776       <require condition="GCC"/>
1777     </condition>
1778
1779     <condition id="ARMCA5 CMSIS">
1780       <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1781       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1782       <require Cclass="CMSIS" Cgroup="CORE"/>
1783     </condition>
1784
1785     <condition id="ARMCA7 CMSIS">
1786       <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1787       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1788       <require Cclass="CMSIS" Cgroup="CORE"/>
1789     </condition>
1790
1791     <condition id="ARMCA9 CMSIS">
1792       <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1793       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1794       <require Cclass="CMSIS" Cgroup="CORE"/>
1795     </condition>
1796
1797     <!-- CMSIS DSP -->
1798     <condition id="CMSIS DSP">
1799       <description>Components required for DSP</description>
1800       <require condition="ARMv6_7_8-M Device"/>
1801       <require condition="ARMCC GCC"/>
1802       <require Cclass="CMSIS" Cgroup="CORE"/>
1803     </condition>
1804
1805     <!-- RTOS RTX -->
1806     <condition id="RTOS RTX">
1807       <description>Components required for RTOS RTX</description>
1808       <require condition="ARMv6_7-M Device"/>
1809       <require condition="ARMCC GCC IAR"/>
1810       <require Cclass="Device" Cgroup="Startup"/>
1811       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1812     </condition>
1813     <condition id="RTOS RTX5">
1814       <description>Components required for RTOS RTX5</description>
1815       <require condition="ARMv6_7_8-M Device"/>
1816       <require condition="ARMCC GCC IAR"/>
1817       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1818     </condition>
1819     <condition id="RTOS2 RTX5">
1820       <description>Components required for RTOS2 RTX5</description>
1821       <accept condition="ARMv6_7_8-M Device"/>
1822       <accept condition="ARMv7-A Device"/>
1823       <require condition="ARMCC GCC IAR"/>
1824       <require Cclass="CMSIS"  Cgroup="CORE"/>
1825       <require Cclass="Device" Cgroup="Startup"/>
1826     </condition>
1827     <condition id="RTOS2 RTX5 Lib">
1828       <description>Components required for RTOS2 RTX5 Library</description>
1829       <require condition="ARMv6_7_8-M Device"/>
1830       <require condition="ARMCC GCC IAR"/>
1831       <require Cclass="CMSIS"  Cgroup="CORE"/>
1832       <require Cclass="Device" Cgroup="Startup"/>
1833     </condition>
1834     <condition id="RTOS2 RTX5 NS">
1835       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1836       <require condition="ARMv8-M TZ Device"/>
1837       <require condition="ARMCC GCC"/>
1838       <require Cclass="CMSIS"  Cgroup="CORE"/>
1839       <require Cclass="Device" Cgroup="Startup"/>
1840     </condition>
1841
1842   </conditions>
1843
1844   <components>
1845     <!-- CMSIS-Core component -->
1846     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.1"  condition="ARMv6_7_8-M Device" >
1847       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1848       <files>
1849         <!-- CPU independent -->
1850         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1851         <file category="include" name="CMSIS/Include/"/>
1852         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1853         <!-- Code template -->
1854         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1855         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1856       </files>
1857     </component>
1858
1859     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.0"  condition="ARMv7-A Device" >
1860       <description>CMSIS-CORE for Cortex-A</description>
1861       <files>
1862         <!-- CPU independent -->
1863         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
1864         <file category="include" name="CMSIS/Core_A/Include/"/>
1865       </files>
1866     </component>
1867
1868     <!-- CMSIS-Startup components -->
1869     <!-- Cortex-M0 -->
1870     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1871       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1872       <files>
1873         <!-- include folder / device header file -->
1874         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1875         <!-- startup / system file -->
1876         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1877         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1878         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1879         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1880         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1881       </files>
1882     </component>
1883     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1884       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1885       <files>
1886         <!-- include folder / device header file -->
1887         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1888         <!-- startup / system file -->
1889         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1890         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1891         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1892       </files>
1893     </component>
1894
1895     <!-- Cortex-M0+ -->
1896     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1897       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1898       <files>
1899         <!-- include folder / device header file -->
1900         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1901         <!-- startup / system file -->
1902         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1903         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1904         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1905         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1906         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1907       </files>
1908     </component>
1909     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1910       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1911       <files>
1912         <!-- include folder / device header file -->
1913         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1914         <!-- startup / system file -->
1915         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1916         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1917         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1918       </files>
1919     </component>
1920
1921     <!-- Cortex-M3 -->
1922     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1923       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1924       <files>
1925         <!-- include folder / device header file -->
1926         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1927         <!-- startup / system file -->
1928         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1929         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1930         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1931         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1932         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1933       </files>
1934     </component>
1935     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1936       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1937       <files>
1938         <!-- include folder / device header file -->
1939         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1940         <!-- startup / system file -->
1941         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1942         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1943         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1944       </files>
1945     </component>
1946
1947     <!-- Cortex-M4 -->
1948     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1949       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1950       <files>
1951         <!-- include folder / device header file -->
1952         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1953         <!-- startup / system file -->
1954         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1955         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1956         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1957         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1958         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1959       </files>
1960     </component>
1961     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1962       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1963       <files>
1964         <!-- include folder / device header file -->
1965         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1966         <!-- startup / system file -->
1967         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1968         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1969         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1970       </files>
1971     </component>
1972
1973     <!-- Cortex-M7 -->
1974     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
1975       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1976       <files>
1977         <!-- include folder / device header file -->
1978         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1979         <!-- startup / system file -->
1980         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1981         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1982         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1983         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1984         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1985       </files>
1986     </component>
1987     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1988       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1989       <files>
1990         <!-- include folder / device header file -->
1991         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1992         <!-- startup / system file -->
1993         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1994         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1995         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1996       </files>
1997     </component>
1998
1999     <!-- Cortex-M23 -->
2000     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2001       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2002       <files>
2003         <!-- include folder / device header file -->
2004         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2005         <!-- startup / system file -->
2006         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2007         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2008         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2009         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2010         <!-- SAU configuration -->
2011         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2012       </files>
2013     </component>
2014     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2015       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2016       <files>
2017         <!-- include folder / device header file -->
2018         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2019         <!-- startup / system file -->
2020         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2021         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2022         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2023         <!-- SAU configuration -->
2024         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2025       </files>
2026     </component>
2027
2028     <!-- Cortex-M33 -->
2029     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2030       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2031       <files>
2032         <!-- include folder / device header file -->
2033         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2034         <!-- startup / system file -->
2035         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2036         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2037         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2038         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2039         <!-- SAU configuration -->
2040         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2041       </files>
2042     </component>
2043     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2044       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2045       <files>
2046         <!-- include folder / device header file -->
2047         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2048         <!-- startup / system file -->
2049         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2050         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2051         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2052         <!-- SAU configuration -->
2053         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2054       </files>
2055     </component>
2056
2057     <!-- Cortex-SC000 -->
2058     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2059       <description>System and Startup for Generic ARM SC000 device</description>
2060       <files>
2061         <!-- include folder / device header file -->
2062         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2063         <!-- startup / system file -->
2064         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2065         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2066         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2067         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2068         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2069       </files>
2070     </component>
2071     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2072       <description>System and Startup for Generic ARM SC000 device</description>
2073       <files>
2074         <!-- include folder / device header file -->
2075         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2076         <!-- startup / system file -->
2077         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2078         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2079         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2080       </files>
2081     </component>
2082
2083     <!-- Cortex-SC300 -->
2084     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2085       <description>System and Startup for Generic ARM SC300 device</description>
2086       <files>
2087         <!-- include folder / device header file -->
2088         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2089         <!-- startup / system file -->
2090         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2091         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2092         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2093         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2094         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2095       </files>
2096     </component>
2097     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2098       <description>System and Startup for Generic ARM SC300 device</description>
2099       <files>
2100         <!-- include folder / device header file -->
2101         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2102         <!-- startup / system file -->
2103         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2104         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2105         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2106       </files>
2107     </component>
2108
2109     <!-- ARMv8MBL -->
2110     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2111       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2112       <files>
2113         <!-- include folder / device header file -->
2114         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2115         <!-- startup / system file -->
2116         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2117         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2118         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2119         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2120         <!-- SAU configuration -->
2121         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2122       </files>
2123     </component>
2124     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2125       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2126       <files>
2127         <!-- include folder / device header file -->
2128         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2129         <!-- startup / system file -->
2130         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2131         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2132         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2133         <!-- SAU configuration -->
2134         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2135       </files>
2136     </component>
2137
2138     <!-- ARMv8MML -->
2139     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2140       <description>System and Startup for Generic ARM ARMv8MML device</description>
2141       <files>
2142         <!-- include folder / device header file -->
2143         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2144         <!-- startup / system file -->
2145         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2146         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2147         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2148         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2149         <!-- SAU configuration -->
2150         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2151       </files>
2152     </component>
2153     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2154       <description>System and Startup for Generic ARM ARMv8MML device</description>
2155       <files>
2156         <!-- include folder / device header file -->
2157         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2158         <!-- startup / system file -->
2159         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2160         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2161         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2162         <!-- SAU configuration -->
2163         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2164       </files>
2165     </component>
2166
2167     <!-- Cortex-A5 -->
2168     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2169       <description>System and Startup for Generic ARM Cortex-A5 device</description>
2170       <files>
2171         <!-- include folder / device header file -->
2172         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2173         <!-- startup / system / mmu files -->
2174         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC"/>
2175         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC"/>
2176         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2177         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2178         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2179         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2180         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2181         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2182
2183       </files>
2184     </component>
2185
2186     <!-- Cortex-A7 -->
2187     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2188       <description>System and Startup for Generic ARM Cortex-A7 device</description>
2189       <files>
2190         <!-- include folder / device header file -->
2191         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2192         <!-- startup / system / mmu files -->
2193         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC"/>
2194         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC"/>
2195         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2196         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2197         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2198         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2199         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2200         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2201       </files>
2202     </component>
2203
2204     <!-- Cortex-A9 -->
2205     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA9 CMSIS">
2206       <description>System and Startup for Generic ARM Cortex-A9 device</description>
2207       <files>
2208         <!-- include folder / device header file -->
2209         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2210         <!-- startup / system / mmu files -->
2211         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC"/>
2212         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC"/>
2213         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2214         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2215         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2216         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2217         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2218         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2219       </files>
2220     </component>
2221
2222     <!-- CMSIS-DSP component -->
2223     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.1" condition="CMSIS DSP">
2224       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2225       <files>
2226         <!-- CPU independent -->
2227         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2228         <file category="header" name="CMSIS/Include/arm_math.h"/>
2229
2230         <!-- CPU and Compiler dependent -->
2231         <!-- ARMCC -->
2232         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2233         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2234         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2235         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2236         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2237         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2238         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2239         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2240         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2241         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2242         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2243         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2244         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2245         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2246
2247         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2248         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2249         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2250         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2251         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2252         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2253         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2254         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2255         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2256         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2257         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2258         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2259
2260         <!-- GCC -->
2261         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2262         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2263         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2264         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2265         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2266         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2267         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2268
2269         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2270         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2271         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2272         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2273         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2274         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2275         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2276         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2277         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2278         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2279         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2280         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2281
2282       </files>
2283     </component>
2284
2285     <!-- CMSIS-RTOS Keil RTX component -->
2286     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0.0" condition="RTOS RTX">
2287       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2288       <RTE_Components_h>
2289         <!-- the following content goes into file 'RTE_Components.h' -->
2290         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2291         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2292       </RTE_Components_h>
2293       <files>
2294         <!-- CPU independent -->
2295         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2296         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2297         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2298
2299         <!-- RTX templates -->
2300         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2301         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2302         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2303         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2304         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2305         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2306         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2307         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2308         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2309         <!-- tool-chain specific template file -->
2310         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2311         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2312         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2313
2314         <!-- CPU and Compiler dependent -->
2315         <!-- ARMCC -->
2316         <file category="library" condition="CM0_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2317         <file category="library" condition="CM0_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2318         <file category="library" condition="CM3_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2319         <file category="library" condition="CM3_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2320         <file category="library" condition="CM4_LE_ARMCC_STD"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2321         <file category="library" condition="CM4_LE_ARMCC_IFX"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2322         <file category="library" condition="CM4_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2323         <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2324         <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2325         <file category="library" condition="CM4_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2326         <file category="library" condition="CM7_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2327         <file category="library" condition="CM7_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2328         <file category="library" condition="CM7_FP_LE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2329         <file category="library" condition="CM7_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2330         <!-- GCC -->
2331         <file category="library" condition="CM0_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2332         <file category="library" condition="CM0_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2333         <file category="library" condition="CM3_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2334         <file category="library" condition="CM3_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2335         <file category="library" condition="CM4_LE_GCC_STD"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2336         <file category="library" condition="CM4_LE_GCC_IFX"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2337         <file category="library" condition="CM4_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2338         <file category="library" condition="CM4_FP_LE_GCC_STD"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2339         <file category="library" condition="CM4_FP_LE_GCC_IFX"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2340         <file category="library" condition="CM4_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2341         <file category="library" condition="CM7_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2342         <file category="library" condition="CM7_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2343         <file category="library" condition="CM7_FP_LE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2344         <file category="library" condition="CM7_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2345         <!-- IAR -->
2346         <file category="library" condition="CM0_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2347         <file category="library" condition="CM0_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2348         <file category="library" condition="CM3_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2349         <file category="library" condition="CM3_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2350         <file category="library" condition="CM4_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2351         <file category="library" condition="CM4_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2352         <file category="library" condition="CM4_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2353         <file category="library" condition="CM4_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2354         <file category="library" condition="CM7_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2355         <file category="library" condition="CM7_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2356         <file category="library" condition="CM7_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2357         <file category="library" condition="CM7_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2358       </files>
2359     </component>
2360
2361     <!-- CMSIS-RTOS Keil RTX5 component -->
2362     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.1.1" Capiversion="1.0.0" condition="RTOS RTX5">
2363       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2364       <RTE_Components_h>
2365         <!-- the following content goes into file 'RTE_Components.h' -->
2366         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2367         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2368       </RTE_Components_h>
2369       <files>
2370         <!-- RTX header file -->
2371         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2372         <!-- RTX compatibility module for API V1 -->
2373         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2374       </files>
2375     </component>
2376
2377     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2378     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.1.1" Capiversion="2.1.0" condition="RTOS2 RTX5 Lib">
2379       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2380       <RTE_Components_h>
2381         <!-- the following content goes into file 'RTE_Components.h' -->
2382         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2383         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2384       </RTE_Components_h>
2385       <files>
2386         <!-- RTX documentation -->
2387         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2388
2389         <!-- RTX header files -->
2390         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2391
2392         <!-- RTX configuration -->
2393         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2394         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2395
2396         <!-- RTX templates -->
2397         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2398         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2399         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2400         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2401         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2402         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2403         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2404         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2405         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="2.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2406         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2407
2408         <!-- RTX library configuration -->
2409         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2410
2411         <!-- RTX libraries (CPU and Compiler dependent) -->
2412         <!-- ARMCC -->
2413         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2414         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2415         <file category="library" condition="CM4_LE_ARMCC_STD"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2416         <file category="library" condition="CM4_FP_LE_ARMCC_STD"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2417         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2418         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2419         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2420         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2421         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2422         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2423         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2424         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2425         <!-- GCC -->
2426         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2427         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2428         <file category="library" condition="CM4_LE_GCC_STD"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2429         <file category="library" condition="CM4_FP_LE_GCC_STD"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2430         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2431         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2432         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2433         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2434         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2435         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2436         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2437         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2438         <!-- IAR -->
2439         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2440         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2441         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2442         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2443         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2444         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2445       </files>
2446     </component>
2447     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.1.1" Capiversion="2.1.0" condition="RTOS2 RTX5 NS">
2448       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2449       <RTE_Components_h>
2450         <!-- the following content goes into file 'RTE_Components.h' -->
2451         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2452         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2453         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2454       </RTE_Components_h>
2455       <files>
2456         <!-- RTX documentation -->
2457         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2458
2459         <!-- RTX header files -->
2460         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2461
2462         <!-- RTX configuration -->
2463         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2464         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2465
2466         <!-- RTX templates -->
2467         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2468         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2469         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2470         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2471         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2472         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2473         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2474         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2475         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2476
2477         <!-- RTX library configuration -->
2478         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2479
2480         <!-- RTX libraries (CPU and Compiler dependent) -->
2481         <!-- ARMCC -->
2482         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2483         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2484         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2485         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2486         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2487         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2488         <!-- GCC -->
2489         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2490         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2491         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2492         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2493         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2494         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2495       </files>
2496     </component>
2497     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.1.1" Capiversion="2.1.0" condition="RTOS2 RTX5">
2498       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2499       <RTE_Components_h>
2500         <!-- the following content goes into file 'RTE_Components.h' -->
2501         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2502         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2503         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2504       </RTE_Components_h>
2505       <files>
2506         <!-- RTX documentation -->
2507         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2508
2509         <!-- RTX header files -->
2510         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2511
2512         <!-- RTX configuration -->
2513         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"               version="5.1.0"/>
2514         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"               version="5.1.0" condition="ARMv6_7_8-M Device" />
2515         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/Cortex_A/RTX_Config.c"      version="5.1.0" condition="Unknown Cortex-A Device"/>
2516         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/Renesas/RZ_A/RTX_Config.c"  version="5.1.0" condition="RZ_A Device"/>
2517
2518         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"                 version="5.1.0" condition="ARMv7-A Device"/>
2519
2520         <!-- RTX templates -->
2521         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2522         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2523         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2524         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2525         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2526         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2527         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2528         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2529         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2530
2531         <!-- RTX sources (core) -->
2532         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2533         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2534         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2535         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2536         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2537         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2538         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2539         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2540         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2541         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2542         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2543         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2544         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_gic.c"             condition="ARMv7-A Device"/>
2545         <!-- RTX sources (library configuration) -->
2546         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2547         <!-- RTX sources (handlers ARMCC) -->
2548         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC"/>
2549                 <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
2550         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2551         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2552         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2553         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2554         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2555         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2556         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2557         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2558         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2559         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2560         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2561         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2562         <!-- RTX sources (handlers GCC) -->
2563         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
2564         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2565         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2566         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2567         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2568         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2569         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2570         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2571         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2572         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2573         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2574         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2575         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2576         <!-- RTX sources (handlers IAR) -->
2577         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
2578         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2579         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2580         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2581         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2582         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2583         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2584       </files>
2585     </component>
2586     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.1.1" Capiversion="2.1.0" condition="RTOS2 RTX5 NS">
2587       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2588       <RTE_Components_h>
2589         <!-- the following content goes into file 'RTE_Components.h' -->
2590         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2591         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2592         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2593         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2594       </RTE_Components_h>
2595       <files>
2596         <!-- RTX documentation -->
2597         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2598
2599         <!-- RTX header files -->
2600         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2601
2602         <!-- RTX configuration -->
2603         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2604         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2605
2606         <!-- RTX templates -->
2607         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2608         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2609         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2610         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2611         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2612         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2613         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2614         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2615         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2616
2617         <!-- RTX sources (core) -->
2618         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2619         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2620         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2621         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2622         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2623         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2624         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2625         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2626         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2627         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2628         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2629         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2630         <!-- RTX sources (library configuration) -->
2631         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2632         <!-- RTX sources (ARMCC handlers) -->
2633         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2634         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2635         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2636         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2637         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2638         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2639         <!-- RTX sources (GCC handlers) -->
2640         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2641         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2642         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2643         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2644         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2645         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2646       </files>
2647     </component>
2648
2649   </components>
2650
2651   <boards>
2652     <board name="uVision Simulator" vendor="Keil">
2653       <description>uVision Simulator</description>
2654       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2655       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2656       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2657       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2658       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2659       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2660       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2661       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2662       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2663       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2664       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2665       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2666       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2667       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2668       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2669       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2670       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2671       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2672    </board>
2673   </boards>
2674
2675   <examples>
2676     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2677       <description>DSP_Lib Class Marks example</description>
2678       <board name="uVision Simulator" vendor="Keil"/>
2679       <project>
2680         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2681       </project>
2682       <attributes>
2683         <component Cclass="CMSIS" Cgroup="CORE"/>
2684         <component Cclass="CMSIS" Cgroup="DSP"/>
2685         <component Cclass="Device" Cgroup="Startup"/>
2686         <category>Getting Started</category>
2687       </attributes>
2688     </example>
2689
2690     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2691       <description>DSP_Lib Convolution example</description>
2692       <board name="uVision Simulator" vendor="Keil"/>
2693       <project>
2694         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2695       </project>
2696       <attributes>
2697         <component Cclass="CMSIS" Cgroup="CORE"/>
2698         <component Cclass="CMSIS" Cgroup="DSP"/>
2699         <component Cclass="Device" Cgroup="Startup"/>
2700         <category>Getting Started</category>
2701       </attributes>
2702     </example>
2703
2704     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2705       <description>DSP_Lib Dotproduct example</description>
2706       <board name="uVision Simulator" vendor="Keil"/>
2707       <project>
2708         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2709       </project>
2710       <attributes>
2711         <component Cclass="CMSIS" Cgroup="CORE"/>
2712         <component Cclass="CMSIS" Cgroup="DSP"/>
2713         <component Cclass="Device" Cgroup="Startup"/>
2714         <category>Getting Started</category>
2715       </attributes>
2716     </example>
2717
2718     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2719       <description>DSP_Lib FFT Bin example</description>
2720       <board name="uVision Simulator" vendor="Keil"/>
2721       <project>
2722         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2723       </project>
2724       <attributes>
2725         <component Cclass="CMSIS" Cgroup="CORE"/>
2726         <component Cclass="CMSIS" Cgroup="DSP"/>
2727         <component Cclass="Device" Cgroup="Startup"/>
2728         <category>Getting Started</category>
2729       </attributes>
2730     </example>
2731
2732     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2733       <description>DSP_Lib FIR example</description>
2734       <board name="uVision Simulator" vendor="Keil"/>
2735       <project>
2736         <environment name="uv" load="arm_fir_example.uvprojx"/>
2737       </project>
2738       <attributes>
2739         <component Cclass="CMSIS" Cgroup="CORE"/>
2740         <component Cclass="CMSIS" Cgroup="DSP"/>
2741         <component Cclass="Device" Cgroup="Startup"/>
2742         <category>Getting Started</category>
2743       </attributes>
2744     </example>
2745
2746     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2747       <description>DSP_Lib Graphic Equalizer example</description>
2748       <board name="uVision Simulator" vendor="Keil"/>
2749       <project>
2750         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2751       </project>
2752       <attributes>
2753         <component Cclass="CMSIS" Cgroup="CORE"/>
2754         <component Cclass="CMSIS" Cgroup="DSP"/>
2755         <component Cclass="Device" Cgroup="Startup"/>
2756         <category>Getting Started</category>
2757       </attributes>
2758     </example>
2759
2760     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2761       <description>DSP_Lib Linear Interpolation example</description>
2762       <board name="uVision Simulator" vendor="Keil"/>
2763       <project>
2764         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2765       </project>
2766       <attributes>
2767         <component Cclass="CMSIS" Cgroup="CORE"/>
2768         <component Cclass="CMSIS" Cgroup="DSP"/>
2769         <component Cclass="Device" Cgroup="Startup"/>
2770         <category>Getting Started</category>
2771       </attributes>
2772     </example>
2773
2774     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2775       <description>DSP_Lib Matrix example</description>
2776       <board name="uVision Simulator" vendor="Keil"/>
2777       <project>
2778         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2779       </project>
2780       <attributes>
2781         <component Cclass="CMSIS" Cgroup="CORE"/>
2782         <component Cclass="CMSIS" Cgroup="DSP"/>
2783         <component Cclass="Device" Cgroup="Startup"/>
2784         <category>Getting Started</category>
2785       </attributes>
2786     </example>
2787
2788     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2789       <description>DSP_Lib Signal Convergence example</description>
2790       <board name="uVision Simulator" vendor="Keil"/>
2791       <project>
2792         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2793       </project>
2794       <attributes>
2795         <component Cclass="CMSIS" Cgroup="CORE"/>
2796         <component Cclass="CMSIS" Cgroup="DSP"/>
2797         <component Cclass="Device" Cgroup="Startup"/>
2798         <category>Getting Started</category>
2799       </attributes>
2800     </example>
2801
2802     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2803       <description>DSP_Lib Sinus/Cosinus example</description>
2804       <board name="uVision Simulator" vendor="Keil"/>
2805       <project>
2806         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2807       </project>
2808       <attributes>
2809         <component Cclass="CMSIS" Cgroup="CORE"/>
2810         <component Cclass="CMSIS" Cgroup="DSP"/>
2811         <component Cclass="Device" Cgroup="Startup"/>
2812         <category>Getting Started</category>
2813       </attributes>
2814     </example>
2815
2816     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2817       <description>DSP_Lib Variance example</description>
2818       <board name="uVision Simulator" vendor="Keil"/>
2819       <project>
2820         <environment name="uv" load="arm_variance_example.uvprojx"/>
2821       </project>
2822       <attributes>
2823         <component Cclass="CMSIS" Cgroup="CORE"/>
2824         <component Cclass="CMSIS" Cgroup="DSP"/>
2825         <component Cclass="Device" Cgroup="Startup"/>
2826         <category>Getting Started</category>
2827       </attributes>
2828     </example>
2829
2830     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2831       <description>CMSIS-RTOS2 Blinky example</description>
2832       <board name="uVision Simulator" vendor="Keil"/>
2833       <project>
2834         <environment name="uv" load="Blinky.uvprojx"/>
2835       </project>
2836       <attributes>
2837         <component Cclass="CMSIS" Cgroup="CORE"/>
2838         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2839         <component Cclass="Device" Cgroup="Startup"/>
2840         <category>Getting Started</category>
2841       </attributes>
2842     </example>
2843
2844     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2845       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2846       <board name="uVision Simulator" vendor="Keil"/>
2847       <project>
2848         <environment name="uv" load="Blinky.uvprojx"/>
2849       </project>
2850       <attributes>
2851         <component Cclass="CMSIS" Cgroup="CORE"/>
2852         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2853         <component Cclass="Device" Cgroup="Startup"/>
2854         <category>Getting Started</category>
2855       </attributes>
2856     </example>
2857
2858     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2859       <description>Bare-metal secure/non-secure example without RTOS</description>
2860       <board name="uVision Simulator" vendor="Keil"/>
2861       <project>
2862         <environment name="uv" load="NoRTOS.uvmpw"/>
2863       </project>
2864       <attributes>
2865         <component Cclass="CMSIS" Cgroup="CORE"/>
2866         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2867         <component Cclass="Device" Cgroup="Startup"/>
2868         <category>Getting Started</category>
2869       </attributes>
2870     </example>
2871
2872     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2873       <description>Secure/non-secure RTOS example with thread context management</description>
2874       <board name="uVision Simulator" vendor="Keil"/>
2875       <project>
2876         <environment name="uv" load="RTOS.uvmpw"/>
2877       </project>
2878       <attributes>
2879         <component Cclass="CMSIS" Cgroup="CORE"/>
2880         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2881         <component Cclass="Device" Cgroup="Startup"/>
2882         <category>Getting Started</category>
2883       </attributes>
2884     </example>
2885
2886     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2887       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2888       <board name="uVision Simulator" vendor="Keil"/>
2889       <project>
2890         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2891       </project>
2892       <attributes>
2893         <component Cclass="CMSIS" Cgroup="CORE"/>
2894         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2895         <component Cclass="Device" Cgroup="Startup"/>
2896         <category>Getting Started</category>
2897       </attributes>
2898     </example>
2899
2900   </examples>
2901
2902 </package>