begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.1.2-dev3">
  12       Active development...
  13       CMSIS-Core(A): 1.0.1 (see revision history for details)
  14         - Added compiler_iccarm.h.
  15         - Added additional access functions for physical timer.
  16       CMSIS-RTOS2:
  17       - API 2.1.2 (see revision history for details)
  18       CMSIS-RTOS2:
  19       - RTX 5.2.3 (see revision history for details)
  20       Devices:
  21        - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
  22        - Added IAR startup code for Cortex-A9
  23     </release>
  24     <release version="5.1.2-dev2">
  25       CMSIS-Core(M): 5.0.3 (see revision history for details)
  26       - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  27       CMSIS-RTOS2:
  28       - RTX 5.2.2 (see revision history for details)
  29     </release>
  30     <release version="5.1.2-dev1">
  31       Devices:
  32       - added GCC startup and linker script for Cortex-A9
  33       CMSIS-Core(M): 5.0.3 (see revision history for details)
  34       - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  35       - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  36       CMSIS-Core(A): 1.0.1 (see revision history for details)
  37       CMSIS-Driver:
  38       - CAN Driver API V1.2.0
  39       CMSIS-RTOS:
  40       - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata
  41       CMSIS-RTOS2:
  42       - RTX 5.2.1 (see revision history for details)
  43       - Message Queue Example
  44       - Memory Pool Example
  45     </release>
  46     <release version="5.1.1" date="2017-09-19">
  47       CMSIS-RTOS2:
  48       - RTX 5.2.1 (see revision history for details)
  49     </release>
  50     <release version="5.1.0" date="2017-08-04">
  51       CMSIS-Core(M): 5.0.2 (see revision history for details)
  52       - Changed Version Control macros to be core agnostic.
  53       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  54       CMSIS-Core(A): 1.0.0 (see revision history for details)
  55       - Initial release
  56       - IRQ Controller API 1.0.0
  57       CMSIS-Driver: 2.05 (see revision history for details)
  58       - All typedefs related to status have been made volatile.
  59       CMSIS-RTOS2:
  60       - API 2.1.1 (see revision history for details)
  61       - RTX 5.2.0 (see revision history for details)
  62       - OS Tick API 1.0.0
  63       CMSIS-DSP: 1.5.2 (see revision history for details)
  64       - Fixed GNU Compiler specific diagnostics.
  65       CMSIS-PACK: 1.5.0 (see revision history for details)
  66       - added System Description File (*.SDF) Format
  67       CMSIS-Zone: 0.0.1 (Preview)
  68       - Initial specification draft
  69     </release>
  70     <release version="5.0.1" date="2017-02-03">
  71       Package Description:
  72       - added taxonomy for Cclass RTOS
  73       CMSIS-RTOS2:
  74       - API 2.1   (see revision history for details)
  75       - RTX 5.1.0 (see revision history for details)
  76       CMSIS-Core: 5.0.1 (see revision history for details)
  77       - Added __PACKED_STRUCT macro
  78       - Added uVisior support
  79       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  80       - Updated template for secure main function (main_s.c)
  81       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  82       CMSIS-DSP: 1.5.1 (see revision history for details)
  83       - added ARMv8M DSP libraries.
  84       CMSIS-PACK:1.4.9 (see revision history for details)
  85       - added Pack Index File specification and schema file
  86     </release>
  87     <release version="5.0.0" date="2016-11-11">
  88       Changed open source license to Apache 2.0
  89       CMSIS_Core:
  90        - Added support for Cortex-M23 and Cortex-M33.
  91        - Added ARMv8-M device configurations for mainline and baseline.
  92        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  93        - Added cmsis_compiler.h to unify compiler behaviour.
  94        - Updated function SCB_EnableICache (for Cortex-M7).
  95        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  96       CMSIS-RTOS:
  97         - bug fix in RTX 4.82 (see revision history for details)
  98       CMSIS-RTOS2:
  99         - new API including compatibility layer to CMSIS-RTOS
 100         - reference implementation based on RTX5
 101         - supports all Cortex-M variants including TrustZone for ARMv8-M
 102       CMSIS-SVD:
 103        - reworked SVD format documentation
 104        - removed SVD file database documentation as SVD files are distributed in packs
 105        - updated SVDConv for Win32 and Linux
 106       CMSIS-DSP:
 107        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 108        - Added DSP libraries build projects to CMSIS pack.
 109     </release>
 110     <release version="4.5.0" date="2015-10-28">
 111       - CMSIS-Core     4.30.0  (see revision history for details)
 112       - CMSIS-DAP      1.1.0   (unchanged)
 113       - CMSIS-Driver   2.04.0  (see revision history for details)
 114       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 115       - CMSIS-PACK     1.4.1   (see revision history for details)
 116       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 117       - CMSIS-SVD      1.3.1   (see revision history for details)
 118     </release>
 119     <release version="4.4.0" date="2015-09-11">
 120       - CMSIS-Core     4.20   (see revision history for details)
 121       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 122       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 123       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 124       - CMSIS-RTOS
 125         -- API         1.02   (unchanged)
 126         -- RTX         4.79   (see revision history for details)
 127       - CMSIS-SVD      1.3.0  (see revision history for details)
 128       - CMSIS-DAP      1.1.0  (extended with SWO support)
 129     </release>
 130     <release version="4.3.0" date="2015-03-20">
 131       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 132       - CMSIS-DSP      1.4.5  (see revision history for details)
 133       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 134       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 135       - CMSIS-RTOS
 136         -- API         1.02   (unchanged)
 137         -- RTX         4.78   (see revision history for details)
 138       - CMSIS-SVD      1.2    (unchanged)
 139     </release>
 140     <release version="4.2.0" date="2014-09-24">
 141       Adding Cortex-M7 support
 142       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 143       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 144       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 145       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 146       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 147     </release>
 148     <release version="4.1.1" date="2014-06-30">
 149       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 150     </release>
 151     <release version="4.1.0" date="2014-06-12">
 152       - CMSIS-Driver   2.02  (incompatible update)
 153       - CMSIS-Pack     1.3   (see revision history for details)
 154       - CMSIS-DSP      1.4.2 (unchanged)
 155       - CMSIS-Core     3.30  (unchanged)
 156       - CMSIS-RTOS RTX 4.74  (unchanged)
 157       - CMSIS-RTOS API 1.02  (unchanged)
 158       - CMSIS-SVD      1.10  (unchanged)
 159       PACK:
 160       - removed G++ specific files from PACK
 161       - added Component Startup variant "C Startup"
 162       - added Pack Checking Utility
 163       - updated conditions to reflect tool-chain dependency
 164       - added Taxonomy for Graphics
 165       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 166     </release>
 167     <release version="4.0.0">
 168       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 169       - CMSIS-Pack     1.1   Preliminary
 170       - CMSIS-DSP      1.4.2 (see revision history for details)
 171       - CMSIS-Core     3.30  (see revision history for details)
 172       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 173       - CMSIS-RTOS API 1.02  (unchanged)
 174       - CMSIS-SVD      1.10  (unchanged)
 175     </release>
 176     <release version="3.20.4">
 177       - CMSIS-RTOS 4.74 (see revision history for details)
 178       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 179     </release>
 180     <release version="3.20.3">
 181       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 182       - CMSIS-RTOS 4.73 (see revision history for details)
 183     </release>
 184     <release version="3.20.2">
 185       - CMSIS-Pack documentation has been added
 186       - CMSIS-Drivers header and documentation have been added to PACK
 187       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 188     </release>
 189     <release version="3.20.1">
 190       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 191       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 192     </release>
 193     <release version="3.20.0">
 194       The software portions that are deployed in the application program are now under a BSD license which allows usage
 195       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 196       The individual components have been update as listed below:
 197       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 198       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 199       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 200       - CMSIS-SVD is unchanged.
 201     </release>
 202   </releases>
 203
 204   <taxonomy>
 205     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 206     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 207     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 208     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 209     <description Cclass="File System">File Drive Support and File System</description>
 210     <description Cclass="Graphics">Graphical User Interface</description>
 211     <description Cclass="Network">Network Stack using Internet Protocols</description>
 212     <description Cclass="USB">Universal Serial Bus Stack</description>
 213     <description Cclass="Compiler">Compiler Software Extensions</description>
 214     <description Cclass="RTOS">Real-time Operating System</description>
 215   </taxonomy>
 216
 217   <devices>
 218     <!-- ******************************  Cortex-M0  ****************************** -->
 219     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 220       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 221       <description>
 222 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 223 - simple, easy-to-use programmers model
 224 - highly efficient ultra-low power operation
 225 - excellent code density
 226 - deterministic, high-performance interrupt handling
 227 - upward compatibility with the rest of the Cortex-M processor family.
 228       </description>
 229       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 230       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 231       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 232       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 233
 234       <device Dname="ARMCM0">
 235         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 236         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 237       </device>
 238     </family>
 239
 240     <!-- ******************************  Cortex-M0P  ****************************** -->
 241     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 242       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 243       <description>
 244 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 245 - simple, easy-to-use programmers model
 246 - highly efficient ultra-low power operation
 247 - excellent code density
 248 - deterministic, high-performance interrupt handling
 249 - upward compatibility with the rest of the Cortex-M processor family.
 250       </description>
 251       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 252       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 253       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 254       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 255
 256       <device Dname="ARMCM0P">
 257         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 258         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 259       </device>
 260
 261       <device Dname="ARMCM0P_MPU">
 262         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 263         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 264       </device>
 265     </family>
 266
 267     <!-- ******************************  Cortex-M3  ****************************** -->
 268     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 269       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 270       <description>
 271 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 272 - simple, easy-to-use programmers model
 273 - highly efficient ultra-low power operation
 274 - excellent code density
 275 - deterministic, high-performance interrupt handling
 276 - upward compatibility with the rest of the Cortex-M processor family.
 277       </description>
 278       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 279       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 280       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 281       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 282
 283       <device Dname="ARMCM3">
 284         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 285         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 286       </device>
 287     </family>
 288
 289     <!-- ******************************  Cortex-M4  ****************************** -->
 290     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 291       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 292       <description>
 293 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 294 - simple, easy-to-use programmers model
 295 - highly efficient ultra-low power operation
 296 - excellent code density
 297 - deterministic, high-performance interrupt handling
 298 - upward compatibility with the rest of the Cortex-M processor family.
 299       </description>
 300       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 301       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 302       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 303       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 304
 305       <device Dname="ARMCM4">
 306         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 307         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 308       </device>
 309
 310       <device Dname="ARMCM4_FP">
 311         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 312         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 313       </device>
 314     </family>
 315
 316     <!-- ******************************  Cortex-M7  ****************************** -->
 317     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 318       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 319       <description>
 320 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 321 - simple, easy-to-use programmers model
 322 - highly efficient ultra-low power operation
 323 - excellent code density
 324 - deterministic, high-performance interrupt handling
 325 - upward compatibility with the rest of the Cortex-M processor family.
 326       </description>
 327       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 328       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 329       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 330       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 331
 332       <device Dname="ARMCM7">
 333         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 334         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 335       </device>
 336
 337       <device Dname="ARMCM7_SP">
 338         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 339         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 340       </device>
 341
 342       <device Dname="ARMCM7_DP">
 343         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 344         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 345       </device>
 346     </family>
 347
 348     <!-- ******************************  Cortex-M23  ********************** -->
 349     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 350       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 351       <description>
 352 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 353 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 354 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 355       </description>
 356       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 357       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 358       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 359       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 360       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 361       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 362
 363       <device Dname="ARMCM23">
 364         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 365         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 366       </device>
 367
 368       <device Dname="ARMCM23_TZ">
 369         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 370         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 371       </device>
 372     </family>
 373
 374     <!-- ******************************  Cortex-M33  ****************************** -->
 375     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 376       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 377       <description>
 378 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 379 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 380       </description>
 381       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 382       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 383       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 384       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 385       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 386       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 387
 388       <device Dname="ARMCM33">
 389         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 390         <description>
 391           no DSP Instructions, no Floating Point Unit, no TrustZone
 392         </description>
 393         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 394       </device>
 395
 396       <device Dname="ARMCM33_TZ">
 397         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 398         <description>
 399           no DSP Instructions, no Floating Point Unit, TrustZone
 400         </description>
 401         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 402       </device>
 403
 404       <device Dname="ARMCM33_DSP_FP">
 405         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 406         <description>
 407           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 408         </description>
 409         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 410       </device>
 411
 412       <device Dname="ARMCM33_DSP_FP_TZ">
 413         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 414         <description>
 415           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 416         </description>
 417         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 418       </device>
 419     </family>
 420
 421     <!-- ******************************  ARMSC000  ****************************** -->
 422     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 423       <description>
 424 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 425 - simple, easy-to-use programmers model
 426 - highly efficient ultra-low power operation
 427 - excellent code density
 428 - deterministic, high-performance interrupt handling
 429       </description>
 430       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 431       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 432       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 433       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 434
 435       <device Dname="ARMSC000">
 436         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 437         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 438       </device>
 439     </family>
 440
 441     <!-- ******************************  ARMSC300  ****************************** -->
 442     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 443       <description>
 444 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 445 - simple, easy-to-use programmers model
 446 - highly efficient ultra-low power operation
 447 - excellent code density
 448 - deterministic, high-performance interrupt handling
 449       </description>
 450       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 451       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 452       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 453       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 454
 455       <device Dname="ARMSC300">
 456         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 457         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 458       </device>
 459     </family>
 460
 461     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 462     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 463       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 464       <description>
 465 ARMv8-M Baseline based device with TrustZone
 466       </description>
 467       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 468       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 469       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 470       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 471       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 472       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 473
 474       <device Dname="ARMv8MBL">
 475         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 476         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 477       </device>
 478     </family>
 479
 480     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 481     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 482       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 483       <description>
 484 ARMv8-M Mainline based device with TrustZone
 485       </description>
 486       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 487       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 488       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 489       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 490       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 491       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 492
 493       <device Dname="ARMv8MML">
 494         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 495         <description>
 496           no DSP Instructions, no Floating Point Unit, TrustZone
 497         </description>
 498         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 499       </device>
 500
 501       <device Dname="ARMv8MML_DSP">
 502         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 503         <description>
 504           DSP Instructions, no Floating Point Unit, TrustZone
 505         </description>
 506         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 507       </device>
 508
 509       <device Dname="ARMv8MML_SP">
 510         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 511         <description>
 512           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 513         </description>
 514         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 515       </device>
 516
 517       <device Dname="ARMv8MML_DSP_SP">
 518         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 519         <description>
 520           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 521         </description>
 522         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 523       </device>
 524
 525       <device Dname="ARMv8MML_DP">
 526         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 527         <description>
 528           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 529         </description>
 530         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 531       </device>
 532
 533       <device Dname="ARMv8MML_DSP_DP">
 534         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 535         <description>
 536           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 537         </description>
 538         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 539       </device>
 540     </family>
 541
 542     <!-- ******************************  Cortex-A5  ****************************** -->
 543     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 544       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 545       <description>
 546 The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
 547 virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
 548 ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 549       </description>
 550
 551       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 552       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 553
 554       <device Dname="ARMCA5">
 555         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 556         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 557       </device>
 558     </family>
 559
 560     <!-- ******************************  Cortex-A7  ****************************** -->
 561     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 562       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 563       <description>
 564 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
 565 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 566 an optional integrated GIC, and an optional L2 cache controller.
 567       </description>
 568
 569       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 570       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 571
 572       <device Dname="ARMCA7">
 573         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 574         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 575       </device>
 576     </family>
 577
 578     <!-- ******************************  Cortex-A9  ****************************** -->
 579     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 580       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 581       <description>
 582 The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 583 The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
 584 and 8-bit Java bytecodes in Jazelle state.
 585       </description>
 586
 587       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 588       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 589
 590       <device Dname="ARMCA9">
 591         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 592         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 593       </device>
 594     </family>
 595   </devices>
 596
 597
 598   <apis>
 599     <!-- CMSIS Device API -->
 600     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 601       <description>Device interrupt controller interface</description>
 602       <files>
 603         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 604       </files>
 605     </api>
 606     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.0" exclusive="1">
 607       <description>RTOS Kernel system tick timer interface</description>
 608       <files>
 609         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 610       </files>
 611     </api>
 612     <!-- CMSIS-RTOS API -->
 613     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 614       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 615       <files>
 616         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 617       </files>
 618     </api>
 619     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.2" exclusive="1">
 620       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 621       <files>
 622         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 623         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 624       </files>
 625     </api>
 626     <!-- CMSIS Driver API -->
 627     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 628       <description>USART Driver API for Cortex-M</description>
 629       <files>
 630         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 631         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 632       </files>
 633     </api>
 634     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 635       <description>SPI Driver API for Cortex-M</description>
 636       <files>
 637         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 638         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 639       </files>
 640     </api>
 641     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 642       <description>SAI Driver API for Cortex-M</description>
 643       <files>
 644         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 645         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 646       </files>
 647     </api>
 648     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 649       <description>I2C Driver API for Cortex-M</description>
 650       <files>
 651         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 652         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 653       </files>
 654     </api>
 655     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 656       <description>CAN Driver API for Cortex-M</description>
 657       <files>
 658         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 659         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 660       </files>
 661     </api>
 662     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
 663       <description>Flash Driver API for Cortex-M</description>
 664       <files>
 665         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 666         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 667       </files>
 668     </api>
 669     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 670       <description>MCI Driver API for Cortex-M</description>
 671       <files>
 672         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 673         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 674       </files>
 675     </api>
 676     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
 677       <description>NAND Flash Driver API for Cortex-M</description>
 678       <files>
 679         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 680         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 681       </files>
 682     </api>
 683     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 684       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 685       <files>
 686         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 687         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 688         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 689       </files>
 690     </api>
 691     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 692       <description>Ethernet MAC Driver API for Cortex-M</description>
 693       <files>
 694         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 695         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 696       </files>
 697     </api>
 698     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 699       <description>Ethernet PHY Driver API for Cortex-M</description>
 700       <files>
 701         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 702         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 703       </files>
 704     </api>
 705     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 706       <description>USB Device Driver API for Cortex-M</description>
 707       <files>
 708         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 709         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 710       </files>
 711     </api>
 712     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 713       <description>USB Host Driver API for Cortex-M</description>
 714       <files>
 715         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 716         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 717       </files>
 718     </api>
 719   </apis>
 720
 721   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 722   <conditions>
 723     <!-- compiler -->
 724     <condition id="ARMCC6">
 725       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 726       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 727     </condition>
 728     <condition id="ARMCC5">
 729       <require Tcompiler="ARMCC" Toptions="AC5"/>
 730     </condition>
 731     <condition id="ARMCC">
 732       <require Tcompiler="ARMCC"/>
 733     </condition>
 734     <condition id="GCC">
 735       <require Tcompiler="GCC"/>
 736     </condition>
 737     <condition id="IAR">
 738       <require Tcompiler="IAR"/>
 739     </condition>
 740     <condition id="ARMCC GCC">
 741       <accept Tcompiler="ARMCC"/>
 742       <accept Tcompiler="GCC"/>
 743     </condition>
 744     <condition id="ARMCC GCC IAR">
 745       <accept Tcompiler="ARMCC"/>
 746       <accept Tcompiler="GCC"/>
 747       <accept Tcompiler="IAR"/>
 748     </condition>
 749
 750     <!-- ARM architecture -->
 751     <condition id="ARMv6-M Device">
 752       <description>ARMv6-M architecture based device</description>
 753       <accept Dcore="Cortex-M0"/>
 754       <accept Dcore="Cortex-M0+"/>
 755       <accept Dcore="SC000"/>
 756     </condition>
 757     <condition id="ARMv7-M Device">
 758       <description>ARMv7-M architecture based device</description>
 759       <accept Dcore="Cortex-M3"/>
 760       <accept Dcore="Cortex-M4"/>
 761       <accept Dcore="Cortex-M7"/>
 762       <accept Dcore="SC300"/>
 763     </condition>
 764     <condition id="ARMv8-M Device">
 765       <description>ARMv8-M architecture based device</description>
 766       <accept Dcore="ARMV8MBL"/>
 767       <accept Dcore="ARMV8MML"/>
 768       <accept Dcore="Cortex-M23"/>
 769       <accept Dcore="Cortex-M33"/>
 770     </condition>
 771     <condition id="ARMv8-M TZ Device">
 772       <description>ARMv8-M architecture based device with TrustZone</description>
 773       <require condition="ARMv8-M Device"/>
 774       <require Dtz="TZ"/>
 775     </condition>
 776     <condition id="ARMv6_7-M Device">
 777       <description>ARMv6_7-M architecture based device</description>
 778       <accept condition="ARMv6-M Device"/>
 779       <accept condition="ARMv7-M Device"/>
 780     </condition>
 781     <condition id="ARMv6_7_8-M Device">
 782       <description>ARMv6_7_8-M architecture based device</description>
 783       <accept condition="ARMv6-M Device"/>
 784       <accept condition="ARMv7-M Device"/>
 785       <accept condition="ARMv8-M Device"/>
 786     </condition>
 787     <condition id="ARMv7-A Device">
 788       <description>ARMv7-A architecture based device</description>
 789       <accept Dcore="Cortex-A5"/>
 790       <accept Dcore="Cortex-A7"/>
 791       <accept Dcore="Cortex-A9"/>
 792     </condition>
 793
 794     <!-- ARM core -->
 795     <condition id="CM0">
 796       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 797       <accept Dcore="Cortex-M0"/>
 798       <accept Dcore="Cortex-M0+"/>
 799       <accept Dcore="SC000"/>
 800     </condition>
 801     <condition id="CM3">
 802       <description>Cortex-M3 or SC300 processor based device</description>
 803       <accept Dcore="Cortex-M3"/>
 804       <accept Dcore="SC300"/>
 805     </condition>
 806     <condition id="CM4">
 807       <description>Cortex-M4 processor based device</description>
 808       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 809     </condition>
 810     <condition id="CM4_FP">
 811       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 812       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 813     </condition>
 814     <condition id="CM7">
 815       <description>Cortex-M7 processor based device</description>
 816       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 817     </condition>
 818     <condition id="CM7_FP">
 819       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 820       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 821       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 822     </condition>
 823     <condition id="CM7_SP">
 824       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 825       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 826     </condition>
 827     <condition id="CM7_DP">
 828       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 829       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 830     </condition>
 831     <condition id="CM23">
 832       <description>Cortex-M23 processor based device</description>
 833       <require Dcore="Cortex-M23"/>
 834     </condition>
 835     <condition id="CM33">
 836       <description>Cortex-M33 processor based device</description>
 837       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 838     </condition>
 839     <condition id="CM33_FP">
 840       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 841       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 842     </condition>
 843     <condition id="ARMv8MBL">
 844       <description>ARMv8-M Baseline processor based device</description>
 845       <require Dcore="ARMV8MBL"/>
 846     </condition>
 847     <condition id="ARMv8MML">
 848       <description>ARMv8-M Mainline processor based device</description>
 849       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 850     </condition>
 851     <condition id="ARMv8MML_FP">
 852       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 853       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 854       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 855     </condition>
 856
 857     <condition id="CM33_NODSP_NOFPU">
 858       <description>CM33, no DSP, no FPU</description>
 859       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 860     </condition>
 861     <condition id="CM33_DSP_NOFPU">
 862       <description>CM33, DSP, no FPU</description>
 863       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 864     </condition>
 865     <condition id="CM33_NODSP_SP">
 866       <description>CM33, no DSP, SP FPU</description>
 867       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 868     </condition>
 869     <condition id="CM33_DSP_SP">
 870       <description>CM33, DSP, SP FPU</description>
 871       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 872     </condition>
 873
 874     <condition id="ARMv8MML_NODSP_NOFPU">
 875       <description>ARMv8MML, no DSP, no FPU</description>
 876       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 877     </condition>
 878     <condition id="ARMv8MML_DSP_NOFPU">
 879       <description>ARMv8MML, DSP, no FPU</description>
 880       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 881     </condition>
 882     <condition id="ARMv8MML_NODSP_SP">
 883       <description>ARMv8MML, no DSP, SP FPU</description>
 884       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 885     </condition>
 886     <condition id="ARMv8MML_DSP_SP">
 887       <description>ARMv8MML, DSP, SP FPU</description>
 888       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 889     </condition>
 890
 891     <condition id="CA5_CA9">
 892       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 893       <accept Dcore="Cortex-A5"/>
 894       <accept Dcore="Cortex-A9"/>
 895     </condition>
 896
 897     <condition id="CA7">
 898       <description>Cortex-A7 processor based device</description>
 899       <accept Dcore="Cortex-A7"/>
 900     </condition>
 901
 902     <!-- ARMCC compiler -->
 903     <condition id="CA_ARMCC5">
 904       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
 905       <require condition="ARMv7-A Device"/>
 906       <require condition="ARMCC5"/>
 907     </condition>
 908     <condition id="CA_ARMCC6">
 909       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
 910       <require condition="ARMv7-A Device"/>
 911       <require condition="ARMCC6"/>
 912     </condition>
 913
 914     <condition id="CM0_ARMCC">
 915       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 916       <require condition="CM0"/>
 917       <require Tcompiler="ARMCC"/>
 918     </condition>
 919     <condition id="CM0_LE_ARMCC">
 920       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 921       <require condition="CM0_ARMCC"/>
 922       <require Dendian="Little-endian"/>
 923     </condition>
 924     <condition id="CM0_BE_ARMCC">
 925       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 926       <require condition="CM0_ARMCC"/>
 927       <require Dendian="Big-endian"/>
 928     </condition>
 929
 930     <condition id="CM3_ARMCC">
 931       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 932       <require condition="CM3"/>
 933       <require Tcompiler="ARMCC"/>
 934     </condition>
 935     <condition id="CM3_LE_ARMCC">
 936       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 937       <require condition="CM3_ARMCC"/>
 938       <require Dendian="Little-endian"/>
 939     </condition>
 940     <condition id="CM3_BE_ARMCC">
 941       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 942       <require condition="CM3_ARMCC"/>
 943       <require Dendian="Big-endian"/>
 944     </condition>
 945
 946     <condition id="CM4_ARMCC">
 947       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 948       <require condition="CM4"/>
 949       <require Tcompiler="ARMCC"/>
 950     </condition>
 951     <condition id="CM4_LE_ARMCC">
 952       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 953       <require condition="CM4_ARMCC"/>
 954       <require Dendian="Little-endian"/>
 955     </condition>
 956     <condition id="CM4_BE_ARMCC">
 957       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 958       <require condition="CM4_ARMCC"/>
 959       <require Dendian="Big-endian"/>
 960     </condition>
 961
 962     <condition id="CM4_FP_ARMCC">
 963       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 964       <require condition="CM4_FP"/>
 965       <require Tcompiler="ARMCC"/>
 966     </condition>
 967     <condition id="CM4_FP_LE_ARMCC">
 968       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 969       <require condition="CM4_FP_ARMCC"/>
 970       <require Dendian="Little-endian"/>
 971     </condition>
 972     <condition id="CM4_FP_BE_ARMCC">
 973       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 974       <require condition="CM4_FP_ARMCC"/>
 975       <require Dendian="Big-endian"/>
 976     </condition>
 977
 978     <condition id="CM7_ARMCC">
 979       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 980       <require condition="CM7"/>
 981       <require Tcompiler="ARMCC"/>
 982     </condition>
 983     <condition id="CM7_LE_ARMCC">
 984       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 985       <require condition="CM7_ARMCC"/>
 986       <require Dendian="Little-endian"/>
 987     </condition>
 988     <condition id="CM7_BE_ARMCC">
 989       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 990       <require condition="CM7_ARMCC"/>
 991       <require Dendian="Big-endian"/>
 992     </condition>
 993
 994     <condition id="CM7_FP_ARMCC">
 995       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 996       <require condition="CM7_FP"/>
 997       <require Tcompiler="ARMCC"/>
 998     </condition>
 999     <condition id="CM7_FP_LE_ARMCC">
1000       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1001       <require condition="CM7_FP_ARMCC"/>
1002       <require Dendian="Little-endian"/>
1003     </condition>
1004     <condition id="CM7_FP_BE_ARMCC">
1005       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1006       <require condition="CM7_FP_ARMCC"/>
1007       <require Dendian="Big-endian"/>
1008     </condition>
1009
1010     <condition id="CM7_SP_ARMCC">
1011       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1012       <require condition="CM7_SP"/>
1013       <require Tcompiler="ARMCC"/>
1014     </condition>
1015     <condition id="CM7_SP_LE_ARMCC">
1016       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1017       <require condition="CM7_SP_ARMCC"/>
1018       <require Dendian="Little-endian"/>
1019     </condition>
1020     <condition id="CM7_SP_BE_ARMCC">
1021       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1022       <require condition="CM7_SP_ARMCC"/>
1023       <require Dendian="Big-endian"/>
1024     </condition>
1025
1026     <condition id="CM7_DP_ARMCC">
1027       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1028       <require condition="CM7_DP"/>
1029       <require Tcompiler="ARMCC"/>
1030     </condition>
1031     <condition id="CM7_DP_LE_ARMCC">
1032       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1033       <require condition="CM7_DP_ARMCC"/>
1034       <require Dendian="Little-endian"/>
1035     </condition>
1036     <condition id="CM7_DP_BE_ARMCC">
1037       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1038       <require condition="CM7_DP_ARMCC"/>
1039       <require Dendian="Big-endian"/>
1040     </condition>
1041
1042     <condition id="CM23_ARMCC">
1043       <description>Cortex-M23 processor based device for the ARM Compiler</description>
1044       <require condition="CM23"/>
1045       <require Tcompiler="ARMCC"/>
1046     </condition>
1047     <condition id="CM23_LE_ARMCC">
1048       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1049       <require condition="CM23_ARMCC"/>
1050       <require Dendian="Little-endian"/>
1051     </condition>
1052     <condition id="CM23_BE_ARMCC">
1053       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1054       <require condition="CM23_ARMCC"/>
1055       <require Dendian="Big-endian"/>
1056     </condition>
1057
1058     <condition id="CM33_ARMCC">
1059       <description>Cortex-M33 processor based device for the ARM Compiler</description>
1060       <require condition="CM33"/>
1061       <require Tcompiler="ARMCC"/>
1062     </condition>
1063     <condition id="CM33_LE_ARMCC">
1064       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1065       <require condition="CM33_ARMCC"/>
1066       <require Dendian="Little-endian"/>
1067     </condition>
1068     <condition id="CM33_BE_ARMCC">
1069       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1070       <require condition="CM33_ARMCC"/>
1071       <require Dendian="Big-endian"/>
1072     </condition>
1073
1074     <condition id="CM33_FP_ARMCC">
1075       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1076       <require condition="CM33_FP"/>
1077       <require Tcompiler="ARMCC"/>
1078     </condition>
1079     <condition id="CM33_FP_LE_ARMCC">
1080       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1081       <require condition="CM33_FP_ARMCC"/>
1082       <require Dendian="Little-endian"/>
1083     </condition>
1084     <condition id="CM33_FP_BE_ARMCC">
1085       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1086       <require condition="CM33_FP_ARMCC"/>
1087       <require Dendian="Big-endian"/>
1088     </condition>
1089
1090     <condition id="CM33_NODSP_NOFPU_ARMCC">
1091       <description>CM33, no DSP, no FPU, ARM Compiler</description>
1092       <require condition="CM33_NODSP_NOFPU"/>
1093       <require Tcompiler="ARMCC"/>
1094     </condition>
1095     <condition id="CM33_DSP_NOFPU_ARMCC">
1096       <description>CM33, DSP, no FPU, ARM Compiler</description>
1097       <require condition="CM33_DSP_NOFPU"/>
1098       <require Tcompiler="ARMCC"/>
1099     </condition>
1100     <condition id="CM33_NODSP_SP_ARMCC">
1101       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1102       <require condition="CM33_NODSP_SP"/>
1103       <require Tcompiler="ARMCC"/>
1104     </condition>
1105     <condition id="CM33_DSP_SP_ARMCC">
1106       <description>CM33, DSP, SP FPU, ARM Compiler</description>
1107       <require condition="CM33_DSP_SP"/>
1108       <require Tcompiler="ARMCC"/>
1109     </condition>
1110     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1111       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1112       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1113       <require Dendian="Little-endian"/>
1114     </condition>
1115     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1116       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1117       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1118       <require Dendian="Little-endian"/>
1119     </condition>
1120     <condition id="CM33_NODSP_SP_LE_ARMCC">
1121       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1122       <require condition="CM33_NODSP_SP_ARMCC"/>
1123       <require Dendian="Little-endian"/>
1124     </condition>
1125     <condition id="CM33_DSP_SP_LE_ARMCC">
1126       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
1127       <require condition="CM33_DSP_SP_ARMCC"/>
1128       <require Dendian="Little-endian"/>
1129     </condition>
1130
1131     <condition id="ARMv8MBL_ARMCC">
1132       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1133       <require condition="ARMv8MBL"/>
1134       <require Tcompiler="ARMCC"/>
1135     </condition>
1136     <condition id="ARMv8MBL_LE_ARMCC">
1137       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1138       <require condition="ARMv8MBL_ARMCC"/>
1139       <require Dendian="Little-endian"/>
1140     </condition>
1141     <condition id="ARMv8MBL_BE_ARMCC">
1142       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1143       <require condition="ARMv8MBL_ARMCC"/>
1144       <require Dendian="Big-endian"/>
1145     </condition>
1146
1147     <condition id="ARMv8MML_ARMCC">
1148       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1149       <require condition="ARMv8MML"/>
1150       <require Tcompiler="ARMCC"/>
1151     </condition>
1152     <condition id="ARMv8MML_LE_ARMCC">
1153       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1154       <require condition="ARMv8MML_ARMCC"/>
1155       <require Dendian="Little-endian"/>
1156     </condition>
1157     <condition id="ARMv8MML_BE_ARMCC">
1158       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1159       <require condition="ARMv8MML_ARMCC"/>
1160       <require Dendian="Big-endian"/>
1161     </condition>
1162
1163     <condition id="ARMv8MML_FP_ARMCC">
1164       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1165       <require condition="ARMv8MML_FP"/>
1166       <require Tcompiler="ARMCC"/>
1167     </condition>
1168     <condition id="ARMv8MML_FP_LE_ARMCC">
1169       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1170       <require condition="ARMv8MML_FP_ARMCC"/>
1171       <require Dendian="Little-endian"/>
1172     </condition>
1173     <condition id="ARMv8MML_FP_BE_ARMCC">
1174       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1175       <require condition="ARMv8MML_FP_ARMCC"/>
1176       <require Dendian="Big-endian"/>
1177     </condition>
1178
1179     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1180       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1181       <require condition="ARMv8MML_NODSP_NOFPU"/>
1182       <require Tcompiler="ARMCC"/>
1183     </condition>
1184     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1185       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1186       <require condition="ARMv8MML_DSP_NOFPU"/>
1187       <require Tcompiler="ARMCC"/>
1188     </condition>
1189     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1190       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1191       <require condition="ARMv8MML_NODSP_SP"/>
1192       <require Tcompiler="ARMCC"/>
1193     </condition>
1194     <condition id="ARMv8MML_DSP_SP_ARMCC">
1195       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1196       <require condition="ARMv8MML_DSP_SP"/>
1197       <require Tcompiler="ARMCC"/>
1198     </condition>
1199     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1200       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1201       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1202       <require Dendian="Little-endian"/>
1203     </condition>
1204     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1205       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1206       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1207       <require Dendian="Little-endian"/>
1208     </condition>
1209     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1210       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1211       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1212       <require Dendian="Little-endian"/>
1213     </condition>
1214     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1215       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1216       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1217       <require Dendian="Little-endian"/>
1218     </condition>
1219
1220     <!-- GCC compiler -->
1221     <condition id="CA_GCC">
1222       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1223       <require condition="ARMv7-A Device"/>
1224       <require Tcompiler="GCC"/>
1225     </condition>
1226
1227     <condition id="CM0_GCC">
1228       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1229       <require condition="CM0"/>
1230       <require Tcompiler="GCC"/>
1231     </condition>
1232     <condition id="CM0_LE_GCC">
1233       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1234       <require condition="CM0_GCC"/>
1235       <require Dendian="Little-endian"/>
1236     </condition>
1237     <condition id="CM0_BE_GCC">
1238       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1239       <require condition="CM0_GCC"/>
1240       <require Dendian="Big-endian"/>
1241     </condition>
1242
1243     <condition id="CM3_GCC">
1244       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1245       <require condition="CM3"/>
1246       <require Tcompiler="GCC"/>
1247     </condition>
1248     <condition id="CM3_LE_GCC">
1249       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1250       <require condition="CM3_GCC"/>
1251       <require Dendian="Little-endian"/>
1252     </condition>
1253     <condition id="CM3_BE_GCC">
1254       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1255       <require condition="CM3_GCC"/>
1256       <require Dendian="Big-endian"/>
1257     </condition>
1258
1259     <condition id="CM4_GCC">
1260       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1261       <require condition="CM4"/>
1262       <require Tcompiler="GCC"/>
1263     </condition>
1264     <condition id="CM4_LE_GCC">
1265       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1266       <require condition="CM4_GCC"/>
1267       <require Dendian="Little-endian"/>
1268     </condition>
1269     <condition id="CM4_BE_GCC">
1270       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1271       <require condition="CM4_GCC"/>
1272       <require Dendian="Big-endian"/>
1273     </condition>
1274
1275     <condition id="CM4_FP_GCC">
1276       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1277       <require condition="CM4_FP"/>
1278       <require Tcompiler="GCC"/>
1279     </condition>
1280     <condition id="CM4_FP_LE_GCC">
1281       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1282       <require condition="CM4_FP_GCC"/>
1283       <require Dendian="Little-endian"/>
1284     </condition>
1285     <condition id="CM4_FP_BE_GCC">
1286       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1287       <require condition="CM4_FP_GCC"/>
1288       <require Dendian="Big-endian"/>
1289     </condition>
1290
1291     <condition id="CM7_GCC">
1292       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1293       <require condition="CM7"/>
1294       <require Tcompiler="GCC"/>
1295     </condition>
1296     <condition id="CM7_LE_GCC">
1297       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1298       <require condition="CM7_GCC"/>
1299       <require Dendian="Little-endian"/>
1300     </condition>
1301     <condition id="CM7_BE_GCC">
1302       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1303       <require condition="CM7_GCC"/>
1304       <require Dendian="Big-endian"/>
1305     </condition>
1306
1307     <condition id="CM7_FP_GCC">
1308       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1309       <require condition="CM7_FP"/>
1310       <require Tcompiler="GCC"/>
1311     </condition>
1312     <condition id="CM7_FP_LE_GCC">
1313       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1314       <require condition="CM7_FP_GCC"/>
1315       <require Dendian="Little-endian"/>
1316     </condition>
1317     <condition id="CM7_FP_BE_GCC">
1318       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1319       <require condition="CM7_FP_GCC"/>
1320       <require Dendian="Big-endian"/>
1321     </condition>
1322
1323     <condition id="CM7_SP_GCC">
1324       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1325       <require condition="CM7_SP"/>
1326       <require Tcompiler="GCC"/>
1327     </condition>
1328     <condition id="CM7_SP_LE_GCC">
1329       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1330       <require condition="CM7_SP_GCC"/>
1331       <require Dendian="Little-endian"/>
1332     </condition>
1333     <condition id="CM7_SP_BE_GCC">
1334       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1335       <require condition="CM7_SP_GCC"/>
1336       <require Dendian="Big-endian"/>
1337     </condition>
1338
1339     <condition id="CM7_DP_GCC">
1340       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1341       <require condition="CM7_DP"/>
1342       <require Tcompiler="GCC"/>
1343     </condition>
1344     <condition id="CM7_DP_LE_GCC">
1345       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1346       <require condition="CM7_DP_GCC"/>
1347       <require Dendian="Little-endian"/>
1348     </condition>
1349     <condition id="CM7_DP_BE_GCC">
1350       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1351       <require condition="CM7_DP_GCC"/>
1352       <require Dendian="Big-endian"/>
1353     </condition>
1354
1355     <condition id="CM23_GCC">
1356       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1357       <require condition="CM23"/>
1358       <require Tcompiler="GCC"/>
1359     </condition>
1360     <condition id="CM23_LE_GCC">
1361       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1362       <require condition="CM23_GCC"/>
1363       <require Dendian="Little-endian"/>
1364     </condition>
1365     <condition id="CM23_BE_GCC">
1366       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1367       <require condition="CM23_GCC"/>
1368       <require Dendian="Big-endian"/>
1369     </condition>
1370
1371     <condition id="CM33_GCC">
1372       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1373       <require condition="CM33"/>
1374       <require Tcompiler="GCC"/>
1375     </condition>
1376     <condition id="CM33_LE_GCC">
1377       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1378       <require condition="CM33_GCC"/>
1379       <require Dendian="Little-endian"/>
1380     </condition>
1381     <condition id="CM33_BE_GCC">
1382       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1383       <require condition="CM33_GCC"/>
1384       <require Dendian="Big-endian"/>
1385     </condition>
1386
1387     <condition id="CM33_FP_GCC">
1388       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1389       <require condition="CM33_FP"/>
1390       <require Tcompiler="GCC"/>
1391     </condition>
1392     <condition id="CM33_FP_LE_GCC">
1393       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1394       <require condition="CM33_FP_GCC"/>
1395       <require Dendian="Little-endian"/>
1396     </condition>
1397     <condition id="CM33_FP_BE_GCC">
1398       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1399       <require condition="CM33_FP_GCC"/>
1400       <require Dendian="Big-endian"/>
1401     </condition>
1402
1403     <condition id="CM33_NODSP_NOFPU_GCC">
1404       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1405       <require condition="CM33_NODSP_NOFPU"/>
1406       <require Tcompiler="GCC"/>
1407     </condition>
1408     <condition id="CM33_DSP_NOFPU_GCC">
1409       <description>CM33, DSP, no FPU, GCC Compiler</description>
1410       <require condition="CM33_DSP_NOFPU"/>
1411       <require Tcompiler="GCC"/>
1412     </condition>
1413     <condition id="CM33_NODSP_SP_GCC">
1414       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1415       <require condition="CM33_NODSP_SP"/>
1416       <require Tcompiler="GCC"/>
1417     </condition>
1418     <condition id="CM33_DSP_SP_GCC">
1419       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1420       <require condition="CM33_DSP_SP"/>
1421       <require Tcompiler="GCC"/>
1422     </condition>
1423     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1424       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1425       <require condition="CM33_NODSP_NOFPU_GCC"/>
1426       <require Dendian="Little-endian"/>
1427     </condition>
1428     <condition id="CM33_DSP_NOFPU_LE_GCC">
1429       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1430       <require condition="CM33_DSP_NOFPU_GCC"/>
1431       <require Dendian="Little-endian"/>
1432     </condition>
1433     <condition id="CM33_NODSP_SP_LE_GCC">
1434       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1435       <require condition="CM33_NODSP_SP_GCC"/>
1436       <require Dendian="Little-endian"/>
1437     </condition>
1438     <condition id="CM33_DSP_SP_LE_GCC">
1439       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1440       <require condition="CM33_DSP_SP_GCC"/>
1441       <require Dendian="Little-endian"/>
1442     </condition>
1443
1444     <condition id="ARMv8MBL_GCC">
1445       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1446       <require condition="ARMv8MBL"/>
1447       <require Tcompiler="GCC"/>
1448     </condition>
1449     <condition id="ARMv8MBL_LE_GCC">
1450       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1451       <require condition="ARMv8MBL_GCC"/>
1452       <require Dendian="Little-endian"/>
1453     </condition>
1454     <condition id="ARMv8MBL_BE_GCC">
1455       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1456       <require condition="ARMv8MBL_GCC"/>
1457       <require Dendian="Big-endian"/>
1458     </condition>
1459
1460     <condition id="ARMv8MML_GCC">
1461       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1462       <require condition="ARMv8MML"/>
1463       <require Tcompiler="GCC"/>
1464     </condition>
1465     <condition id="ARMv8MML_LE_GCC">
1466       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1467       <require condition="ARMv8MML_GCC"/>
1468       <require Dendian="Little-endian"/>
1469     </condition>
1470     <condition id="ARMv8MML_BE_GCC">
1471       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1472       <require condition="ARMv8MML_GCC"/>
1473       <require Dendian="Big-endian"/>
1474     </condition>
1475
1476     <condition id="ARMv8MML_FP_GCC">
1477       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1478       <require condition="ARMv8MML_FP"/>
1479       <require Tcompiler="GCC"/>
1480     </condition>
1481     <condition id="ARMv8MML_FP_LE_GCC">
1482       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1483       <require condition="ARMv8MML_FP_GCC"/>
1484       <require Dendian="Little-endian"/>
1485     </condition>
1486     <condition id="ARMv8MML_FP_BE_GCC">
1487       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1488       <require condition="ARMv8MML_FP_GCC"/>
1489       <require Dendian="Big-endian"/>
1490     </condition>
1491
1492     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1493       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1494       <require condition="ARMv8MML_NODSP_NOFPU"/>
1495       <require Tcompiler="GCC"/>
1496     </condition>
1497     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1498       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1499       <require condition="ARMv8MML_DSP_NOFPU"/>
1500       <require Tcompiler="GCC"/>
1501     </condition>
1502     <condition id="ARMv8MML_NODSP_SP_GCC">
1503       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1504       <require condition="ARMv8MML_NODSP_SP"/>
1505       <require Tcompiler="GCC"/>
1506     </condition>
1507     <condition id="ARMv8MML_DSP_SP_GCC">
1508       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1509       <require condition="ARMv8MML_DSP_SP"/>
1510       <require Tcompiler="GCC"/>
1511     </condition>
1512     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1513       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1514       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1515       <require Dendian="Little-endian"/>
1516     </condition>
1517     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1518       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1519       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1520       <require Dendian="Little-endian"/>
1521     </condition>
1522     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1523       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1524       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1525       <require Dendian="Little-endian"/>
1526     </condition>
1527     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1528       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1529       <require condition="ARMv8MML_DSP_SP_GCC"/>
1530       <require Dendian="Little-endian"/>
1531     </condition>
1532
1533     <!-- IAR compiler -->
1534     <condition id="CA_IAR">
1535       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1536       <require condition="ARMv7-A Device"/>
1537       <require Tcompiler="IAR"/>
1538     </condition>
1539
1540     <condition id="CM0_IAR">
1541       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1542       <require condition="CM0"/>
1543       <require Tcompiler="IAR"/>
1544     </condition>
1545     <condition id="CM0_LE_IAR">
1546       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1547       <require condition="CM0_IAR"/>
1548       <require Dendian="Little-endian"/>
1549     </condition>
1550     <condition id="CM0_BE_IAR">
1551       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1552       <require condition="CM0_IAR"/>
1553       <require Dendian="Big-endian"/>
1554     </condition>
1555
1556     <condition id="CM3_IAR">
1557       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1558       <require condition="CM3"/>
1559       <require Tcompiler="IAR"/>
1560     </condition>
1561     <condition id="CM3_LE_IAR">
1562       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1563       <require condition="CM3_IAR"/>
1564       <require Dendian="Little-endian"/>
1565     </condition>
1566     <condition id="CM3_BE_IAR">
1567       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1568       <require condition="CM3_IAR"/>
1569       <require Dendian="Big-endian"/>
1570     </condition>
1571
1572     <condition id="CM4_IAR">
1573       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1574       <require condition="CM4"/>
1575       <require Tcompiler="IAR"/>
1576     </condition>
1577     <condition id="CM4_LE_IAR">
1578       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1579       <require condition="CM4_IAR"/>
1580       <require Dendian="Little-endian"/>
1581     </condition>
1582     <condition id="CM4_BE_IAR">
1583       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1584       <require condition="CM4_IAR"/>
1585       <require Dendian="Big-endian"/>
1586     </condition>
1587
1588     <condition id="CM4_FP_IAR">
1589       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1590       <require condition="CM4_FP"/>
1591       <require Tcompiler="IAR"/>
1592     </condition>
1593     <condition id="CM4_FP_LE_IAR">
1594       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1595       <require condition="CM4_FP_IAR"/>
1596       <require Dendian="Little-endian"/>
1597     </condition>
1598     <condition id="CM4_FP_BE_IAR">
1599       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1600       <require condition="CM4_FP_IAR"/>
1601       <require Dendian="Big-endian"/>
1602     </condition>
1603
1604     <condition id="CM7_IAR">
1605       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1606       <require condition="CM7"/>
1607       <require Tcompiler="IAR"/>
1608     </condition>
1609     <condition id="CM7_LE_IAR">
1610       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1611       <require condition="CM7_IAR"/>
1612       <require Dendian="Little-endian"/>
1613     </condition>
1614     <condition id="CM7_BE_IAR">
1615       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1616       <require condition="CM7_IAR"/>
1617       <require Dendian="Big-endian"/>
1618     </condition>
1619
1620     <condition id="CM7_FP_IAR">
1621       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1622       <require condition="CM7_FP"/>
1623       <require Tcompiler="IAR"/>
1624     </condition>
1625     <condition id="CM7_FP_LE_IAR">
1626       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1627       <require condition="CM7_FP_IAR"/>
1628       <require Dendian="Little-endian"/>
1629     </condition>
1630     <condition id="CM7_FP_BE_IAR">
1631       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1632       <require condition="CM7_FP_IAR"/>
1633       <require Dendian="Big-endian"/>
1634     </condition>
1635
1636     <condition id="CM7_SP_IAR">
1637       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1638       <require condition="CM7_SP"/>
1639       <require Tcompiler="IAR"/>
1640     </condition>
1641     <condition id="CM7_SP_LE_IAR">
1642       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1643       <require condition="CM7_SP_IAR"/>
1644       <require Dendian="Little-endian"/>
1645     </condition>
1646     <condition id="CM7_SP_BE_IAR">
1647       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1648       <require condition="CM7_SP_IAR"/>
1649       <require Dendian="Big-endian"/>
1650     </condition>
1651
1652     <condition id="CM7_DP_IAR">
1653       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1654       <require condition="CM7_DP"/>
1655       <require Tcompiler="IAR"/>
1656     </condition>
1657     <condition id="CM7_DP_LE_IAR">
1658       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1659       <require condition="CM7_DP_IAR"/>
1660       <require Dendian="Little-endian"/>
1661     </condition>
1662     <condition id="CM7_DP_BE_IAR">
1663       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1664       <require condition="CM7_DP_IAR"/>
1665       <require Dendian="Big-endian"/>
1666     </condition>
1667
1668     <!-- conditions selecting single devices and CMSIS Core -->
1669     <!-- used for component startup, GCC version is used for C-Startup -->
1670     <condition id="ARMCM0 CMSIS">
1671       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1672       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1673       <require Cclass="CMSIS" Cgroup="CORE"/>
1674     </condition>
1675     <condition id="ARMCM0 CMSIS GCC">
1676       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1677       <require condition="ARMCM0 CMSIS"/>
1678       <require condition="GCC"/>
1679     </condition>
1680
1681     <condition id="ARMCM0+ CMSIS">
1682       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1683       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1684       <require Cclass="CMSIS" Cgroup="CORE"/>
1685     </condition>
1686     <condition id="ARMCM0+ CMSIS GCC">
1687       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1688       <require condition="ARMCM0+ CMSIS"/>
1689       <require condition="GCC"/>
1690     </condition>
1691
1692     <condition id="ARMCM3 CMSIS">
1693       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1694       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1695       <require Cclass="CMSIS" Cgroup="CORE"/>
1696     </condition>
1697     <condition id="ARMCM3 CMSIS GCC">
1698       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1699       <require condition="ARMCM3 CMSIS"/>
1700       <require condition="GCC"/>
1701     </condition>
1702
1703     <condition id="ARMCM4 CMSIS">
1704       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1705       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1706       <require Cclass="CMSIS" Cgroup="CORE"/>
1707     </condition>
1708     <condition id="ARMCM4 CMSIS GCC">
1709       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1710       <require condition="ARMCM4 CMSIS"/>
1711       <require condition="GCC"/>
1712     </condition>
1713
1714     <condition id="ARMCM7 CMSIS">
1715       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1716       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1717       <require Cclass="CMSIS" Cgroup="CORE"/>
1718     </condition>
1719     <condition id="ARMCM7 CMSIS GCC">
1720       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1721       <require condition="ARMCM7 CMSIS"/>
1722       <require condition="GCC"/>
1723     </condition>
1724
1725     <condition id="ARMCM23 CMSIS">
1726       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1727       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1728       <require Cclass="CMSIS" Cgroup="CORE"/>
1729     </condition>
1730     <condition id="ARMCM23 CMSIS GCC">
1731       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1732       <require condition="ARMCM23 CMSIS"/>
1733       <require condition="GCC"/>
1734     </condition>
1735
1736     <condition id="ARMCM33 CMSIS">
1737       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1738       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1739       <require Cclass="CMSIS" Cgroup="CORE"/>
1740     </condition>
1741     <condition id="ARMCM33 CMSIS GCC">
1742       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1743       <require condition="ARMCM33 CMSIS"/>
1744       <require condition="GCC"/>
1745     </condition>
1746
1747     <condition id="ARMSC000 CMSIS">
1748       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1749       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1750       <require Cclass="CMSIS" Cgroup="CORE"/>
1751     </condition>
1752     <condition id="ARMSC000 CMSIS GCC">
1753       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1754       <require condition="ARMSC000 CMSIS"/>
1755       <require condition="GCC"/>
1756     </condition>
1757
1758     <condition id="ARMSC300 CMSIS">
1759       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1760       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1761       <require Cclass="CMSIS" Cgroup="CORE"/>
1762     </condition>
1763     <condition id="ARMSC300 CMSIS GCC">
1764       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1765       <require condition="ARMSC300 CMSIS"/>
1766       <require condition="GCC"/>
1767     </condition>
1768
1769     <condition id="ARMv8MBL CMSIS">
1770       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1771       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1772       <require Cclass="CMSIS" Cgroup="CORE"/>
1773     </condition>
1774     <condition id="ARMv8MBL CMSIS GCC">
1775       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1776       <require condition="ARMv8MBL CMSIS"/>
1777       <require condition="GCC"/>
1778     </condition>
1779
1780     <condition id="ARMv8MML CMSIS">
1781       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1782       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1783       <require Cclass="CMSIS" Cgroup="CORE"/>
1784     </condition>
1785     <condition id="ARMv8MML CMSIS GCC">
1786       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1787       <require condition="ARMv8MML CMSIS"/>
1788       <require condition="GCC"/>
1789     </condition>
1790
1791     <condition id="ARMCA5 CMSIS">
1792       <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1793       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1794       <require Cclass="CMSIS" Cgroup="CORE"/>
1795     </condition>
1796
1797     <condition id="ARMCA7 CMSIS">
1798       <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1799       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1800       <require Cclass="CMSIS" Cgroup="CORE"/>
1801     </condition>
1802
1803     <condition id="ARMCA9 CMSIS">
1804       <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1805       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1806       <require Cclass="CMSIS" Cgroup="CORE"/>
1807     </condition>
1808
1809     <!-- CMSIS DSP -->
1810     <condition id="CMSIS DSP">
1811       <description>Components required for DSP</description>
1812       <require condition="ARMv6_7_8-M Device"/>
1813       <require condition="ARMCC GCC"/>
1814       <require Cclass="CMSIS" Cgroup="CORE"/>
1815     </condition>
1816
1817     <!-- RTOS RTX -->
1818     <condition id="RTOS RTX">
1819       <description>Components required for RTOS RTX</description>
1820       <require condition="ARMv6_7-M Device"/>
1821       <require condition="ARMCC GCC IAR"/>
1822       <require Cclass="Device" Cgroup="Startup"/>
1823       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1824     </condition>
1825     <condition id="RTOS RTX IFX">
1826       <description>Components required for RTOS RTX IFX</description>
1827       <require condition="ARMv6_7-M Device"/>
1828       <require condition="ARMCC GCC IAR"/>
1829       <require Dvendor="Infineon:7" Dname="XMC4*"/>
1830       <require Cclass="Device" Cgroup="Startup"/>
1831       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1832     </condition>
1833     <condition id="RTOS RTX5">
1834       <description>Components required for RTOS RTX5</description>
1835       <require condition="ARMv6_7_8-M Device"/>
1836       <require condition="ARMCC GCC IAR"/>
1837       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1838     </condition>
1839     <condition id="RTOS2 RTX5">
1840       <description>Components required for RTOS2 RTX5</description>
1841       <require condition="ARMv6_7_8-M Device"/>
1842       <require condition="ARMCC GCC IAR"/>
1843       <require Cclass="CMSIS"  Cgroup="CORE"/>
1844       <require Cclass="Device" Cgroup="Startup"/>
1845     </condition>
1846     <condition id="RTOS2 RTX5 v7-A">
1847       <description>Components required for RTOS2 RTX5 v7-A</description>
1848       <require condition="ARMv7-A Device"/>
1849       <require condition="ARMCC GCC IAR"/>
1850       <require Cclass="CMSIS"  Cgroup="CORE"/>
1851       <require Cclass="Device" Cgroup="Startup"/>
1852       <require Cclass="Device" Cgroup="OS Tick"/>
1853       <require Cclass="Device" Cgroup="IRQ Controller"/>
1854     </condition>
1855     <condition id="RTOS2 RTX5 Lib">
1856       <description>Components required for RTOS2 RTX5 Library</description>
1857       <require condition="ARMv6_7_8-M Device"/>
1858       <require condition="ARMCC GCC IAR"/>
1859       <require Cclass="CMSIS"  Cgroup="CORE"/>
1860       <require Cclass="Device" Cgroup="Startup"/>
1861     </condition>
1862     <condition id="RTOS2 RTX5 NS">
1863       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1864       <require condition="ARMv8-M TZ Device"/>
1865       <require condition="ARMCC GCC"/>
1866       <require Cclass="CMSIS"  Cgroup="CORE"/>
1867       <require Cclass="Device" Cgroup="Startup"/>
1868     </condition>
1869
1870     <!-- OS Tick -->
1871     <condition id="OS Tick PTIM">
1872       <description>Components required for OS Tick Private Timer</description>
1873       <require condition="CA5_CA9"/>
1874       <require Cclass="Device" Cgroup="IRQ Controller"/>
1875     </condition>
1876
1877     <condition id="OS Tick GTIM">
1878       <description>Components required for OS Tick Generic Physical Timer</description>
1879       <require condition="CA7"/>
1880       <require Cclass="Device" Cgroup="IRQ Controller"/>
1881     </condition>
1882
1883   </conditions>
1884
1885   <components>
1886     <!-- CMSIS-Core component -->
1887     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.2"  condition="ARMv6_7_8-M Device" >
1888       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1889       <files>
1890         <!-- CPU independent -->
1891         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1892         <file category="include" name="CMSIS/Include/"/>
1893         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1894         <!-- Code template -->
1895         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1896         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1897       </files>
1898     </component>
1899
1900     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.1"  condition="ARMv7-A Device" >
1901       <description>CMSIS-CORE for Cortex-A</description>
1902       <files>
1903         <!-- CPU independent -->
1904         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
1905         <file category="include" name="CMSIS/Core_A/Include/"/>
1906       </files>
1907     </component>
1908
1909     <!-- CMSIS-Startup components -->
1910     <!-- Cortex-M0 -->
1911     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1912       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1913       <files>
1914         <!-- include folder / device header file -->
1915         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1916         <!-- startup / system file -->
1917         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1918         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1919         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1920         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1921         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1922       </files>
1923     </component>
1924     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1925       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1926       <files>
1927         <!-- include folder / device header file -->
1928         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1929         <!-- startup / system file -->
1930         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1931         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1932         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1933       </files>
1934     </component>
1935
1936     <!-- Cortex-M0+ -->
1937     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1938       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1939       <files>
1940         <!-- include folder / device header file -->
1941         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1942         <!-- startup / system file -->
1943         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1944         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1945         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1946         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1947         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1948       </files>
1949     </component>
1950     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1951       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1952       <files>
1953         <!-- include folder / device header file -->
1954         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1955         <!-- startup / system file -->
1956         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1957         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1958         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1959       </files>
1960     </component>
1961
1962     <!-- Cortex-M3 -->
1963     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1964       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1965       <files>
1966         <!-- include folder / device header file -->
1967         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1968         <!-- startup / system file -->
1969         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1970         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1971         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1972         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1973         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1974       </files>
1975     </component>
1976     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1977       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1978       <files>
1979         <!-- include folder / device header file -->
1980         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1981         <!-- startup / system file -->
1982         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1983         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1984         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1985       </files>
1986     </component>
1987
1988     <!-- Cortex-M4 -->
1989     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1990       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1991       <files>
1992         <!-- include folder / device header file -->
1993         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1994         <!-- startup / system file -->
1995         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1996         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1997         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1998         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1999         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2000       </files>
2001     </component>
2002     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2003       <description>System and Startup for Generic ARM Cortex-M4 device</description>
2004       <files>
2005         <!-- include folder / device header file -->
2006         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2007         <!-- startup / system file -->
2008         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2009         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2010         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2011       </files>
2012     </component>
2013
2014     <!-- Cortex-M7 -->
2015     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2016       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2017       <files>
2018         <!-- include folder / device header file -->
2019         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2020         <!-- startup / system file -->
2021         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2022         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2023         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2024         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2025         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2026       </files>
2027     </component>
2028     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2029       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2030       <files>
2031         <!-- include folder / device header file -->
2032         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2033         <!-- startup / system file -->
2034         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2035         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2036         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2037       </files>
2038     </component>
2039
2040     <!-- Cortex-M23 -->
2041     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2042       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2043       <files>
2044         <!-- include folder / device header file -->
2045         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2046         <!-- startup / system file -->
2047         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2048         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2049         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2050         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2051         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2052         <!-- SAU configuration -->
2053         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2054       </files>
2055     </component>
2056     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2057       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2058       <files>
2059         <!-- include folder / device header file -->
2060         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2061         <!-- startup / system file -->
2062         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2063         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2064         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2065         <!-- SAU configuration -->
2066         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2067       </files>
2068     </component>
2069
2070     <!-- Cortex-M33 -->
2071     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2072       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2073       <files>
2074         <!-- include folder / device header file -->
2075         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2076         <!-- startup / system file -->
2077         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2078         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2079         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2080         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2081         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2082         <!-- SAU configuration -->
2083         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2084       </files>
2085     </component>
2086     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2087       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2088       <files>
2089         <!-- include folder / device header file -->
2090         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2091         <!-- startup / system file -->
2092         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2093         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2094         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2095         <!-- SAU configuration -->
2096         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2097       </files>
2098     </component>
2099
2100     <!-- Cortex-SC000 -->
2101     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2102       <description>System and Startup for Generic ARM SC000 device</description>
2103       <files>
2104         <!-- include folder / device header file -->
2105         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2106         <!-- startup / system file -->
2107         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2108         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2109         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2110         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2111         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2112       </files>
2113     </component>
2114     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2115       <description>System and Startup for Generic ARM SC000 device</description>
2116       <files>
2117         <!-- include folder / device header file -->
2118         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2119         <!-- startup / system file -->
2120         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2121         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2122         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2123       </files>
2124     </component>
2125
2126     <!-- Cortex-SC300 -->
2127     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2128       <description>System and Startup for Generic ARM SC300 device</description>
2129       <files>
2130         <!-- include folder / device header file -->
2131         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2132         <!-- startup / system file -->
2133         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2134         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2135         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2136         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2137         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2138       </files>
2139     </component>
2140     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2141       <description>System and Startup for Generic ARM SC300 device</description>
2142       <files>
2143         <!-- include folder / device header file -->
2144         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2145         <!-- startup / system file -->
2146         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2147         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2148         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2149       </files>
2150     </component>
2151
2152     <!-- ARMv8MBL -->
2153     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2154       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2155       <files>
2156         <!-- include folder / device header file -->
2157         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2158         <!-- startup / system file -->
2159         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2160         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2161         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2162         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2163         <!-- SAU configuration -->
2164         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2165       </files>
2166     </component>
2167     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2168       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2169       <files>
2170         <!-- include folder / device header file -->
2171         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2172         <!-- startup / system file -->
2173         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2174         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2175         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2176         <!-- SAU configuration -->
2177         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2178       </files>
2179     </component>
2180
2181     <!-- ARMv8MML -->
2182     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2183       <description>System and Startup for Generic ARM ARMv8MML device</description>
2184       <files>
2185         <!-- include folder / device header file -->
2186         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2187         <!-- startup / system file -->
2188         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2189         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2190         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2191         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2192         <!-- SAU configuration -->
2193         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2194       </files>
2195     </component>
2196     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2197       <description>System and Startup for Generic ARM ARMv8MML device</description>
2198       <files>
2199         <!-- include folder / device header file -->
2200         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2201         <!-- startup / system file -->
2202         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2203         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2204         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2205         <!-- SAU configuration -->
2206         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2207       </files>
2208     </component>
2209
2210     <!-- Cortex-A5 -->
2211     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2212       <description>System and Startup for Generic ARM Cortex-A5 device</description>
2213       <files>
2214         <!-- include folder / device header file -->
2215         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2216         <!-- startup / system / mmu files -->
2217         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2218         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2219         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2220         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2221         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2222         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2223         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2224         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2225         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2226         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2227         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2228         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2229
2230       </files>
2231     </component>
2232
2233     <!-- Cortex-A7 -->
2234     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2235       <description>System and Startup for Generic ARM Cortex-A7 device</description>
2236       <files>
2237         <!-- include folder / device header file -->
2238         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2239         <!-- startup / system / mmu files -->
2240         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2241         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2242         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2243         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2244         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2245         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2246         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2247         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2248         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2249         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2250         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2251         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2252       </files>
2253     </component>
2254
2255     <!-- Cortex-A9 -->
2256     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2257       <description>System and Startup for Generic ARM Cortex-A9 device</description>
2258       <files>
2259         <!-- include folder / device header file -->
2260         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2261         <!-- startup / system / mmu files -->
2262         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2263         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2264         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2265         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2266         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2267         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2268         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2269         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2270         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2271         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2272         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2273         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2274       </files>
2275     </component>
2276
2277     <!-- IRQ Controller -->
2278     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.0" condition="ARMv7-A Device">
2279       <description>IRQ Controller implementation using GIC</description>
2280       <files>
2281         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2282       </files>
2283     </component>
2284
2285     <!-- OS Tick -->
2286     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick PTIM">
2287       <description>OS Tick implementation using Private Timer</description>
2288       <files>
2289         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2290       </files>
2291     </component>
2292
2293     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick GTIM">
2294       <description>OS Tick implementation using Generic Physical Timer</description>
2295       <files>
2296         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2297       </files>
2298     </component>
2299
2300     <!-- CMSIS-DSP component -->
2301     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2302       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2303       <files>
2304         <!-- CPU independent -->
2305         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2306         <file category="header" name="CMSIS/Include/arm_math.h"/>
2307
2308         <!-- CPU and Compiler dependent -->
2309         <!-- ARMCC -->
2310         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2311         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2312         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2313         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2314         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2315         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2316         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2317         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2318         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2319         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2320         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2321         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2322         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2323         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2324
2325         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2326         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2327         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2328         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2329         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2330         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2331         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2332         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2333         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2334         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2335         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2336         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2337
2338         <!-- GCC -->
2339         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2340         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2341         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2342         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2343         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2344         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2345         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2346
2347         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2348         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2349         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2350         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2351         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2352         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2353         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2354         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2355         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2356         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2357         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2358         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2359
2360       </files>
2361     </component>
2362
2363     <!-- CMSIS-RTOS Keil RTX component -->
2364     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2365       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2366       <RTE_Components_h>
2367         <!-- the following content goes into file 'RTE_Components.h' -->
2368         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2369         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2370       </RTE_Components_h>
2371       <files>
2372         <!-- CPU independent -->
2373         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2374         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2375         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2376
2377         <!-- RTX templates -->
2378         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2379         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2380         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2381         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2382         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2383         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2384         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2385         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2386         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2387         <!-- tool-chain specific template file -->
2388         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2389         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2390         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2391
2392         <!-- CPU and Compiler dependent -->
2393         <!-- ARMCC -->
2394         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2395         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2396         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2397         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2398         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2399         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2400         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2401         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2402         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2403         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2404         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2405         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2406         <!-- GCC -->
2407         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2408         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2409         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2410         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2411         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2412         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2413         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2414         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2415         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2416         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2417         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2418         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2419         <!-- IAR -->
2420         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2421         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2422         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2423         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2424         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2425         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2426         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2427         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2428         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2429         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2430         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2431         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2432       </files>
2433     </component>
2434     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2435     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2436       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2437       <RTE_Components_h>
2438         <!-- the following content goes into file 'RTE_Components.h' -->
2439         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2440         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2441       </RTE_Components_h>
2442       <files>
2443         <!-- CPU independent -->
2444         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2445         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2446         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2447
2448         <!-- RTX templates -->
2449         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2450         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2451         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2452         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2453         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2454         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2455         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2456         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2457         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2458         <!-- tool-chain specific template file -->
2459         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2460         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2461         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2462
2463         <!-- CPU and Compiler dependent -->
2464         <!-- ARMCC -->
2465         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2466         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2467         <!-- GCC -->
2468         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2469         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2470         <!-- IAR -->
2471       </files>
2472     </component>
2473
2474     <!-- CMSIS-RTOS Keil RTX5 component -->
2475     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.3" Capiversion="1.0.0" condition="RTOS RTX5">
2476       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2477       <RTE_Components_h>
2478         <!-- the following content goes into file 'RTE_Components.h' -->
2479         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2480         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2481       </RTE_Components_h>
2482       <files>
2483         <!-- RTX header file -->
2484         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2485         <!-- RTX compatibility module for API V1 -->
2486         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2487       </files>
2488     </component>
2489
2490     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2491     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 Lib">
2492       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2493       <RTE_Components_h>
2494         <!-- the following content goes into file 'RTE_Components.h' -->
2495         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2496         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2497       </RTE_Components_h>
2498       <files>
2499         <!-- RTX documentation -->
2500         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2501
2502         <!-- RTX header files -->
2503         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2504
2505         <!-- RTX configuration -->
2506         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.2.0"/>
2507         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2508
2509         <!-- RTX templates -->
2510         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2511         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2512         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2513         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2514         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2515         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2516         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2517         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2518         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2519         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2520
2521         <!-- RTX library configuration -->
2522         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2523
2524         <!-- RTX libraries (CPU and Compiler dependent) -->
2525         <!-- ARMCC -->
2526         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2527         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2528         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2529         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2530         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2531         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2532         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2533         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2534         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2535         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2536         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2537         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2538         <!-- GCC -->
2539         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2540         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2541         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2542         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2543         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2544         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2545         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2546         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2547         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2548         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2549         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2550         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2551         <!-- IAR -->
2552         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2553         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2554         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2555         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2556         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2557         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2558       </files>
2559     </component>
2560     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
2561       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2562       <RTE_Components_h>
2563         <!-- the following content goes into file 'RTE_Components.h' -->
2564         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2565         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2566         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2567       </RTE_Components_h>
2568       <files>
2569         <!-- RTX documentation -->
2570         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2571
2572         <!-- RTX header files -->
2573         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2574
2575         <!-- RTX configuration -->
2576         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.2.0"/>
2577         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2578
2579         <!-- RTX templates -->
2580         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2581         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2582         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2583         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2584         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2585         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2586         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2587         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2588         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2589         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2590
2591         <!-- RTX library configuration -->
2592         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2593
2594         <!-- RTX libraries (CPU and Compiler dependent) -->
2595         <!-- ARMCC -->
2596         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2597         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2598         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2599         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2600         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2601         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2602         <!-- GCC -->
2603         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2604         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2605         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2606         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2607         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2608         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2609       </files>
2610     </component>
2611     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5">
2612       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2613       <RTE_Components_h>
2614         <!-- the following content goes into file 'RTE_Components.h' -->
2615         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2616         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2617         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2618       </RTE_Components_h>
2619       <files>
2620         <!-- RTX documentation -->
2621         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2622
2623         <!-- RTX header files -->
2624         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2625
2626         <!-- RTX configuration -->
2627         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.2.0"/>
2628         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2629
2630         <!-- RTX templates -->
2631         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2632         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2633         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2634         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2635         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2636         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2637         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2638         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2639         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2640         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2641
2642         <!-- RTX sources (core) -->
2643         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2644         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2645         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2646         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2647         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2648         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2649         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2650         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2651         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2652         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2653         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2654         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2655         <!-- RTX sources (library configuration) -->
2656         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2657         <!-- RTX sources (handlers ARMCC) -->
2658         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2659         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2660         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2661         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2662         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2663         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2664         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2665         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2666         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2667         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2668         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2669         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2670         <!-- RTX sources (handlers GCC) -->
2671         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2672         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2673         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2674         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2675         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2676         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2677         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2678         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2679         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2680         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2681         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2682         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2683         <!-- RTX sources (handlers IAR) -->
2684         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2685         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2686         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2687         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2688         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2689         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2690         <!-- OS Tick (SysTick) -->
2691         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2692       </files>
2693     </component>
2694     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 v7-A">
2695       <description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
2696       <RTE_Components_h>
2697         <!-- the following content goes into file 'RTE_Components.h' -->
2698         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2699         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2700         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2701       </RTE_Components_h>
2702       <files>
2703         <!-- RTX documentation -->
2704         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2705
2706         <!-- RTX header files -->
2707         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2708
2709         <!-- RTX configuration -->
2710         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.2.0"/>
2711         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2712
2713         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2714
2715         <!-- RTX templates -->
2716         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2717         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2718         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2719         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2720         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2721         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2722         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2723         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2724         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2725         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2726
2727         <!-- RTX sources (core) -->
2728         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2729         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2730         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2731         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2732         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2733         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2734         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2735         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2736         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2737         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2738         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2739         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2740         <!-- RTX sources (library configuration) -->
2741         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2742         <!-- RTX sources (handlers ARMCC) -->
2743         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
2744         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
2745         <!-- RTX sources (handlers GCC) -->
2746         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
2747         <!-- RTX sources (handlers IAR) -->
2748         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
2749       </files>
2750     </component>
2751     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.3" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
2752       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2753       <RTE_Components_h>
2754         <!-- the following content goes into file 'RTE_Components.h' -->
2755         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2756         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2757         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2758         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2759       </RTE_Components_h>
2760       <files>
2761         <!-- RTX documentation -->
2762         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2763
2764         <!-- RTX header files -->
2765         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2766
2767         <!-- RTX configuration -->
2768         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.2.0"/>
2769         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2770
2771         <!-- RTX templates -->
2772         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2773         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2774         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2775         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2776         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2777         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2778         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2779         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2780         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2781         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2782
2783         <!-- RTX sources (core) -->
2784         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2785         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2786         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2787         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2788         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2789         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2790         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2791         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2792         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2793         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2794         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2795         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2796         <!-- RTX sources (library configuration) -->
2797         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2798         <!-- RTX sources (ARMCC handlers) -->
2799         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2800         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2801         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2802         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2803         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2804         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2805         <!-- RTX sources (GCC handlers) -->
2806         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2807         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2808         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2809         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2810         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2811         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2812         <!-- OS Tick (SysTick) -->
2813         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2814       </files>
2815     </component>
2816
2817   </components>
2818
2819   <boards>
2820     <board name="uVision Simulator" vendor="Keil">
2821       <description>uVision Simulator</description>
2822       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2823       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2824       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
2825       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2826       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2827       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2828       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2829       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2830       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2831       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2832       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2833       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2834       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2835       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2836       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2837       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2838       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2839       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2840       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2841     </board>
2842
2843     <board name="Fixed Virtual Platform" vendor="ARM">
2844       <description>Fixed Virtual Platform</description>
2845       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
2846       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
2847       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
2848     </board>
2849   </boards>
2850
2851   <examples>
2852     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2853       <description>DSP_Lib Class Marks example</description>
2854       <board name="uVision Simulator" vendor="Keil"/>
2855       <project>
2856         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2857       </project>
2858       <attributes>
2859         <component Cclass="CMSIS" Cgroup="CORE"/>
2860         <component Cclass="CMSIS" Cgroup="DSP"/>
2861         <component Cclass="Device" Cgroup="Startup"/>
2862         <category>Getting Started</category>
2863       </attributes>
2864     </example>
2865
2866     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2867       <description>DSP_Lib Convolution example</description>
2868       <board name="uVision Simulator" vendor="Keil"/>
2869       <project>
2870         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2871       </project>
2872       <attributes>
2873         <component Cclass="CMSIS" Cgroup="CORE"/>
2874         <component Cclass="CMSIS" Cgroup="DSP"/>
2875         <component Cclass="Device" Cgroup="Startup"/>
2876         <category>Getting Started</category>
2877       </attributes>
2878     </example>
2879
2880     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2881       <description>DSP_Lib Dotproduct example</description>
2882       <board name="uVision Simulator" vendor="Keil"/>
2883       <project>
2884         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2885       </project>
2886       <attributes>
2887         <component Cclass="CMSIS" Cgroup="CORE"/>
2888         <component Cclass="CMSIS" Cgroup="DSP"/>
2889         <component Cclass="Device" Cgroup="Startup"/>
2890         <category>Getting Started</category>
2891       </attributes>
2892     </example>
2893
2894     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2895       <description>DSP_Lib FFT Bin example</description>
2896       <board name="uVision Simulator" vendor="Keil"/>
2897       <project>
2898         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2899       </project>
2900       <attributes>
2901         <component Cclass="CMSIS" Cgroup="CORE"/>
2902         <component Cclass="CMSIS" Cgroup="DSP"/>
2903         <component Cclass="Device" Cgroup="Startup"/>
2904         <category>Getting Started</category>
2905       </attributes>
2906     </example>
2907
2908     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2909       <description>DSP_Lib FIR example</description>
2910       <board name="uVision Simulator" vendor="Keil"/>
2911       <project>
2912         <environment name="uv" load="arm_fir_example.uvprojx"/>
2913       </project>
2914       <attributes>
2915         <component Cclass="CMSIS" Cgroup="CORE"/>
2916         <component Cclass="CMSIS" Cgroup="DSP"/>
2917         <component Cclass="Device" Cgroup="Startup"/>
2918         <category>Getting Started</category>
2919       </attributes>
2920     </example>
2921
2922     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2923       <description>DSP_Lib Graphic Equalizer example</description>
2924       <board name="uVision Simulator" vendor="Keil"/>
2925       <project>
2926         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2927       </project>
2928       <attributes>
2929         <component Cclass="CMSIS" Cgroup="CORE"/>
2930         <component Cclass="CMSIS" Cgroup="DSP"/>
2931         <component Cclass="Device" Cgroup="Startup"/>
2932         <category>Getting Started</category>
2933       </attributes>
2934     </example>
2935
2936     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2937       <description>DSP_Lib Linear Interpolation example</description>
2938       <board name="uVision Simulator" vendor="Keil"/>
2939       <project>
2940         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2941       </project>
2942       <attributes>
2943         <component Cclass="CMSIS" Cgroup="CORE"/>
2944         <component Cclass="CMSIS" Cgroup="DSP"/>
2945         <component Cclass="Device" Cgroup="Startup"/>
2946         <category>Getting Started</category>
2947       </attributes>
2948     </example>
2949
2950     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2951       <description>DSP_Lib Matrix example</description>
2952       <board name="uVision Simulator" vendor="Keil"/>
2953       <project>
2954         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2955       </project>
2956       <attributes>
2957         <component Cclass="CMSIS" Cgroup="CORE"/>
2958         <component Cclass="CMSIS" Cgroup="DSP"/>
2959         <component Cclass="Device" Cgroup="Startup"/>
2960         <category>Getting Started</category>
2961       </attributes>
2962     </example>
2963
2964     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2965       <description>DSP_Lib Signal Convergence example</description>
2966       <board name="uVision Simulator" vendor="Keil"/>
2967       <project>
2968         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2969       </project>
2970       <attributes>
2971         <component Cclass="CMSIS" Cgroup="CORE"/>
2972         <component Cclass="CMSIS" Cgroup="DSP"/>
2973         <component Cclass="Device" Cgroup="Startup"/>
2974         <category>Getting Started</category>
2975       </attributes>
2976     </example>
2977
2978     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2979       <description>DSP_Lib Sinus/Cosinus example</description>
2980       <board name="uVision Simulator" vendor="Keil"/>
2981       <project>
2982         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2983       </project>
2984       <attributes>
2985         <component Cclass="CMSIS" Cgroup="CORE"/>
2986         <component Cclass="CMSIS" Cgroup="DSP"/>
2987         <component Cclass="Device" Cgroup="Startup"/>
2988         <category>Getting Started</category>
2989       </attributes>
2990     </example>
2991
2992     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2993       <description>DSP_Lib Variance example</description>
2994       <board name="uVision Simulator" vendor="Keil"/>
2995       <project>
2996         <environment name="uv" load="arm_variance_example.uvprojx"/>
2997       </project>
2998       <attributes>
2999         <component Cclass="CMSIS" Cgroup="CORE"/>
3000         <component Cclass="CMSIS" Cgroup="DSP"/>
3001         <component Cclass="Device" Cgroup="Startup"/>
3002         <category>Getting Started</category>
3003       </attributes>
3004     </example>
3005
3006     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3007       <description>CMSIS-RTOS2 Blinky example</description>
3008       <board name="uVision Simulator" vendor="Keil"/>
3009       <project>
3010         <environment name="uv" load="Blinky.uvprojx"/>
3011       </project>
3012       <attributes>
3013         <component Cclass="CMSIS" Cgroup="CORE"/>
3014         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3015         <component Cclass="Device" Cgroup="Startup"/>
3016         <category>Getting Started</category>
3017       </attributes>
3018     </example>
3019
3020     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3021       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3022       <board name="uVision Simulator" vendor="Keil"/>
3023       <project>
3024         <environment name="uv" load="Blinky.uvprojx"/>
3025       </project>
3026       <attributes>
3027         <component Cclass="CMSIS" Cgroup="CORE"/>
3028         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3029         <component Cclass="Device" Cgroup="Startup"/>
3030         <category>Getting Started</category>
3031       </attributes>
3032     </example>
3033
3034     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3035       <description>CMSIS-RTOS2 Message Queue Example</description>
3036       <board name="uVision Simulator" vendor="Keil"/>
3037       <project>
3038         <environment name="uv" load="MsqQueue.uvprojx"/>
3039       </project>
3040       <attributes>
3041         <component Cclass="CMSIS" Cgroup="CORE"/>
3042         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3043         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3044         <component Cclass="Device" Cgroup="Startup"/>
3045         <category>Getting Started</category>
3046       </attributes>
3047     </example>
3048
3049     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3050       <description>CMSIS-RTOS2 Memory Pool Example</description>
3051       <board name="Fixed Virtual Platform" vendor="ARM"/>
3052       <project>
3053         <environment name="uv" load="MemPool.uvprojx"/>
3054       </project>
3055       <attributes>
3056         <component Cclass="CMSIS" Cgroup="CORE"/>
3057         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3058         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3059         <component Cclass="Device" Cgroup="Startup"/>
3060         <category>Getting Started</category>
3061       </attributes>
3062     </example>
3063
3064     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3065       <description>Bare-metal secure/non-secure example without RTOS</description>
3066       <board name="uVision Simulator" vendor="Keil"/>
3067       <project>
3068         <environment name="uv" load="NoRTOS.uvmpw"/>
3069       </project>
3070       <attributes>
3071         <component Cclass="CMSIS" Cgroup="CORE"/>
3072         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3073         <component Cclass="Device" Cgroup="Startup"/>
3074         <category>Getting Started</category>
3075       </attributes>
3076     </example>
3077
3078     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3079       <description>Secure/non-secure RTOS example with thread context management</description>
3080       <board name="uVision Simulator" vendor="Keil"/>
3081       <project>
3082         <environment name="uv" load="RTOS.uvmpw"/>
3083       </project>
3084       <attributes>
3085         <component Cclass="CMSIS" Cgroup="CORE"/>
3086         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3087         <component Cclass="Device" Cgroup="Startup"/>
3088         <category>Getting Started</category>
3089       </attributes>
3090     </example>
3091
3092     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3093       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3094       <board name="uVision Simulator" vendor="Keil"/>
3095       <project>
3096         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3097       </project>
3098       <attributes>
3099         <component Cclass="CMSIS" Cgroup="CORE"/>
3100         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3101         <component Cclass="Device" Cgroup="Startup"/>
3102         <category>Getting Started</category>
3103       </attributes>
3104     </example>
3105
3106   </examples>
3107
3108 </package>