begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.7.0-dev0">
  12       Active development...
  13       CMSIS-Core(M): 5.4.0 (see revision history for details)
  14        - Enhanced MVE support for Armv8.1-MML
  15       CMSIS-RTOS2:
  16         - RTX 5.5.2 (see revision history for details)
  17     </release>
  18     <release version="5.6.0" date="2019-07-10">
  19       CMSIS-Core(M): 5.3.0 (see revision history for details)
  20        - Added provisions for compiler-independent C startup code.
  21       CMSIS-Core(A): 1.1.4 (see revision history for details)
  22        - Fixed __FPU_Enable.
  23       CMSIS-DSP: 1.7.0 (see revision history for details)
  24         - New Neon versions of f32 functions
  25         - Python wrapper
  26         - Preliminary cmake build
  27         - Compilation flags for FFTs
  28         - Changes to arm_math.h
  29       CMSIS-NN: 1.2.0 (see revision history for details)
  30         - New function for depthwise convolution with asymmetric quantization.
  31         - New support functions for requantization.
  32       CMSIS-RTOS:
  33         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  34       CMSIS-RTOS2:
  35         - RTX 5.5.1 (see revision history for details)
  36       CMSIS-Driver: 2.7.1
  37         - WiFi Interface API 1.0.0
  38       Devices:
  39        - Generalized C startup code for all Cortex-M familiy devices.
  40        - Updated Cortex-A default memory regions and MMU configurations
  41        - Moved Cortex-A memory and system config files to avoid include path issues
  42     </release>
  43     <release version="5.5.1" date="2019-03-20">
  44       The following folders are deprecated
  45         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  46
  47       CMSIS-Core(M): 5.2.1 (see revision history for details)
  48         - Fixed compilation issue in cmsis_armclang_ltm.h
  49     </release>
  50     <release version="5.5.0" date="2019-03-18">
  51       The following folders have been removed:
  52         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  53         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  54       The following folders are deprecated
  55         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  56
  57       CMSIS-Core(M): 5.2.0 (see revision history for details)
  58         - Reworked Stack/Heap configuration for ARM startup files.
  59         - Added Cortex-M35P device support.
  60         - Added generic Armv8.1-M Mainline device support.
  61       CMSIS-Core(A): 1.1.3 (see revision history for details)
  62       CMSIS-DSP: 1.6.0 (see revision history for details)
  63         - reworked DSP library source files
  64         - reworked DSP library documentation
  65         - Changed DSP folder structure
  66         - moved DSP libraries to folder ./DSP/Lib
  67         - ARM DSP Libraries are built with ARMCLANG
  68         - Added DSP Libraries Source variant
  69       CMSIS-RTOS2:
  70         - RTX 5.5.0 (see revision history for details)
  71       CMSIS-Driver: 2.7.0
  72         - Added WiFi Interface API 1.0.0-beta
  73         - Added components for project specific driver implementations
  74       CMSIS-Pack: 1.6.0 (see revision history for details)
  75       Devices:
  76         - Added Cortex-M35P and ARMv81MML device templates.
  77         - Fixed C-Startup Code for GCC (aligned with other compilers)
  78       Utilities:
  79         - SVDConv 3.3.25
  80         - PackChk 1.3.82
  81     </release>
  82     <release version="5.4.0" date="2018-08-01">
  83       Aligned pack structure with repository.
  84       The following folders are deprecated:
  85         - CMSIS/Include/
  86         - CMSIS/DSP_Lib/
  87
  88       CMSIS-Core(M): 5.1.2 (see revision history for details)
  89         - Added Cortex-M1 support (beta).
  90       CMSIS-Core(A): 1.1.2 (see revision history for details)
  91       CMSIS-NN: 1.1.0
  92         - Added new math functions.
  93       CMSIS-RTOS2:
  94         - API 2.1.3 (see revision history for details)
  95         - RTX 5.4.0 (see revision history for details)
  96           * Updated exception handling on Cortex-A
  97       CMSIS-Driver:
  98         - Flash Driver API V2.2.0
  99       Utilities:
 100         - SVDConv 3.3.21
 101         - PackChk 1.3.71
 102     </release>
 103     <release version="5.3.0" date="2018-02-22">
 104       Updated Arm company brand.
 105       CMSIS-Core(M): 5.1.1 (see revision history for details)
 106       CMSIS-Core(A): 1.1.1 (see revision history for details)
 107       CMSIS-DAP: 2.0.0 (see revision history for details)
 108       CMSIS-NN: 1.0.0
 109         - Initial contribution of the bare metal Neural Network Library.
 110       CMSIS-RTOS2:
 111         - RTX 5.3.0 (see revision history for details)
 112         - OS Tick API 1.0.1
 113     </release>
 114     <release version="5.2.0" date="2017-11-16">
 115       CMSIS-Core(M): 5.1.0 (see revision history for details)
 116         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 117         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 118       CMSIS-Core(A): 1.1.0 (see revision history for details)
 119         - Added compiler_iccarm.h.
 120         - Added additional access functions for physical timer.
 121       CMSIS-DAP: 1.2.0 (see revision history for details)
 122       CMSIS-DSP: 1.5.2 (see revision history for details)
 123       CMSIS-Driver: 2.6.0 (see revision history for details)
 124         - CAN Driver API V1.2.0
 125         - NAND Driver API V2.3.0
 126       CMSIS-RTOS:
 127         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 128       CMSIS-RTOS2:
 129         - API 2.1.2 (see revision history for details)
 130         - RTX 5.2.3 (see revision history for details)
 131       Devices:
 132         - Added GCC startup and linker script for Cortex-A9.
 133         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 134         - Added IAR startup code for Cortex-A9
 135     </release>
 136     <release version="5.1.1" date="2017-09-19">
 137       CMSIS-RTOS2:
 138       - RTX 5.2.1 (see revision history for details)
 139     </release>
 140     <release version="5.1.0" date="2017-08-04">
 141       CMSIS-Core(M): 5.0.2 (see revision history for details)
 142       - Changed Version Control macros to be core agnostic.
 143       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 144       CMSIS-Core(A): 1.0.0 (see revision history for details)
 145       - Initial release
 146       - IRQ Controller API 1.0.0
 147       CMSIS-Driver: 2.05 (see revision history for details)
 148       - All typedefs related to status have been made volatile.
 149       CMSIS-RTOS2:
 150       - API 2.1.1 (see revision history for details)
 151       - RTX 5.2.0 (see revision history for details)
 152       - OS Tick API 1.0.0
 153       CMSIS-DSP: 1.5.2 (see revision history for details)
 154       - Fixed GNU Compiler specific diagnostics.
 155       CMSIS-Pack: 1.5.0 (see revision history for details)
 156       - added System Description File (*.SDF) Format
 157       CMSIS-Zone: 0.0.1 (Preview)
 158       - Initial specification draft
 159     </release>
 160     <release version="5.0.1" date="2017-02-03">
 161       Package Description:
 162       - added taxonomy for Cclass RTOS
 163       CMSIS-RTOS2:
 164       - API 2.1   (see revision history for details)
 165       - RTX 5.1.0 (see revision history for details)
 166       CMSIS-Core: 5.0.1 (see revision history for details)
 167       - Added __PACKED_STRUCT macro
 168       - Added uVisior support
 169       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 170       - Updated template for secure main function (main_s.c)
 171       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 172       CMSIS-DSP: 1.5.1 (see revision history for details)
 173       - added ARMv8M DSP libraries.
 174       CMSIS-Pack:1.4.9 (see revision history for details)
 175       - added Pack Index File specification and schema file
 176     </release>
 177     <release version="5.0.0" date="2016-11-11">
 178       Changed open source license to Apache 2.0
 179       CMSIS_Core:
 180        - Added support for Cortex-M23 and Cortex-M33.
 181        - Added ARMv8-M device configurations for mainline and baseline.
 182        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 183        - Added cmsis_compiler.h to unify compiler behaviour.
 184        - Updated function SCB_EnableICache (for Cortex-M7).
 185        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 186       CMSIS-RTOS:
 187         - bug fix in RTX 4.82 (see revision history for details)
 188       CMSIS-RTOS2:
 189         - new API including compatibility layer to CMSIS-RTOS
 190         - reference implementation based on RTX5
 191         - supports all Cortex-M variants including TrustZone for ARMv8-M
 192       CMSIS-SVD:
 193        - reworked SVD format documentation
 194        - removed SVD file database documentation as SVD files are distributed in packs
 195        - updated SVDConv for Win32 and Linux
 196       CMSIS-DSP:
 197        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 198        - Added DSP libraries build projects to CMSIS pack.
 199     </release>
 200     <release version="4.5.0" date="2015-10-28">
 201       - CMSIS-Core     4.30.0  (see revision history for details)
 202       - CMSIS-DAP      1.1.0   (unchanged)
 203       - CMSIS-Driver   2.04.0  (see revision history for details)
 204       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 205       - CMSIS-Pack     1.4.1   (see revision history for details)
 206       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 207       - CMSIS-SVD      1.3.1   (see revision history for details)
 208     </release>
 209     <release version="4.4.0" date="2015-09-11">
 210       - CMSIS-Core     4.20   (see revision history for details)
 211       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 212       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 213       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 214       - CMSIS-RTOS
 215         -- API         1.02   (unchanged)
 216         -- RTX         4.79   (see revision history for details)
 217       - CMSIS-SVD      1.3.0  (see revision history for details)
 218       - CMSIS-DAP      1.1.0  (extended with SWO support)
 219     </release>
 220     <release version="4.3.0" date="2015-03-20">
 221       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 222       - CMSIS-DSP      1.4.5  (see revision history for details)
 223       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 224       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 225       - CMSIS-RTOS
 226         -- API         1.02   (unchanged)
 227         -- RTX         4.78   (see revision history for details)
 228       - CMSIS-SVD      1.2    (unchanged)
 229     </release>
 230     <release version="4.2.0" date="2014-09-24">
 231       Adding Cortex-M7 support
 232       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 233       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 234       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 235       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 236       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 237     </release>
 238     <release version="4.1.1" date="2014-06-30">
 239       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 240     </release>
 241     <release version="4.1.0" date="2014-06-12">
 242       - CMSIS-Driver   2.02  (incompatible update)
 243       - CMSIS-Pack     1.3   (see revision history for details)
 244       - CMSIS-DSP      1.4.2 (unchanged)
 245       - CMSIS-Core     3.30  (unchanged)
 246       - CMSIS-RTOS RTX 4.74  (unchanged)
 247       - CMSIS-RTOS API 1.02  (unchanged)
 248       - CMSIS-SVD      1.10  (unchanged)
 249       PACK:
 250       - removed G++ specific files from PACK
 251       - added Component Startup variant "C Startup"
 252       - added Pack Checking Utility
 253       - updated conditions to reflect tool-chain dependency
 254       - added Taxonomy for Graphics
 255       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 256     </release>
 257     <!-- release version="4.0.0">
 258       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 259       - CMSIS-Pack     1.1   Preliminary
 260       - CMSIS-DSP      1.4.2 (see revision history for details)
 261       - CMSIS-Core     3.30  (see revision history for details)
 262       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 263       - CMSIS-RTOS API 1.02  (unchanged)
 264       - CMSIS-SVD      1.10  (unchanged)
 265     </release -->
 266     <release version="3.20.4" date="2014-02-20">
 267       - CMSIS-RTOS 4.74 (see revision history for details)
 268       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 269     </release>
 270     <!-- release version="3.20.3">
 271       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 272       - CMSIS-RTOS 4.73 (see revision history for details)
 273     </release -->
 274     <!-- release version="3.20.2">
 275       - CMSIS-Pack documentation has been added
 276       - CMSIS-Drivers header and documentation have been added to PACK
 277       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 278     </release -->
 279     <!-- release version="3.20.1">
 280       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 281       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 282     </release -->
 283     <!-- release version="3.20.0">
 284       The software portions that are deployed in the application program are now under a BSD license which allows usage
 285       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 286       The individual components have been update as listed below:
 287       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 288       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 289       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 290       - CMSIS-SVD is unchanged.
 291     </release -->
 292   </releases>
 293
 294   <taxonomy>
 295     <description Cclass="Audio">Software components for audio processing</description>
 296     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 297     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 298     <description Cclass="Compiler">Compiler Software Extensions</description>
 299     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 300     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 301     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 302     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 303     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 304     <description Cclass="File System">File Drive Support and File System</description>
 305     <description Cclass="IoT Client">IoT cloud client connector</description>
 306     <description Cclass="IoT Service">IoT specific services</description>
 307     <description Cclass="IoT Utility">IoT specific software utility</description>
 308     <description Cclass="Graphics">Graphical User Interface</description>
 309     <description Cclass="Network">Network Stack using Internet Protocols</description>
 310     <description Cclass="RTOS">Real-time Operating System</description>
 311     <description Cclass="Security">Encryption for secure communication or storage</description>
 312     <description Cclass="USB">Universal Serial Bus Stack</description>
 313     <description Cclass="Utility">Generic software utility components</description>
 314   </taxonomy>
 315
 316   <devices>
 317     <!-- ******************************  Cortex-M0  ****************************** -->
 318     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 319       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 320       <description>
 321 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 322 - simple, easy-to-use programmers model
 323 - highly efficient ultra-low power operation
 324 - excellent code density
 325 - deterministic, high-performance interrupt handling
 326 - upward compatibility with the rest of the Cortex-M processor family.
 327       </description>
 328       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 329       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 330       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 331       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 332
 333       <device Dname="ARMCM0">
 334         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 335         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 336       </device>
 337     </family>
 338
 339     <!-- ******************************  Cortex-M0P  ****************************** -->
 340     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 341       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 342       <description>
 343 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 344 - simple, easy-to-use programmers model
 345 - highly efficient ultra-low power operation
 346 - excellent code density
 347 - deterministic, high-performance interrupt handling
 348 - upward compatibility with the rest of the Cortex-M processor family.
 349       </description>
 350       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 351       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 352       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 353       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 354
 355       <device Dname="ARMCM0P">
 356         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 357         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 358       </device>
 359
 360       <device Dname="ARMCM0P_MPU">
 361         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 362         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 363       </device>
 364     </family>
 365
 366     <!-- ******************************  Cortex-M1  ****************************** -->
 367     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 368       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 369       <description>
 370 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 371 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 372       </description>
 373       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 374       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 375       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 376       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 377
 378       <device Dname="ARMCM1">
 379         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 380         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 381       </device>
 382     </family>
 383
 384     <!-- ******************************  Cortex-M3  ****************************** -->
 385     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 386       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 387       <description>
 388 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 389 - simple, easy-to-use programmers model
 390 - highly efficient ultra-low power operation
 391 - excellent code density
 392 - deterministic, high-performance interrupt handling
 393 - upward compatibility with the rest of the Cortex-M processor family.
 394       </description>
 395       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 396       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 397       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 398       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 399
 400       <device Dname="ARMCM3">
 401         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 402         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 403       </device>
 404     </family>
 405
 406     <!-- ******************************  Cortex-M4  ****************************** -->
 407     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 408       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 409       <description>
 410 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 411 - simple, easy-to-use programmers model
 412 - highly efficient ultra-low power operation
 413 - excellent code density
 414 - deterministic, high-performance interrupt handling
 415 - upward compatibility with the rest of the Cortex-M processor family.
 416       </description>
 417       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 418       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 419       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 420       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 421
 422       <device Dname="ARMCM4">
 423         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 424         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 425       </device>
 426
 427       <device Dname="ARMCM4_FP">
 428         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 429         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 430       </device>
 431     </family>
 432
 433     <!-- ******************************  Cortex-M7  ****************************** -->
 434     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 435       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 436       <description>
 437 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 438 - simple, easy-to-use programmers model
 439 - highly efficient ultra-low power operation
 440 - excellent code density
 441 - deterministic, high-performance interrupt handling
 442 - upward compatibility with the rest of the Cortex-M processor family.
 443       </description>
 444       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 445       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 446       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 447       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 448
 449       <device Dname="ARMCM7">
 450         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 451         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 452       </device>
 453
 454       <device Dname="ARMCM7_SP">
 455         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 456         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 457       </device>
 458
 459       <device Dname="ARMCM7_DP">
 460         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 461         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 462       </device>
 463     </family>
 464
 465     <!-- ******************************  Cortex-M23  ********************** -->
 466     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 467       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 468       <description>
 469 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 470 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 471 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 472       </description>
 473       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 474       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 475       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 476       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 477       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 478       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 479
 480       <device Dname="ARMCM23">
 481         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 482         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 483       </device>
 484
 485       <device Dname="ARMCM23_TZ">
 486         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 487         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 488       </device>
 489     </family>
 490
 491     <!-- ******************************  Cortex-M33  ****************************** -->
 492     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 493       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 494       <description>
 495 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 496 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 497       </description>
 498       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 499       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 500       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 501       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 502       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 503       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 504
 505       <device Dname="ARMCM33">
 506         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 507         <description>
 508           no DSP Instructions, no Floating Point Unit, no TrustZone
 509         </description>
 510         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 511       </device>
 512
 513       <device Dname="ARMCM33_TZ">
 514         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 515         <description>
 516           no DSP Instructions, no Floating Point Unit, TrustZone
 517         </description>
 518         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 519       </device>
 520
 521       <device Dname="ARMCM33_DSP_FP">
 522         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 523         <description>
 524           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 525         </description>
 526         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 527       </device>
 528
 529       <device Dname="ARMCM33_DSP_FP_TZ">
 530         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 531         <description>
 532           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 533         </description>
 534         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 535       </device>
 536     </family>
 537
 538     <!-- ******************************  Cortex-M35P  ****************************** -->
 539     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 540       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 541       <description>
 542 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 543 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 544       </description>
 545
 546       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 547       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 548       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 549       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 550       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 551       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 552
 553       <device Dname="ARMCM35P">
 554         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 555         <description>
 556           no DSP Instructions, no Floating Point Unit, no TrustZone
 557         </description>
 558         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 559       </device>
 560
 561       <device Dname="ARMCM35P_TZ">
 562         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 563         <description>
 564           no DSP Instructions, no Floating Point Unit, TrustZone
 565         </description>
 566         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 567       </device>
 568
 569       <device Dname="ARMCM35P_DSP_FP">
 570         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 571         <description>
 572           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 573         </description>
 574         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 575       </device>
 576
 577       <device Dname="ARMCM35P_DSP_FP_TZ">
 578         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 579         <description>
 580           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 581         </description>
 582         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 583       </device>
 584     </family>
 585
 586     <!-- ******************************  ARMSC000  ****************************** -->
 587     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 588       <description>
 589 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 590 - simple, easy-to-use programmers model
 591 - highly efficient ultra-low power operation
 592 - excellent code density
 593 - deterministic, high-performance interrupt handling
 594       </description>
 595       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 596       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 597       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 598       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 599
 600       <device Dname="ARMSC000">
 601         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 602         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 603       </device>
 604     </family>
 605
 606     <!-- ******************************  ARMSC300  ****************************** -->
 607     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 608       <description>
 609 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 610 - simple, easy-to-use programmers model
 611 - highly efficient ultra-low power operation
 612 - excellent code density
 613 - deterministic, high-performance interrupt handling
 614       </description>
 615       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 616       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 617       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 618       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 619
 620       <device Dname="ARMSC300">
 621         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 622         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 623       </device>
 624     </family>
 625
 626     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 627     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 628       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 629       <description>
 630 Armv8-M Baseline based device with TrustZone
 631       </description>
 632       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 633       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 634       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 635       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 636       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 637       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 638
 639       <device Dname="ARMv8MBL">
 640         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 641         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 642       </device>
 643     </family>
 644
 645     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 646     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 647       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 648       <description>
 649 Armv8-M Mainline based device with TrustZone
 650       </description>
 651       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 652       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 653       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 654       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 655       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 656       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 657
 658       <device Dname="ARMv8MML">
 659         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 660         <description>
 661           no DSP Instructions, no Floating Point Unit, TrustZone
 662         </description>
 663         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 664       </device>
 665
 666       <device Dname="ARMv8MML_DSP">
 667         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 668         <description>
 669           DSP Instructions, no Floating Point Unit, TrustZone
 670         </description>
 671         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 672       </device>
 673
 674       <device Dname="ARMv8MML_SP">
 675         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 676         <description>
 677           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 678         </description>
 679         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 680       </device>
 681
 682       <device Dname="ARMv8MML_DSP_SP">
 683         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 684         <description>
 685           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 686         </description>
 687         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 688       </device>
 689
 690       <device Dname="ARMv8MML_DP">
 691         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 692         <description>
 693           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 694         </description>
 695         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 696       </device>
 697
 698       <device Dname="ARMv8MML_DSP_DP">
 699         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 700         <description>
 701           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 702         </description>
 703         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 704       </device>
 705     </family>
 706
 707     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 708     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 709       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 710       <description>
 711 Armv8.1-M Mainline based device with TrustZone and MVE
 712       </description>
 713       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 714       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 715       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 716       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 717       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 718       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 719
 720
 721       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 722         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 723         <description>
 724           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 725         </description>
 726         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 727       </device>
 728     </family>
 729
 730     <!-- ******************************  Cortex-A5  ****************************** -->
 731     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 732       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 733       <description>
 734 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 735 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 736 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 737       </description>
 738
 739       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 740       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 741       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 742       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 743
 744       <device Dname="ARMCA5">
 745         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 746         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 747       </device>
 748     </family>
 749
 750     <!-- ******************************  Cortex-A7  ****************************** -->
 751     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 752       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 753       <description>
 754 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 755 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 756 an optional integrated GIC, and an optional L2 cache controller.
 757       </description>
 758
 759       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 760       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 761       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 762       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 763
 764       <device Dname="ARMCA7">
 765         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 766         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 767       </device>
 768     </family>
 769
 770     <!-- ******************************  Cortex-A9  ****************************** -->
 771     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 772       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 773       <description>
 774 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 775 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 776 and 8-bit Java bytecodes in Jazelle state.
 777       </description>
 778
 779       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 780       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 781       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 782       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 783
 784       <device Dname="ARMCA9">
 785         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 786         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 787       </device>
 788     </family>
 789   </devices>
 790
 791
 792   <apis>
 793     <!-- CMSIS Device API -->
 794     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 795       <description>Device interrupt controller interface</description>
 796       <files>
 797         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 798       </files>
 799     </api>
 800     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 801       <description>RTOS Kernel system tick timer interface</description>
 802       <files>
 803         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 804       </files>
 805     </api>
 806     <!-- CMSIS-RTOS API -->
 807     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 808       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 809       <files>
 810         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 811       </files>
 812     </api>
 813     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 814       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 815       <files>
 816         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 817         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 818       </files>
 819     </api>
 820     <!-- CMSIS Driver API -->
 821     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 822       <description>USART Driver API for Cortex-M</description>
 823       <files>
 824         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 825         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 826       </files>
 827     </api>
 828     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 829       <description>SPI Driver API for Cortex-M</description>
 830       <files>
 831         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 832         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 833       </files>
 834     </api>
 835     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 836       <description>SAI Driver API for Cortex-M</description>
 837       <files>
 838         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 839         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 840       </files>
 841     </api>
 842     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 843       <description>I2C Driver API for Cortex-M</description>
 844       <files>
 845         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 846         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 847       </files>
 848     </api>
 849     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 850       <description>CAN Driver API for Cortex-M</description>
 851       <files>
 852         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 853         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 854       </files>
 855     </api>
 856     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 857       <description>Flash Driver API for Cortex-M</description>
 858       <files>
 859         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 860         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 861       </files>
 862     </api>
 863     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 864       <description>MCI Driver API for Cortex-M</description>
 865       <files>
 866         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 867         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 868       </files>
 869     </api>
 870     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 871       <description>NAND Flash Driver API for Cortex-M</description>
 872       <files>
 873         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 874         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 875       </files>
 876     </api>
 877     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 878       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 879       <files>
 880         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 881         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 882         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 883       </files>
 884     </api>
 885     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 886       <description>Ethernet MAC Driver API for Cortex-M</description>
 887       <files>
 888         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 889         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 890       </files>
 891     </api>
 892     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 893       <description>Ethernet PHY Driver API for Cortex-M</description>
 894       <files>
 895         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 896         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 897       </files>
 898     </api>
 899     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 900       <description>USB Device Driver API for Cortex-M</description>
 901       <files>
 902         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 903         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 904       </files>
 905     </api>
 906     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 907       <description>USB Host Driver API for Cortex-M</description>
 908       <files>
 909         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 910         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 911       </files>
 912     </api>
 913     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.0.0" exclusive="0">
 914       <description>WiFi driver</description>
 915       <files>
 916         <file category="doc"  name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 917         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 918       </files>
 919     </api>
 920   </apis>
 921
 922   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 923   <conditions>
 924     <!-- compiler -->
 925     <condition id="ARMCC6">
 926       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 927       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 928     </condition>
 929     <condition id="ARMCC5">
 930       <require Tcompiler="ARMCC" Toptions="AC5"/>
 931     </condition>
 932     <condition id="ARMCC">
 933       <require Tcompiler="ARMCC"/>
 934     </condition>
 935     <condition id="GCC">
 936       <require Tcompiler="GCC"/>
 937     </condition>
 938     <condition id="IAR">
 939       <require Tcompiler="IAR"/>
 940     </condition>
 941     <condition id="ARMCC GCC">
 942       <accept Tcompiler="ARMCC"/>
 943       <accept Tcompiler="GCC"/>
 944     </condition>
 945     <condition id="ARMCC GCC IAR">
 946       <accept Tcompiler="ARMCC"/>
 947       <accept Tcompiler="GCC"/>
 948       <accept Tcompiler="IAR"/>
 949     </condition>
 950
 951     <!-- Arm architecture -->
 952     <condition id="ARMv6-M Device">
 953       <description>Armv6-M architecture based device</description>
 954       <accept Dcore="Cortex-M0"/>
 955       <accept Dcore="Cortex-M1"/>
 956       <accept Dcore="Cortex-M0+"/>
 957       <accept Dcore="SC000"/>
 958     </condition>
 959     <condition id="ARMv7-M Device">
 960       <description>Armv7-M architecture based device</description>
 961       <accept Dcore="Cortex-M3"/>
 962       <accept Dcore="Cortex-M4"/>
 963       <accept Dcore="Cortex-M7"/>
 964       <accept Dcore="SC300"/>
 965     </condition>
 966     <condition id="ARMv8-M Device">
 967       <description>Armv8-M architecture based device</description>
 968       <accept Dcore="ARMV8MBL"/>
 969       <accept Dcore="ARMV8MML"/>
 970       <accept Dcore="ARMV81MML"/>
 971       <accept Dcore="Cortex-M23"/>
 972       <accept Dcore="Cortex-M33"/>
 973       <accept Dcore="Cortex-M35P"/>
 974     </condition>
 975     <condition id="ARMv8-M TZ Device">
 976       <description>Armv8-M architecture based device with TrustZone</description>
 977       <require condition="ARMv8-M Device"/>
 978       <require Dtz="TZ"/>
 979     </condition>
 980     <condition id="ARMv6_7-M Device">
 981       <description>Armv6_7-M architecture based device</description>
 982       <accept condition="ARMv6-M Device"/>
 983       <accept condition="ARMv7-M Device"/>
 984     </condition>
 985     <condition id="ARMv6_7_8-M Device">
 986       <description>Armv6_7_8-M architecture based device</description>
 987       <accept condition="ARMv6-M Device"/>
 988       <accept condition="ARMv7-M Device"/>
 989       <accept condition="ARMv8-M Device"/>
 990     </condition>
 991     <condition id="ARMv7-A Device">
 992       <description>Armv7-A architecture based device</description>
 993       <accept Dcore="Cortex-A5"/>
 994       <accept Dcore="Cortex-A7"/>
 995       <accept Dcore="Cortex-A9"/>
 996     </condition>
 997
 998     <!-- ARM core -->
 999     <condition id="CM0">
1000       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1001       <accept Dcore="Cortex-M0"/>
1002       <accept Dcore="Cortex-M0+"/>
1003       <accept Dcore="SC000"/>
1004     </condition>
1005     <condition id="CM1">
1006       <description>Cortex-M1</description>
1007       <require Dcore="Cortex-M1"/>
1008     </condition>
1009     <condition id="CM3">
1010       <description>Cortex-M3 or SC300 processor based device</description>
1011       <accept Dcore="Cortex-M3"/>
1012       <accept Dcore="SC300"/>
1013     </condition>
1014     <condition id="CM4">
1015       <description>Cortex-M4 processor based device</description>
1016       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1017     </condition>
1018     <condition id="CM4_FP">
1019       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1020       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1021       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1022       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1023     </condition>
1024     <condition id="CM7">
1025       <description>Cortex-M7 processor based device</description>
1026       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1027     </condition>
1028     <condition id="CM7_FP">
1029       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1030       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1031       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1032     </condition>
1033     <condition id="CM7_SP">
1034       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1035       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1036     </condition>
1037     <condition id="CM7_DP">
1038       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1039       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1040     </condition>
1041     <condition id="CM23">
1042       <description>Cortex-M23 processor based device</description>
1043       <require Dcore="Cortex-M23"/>
1044     </condition>
1045     <condition id="CM33">
1046       <description>Cortex-M33 processor based device</description>
1047       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1048     </condition>
1049     <condition id="CM33_FP">
1050       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1051       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1052     </condition>
1053     <condition id="CM35P">
1054       <description>Cortex-M35P processor based device</description>
1055       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1056     </condition>
1057     <condition id="CM35P_FP">
1058       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1059       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1060     </condition>
1061     <condition id="ARMv8MBL">
1062       <description>Armv8-M Baseline processor based device</description>
1063       <require Dcore="ARMV8MBL"/>
1064     </condition>
1065     <condition id="ARMv8MML">
1066       <description>Armv8-M Mainline processor based device</description>
1067       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1068     </condition>
1069     <condition id="ARMv8MML_FP">
1070       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1071       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1072       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1073     </condition>
1074
1075     <condition id="CM33_NODSP_NOFPU">
1076       <description>CM33, no DSP, no FPU</description>
1077       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1078     </condition>
1079     <condition id="CM33_DSP_NOFPU">
1080       <description>CM33, DSP, no FPU</description>
1081       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1082     </condition>
1083     <condition id="CM33_NODSP_SP">
1084       <description>CM33, no DSP, SP FPU</description>
1085       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1086     </condition>
1087     <condition id="CM33_DSP_SP">
1088       <description>CM33, DSP, SP FPU</description>
1089       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1090     </condition>
1091
1092     <condition id="CM35P_NODSP_NOFPU">
1093       <description>CM35P, no DSP, no FPU</description>
1094       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1095     </condition>
1096     <condition id="CM35P_DSP_NOFPU">
1097       <description>CM35P, DSP, no FPU</description>
1098       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1099     </condition>
1100     <condition id="CM35P_NODSP_SP">
1101       <description>CM35P, no DSP, SP FPU</description>
1102       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1103     </condition>
1104     <condition id="CM35P_DSP_SP">
1105       <description>CM35P, DSP, SP FPU</description>
1106       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1107     </condition>
1108
1109     <condition id="ARMv8MML_NODSP_NOFPU">
1110       <description>Armv8-M Mainline, no DSP, no FPU</description>
1111       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1112     </condition>
1113     <condition id="ARMv8MML_DSP_NOFPU">
1114       <description>Armv8-M Mainline, DSP, no FPU</description>
1115       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1116     </condition>
1117     <condition id="ARMv8MML_NODSP_SP">
1118       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1119       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1120     </condition>
1121     <condition id="ARMv8MML_DSP_SP">
1122       <description>Armv8-M Mainline, DSP, SP FPU</description>
1123       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1124     </condition>
1125
1126     <condition id="CA5_CA9">
1127       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1128       <accept Dcore="Cortex-A5"/>
1129       <accept Dcore="Cortex-A9"/>
1130     </condition>
1131
1132     <condition id="CA7">
1133       <description>Cortex-A7 processor based device</description>
1134       <accept Dcore="Cortex-A7"/>
1135     </condition>
1136
1137     <!-- ARMCC compiler -->
1138     <condition id="CA_ARMCC5">
1139       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1140       <require condition="ARMv7-A Device"/>
1141       <require condition="ARMCC5"/>
1142     </condition>
1143     <condition id="CA_ARMCC6">
1144       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1145       <require condition="ARMv7-A Device"/>
1146       <require condition="ARMCC6"/>
1147     </condition>
1148
1149     <condition id="CM0_ARMCC">
1150       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1151       <require condition="CM0"/>
1152       <require Tcompiler="ARMCC"/>
1153     </condition>
1154     <condition id="CM0_LE_ARMCC">
1155       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1156       <require condition="CM0_ARMCC"/>
1157       <require Dendian="Little-endian"/>
1158     </condition>
1159     <condition id="CM0_BE_ARMCC">
1160       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1161       <require condition="CM0_ARMCC"/>
1162       <require Dendian="Big-endian"/>
1163     </condition>
1164
1165     <condition id="CM1_ARMCC">
1166       <description>Cortex-M1 based device for the Arm Compiler</description>
1167       <require condition="CM1"/>
1168       <require Tcompiler="ARMCC"/>
1169     </condition>
1170     <condition id="CM1_LE_ARMCC">
1171       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1172       <require condition="CM1_ARMCC"/>
1173       <require Dendian="Little-endian"/>
1174     </condition>
1175     <condition id="CM1_BE_ARMCC">
1176       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1177       <require condition="CM1_ARMCC"/>
1178       <require Dendian="Big-endian"/>
1179     </condition>
1180
1181     <condition id="CM3_ARMCC">
1182       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1183       <require condition="CM3"/>
1184       <require Tcompiler="ARMCC"/>
1185     </condition>
1186     <condition id="CM3_LE_ARMCC">
1187       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1188       <require condition="CM3_ARMCC"/>
1189       <require Dendian="Little-endian"/>
1190     </condition>
1191     <condition id="CM3_BE_ARMCC">
1192       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1193       <require condition="CM3_ARMCC"/>
1194       <require Dendian="Big-endian"/>
1195     </condition>
1196
1197     <condition id="CM4_ARMCC">
1198       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1199       <require condition="CM4"/>
1200       <require Tcompiler="ARMCC"/>
1201     </condition>
1202     <condition id="CM4_LE_ARMCC">
1203       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1204       <require condition="CM4_ARMCC"/>
1205       <require Dendian="Little-endian"/>
1206     </condition>
1207     <condition id="CM4_BE_ARMCC">
1208       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1209       <require condition="CM4_ARMCC"/>
1210       <require Dendian="Big-endian"/>
1211     </condition>
1212
1213     <condition id="CM4_FP_ARMCC">
1214       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1215       <require condition="CM4_FP"/>
1216       <require Tcompiler="ARMCC"/>
1217     </condition>
1218     <condition id="CM4_FP_LE_ARMCC">
1219       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1220       <require condition="CM4_FP_ARMCC"/>
1221       <require Dendian="Little-endian"/>
1222     </condition>
1223     <condition id="CM4_FP_BE_ARMCC">
1224       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1225       <require condition="CM4_FP_ARMCC"/>
1226       <require Dendian="Big-endian"/>
1227     </condition>
1228
1229     <condition id="CM7_ARMCC">
1230       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1231       <require condition="CM7"/>
1232       <require Tcompiler="ARMCC"/>
1233     </condition>
1234     <condition id="CM7_LE_ARMCC">
1235       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1236       <require condition="CM7_ARMCC"/>
1237       <require Dendian="Little-endian"/>
1238     </condition>
1239     <condition id="CM7_BE_ARMCC">
1240       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1241       <require condition="CM7_ARMCC"/>
1242       <require Dendian="Big-endian"/>
1243     </condition>
1244
1245     <condition id="CM7_FP_ARMCC">
1246       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1247       <require condition="CM7_FP"/>
1248       <require Tcompiler="ARMCC"/>
1249     </condition>
1250     <condition id="CM7_FP_LE_ARMCC">
1251       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1252       <require condition="CM7_FP_ARMCC"/>
1253       <require Dendian="Little-endian"/>
1254     </condition>
1255     <condition id="CM7_FP_BE_ARMCC">
1256       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1257       <require condition="CM7_FP_ARMCC"/>
1258       <require Dendian="Big-endian"/>
1259     </condition>
1260
1261     <condition id="CM7_SP_ARMCC">
1262       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1263       <require condition="CM7_SP"/>
1264       <require Tcompiler="ARMCC"/>
1265     </condition>
1266     <condition id="CM7_SP_LE_ARMCC">
1267       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1268       <require condition="CM7_SP_ARMCC"/>
1269       <require Dendian="Little-endian"/>
1270     </condition>
1271     <condition id="CM7_SP_BE_ARMCC">
1272       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1273       <require condition="CM7_SP_ARMCC"/>
1274       <require Dendian="Big-endian"/>
1275     </condition>
1276
1277     <condition id="CM7_DP_ARMCC">
1278       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1279       <require condition="CM7_DP"/>
1280       <require Tcompiler="ARMCC"/>
1281     </condition>
1282     <condition id="CM7_DP_LE_ARMCC">
1283       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1284       <require condition="CM7_DP_ARMCC"/>
1285       <require Dendian="Little-endian"/>
1286     </condition>
1287     <condition id="CM7_DP_BE_ARMCC">
1288       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1289       <require condition="CM7_DP_ARMCC"/>
1290       <require Dendian="Big-endian"/>
1291     </condition>
1292
1293     <condition id="CM23_ARMCC">
1294       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1295       <require condition="CM23"/>
1296       <require Tcompiler="ARMCC"/>
1297     </condition>
1298     <condition id="CM23_LE_ARMCC">
1299       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1300       <require condition="CM23_ARMCC"/>
1301       <require Dendian="Little-endian"/>
1302     </condition>
1303
1304     <condition id="CM33_ARMCC">
1305       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1306       <require condition="CM33"/>
1307       <require Tcompiler="ARMCC"/>
1308     </condition>
1309     <condition id="CM33_LE_ARMCC">
1310       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1311       <require condition="CM33_ARMCC"/>
1312       <require Dendian="Little-endian"/>
1313     </condition>
1314
1315     <condition id="CM33_FP_ARMCC">
1316       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1317       <require condition="CM33_FP"/>
1318       <require Tcompiler="ARMCC"/>
1319     </condition>
1320     <condition id="CM33_FP_LE_ARMCC">
1321       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1322       <require condition="CM33_FP_ARMCC"/>
1323       <require Dendian="Little-endian"/>
1324     </condition>
1325
1326     <condition id="CM33_NODSP_NOFPU_ARMCC">
1327       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1328       <require condition="CM33_NODSP_NOFPU"/>
1329       <require Tcompiler="ARMCC"/>
1330     </condition>
1331     <condition id="CM33_DSP_NOFPU_ARMCC">
1332       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1333       <require condition="CM33_DSP_NOFPU"/>
1334       <require Tcompiler="ARMCC"/>
1335     </condition>
1336     <condition id="CM33_NODSP_SP_ARMCC">
1337       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1338       <require condition="CM33_NODSP_SP"/>
1339       <require Tcompiler="ARMCC"/>
1340     </condition>
1341     <condition id="CM33_DSP_SP_ARMCC">
1342       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1343       <require condition="CM33_DSP_SP"/>
1344       <require Tcompiler="ARMCC"/>
1345     </condition>
1346     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1347       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1348       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1349       <require Dendian="Little-endian"/>
1350     </condition>
1351     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1352       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1353       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1354       <require Dendian="Little-endian"/>
1355     </condition>
1356     <condition id="CM33_NODSP_SP_LE_ARMCC">
1357       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1358       <require condition="CM33_NODSP_SP_ARMCC"/>
1359       <require Dendian="Little-endian"/>
1360     </condition>
1361     <condition id="CM33_DSP_SP_LE_ARMCC">
1362       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1363       <require condition="CM33_DSP_SP_ARMCC"/>
1364       <require Dendian="Little-endian"/>
1365     </condition>
1366
1367     <condition id="CM35P_ARMCC">
1368       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1369       <require condition="CM35P"/>
1370       <require Tcompiler="ARMCC"/>
1371     </condition>
1372     <condition id="CM35P_LE_ARMCC">
1373       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1374       <require condition="CM35P_ARMCC"/>
1375       <require Dendian="Little-endian"/>
1376     </condition>
1377
1378     <condition id="CM35P_FP_ARMCC">
1379       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1380       <require condition="CM35P_FP"/>
1381       <require Tcompiler="ARMCC"/>
1382     </condition>
1383     <condition id="CM35P_FP_LE_ARMCC">
1384       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1385       <require condition="CM35P_FP_ARMCC"/>
1386       <require Dendian="Little-endian"/>
1387     </condition>
1388
1389     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1390       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1391       <require condition="CM35P_NODSP_NOFPU"/>
1392       <require Tcompiler="ARMCC"/>
1393     </condition>
1394     <condition id="CM35P_DSP_NOFPU_ARMCC">
1395       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1396       <require condition="CM35P_DSP_NOFPU"/>
1397       <require Tcompiler="ARMCC"/>
1398     </condition>
1399     <condition id="CM35P_NODSP_SP_ARMCC">
1400       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1401       <require condition="CM35P_NODSP_SP"/>
1402       <require Tcompiler="ARMCC"/>
1403     </condition>
1404     <condition id="CM35P_DSP_SP_ARMCC">
1405       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1406       <require condition="CM35P_DSP_SP"/>
1407       <require Tcompiler="ARMCC"/>
1408     </condition>
1409     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1410       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1411       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1412       <require Dendian="Little-endian"/>
1413     </condition>
1414     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1415       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1416       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1417       <require Dendian="Little-endian"/>
1418     </condition>
1419     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1420       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1421       <require condition="CM35P_NODSP_SP_ARMCC"/>
1422       <require Dendian="Little-endian"/>
1423     </condition>
1424     <condition id="CM35P_DSP_SP_LE_ARMCC">
1425       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1426       <require condition="CM35P_DSP_SP_ARMCC"/>
1427       <require Dendian="Little-endian"/>
1428     </condition>
1429
1430     <condition id="ARMv8MBL_ARMCC">
1431       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1432       <require condition="ARMv8MBL"/>
1433       <require Tcompiler="ARMCC"/>
1434     </condition>
1435     <condition id="ARMv8MBL_LE_ARMCC">
1436       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1437       <require condition="ARMv8MBL_ARMCC"/>
1438       <require Dendian="Little-endian"/>
1439     </condition>
1440
1441     <condition id="ARMv8MML_ARMCC">
1442       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1443       <require condition="ARMv8MML"/>
1444       <require Tcompiler="ARMCC"/>
1445     </condition>
1446     <condition id="ARMv8MML_LE_ARMCC">
1447       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1448       <require condition="ARMv8MML_ARMCC"/>
1449       <require Dendian="Little-endian"/>
1450     </condition>
1451
1452     <condition id="ARMv8MML_FP_ARMCC">
1453       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1454       <require condition="ARMv8MML_FP"/>
1455       <require Tcompiler="ARMCC"/>
1456     </condition>
1457     <condition id="ARMv8MML_FP_LE_ARMCC">
1458       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1459       <require condition="ARMv8MML_FP_ARMCC"/>
1460       <require Dendian="Little-endian"/>
1461     </condition>
1462
1463     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1464       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1465       <require condition="ARMv8MML_NODSP_NOFPU"/>
1466       <require Tcompiler="ARMCC"/>
1467     </condition>
1468     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1469       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1470       <require condition="ARMv8MML_DSP_NOFPU"/>
1471       <require Tcompiler="ARMCC"/>
1472     </condition>
1473     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1474       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1475       <require condition="ARMv8MML_NODSP_SP"/>
1476       <require Tcompiler="ARMCC"/>
1477     </condition>
1478     <condition id="ARMv8MML_DSP_SP_ARMCC">
1479       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1480       <require condition="ARMv8MML_DSP_SP"/>
1481       <require Tcompiler="ARMCC"/>
1482     </condition>
1483     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1484       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1485       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1486       <require Dendian="Little-endian"/>
1487     </condition>
1488     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1489       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1490       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1491       <require Dendian="Little-endian"/>
1492     </condition>
1493     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1494       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1495       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1496       <require Dendian="Little-endian"/>
1497     </condition>
1498     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1499       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1500       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1501       <require Dendian="Little-endian"/>
1502     </condition>
1503
1504     <!-- GCC compiler -->
1505     <condition id="CA_GCC">
1506       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1507       <require condition="ARMv7-A Device"/>
1508       <require Tcompiler="GCC"/>
1509     </condition>
1510
1511     <condition id="CM0_GCC">
1512       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1513       <require condition="CM0"/>
1514       <require Tcompiler="GCC"/>
1515     </condition>
1516     <condition id="CM0_LE_GCC">
1517       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1518       <require condition="CM0_GCC"/>
1519       <require Dendian="Little-endian"/>
1520     </condition>
1521     <condition id="CM0_BE_GCC">
1522       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1523       <require condition="CM0_GCC"/>
1524       <require Dendian="Big-endian"/>
1525     </condition>
1526
1527     <condition id="CM1_GCC">
1528       <description>Cortex-M1 based device for the GCC Compiler</description>
1529       <require condition="CM1"/>
1530       <require Tcompiler="GCC"/>
1531     </condition>
1532     <condition id="CM1_LE_GCC">
1533       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1534       <require condition="CM1_GCC"/>
1535       <require Dendian="Little-endian"/>
1536     </condition>
1537     <condition id="CM1_BE_GCC">
1538       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1539       <require condition="CM1_GCC"/>
1540       <require Dendian="Big-endian"/>
1541     </condition>
1542
1543     <condition id="CM3_GCC">
1544       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1545       <require condition="CM3"/>
1546       <require Tcompiler="GCC"/>
1547     </condition>
1548     <condition id="CM3_LE_GCC">
1549       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1550       <require condition="CM3_GCC"/>
1551       <require Dendian="Little-endian"/>
1552     </condition>
1553     <condition id="CM3_BE_GCC">
1554       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1555       <require condition="CM3_GCC"/>
1556       <require Dendian="Big-endian"/>
1557     </condition>
1558
1559     <condition id="CM4_GCC">
1560       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1561       <require condition="CM4"/>
1562       <require Tcompiler="GCC"/>
1563     </condition>
1564     <condition id="CM4_LE_GCC">
1565       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1566       <require condition="CM4_GCC"/>
1567       <require Dendian="Little-endian"/>
1568     </condition>
1569     <condition id="CM4_BE_GCC">
1570       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1571       <require condition="CM4_GCC"/>
1572       <require Dendian="Big-endian"/>
1573     </condition>
1574
1575     <condition id="CM4_FP_GCC">
1576       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1577       <require condition="CM4_FP"/>
1578       <require Tcompiler="GCC"/>
1579     </condition>
1580     <condition id="CM4_FP_LE_GCC">
1581       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1582       <require condition="CM4_FP_GCC"/>
1583       <require Dendian="Little-endian"/>
1584     </condition>
1585     <condition id="CM4_FP_BE_GCC">
1586       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1587       <require condition="CM4_FP_GCC"/>
1588       <require Dendian="Big-endian"/>
1589     </condition>
1590
1591     <condition id="CM7_GCC">
1592       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1593       <require condition="CM7"/>
1594       <require Tcompiler="GCC"/>
1595     </condition>
1596     <condition id="CM7_LE_GCC">
1597       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1598       <require condition="CM7_GCC"/>
1599       <require Dendian="Little-endian"/>
1600     </condition>
1601     <condition id="CM7_BE_GCC">
1602       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1603       <require condition="CM7_GCC"/>
1604       <require Dendian="Big-endian"/>
1605     </condition>
1606
1607     <condition id="CM7_FP_GCC">
1608       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1609       <require condition="CM7_FP"/>
1610       <require Tcompiler="GCC"/>
1611     </condition>
1612     <condition id="CM7_FP_LE_GCC">
1613       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1614       <require condition="CM7_FP_GCC"/>
1615       <require Dendian="Little-endian"/>
1616     </condition>
1617     <condition id="CM7_FP_BE_GCC">
1618       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1619       <require condition="CM7_FP_GCC"/>
1620       <require Dendian="Big-endian"/>
1621     </condition>
1622
1623     <condition id="CM7_SP_GCC">
1624       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1625       <require condition="CM7_SP"/>
1626       <require Tcompiler="GCC"/>
1627     </condition>
1628     <condition id="CM7_SP_LE_GCC">
1629       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1630       <require condition="CM7_SP_GCC"/>
1631       <require Dendian="Little-endian"/>
1632     </condition>
1633
1634     <condition id="CM7_DP_GCC">
1635       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1636       <require condition="CM7_DP"/>
1637       <require Tcompiler="GCC"/>
1638     </condition>
1639     <condition id="CM7_DP_LE_GCC">
1640       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1641       <require condition="CM7_DP_GCC"/>
1642       <require Dendian="Little-endian"/>
1643     </condition>
1644
1645     <condition id="CM23_GCC">
1646       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1647       <require condition="CM23"/>
1648       <require Tcompiler="GCC"/>
1649     </condition>
1650     <condition id="CM23_LE_GCC">
1651       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1652       <require condition="CM23_GCC"/>
1653       <require Dendian="Little-endian"/>
1654     </condition>
1655
1656     <condition id="CM33_GCC">
1657       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1658       <require condition="CM33"/>
1659       <require Tcompiler="GCC"/>
1660     </condition>
1661     <condition id="CM33_LE_GCC">
1662       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1663       <require condition="CM33_GCC"/>
1664       <require Dendian="Little-endian"/>
1665     </condition>
1666
1667     <condition id="CM33_FP_GCC">
1668       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1669       <require condition="CM33_FP"/>
1670       <require Tcompiler="GCC"/>
1671     </condition>
1672     <condition id="CM33_FP_LE_GCC">
1673       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1674       <require condition="CM33_FP_GCC"/>
1675       <require Dendian="Little-endian"/>
1676     </condition>
1677
1678     <condition id="CM33_NODSP_NOFPU_GCC">
1679       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1680       <require condition="CM33_NODSP_NOFPU"/>
1681       <require Tcompiler="GCC"/>
1682     </condition>
1683     <condition id="CM33_DSP_NOFPU_GCC">
1684       <description>CM33, DSP, no FPU, GCC Compiler</description>
1685       <require condition="CM33_DSP_NOFPU"/>
1686       <require Tcompiler="GCC"/>
1687     </condition>
1688     <condition id="CM33_NODSP_SP_GCC">
1689       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1690       <require condition="CM33_NODSP_SP"/>
1691       <require Tcompiler="GCC"/>
1692     </condition>
1693     <condition id="CM33_DSP_SP_GCC">
1694       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1695       <require condition="CM33_DSP_SP"/>
1696       <require Tcompiler="GCC"/>
1697     </condition>
1698     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1699       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1700       <require condition="CM33_NODSP_NOFPU_GCC"/>
1701       <require Dendian="Little-endian"/>
1702     </condition>
1703     <condition id="CM33_DSP_NOFPU_LE_GCC">
1704       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1705       <require condition="CM33_DSP_NOFPU_GCC"/>
1706       <require Dendian="Little-endian"/>
1707     </condition>
1708     <condition id="CM33_NODSP_SP_LE_GCC">
1709       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1710       <require condition="CM33_NODSP_SP_GCC"/>
1711       <require Dendian="Little-endian"/>
1712     </condition>
1713     <condition id="CM33_DSP_SP_LE_GCC">
1714       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1715       <require condition="CM33_DSP_SP_GCC"/>
1716       <require Dendian="Little-endian"/>
1717     </condition>
1718
1719     <condition id="CM35P_GCC">
1720       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1721       <require condition="CM35P"/>
1722       <require Tcompiler="GCC"/>
1723     </condition>
1724     <condition id="CM35P_LE_GCC">
1725       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1726       <require condition="CM35P_GCC"/>
1727       <require Dendian="Little-endian"/>
1728     </condition>
1729
1730     <condition id="CM35P_FP_GCC">
1731       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1732       <require condition="CM35P_FP"/>
1733       <require Tcompiler="GCC"/>
1734     </condition>
1735     <condition id="CM35P_FP_LE_GCC">
1736       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1737       <require condition="CM35P_FP_GCC"/>
1738       <require Dendian="Little-endian"/>
1739     </condition>
1740
1741     <condition id="CM35P_NODSP_NOFPU_GCC">
1742       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1743       <require condition="CM35P_NODSP_NOFPU"/>
1744       <require Tcompiler="GCC"/>
1745     </condition>
1746     <condition id="CM35P_DSP_NOFPU_GCC">
1747       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1748       <require condition="CM35P_DSP_NOFPU"/>
1749       <require Tcompiler="GCC"/>
1750     </condition>
1751     <condition id="CM35P_NODSP_SP_GCC">
1752       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1753       <require condition="CM35P_NODSP_SP"/>
1754       <require Tcompiler="GCC"/>
1755     </condition>
1756     <condition id="CM35P_DSP_SP_GCC">
1757       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1758       <require condition="CM35P_DSP_SP"/>
1759       <require Tcompiler="GCC"/>
1760     </condition>
1761     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1762       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1763       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1764       <require Dendian="Little-endian"/>
1765     </condition>
1766     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1767       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1768       <require condition="CM35P_DSP_NOFPU_GCC"/>
1769       <require Dendian="Little-endian"/>
1770     </condition>
1771     <condition id="CM35P_NODSP_SP_LE_GCC">
1772       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1773       <require condition="CM35P_NODSP_SP_GCC"/>
1774       <require Dendian="Little-endian"/>
1775     </condition>
1776     <condition id="CM35P_DSP_SP_LE_GCC">
1777       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1778       <require condition="CM35P_DSP_SP_GCC"/>
1779       <require Dendian="Little-endian"/>
1780     </condition>
1781
1782     <condition id="ARMv8MBL_GCC">
1783       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1784       <require condition="ARMv8MBL"/>
1785       <require Tcompiler="GCC"/>
1786     </condition>
1787     <condition id="ARMv8MBL_LE_GCC">
1788       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1789       <require condition="ARMv8MBL_GCC"/>
1790       <require Dendian="Little-endian"/>
1791     </condition>
1792
1793     <condition id="ARMv8MML_GCC">
1794       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1795       <require condition="ARMv8MML"/>
1796       <require Tcompiler="GCC"/>
1797     </condition>
1798     <condition id="ARMv8MML_LE_GCC">
1799       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1800       <require condition="ARMv8MML_GCC"/>
1801       <require Dendian="Little-endian"/>
1802     </condition>
1803
1804     <condition id="ARMv8MML_FP_GCC">
1805       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1806       <require condition="ARMv8MML_FP"/>
1807       <require Tcompiler="GCC"/>
1808     </condition>
1809     <condition id="ARMv8MML_FP_LE_GCC">
1810       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1811       <require condition="ARMv8MML_FP_GCC"/>
1812       <require Dendian="Little-endian"/>
1813     </condition>
1814
1815     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1816       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1817       <require condition="ARMv8MML_NODSP_NOFPU"/>
1818       <require Tcompiler="GCC"/>
1819     </condition>
1820     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1821       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1822       <require condition="ARMv8MML_DSP_NOFPU"/>
1823       <require Tcompiler="GCC"/>
1824     </condition>
1825     <condition id="ARMv8MML_NODSP_SP_GCC">
1826       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1827       <require condition="ARMv8MML_NODSP_SP"/>
1828       <require Tcompiler="GCC"/>
1829     </condition>
1830     <condition id="ARMv8MML_DSP_SP_GCC">
1831       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1832       <require condition="ARMv8MML_DSP_SP"/>
1833       <require Tcompiler="GCC"/>
1834     </condition>
1835     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1836       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1837       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1838       <require Dendian="Little-endian"/>
1839     </condition>
1840     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1841       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1842       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1843       <require Dendian="Little-endian"/>
1844     </condition>
1845     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1846       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1847       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1848       <require Dendian="Little-endian"/>
1849     </condition>
1850     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1851       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1852       <require condition="ARMv8MML_DSP_SP_GCC"/>
1853       <require Dendian="Little-endian"/>
1854     </condition>
1855
1856     <!-- IAR compiler -->
1857     <condition id="CA_IAR">
1858       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1859       <require condition="ARMv7-A Device"/>
1860       <require Tcompiler="IAR"/>
1861     </condition>
1862
1863     <condition id="CM0_IAR">
1864       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1865       <require condition="CM0"/>
1866       <require Tcompiler="IAR"/>
1867     </condition>
1868     <condition id="CM0_LE_IAR">
1869       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1870       <require condition="CM0_IAR"/>
1871       <require Dendian="Little-endian"/>
1872     </condition>
1873     <condition id="CM0_BE_IAR">
1874       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1875       <require condition="CM0_IAR"/>
1876       <require Dendian="Big-endian"/>
1877     </condition>
1878
1879     <condition id="CM1_IAR">
1880       <description>Cortex-M1 based device for the IAR Compiler</description>
1881       <require condition="CM1"/>
1882       <require Tcompiler="IAR"/>
1883     </condition>
1884     <condition id="CM1_LE_IAR">
1885       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1886       <require condition="CM1_IAR"/>
1887       <require Dendian="Little-endian"/>
1888     </condition>
1889     <condition id="CM1_BE_IAR">
1890       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1891       <require condition="CM1_IAR"/>
1892       <require Dendian="Big-endian"/>
1893     </condition>
1894
1895     <condition id="CM3_IAR">
1896       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1897       <require condition="CM3"/>
1898       <require Tcompiler="IAR"/>
1899     </condition>
1900     <condition id="CM3_LE_IAR">
1901       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1902       <require condition="CM3_IAR"/>
1903       <require Dendian="Little-endian"/>
1904     </condition>
1905     <condition id="CM3_BE_IAR">
1906       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1907       <require condition="CM3_IAR"/>
1908       <require Dendian="Big-endian"/>
1909     </condition>
1910
1911     <condition id="CM4_IAR">
1912       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1913       <require condition="CM4"/>
1914       <require Tcompiler="IAR"/>
1915     </condition>
1916     <condition id="CM4_LE_IAR">
1917       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1918       <require condition="CM4_IAR"/>
1919       <require Dendian="Little-endian"/>
1920     </condition>
1921     <condition id="CM4_BE_IAR">
1922       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1923       <require condition="CM4_IAR"/>
1924       <require Dendian="Big-endian"/>
1925     </condition>
1926
1927     <condition id="CM4_FP_IAR">
1928       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1929       <require condition="CM4_FP"/>
1930       <require Tcompiler="IAR"/>
1931     </condition>
1932     <condition id="CM4_FP_LE_IAR">
1933       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1934       <require condition="CM4_FP_IAR"/>
1935       <require Dendian="Little-endian"/>
1936     </condition>
1937     <condition id="CM4_FP_BE_IAR">
1938       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1939       <require condition="CM4_FP_IAR"/>
1940       <require Dendian="Big-endian"/>
1941     </condition>
1942
1943     <condition id="CM7_IAR">
1944       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1945       <require condition="CM7"/>
1946       <require Tcompiler="IAR"/>
1947     </condition>
1948     <condition id="CM7_LE_IAR">
1949       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1950       <require condition="CM7_IAR"/>
1951       <require Dendian="Little-endian"/>
1952     </condition>
1953     <condition id="CM7_BE_IAR">
1954       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1955       <require condition="CM7_IAR"/>
1956       <require Dendian="Big-endian"/>
1957     </condition>
1958
1959     <condition id="CM7_FP_IAR">
1960       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1961       <require condition="CM7_FP"/>
1962       <require Tcompiler="IAR"/>
1963     </condition>
1964     <condition id="CM7_FP_LE_IAR">
1965       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1966       <require condition="CM7_FP_IAR"/>
1967       <require Dendian="Little-endian"/>
1968     </condition>
1969     <condition id="CM7_FP_BE_IAR">
1970       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1971       <require condition="CM7_FP_IAR"/>
1972       <require Dendian="Big-endian"/>
1973     </condition>
1974
1975     <condition id="CM7_SP_IAR">
1976       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1977       <require condition="CM7_SP"/>
1978       <require Tcompiler="IAR"/>
1979     </condition>
1980     <condition id="CM7_SP_LE_IAR">
1981       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1982       <require condition="CM7_SP_IAR"/>
1983       <require Dendian="Little-endian"/>
1984     </condition>
1985     <condition id="CM7_SP_BE_IAR">
1986       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1987       <require condition="CM7_SP_IAR"/>
1988       <require Dendian="Big-endian"/>
1989     </condition>
1990
1991     <condition id="CM7_DP_IAR">
1992       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1993       <require condition="CM7_DP"/>
1994       <require Tcompiler="IAR"/>
1995     </condition>
1996     <condition id="CM7_DP_LE_IAR">
1997       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1998       <require condition="CM7_DP_IAR"/>
1999       <require Dendian="Little-endian"/>
2000     </condition>
2001     <condition id="CM7_DP_BE_IAR">
2002       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2003       <require condition="CM7_DP_IAR"/>
2004       <require Dendian="Big-endian"/>
2005     </condition>
2006
2007     <condition id="CM23_IAR">
2008       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2009       <require condition="CM23"/>
2010       <require Tcompiler="IAR"/>
2011     </condition>
2012     <condition id="CM23_LE_IAR">
2013       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2014       <require condition="CM23_IAR"/>
2015       <require Dendian="Little-endian"/>
2016     </condition>
2017
2018     <condition id="CM33_IAR">
2019       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2020       <require condition="CM33"/>
2021       <require Tcompiler="IAR"/>
2022     </condition>
2023     <condition id="CM33_LE_IAR">
2024       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2025       <require condition="CM33_IAR"/>
2026       <require Dendian="Little-endian"/>
2027     </condition>
2028
2029     <condition id="CM33_FP_IAR">
2030       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2031       <require condition="CM33_FP"/>
2032       <require Tcompiler="IAR"/>
2033     </condition>
2034     <condition id="CM33_FP_LE_IAR">
2035       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2036       <require condition="CM33_FP_IAR"/>
2037       <require Dendian="Little-endian"/>
2038     </condition>
2039
2040     <condition id="CM33_NODSP_NOFPU_IAR">
2041       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2042       <require condition="CM33_NODSP_NOFPU"/>
2043       <require Tcompiler="IAR"/>
2044     </condition>
2045     <condition id="CM33_DSP_NOFPU_IAR">
2046       <description>CM33, DSP, no FPU, IAR Compiler</description>
2047       <require condition="CM33_DSP_NOFPU"/>
2048       <require Tcompiler="IAR"/>
2049     </condition>
2050     <condition id="CM33_NODSP_SP_IAR">
2051       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2052       <require condition="CM33_NODSP_SP"/>
2053       <require Tcompiler="IAR"/>
2054     </condition>
2055     <condition id="CM33_DSP_SP_IAR">
2056       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2057       <require condition="CM33_DSP_SP"/>
2058       <require Tcompiler="IAR"/>
2059     </condition>
2060     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2061       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2062       <require condition="CM33_NODSP_NOFPU_IAR"/>
2063       <require Dendian="Little-endian"/>
2064     </condition>
2065     <condition id="CM33_DSP_NOFPU_LE_IAR">
2066       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2067       <require condition="CM33_DSP_NOFPU_IAR"/>
2068       <require Dendian="Little-endian"/>
2069     </condition>
2070     <condition id="CM33_NODSP_SP_LE_IAR">
2071       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2072       <require condition="CM33_NODSP_SP_IAR"/>
2073       <require Dendian="Little-endian"/>
2074     </condition>
2075     <condition id="CM33_DSP_SP_LE_IAR">
2076       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2077       <require condition="CM33_DSP_SP_IAR"/>
2078       <require Dendian="Little-endian"/>
2079     </condition>
2080
2081     <condition id="CM35P_IAR">
2082       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2083       <require condition="CM35P"/>
2084       <require Tcompiler="IAR"/>
2085     </condition>
2086     <condition id="CM35P_LE_IAR">
2087       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2088       <require condition="CM35P_IAR"/>
2089       <require Dendian="Little-endian"/>
2090     </condition>
2091
2092     <condition id="CM35P_FP_IAR">
2093       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2094       <require condition="CM35P_FP"/>
2095       <require Tcompiler="IAR"/>
2096     </condition>
2097     <condition id="CM35P_FP_LE_IAR">
2098       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2099       <require condition="CM35P_FP_IAR"/>
2100       <require Dendian="Little-endian"/>
2101     </condition>
2102
2103     <condition id="CM35P_NODSP_NOFPU_IAR">
2104       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2105       <require condition="CM35P_NODSP_NOFPU"/>
2106       <require Tcompiler="IAR"/>
2107     </condition>
2108     <condition id="CM35P_DSP_NOFPU_IAR">
2109       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2110       <require condition="CM35P_DSP_NOFPU"/>
2111       <require Tcompiler="IAR"/>
2112     </condition>
2113     <condition id="CM35P_NODSP_SP_IAR">
2114       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2115       <require condition="CM35P_NODSP_SP"/>
2116       <require Tcompiler="IAR"/>
2117     </condition>
2118     <condition id="CM35P_DSP_SP_IAR">
2119       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2120       <require condition="CM35P_DSP_SP"/>
2121       <require Tcompiler="IAR"/>
2122     </condition>
2123     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2124       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2125       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2126       <require Dendian="Little-endian"/>
2127     </condition>
2128     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2129       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2130       <require condition="CM35P_DSP_NOFPU_IAR"/>
2131       <require Dendian="Little-endian"/>
2132     </condition>
2133     <condition id="CM35P_NODSP_SP_LE_IAR">
2134       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2135       <require condition="CM35P_NODSP_SP_IAR"/>
2136       <require Dendian="Little-endian"/>
2137     </condition>
2138     <condition id="CM35P_DSP_SP_LE_IAR">
2139       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2140       <require condition="CM35P_DSP_SP_IAR"/>
2141       <require Dendian="Little-endian"/>
2142     </condition>
2143
2144     <condition id="ARMv8MBL_IAR">
2145       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2146       <require condition="ARMv8MBL"/>
2147       <require Tcompiler="IAR"/>
2148     </condition>
2149     <condition id="ARMv8MBL_LE_IAR">
2150       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2151       <require condition="ARMv8MBL_IAR"/>
2152       <require Dendian="Little-endian"/>
2153     </condition>
2154
2155     <condition id="ARMv8MML_IAR">
2156       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2157       <require condition="ARMv8MML"/>
2158       <require Tcompiler="IAR"/>
2159     </condition>
2160     <condition id="ARMv8MML_LE_IAR">
2161       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2162       <require condition="ARMv8MML_IAR"/>
2163       <require Dendian="Little-endian"/>
2164     </condition>
2165
2166     <condition id="ARMv8MML_FP_IAR">
2167       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2168       <require condition="ARMv8MML_FP"/>
2169       <require Tcompiler="IAR"/>
2170     </condition>
2171     <condition id="ARMv8MML_FP_LE_IAR">
2172       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2173       <require condition="ARMv8MML_FP_IAR"/>
2174       <require Dendian="Little-endian"/>
2175     </condition>
2176
2177     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2178       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2179       <require condition="ARMv8MML_NODSP_NOFPU"/>
2180       <require Tcompiler="IAR"/>
2181     </condition>
2182     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2183       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2184       <require condition="ARMv8MML_DSP_NOFPU"/>
2185       <require Tcompiler="IAR"/>
2186     </condition>
2187     <condition id="ARMv8MML_NODSP_SP_IAR">
2188       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2189       <require condition="ARMv8MML_NODSP_SP"/>
2190       <require Tcompiler="IAR"/>
2191     </condition>
2192     <condition id="ARMv8MML_DSP_SP_IAR">
2193       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2194       <require condition="ARMv8MML_DSP_SP"/>
2195       <require Tcompiler="IAR"/>
2196     </condition>
2197     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2198       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2199       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2200       <require Dendian="Little-endian"/>
2201     </condition>
2202     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2203       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2204       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2205       <require Dendian="Little-endian"/>
2206     </condition>
2207     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2208       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2209       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2210       <require Dendian="Little-endian"/>
2211     </condition>
2212     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2213       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2214       <require condition="ARMv8MML_DSP_SP_IAR"/>
2215       <require Dendian="Little-endian"/>
2216     </condition>
2217
2218     <!-- conditions selecting single devices and CMSIS Core -->
2219     <condition id="ARMCM0 CMSIS">
2220       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2221       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2222       <require Cclass="CMSIS" Cgroup="CORE"/>
2223     </condition>
2224
2225     <condition id="ARMCM0+ CMSIS">
2226       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2227       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2228       <require Cclass="CMSIS" Cgroup="CORE"/>
2229     </condition>
2230
2231     <condition id="ARMCM1 CMSIS">
2232       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2233       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2234       <require Cclass="CMSIS" Cgroup="CORE"/>
2235     </condition>
2236
2237     <condition id="ARMCM3 CMSIS">
2238       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2239       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2240       <require Cclass="CMSIS" Cgroup="CORE"/>
2241     </condition>
2242
2243     <condition id="ARMCM4 CMSIS">
2244       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2245       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2246       <require Cclass="CMSIS" Cgroup="CORE"/>
2247     </condition>
2248
2249     <condition id="ARMCM7 CMSIS">
2250       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2251       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2252       <require Cclass="CMSIS" Cgroup="CORE"/>
2253     </condition>
2254
2255     <condition id="ARMCM23 CMSIS">
2256       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2257       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2258       <require Cclass="CMSIS" Cgroup="CORE"/>
2259     </condition>
2260
2261     <condition id="ARMCM33 CMSIS">
2262       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2263       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2264       <require Cclass="CMSIS" Cgroup="CORE"/>
2265     </condition>
2266
2267     <condition id="ARMCM35P CMSIS">
2268       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2269       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2270       <require Cclass="CMSIS" Cgroup="CORE"/>
2271     </condition>
2272
2273     <condition id="ARMSC000 CMSIS">
2274       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2275       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2276       <require Cclass="CMSIS" Cgroup="CORE"/>
2277     </condition>
2278
2279     <condition id="ARMSC300 CMSIS">
2280       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2281       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2282       <require Cclass="CMSIS" Cgroup="CORE"/>
2283     </condition>
2284
2285     <condition id="ARMv8MBL CMSIS">
2286       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2287       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2288       <require Cclass="CMSIS" Cgroup="CORE"/>
2289     </condition>
2290
2291     <condition id="ARMv8MML CMSIS">
2292       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2293       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2294       <require Cclass="CMSIS" Cgroup="CORE"/>
2295     </condition>
2296
2297     <condition id="ARMv81MML CMSIS">
2298       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2299       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2300       <require Cclass="CMSIS" Cgroup="CORE"/>
2301     </condition>
2302
2303     <condition id="ARMCA5 CMSIS">
2304       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2305       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2306       <require Cclass="CMSIS" Cgroup="CORE"/>
2307     </condition>
2308
2309     <condition id="ARMCA7 CMSIS">
2310       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2311       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2312       <require Cclass="CMSIS" Cgroup="CORE"/>
2313     </condition>
2314
2315     <condition id="ARMCA9 CMSIS">
2316       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2317       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2318       <require Cclass="CMSIS" Cgroup="CORE"/>
2319     </condition>
2320
2321     <!-- CMSIS DSP -->
2322     <condition id="CMSIS DSP">
2323       <description>Components required for DSP</description>
2324       <require condition="ARMv6_7_8-M Device"/>
2325       <require condition="ARMCC GCC IAR"/>
2326       <require Cclass="CMSIS" Cgroup="CORE"/>
2327     </condition>
2328
2329     <!-- CMSIS NN -->
2330     <condition id="CMSIS NN">
2331       <description>Components required for NN</description>
2332       <require condition="CMSIS DSP"/>
2333     </condition>
2334
2335     <!-- RTOS RTX -->
2336     <condition id="RTOS RTX">
2337       <description>Components required for RTOS RTX</description>
2338       <require condition="ARMv6_7-M Device"/>
2339       <require condition="ARMCC GCC IAR"/>
2340       <require Cclass="Device" Cgroup="Startup"/>
2341       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2342     </condition>
2343     <condition id="RTOS RTX IFX">
2344       <description>Components required for RTOS RTX IFX</description>
2345       <require condition="ARMv6_7-M Device"/>
2346       <require condition="ARMCC GCC IAR"/>
2347       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2348       <require Cclass="Device" Cgroup="Startup"/>
2349       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2350     </condition>
2351     <condition id="RTOS RTX5">
2352       <description>Components required for RTOS RTX5</description>
2353       <require condition="ARMv6_7_8-M Device"/>
2354       <require condition="ARMCC GCC IAR"/>
2355       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2356     </condition>
2357     <condition id="RTOS2 RTX5">
2358       <description>Components required for RTOS2 RTX5</description>
2359       <require condition="ARMv6_7_8-M Device"/>
2360       <require condition="ARMCC GCC IAR"/>
2361       <require Cclass="CMSIS"  Cgroup="CORE"/>
2362       <require Cclass="Device" Cgroup="Startup"/>
2363     </condition>
2364     <condition id="RTOS2 RTX5 v7-A">
2365       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2366       <require condition="ARMv7-A Device"/>
2367       <require condition="ARMCC GCC IAR"/>
2368       <require Cclass="CMSIS"  Cgroup="CORE"/>
2369       <require Cclass="Device" Cgroup="Startup"/>
2370       <require Cclass="Device" Cgroup="OS Tick"/>
2371       <require Cclass="Device" Cgroup="IRQ Controller"/>
2372     </condition>
2373     <condition id="RTOS2 RTX5 Lib">
2374       <description>Components required for RTOS2 RTX5 Library</description>
2375       <require condition="ARMv6_7_8-M Device"/>
2376       <require condition="ARMCC GCC IAR"/>
2377       <require Cclass="CMSIS"  Cgroup="CORE"/>
2378       <require Cclass="Device" Cgroup="Startup"/>
2379     </condition>
2380     <condition id="RTOS2 RTX5 NS">
2381       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2382       <require condition="ARMv8-M TZ Device"/>
2383       <require condition="ARMCC GCC IAR"/>
2384       <require Cclass="CMSIS"  Cgroup="CORE"/>
2385       <require Cclass="Device" Cgroup="Startup"/>
2386     </condition>
2387
2388     <!-- OS Tick -->
2389     <condition id="OS Tick PTIM">
2390       <description>Components required for OS Tick Private Timer</description>
2391       <require condition="CA5_CA9"/>
2392       <require Cclass="Device" Cgroup="IRQ Controller"/>
2393     </condition>
2394
2395     <condition id="OS Tick GTIM">
2396       <description>Components required for OS Tick Generic Physical Timer</description>
2397       <require condition="CA7"/>
2398       <require Cclass="Device" Cgroup="IRQ Controller"/>
2399     </condition>
2400
2401   </conditions>
2402
2403   <components>
2404     <!-- CMSIS-Core component -->
2405     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.4.0"  condition="ARMv6_7_8-M Device" >
2406       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2407       <files>
2408         <!-- CPU independent -->
2409         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2410         <file category="include" name="CMSIS/Core/Include/"/>
2411         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2412         <!-- Code template -->
2413         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2414         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2415       </files>
2416     </component>
2417
2418     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.4"  condition="ARMv7-A Device" >
2419       <description>CMSIS-CORE for Cortex-A</description>
2420       <files>
2421         <!-- CPU independent -->
2422         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2423         <file category="include" name="CMSIS/Core_A/Include/"/>
2424       </files>
2425     </component>
2426
2427     <!-- CMSIS-Startup components -->
2428     <!-- Cortex-M0 -->
2429     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM0 CMSIS">
2430       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2431       <files>
2432         <!-- include folder / device header file -->
2433         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2434         <!-- startup / system file -->
2435         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.1" attr="config"/>
2436         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2437         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2438         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2439         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2440       </files>
2441     </component>
2442     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM0 CMSIS">
2443       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2444       <files>
2445         <!-- include folder / device header file -->
2446         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2447         <!-- startup / system file -->
2448         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2449         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.0.1" attr="config" condition="GCC"/>
2450         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2451         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2452         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2453       </files>
2454     </component>
2455
2456     <!-- Cortex-M0+ -->
2457     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM0+ CMSIS">
2458       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2459       <files>
2460         <!-- include folder / device header file -->
2461         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2462         <!-- startup / system file -->
2463         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.1" attr="config"/>
2464         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2465         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2466         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2467         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2468       </files>
2469     </component>
2470     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM0+ CMSIS">
2471       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2472       <files>
2473         <!-- include folder / device header file -->
2474         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2475         <!-- startup / system file -->
2476         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2477         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.0.1" attr="config" condition="GCC"/>
2478         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2479         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2480         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2481       </files>
2482     </component>
2483
2484     <!-- Cortex-M1 -->
2485     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM1 CMSIS">
2486       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2487       <files>
2488         <!-- include folder / device header file -->
2489         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2490         <!-- startup / system file -->
2491         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.1" attr="config"/>
2492         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2493         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2494         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2495         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2496       </files>
2497     </component>
2498     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM1 CMSIS">
2499       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2500       <files>
2501         <!-- include folder / device header file -->
2502         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2503         <!-- startup / system file -->
2504         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2505         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.0.1" attr="config" condition="GCC"/>
2506         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2507         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2508         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2509       </files>
2510     </component>
2511
2512     <!-- Cortex-M3 -->
2513     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM3 CMSIS">
2514       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2515       <files>
2516         <!-- include folder / device header file -->
2517         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2518         <!-- startup / system file -->
2519         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.1" attr="config"/>
2520         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2521         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2522         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2523         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2524       </files>
2525     </component>
2526     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM3 CMSIS">
2527       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2528       <files>
2529         <!-- include folder / device header file -->
2530         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2531         <!-- startup / system file -->
2532         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2533         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.0.1" attr="config" condition="GCC"/>
2534         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2535         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2536         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2537       </files>
2538     </component>
2539
2540     <!-- Cortex-M4 -->
2541     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM4 CMSIS">
2542       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2543       <files>
2544         <!-- include folder / device header file -->
2545         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2546         <!-- startup / system file -->
2547         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.1" attr="config"/>
2548         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2549         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2550         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2551        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2552       </files>
2553     </component>
2554     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM4 CMSIS">
2555       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2556       <files>
2557         <!-- include folder / device header file -->
2558         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2559         <!-- startup / system file -->
2560         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2561         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.0.1" attr="config" condition="GCC"/>
2562         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2563         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2564         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2565       </files>
2566     </component>
2567
2568     <!-- Cortex-M7 -->
2569     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM7 CMSIS">
2570       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2571       <files>
2572         <!-- include folder / device header file -->
2573         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2574         <!-- startup / system file -->
2575         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.1" attr="config"/>
2576         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2577         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2578         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2579         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2580       </files>
2581     </component>
2582     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM7 CMSIS">
2583       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2584       <files>
2585         <!-- include folder / device header file -->
2586         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2587         <!-- startup / system file -->
2588         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2589         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.0.1" attr="config" condition="GCC"/>
2590         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2591         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2592         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2593       </files>
2594     </component>
2595
2596     <!-- Cortex-M23 -->
2597     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM23 CMSIS">
2598       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2599       <files>
2600         <!-- include folder / device header file -->
2601         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2602         <!-- startup / system file -->
2603         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.1" attr="config"/>
2604         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
2605         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2606         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.0" attr="config"/>
2607         <!-- SAU configuration -->
2608         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2609       </files>
2610     </component>
2611     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.1" condition="ARMCM23 CMSIS">
2612       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2613       <files>
2614         <!-- include folder / device header file -->
2615         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2616         <!-- startup / system file -->
2617         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.1" attr="config" condition="ARMCC"/>
2618         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.0.1" attr="config" condition="GCC"/>
2619         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.0.0" attr="config" condition="GCC"/>
2620         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2621         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2622         <!-- SAU configuration -->
2623         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2624       </files>
2625     </component>
2626
2627     <!-- Cortex-M33 -->
2628     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM33 CMSIS">
2629       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2630       <files>
2631         <!-- include folder / device header file -->
2632         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2633         <!-- startup / system file -->
2634         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.1" attr="config"/>
2635         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2636         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2637         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2638         <!-- SAU configuration -->
2639         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2640       </files>
2641     </component>
2642     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMCM33 CMSIS">
2643       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2644       <files>
2645         <!-- include folder / device header file -->
2646         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2647         <!-- startup / system file -->
2648         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2649         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.0.1" attr="config" condition="GCC"/>
2650         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2651         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2652         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2653         <!-- SAU configuration -->
2654         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2655       </files>
2656     </component>
2657
2658     <!-- Cortex-M35P -->
2659     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMCM35P CMSIS">
2660       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2661       <files>
2662         <!-- include folder / device header file -->
2663         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2664         <!-- startup / system file -->
2665         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.1" attr="config"/>
2666         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2667         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2668         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2669         <!-- SAU configuration -->
2670         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2671       </files>
2672     </component>
2673     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.1" condition="ARMCM35P CMSIS">
2674       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2675       <files>
2676         <!-- include folder / device header file -->
2677         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2678         <!-- startup / system file -->
2679         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2680         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.1" attr="config" condition="GCC"/>
2681         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2682         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
2683         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2684         <!-- SAU configuration -->
2685         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2686       </files>
2687     </component>
2688
2689     <!-- Cortex-SC000 -->
2690     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMSC000 CMSIS">
2691       <description>System and Startup for Generic Arm SC000 device</description>
2692       <files>
2693         <!-- include folder / device header file -->
2694         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2695         <!-- startup / system file -->
2696         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.1" attr="config"/>
2697         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2698         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2699         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2700         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2701       </files>
2702     </component>
2703     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMSC000 CMSIS">
2704       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2705       <files>
2706         <!-- include folder / device header file -->
2707         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2708         <!-- startup / system file -->
2709         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2710         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.0.1" attr="config" condition="GCC"/>
2711         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2712         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2713         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2714       </files>
2715     </component>
2716
2717     <!-- Cortex-SC300 -->
2718     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMSC300 CMSIS">
2719       <description>System and Startup for Generic Arm SC300 device</description>
2720       <files>
2721         <!-- include folder / device header file -->
2722         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2723         <!-- startup / system file -->
2724         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.1" attr="config"/>
2725         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2726         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2727         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2728         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2729       </files>
2730     </component>
2731     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMSC300 CMSIS">
2732       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2733       <files>
2734         <!-- include folder / device header file -->
2735         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2736         <!-- startup / system file -->
2737         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2738         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.0.1" attr="config" condition="GCC"/>
2739         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2740         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2741         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2742       </files>
2743     </component>
2744
2745     <!-- ARMv8MBL -->
2746     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMv8MBL CMSIS">
2747       <description>System and Startup for Generic Armv8-M Baseline device</description>
2748       <files>
2749         <!-- include folder / device header file -->
2750         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2751         <!-- startup / system file -->
2752         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.1" attr="config"/>
2753         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
2754         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2755         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.0" attr="config"/>
2756         <!-- SAU configuration -->
2757         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2758       </files>
2759     </component>
2760     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.1" condition="ARMv8MBL CMSIS">
2761       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2762       <files>
2763         <!-- include folder / device header file -->
2764         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2765         <!-- startup / system file -->
2766         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.1" attr="config" condition="ARMCC"/>
2767         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.0.1" attr="config" condition="GCC"/>
2768         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2769         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2770         <!-- SAU configuration -->
2771         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2772       </files>
2773     </component>
2774
2775     <!-- ARMv8MML -->
2776     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.1" condition="ARMv8MML CMSIS">
2777       <description>System and Startup for Generic Armv8-M Mainline device</description>
2778       <files>
2779         <!-- include folder / device header file -->
2780         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2781         <!-- startup / system file -->
2782         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.1" attr="config"/>
2783         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2784         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2785         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2786         <!-- SAU configuration -->
2787         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2788       </files>
2789     </component>
2790     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.1" condition="ARMv8MML CMSIS">
2791       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2792       <files>
2793         <!-- include folder / device header file -->
2794         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2795         <!-- startup / system file -->
2796         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2797         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.0.1" attr="config" condition="GCC"/>
2798         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2799         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2800         <!-- SAU configuration -->
2801         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2802       </files>
2803     </component>
2804
2805     <!-- ARMv81MML -->
2806     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv81MML CMSIS">
2807       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2808       <files>
2809         <!-- include folder / device header file -->
2810         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2811         <!-- startup / system file -->
2812         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.1" attr="config"/>
2813         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2814         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.0.0" attr="config" condition="GCC"/>
2815         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.1.0" attr="config"/>
2816         <!-- SAU configuration -->
2817         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2818       </files>
2819     </component>
2820
2821     <!-- Cortex-A5 -->
2822     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2823       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2824       <files>
2825         <!-- include folder / device header file -->
2826         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2827         <!-- startup / system / mmu files -->
2828         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2829         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2830         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2831         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2832         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2833         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2834         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2835         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2836         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2837         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2838         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2839         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2840
2841       </files>
2842     </component>
2843
2844     <!-- Cortex-A7 -->
2845     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2846       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2847       <files>
2848         <!-- include folder / device header file -->
2849         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2850         <!-- startup / system / mmu files -->
2851         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2852         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2853         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2854         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2855         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2856         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2857         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2858         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2859         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2860         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2861         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2862         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2863       </files>
2864     </component>
2865
2866     <!-- Cortex-A9 -->
2867     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2868       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2869       <files>
2870         <!-- include folder / device header file -->
2871         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2872         <!-- startup / system / mmu files -->
2873         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2874         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2875         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2876         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2877         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2878         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2879         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2880         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2881         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2882         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2883         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2884         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2885       </files>
2886     </component>
2887
2888     <!-- IRQ Controller -->
2889     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2890       <description>IRQ Controller implementation using GIC</description>
2891       <files>
2892         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2893       </files>
2894     </component>
2895
2896     <!-- OS Tick -->
2897     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2898       <description>OS Tick implementation using Private Timer</description>
2899       <files>
2900         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2901       </files>
2902     </component>
2903
2904     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2905       <description>OS Tick implementation using Generic Physical Timer</description>
2906       <files>
2907         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2908       </files>
2909     </component>
2910
2911     <!-- CMSIS-DSP component -->
2912     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.7.0" isDefaultVariant="true" condition="CMSIS DSP">
2913       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2914       <files>
2915         <!-- CPU independent -->
2916         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2917         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
2918
2919         <!-- CPU and Compiler dependent -->
2920         <!-- ARMCC -->
2921         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2922         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2923         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2924         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2925         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2926         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2927         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2928         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2929         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2930         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2931         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2932         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2933         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2934         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2935         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2936         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2937
2938         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2939         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2940         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2941         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2942         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2943         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2944         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2945         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2946         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2947         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2948         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2949         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2950         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2951         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2952         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
2953         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
2954
2955         <!-- GCC -->
2956         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2957         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2958         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2959         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2960         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
2961         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2962         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2963         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2964
2965         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2966         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2967         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2968         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2969         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2970         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2971         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2972         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2973         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2974         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2975         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2976         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2977         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2978         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2979         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
2980         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
2981
2982         <!-- IAR -->
2983         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2984         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2985         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2986         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2987         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2988         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2989         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2990         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2991         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2992         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2993         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2994         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2995         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2996         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2997         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
2998         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
2999
3000         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3001         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3002         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3003         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3004         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3005         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3006         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3007         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3008         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3009         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3010         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3011         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3012         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3013         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3014         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3015         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3016
3017       </files>
3018     </component>
3019     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.7.0" condition="CMSIS DSP">
3020       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3021       <files>
3022         <!-- CPU independent -->
3023         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3024         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3025
3026         <!-- DSP sources (core) -->
3027         <file category="source" name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3028         <file category="source" name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3029         <file category="source" name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3030         <file category="source" name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3031         <file category="source" name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3032         <file category="source" name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3033         <file category="source" name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3034         <file category="source" name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3035         <file category="source" name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3036         <file category="source" name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3037
3038       </files>
3039     </component>
3040
3041     <!-- CMSIS-NN component -->
3042     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.2.0" condition="CMSIS NN">
3043       <description>CMSIS-NN Neural Network Library</description>
3044       <files>
3045         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3046         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3047
3048         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3049         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3050         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3051         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3052
3053         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3054         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3055         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3056         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3057         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3058         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3059         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3060         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3061         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3062         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3063         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3064         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3065         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
3066
3067         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3068         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3069         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3070         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3071         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3072         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3073
3074         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3075         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3076         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3077         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3078         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3079
3080         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3081
3082         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3083         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3084       </files>
3085     </component>
3086
3087     <!-- CMSIS-RTOS Keil RTX component -->
3088     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3089       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3090       <RTE_Components_h>
3091         <!-- the following content goes into file 'RTE_Components.h' -->
3092         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3093         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3094       </RTE_Components_h>
3095       <files>
3096         <!-- CPU independent -->
3097         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3098         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3099         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3100
3101         <!-- RTX templates -->
3102         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3103         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3104         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3105         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3106         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3107         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3108         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3109         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3110         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3111         <!-- tool-chain specific template file -->
3112         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3113         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3114         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3115
3116         <!-- CPU and Compiler dependent -->
3117         <!-- ARMCC -->
3118         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3119         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3120         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3121         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3122         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3123         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3124         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3125         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3126         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3127         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3128         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3129         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3130         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3131         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3132         <!-- GCC -->
3133         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3134         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3135         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3136         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3137         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3138         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3139         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3140         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3141         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3142         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3143         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3144         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3145         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3146         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3147         <!-- IAR -->
3148         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3149         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3150         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3151         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3152         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3153         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3154         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3155         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3156         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3157         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3158         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3159         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3160         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3161         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3162       </files>
3163     </component>
3164     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3165     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3166       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3167       <RTE_Components_h>
3168         <!-- the following content goes into file 'RTE_Components.h' -->
3169         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3170         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3171       </RTE_Components_h>
3172       <files>
3173         <!-- CPU independent -->
3174         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3175         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3176         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3177
3178         <!-- RTX templates -->
3179         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3180         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3181         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3182         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3183         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3184         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3185         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3186         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3187         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3188         <!-- tool-chain specific template file -->
3189         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3190         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3191         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3192
3193         <!-- CPU and Compiler dependent -->
3194         <!-- ARMCC -->
3195         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3196         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3197         <!-- GCC -->
3198         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3199         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3200         <!-- IAR -->
3201       </files>
3202     </component>
3203
3204     <!-- CMSIS-RTOS Keil RTX5 component -->
3205     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.2" Capiversion="1.0.0" condition="RTOS RTX5">
3206       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3207       <RTE_Components_h>
3208         <!-- the following content goes into file 'RTE_Components.h' -->
3209         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3210         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3211       </RTE_Components_h>
3212       <files>
3213         <!-- RTX header file -->
3214         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3215         <!-- RTX compatibility module for API V1 -->
3216         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3217       </files>
3218     </component>
3219
3220     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3221     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
3222       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
3223       <RTE_Components_h>
3224         <!-- the following content goes into file 'RTE_Components.h' -->
3225         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3226         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3227       </RTE_Components_h>
3228       <files>
3229         <!-- RTX documentation -->
3230         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3231
3232         <!-- RTX header files -->
3233         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3234
3235         <!-- RTX configuration -->
3236         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3237         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3238
3239         <!-- RTX templates -->
3240         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3241         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3242         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3243         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3244         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3245         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3246         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3247         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3248         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3249         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3250
3251         <!-- RTX library configuration -->
3252         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3253
3254         <!-- RTX libraries (CPU and Compiler dependent) -->
3255         <!-- ARMCC -->
3256         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3257         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3258         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3259         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3260         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3261         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3262         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3263         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3264         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3265         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3266         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3267         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3268         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3269         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3270         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3271         <!-- GCC -->
3272         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3273         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3274         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3275         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3276         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3277         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3278         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3279         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3280         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3281         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3282         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3283         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3284         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3285         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3286         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3287         <!-- IAR -->
3288         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3289         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3290         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3291         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3292         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3293         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3294         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3295         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3296         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3297         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3298         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3299         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3300         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3301         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3302         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3303       </files>
3304     </component>
3305     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3306       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
3307       <RTE_Components_h>
3308         <!-- the following content goes into file 'RTE_Components.h' -->
3309         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3310         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3311         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3312       </RTE_Components_h>
3313       <files>
3314         <!-- RTX documentation -->
3315         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3316
3317         <!-- RTX header files -->
3318         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3319
3320         <!-- RTX configuration -->
3321         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3322         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3323
3324         <!-- RTX templates -->
3325         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3326         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3327         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3328         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3329         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3330         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3331         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3332         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3333         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3334         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3335
3336         <!-- RTX library configuration -->
3337         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3338
3339         <!-- RTX libraries (CPU and Compiler dependent) -->
3340         <!-- ARMCC -->
3341         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3342         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3343         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3344         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3345         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3346         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3347         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3348         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3349         <!-- GCC -->
3350         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3351         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3352         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3353         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3354         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3355         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3356         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3357         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3358         <!-- IAR -->
3359         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3360         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3361         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3362         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3363         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3364         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3365         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3366         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3367       </files>
3368     </component>
3369     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3370       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3371       <RTE_Components_h>
3372         <!-- the following content goes into file 'RTE_Components.h' -->
3373         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3374         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3375         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3376       </RTE_Components_h>
3377       <files>
3378         <!-- RTX documentation -->
3379         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3380
3381         <!-- RTX header files -->
3382         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3383
3384         <!-- RTX configuration -->
3385         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3386         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3387
3388         <!-- RTX templates -->
3389         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3390         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3391         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3392         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3393         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3394         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3395         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3396         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3397         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3398         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3399
3400         <!-- RTX sources (core) -->
3401         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3402         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3403         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3404         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3405         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3406         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3407         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3408         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3409         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3410         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3411         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3412         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3413         <!-- RTX sources (library configuration) -->
3414         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3415         <!-- RTX sources (handlers ARMCC) -->
3416         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3417         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3418         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3419         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3420         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3421         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3422         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3423         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3424         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3425         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3426         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3427         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3428         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3429         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3430         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3431         <!-- RTX sources (handlers GCC) -->
3432         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3433         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3434         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3435         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3436         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3437         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3438         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3439         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3440         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3441         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3442         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3443         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3444         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3445         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3446         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3447         <!-- RTX sources (handlers IAR) -->
3448         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3449         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3450         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3451         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3452         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3453         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3454         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3455         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3456         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3457         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3458         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3459         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3460         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3461         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3462         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3463         <!-- OS Tick (SysTick) -->
3464         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3465       </files>
3466     </component>
3467     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3468       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3469       <RTE_Components_h>
3470         <!-- the following content goes into file 'RTE_Components.h' -->
3471         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3472         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3473         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3474       </RTE_Components_h>
3475       <files>
3476         <!-- RTX documentation -->
3477         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3478
3479         <!-- RTX header files -->
3480         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3481
3482         <!-- RTX configuration -->
3483         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3484         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3485
3486         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3487
3488         <!-- RTX templates -->
3489         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3490         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3491         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3492         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3493         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3494         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3495         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3496         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3497         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3498         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3499
3500         <!-- RTX sources (core) -->
3501         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3502         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3503         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3504         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3505         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3506         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3507         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3508         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3509         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3510         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3511         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3512         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3513         <!-- RTX sources (library configuration) -->
3514         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3515         <!-- RTX sources (handlers ARMCC) -->
3516         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3517         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3518         <!-- RTX sources (handlers GCC) -->
3519         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3520         <!-- RTX sources (handlers IAR) -->
3521         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3522       </files>
3523     </component>
3524     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3525       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3526       <RTE_Components_h>
3527         <!-- the following content goes into file 'RTE_Components.h' -->
3528         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3529         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3530         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3531         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3532       </RTE_Components_h>
3533       <files>
3534         <!-- RTX documentation -->
3535         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3536
3537         <!-- RTX header files -->
3538         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3539
3540         <!-- RTX configuration -->
3541         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3542         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3543
3544         <!-- RTX templates -->
3545         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3546         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3547         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3548         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3549         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3550         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3551         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3552         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3553         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3554         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3555
3556         <!-- RTX sources (core) -->
3557         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3558         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3559         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3560         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3561         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3562         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3563         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3564         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3565         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3566         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3567         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3568         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3569         <!-- RTX sources (library configuration) -->
3570         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3571         <!-- RTX sources (ARMCC handlers) -->
3572         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3573         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3574         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3575         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3576         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3577         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3578         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3579         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3580         <!-- RTX sources (GCC handlers) -->
3581         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3582         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3583         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3584         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3585         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3586         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3587         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3588         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3589         <!-- RTX sources (IAR handlers) -->
3590         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3591         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3592         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3593         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3594         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3595         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3596         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3597         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3598         <!-- OS Tick (SysTick) -->
3599         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3600       </files>
3601     </component>
3602
3603     <!-- CMSIS-Driver Custom components -->
3604     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3605       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3606       <files>
3607         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3608         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3609       </files>
3610     </component>
3611     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3612       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3613       <files>
3614         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3615         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3616       </files>
3617     </component>
3618     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.1.0" Capiversion="1.1.0">
3619       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3620       <files>
3621         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3622         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3623       </files>
3624     </component>
3625     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3626       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3627       <files>
3628         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3629         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3630       </files>
3631     </component>
3632     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.2.0" Capiversion="1.2.0">
3633       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3634       <files>
3635         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3636         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3637       </files>
3638     </component>
3639     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3640       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3641       <files>
3642         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3643         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3644       </files>
3645     </component>
3646     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3647       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3648       <files>
3649         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3650         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3651       </files>
3652     </component>
3653     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3654       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3655       <files>
3656         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3657         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3658       </files>
3659     </component>
3660     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3661       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3662       <files>
3663         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3664         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3665         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3666         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3667       </files>
3668     </component>
3669     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3670       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3671       <files>
3672         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3673         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3674       </files>
3675     </component>
3676     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3677       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3678       <files>
3679         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3680         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3681       </files>
3682     </component>
3683     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3684       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3685       <files>
3686         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3687         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3688       </files>
3689     </component>
3690     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3691       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3692       <files>
3693         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3694         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3695       </files>
3696     </component>
3697     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.0.0">
3698       <description>Access to #include Driver_WiFi.h file</description>
3699       <files>
3700         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3701         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3702       </files>
3703     </component>
3704   </components>
3705
3706   <boards>
3707     <board name="uVision Simulator" vendor="Keil">
3708       <description>uVision Simulator</description>
3709       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3710       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3711       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3712       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3713       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3714       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3715       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3716       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3717       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3718       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3719       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3720       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3721       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3722       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3723       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3724       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3725       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3726       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3727       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3728       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3729       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3730       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3731       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3732       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3733     </board>
3734
3735     <board name="EWARM Simulator" vendor="IAR">
3736       <description>EWARM Simulator</description>
3737       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3738       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3739       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3740       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3741       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3742       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3743       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3744       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3745       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3746       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3747       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3748       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3749       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3750       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3751       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3752       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3753       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3754       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3755       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3756       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3757       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3758       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3759       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3760       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3761     </board>
3762   </boards>
3763
3764   <examples>
3765     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3766       <description>DSP_Lib Class Marks example</description>
3767       <board name="uVision Simulator" vendor="Keil"/>
3768       <project>
3769         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3770       </project>
3771       <attributes>
3772         <component Cclass="CMSIS" Cgroup="CORE"/>
3773         <component Cclass="CMSIS" Cgroup="DSP"/>
3774         <component Cclass="Device" Cgroup="Startup"/>
3775         <category>Getting Started</category>
3776       </attributes>
3777     </example>
3778
3779     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3780       <description>DSP_Lib Convolution example</description>
3781       <board name="uVision Simulator" vendor="Keil"/>
3782       <project>
3783         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3784       </project>
3785       <attributes>
3786         <component Cclass="CMSIS" Cgroup="CORE"/>
3787         <component Cclass="CMSIS" Cgroup="DSP"/>
3788         <component Cclass="Device" Cgroup="Startup"/>
3789         <category>Getting Started</category>
3790       </attributes>
3791     </example>
3792
3793     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3794       <description>DSP_Lib Dotproduct example</description>
3795       <board name="uVision Simulator" vendor="Keil"/>
3796       <project>
3797         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3798       </project>
3799       <attributes>
3800         <component Cclass="CMSIS" Cgroup="CORE"/>
3801         <component Cclass="CMSIS" Cgroup="DSP"/>
3802         <component Cclass="Device" Cgroup="Startup"/>
3803         <category>Getting Started</category>
3804       </attributes>
3805     </example>
3806
3807     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3808       <description>DSP_Lib FFT Bin example</description>
3809       <board name="uVision Simulator" vendor="Keil"/>
3810       <project>
3811         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3812       </project>
3813       <attributes>
3814         <component Cclass="CMSIS" Cgroup="CORE"/>
3815         <component Cclass="CMSIS" Cgroup="DSP"/>
3816         <component Cclass="Device" Cgroup="Startup"/>
3817         <category>Getting Started</category>
3818       </attributes>
3819     </example>
3820
3821     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3822       <description>DSP_Lib FIR example</description>
3823       <board name="uVision Simulator" vendor="Keil"/>
3824       <project>
3825         <environment name="uv" load="arm_fir_example.uvprojx"/>
3826       </project>
3827       <attributes>
3828         <component Cclass="CMSIS" Cgroup="CORE"/>
3829         <component Cclass="CMSIS" Cgroup="DSP"/>
3830         <component Cclass="Device" Cgroup="Startup"/>
3831         <category>Getting Started</category>
3832       </attributes>
3833     </example>
3834
3835     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3836       <description>DSP_Lib Graphic Equalizer example</description>
3837       <board name="uVision Simulator" vendor="Keil"/>
3838       <project>
3839         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3840       </project>
3841       <attributes>
3842         <component Cclass="CMSIS" Cgroup="CORE"/>
3843         <component Cclass="CMSIS" Cgroup="DSP"/>
3844         <component Cclass="Device" Cgroup="Startup"/>
3845         <category>Getting Started</category>
3846       </attributes>
3847     </example>
3848
3849     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3850       <description>DSP_Lib Linear Interpolation example</description>
3851       <board name="uVision Simulator" vendor="Keil"/>
3852       <project>
3853         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3854       </project>
3855       <attributes>
3856         <component Cclass="CMSIS" Cgroup="CORE"/>
3857         <component Cclass="CMSIS" Cgroup="DSP"/>
3858         <component Cclass="Device" Cgroup="Startup"/>
3859         <category>Getting Started</category>
3860       </attributes>
3861     </example>
3862
3863     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3864       <description>DSP_Lib Matrix example</description>
3865       <board name="uVision Simulator" vendor="Keil"/>
3866       <project>
3867         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3868       </project>
3869       <attributes>
3870         <component Cclass="CMSIS" Cgroup="CORE"/>
3871         <component Cclass="CMSIS" Cgroup="DSP"/>
3872         <component Cclass="Device" Cgroup="Startup"/>
3873         <category>Getting Started</category>
3874       </attributes>
3875     </example>
3876
3877     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3878       <description>DSP_Lib Signal Convergence example</description>
3879       <board name="uVision Simulator" vendor="Keil"/>
3880       <project>
3881         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3882       </project>
3883       <attributes>
3884         <component Cclass="CMSIS" Cgroup="CORE"/>
3885         <component Cclass="CMSIS" Cgroup="DSP"/>
3886         <component Cclass="Device" Cgroup="Startup"/>
3887         <category>Getting Started</category>
3888       </attributes>
3889     </example>
3890
3891     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3892       <description>DSP_Lib Sinus/Cosinus example</description>
3893       <board name="uVision Simulator" vendor="Keil"/>
3894       <project>
3895         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3896       </project>
3897       <attributes>
3898         <component Cclass="CMSIS" Cgroup="CORE"/>
3899         <component Cclass="CMSIS" Cgroup="DSP"/>
3900         <component Cclass="Device" Cgroup="Startup"/>
3901         <category>Getting Started</category>
3902       </attributes>
3903     </example>
3904
3905     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3906       <description>DSP_Lib Variance example</description>
3907       <board name="uVision Simulator" vendor="Keil"/>
3908       <project>
3909         <environment name="uv" load="arm_variance_example.uvprojx"/>
3910       </project>
3911       <attributes>
3912         <component Cclass="CMSIS" Cgroup="CORE"/>
3913         <component Cclass="CMSIS" Cgroup="DSP"/>
3914         <component Cclass="Device" Cgroup="Startup"/>
3915         <category>Getting Started</category>
3916       </attributes>
3917     </example>
3918
3919     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3920       <description>Neural Network CIFAR10 example</description>
3921       <board name="uVision Simulator" vendor="Keil"/>
3922       <project>
3923         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3924       </project>
3925       <attributes>
3926         <component Cclass="CMSIS" Cgroup="CORE"/>
3927         <component Cclass="CMSIS" Cgroup="DSP"/>
3928         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3929         <component Cclass="Device" Cgroup="Startup"/>
3930         <category>Getting Started</category>
3931       </attributes>
3932     </example>
3933
3934     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
3935       <description>Neural Network CIFAR10 example</description>
3936       <board name="EWARM Simulator" vendor="IAR"/>
3937       <project>
3938         <environment name="iar" load="NN-example-cifar10.ewp"/>
3939       </project>
3940       <attributes>
3941         <component Cclass="CMSIS" Cgroup="CORE"/>
3942         <component Cclass="CMSIS" Cgroup="DSP"/>
3943         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3944         <component Cclass="Device" Cgroup="Startup"/>
3945         <category>Getting Started</category>
3946       </attributes>
3947     </example>
3948
3949     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
3950       <description>Neural Network GRU example</description>
3951       <board name="uVision Simulator" vendor="Keil"/>
3952       <project>
3953         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3954       </project>
3955       <attributes>
3956         <component Cclass="CMSIS" Cgroup="CORE"/>
3957         <component Cclass="CMSIS" Cgroup="DSP"/>
3958         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3959         <component Cclass="Device" Cgroup="Startup"/>
3960         <category>Getting Started</category>
3961       </attributes>
3962     </example>
3963
3964     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
3965       <description>Neural Network GRU example</description>
3966       <board name="EWARM Simulator" vendor="IAR"/>
3967       <project>
3968         <environment name="iar" load="NN-example-gru.ewp"/>
3969       </project>
3970       <attributes>
3971         <component Cclass="CMSIS" Cgroup="CORE"/>
3972         <component Cclass="CMSIS" Cgroup="DSP"/>
3973         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3974         <component Cclass="Device" Cgroup="Startup"/>
3975         <category>Getting Started</category>
3976       </attributes>
3977     </example>
3978
3979     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3980       <description>CMSIS-RTOS2 Blinky example</description>
3981       <board name="uVision Simulator" vendor="Keil"/>
3982       <project>
3983         <environment name="uv" load="Blinky.uvprojx"/>
3984       </project>
3985       <attributes>
3986         <component Cclass="CMSIS" Cgroup="CORE"/>
3987         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3988         <component Cclass="Device" Cgroup="Startup"/>
3989         <category>Getting Started</category>
3990       </attributes>
3991     </example>
3992
3993     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3994       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3995       <board name="uVision Simulator" vendor="Keil"/>
3996       <project>
3997         <environment name="uv" load="Blinky.uvprojx"/>
3998       </project>
3999       <attributes>
4000         <component Cclass="CMSIS" Cgroup="CORE"/>
4001         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4002         <component Cclass="Device" Cgroup="Startup"/>
4003         <category>Getting Started</category>
4004       </attributes>
4005     </example>
4006
4007     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4008       <description>CMSIS-RTOS2 Message Queue Example</description>
4009       <board name="uVision Simulator" vendor="Keil"/>
4010       <project>
4011         <environment name="uv" load="MsqQueue.uvprojx"/>
4012       </project>
4013       <attributes>
4014         <component Cclass="CMSIS" Cgroup="CORE"/>
4015         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4016         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4017         <component Cclass="Device" Cgroup="Startup"/>
4018         <category>Getting Started</category>
4019       </attributes>
4020     </example>
4021
4022     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4023       <description>CMSIS-RTOS2 Memory Pool Example</description>
4024       <board name="uVision Simulator" vendor="Keil"/>
4025       <project>
4026         <environment name="uv" load="MemPool.uvprojx"/>
4027       </project>
4028       <attributes>
4029         <component Cclass="CMSIS" Cgroup="CORE"/>
4030         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4031         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4032         <component Cclass="Device" Cgroup="Startup"/>
4033         <category>Getting Started</category>
4034       </attributes>
4035     </example>
4036
4037     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4038       <description>Bare-metal secure/non-secure example without RTOS</description>
4039       <board name="uVision Simulator" vendor="Keil"/>
4040       <project>
4041         <environment name="uv" load="NoRTOS.uvmpw"/>
4042       </project>
4043       <attributes>
4044         <component Cclass="CMSIS" Cgroup="CORE"/>
4045         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4046         <component Cclass="Device" Cgroup="Startup"/>
4047         <category>Getting Started</category>
4048       </attributes>
4049     </example>
4050
4051     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4052       <description>Secure/non-secure RTOS example with thread context management</description>
4053       <board name="uVision Simulator" vendor="Keil"/>
4054       <project>
4055         <environment name="uv" load="RTOS.uvmpw"/>
4056       </project>
4057       <attributes>
4058         <component Cclass="CMSIS" Cgroup="CORE"/>
4059         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4060         <component Cclass="Device" Cgroup="Startup"/>
4061         <category>Getting Started</category>
4062       </attributes>
4063     </example>
4064
4065     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4066       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4067       <board name="uVision Simulator" vendor="Keil"/>
4068       <project>
4069         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4070       </project>
4071       <attributes>
4072         <component Cclass="CMSIS" Cgroup="CORE"/>
4073         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4074         <component Cclass="Device" Cgroup="Startup"/>
4075         <category>Getting Started</category>
4076       </attributes>
4077     </example>
4078
4079   </examples>
4080
4081 </package>