begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>CMSIS/CMSIS_END_USER_LICENCE_AGREEMENT.rtf</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.0.0-Beta16">
  12       CMSIS_Core:
  13        - Added Cortex-M23, Cortex-M33 support.
  14        - Added ARMv8MML DSP devices.
  15     </release>
  16     <release version="5.0.0-Beta15">
  17       Reworked conditions.
  18     </release>
  19     <release version="5.0.0-Beta14">
  20       CMSIS-RTOS RTX 4.82 (see revision history for details)
  21     </release>
  22     <release version="5.0.0-Beta13" date="2016-10-21">
  23       Interim Beta Release:
  24       CMSIS-RTOS2 and RTX implementation:
  25        - reworked API based on customer feedback
  26       CMSIS-SVD:
  27        - reworked SVD format documentation
  28     </release>
  29     <release version="5.0.0-Beta12" date="2016-09-29">
  30       Interim Beta Release:
  31       CMSIS-RTOS2 and RTX implementation:
  32        - added context management API for ARMv8-M TrustZone
  33        - added ARMv8-M support (ARMClang, GCC)
  34       CMSIS-Core:
  35        - Updated documentation
  36        - Added new file cmsis_compiler.h.
  37        - Deleted deprecated files core_cmfunc.h, core_cminstr.h, core_cmsimd.h.
  38        - Reworked compiler specific include files.
  39        - Reworked core dependent include files.
  40        - Added __PACKED macro.
  41       CMSIS-DSP:
  42         - updated library projects
  43       CMSIS-SVD:
  44        - removed SVD file database documentation as SVD files are distributed in packs
  45        - updated SVDConv for Win32 and Linux
  46     </release>
  47     <release version="5.0.0-Beta11">
  48       CMSIS_Core:
  49        - Added CMSE support to cmsis_gcc.h.
  50     </release>
  51     <release version="5.0.0-Beta10">
  52       CMSIS-RTOS2:
  53         - Added RTX5 component.
  54     </release>
  55     <release version="5.0.0-Beta9">
  56       CMSIS_Core:
  57        - Replaced macro __SAU_PRESENT with __SAU_REGION_PRESENT.
  58        - Reworked SAU register and functions.
  59     </release>
  60     <release version="5.0.0-Beta8">
  61       CMSIS-RTOS:
  62         - API 2.0
  63         - RTX 5.0.0-Alpha
  64     </release>
  65     <release version="5.0.0-Beta7">
  66       CMSIS_Core:
  67        - Added macro __ALIGNED.
  68        - Updated function SCB_EnableICache.
  69     </release>
  70     <release version="5.0.0-Beta6">
  71       CMSIS_Core:
  72        - Added SCB_CFSR register bit definitions in core_*.h.
  73        - Added NVIC_GetEnableIRQ function in core_*.h.
  74        - Updated core instruction macros in cmsis_gcc.h.
  75     </release>
  76     <release version="5.0.0-Beta5">
  77       CMSIS_DSP:
  78        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  79        - Added DSP libraries build projects to CMSIS pack.
  80     </release>
  81     <release version="5.0.0-Beta4">
  82       Updated ARMv8MML device files.
  83        - changes ARMv8MML_FP to ARMv8MML_SP, ARMv8MML_DP.
  84       Updated CMSIS core files.
  85        - changes according "CMSIS-Core v8M CMSIS 5.0 feedback".
  86     </release>
  87     <release version="5.0.0-Beta3">
  88       Updated CMSIS ARMv8M core / device files
  89        - increased SAU regions to 8.
  90        - moved TZ_SAU_Setup() to partition_#device#.h.
  91     </release>
  92     <release version="5.0.0-Beta2">
  93       - renamed core_*.h to lower case.
  94       - renamed ARM_v8M?L.svd to ARMv8M?L.svd.
  95       - updated ARMv8M?L.svd.
  96     </release>
  97     <release version="5.0.0-Beta1">
  98       - added function SCB_GetFPUType() to all CMSIS cores.
  99       - renamed cmsis_armcc_v6.h to cmsis_armclang.h.
 100       - updated CMSIS core files to V5.0
 101       - updated CMSIS Core change log.
 102       - updated CMSIS DSP_Lib change log.
 103       - updated CMSIS DSP_Lib libraries.
 104     </release>
 105     <release version="5.0.0-Beta" date="2015-12-15">
 106       Added ARMv8M support to CMSIS-Core.
 107       - CMSIS-Core     5.0.0 Beta (see revision history for details)
 108       - CMSIS-RTOS
 109         -- API         1.02    (unchanged)
 110         -- RTX         4.81.0  (see revision history for details)
 111       - CMSIS-SVD      1.3.2   (see revision history for details)
 112     </release>
 113     <release version="4.5.0" date="2015-10-28">
 114       - CMSIS-Core     4.30.0  (see revision history for details)
 115       - CMSIS-DAP      1.1.0   (unchanged)
 116       - CMSIS-Driver   2.04.0  (see revision history for details)
 117       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 118       - CMSIS-PACK     1.4.1   (see revision history for details)
 119       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 120       - CMSIS-SVD      1.3.1   (see revision history for details)
 121     </release>
 122     <release version="4.4.0" date="2015-09-11">
 123       - CMSIS-Core     4.20   (see revision history for details)
 124       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 125       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 126       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 127       - CMSIS-RTOS
 128         -- API         1.02   (unchanged)
 129         -- RTX         4.79   (see revision history for details)
 130       - CMSIS-SVD      1.3.0  (see revision history for details)
 131       - CMSIS-DAP      1.1.0  (extended with SWO support)
 132     </release>
 133     <release version="4.3.0" date="2015-03-20">
 134       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 135       - CMSIS-DSP      1.4.5  (see revision history for details)
 136       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 137       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 138       - CMSIS-RTOS
 139         -- API         1.02   (unchanged)
 140         -- RTX         4.78   (see revision history for details)
 141       - CMSIS-SVD      1.2    (unchanged)
 142     </release>
 143     <release version="4.2.0" date="2014-09-24">
 144       Adding Cortex-M7 support
 145       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 146       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 147       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 148       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 149       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 150     </release>
 151     <release version="4.1.1" date="2014-06-30">
 152       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 153     </release>
 154     <release version="4.1.0" date="2014-06-12">
 155       - CMSIS-Driver   2.02  (incompatible update)
 156       - CMSIS-Pack     1.3   (see revision history for details)
 157       - CMSIS-DSP      1.4.2 (unchanged)
 158       - CMSIS-Core     3.30  (unchanged)
 159       - CMSIS-RTOS RTX 4.74  (unchanged)
 160       - CMSIS-RTOS API 1.02  (unchanged)
 161       - CMSIS-SVD      1.10  (unchanged)
 162       PACK:
 163       - removed G++ specific files from PACK
 164       - added Component Startup variant "C Startup"
 165       - added Pack Checking Utility
 166       - updated conditions to reflect tool-chain dependency
 167       - added Taxonomy for Graphics
 168       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 169     </release>
 170     <release version="4.0.0">
 171       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 172       - CMSIS-Pack     1.1   Preliminary
 173       - CMSIS-DSP      1.4.2 (see revision history for details)
 174       - CMSIS-Core     3.30  (see revision history for details)
 175       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 176       - CMSIS-RTOS API 1.02  (unchanged)
 177       - CMSIS-SVD      1.10  (unchanged)
 178     </release>
 179     <release version="3.20.4">
 180       - CMSIS-RTOS 4.74 (see revision history for details)
 181       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 182     </release>
 183     <release version="3.20.3">
 184       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 185       - CMSIS-RTOS 4.73 (see revision history for details)
 186     </release>
 187     <release version="3.20.2">
 188       - CMSIS-Pack documentation has been added
 189       - CMSIS-Drivers header and documentation have been added to PACK
 190       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 191     </release>
 192     <release version="3.20.1">
 193       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 194       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 195     </release>
 196     <release version="3.20.0">
 197       The software portions that are deployed in the application program are now under a BSD license which allows usage
 198       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 199       The individual components have been update as listed below:
 200       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 201       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 202       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 203       - CMSIS-SVD is unchanged.
 204     </release>
 205   </releases>
 206
 207   <taxonomy>
 208     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 209     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 210     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 211     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 212     <description Cclass="File System">File Drive Support and File System</description>
 213     <description Cclass="Graphics">Graphical User Interface</description>
 214     <description Cclass="Network">Network Stack using Internet Protocols</description>
 215     <description Cclass="USB">Universal Serial Bus Stack</description>
 216     <description Cclass="Compiler">ARM Compiler Software Extensions</description>
 217   </taxonomy>
 218
 219   <devices>
 220     <!-- ******************************  Cortex-M0  ****************************** -->
 221     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 222       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 223       <description>
 224 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 225 - simple, easy-to-use programmers model
 226 - highly efficient ultra-low power operation
 227 - excellent code density
 228 - deterministic, high-performance interrupt handling
 229 - upward compatibility with the rest of the Cortex-M processor family.
 230       </description>
 231       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 232       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 233       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 234       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 235
 236       <device Dname="ARMCM0">
 237         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 238         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 239       </device>
 240     </family>
 241
 242     <!-- ******************************  Cortex-M0P  ****************************** -->
 243     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 244       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 245       <description>
 246 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 247 - simple, easy-to-use programmers model
 248 - highly efficient ultra-low power operation
 249 - excellent code density
 250 - deterministic, high-performance interrupt handling
 251 - upward compatibility with the rest of the Cortex-M processor family.
 252       </description>
 253       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 254       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 255       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 256       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 257
 258       <device Dname="ARMCM0P">
 259         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 260         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 261       </device>
 262     </family>
 263
 264     <!-- ******************************  Cortex-M3  ****************************** -->
 265     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 266       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 267       <description>
 268 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 269 - simple, easy-to-use programmers model
 270 - highly efficient ultra-low power operation
 271 - excellent code density
 272 - deterministic, high-performance interrupt handling
 273 - upward compatibility with the rest of the Cortex-M processor family.
 274       </description>
 275       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 276       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 277       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 278       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 279
 280       <device Dname="ARMCM3">
 281         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 282         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 283       </device>
 284     </family>
 285
 286     <!-- ******************************  Cortex-M4  ****************************** -->
 287     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 288       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 289       <description>
 290 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 291 - simple, easy-to-use programmers model
 292 - highly efficient ultra-low power operation
 293 - excellent code density
 294 - deterministic, high-performance interrupt handling
 295 - upward compatibility with the rest of the Cortex-M processor family.
 296       </description>
 297       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 298       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 299       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 300       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 301
 302       <device Dname="ARMCM4">
 303         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 304         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 305       </device>
 306
 307       <device Dname="ARMCM4_FP">
 308         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 309         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 310       </device>
 311     </family>
 312
 313     <!-- ******************************  Cortex-M7  ****************************** -->
 314     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 315       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 316       <description>
 317 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 318 - simple, easy-to-use programmers model
 319 - highly efficient ultra-low power operation
 320 - excellent code density
 321 - deterministic, high-performance interrupt handling
 322 - upward compatibility with the rest of the Cortex-M processor family.
 323       </description>
 324       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 325       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 326       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 327       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 328
 329       <device Dname="ARMCM7">
 330         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 331         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 332       </device>
 333
 334       <device Dname="ARMCM7_SP">
 335         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 336         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 337       </device>
 338
 339       <device Dname="ARMCM7_DP">
 340         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 341         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 342       </device>
 343     </family>
 344
 345     <!-- ******************************  Cortex-M23  ********************** -->
 346     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 347       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 348       <description>
 349 The Cortex-M23 processor is brand new.
 350       </description>
 351       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 352       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 353       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 354       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 355
 356       <device Dname="ARMCM23">
 357         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 358         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 359       </device>
 360
 361       <device Dname="ARMCM23_TZ">
 362         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 363         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 364       </device>
 365     </family>
 366
 367     <!-- ******************************  Cortex-M33  ****************************** -->
 368     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 369       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 370       <description>
 371 The Cortex-M33 processor is brand new.
 372       </description>
 373       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 374       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 375       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 376       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 377
 378       <device Dname="ARMCM33">
 379         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 380         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 381       </device>
 382
 383       <device Dname="ARMCM33_TZ">
 384         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 385         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 386       </device>
 387
 388       <device Dname="ARMCM33_DSP_FP">
 389         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 390         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 391       </device>
 392
 393       <device Dname="ARMCM33_DSP_FP_TZ">
 394         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 395         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 396       </device>
 397     </family>
 398
 399     <!-- ******************************  ARMSC000  ****************************** -->
 400     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 401       <description>
 402 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 403 - simple, easy-to-use programmers model
 404 - highly efficient ultra-low power operation
 405 - excellent code density
 406 - deterministic, high-performance interrupt handling
 407       </description>
 408       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 409       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 410       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 411       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 412
 413       <device Dname="ARMSC000">
 414         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 415         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 416       </device>
 417     </family>
 418
 419     <!-- ******************************  ARMSC300  ****************************** -->
 420     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 421       <description>
 422 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 423 - simple, easy-to-use programmers model
 424 - highly efficient ultra-low power operation
 425 - excellent code density
 426 - deterministic, high-performance interrupt handling
 427       </description>
 428       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 429       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 430       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 431       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 432
 433       <device Dname="ARMSC300">
 434         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 435         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 436       </device>
 437     </family>
 438
 439     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 440     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 441       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 442       <description>
 443 The ARMv8MBL processor is brand new.
 444       </description>
 445       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 446       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 447       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 448       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 449
 450       <device Dname="ARMv8MBL">
 451         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 452         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 453       </device>
 454     </family>
 455
 456     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 457     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 458       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 459       <description>
 460 The ARMv8MML processor is brand new.
 461       </description>
 462       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 463       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 464       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 465       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 466
 467       <device Dname="ARMv8MML">
 468         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 469         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 470       </device>
 471
 472       <device Dname="ARMv8MML_DSP">
 473         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 474         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML_DSP"/>
 475       </device>
 476
 477       <device Dname="ARMv8MML_SP">
 478         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 479         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 480       </device>
 481
 482       <device Dname="ARMv8MML_DSP_SP">
 483         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 484         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_DSP_SP"/>
 485       </device>
 486
 487       <device Dname="ARMv8MML_DP">
 488         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 489         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 490       </device>
 491
 492       <device Dname="ARMv8MML_DSP_DP">
 493         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 494         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DSP_DP"/>
 495       </device>
 496     </family>
 497
 498   </devices>
 499
 500
 501   <apis>
 502     <!-- CMSIS-RTOS API -->
 503     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
 504       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 505       <files>
 506         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 507       </files>
 508     </api>
 509     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.0" exclusive="1">
 510       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 511       <files>
 512         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 513       </files>
 514     </api>
 515     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
 516       <description>USART Driver API for Cortex-M</description>
 517       <files>
 518         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 519         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 520       </files>
 521     </api>
 522     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
 523       <description>SPI Driver API for Cortex-M</description>
 524       <files>
 525         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 526         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 527       </files>
 528     </api>
 529     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
 530       <description>SAI Driver API for Cortex-M</description>
 531       <files>
 532         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 533         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 534       </files>
 535     </api>
 536     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
 537       <description>I2C Driver API for Cortex-M</description>
 538       <files>
 539         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 540         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 541       </files>
 542     </api>
 543     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
 544       <description>CAN Driver API for Cortex-M</description>
 545       <files>
 546         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 547         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 548       </files>
 549     </api>
 550     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
 551       <description>Flash Driver API for Cortex-M</description>
 552       <files>
 553         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 554         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 555       </files>
 556     </api>
 557     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
 558       <description>MCI Driver API for Cortex-M</description>
 559       <files>
 560         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 561         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 562       </files>
 563     </api>
 564     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
 565       <description>NAND Flash Driver API for Cortex-M</description>
 566       <files>
 567         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 568         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 569       </files>
 570     </api>
 571     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
 572       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 573       <files>
 574         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 575         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 576         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 577       </files>
 578     </api>
 579     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
 580       <description>Ethernet MAC Driver API for Cortex-M</description>
 581       <files>
 582         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 583         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 584       </files>
 585     </api>
 586     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
 587       <description>Ethernet PHY Driver API for Cortex-M</description>
 588       <files>
 589         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 590         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 591       </files>
 592     </api>
 593     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
 594       <description>USB Device Driver API for Cortex-M</description>
 595       <files>
 596         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 597         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 598       </files>
 599     </api>
 600     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
 601       <description>USB Host Driver API for Cortex-M</description>
 602       <files>
 603         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 604         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 605       </files>
 606     </api>
 607   </apis>
 608
 609   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 610   <conditions>
 611     <!-- compiler -->
 612     <condition id="ARMCC">
 613       <require Tcompiler="ARMCC"/>
 614     </condition>
 615     <condition id="GCC">
 616       <require Tcompiler="GCC"/>
 617     </condition>
 618     <condition id="IAR">
 619       <require Tcompiler="IAR"/>
 620     </condition>
 621     <condition id="ARMCC GCC">
 622       <accept Tcompiler="ARMCC"/>
 623       <accept Tcompiler="GCC"/>
 624     </condition>
 625     <condition id="ARMCC GCC IAR">
 626       <accept Tcompiler="ARMCC"/>
 627       <accept Tcompiler="GCC"/>
 628       <accept Tcompiler="IAR"/>
 629     </condition>
 630
 631     <!-- ARM architecture -->
 632     <condition id="ARMv6-M Device">
 633       <description>ARMv6-M architecture based device</description>
 634       <accept Dcore="Cortex-M0"/>
 635       <accept Dcore="Cortex-M0+"/>
 636       <accept Dcore="SC000"/>
 637     </condition>
 638     <condition id="ARMv7-M Device">
 639       <description>ARMv7-M architecture based device</description>
 640       <accept Dcore="Cortex-M3"/>
 641       <accept Dcore="Cortex-M4"/>
 642       <accept Dcore="Cortex-M7"/>
 643       <accept Dcore="SC300"/>
 644     </condition>
 645     <condition id="ARMv8-M Device">
 646       <description>ARMv8-M architecture based device</description>
 647       <accept Dcore="ARMV8MBL"/>
 648       <accept Dcore="ARMV8MML"/>
 649       <accept Dcore="Cortex-M23"/>
 650       <accept Dcore="Cortex-M33"/>
 651     </condition>
 652     <condition id="ARMv8-M TZ Device">
 653       <description>ARMv8-M architecture based device with TrustZone</description>
 654       <require condition="ARMv8-M Device"/>
 655       <require Dtz="TZ"/>
 656     </condition>
 657     <condition id="ARMv6_7-M Device">
 658       <description>ARMv6_7-M architecture based device</description>
 659       <accept condition="ARMv6-M Device"/>
 660       <accept condition="ARMv7-M Device"/>
 661     </condition>
 662     <condition id="ARMv6_7_8-M Device">
 663       <description>ARMv6_7_8-M architecture based device</description>
 664       <accept condition="ARMv6-M Device"/>
 665       <accept condition="ARMv7-M Device"/>
 666       <accept condition="ARMv8-M Device"/>
 667     </condition>
 668
 669     <!-- ARM core -->
 670     <condition id="CM0">
 671       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 672       <accept Dcore="Cortex-M0"/>
 673       <accept Dcore="Cortex-M0+"/>
 674       <accept Dcore="SC000"/>
 675     </condition>
 676     <condition id="CM3">
 677       <description>Cortex-M3 or SC300 processor based device</description>
 678       <accept Dcore="Cortex-M3"/>
 679       <accept Dcore="SC300"/>
 680     </condition>
 681     <condition id="CM4">
 682       <description>Cortex-M4 processor based device</description>
 683       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 684     </condition>
 685     <condition id="CM4_FP">
 686       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 687       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 688     </condition>
 689     <condition id="CM7">
 690       <description>Cortex-M7 processor based device</description>
 691       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 692     </condition>
 693     <condition id="CM7_FP">
 694       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 695       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 696       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 697     </condition>
 698     <condition id="CM7_SP">
 699       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 700       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 701     </condition>
 702     <condition id="CM7_DP">
 703       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 704       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 705     </condition>
 706     <condition id="CM23">
 707       <description>Cortex-M23 processor based device</description>
 708       <require Dcore="Cortex-M23"/>
 709     </condition>
 710     <condition id="CM33">
 711       <description>Cortex-M33 processor based device</description>
 712       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 713     </condition>
 714     <condition id="CM33_DSP">
 715       <description>Cortex-M33 processor based device with DSP extension</description>
 716       <require Dcore="Cortex-M33" Dfpu="NO_FPU" Ddsp="DSP"/>
 717     </condition>
 718     <condition id="CM33_FP">
 719       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 720       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 721     </condition>
 722     <condition id="CM33_SP">
 723       <description>Cortex-M33 processor based device using Floating Point Unit (SP)</description>
 724       <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="NO_DSP"/>
 725     </condition>
 726     <condition id="CM33_DSP_SP">
 727       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP)</description>
 728       <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="DSP"/>
 729     </condition>
 730     <condition id="ARMv8MBL">
 731       <description>ARMv8-M Baseline processor based device</description>
 732       <require Dcore="ARMV8MBL"/>
 733     </condition>
 734     <condition id="ARMv8MML">
 735       <description>ARMv8-M Mainline processor based device</description>
 736       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 737     </condition>
 738     <condition id="ARMv8MML_DSP">
 739       <description>ARMv8-M Mainline processor based device with DSP extension</description>
 740       <require Dcore="ARMV8MML" Dfpu="NO_FPU" Ddsp="DSP"/>
 741     </condition>
 742     <condition id="ARMv8MML_FP">
 743       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 744       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 745       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 746     </condition>
 747     <condition id="ARMv8MML_SP">
 748       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP)</description>
 749       <require Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 750     </condition>
 751     <condition id="ARMv8MML_DSP_SP">
 752       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP)</description>
 753       <require Dcore="ARMV8MML" Dfpu="SP_FPU" Ddsp="DSP"/>
 754     </condition>
 755     <condition id="ARMv8MML_DP">
 756       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP)</description>
 757       <require Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 758     </condition>
 759     <condition id="ARMv8MML_DSP_DP">
 760       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP)</description>
 761       <require Dcore="ARMV8MML" Dfpu="DP_FPU" Ddsp="DSP"/>
 762     </condition>
 763
 764     <!-- ARMCC compiler -->
 765     <condition id="CM0_ARMCC">
 766       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 767       <require condition="CM0"/>
 768       <require Tcompiler="ARMCC"/>
 769     </condition>
 770     <condition id="CM0_LE_ARMCC">
 771       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 772       <require condition="CM0_ARMCC"/>
 773       <require Dendian="Little-endian"/>
 774     </condition>
 775     <condition id="CM0_BE_ARMCC">
 776       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 777       <require condition="CM0_ARMCC"/>
 778       <require Dendian="Big-endian"/>
 779     </condition>
 780
 781     <condition id="CM3_ARMCC">
 782       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 783       <require condition="CM3"/>
 784       <require Tcompiler="ARMCC"/>
 785     </condition>
 786     <condition id="CM3_LE_ARMCC">
 787       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 788       <require condition="CM3_ARMCC"/>
 789       <require Dendian="Little-endian"/>
 790     </condition>
 791     <condition id="CM3_BE_ARMCC">
 792       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 793       <require condition="CM3_ARMCC"/>
 794       <require Dendian="Big-endian"/>
 795     </condition>
 796
 797     <condition id="CM4_ARMCC">
 798       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 799       <require condition="CM4"/>
 800       <require Tcompiler="ARMCC"/>
 801     </condition>
 802     <condition id="CM4_LE_ARMCC">
 803       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 804       <require condition="CM4_ARMCC"/>
 805       <require Dendian="Little-endian"/>
 806     </condition>
 807     <condition id="CM4_BE_ARMCC">
 808       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 809       <require condition="CM4_ARMCC"/>
 810       <require Dendian="Big-endian"/>
 811     </condition>
 812
 813     <condition id="CM4_FP_ARMCC">
 814       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 815       <require condition="CM4_FP"/>
 816       <require Tcompiler="ARMCC"/>
 817     </condition>
 818     <condition id="CM4_FP_LE_ARMCC">
 819       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 820       <require condition="CM4_FP_ARMCC"/>
 821       <require Dendian="Little-endian"/>
 822     </condition>
 823     <condition id="CM4_FP_BE_ARMCC">
 824       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 825       <require condition="CM4_FP_ARMCC"/>
 826       <require Dendian="Big-endian"/>
 827     </condition>
 828
 829     <!-- XMC 4000 Series devices from Infineon require a special library -->
 830     <condition id="CM4_LE_ARMCC_STD">
 831       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
 832       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
 833       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 834       <require Tcompiler="ARMCC"/>
 835     </condition>
 836     <condition id="CM4_LE_ARMCC_IFX">
 837       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
 838       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 839       <require Tcompiler="ARMCC"/>
 840     </condition>
 841     <condition id="CM4_FP_LE_ARMCC_STD">
 842       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
 843       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
 844       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 845       <require Tcompiler="ARMCC"/>
 846     </condition>
 847     <condition id="CM4_FP_LE_ARMCC_IFX">
 848       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
 849       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 850       <require Tcompiler="ARMCC"/>
 851     </condition>
 852
 853     <condition id="CM7_ARMCC">
 854       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 855       <require condition="CM7"/>
 856       <require Tcompiler="ARMCC"/>
 857     </condition>
 858     <condition id="CM7_LE_ARMCC">
 859       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 860       <require condition="CM7_ARMCC"/>
 861       <require Dendian="Little-endian"/>
 862     </condition>
 863     <condition id="CM7_BE_ARMCC">
 864       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 865       <require condition="CM7_ARMCC"/>
 866       <require Dendian="Big-endian"/>
 867     </condition>
 868
 869     <condition id="CM7_FP_ARMCC">
 870       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 871       <require condition="CM7_FP"/>
 872       <require Tcompiler="ARMCC"/>
 873     </condition>
 874     <condition id="CM7_FP_LE_ARMCC">
 875       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 876       <require condition="CM7_FP_ARMCC"/>
 877       <require Dendian="Little-endian"/>
 878     </condition>
 879     <condition id="CM7_FP_BE_ARMCC">
 880       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 881       <require condition="CM7_FP_ARMCC"/>
 882       <require Dendian="Big-endian"/>
 883     </condition>
 884
 885     <condition id="CM7_SP_ARMCC">
 886       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 887       <require condition="CM7_SP"/>
 888       <require Tcompiler="ARMCC"/>
 889     </condition>
 890     <condition id="CM7_SP_LE_ARMCC">
 891       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 892       <require condition="CM7_SP_ARMCC"/>
 893       <require Dendian="Little-endian"/>
 894     </condition>
 895     <condition id="CM7_SP_BE_ARMCC">
 896       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 897       <require condition="CM7_SP_ARMCC"/>
 898       <require Dendian="Big-endian"/>
 899     </condition>
 900
 901     <condition id="CM7_DP_ARMCC">
 902       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
 903       <require condition="CM7_DP"/>
 904       <require Tcompiler="ARMCC"/>
 905     </condition>
 906     <condition id="CM7_DP_LE_ARMCC">
 907       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
 908       <require condition="CM7_DP_ARMCC"/>
 909       <require Dendian="Little-endian"/>
 910     </condition>
 911     <condition id="CM7_DP_BE_ARMCC">
 912       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
 913       <require condition="CM7_DP_ARMCC"/>
 914       <require Dendian="Big-endian"/>
 915     </condition>
 916
 917     <condition id="CM23_ARMCC">
 918       <description>Cortex-M23 processor based device for the ARM Compiler</description>
 919       <require condition="CM23"/>
 920       <require Tcompiler="ARMCC"/>
 921     </condition>
 922     <condition id="CM23_LE_ARMCC">
 923       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
 924       <require condition="CM23_ARMCC"/>
 925       <require Dendian="Little-endian"/>
 926     </condition>
 927     <condition id="CM23_BE_ARMCC">
 928       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
 929       <require condition="CM23_ARMCC"/>
 930       <require Dendian="Big-endian"/>
 931     </condition>
 932
 933     <condition id="CM33_ARMCC">
 934       <description>Cortex-M33 processor based device for the ARM Compiler</description>
 935       <require condition="CM33"/>
 936       <require Tcompiler="ARMCC"/>
 937     </condition>
 938     <condition id="CM33_LE_ARMCC">
 939       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
 940       <require condition="CM33_ARMCC"/>
 941       <require Dendian="Little-endian"/>
 942     </condition>
 943     <condition id="CM33_BE_ARMCC">
 944       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
 945       <require condition="CM33_ARMCC"/>
 946       <require Dendian="Big-endian"/>
 947     </condition>
 948
 949     <condition id="CM33_DSP_ARMCC">
 950       <description>Cortex-M33 processor based device with DSP extension for the ARM Compiler</description>
 951       <require condition="CM33_DSP"/>
 952       <require Tcompiler="ARMCC"/>
 953     </condition>
 954     <condition id="CM33_DSP_LE_ARMCC">
 955       <description>Cortex-M33 processor based device with DSP extension in little endian mode for the ARM Compiler</description>
 956       <require condition="CM33_DSP_ARMCC"/>
 957       <require Dendian="Little-endian"/>
 958     </condition>
 959     <condition id="CM33_DSP_BE_ARMCC">
 960       <description>Cortex-M33 processor based device with DSP extension in big endian mode for the ARM Compiler</description>
 961       <require condition="CM33_DSP_ARMCC"/>
 962       <require Dendian="Big-endian"/>
 963     </condition>
 964
 965     <condition id="CM33_FP_ARMCC">
 966       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
 967       <require condition="CM33_FP"/>
 968       <require Tcompiler="ARMCC"/>
 969     </condition>
 970     <condition id="CM33_FP_LE_ARMCC">
 971       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 972       <require condition="CM33_FP_ARMCC"/>
 973       <require Dendian="Little-endian"/>
 974     </condition>
 975     <condition id="CM33_FP_BE_ARMCC">
 976       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 977       <require condition="CM33_FP_ARMCC"/>
 978       <require Dendian="Big-endian"/>
 979     </condition>
 980
 981     <condition id="CM33_SP_ARMCC">
 982       <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 983       <require condition="CM33_SP"/>
 984       <require Tcompiler="ARMCC"/>
 985     </condition>
 986     <condition id="CM33_SP_LE_ARMCC">
 987       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 988       <require condition="CM33_SP_ARMCC"/>
 989       <require Dendian="Little-endian"/>
 990     </condition>
 991     <condition id="CM33_SP_BE_ARMCC">
 992       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 993       <require condition="CM33_SP_ARMCC"/>
 994       <require Dendian="Big-endian"/>
 995     </condition>
 996
 997     <condition id="CM33_DSP_SP_ARMCC">
 998       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
 999       <require condition="CM33_DSP_SP"/>
1000       <require Tcompiler="ARMCC"/>
1001     </condition>
1002     <condition id="CM33_DSP_SP_LE_ARMCC">
1003       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1004       <require condition="CM33_DSP_SP_ARMCC"/>
1005       <require Dendian="Little-endian"/>
1006     </condition>
1007     <condition id="CM33_DSP_SP_BE_ARMCC">
1008       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1009       <require condition="CM33_DSP_SP_ARMCC"/>
1010       <require Dendian="Big-endian"/>
1011     </condition>
1012
1013     <condition id="ARMv8MBL_ARMCC">
1014       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1015       <require condition="ARMv8MBL"/>
1016       <require Tcompiler="ARMCC"/>
1017     </condition>
1018     <condition id="ARMv8MBL_LE_ARMCC">
1019       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1020       <require condition="ARMv8MBL_ARMCC"/>
1021       <require Dendian="Little-endian"/>
1022     </condition>
1023     <condition id="ARMv8MBL_BE_ARMCC">
1024       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1025       <require condition="ARMv8MBL_ARMCC"/>
1026       <require Dendian="Big-endian"/>
1027     </condition>
1028
1029     <condition id="ARMv8MML_ARMCC">
1030       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1031       <require condition="ARMv8MML"/>
1032       <require Tcompiler="ARMCC"/>
1033     </condition>
1034     <condition id="ARMv8MML_LE_ARMCC">
1035       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1036       <require condition="ARMv8MML_ARMCC"/>
1037       <require Dendian="Little-endian"/>
1038     </condition>
1039     <condition id="ARMv8MML_BE_ARMCC">
1040       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1041       <require condition="ARMv8MML_ARMCC"/>
1042       <require Dendian="Big-endian"/>
1043     </condition>
1044
1045     <condition id="ARMv8MML_DSP_ARMCC">
1046       <description>ARMv8-M Mainline processor based device with DSP extension for the ARM Compiler</description>
1047       <require condition="ARMv8MML_DSP"/>
1048       <require Tcompiler="ARMCC"/>
1049     </condition>
1050     <condition id="ARMv8MML_DSP_LE_ARMCC">
1051       <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the ARM Compiler</description>
1052       <require condition="ARMv8MML_DSP_ARMCC"/>
1053       <require Dendian="Little-endian"/>
1054     </condition>
1055     <condition id="ARMv8MML_DSP_BE_ARMCC">
1056       <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the ARM Compiler</description>
1057       <require condition="ARMv8MML_DSP_ARMCC"/>
1058       <require Dendian="Big-endian"/>
1059     </condition>
1060
1061     <condition id="ARMv8MML_FP_ARMCC">
1062       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1063       <require condition="ARMv8MML_FP"/>
1064       <require Tcompiler="ARMCC"/>
1065     </condition>
1066     <condition id="ARMv8MML_FP_LE_ARMCC">
1067       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1068       <require condition="ARMv8MML_FP_ARMCC"/>
1069       <require Dendian="Little-endian"/>
1070     </condition>
1071     <condition id="ARMv8MML_FP_BE_ARMCC">
1072       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1073       <require condition="ARMv8MML_FP_ARMCC"/>
1074       <require Dendian="Big-endian"/>
1075     </condition>
1076
1077     <condition id="ARMv8MML_SP_ARMCC">
1078       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1079       <require condition="ARMv8MML_SP"/>
1080       <require Tcompiler="ARMCC"/>
1081     </condition>
1082     <condition id="ARMv8MML_SP_LE_ARMCC">
1083       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1084       <require condition="ARMv8MML_SP_ARMCC"/>
1085       <require Dendian="Little-endian"/>
1086     </condition>
1087     <condition id="ARMv8MML_SP_BE_ARMCC">
1088       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1089       <require condition="ARMv8MML_SP_ARMCC"/>
1090       <require Dendian="Big-endian"/>
1091     </condition>
1092
1093     <condition id="ARMv8MML_DSP_SP_ARMCC">
1094       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
1095       <require condition="ARMv8MML_DSP_SP"/>
1096       <require Tcompiler="ARMCC"/>
1097     </condition>
1098     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1099       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1100       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1101       <require Dendian="Little-endian"/>
1102     </condition>
1103     <condition id="ARMv8MML_DSP_SP_BE_ARMCC">
1104       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1105       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1106       <require Dendian="Big-endian"/>
1107     </condition>
1108
1109     <condition id="ARMv8MML_DP_ARMCC">
1110       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1111       <require condition="ARMv8MML_DP"/>
1112       <require Tcompiler="ARMCC"/>
1113     </condition>
1114     <condition id="ARMv8MML_DP_LE_ARMCC">
1115       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1116       <require condition="ARMv8MML_DP_ARMCC"/>
1117       <require Dendian="Little-endian"/>
1118     </condition>
1119     <condition id="ARMv8MML_DP_BE_ARMCC">
1120       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1121       <require condition="ARMv8MML_DP_ARMCC"/>
1122       <require Dendian="Big-endian"/>
1123     </condition>
1124
1125     <condition id="ARMv8MML_DSP_DP_ARMCC">
1126       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the ARM Compiler</description>
1127       <require condition="ARMv8MML_DSP_DP"/>
1128       <require Tcompiler="ARMCC"/>
1129     </condition>
1130     <condition id="ARMv8MML_DSP_DP_LE_ARMCC">
1131       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1132       <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1133       <require Dendian="Little-endian"/>
1134     </condition>
1135     <condition id="ARMv8MML_DSP_DP_BE_ARMCC">
1136       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1137       <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1138       <require Dendian="Big-endian"/>
1139     </condition>
1140
1141     <!-- GCC compiler -->
1142     <condition id="CM0_GCC">
1143       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1144       <require condition="CM0"/>
1145       <require Tcompiler="GCC"/>
1146     </condition>
1147     <condition id="CM0_LE_GCC">
1148       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1149       <require condition="CM0_GCC"/>
1150       <require Dendian="Little-endian"/>
1151     </condition>
1152     <condition id="CM0_BE_GCC">
1153       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1154       <require condition="CM0_GCC"/>
1155       <require Dendian="Big-endian"/>
1156     </condition>
1157
1158     <condition id="CM3_GCC">
1159       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1160       <require condition="CM3"/>
1161       <require Tcompiler="GCC"/>
1162     </condition>
1163     <condition id="CM3_LE_GCC">
1164       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1165       <require condition="CM3_GCC"/>
1166       <require Dendian="Little-endian"/>
1167     </condition>
1168     <condition id="CM3_BE_GCC">
1169       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1170       <require condition="CM3_GCC"/>
1171       <require Dendian="Big-endian"/>
1172     </condition>
1173
1174     <condition id="CM4_GCC">
1175       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1176       <require condition="CM4"/>
1177       <require Tcompiler="GCC"/>
1178     </condition>
1179     <condition id="CM4_LE_GCC">
1180       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1181       <require condition="CM4_GCC"/>
1182       <require Dendian="Little-endian"/>
1183     </condition>
1184     <condition id="CM4_BE_GCC">
1185       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1186       <require condition="CM4_GCC"/>
1187       <require Dendian="Big-endian"/>
1188     </condition>
1189
1190     <condition id="CM4_FP_GCC">
1191       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1192       <require condition="CM4_FP"/>
1193       <require Tcompiler="GCC"/>
1194     </condition>
1195     <condition id="CM4_FP_LE_GCC">
1196       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1197       <require condition="CM4_FP_GCC"/>
1198       <require Dendian="Little-endian"/>
1199     </condition>
1200     <condition id="CM4_FP_BE_GCC">
1201       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1202       <require condition="CM4_FP_GCC"/>
1203       <require Dendian="Big-endian"/>
1204     </condition>
1205
1206     <!-- XMC 4000 Series devices from Infineon require a special library -->
1207     <condition id="CM4_LE_GCC_STD">
1208       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1209       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1210       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1211       <require Tcompiler="GCC"/>
1212     </condition>
1213     <condition id="CM4_LE_GCC_IFX">
1214       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1215       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1216       <require Tcompiler="GCC"/>
1217     </condition>
1218     <condition id="CM4_FP_LE_GCC_STD">
1219       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1220       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1221       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1222       <require Tcompiler="GCC"/>
1223     </condition>
1224     <condition id="CM4_FP_LE_GCC_IFX">
1225       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1226       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1227       <require Tcompiler="GCC"/>
1228     </condition>
1229
1230     <condition id="CM7_GCC">
1231       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1232       <require condition="CM7"/>
1233       <require Tcompiler="GCC"/>
1234     </condition>
1235     <condition id="CM7_LE_GCC">
1236       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1237       <require condition="CM7_GCC"/>
1238       <require Dendian="Little-endian"/>
1239     </condition>
1240     <condition id="CM7_BE_GCC">
1241       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1242       <require condition="CM7_GCC"/>
1243       <require Dendian="Big-endian"/>
1244     </condition>
1245
1246     <condition id="CM7_FP_GCC">
1247       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1248       <require condition="CM7_FP"/>
1249       <require Tcompiler="GCC"/>
1250     </condition>
1251     <condition id="CM7_FP_LE_GCC">
1252       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1253       <require condition="CM7_FP_GCC"/>
1254       <require Dendian="Little-endian"/>
1255     </condition>
1256     <condition id="CM7_FP_BE_GCC">
1257       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1258       <require condition="CM7_FP_GCC"/>
1259       <require Dendian="Big-endian"/>
1260     </condition>
1261
1262     <condition id="CM7_SP_GCC">
1263       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1264       <require condition="CM7_SP"/>
1265       <require Tcompiler="GCC"/>
1266     </condition>
1267     <condition id="CM7_SP_LE_GCC">
1268       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1269       <require condition="CM7_SP_GCC"/>
1270       <require Dendian="Little-endian"/>
1271     </condition>
1272     <condition id="CM7_SP_BE_GCC">
1273       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1274       <require condition="CM7_SP_GCC"/>
1275       <require Dendian="Big-endian"/>
1276     </condition>
1277
1278     <condition id="CM7_DP_GCC">
1279       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1280       <require condition="CM7_DP"/>
1281       <require Tcompiler="GCC"/>
1282     </condition>
1283     <condition id="CM7_DP_LE_GCC">
1284       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1285       <require condition="CM7_DP_GCC"/>
1286       <require Dendian="Little-endian"/>
1287     </condition>
1288     <condition id="CM7_DP_BE_GCC">
1289       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1290       <require condition="CM7_DP_GCC"/>
1291       <require Dendian="Big-endian"/>
1292     </condition>
1293
1294     <condition id="CM23_GCC">
1295       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1296       <require condition="CM23"/>
1297       <require Tcompiler="GCC"/>
1298     </condition>
1299     <condition id="CM23_LE_GCC">
1300       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1301       <require condition="CM23_GCC"/>
1302       <require Dendian="Little-endian"/>
1303     </condition>
1304     <condition id="CM23_BE_GCC">
1305       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1306       <require condition="CM23_GCC"/>
1307       <require Dendian="Big-endian"/>
1308     </condition>
1309
1310     <condition id="CM33_GCC">
1311       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1312       <require condition="CM33"/>
1313       <require Tcompiler="GCC"/>
1314     </condition>
1315     <condition id="CM33_LE_GCC">
1316       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1317       <require condition="CM33_GCC"/>
1318       <require Dendian="Little-endian"/>
1319     </condition>
1320     <condition id="CM33_BE_GCC">
1321       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1322       <require condition="CM33_GCC"/>
1323       <require Dendian="Big-endian"/>
1324     </condition>
1325
1326     <condition id="CM33_DSP_GCC">
1327       <description>Cortex-M33 processor based device with DSP extension for the GCC Compiler</description>
1328       <require condition="CM33_DSP"/>
1329       <require Tcompiler="GCC"/>
1330     </condition>
1331     <condition id="CM33_DSP_LE_GCC">
1332       <description>Cortex-M33 processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1333       <require condition="CM33_DSP_GCC"/>
1334       <require Dendian="Little-endian"/>
1335     </condition>
1336     <condition id="CM33_DSP_BE_GCC">
1337       <description>Cortex-M33 processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1338       <require condition="CM33_DSP_GCC"/>
1339       <require Dendian="Big-endian"/>
1340     </condition>
1341
1342     <condition id="CM33_FP_GCC">
1343       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1344       <require condition="CM33_FP"/>
1345       <require Tcompiler="GCC"/>
1346     </condition>
1347     <condition id="CM33_FP_LE_GCC">
1348       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1349       <require condition="CM33_FP_GCC"/>
1350       <require Dendian="Little-endian"/>
1351     </condition>
1352     <condition id="CM33_FP_BE_GCC">
1353       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1354       <require condition="CM33_FP_GCC"/>
1355       <require Dendian="Big-endian"/>
1356     </condition>
1357
1358     <condition id="CM33_SP_GCC">
1359       <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1360       <require condition="CM33_SP"/>
1361       <require Tcompiler="GCC"/>
1362     </condition>
1363     <condition id="CM33_SP_LE_GCC">
1364       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1365       <require condition="CM33_SP_GCC"/>
1366       <require Dendian="Little-endian"/>
1367     </condition>
1368     <condition id="CM33_SP_BE_GCC">
1369       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1370       <require condition="CM33_SP_GCC"/>
1371       <require Dendian="Big-endian"/>
1372     </condition>
1373
1374     <condition id="CM33_DSP_SP_GCC">
1375       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1376       <require condition="CM33_DSP_SP"/>
1377       <require Tcompiler="GCC"/>
1378     </condition>
1379     <condition id="CM33_DSP_SP_LE_GCC">
1380       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1381       <require condition="CM33_DSP_SP_GCC"/>
1382       <require Dendian="Little-endian"/>
1383     </condition>
1384     <condition id="CM33_DSP_SP_BE_GCC">
1385       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1386       <require condition="CM33_DSP_SP_GCC"/>
1387       <require Dendian="Big-endian"/>
1388     </condition>
1389
1390     <condition id="ARMv8MBL_GCC">
1391       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1392       <require condition="ARMv8MBL"/>
1393       <require Tcompiler="GCC"/>
1394     </condition>
1395     <condition id="ARMv8MBL_LE_GCC">
1396       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1397       <require condition="ARMv8MBL_GCC"/>
1398       <require Dendian="Little-endian"/>
1399     </condition>
1400     <condition id="ARMv8MBL_BE_GCC">
1401       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1402       <require condition="ARMv8MBL_GCC"/>
1403       <require Dendian="Big-endian"/>
1404     </condition>
1405
1406     <condition id="ARMv8MML_GCC">
1407       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1408       <require condition="ARMv8MML"/>
1409       <require Tcompiler="GCC"/>
1410     </condition>
1411     <condition id="ARMv8MML_LE_GCC">
1412       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1413       <require condition="ARMv8MML_GCC"/>
1414       <require Dendian="Little-endian"/>
1415     </condition>
1416     <condition id="ARMv8MML_BE_GCC">
1417       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1418       <require condition="ARMv8MML_GCC"/>
1419       <require Dendian="Big-endian"/>
1420     </condition>
1421
1422     <condition id="ARMv8MML_DSP_GCC">
1423       <description>ARMv8-M Mainline processor based device with DSP extension for the GCC Compiler</description>
1424       <require condition="ARMv8MML_DSP"/>
1425       <require Tcompiler="GCC"/>
1426     </condition>
1427     <condition id="ARMv8MML_DSP_LE_GCC">
1428       <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1429       <require condition="ARMv8MML_DSP_GCC"/>
1430       <require Dendian="Little-endian"/>
1431     </condition>
1432     <condition id="ARMv8MML_DSP_BE_GCC">
1433       <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1434       <require condition="ARMv8MML_DSP_GCC"/>
1435       <require Dendian="Big-endian"/>
1436     </condition>
1437
1438     <condition id="ARMv8MML_FP_GCC">
1439       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1440       <require condition="ARMv8MML_FP"/>
1441       <require Tcompiler="GCC"/>
1442     </condition>
1443     <condition id="ARMv8MML_FP_LE_GCC">
1444       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1445       <require condition="ARMv8MML_FP_GCC"/>
1446       <require Dendian="Little-endian"/>
1447     </condition>
1448     <condition id="ARMv8MML_FP_BE_GCC">
1449       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1450       <require condition="ARMv8MML_FP_GCC"/>
1451       <require Dendian="Big-endian"/>
1452     </condition>
1453
1454     <condition id="ARMv8MML_SP_GCC">
1455       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1456       <require condition="ARMv8MML_SP"/>
1457       <require Tcompiler="GCC"/>
1458     </condition>
1459     <condition id="ARMv8MML_SP_LE_GCC">
1460       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1461       <require condition="ARMv8MML_SP_GCC"/>
1462       <require Dendian="Little-endian"/>
1463     </condition>
1464     <condition id="ARMv8MML_SP_BE_GCC">
1465       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1466       <require condition="ARMv8MML_SP_GCC"/>
1467       <require Dendian="Big-endian"/>
1468     </condition>
1469
1470     <condition id="ARMv8MML_DSP_SP_GCC">
1471       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1472       <require condition="ARMv8MML_DSP_SP"/>
1473       <require Tcompiler="GCC"/>
1474     </condition>
1475     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1476       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1477       <require condition="ARMv8MML_DSP_SP_GCC"/>
1478       <require Dendian="Little-endian"/>
1479     </condition>
1480     <condition id="ARMv8MML_DSP_SP_BE_GCC">
1481       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1482       <require condition="ARMv8MML_DSP_SP_GCC"/>
1483       <require Dendian="Big-endian"/>
1484     </condition>
1485
1486     <condition id="ARMv8MML_DP_GCC">
1487       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1488       <require condition="ARMv8MML_DP"/>
1489       <require Tcompiler="GCC"/>
1490     </condition>
1491     <condition id="ARMv8MML_DP_LE_GCC">
1492       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1493       <require condition="ARMv8MML_DP_GCC"/>
1494       <require Dendian="Little-endian"/>
1495     </condition>
1496     <condition id="ARMv8MML_DP_BE_GCC">
1497       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1498       <require condition="ARMv8MML_DP_GCC"/>
1499       <require Dendian="Big-endian"/>
1500     </condition>
1501
1502     <condition id="ARMv8MML_DSP_DP_GCC">
1503       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the GCC Compiler</description>
1504       <require condition="ARMv8MML_DSP_DP"/>
1505       <require Tcompiler="GCC"/>
1506     </condition>
1507     <condition id="ARMv8MML_DSP_DP_LE_GCC">
1508       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1509       <require condition="ARMv8MML_DSP_DP_GCC"/>
1510       <require Dendian="Little-endian"/>
1511     </condition>
1512     <condition id="ARMv8MML_DSP_DP_BE_GCC">
1513       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1514       <require condition="ARMv8MML_DSP_DP_GCC"/>
1515       <require Dendian="Big-endian"/>
1516     </condition>
1517
1518     <!-- IAR compiler -->
1519     <condition id="CM0_IAR">
1520       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1521       <require condition="CM0"/>
1522       <require Tcompiler="IAR"/>
1523     </condition>
1524     <condition id="CM0_LE_IAR">
1525       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1526       <require condition="CM0_IAR"/>
1527       <require Dendian="Little-endian"/>
1528     </condition>
1529     <condition id="CM0_BE_IAR">
1530       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1531       <require condition="CM0_IAR"/>
1532       <require Dendian="Big-endian"/>
1533     </condition>
1534
1535     <condition id="CM3_IAR">
1536       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1537       <require condition="CM3"/>
1538       <require Tcompiler="IAR"/>
1539     </condition>
1540     <condition id="CM3_LE_IAR">
1541       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1542       <require condition="CM3_IAR"/>
1543       <require Dendian="Little-endian"/>
1544     </condition>
1545     <condition id="CM3_BE_IAR">
1546       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1547       <require condition="CM3_IAR"/>
1548       <require Dendian="Big-endian"/>
1549     </condition>
1550
1551     <condition id="CM4_IAR">
1552       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1553       <require condition="CM4"/>
1554       <require Tcompiler="IAR"/>
1555     </condition>
1556     <condition id="CM4_LE_IAR">
1557       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1558       <require condition="CM4_IAR"/>
1559       <require Dendian="Little-endian"/>
1560     </condition>
1561     <condition id="CM4_BE_IAR">
1562       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1563       <require condition="CM4_IAR"/>
1564       <require Dendian="Big-endian"/>
1565     </condition>
1566
1567     <condition id="CM4_FP_IAR">
1568       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1569       <require condition="CM4_FP"/>
1570       <require Tcompiler="IAR"/>
1571     </condition>
1572     <condition id="CM4_FP_LE_IAR">
1573       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1574       <require condition="CM4_FP_IAR"/>
1575       <require Dendian="Little-endian"/>
1576     </condition>
1577     <condition id="CM4_FP_BE_IAR">
1578       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1579       <require condition="CM4_FP_IAR"/>
1580       <require Dendian="Big-endian"/>
1581     </condition>
1582
1583     <condition id="CM7_IAR">
1584       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1585       <require condition="CM7"/>
1586       <require Tcompiler="IAR"/>
1587     </condition>
1588     <condition id="CM7_LE_IAR">
1589       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1590       <require condition="CM7_IAR"/>
1591       <require Dendian="Little-endian"/>
1592     </condition>
1593     <condition id="CM7_BE_IAR">
1594       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1595       <require condition="CM7_IAR"/>
1596       <require Dendian="Big-endian"/>
1597     </condition>
1598
1599     <condition id="CM7_FP_IAR">
1600       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1601       <require condition="CM7_FP"/>
1602       <require Tcompiler="IAR"/>
1603     </condition>
1604     <condition id="CM7_FP_LE_IAR">
1605       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1606       <require condition="CM7_FP_IAR"/>
1607       <require Dendian="Little-endian"/>
1608     </condition>
1609     <condition id="CM7_FP_BE_IAR">
1610       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1611       <require condition="CM7_FP_IAR"/>
1612       <require Dendian="Big-endian"/>
1613     </condition>
1614
1615     <condition id="CM7_SP_IAR">
1616       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1617       <require condition="CM7_SP"/>
1618       <require Tcompiler="IAR"/>
1619     </condition>
1620     <condition id="CM7_SP_LE_IAR">
1621       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1622       <require condition="CM7_SP_IAR"/>
1623       <require Dendian="Little-endian"/>
1624     </condition>
1625     <condition id="CM7_SP_BE_IAR">
1626       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1627       <require condition="CM7_SP_IAR"/>
1628       <require Dendian="Big-endian"/>
1629     </condition>
1630
1631     <condition id="CM7_DP_IAR">
1632       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1633       <require condition="CM7_DP"/>
1634       <require Tcompiler="IAR"/>
1635     </condition>
1636     <condition id="CM7_DP_LE_IAR">
1637       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1638       <require condition="CM7_DP_IAR"/>
1639       <require Dendian="Little-endian"/>
1640     </condition>
1641     <condition id="CM7_DP_BE_IAR">
1642       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1643       <require condition="CM7_DP_IAR"/>
1644       <require Dendian="Big-endian"/>
1645     </condition>
1646
1647     <!-- conditions selecting single devices and CMSIS Core -->
1648     <!-- used for component startup, GCC version is used for C-Startup -->
1649     <condition id="ARMCM0 CMSIS">
1650       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1651       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1652       <require Cclass="CMSIS" Cgroup="CORE"/>
1653     </condition>
1654     <condition id="ARMCM0 CMSIS GCC">
1655       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1656       <require condition="ARMCM0 CMSIS"/>
1657       <require condition="GCC"/>
1658     </condition>
1659
1660     <condition id="ARMCM0+ CMSIS">
1661       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1662       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1663       <require Cclass="CMSIS" Cgroup="CORE"/>
1664     </condition>
1665     <condition id="ARMCM0+ CMSIS GCC">
1666       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1667       <require condition="ARMCM0+ CMSIS"/>
1668       <require condition="GCC"/>
1669     </condition>
1670
1671     <condition id="ARMCM3 CMSIS">
1672       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1673       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1674       <require Cclass="CMSIS" Cgroup="CORE"/>
1675     </condition>
1676     <condition id="ARMCM3 CMSIS GCC">
1677       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1678       <require condition="ARMCM3 CMSIS"/>
1679       <require condition="GCC"/>
1680     </condition>
1681
1682     <condition id="ARMCM4 CMSIS">
1683       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1684       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1685       <require Cclass="CMSIS" Cgroup="CORE"/>
1686     </condition>
1687     <condition id="ARMCM4 CMSIS GCC">
1688       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1689       <require condition="ARMCM4 CMSIS"/>
1690       <require condition="GCC"/>
1691     </condition>
1692
1693     <condition id="ARMCM7 CMSIS">
1694       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1695       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1696       <require Cclass="CMSIS" Cgroup="CORE"/>
1697     </condition>
1698     <condition id="ARMCM7 CMSIS GCC">
1699       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1700       <require condition="ARMCM7 CMSIS"/>
1701       <require condition="GCC"/>
1702     </condition>
1703
1704     <condition id="ARMCM23 CMSIS">
1705       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1706       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1707       <require Cclass="CMSIS" Cgroup="CORE"/>
1708     </condition>
1709     <condition id="ARMCM23 CMSIS GCC">
1710       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1711       <require condition="ARMCM23 CMSIS"/>
1712       <require condition="GCC"/>
1713     </condition>
1714
1715     <condition id="ARMCM33 CMSIS">
1716       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1717       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1718       <require Cclass="CMSIS" Cgroup="CORE"/>
1719     </condition>
1720     <condition id="ARMCM33 CMSIS GCC">
1721       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1722       <require condition="ARMCM33 CMSIS"/>
1723       <require condition="GCC"/>
1724     </condition>
1725
1726     <condition id="ARMSC000 CMSIS">
1727       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1728       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1729       <require Cclass="CMSIS" Cgroup="CORE"/>
1730     </condition>
1731     <condition id="ARMSC000 CMSIS GCC">
1732       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1733       <require condition="ARMSC000 CMSIS"/>
1734       <require condition="GCC"/>
1735     </condition>
1736
1737     <condition id="ARMSC300 CMSIS">
1738       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1739       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1740       <require Cclass="CMSIS" Cgroup="CORE"/>
1741     </condition>
1742     <condition id="ARMSC300 CMSIS GCC">
1743       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1744       <require condition="ARMSC300 CMSIS"/>
1745       <require condition="GCC"/>
1746     </condition>
1747
1748     <condition id="ARMv8MBL CMSIS">
1749       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1750       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1751       <require Cclass="CMSIS" Cgroup="CORE"/>
1752     </condition>
1753     <condition id="ARMv8MBL CMSIS GCC">
1754       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1755       <require condition="ARMv8MBL CMSIS"/>
1756       <require condition="GCC"/>
1757     </condition>
1758
1759     <condition id="ARMv8MML CMSIS">
1760       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1761       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1762       <require Cclass="CMSIS" Cgroup="CORE"/>
1763     </condition>
1764     <condition id="ARMv8MML CMSIS GCC">
1765       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1766       <require condition="ARMv8MML CMSIS"/>
1767       <require condition="GCC"/>
1768     </condition>
1769
1770     <!-- CMSIS DSP -->
1771     <condition id="CMSIS DSP">
1772       <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
1773       <require condition="ARMv6_7-M Device"/>
1774       <require Cclass="CMSIS" Cgroup="CORE"/>
1775       <require condition="ARMCC GCC"/>
1776     </condition>
1777
1778     <!-- RTOS RTX -->
1779     <condition id="RTOS RTX">
1780       <description>Components required for RTOS RTX</description>
1781       <require condition="ARMv6_7-M Device"/>
1782       <require condition="ARMCC GCC IAR"/>
1783       <require Cclass="Device" Cgroup="Startup"/>
1784       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1785     </condition>
1786     <condition id="RTOS RTX5">
1787       <description>Components required for RTOS RTX5</description>
1788       <require condition="ARMv6_7_8-M Device"/>
1789       <require condition="ARMCC GCC"/>
1790       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1791     </condition>
1792     <condition id="RTOS2 RTX5">
1793       <description>Components required for RTOS2 RTX5</description>
1794       <require condition="ARMv6_7_8-M Device"/>
1795       <require condition="ARMCC GCC"/>
1796       <require Cclass="CMSIS"  Cgroup="CORE"/>
1797       <require Cclass="Device" Cgroup="Startup"/>
1798     </condition>
1799     <condition id="RTOS2 RTX5 NS">
1800       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1801       <require condition="ARMv8-M TZ Device"/>
1802       <require condition="ARMCC GCC"/>
1803       <require Cclass="CMSIS"  Cgroup="CORE"/>
1804       <require Cclass="Device" Cgroup="Startup"/>
1805     </condition>
1806
1807   </conditions>
1808
1809   <components>
1810     <!-- CMSIS-Core component -->
1811     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0"  condition="ARMv6_7_8-M Device" >
1812       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1813       <files>
1814         <!-- CPU independent -->
1815         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1816         <file category="include" name="CMSIS/Include/"/>
1817         <!-- Code template -->
1818         <file category="sourceC" attr="template" name="CMSIS/Core/Template/ARMv8-M/main_s.c" select="CMSIS-Core 'main' function for ARMv8-M" condition="ARMv8-M TZ Device"/>
1819       </files>
1820     </component>
1821
1822     <!-- CMSIS-Startup components -->
1823     <!-- Cortex-M0 -->
1824     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1825       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1826       <files>
1827         <!-- include folder / device header file -->
1828         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1829         <!-- startup / system file -->
1830         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1831         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1832         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1833         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1834         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1835       </files>
1836     </component>
1837     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1838       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1839       <files>
1840         <!-- include folder / device header file -->
1841         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1842         <!-- startup / system file -->
1843         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1844         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1845         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1846       </files>
1847     </component>
1848
1849     <!-- Cortex-M0+ -->
1850     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1851       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1852       <files>
1853         <!-- include folder / device header file -->
1854         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1855         <!-- startup / system file -->
1856         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1857         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1858         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1859         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1860         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1861       </files>
1862     </component>
1863     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1864       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1865       <files>
1866         <!-- include folder / device header file -->
1867         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1868         <!-- startup / system file -->
1869         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1870         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1871         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1872       </files>
1873     </component>
1874
1875     <!-- Cortex-M3 -->
1876     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1877       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1878       <files>
1879         <!-- include folder / device header file -->
1880         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1881         <!-- startup / system file -->
1882         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1883         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1884         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1885         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1886         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1887       </files>
1888     </component>
1889     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1890       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1891       <files>
1892         <!-- include folder / device header file -->
1893         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1894         <!-- startup / system file -->
1895         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1896         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1897         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1898       </files>
1899     </component>
1900
1901     <!-- Cortex-M4 -->
1902     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1903       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1904       <files>
1905         <!-- include folder / device header file -->
1906         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1907         <!-- startup / system file -->
1908         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1909         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1910         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1911         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1912         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1913       </files>
1914     </component>
1915     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1916       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1917       <files>
1918         <!-- include folder / device header file -->
1919         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1920         <!-- startup / system file -->
1921         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1922         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1923         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1924       </files>
1925     </component>
1926
1927     <!-- Cortex-M7 -->
1928     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1929       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1930       <files>
1931         <!-- include folder / device header file -->
1932         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1933         <!-- startup / system file -->
1934         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1935         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1936         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1937         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1938         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1939       </files>
1940     </component>
1941     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1942       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1943       <files>
1944         <!-- include folder / device header file -->
1945         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1946         <!-- startup / system file -->
1947         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1948         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1949         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1950       </files>
1951     </component>
1952
1953     <!-- Cortex-M23 -->
1954     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
1955       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1956       <files>
1957         <!-- include folder / device header file -->
1958         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
1959         <!-- startup / system file -->
1960         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
1961         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
1962         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1963         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1964         <!-- SAU configuration -->
1965         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1966       </files>
1967     </component>
1968     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
1969       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1970       <files>
1971         <!-- include folder / device header file -->
1972         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
1973         <!-- startup / system file -->
1974         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
1975         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1976         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
1977         <!-- SAU configuration -->
1978         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1979       </files>
1980     </component>
1981
1982     <!-- Cortex-M33 -->
1983     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM33 CMSIS">
1984       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1985       <files>
1986         <!-- include folder / device header file -->
1987         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
1988         <!-- startup / system file -->
1989         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s" version="1.0.0" attr="config" condition="ARMCC"/>
1990         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S" version="1.0.0" attr="config" condition="GCC"/>
1991         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1992         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1993         <!-- SAU configuration -->
1994         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1995       </files>
1996     </component>
1997     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM33 CMSIS GCC">
1998       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1999       <files>
2000         <!-- include folder / device header file -->
2001         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2002         <!-- startup / system file -->
2003         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c" version="1.0.0" attr="config" condition="GCC"/>
2004         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2005         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"      version="1.0.0" attr="config"/>
2006         <!-- SAU configuration -->
2007         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2008       </files>
2009     </component>
2010
2011     <!-- Cortex-SC000 -->
2012     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
2013       <description>System and Startup for Generic ARM SC000 device</description>
2014       <files>
2015         <!-- include folder / device header file -->
2016         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2017         <!-- startup / system file -->
2018         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2019         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2020         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2021         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2022         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2023       </files>
2024     </component>
2025     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2026       <description>System and Startup for Generic ARM SC000 device</description>
2027       <files>
2028         <!-- include folder / device header file -->
2029         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2030         <!-- startup / system file -->
2031         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2032         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2033         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2034       </files>
2035     </component>
2036
2037     <!-- Cortex-SC300 -->
2038     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
2039       <description>System and Startup for Generic ARM SC300 device</description>
2040       <files>
2041         <!-- include folder / device header file -->
2042         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2043         <!-- startup / system file -->
2044         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2045         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2046         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2047         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2048         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2049       </files>
2050     </component>
2051     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2052       <description>System and Startup for Generic ARM SC300 device</description>
2053       <files>
2054         <!-- include folder / device header file -->
2055         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2056         <!-- startup / system file -->
2057         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2058         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2059         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2060       </files>
2061     </component>
2062
2063     <!-- ARMv8MBL -->
2064     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2065       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2066       <files>
2067         <!-- include folder / device header file -->
2068         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2069         <!-- startup / system file -->
2070         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2071         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2072         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2073         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2074         <!-- SAU configuration -->
2075         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2076       </files>
2077     </component>
2078     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2079       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2080       <files>
2081         <!-- include folder / device header file -->
2082         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2083         <!-- startup / system file -->
2084         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2085         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2086         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2087         <!-- SAU configuration -->
2088         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2089       </files>
2090     </component>
2091
2092     <!-- ARMv8MML -->
2093     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
2094       <description>System and Startup for Generic ARM ARMv8MML device</description>
2095       <files>
2096         <!-- include folder / device header file -->
2097         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2098         <!-- startup / system file -->
2099         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
2100         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
2101         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2102         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2103         <!-- SAU configuration -->
2104         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2105       </files>
2106     </component>
2107     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
2108       <description>System and Startup for Generic ARM ARMv8MML device</description>
2109       <files>
2110         <!-- include folder / device header file -->
2111         <file category="include"  name="Device/ARM/ARMv8MML/Include/"/>
2112         <!-- startup / system file -->
2113         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
2114         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2115         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"      version="1.0.0" attr="config"/>
2116         <!-- SAU configuration -->
2117         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2118       </files>
2119     </component>
2120
2121
2122     <!-- CMSIS-DSP component -->
2123     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
2124       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2125       <files>
2126         <!-- CPU independent -->
2127         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2128         <file category="header" name="CMSIS/Include/arm_math.h"/>
2129
2130         <!-- CPU and Compiler dependent -->
2131         <!-- ARMCC -->
2132         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2133         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2134         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2135         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2136         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2137         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2138         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2139         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2140         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2141         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2142         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2143         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2144         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2145         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2146 <!--
2147         <file category="library" condition="CM23_LE_ARMCC"            name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2148         <file category="library" condition="CM33_LE_ARMCC"            name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2149         <file category="library" condition="CM33_DSP_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2150         <file category="library" condition="CM33_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2151         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2152         <file category="library" condition="ARMv8MBL_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2153         <file category="library" condition="ARMv8MML_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2154         <file category="library" condition="ARMv8MML_DSP_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2155         <file category="library" condition="ARMv8MML_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2156         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2157 -->
2158         <!-- GCC -->
2159         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2160         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2161         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2162         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2163         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2164         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2165         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2166 <!--
2167         <file category="library" condition="CM23_LE_GCC"              name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2168         <file category="library" condition="CM33_LE_GCC"              name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2169         <file category="library" condition="CM33_DSP_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2170         <file category="library" condition="CM33_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2171         <file category="library" condition="CM33_DSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2172         <file category="library" condition="ARMv8MBL_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2173         <file category="library" condition="ARMv8MML_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2174         <file category="library" condition="ARMv8MML_DSP_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2175         <file category="library" condition="ARMv8MML_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2176         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"   name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2177 -->
2178       </files>
2179     </component>
2180
2181     <!-- CMSIS-RTOS Keil RTX component -->
2182     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX">
2183       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2184       <RTE_Components_h>
2185         <!-- the following content goes into file 'RTE_Components.h' -->
2186         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2187         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2188       </RTE_Components_h>
2189       <files>
2190         <!-- CPU independent -->
2191         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2192         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2193         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2194
2195         <!-- RTX templates -->
2196         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2197         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2198         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2199         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2200         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2201         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2202         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2203         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2204         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2205         <!-- tool-chain specific template file -->
2206         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2207         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2208         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2209
2210         <!-- CPU and Compiler dependent -->
2211         <!-- ARMCC -->
2212         <file category="library" condition="CM0_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2213         <file category="library" condition="CM0_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2214         <file category="library" condition="CM3_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2215         <file category="library" condition="CM3_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2216         <file category="library" condition="CM4_LE_ARMCC_STD"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2217         <file category="library" condition="CM4_LE_ARMCC_IFX"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2218         <file category="library" condition="CM4_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2219         <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2220         <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2221         <file category="library" condition="CM4_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2222         <file category="library" condition="CM7_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2223         <file category="library" condition="CM7_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2224         <file category="library" condition="CM7_FP_LE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2225         <file category="library" condition="CM7_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2226         <!-- GCC -->
2227         <file category="library" condition="CM0_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2228         <file category="library" condition="CM0_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2229         <file category="library" condition="CM3_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2230         <file category="library" condition="CM3_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2231         <file category="library" condition="CM4_LE_GCC_STD"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2232         <file category="library" condition="CM4_LE_GCC_IFX"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2233         <file category="library" condition="CM4_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2234         <file category="library" condition="CM4_FP_LE_GCC_STD"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2235         <file category="library" condition="CM4_FP_LE_GCC_IFX"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2236         <file category="library" condition="CM4_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2237         <file category="library" condition="CM7_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2238         <file category="library" condition="CM7_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2239         <file category="library" condition="CM7_FP_LE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2240         <file category="library" condition="CM7_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2241         <!-- IAR -->
2242         <file category="library" condition="CM0_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2243         <file category="library" condition="CM0_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2244         <file category="library" condition="CM3_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2245         <file category="library" condition="CM3_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2246         <file category="library" condition="CM4_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2247         <file category="library" condition="CM4_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2248         <file category="library" condition="CM4_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2249         <file category="library" condition="CM4_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2250         <file category="library" condition="CM7_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2251         <file category="library" condition="CM7_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2252         <file category="library" condition="CM7_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2253         <file category="library" condition="CM7_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2254       </files>
2255     </component>
2256
2257     <!-- CMSIS-RTOS Keil RTX5 component -->
2258     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.0.0" Capiversion="1.0" condition="RTOS RTX5">
2259       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2260       <RTE_Components_h>
2261         <!-- the following content goes into file 'RTE_Components.h' -->
2262         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2263         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2264       </RTE_Components_h>
2265       <files>
2266         <!-- RTX header file -->
2267         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2268         <!-- RTX compatibility module for API V1 -->
2269         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2270       </files>
2271     </component>
2272
2273     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2274     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5">
2275       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2276       <RTE_Components_h>
2277         <!-- the following content goes into file 'RTE_Components.h' -->
2278         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2279         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2280       </RTE_Components_h>
2281       <files>
2282         <!-- RTX documentation -->
2283         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2284
2285         <!-- RTX header files -->
2286         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2287         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2288
2289         <!-- RTX configuration -->
2290         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2291
2292         <!-- RTX templates -->
2293         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"   select="CMSIS-RTOS 'main' function"/>
2294         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
2295         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2296
2297         <!-- RTX libraries (CPU and Compiler dependent) -->
2298         <!-- ARMCC -->
2299         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2300         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2301         <file category="library" condition="CM4_LE_ARMCC_STD"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2302         <file category="library" condition="CM4_FP_LE_ARMCC_STD"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2303         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2304         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2305         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2306         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2307         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2308         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2309         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2310         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2311         <!-- GCC -->
2312         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2313         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2314         <file category="library" condition="CM4_LE_GCC_STD"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2315         <file category="library" condition="CM4_FP_LE_GCC_STD"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2316         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2317         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2318         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2319         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2320         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2321         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2322         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2323         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2324       </files>
2325     </component>
2326     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5 NS">
2327       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2328       <RTE_Components_h>
2329         <!-- the following content goes into file 'RTE_Components.h' -->
2330         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2331         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2332         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2333       </RTE_Components_h>
2334       <files>
2335         <!-- RTX documentation -->
2336         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2337
2338         <!-- RTX header files -->
2339         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2340         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2341
2342         <!-- RTX configuration -->
2343         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2344
2345         <!-- RTX templates -->
2346         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"   select="CMSIS-RTOS 'main' function"/>
2347         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
2348         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2349
2350         <!-- RTX libraries (CPU and Compiler dependent) -->
2351         <!-- ARMCC -->
2352         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2353         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2354         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2355         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2356         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2357         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2358         <!-- GCC -->
2359         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2360         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2361         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2362         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2363         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2364         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2365       </files>
2366     </component>
2367     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5">
2368       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2369       <RTE_Components_h>
2370         <!-- the following content goes into file 'RTE_Components.h' -->
2371         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2372         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2373         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2374       </RTE_Components_h>
2375       <files>
2376         <!-- RTX documentation -->
2377         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2378
2379         <!-- RTX header files -->
2380         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2381         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2382
2383         <!-- RTX configuration -->
2384         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2385
2386         <!-- RTX templates -->
2387         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"   select="CMSIS-RTOS 'main' function"/>
2388         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
2389         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2390
2391         <!-- RTX sources (core) -->
2392         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2393         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2394         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2395         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2396         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2397         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2398         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2399         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2400         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2401         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2402         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2403         <!-- RTX sources (handlers ARMCC) -->
2404         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2405         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2406         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2407         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2408         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2409         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2410         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2411         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2412         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2413         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2414         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2415         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2416         <!-- RTX sources (handlers GCC) -->
2417         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.s"         condition="CM0_GCC"/>
2418         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s"         condition="CM3_GCC"/>
2419         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s"         condition="CM4_GCC"/>
2420         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s"        condition="CM4_FP_GCC"/>
2421         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s"         condition="CM7_GCC"/>
2422         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s"        condition="CM7_FP_GCC"/>
2423         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.s"    condition="CM23_GCC"/>
2424         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.s"    condition="CM33_GCC"/>
2425         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.s" condition="CM33_FP_GCC"/>
2426         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.s"    condition="ARMv8MBL_GCC"/>
2427         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.s"    condition="ARMv8MML_GCC"/>
2428         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.s" condition="ARMv8MML_FP_GCC"/>
2429       </files>
2430     </component>
2431     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5 NS">
2432       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2433       <RTE_Components_h>
2434         <!-- the following content goes into file 'RTE_Components.h' -->
2435         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2436         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2437         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2438         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2439       </RTE_Components_h>
2440       <files>
2441         <!-- RTX documentation -->
2442         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2443
2444         <!-- RTX header files -->
2445         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2446         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2447
2448         <!-- RTX configuration -->
2449         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2450
2451         <!-- RTX templates -->
2452         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"   select="CMSIS-RTOS 'main' function"/>
2453         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
2454         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2455
2456         <!-- RTX sources (core) -->
2457         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2458         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2459         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2460         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2461         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2462         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2463         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2464         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2465         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2466         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2467         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2468         <!-- RTX sources (ARMCC handlers) -->
2469         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2470         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2471         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2472         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2473         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2474         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2475         <!-- RTX sources (GCC handlers) -->
2476         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.s"    condition="CM23_GCC"/>
2477         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.s"    condition="CM33_GCC"/>
2478         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.s" condition="CM33_FP_GCC"/>
2479         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.s"    condition="ARMv8MBL_GCC"/>
2480         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.s"    condition="ARMv8MML_GCC"/>
2481         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.s" condition="ARMv8MML_FP_GCC"/>
2482       </files>
2483     </component>
2484
2485   </components>
2486
2487   <boards>
2488     <board name="uVision Simulator" vendor="Keil">
2489       <description>uVision Simulator</description>
2490       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2491       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2492       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2493       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2494       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2495     </board>
2496   </boards>
2497
2498   <examples>
2499     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2500       <description>DSP_Lib Class Marks example</description>
2501       <board name="uVision Simulator" vendor="Keil"/>
2502       <project>
2503         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2504       </project>
2505       <attributes>
2506         <component Cclass="CMSIS" Cgroup="CORE"/>
2507         <component Cclass="CMSIS" Cgroup="DSP"/>
2508         <component Cclass="Device" Cgroup="Startup"/>
2509         <category>Getting Started</category>
2510       </attributes>
2511     </example>
2512
2513     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2514       <description>DSP_Lib Convolution example</description>
2515       <board name="uVision Simulator" vendor="Keil"/>
2516       <project>
2517         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2518       </project>
2519       <attributes>
2520         <component Cclass="CMSIS" Cgroup="CORE"/>
2521         <component Cclass="CMSIS" Cgroup="DSP"/>
2522         <component Cclass="Device" Cgroup="Startup"/>
2523         <category>Getting Started</category>
2524       </attributes>
2525     </example>
2526
2527     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2528       <description>DSP_Lib Dotproduct example</description>
2529       <board name="uVision Simulator" vendor="Keil"/>
2530       <project>
2531         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2532       </project>
2533       <attributes>
2534         <component Cclass="CMSIS" Cgroup="CORE"/>
2535         <component Cclass="CMSIS" Cgroup="DSP"/>
2536         <component Cclass="Device" Cgroup="Startup"/>
2537         <category>Getting Started</category>
2538       </attributes>
2539     </example>
2540
2541     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2542       <description>DSP_Lib FFT Bin example</description>
2543       <board name="uVision Simulator" vendor="Keil"/>
2544       <project>
2545         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2546       </project>
2547       <attributes>
2548         <component Cclass="CMSIS" Cgroup="CORE"/>
2549         <component Cclass="CMSIS" Cgroup="DSP"/>
2550         <component Cclass="Device" Cgroup="Startup"/>
2551         <category>Getting Started</category>
2552       </attributes>
2553     </example>
2554
2555     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2556       <description>DSP_Lib FIR example</description>
2557       <board name="uVision Simulator" vendor="Keil"/>
2558       <project>
2559         <environment name="uv" load="arm_fir_example.uvprojx"/>
2560       </project>
2561       <attributes>
2562         <component Cclass="CMSIS" Cgroup="CORE"/>
2563         <component Cclass="CMSIS" Cgroup="DSP"/>
2564         <component Cclass="Device" Cgroup="Startup"/>
2565         <category>Getting Started</category>
2566       </attributes>
2567     </example>
2568
2569     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2570       <description>DSP_Lib Graphic Equalizer example</description>
2571       <board name="uVision Simulator" vendor="Keil"/>
2572       <project>
2573         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2574       </project>
2575       <attributes>
2576         <component Cclass="CMSIS" Cgroup="CORE"/>
2577         <component Cclass="CMSIS" Cgroup="DSP"/>
2578         <component Cclass="Device" Cgroup="Startup"/>
2579         <category>Getting Started</category>
2580       </attributes>
2581     </example>
2582
2583     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2584       <description>DSP_Lib Linear Interpolation example</description>
2585       <board name="uVision Simulator" vendor="Keil"/>
2586       <project>
2587         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2588       </project>
2589       <attributes>
2590         <component Cclass="CMSIS" Cgroup="CORE"/>
2591         <component Cclass="CMSIS" Cgroup="DSP"/>
2592         <component Cclass="Device" Cgroup="Startup"/>
2593         <category>Getting Started</category>
2594       </attributes>
2595     </example>
2596
2597     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2598       <description>DSP_Lib Matrix example</description>
2599       <board name="uVision Simulator" vendor="Keil"/>
2600       <project>
2601         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2602       </project>
2603       <attributes>
2604         <component Cclass="CMSIS" Cgroup="CORE"/>
2605         <component Cclass="CMSIS" Cgroup="DSP"/>
2606         <component Cclass="Device" Cgroup="Startup"/>
2607         <category>Getting Started</category>
2608       </attributes>
2609     </example>
2610
2611     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2612       <description>DSP_Lib Signal Convergence example</description>
2613       <board name="uVision Simulator" vendor="Keil"/>
2614       <project>
2615         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2616       </project>
2617       <attributes>
2618         <component Cclass="CMSIS" Cgroup="CORE"/>
2619         <component Cclass="CMSIS" Cgroup="DSP"/>
2620         <component Cclass="Device" Cgroup="Startup"/>
2621         <category>Getting Started</category>
2622       </attributes>
2623     </example>
2624
2625     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2626       <description>DSP_Lib Sinus/Cosinus example</description>
2627       <board name="uVision Simulator" vendor="Keil"/>
2628       <project>
2629         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2630       </project>
2631       <attributes>
2632         <component Cclass="CMSIS" Cgroup="CORE"/>
2633         <component Cclass="CMSIS" Cgroup="DSP"/>
2634         <component Cclass="Device" Cgroup="Startup"/>
2635         <category>Getting Started</category>
2636       </attributes>
2637     </example>
2638
2639     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2640       <description>DSP_Lib Variance example</description>
2641       <board name="uVision Simulator" vendor="Keil"/>
2642       <project>
2643         <environment name="uv" load="arm_variance_example.uvprojx"/>
2644       </project>
2645       <attributes>
2646         <component Cclass="CMSIS" Cgroup="CORE"/>
2647         <component Cclass="CMSIS" Cgroup="DSP"/>
2648         <component Cclass="Device" Cgroup="Startup"/>
2649         <category>Getting Started</category>
2650       </attributes>
2651     </example>
2652
2653     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Simulation/RTX5_Blinky">
2654       <description>CMSIS-RTOS2 Blinky example</description>
2655       <board name="uVision Simulator" vendor="Keil"/>
2656       <project>
2657         <environment name="uv" load="Blinky.uvprojx"/>
2658       </project>
2659       <attributes>
2660         <component Cclass="CMSIS" Cgroup="CORE"/>
2661         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2662         <component Cclass="Device" Cgroup="Startup"/>
2663         <category>Getting Started</category>
2664       </attributes>
2665     </example>
2666
2667   </examples>
2668
2669 </package>