begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.6.0-rc0">
  12       Active development...
  13       CMSIS-Core(M): 5.3.0 (see revision history for details)
  14        - Added provisions for compiler-independent C startup code.
  15       CMSIS-Core(A): 1.1.4 (see revision history for details)
  16        - Fixed __FPU_Enable.
  17       CMSIS-DSP: 1.7.0 (see revision history for details)
  18         - New Neon versions of f32 functions
  19         - Python wrapper
  20         - Preliminary cmake build
  21         - Compilation flags for FFTs
  22         - Changes to arm_math.h
  23       CMSIS-NN: Version 1.2.0 (see revision history for details)
  24         - New function for depthwise convolution with asymmetric quantization.
  25         - New support functions for requantization.
  26       CMSIS-RTOS:
  27         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  28       CMSIS-RTOS2:
  29         - RTX 5.5.1 (see revision history for details)
  30       CMSIS-Driver: 2.7.1
  31         - WiFi Interface API 1.0.0
  32       Devices:
  33        - Generalized C startup code for all Cortex-M familiy devices.
  34        - Updated Cortex-A default memory regions and MMU configurations
  35        - Moved Cortex-A memory and system config files to avoid include path issues
  36     </release>
  37     <release version="5.5.1" date="2019-03-20">
  38       The following folders are deprecated
  39         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  40
  41       CMSIS-Core(M): 5.2.1 (see revision history for details)
  42         - Fixed compilation issue in cmsis_armclang_ltm.h
  43     </release>
  44     <release version="5.5.0" date="2019-03-18">
  45       The following folders have been removed:
  46         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  47         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  48       The following folders are deprecated
  49         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  50
  51       CMSIS-Core(M): 5.2.0 (see revision history for details)
  52         - Reworked Stack/Heap configuration for ARM startup files.
  53         - Added Cortex-M35P device support.
  54         - Added generic Armv8.1-M Mainline device support.
  55       CMSIS-Core(A): 1.1.3 (see revision history for details)
  56       CMSIS-DSP: 1.6.0 (see revision history for details)
  57         - reworked DSP library source files
  58         - reworked DSP library documentation
  59         - Changed DSP folder structure
  60         - moved DSP libraries to folder ./DSP/Lib
  61         - ARM DSP Libraries are built with ARMCLANG
  62         - Added DSP Libraries Source variant
  63       CMSIS-RTOS2:
  64         - RTX 5.5.0 (see revision history for details)
  65       CMSIS-Driver: 2.7.0
  66         - Added WiFi Interface API 1.0.0-beta
  67         - Added components for project specific driver implementations
  68       CMSIS-Pack: 1.6.0 (see revision history for details)
  69       Devices:
  70         - Added Cortex-M35P and ARMv81MML device templates.
  71         - Fixed C-Startup Code for GCC (aligned with other compilers)
  72       Utilities:
  73         - SVDConv 3.3.25
  74         - PackChk 1.3.82
  75     </release>
  76     <release version="5.4.0" date="2018-08-01">
  77       Aligned pack structure with repository.
  78       The following folders are deprecated:
  79         - CMSIS/Include/
  80         - CMSIS/DSP_Lib/
  81
  82       CMSIS-Core(M): 5.1.2 (see revision history for details)
  83         - Added Cortex-M1 support (beta).
  84       CMSIS-Core(A): 1.1.2 (see revision history for details)
  85       CMSIS-NN: 1.1.0
  86         - Added new math functions.
  87       CMSIS-RTOS2:
  88         - API 2.1.3 (see revision history for details)
  89         - RTX 5.4.0 (see revision history for details)
  90           * Updated exception handling on Cortex-A
  91       CMSIS-Driver:
  92         - Flash Driver API V2.2.0
  93       Utilities:
  94         - SVDConv 3.3.21
  95         - PackChk 1.3.71
  96     </release>
  97     <release version="5.3.0" date="2018-02-22">
  98       Updated Arm company brand.
  99       CMSIS-Core(M): 5.1.1 (see revision history for details)
 100       CMSIS-Core(A): 1.1.1 (see revision history for details)
 101       CMSIS-DAP: 2.0.0 (see revision history for details)
 102       CMSIS-NN: 1.0.0
 103         - Initial contribution of the bare metal Neural Network Library.
 104       CMSIS-RTOS2:
 105         - RTX 5.3.0 (see revision history for details)
 106         - OS Tick API 1.0.1
 107     </release>
 108     <release version="5.2.0" date="2017-11-16">
 109       CMSIS-Core(M): 5.1.0 (see revision history for details)
 110         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 111         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 112       CMSIS-Core(A): 1.1.0 (see revision history for details)
 113         - Added compiler_iccarm.h.
 114         - Added additional access functions for physical timer.
 115       CMSIS-DAP: 1.2.0 (see revision history for details)
 116       CMSIS-DSP: 1.5.2 (see revision history for details)
 117       CMSIS-Driver: 2.6.0 (see revision history for details)
 118         - CAN Driver API V1.2.0
 119         - NAND Driver API V2.3.0
 120       CMSIS-RTOS:
 121         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 122       CMSIS-RTOS2:
 123         - API 2.1.2 (see revision history for details)
 124         - RTX 5.2.3 (see revision history for details)
 125       Devices:
 126         - Added GCC startup and linker script for Cortex-A9.
 127         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 128         - Added IAR startup code for Cortex-A9
 129     </release>
 130     <release version="5.1.1" date="2017-09-19">
 131       CMSIS-RTOS2:
 132       - RTX 5.2.1 (see revision history for details)
 133     </release>
 134     <release version="5.1.0" date="2017-08-04">
 135       CMSIS-Core(M): 5.0.2 (see revision history for details)
 136       - Changed Version Control macros to be core agnostic.
 137       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 138       CMSIS-Core(A): 1.0.0 (see revision history for details)
 139       - Initial release
 140       - IRQ Controller API 1.0.0
 141       CMSIS-Driver: 2.05 (see revision history for details)
 142       - All typedefs related to status have been made volatile.
 143       CMSIS-RTOS2:
 144       - API 2.1.1 (see revision history for details)
 145       - RTX 5.2.0 (see revision history for details)
 146       - OS Tick API 1.0.0
 147       CMSIS-DSP: 1.5.2 (see revision history for details)
 148       - Fixed GNU Compiler specific diagnostics.
 149       CMSIS-Pack: 1.5.0 (see revision history for details)
 150       - added System Description File (*.SDF) Format
 151       CMSIS-Zone: 0.0.1 (Preview)
 152       - Initial specification draft
 153     </release>
 154     <release version="5.0.1" date="2017-02-03">
 155       Package Description:
 156       - added taxonomy for Cclass RTOS
 157       CMSIS-RTOS2:
 158       - API 2.1   (see revision history for details)
 159       - RTX 5.1.0 (see revision history for details)
 160       CMSIS-Core: 5.0.1 (see revision history for details)
 161       - Added __PACKED_STRUCT macro
 162       - Added uVisior support
 163       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 164       - Updated template for secure main function (main_s.c)
 165       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 166       CMSIS-DSP: 1.5.1 (see revision history for details)
 167       - added ARMv8M DSP libraries.
 168       CMSIS-Pack:1.4.9 (see revision history for details)
 169       - added Pack Index File specification and schema file
 170     </release>
 171     <release version="5.0.0" date="2016-11-11">
 172       Changed open source license to Apache 2.0
 173       CMSIS_Core:
 174        - Added support for Cortex-M23 and Cortex-M33.
 175        - Added ARMv8-M device configurations for mainline and baseline.
 176        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 177        - Added cmsis_compiler.h to unify compiler behaviour.
 178        - Updated function SCB_EnableICache (for Cortex-M7).
 179        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 180       CMSIS-RTOS:
 181         - bug fix in RTX 4.82 (see revision history for details)
 182       CMSIS-RTOS2:
 183         - new API including compatibility layer to CMSIS-RTOS
 184         - reference implementation based on RTX5
 185         - supports all Cortex-M variants including TrustZone for ARMv8-M
 186       CMSIS-SVD:
 187        - reworked SVD format documentation
 188        - removed SVD file database documentation as SVD files are distributed in packs
 189        - updated SVDConv for Win32 and Linux
 190       CMSIS-DSP:
 191        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 192        - Added DSP libraries build projects to CMSIS pack.
 193     </release>
 194     <release version="4.5.0" date="2015-10-28">
 195       - CMSIS-Core     4.30.0  (see revision history for details)
 196       - CMSIS-DAP      1.1.0   (unchanged)
 197       - CMSIS-Driver   2.04.0  (see revision history for details)
 198       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 199       - CMSIS-Pack     1.4.1   (see revision history for details)
 200       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 201       - CMSIS-SVD      1.3.1   (see revision history for details)
 202     </release>
 203     <release version="4.4.0" date="2015-09-11">
 204       - CMSIS-Core     4.20   (see revision history for details)
 205       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 206       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 207       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 208       - CMSIS-RTOS
 209         -- API         1.02   (unchanged)
 210         -- RTX         4.79   (see revision history for details)
 211       - CMSIS-SVD      1.3.0  (see revision history for details)
 212       - CMSIS-DAP      1.1.0  (extended with SWO support)
 213     </release>
 214     <release version="4.3.0" date="2015-03-20">
 215       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 216       - CMSIS-DSP      1.4.5  (see revision history for details)
 217       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 218       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 219       - CMSIS-RTOS
 220         -- API         1.02   (unchanged)
 221         -- RTX         4.78   (see revision history for details)
 222       - CMSIS-SVD      1.2    (unchanged)
 223     </release>
 224     <release version="4.2.0" date="2014-09-24">
 225       Adding Cortex-M7 support
 226       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 227       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 228       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 229       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 230       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 231     </release>
 232     <release version="4.1.1" date="2014-06-30">
 233       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 234     </release>
 235     <release version="4.1.0" date="2014-06-12">
 236       - CMSIS-Driver   2.02  (incompatible update)
 237       - CMSIS-Pack     1.3   (see revision history for details)
 238       - CMSIS-DSP      1.4.2 (unchanged)
 239       - CMSIS-Core     3.30  (unchanged)
 240       - CMSIS-RTOS RTX 4.74  (unchanged)
 241       - CMSIS-RTOS API 1.02  (unchanged)
 242       - CMSIS-SVD      1.10  (unchanged)
 243       PACK:
 244       - removed G++ specific files from PACK
 245       - added Component Startup variant "C Startup"
 246       - added Pack Checking Utility
 247       - updated conditions to reflect tool-chain dependency
 248       - added Taxonomy for Graphics
 249       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 250     </release>
 251     <release version="4.0.0">
 252       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 253       - CMSIS-Pack     1.1   Preliminary
 254       - CMSIS-DSP      1.4.2 (see revision history for details)
 255       - CMSIS-Core     3.30  (see revision history for details)
 256       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 257       - CMSIS-RTOS API 1.02  (unchanged)
 258       - CMSIS-SVD      1.10  (unchanged)
 259     </release>
 260     <release version="3.20.4">
 261       - CMSIS-RTOS 4.74 (see revision history for details)
 262       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 263     </release>
 264     <release version="3.20.3">
 265       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 266       - CMSIS-RTOS 4.73 (see revision history for details)
 267     </release>
 268     <release version="3.20.2">
 269       - CMSIS-Pack documentation has been added
 270       - CMSIS-Drivers header and documentation have been added to PACK
 271       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 272     </release>
 273     <release version="3.20.1">
 274       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 275       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 276     </release>
 277     <release version="3.20.0">
 278       The software portions that are deployed in the application program are now under a BSD license which allows usage
 279       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 280       The individual components have been update as listed below:
 281       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 282       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 283       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 284       - CMSIS-SVD is unchanged.
 285     </release>
 286   </releases>
 287
 288   <taxonomy>
 289     <description Cclass="Audio">Software components for audio processing</description>
 290     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 291     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 292     <description Cclass="Compiler">Compiler Software Extensions</description>
 293     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 294     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 295     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 296     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 297     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 298     <description Cclass="File System">File Drive Support and File System</description>
 299     <description Cclass="IoT Client">IoT cloud client connector</description>
 300     <description Cclass="IoT Utility">IoT specific software utility</description>
 301     <description Cclass="Graphics">Graphical User Interface</description>
 302     <description Cclass="Network">Network Stack using Internet Protocols</description>
 303     <description Cclass="RTOS">Real-time Operating System</description>
 304     <description Cclass="Security">Encryption for secure communication or storage</description>
 305     <description Cclass="USB">Universal Serial Bus Stack</description>
 306     <description Cclass="Utility">Generic software utility components</description>
 307   </taxonomy>
 308
 309   <devices>
 310     <!-- ******************************  Cortex-M0  ****************************** -->
 311     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 312       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 313       <description>
 314 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 315 - simple, easy-to-use programmers model
 316 - highly efficient ultra-low power operation
 317 - excellent code density
 318 - deterministic, high-performance interrupt handling
 319 - upward compatibility with the rest of the Cortex-M processor family.
 320       </description>
 321       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 322       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 323       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 324       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 325
 326       <device Dname="ARMCM0">
 327         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 328         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 329       </device>
 330     </family>
 331
 332     <!-- ******************************  Cortex-M0P  ****************************** -->
 333     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 334       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 335       <description>
 336 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 337 - simple, easy-to-use programmers model
 338 - highly efficient ultra-low power operation
 339 - excellent code density
 340 - deterministic, high-performance interrupt handling
 341 - upward compatibility with the rest of the Cortex-M processor family.
 342       </description>
 343       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 344       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 345       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 346       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 347
 348       <device Dname="ARMCM0P">
 349         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 350         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 351       </device>
 352
 353       <device Dname="ARMCM0P_MPU">
 354         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 355         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 356       </device>
 357     </family>
 358
 359     <!-- ******************************  Cortex-M1  ****************************** -->
 360     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 361       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 362       <description>
 363 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 364 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 365       </description>
 366       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 367       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 368       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 369       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 370
 371       <device Dname="ARMCM1">
 372         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 373         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 374       </device>
 375     </family>
 376
 377     <!-- ******************************  Cortex-M3  ****************************** -->
 378     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 379       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 380       <description>
 381 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 382 - simple, easy-to-use programmers model
 383 - highly efficient ultra-low power operation
 384 - excellent code density
 385 - deterministic, high-performance interrupt handling
 386 - upward compatibility with the rest of the Cortex-M processor family.
 387       </description>
 388       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 389       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 390       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 391       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 392
 393       <device Dname="ARMCM3">
 394         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 395         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 396       </device>
 397     </family>
 398
 399     <!-- ******************************  Cortex-M4  ****************************** -->
 400     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 401       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 402       <description>
 403 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 404 - simple, easy-to-use programmers model
 405 - highly efficient ultra-low power operation
 406 - excellent code density
 407 - deterministic, high-performance interrupt handling
 408 - upward compatibility with the rest of the Cortex-M processor family.
 409       </description>
 410       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 411       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 412       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 413       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 414
 415       <device Dname="ARMCM4">
 416         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 417         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 418       </device>
 419
 420       <device Dname="ARMCM4_FP">
 421         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 422         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 423       </device>
 424     </family>
 425
 426     <!-- ******************************  Cortex-M7  ****************************** -->
 427     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 428       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 429       <description>
 430 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 431 - simple, easy-to-use programmers model
 432 - highly efficient ultra-low power operation
 433 - excellent code density
 434 - deterministic, high-performance interrupt handling
 435 - upward compatibility with the rest of the Cortex-M processor family.
 436       </description>
 437       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 438       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 439       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 440       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 441
 442       <device Dname="ARMCM7">
 443         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 444         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 445       </device>
 446
 447       <device Dname="ARMCM7_SP">
 448         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 449         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 450       </device>
 451
 452       <device Dname="ARMCM7_DP">
 453         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 454         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 455       </device>
 456     </family>
 457
 458     <!-- ******************************  Cortex-M23  ********************** -->
 459     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 460       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 461       <description>
 462 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 463 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 464 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 465       </description>
 466       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 467       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 468       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 469       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 470       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 471       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 472
 473       <device Dname="ARMCM23">
 474         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 475         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 476       </device>
 477
 478       <device Dname="ARMCM23_TZ">
 479         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 480         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 481       </device>
 482     </family>
 483
 484     <!-- ******************************  Cortex-M33  ****************************** -->
 485     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 486       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 487       <description>
 488 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 489 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 490       </description>
 491       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 492       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 493       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 494       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 495       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 496       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 497
 498       <device Dname="ARMCM33">
 499         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 500         <description>
 501           no DSP Instructions, no Floating Point Unit, no TrustZone
 502         </description>
 503         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 504       </device>
 505
 506       <device Dname="ARMCM33_TZ">
 507         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 508         <description>
 509           no DSP Instructions, no Floating Point Unit, TrustZone
 510         </description>
 511         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 512       </device>
 513
 514       <device Dname="ARMCM33_DSP_FP">
 515         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 516         <description>
 517           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 518         </description>
 519         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 520       </device>
 521
 522       <device Dname="ARMCM33_DSP_FP_TZ">
 523         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 524         <description>
 525           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 526         </description>
 527         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 528       </device>
 529     </family>
 530
 531     <!-- ******************************  Cortex-M35P  ****************************** -->
 532     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 533       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 534       <description>
 535 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 536 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 537       </description>
 538
 539       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 540       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 541       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 542       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 543       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 544       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 545
 546       <device Dname="ARMCM35P">
 547         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 548         <description>
 549           no DSP Instructions, no Floating Point Unit, no TrustZone
 550         </description>
 551         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 552       </device>
 553
 554       <device Dname="ARMCM35P_TZ">
 555         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 556         <description>
 557           no DSP Instructions, no Floating Point Unit, TrustZone
 558         </description>
 559         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 560       </device>
 561
 562       <device Dname="ARMCM35P_DSP_FP">
 563         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 564         <description>
 565           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 566         </description>
 567         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 568       </device>
 569
 570       <device Dname="ARMCM35P_DSP_FP_TZ">
 571         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 572         <description>
 573           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 574         </description>
 575         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 576       </device>
 577     </family>
 578
 579     <!-- ******************************  ARMSC000  ****************************** -->
 580     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 581       <description>
 582 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 583 - simple, easy-to-use programmers model
 584 - highly efficient ultra-low power operation
 585 - excellent code density
 586 - deterministic, high-performance interrupt handling
 587       </description>
 588       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 589       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 590       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 591       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 592
 593       <device Dname="ARMSC000">
 594         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 595         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 596       </device>
 597     </family>
 598
 599     <!-- ******************************  ARMSC300  ****************************** -->
 600     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 601       <description>
 602 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 603 - simple, easy-to-use programmers model
 604 - highly efficient ultra-low power operation
 605 - excellent code density
 606 - deterministic, high-performance interrupt handling
 607       </description>
 608       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 609       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 610       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 611       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 612
 613       <device Dname="ARMSC300">
 614         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 615         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 616       </device>
 617     </family>
 618
 619     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 620     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 621       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 622       <description>
 623 Armv8-M Baseline based device with TrustZone
 624       </description>
 625       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 626       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 627       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 628       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 629       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 630       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 631
 632       <device Dname="ARMv8MBL">
 633         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 634         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 635       </device>
 636     </family>
 637
 638     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 639     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 640       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 641       <description>
 642 Armv8-M Mainline based device with TrustZone
 643       </description>
 644       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 645       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 646       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 647       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 648       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 649       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 650
 651       <device Dname="ARMv8MML">
 652         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 653         <description>
 654           no DSP Instructions, no Floating Point Unit, TrustZone
 655         </description>
 656         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 657       </device>
 658
 659       <device Dname="ARMv8MML_DSP">
 660         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 661         <description>
 662           DSP Instructions, no Floating Point Unit, TrustZone
 663         </description>
 664         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 665       </device>
 666
 667       <device Dname="ARMv8MML_SP">
 668         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 669         <description>
 670           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 671         </description>
 672         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 673       </device>
 674
 675       <device Dname="ARMv8MML_DSP_SP">
 676         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 677         <description>
 678           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 679         </description>
 680         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 681       </device>
 682
 683       <device Dname="ARMv8MML_DP">
 684         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 685         <description>
 686           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 687         </description>
 688         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 689       </device>
 690
 691       <device Dname="ARMv8MML_DSP_DP">
 692         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 693         <description>
 694           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 695         </description>
 696         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 697       </device>
 698     </family>
 699
 700     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 701     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 702       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 703       <description>
 704 Armv8.1-M Mainline based device with TrustZone and MVE
 705       </description>
 706       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 707       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 708       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 709       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 710       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 711       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 712
 713
 714       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 715         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 716         <description>
 717           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 718         </description>
 719         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 720       </device>
 721     </family>
 722
 723     <!-- ******************************  Cortex-A5  ****************************** -->
 724     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 725       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 726       <description>
 727 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 728 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 729 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 730       </description>
 731
 732       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 733       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 734       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 735       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 736
 737       <device Dname="ARMCA5">
 738         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 739         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 740       </device>
 741     </family>
 742
 743     <!-- ******************************  Cortex-A7  ****************************** -->
 744     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 745       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 746       <description>
 747 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 748 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 749 an optional integrated GIC, and an optional L2 cache controller.
 750       </description>
 751
 752       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 753       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 754       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 755       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 756
 757       <device Dname="ARMCA7">
 758         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 759         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 760       </device>
 761     </family>
 762
 763     <!-- ******************************  Cortex-A9  ****************************** -->
 764     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 765       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 766       <description>
 767 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 768 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 769 and 8-bit Java bytecodes in Jazelle state.
 770       </description>
 771
 772       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 773       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 774       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 775       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 776
 777       <device Dname="ARMCA9">
 778         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 779         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 780       </device>
 781     </family>
 782   </devices>
 783
 784
 785   <apis>
 786     <!-- CMSIS Device API -->
 787     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 788       <description>Device interrupt controller interface</description>
 789       <files>
 790         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 791       </files>
 792     </api>
 793     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 794       <description>RTOS Kernel system tick timer interface</description>
 795       <files>
 796         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 797       </files>
 798     </api>
 799     <!-- CMSIS-RTOS API -->
 800     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 801       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 802       <files>
 803         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 804       </files>
 805     </api>
 806     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 807       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 808       <files>
 809         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 810         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 811       </files>
 812     </api>
 813     <!-- CMSIS Driver API -->
 814     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 815       <description>USART Driver API for Cortex-M</description>
 816       <files>
 817         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 818         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 819       </files>
 820     </api>
 821     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 822       <description>SPI Driver API for Cortex-M</description>
 823       <files>
 824         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 825         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 826       </files>
 827     </api>
 828     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 829       <description>SAI Driver API for Cortex-M</description>
 830       <files>
 831         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 832         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 833       </files>
 834     </api>
 835     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 836       <description>I2C Driver API for Cortex-M</description>
 837       <files>
 838         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 839         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 840       </files>
 841     </api>
 842     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 843       <description>CAN Driver API for Cortex-M</description>
 844       <files>
 845         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 846         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 847       </files>
 848     </api>
 849     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 850       <description>Flash Driver API for Cortex-M</description>
 851       <files>
 852         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 853         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 854       </files>
 855     </api>
 856     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 857       <description>MCI Driver API for Cortex-M</description>
 858       <files>
 859         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 860         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 861       </files>
 862     </api>
 863     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 864       <description>NAND Flash Driver API for Cortex-M</description>
 865       <files>
 866         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 867         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 868       </files>
 869     </api>
 870     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 871       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 872       <files>
 873         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 874         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 875         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 876       </files>
 877     </api>
 878     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 879       <description>Ethernet MAC Driver API for Cortex-M</description>
 880       <files>
 881         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 882         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 883       </files>
 884     </api>
 885     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 886       <description>Ethernet PHY Driver API for Cortex-M</description>
 887       <files>
 888         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 889         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 890       </files>
 891     </api>
 892     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 893       <description>USB Device Driver API for Cortex-M</description>
 894       <files>
 895         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 896         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 897       </files>
 898     </api>
 899     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 900       <description>USB Host Driver API for Cortex-M</description>
 901       <files>
 902         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 903         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 904       </files>
 905     </api>
 906     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.0.0" exclusive="0">
 907       <description>WiFi driver</description>
 908       <files>
 909         <file category="doc"  name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 910         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 911       </files>
 912     </api>
 913   </apis>
 914
 915   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 916   <conditions>
 917     <!-- compiler -->
 918     <condition id="ARMCC6">
 919       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 920       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 921     </condition>
 922     <condition id="ARMCC5">
 923       <require Tcompiler="ARMCC" Toptions="AC5"/>
 924     </condition>
 925     <condition id="ARMCC">
 926       <require Tcompiler="ARMCC"/>
 927     </condition>
 928     <condition id="GCC">
 929       <require Tcompiler="GCC"/>
 930     </condition>
 931     <condition id="IAR">
 932       <require Tcompiler="IAR"/>
 933     </condition>
 934     <condition id="ARMCC GCC">
 935       <accept Tcompiler="ARMCC"/>
 936       <accept Tcompiler="GCC"/>
 937     </condition>
 938     <condition id="ARMCC GCC IAR">
 939       <accept Tcompiler="ARMCC"/>
 940       <accept Tcompiler="GCC"/>
 941       <accept Tcompiler="IAR"/>
 942     </condition>
 943
 944     <!-- Arm architecture -->
 945     <condition id="ARMv6-M Device">
 946       <description>Armv6-M architecture based device</description>
 947       <accept Dcore="Cortex-M0"/>
 948       <accept Dcore="Cortex-M1"/>
 949       <accept Dcore="Cortex-M0+"/>
 950       <accept Dcore="SC000"/>
 951     </condition>
 952     <condition id="ARMv7-M Device">
 953       <description>Armv7-M architecture based device</description>
 954       <accept Dcore="Cortex-M3"/>
 955       <accept Dcore="Cortex-M4"/>
 956       <accept Dcore="Cortex-M7"/>
 957       <accept Dcore="SC300"/>
 958     </condition>
 959     <condition id="ARMv8-M Device">
 960       <description>Armv8-M architecture based device</description>
 961       <accept Dcore="ARMV8MBL"/>
 962       <accept Dcore="ARMV8MML"/>
 963       <accept Dcore="ARMV81MML"/>
 964       <accept Dcore="Cortex-M23"/>
 965       <accept Dcore="Cortex-M33"/>
 966       <accept Dcore="Cortex-M35P"/>
 967     </condition>
 968     <condition id="ARMv8-M TZ Device">
 969       <description>Armv8-M architecture based device with TrustZone</description>
 970       <require condition="ARMv8-M Device"/>
 971       <require Dtz="TZ"/>
 972     </condition>
 973     <condition id="ARMv6_7-M Device">
 974       <description>Armv6_7-M architecture based device</description>
 975       <accept condition="ARMv6-M Device"/>
 976       <accept condition="ARMv7-M Device"/>
 977     </condition>
 978     <condition id="ARMv6_7_8-M Device">
 979       <description>Armv6_7_8-M architecture based device</description>
 980       <accept condition="ARMv6-M Device"/>
 981       <accept condition="ARMv7-M Device"/>
 982       <accept condition="ARMv8-M Device"/>
 983     </condition>
 984     <condition id="ARMv7-A Device">
 985       <description>Armv7-A architecture based device</description>
 986       <accept Dcore="Cortex-A5"/>
 987       <accept Dcore="Cortex-A7"/>
 988       <accept Dcore="Cortex-A9"/>
 989     </condition>
 990
 991     <!-- ARM core -->
 992     <condition id="CM0">
 993       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 994       <accept Dcore="Cortex-M0"/>
 995       <accept Dcore="Cortex-M0+"/>
 996       <accept Dcore="SC000"/>
 997     </condition>
 998     <condition id="CM1">
 999       <description>Cortex-M1</description>
1000       <require Dcore="Cortex-M1"/>
1001     </condition>
1002     <condition id="CM3">
1003       <description>Cortex-M3 or SC300 processor based device</description>
1004       <accept Dcore="Cortex-M3"/>
1005       <accept Dcore="SC300"/>
1006     </condition>
1007     <condition id="CM4">
1008       <description>Cortex-M4 processor based device</description>
1009       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1010     </condition>
1011     <condition id="CM4_FP">
1012       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1013       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1014       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1015       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1016     </condition>
1017     <condition id="CM7">
1018       <description>Cortex-M7 processor based device</description>
1019       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1020     </condition>
1021     <condition id="CM7_FP">
1022       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1023       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1024       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1025     </condition>
1026     <condition id="CM7_SP">
1027       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1028       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1029     </condition>
1030     <condition id="CM7_DP">
1031       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1032       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1033     </condition>
1034     <condition id="CM23">
1035       <description>Cortex-M23 processor based device</description>
1036       <require Dcore="Cortex-M23"/>
1037     </condition>
1038     <condition id="CM33">
1039       <description>Cortex-M33 processor based device</description>
1040       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1041     </condition>
1042     <condition id="CM33_FP">
1043       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1044       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1045     </condition>
1046     <condition id="CM35P">
1047       <description>Cortex-M35P processor based device</description>
1048       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1049     </condition>
1050     <condition id="CM35P_FP">
1051       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1052       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1053     </condition>
1054     <condition id="ARMv8MBL">
1055       <description>Armv8-M Baseline processor based device</description>
1056       <require Dcore="ARMV8MBL"/>
1057     </condition>
1058     <condition id="ARMv8MML">
1059       <description>Armv8-M Mainline processor based device</description>
1060       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1061     </condition>
1062     <condition id="ARMv8MML_FP">
1063       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1064       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1065       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1066     </condition>
1067
1068     <condition id="CM33_NODSP_NOFPU">
1069       <description>CM33, no DSP, no FPU</description>
1070       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1071     </condition>
1072     <condition id="CM33_DSP_NOFPU">
1073       <description>CM33, DSP, no FPU</description>
1074       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1075     </condition>
1076     <condition id="CM33_NODSP_SP">
1077       <description>CM33, no DSP, SP FPU</description>
1078       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1079     </condition>
1080     <condition id="CM33_DSP_SP">
1081       <description>CM33, DSP, SP FPU</description>
1082       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1083     </condition>
1084
1085     <condition id="CM35P_NODSP_NOFPU">
1086       <description>CM35P, no DSP, no FPU</description>
1087       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1088     </condition>
1089     <condition id="CM35P_DSP_NOFPU">
1090       <description>CM35P, DSP, no FPU</description>
1091       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1092     </condition>
1093     <condition id="CM35P_NODSP_SP">
1094       <description>CM35P, no DSP, SP FPU</description>
1095       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1096     </condition>
1097     <condition id="CM35P_DSP_SP">
1098       <description>CM35P, DSP, SP FPU</description>
1099       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1100     </condition>
1101
1102     <condition id="ARMv8MML_NODSP_NOFPU">
1103       <description>Armv8-M Mainline, no DSP, no FPU</description>
1104       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1105     </condition>
1106     <condition id="ARMv8MML_DSP_NOFPU">
1107       <description>Armv8-M Mainline, DSP, no FPU</description>
1108       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1109     </condition>
1110     <condition id="ARMv8MML_NODSP_SP">
1111       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1112       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1113     </condition>
1114     <condition id="ARMv8MML_DSP_SP">
1115       <description>Armv8-M Mainline, DSP, SP FPU</description>
1116       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1117     </condition>
1118
1119     <condition id="ARMv81MML">
1120       <description>Armv8.1-M Mainline</description>
1121       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
1122     </condition>
1123
1124     <condition id="CA5_CA9">
1125       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1126       <accept Dcore="Cortex-A5"/>
1127       <accept Dcore="Cortex-A9"/>
1128     </condition>
1129
1130     <condition id="CA7">
1131       <description>Cortex-A7 processor based device</description>
1132       <accept Dcore="Cortex-A7"/>
1133     </condition>
1134
1135     <!-- ARMCC compiler -->
1136     <condition id="CA_ARMCC5">
1137       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1138       <require condition="ARMv7-A Device"/>
1139       <require condition="ARMCC5"/>
1140     </condition>
1141     <condition id="CA_ARMCC6">
1142       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1143       <require condition="ARMv7-A Device"/>
1144       <require condition="ARMCC6"/>
1145     </condition>
1146
1147     <condition id="CM0_ARMCC">
1148       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1149       <require condition="CM0"/>
1150       <require Tcompiler="ARMCC"/>
1151     </condition>
1152     <condition id="CM0_LE_ARMCC">
1153       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1154       <require condition="CM0_ARMCC"/>
1155       <require Dendian="Little-endian"/>
1156     </condition>
1157     <condition id="CM0_BE_ARMCC">
1158       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1159       <require condition="CM0_ARMCC"/>
1160       <require Dendian="Big-endian"/>
1161     </condition>
1162
1163     <condition id="CM1_ARMCC">
1164       <description>Cortex-M1 based device for the Arm Compiler</description>
1165       <require condition="CM1"/>
1166       <require Tcompiler="ARMCC"/>
1167     </condition>
1168     <condition id="CM1_LE_ARMCC">
1169       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1170       <require condition="CM1_ARMCC"/>
1171       <require Dendian="Little-endian"/>
1172     </condition>
1173     <condition id="CM1_BE_ARMCC">
1174       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1175       <require condition="CM1_ARMCC"/>
1176       <require Dendian="Big-endian"/>
1177     </condition>
1178
1179     <condition id="CM3_ARMCC">
1180       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1181       <require condition="CM3"/>
1182       <require Tcompiler="ARMCC"/>
1183     </condition>
1184     <condition id="CM3_LE_ARMCC">
1185       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1186       <require condition="CM3_ARMCC"/>
1187       <require Dendian="Little-endian"/>
1188     </condition>
1189     <condition id="CM3_BE_ARMCC">
1190       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1191       <require condition="CM3_ARMCC"/>
1192       <require Dendian="Big-endian"/>
1193     </condition>
1194
1195     <condition id="CM4_ARMCC">
1196       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1197       <require condition="CM4"/>
1198       <require Tcompiler="ARMCC"/>
1199     </condition>
1200     <condition id="CM4_LE_ARMCC">
1201       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1202       <require condition="CM4_ARMCC"/>
1203       <require Dendian="Little-endian"/>
1204     </condition>
1205     <condition id="CM4_BE_ARMCC">
1206       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1207       <require condition="CM4_ARMCC"/>
1208       <require Dendian="Big-endian"/>
1209     </condition>
1210
1211     <condition id="CM4_FP_ARMCC">
1212       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1213       <require condition="CM4_FP"/>
1214       <require Tcompiler="ARMCC"/>
1215     </condition>
1216     <condition id="CM4_FP_LE_ARMCC">
1217       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1218       <require condition="CM4_FP_ARMCC"/>
1219       <require Dendian="Little-endian"/>
1220     </condition>
1221     <condition id="CM4_FP_BE_ARMCC">
1222       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1223       <require condition="CM4_FP_ARMCC"/>
1224       <require Dendian="Big-endian"/>
1225     </condition>
1226
1227     <condition id="CM7_ARMCC">
1228       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1229       <require condition="CM7"/>
1230       <require Tcompiler="ARMCC"/>
1231     </condition>
1232     <condition id="CM7_LE_ARMCC">
1233       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1234       <require condition="CM7_ARMCC"/>
1235       <require Dendian="Little-endian"/>
1236     </condition>
1237     <condition id="CM7_BE_ARMCC">
1238       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1239       <require condition="CM7_ARMCC"/>
1240       <require Dendian="Big-endian"/>
1241     </condition>
1242
1243     <condition id="CM7_FP_ARMCC">
1244       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1245       <require condition="CM7_FP"/>
1246       <require Tcompiler="ARMCC"/>
1247     </condition>
1248     <condition id="CM7_FP_LE_ARMCC">
1249       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1250       <require condition="CM7_FP_ARMCC"/>
1251       <require Dendian="Little-endian"/>
1252     </condition>
1253     <condition id="CM7_FP_BE_ARMCC">
1254       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1255       <require condition="CM7_FP_ARMCC"/>
1256       <require Dendian="Big-endian"/>
1257     </condition>
1258
1259     <condition id="CM7_SP_ARMCC">
1260       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1261       <require condition="CM7_SP"/>
1262       <require Tcompiler="ARMCC"/>
1263     </condition>
1264     <condition id="CM7_SP_LE_ARMCC">
1265       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1266       <require condition="CM7_SP_ARMCC"/>
1267       <require Dendian="Little-endian"/>
1268     </condition>
1269     <condition id="CM7_SP_BE_ARMCC">
1270       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1271       <require condition="CM7_SP_ARMCC"/>
1272       <require Dendian="Big-endian"/>
1273     </condition>
1274
1275     <condition id="CM7_DP_ARMCC">
1276       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1277       <require condition="CM7_DP"/>
1278       <require Tcompiler="ARMCC"/>
1279     </condition>
1280     <condition id="CM7_DP_LE_ARMCC">
1281       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1282       <require condition="CM7_DP_ARMCC"/>
1283       <require Dendian="Little-endian"/>
1284     </condition>
1285     <condition id="CM7_DP_BE_ARMCC">
1286       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1287       <require condition="CM7_DP_ARMCC"/>
1288       <require Dendian="Big-endian"/>
1289     </condition>
1290
1291     <condition id="CM23_ARMCC">
1292       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1293       <require condition="CM23"/>
1294       <require Tcompiler="ARMCC"/>
1295     </condition>
1296     <condition id="CM23_LE_ARMCC">
1297       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1298       <require condition="CM23_ARMCC"/>
1299       <require Dendian="Little-endian"/>
1300     </condition>
1301     <condition id="CM23_BE_ARMCC">
1302       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1303       <require condition="CM23_ARMCC"/>
1304       <require Dendian="Big-endian"/>
1305     </condition>
1306
1307     <condition id="CM33_ARMCC">
1308       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1309       <require condition="CM33"/>
1310       <require Tcompiler="ARMCC"/>
1311     </condition>
1312     <condition id="CM33_LE_ARMCC">
1313       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1314       <require condition="CM33_ARMCC"/>
1315       <require Dendian="Little-endian"/>
1316     </condition>
1317     <condition id="CM33_BE_ARMCC">
1318       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1319       <require condition="CM33_ARMCC"/>
1320       <require Dendian="Big-endian"/>
1321     </condition>
1322
1323     <condition id="CM33_FP_ARMCC">
1324       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1325       <require condition="CM33_FP"/>
1326       <require Tcompiler="ARMCC"/>
1327     </condition>
1328     <condition id="CM33_FP_LE_ARMCC">
1329       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1330       <require condition="CM33_FP_ARMCC"/>
1331       <require Dendian="Little-endian"/>
1332     </condition>
1333     <condition id="CM33_FP_BE_ARMCC">
1334       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1335       <require condition="CM33_FP_ARMCC"/>
1336       <require Dendian="Big-endian"/>
1337     </condition>
1338
1339     <condition id="CM33_NODSP_NOFPU_ARMCC">
1340       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1341       <require condition="CM33_NODSP_NOFPU"/>
1342       <require Tcompiler="ARMCC"/>
1343     </condition>
1344     <condition id="CM33_DSP_NOFPU_ARMCC">
1345       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1346       <require condition="CM33_DSP_NOFPU"/>
1347       <require Tcompiler="ARMCC"/>
1348     </condition>
1349     <condition id="CM33_NODSP_SP_ARMCC">
1350       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1351       <require condition="CM33_NODSP_SP"/>
1352       <require Tcompiler="ARMCC"/>
1353     </condition>
1354     <condition id="CM33_DSP_SP_ARMCC">
1355       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1356       <require condition="CM33_DSP_SP"/>
1357       <require Tcompiler="ARMCC"/>
1358     </condition>
1359     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1360       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1361       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1362       <require Dendian="Little-endian"/>
1363     </condition>
1364     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1365       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1366       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1367       <require Dendian="Little-endian"/>
1368     </condition>
1369     <condition id="CM33_NODSP_SP_LE_ARMCC">
1370       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1371       <require condition="CM33_NODSP_SP_ARMCC"/>
1372       <require Dendian="Little-endian"/>
1373     </condition>
1374     <condition id="CM33_DSP_SP_LE_ARMCC">
1375       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1376       <require condition="CM33_DSP_SP_ARMCC"/>
1377       <require Dendian="Little-endian"/>
1378     </condition>
1379
1380     <condition id="CM35P_ARMCC">
1381       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1382       <require condition="CM35P"/>
1383       <require Tcompiler="ARMCC"/>
1384     </condition>
1385     <condition id="CM35P_LE_ARMCC">
1386       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1387       <require condition="CM35P_ARMCC"/>
1388       <require Dendian="Little-endian"/>
1389     </condition>
1390     <condition id="CM35P_BE_ARMCC">
1391       <description>Cortex-M35P processor based device in big endian mode for the Arm Compiler</description>
1392       <require condition="CM35P_ARMCC"/>
1393       <require Dendian="Big-endian"/>
1394     </condition>
1395
1396     <condition id="CM35P_FP_ARMCC">
1397       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1398       <require condition="CM35P_FP"/>
1399       <require Tcompiler="ARMCC"/>
1400     </condition>
1401     <condition id="CM35P_FP_LE_ARMCC">
1402       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1403       <require condition="CM35P_FP_ARMCC"/>
1404       <require Dendian="Little-endian"/>
1405     </condition>
1406     <condition id="CM35P_FP_BE_ARMCC">
1407       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1408       <require condition="CM35P_FP_ARMCC"/>
1409       <require Dendian="Big-endian"/>
1410     </condition>
1411
1412     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1413       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1414       <require condition="CM35P_NODSP_NOFPU"/>
1415       <require Tcompiler="ARMCC"/>
1416     </condition>
1417     <condition id="CM35P_DSP_NOFPU_ARMCC">
1418       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1419       <require condition="CM35P_DSP_NOFPU"/>
1420       <require Tcompiler="ARMCC"/>
1421     </condition>
1422     <condition id="CM35P_NODSP_SP_ARMCC">
1423       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1424       <require condition="CM35P_NODSP_SP"/>
1425       <require Tcompiler="ARMCC"/>
1426     </condition>
1427     <condition id="CM35P_DSP_SP_ARMCC">
1428       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1429       <require condition="CM35P_DSP_SP"/>
1430       <require Tcompiler="ARMCC"/>
1431     </condition>
1432     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1433       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1434       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1435       <require Dendian="Little-endian"/>
1436     </condition>
1437     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1438       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1439       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1440       <require Dendian="Little-endian"/>
1441     </condition>
1442     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1443       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1444       <require condition="CM35P_NODSP_SP_ARMCC"/>
1445       <require Dendian="Little-endian"/>
1446     </condition>
1447     <condition id="CM35P_DSP_SP_LE_ARMCC">
1448       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1449       <require condition="CM35P_DSP_SP_ARMCC"/>
1450       <require Dendian="Little-endian"/>
1451     </condition>
1452
1453     <condition id="ARMv8MBL_ARMCC">
1454       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1455       <require condition="ARMv8MBL"/>
1456       <require Tcompiler="ARMCC"/>
1457     </condition>
1458     <condition id="ARMv8MBL_LE_ARMCC">
1459       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1460       <require condition="ARMv8MBL_ARMCC"/>
1461       <require Dendian="Little-endian"/>
1462     </condition>
1463     <condition id="ARMv8MBL_BE_ARMCC">
1464       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1465       <require condition="ARMv8MBL_ARMCC"/>
1466       <require Dendian="Big-endian"/>
1467     </condition>
1468
1469     <condition id="ARMv8MML_ARMCC">
1470       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1471       <require condition="ARMv8MML"/>
1472       <require Tcompiler="ARMCC"/>
1473     </condition>
1474     <condition id="ARMv8MML_LE_ARMCC">
1475       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1476       <require condition="ARMv8MML_ARMCC"/>
1477       <require Dendian="Little-endian"/>
1478     </condition>
1479     <condition id="ARMv8MML_BE_ARMCC">
1480       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1481       <require condition="ARMv8MML_ARMCC"/>
1482       <require Dendian="Big-endian"/>
1483     </condition>
1484
1485     <condition id="ARMv8MML_FP_ARMCC">
1486       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1487       <require condition="ARMv8MML_FP"/>
1488       <require Tcompiler="ARMCC"/>
1489     </condition>
1490     <condition id="ARMv8MML_FP_LE_ARMCC">
1491       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1492       <require condition="ARMv8MML_FP_ARMCC"/>
1493       <require Dendian="Little-endian"/>
1494     </condition>
1495     <condition id="ARMv8MML_FP_BE_ARMCC">
1496       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1497       <require condition="ARMv8MML_FP_ARMCC"/>
1498       <require Dendian="Big-endian"/>
1499     </condition>
1500
1501     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1502       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1503       <require condition="ARMv8MML_NODSP_NOFPU"/>
1504       <require Tcompiler="ARMCC"/>
1505     </condition>
1506     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1507       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1508       <require condition="ARMv8MML_DSP_NOFPU"/>
1509       <require Tcompiler="ARMCC"/>
1510     </condition>
1511     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1512       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1513       <require condition="ARMv8MML_NODSP_SP"/>
1514       <require Tcompiler="ARMCC"/>
1515     </condition>
1516     <condition id="ARMv8MML_DSP_SP_ARMCC">
1517       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1518       <require condition="ARMv8MML_DSP_SP"/>
1519       <require Tcompiler="ARMCC"/>
1520     </condition>
1521     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1522       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1523       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1524       <require Dendian="Little-endian"/>
1525     </condition>
1526     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1527       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1528       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1529       <require Dendian="Little-endian"/>
1530     </condition>
1531     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1532       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1533       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1534       <require Dendian="Little-endian"/>
1535     </condition>
1536     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1537       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1538       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1539       <require Dendian="Little-endian"/>
1540     </condition>
1541
1542     <!-- GCC compiler -->
1543     <condition id="CA_GCC">
1544       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1545       <require condition="ARMv7-A Device"/>
1546       <require Tcompiler="GCC"/>
1547     </condition>
1548
1549     <condition id="CM0_GCC">
1550       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1551       <require condition="CM0"/>
1552       <require Tcompiler="GCC"/>
1553     </condition>
1554     <condition id="CM0_LE_GCC">
1555       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1556       <require condition="CM0_GCC"/>
1557       <require Dendian="Little-endian"/>
1558     </condition>
1559     <condition id="CM0_BE_GCC">
1560       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1561       <require condition="CM0_GCC"/>
1562       <require Dendian="Big-endian"/>
1563     </condition>
1564
1565     <condition id="CM1_GCC">
1566       <description>Cortex-M1 based device for the GCC Compiler</description>
1567       <require condition="CM1"/>
1568       <require Tcompiler="GCC"/>
1569     </condition>
1570     <condition id="CM1_LE_GCC">
1571       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1572       <require condition="CM1_GCC"/>
1573       <require Dendian="Little-endian"/>
1574     </condition>
1575     <condition id="CM1_BE_GCC">
1576       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1577       <require condition="CM1_GCC"/>
1578       <require Dendian="Big-endian"/>
1579     </condition>
1580
1581     <condition id="CM3_GCC">
1582       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1583       <require condition="CM3"/>
1584       <require Tcompiler="GCC"/>
1585     </condition>
1586     <condition id="CM3_LE_GCC">
1587       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1588       <require condition="CM3_GCC"/>
1589       <require Dendian="Little-endian"/>
1590     </condition>
1591     <condition id="CM3_BE_GCC">
1592       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1593       <require condition="CM3_GCC"/>
1594       <require Dendian="Big-endian"/>
1595     </condition>
1596
1597     <condition id="CM4_GCC">
1598       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1599       <require condition="CM4"/>
1600       <require Tcompiler="GCC"/>
1601     </condition>
1602     <condition id="CM4_LE_GCC">
1603       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1604       <require condition="CM4_GCC"/>
1605       <require Dendian="Little-endian"/>
1606     </condition>
1607     <condition id="CM4_BE_GCC">
1608       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1609       <require condition="CM4_GCC"/>
1610       <require Dendian="Big-endian"/>
1611     </condition>
1612
1613     <condition id="CM4_FP_GCC">
1614       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1615       <require condition="CM4_FP"/>
1616       <require Tcompiler="GCC"/>
1617     </condition>
1618     <condition id="CM4_FP_LE_GCC">
1619       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1620       <require condition="CM4_FP_GCC"/>
1621       <require Dendian="Little-endian"/>
1622     </condition>
1623     <condition id="CM4_FP_BE_GCC">
1624       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1625       <require condition="CM4_FP_GCC"/>
1626       <require Dendian="Big-endian"/>
1627     </condition>
1628
1629     <condition id="CM7_GCC">
1630       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1631       <require condition="CM7"/>
1632       <require Tcompiler="GCC"/>
1633     </condition>
1634     <condition id="CM7_LE_GCC">
1635       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1636       <require condition="CM7_GCC"/>
1637       <require Dendian="Little-endian"/>
1638     </condition>
1639     <condition id="CM7_BE_GCC">
1640       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1641       <require condition="CM7_GCC"/>
1642       <require Dendian="Big-endian"/>
1643     </condition>
1644
1645     <condition id="CM7_FP_GCC">
1646       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1647       <require condition="CM7_FP"/>
1648       <require Tcompiler="GCC"/>
1649     </condition>
1650     <condition id="CM7_FP_LE_GCC">
1651       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1652       <require condition="CM7_FP_GCC"/>
1653       <require Dendian="Little-endian"/>
1654     </condition>
1655     <condition id="CM7_FP_BE_GCC">
1656       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1657       <require condition="CM7_FP_GCC"/>
1658       <require Dendian="Big-endian"/>
1659     </condition>
1660
1661     <condition id="CM7_SP_GCC">
1662       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1663       <require condition="CM7_SP"/>
1664       <require Tcompiler="GCC"/>
1665     </condition>
1666     <condition id="CM7_SP_LE_GCC">
1667       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1668       <require condition="CM7_SP_GCC"/>
1669       <require Dendian="Little-endian"/>
1670     </condition>
1671     <condition id="CM7_SP_BE_GCC">
1672       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1673       <require condition="CM7_SP_GCC"/>
1674       <require Dendian="Big-endian"/>
1675     </condition>
1676
1677     <condition id="CM7_DP_GCC">
1678       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1679       <require condition="CM7_DP"/>
1680       <require Tcompiler="GCC"/>
1681     </condition>
1682     <condition id="CM7_DP_LE_GCC">
1683       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1684       <require condition="CM7_DP_GCC"/>
1685       <require Dendian="Little-endian"/>
1686     </condition>
1687     <condition id="CM7_DP_BE_GCC">
1688       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1689       <require condition="CM7_DP_GCC"/>
1690       <require Dendian="Big-endian"/>
1691     </condition>
1692
1693     <condition id="CM23_GCC">
1694       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1695       <require condition="CM23"/>
1696       <require Tcompiler="GCC"/>
1697     </condition>
1698     <condition id="CM23_LE_GCC">
1699       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1700       <require condition="CM23_GCC"/>
1701       <require Dendian="Little-endian"/>
1702     </condition>
1703     <condition id="CM23_BE_GCC">
1704       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1705       <require condition="CM23_GCC"/>
1706       <require Dendian="Big-endian"/>
1707     </condition>
1708
1709     <condition id="CM33_GCC">
1710       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1711       <require condition="CM33"/>
1712       <require Tcompiler="GCC"/>
1713     </condition>
1714     <condition id="CM33_LE_GCC">
1715       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1716       <require condition="CM33_GCC"/>
1717       <require Dendian="Little-endian"/>
1718     </condition>
1719     <condition id="CM33_BE_GCC">
1720       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1721       <require condition="CM33_GCC"/>
1722       <require Dendian="Big-endian"/>
1723     </condition>
1724
1725     <condition id="CM33_FP_GCC">
1726       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1727       <require condition="CM33_FP"/>
1728       <require Tcompiler="GCC"/>
1729     </condition>
1730     <condition id="CM33_FP_LE_GCC">
1731       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1732       <require condition="CM33_FP_GCC"/>
1733       <require Dendian="Little-endian"/>
1734     </condition>
1735     <condition id="CM33_FP_BE_GCC">
1736       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1737       <require condition="CM33_FP_GCC"/>
1738       <require Dendian="Big-endian"/>
1739     </condition>
1740
1741     <condition id="CM33_NODSP_NOFPU_GCC">
1742       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1743       <require condition="CM33_NODSP_NOFPU"/>
1744       <require Tcompiler="GCC"/>
1745     </condition>
1746     <condition id="CM33_DSP_NOFPU_GCC">
1747       <description>CM33, DSP, no FPU, GCC Compiler</description>
1748       <require condition="CM33_DSP_NOFPU"/>
1749       <require Tcompiler="GCC"/>
1750     </condition>
1751     <condition id="CM33_NODSP_SP_GCC">
1752       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1753       <require condition="CM33_NODSP_SP"/>
1754       <require Tcompiler="GCC"/>
1755     </condition>
1756     <condition id="CM33_DSP_SP_GCC">
1757       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1758       <require condition="CM33_DSP_SP"/>
1759       <require Tcompiler="GCC"/>
1760     </condition>
1761     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1762       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1763       <require condition="CM33_NODSP_NOFPU_GCC"/>
1764       <require Dendian="Little-endian"/>
1765     </condition>
1766     <condition id="CM33_DSP_NOFPU_LE_GCC">
1767       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1768       <require condition="CM33_DSP_NOFPU_GCC"/>
1769       <require Dendian="Little-endian"/>
1770     </condition>
1771     <condition id="CM33_NODSP_SP_LE_GCC">
1772       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1773       <require condition="CM33_NODSP_SP_GCC"/>
1774       <require Dendian="Little-endian"/>
1775     </condition>
1776     <condition id="CM33_DSP_SP_LE_GCC">
1777       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1778       <require condition="CM33_DSP_SP_GCC"/>
1779       <require Dendian="Little-endian"/>
1780     </condition>
1781
1782     <condition id="CM35P_GCC">
1783       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1784       <require condition="CM35P"/>
1785       <require Tcompiler="GCC"/>
1786     </condition>
1787     <condition id="CM35P_LE_GCC">
1788       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1789       <require condition="CM35P_GCC"/>
1790       <require Dendian="Little-endian"/>
1791     </condition>
1792     <condition id="CM35P_BE_GCC">
1793       <description>Cortex-M35P processor based device in big endian mode for the GCC Compiler</description>
1794       <require condition="CM35P_GCC"/>
1795       <require Dendian="Big-endian"/>
1796     </condition>
1797
1798     <condition id="CM35P_FP_GCC">
1799       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1800       <require condition="CM35P_FP"/>
1801       <require Tcompiler="GCC"/>
1802     </condition>
1803     <condition id="CM35P_FP_LE_GCC">
1804       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1805       <require condition="CM35P_FP_GCC"/>
1806       <require Dendian="Little-endian"/>
1807     </condition>
1808     <condition id="CM35P_FP_BE_GCC">
1809       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1810       <require condition="CM35P_FP_GCC"/>
1811       <require Dendian="Big-endian"/>
1812     </condition>
1813
1814     <condition id="CM35P_NODSP_NOFPU_GCC">
1815       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1816       <require condition="CM35P_NODSP_NOFPU"/>
1817       <require Tcompiler="GCC"/>
1818     </condition>
1819     <condition id="CM35P_DSP_NOFPU_GCC">
1820       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1821       <require condition="CM35P_DSP_NOFPU"/>
1822       <require Tcompiler="GCC"/>
1823     </condition>
1824     <condition id="CM35P_NODSP_SP_GCC">
1825       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1826       <require condition="CM35P_NODSP_SP"/>
1827       <require Tcompiler="GCC"/>
1828     </condition>
1829     <condition id="CM35P_DSP_SP_GCC">
1830       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1831       <require condition="CM35P_DSP_SP"/>
1832       <require Tcompiler="GCC"/>
1833     </condition>
1834     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1835       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1836       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1837       <require Dendian="Little-endian"/>
1838     </condition>
1839     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1840       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1841       <require condition="CM35P_DSP_NOFPU_GCC"/>
1842       <require Dendian="Little-endian"/>
1843     </condition>
1844     <condition id="CM35P_NODSP_SP_LE_GCC">
1845       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1846       <require condition="CM35P_NODSP_SP_GCC"/>
1847       <require Dendian="Little-endian"/>
1848     </condition>
1849     <condition id="CM35P_DSP_SP_LE_GCC">
1850       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1851       <require condition="CM35P_DSP_SP_GCC"/>
1852       <require Dendian="Little-endian"/>
1853     </condition>
1854
1855     <condition id="ARMv8MBL_GCC">
1856       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1857       <require condition="ARMv8MBL"/>
1858       <require Tcompiler="GCC"/>
1859     </condition>
1860     <condition id="ARMv8MBL_LE_GCC">
1861       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1862       <require condition="ARMv8MBL_GCC"/>
1863       <require Dendian="Little-endian"/>
1864     </condition>
1865     <condition id="ARMv8MBL_BE_GCC">
1866       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1867       <require condition="ARMv8MBL_GCC"/>
1868       <require Dendian="Big-endian"/>
1869     </condition>
1870
1871     <condition id="ARMv8MML_GCC">
1872       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1873       <require condition="ARMv8MML"/>
1874       <require Tcompiler="GCC"/>
1875     </condition>
1876     <condition id="ARMv8MML_LE_GCC">
1877       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1878       <require condition="ARMv8MML_GCC"/>
1879       <require Dendian="Little-endian"/>
1880     </condition>
1881     <condition id="ARMv8MML_BE_GCC">
1882       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1883       <require condition="ARMv8MML_GCC"/>
1884       <require Dendian="Big-endian"/>
1885     </condition>
1886
1887     <condition id="ARMv8MML_FP_GCC">
1888       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1889       <require condition="ARMv8MML_FP"/>
1890       <require Tcompiler="GCC"/>
1891     </condition>
1892     <condition id="ARMv8MML_FP_LE_GCC">
1893       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1894       <require condition="ARMv8MML_FP_GCC"/>
1895       <require Dendian="Little-endian"/>
1896     </condition>
1897     <condition id="ARMv8MML_FP_BE_GCC">
1898       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1899       <require condition="ARMv8MML_FP_GCC"/>
1900       <require Dendian="Big-endian"/>
1901     </condition>
1902
1903     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1904       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1905       <require condition="ARMv8MML_NODSP_NOFPU"/>
1906       <require Tcompiler="GCC"/>
1907     </condition>
1908     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1909       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1910       <require condition="ARMv8MML_DSP_NOFPU"/>
1911       <require Tcompiler="GCC"/>
1912     </condition>
1913     <condition id="ARMv8MML_NODSP_SP_GCC">
1914       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1915       <require condition="ARMv8MML_NODSP_SP"/>
1916       <require Tcompiler="GCC"/>
1917     </condition>
1918     <condition id="ARMv8MML_DSP_SP_GCC">
1919       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1920       <require condition="ARMv8MML_DSP_SP"/>
1921       <require Tcompiler="GCC"/>
1922     </condition>
1923     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1924       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1925       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1926       <require Dendian="Little-endian"/>
1927     </condition>
1928     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1929       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1930       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1931       <require Dendian="Little-endian"/>
1932     </condition>
1933     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1934       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1935       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1936       <require Dendian="Little-endian"/>
1937     </condition>
1938     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1939       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1940       <require condition="ARMv8MML_DSP_SP_GCC"/>
1941       <require Dendian="Little-endian"/>
1942     </condition>
1943
1944     <!-- IAR compiler -->
1945     <condition id="CA_IAR">
1946       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1947       <require condition="ARMv7-A Device"/>
1948       <require Tcompiler="IAR"/>
1949     </condition>
1950
1951     <condition id="CM0_IAR">
1952       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1953       <require condition="CM0"/>
1954       <require Tcompiler="IAR"/>
1955     </condition>
1956     <condition id="CM0_LE_IAR">
1957       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1958       <require condition="CM0_IAR"/>
1959       <require Dendian="Little-endian"/>
1960     </condition>
1961     <condition id="CM0_BE_IAR">
1962       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1963       <require condition="CM0_IAR"/>
1964       <require Dendian="Big-endian"/>
1965     </condition>
1966
1967     <condition id="CM1_IAR">
1968       <description>Cortex-M1 based device for the IAR Compiler</description>
1969       <require condition="CM1"/>
1970       <require Tcompiler="IAR"/>
1971     </condition>
1972     <condition id="CM1_LE_IAR">
1973       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1974       <require condition="CM1_IAR"/>
1975       <require Dendian="Little-endian"/>
1976     </condition>
1977     <condition id="CM1_BE_IAR">
1978       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1979       <require condition="CM1_IAR"/>
1980       <require Dendian="Big-endian"/>
1981     </condition>
1982
1983     <condition id="CM3_IAR">
1984       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1985       <require condition="CM3"/>
1986       <require Tcompiler="IAR"/>
1987     </condition>
1988     <condition id="CM3_LE_IAR">
1989       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1990       <require condition="CM3_IAR"/>
1991       <require Dendian="Little-endian"/>
1992     </condition>
1993     <condition id="CM3_BE_IAR">
1994       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1995       <require condition="CM3_IAR"/>
1996       <require Dendian="Big-endian"/>
1997     </condition>
1998
1999     <condition id="CM4_IAR">
2000       <description>Cortex-M4 processor based device for the IAR Compiler</description>
2001       <require condition="CM4"/>
2002       <require Tcompiler="IAR"/>
2003     </condition>
2004     <condition id="CM4_LE_IAR">
2005       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
2006       <require condition="CM4_IAR"/>
2007       <require Dendian="Little-endian"/>
2008     </condition>
2009     <condition id="CM4_BE_IAR">
2010       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
2011       <require condition="CM4_IAR"/>
2012       <require Dendian="Big-endian"/>
2013     </condition>
2014
2015     <condition id="CM4_FP_IAR">
2016       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
2017       <require condition="CM4_FP"/>
2018       <require Tcompiler="IAR"/>
2019     </condition>
2020     <condition id="CM4_FP_LE_IAR">
2021       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2022       <require condition="CM4_FP_IAR"/>
2023       <require Dendian="Little-endian"/>
2024     </condition>
2025     <condition id="CM4_FP_BE_IAR">
2026       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2027       <require condition="CM4_FP_IAR"/>
2028       <require Dendian="Big-endian"/>
2029     </condition>
2030
2031     <condition id="CM7_IAR">
2032       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2033       <require condition="CM7"/>
2034       <require Tcompiler="IAR"/>
2035     </condition>
2036     <condition id="CM7_LE_IAR">
2037       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2038       <require condition="CM7_IAR"/>
2039       <require Dendian="Little-endian"/>
2040     </condition>
2041     <condition id="CM7_BE_IAR">
2042       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2043       <require condition="CM7_IAR"/>
2044       <require Dendian="Big-endian"/>
2045     </condition>
2046
2047     <condition id="CM7_FP_IAR">
2048       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2049       <require condition="CM7_FP"/>
2050       <require Tcompiler="IAR"/>
2051     </condition>
2052     <condition id="CM7_FP_LE_IAR">
2053       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2054       <require condition="CM7_FP_IAR"/>
2055       <require Dendian="Little-endian"/>
2056     </condition>
2057     <condition id="CM7_FP_BE_IAR">
2058       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2059       <require condition="CM7_FP_IAR"/>
2060       <require Dendian="Big-endian"/>
2061     </condition>
2062
2063     <condition id="CM7_SP_IAR">
2064       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2065       <require condition="CM7_SP"/>
2066       <require Tcompiler="IAR"/>
2067     </condition>
2068     <condition id="CM7_SP_LE_IAR">
2069       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2070       <require condition="CM7_SP_IAR"/>
2071       <require Dendian="Little-endian"/>
2072     </condition>
2073     <condition id="CM7_SP_BE_IAR">
2074       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2075       <require condition="CM7_SP_IAR"/>
2076       <require Dendian="Big-endian"/>
2077     </condition>
2078
2079     <condition id="CM7_DP_IAR">
2080       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2081       <require condition="CM7_DP"/>
2082       <require Tcompiler="IAR"/>
2083     </condition>
2084     <condition id="CM7_DP_LE_IAR">
2085       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2086       <require condition="CM7_DP_IAR"/>
2087       <require Dendian="Little-endian"/>
2088     </condition>
2089     <condition id="CM7_DP_BE_IAR">
2090       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2091       <require condition="CM7_DP_IAR"/>
2092       <require Dendian="Big-endian"/>
2093     </condition>
2094
2095     <condition id="CM23_IAR">
2096       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2097       <require condition="CM23"/>
2098       <require Tcompiler="IAR"/>
2099     </condition>
2100     <condition id="CM23_LE_IAR">
2101       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2102       <require condition="CM23_IAR"/>
2103       <require Dendian="Little-endian"/>
2104     </condition>
2105     <condition id="CM23_BE_IAR">
2106       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
2107       <require condition="CM23_IAR"/>
2108       <require Dendian="Big-endian"/>
2109     </condition>
2110
2111     <condition id="CM33_IAR">
2112       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2113       <require condition="CM33"/>
2114       <require Tcompiler="IAR"/>
2115     </condition>
2116     <condition id="CM33_LE_IAR">
2117       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2118       <require condition="CM33_IAR"/>
2119       <require Dendian="Little-endian"/>
2120     </condition>
2121     <condition id="CM33_BE_IAR">
2122       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
2123       <require condition="CM33_IAR"/>
2124       <require Dendian="Big-endian"/>
2125     </condition>
2126
2127     <condition id="CM33_FP_IAR">
2128       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2129       <require condition="CM33_FP"/>
2130       <require Tcompiler="IAR"/>
2131     </condition>
2132     <condition id="CM33_FP_LE_IAR">
2133       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2134       <require condition="CM33_FP_IAR"/>
2135       <require Dendian="Little-endian"/>
2136     </condition>
2137     <condition id="CM33_FP_BE_IAR">
2138       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2139       <require condition="CM33_FP_IAR"/>
2140       <require Dendian="Big-endian"/>
2141     </condition>
2142
2143     <condition id="CM33_NODSP_NOFPU_IAR">
2144       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2145       <require condition="CM33_NODSP_NOFPU"/>
2146       <require Tcompiler="IAR"/>
2147     </condition>
2148     <condition id="CM33_DSP_NOFPU_IAR">
2149       <description>CM33, DSP, no FPU, IAR Compiler</description>
2150       <require condition="CM33_DSP_NOFPU"/>
2151       <require Tcompiler="IAR"/>
2152     </condition>
2153     <condition id="CM33_NODSP_SP_IAR">
2154       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2155       <require condition="CM33_NODSP_SP"/>
2156       <require Tcompiler="IAR"/>
2157     </condition>
2158     <condition id="CM33_DSP_SP_IAR">
2159       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2160       <require condition="CM33_DSP_SP"/>
2161       <require Tcompiler="IAR"/>
2162     </condition>
2163     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2164       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2165       <require condition="CM33_NODSP_NOFPU_IAR"/>
2166       <require Dendian="Little-endian"/>
2167     </condition>
2168     <condition id="CM33_DSP_NOFPU_LE_IAR">
2169       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2170       <require condition="CM33_DSP_NOFPU_IAR"/>
2171       <require Dendian="Little-endian"/>
2172     </condition>
2173     <condition id="CM33_NODSP_SP_LE_IAR">
2174       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2175       <require condition="CM33_NODSP_SP_IAR"/>
2176       <require Dendian="Little-endian"/>
2177     </condition>
2178     <condition id="CM33_DSP_SP_LE_IAR">
2179       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2180       <require condition="CM33_DSP_SP_IAR"/>
2181       <require Dendian="Little-endian"/>
2182     </condition>
2183
2184     <condition id="CM35P_IAR">
2185       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2186       <require condition="CM35P"/>
2187       <require Tcompiler="IAR"/>
2188     </condition>
2189     <condition id="CM35P_LE_IAR">
2190       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2191       <require condition="CM35P_IAR"/>
2192       <require Dendian="Little-endian"/>
2193     </condition>
2194     <condition id="CM35P_BE_IAR">
2195       <description>Cortex-M35P processor based device in big endian mode for the IAR Compiler</description>
2196       <require condition="CM35P_IAR"/>
2197       <require Dendian="Big-endian"/>
2198     </condition>
2199
2200     <condition id="CM35P_FP_IAR">
2201       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2202       <require condition="CM35P_FP"/>
2203       <require Tcompiler="IAR"/>
2204     </condition>
2205     <condition id="CM35P_FP_LE_IAR">
2206       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2207       <require condition="CM35P_FP_IAR"/>
2208       <require Dendian="Little-endian"/>
2209     </condition>
2210     <condition id="CM35P_FP_BE_IAR">
2211       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2212       <require condition="CM35P_FP_IAR"/>
2213       <require Dendian="Big-endian"/>
2214     </condition>
2215
2216     <condition id="CM35P_NODSP_NOFPU_IAR">
2217       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2218       <require condition="CM35P_NODSP_NOFPU"/>
2219       <require Tcompiler="IAR"/>
2220     </condition>
2221     <condition id="CM35P_DSP_NOFPU_IAR">
2222       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2223       <require condition="CM35P_DSP_NOFPU"/>
2224       <require Tcompiler="IAR"/>
2225     </condition>
2226     <condition id="CM35P_NODSP_SP_IAR">
2227       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2228       <require condition="CM35P_NODSP_SP"/>
2229       <require Tcompiler="IAR"/>
2230     </condition>
2231     <condition id="CM35P_DSP_SP_IAR">
2232       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2233       <require condition="CM35P_DSP_SP"/>
2234       <require Tcompiler="IAR"/>
2235     </condition>
2236     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2237       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2238       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2239       <require Dendian="Little-endian"/>
2240     </condition>
2241     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2242       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2243       <require condition="CM35P_DSP_NOFPU_IAR"/>
2244       <require Dendian="Little-endian"/>
2245     </condition>
2246     <condition id="CM35P_NODSP_SP_LE_IAR">
2247       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2248       <require condition="CM35P_NODSP_SP_IAR"/>
2249       <require Dendian="Little-endian"/>
2250     </condition>
2251     <condition id="CM35P_DSP_SP_LE_IAR">
2252       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2253       <require condition="CM35P_DSP_SP_IAR"/>
2254       <require Dendian="Little-endian"/>
2255     </condition>
2256
2257     <condition id="ARMv8MBL_IAR">
2258       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2259       <require condition="ARMv8MBL"/>
2260       <require Tcompiler="IAR"/>
2261     </condition>
2262     <condition id="ARMv8MBL_LE_IAR">
2263       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2264       <require condition="ARMv8MBL_IAR"/>
2265       <require Dendian="Little-endian"/>
2266     </condition>
2267     <condition id="ARMv8MBL_BE_IAR">
2268       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
2269       <require condition="ARMv8MBL_IAR"/>
2270       <require Dendian="Big-endian"/>
2271     </condition>
2272
2273     <condition id="ARMv8MML_IAR">
2274       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2275       <require condition="ARMv8MML"/>
2276       <require Tcompiler="IAR"/>
2277     </condition>
2278     <condition id="ARMv8MML_LE_IAR">
2279       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2280       <require condition="ARMv8MML_IAR"/>
2281       <require Dendian="Little-endian"/>
2282     </condition>
2283     <condition id="ARMv8MML_BE_IAR">
2284       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
2285       <require condition="ARMv8MML_IAR"/>
2286       <require Dendian="Big-endian"/>
2287     </condition>
2288
2289     <condition id="ARMv8MML_FP_IAR">
2290       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2291       <require condition="ARMv8MML_FP"/>
2292       <require Tcompiler="IAR"/>
2293     </condition>
2294     <condition id="ARMv8MML_FP_LE_IAR">
2295       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2296       <require condition="ARMv8MML_FP_IAR"/>
2297       <require Dendian="Little-endian"/>
2298     </condition>
2299     <condition id="ARMv8MML_FP_BE_IAR">
2300       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2301       <require condition="ARMv8MML_FP_IAR"/>
2302       <require Dendian="Big-endian"/>
2303     </condition>
2304
2305     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2306       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2307       <require condition="ARMv8MML_NODSP_NOFPU"/>
2308       <require Tcompiler="IAR"/>
2309     </condition>
2310     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2311       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2312       <require condition="ARMv8MML_DSP_NOFPU"/>
2313       <require Tcompiler="IAR"/>
2314     </condition>
2315     <condition id="ARMv8MML_NODSP_SP_IAR">
2316       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2317       <require condition="ARMv8MML_NODSP_SP"/>
2318       <require Tcompiler="IAR"/>
2319     </condition>
2320     <condition id="ARMv8MML_DSP_SP_IAR">
2321       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2322       <require condition="ARMv8MML_DSP_SP"/>
2323       <require Tcompiler="IAR"/>
2324     </condition>
2325     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2326       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2327       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2328       <require Dendian="Little-endian"/>
2329     </condition>
2330     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2331       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2332       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2333       <require Dendian="Little-endian"/>
2334     </condition>
2335     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2336       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2337       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2338       <require Dendian="Little-endian"/>
2339     </condition>
2340     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2341       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2342       <require condition="ARMv8MML_DSP_SP_IAR"/>
2343       <require Dendian="Little-endian"/>
2344     </condition>
2345
2346     <!-- conditions selecting single devices and CMSIS Core -->
2347     <!-- used for component startup, GCC version is used for C-Startup -->
2348     <condition id="ARMCM0 CMSIS">
2349       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2350       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2351       <require Cclass="CMSIS" Cgroup="CORE"/>
2352     </condition>
2353     <condition id="ARMCM0 CMSIS GCC">
2354       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
2355       <require condition="ARMCM0 CMSIS"/>
2356       <require condition="GCC"/>
2357     </condition>
2358
2359     <condition id="ARMCM0+ CMSIS">
2360       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2361       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2362       <require Cclass="CMSIS" Cgroup="CORE"/>
2363     </condition>
2364     <condition id="ARMCM0+ CMSIS GCC">
2365       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
2366       <require condition="ARMCM0+ CMSIS"/>
2367       <require condition="GCC"/>
2368     </condition>
2369
2370     <condition id="ARMCM1 CMSIS">
2371       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2372       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2373       <require Cclass="CMSIS" Cgroup="CORE"/>
2374     </condition>
2375     <condition id="ARMCM1 CMSIS GCC">
2376       <description>Generic ARM Cortex-M1 device startup and depends on CMSIS Core requiring GCC</description>
2377       <require condition="ARMCM1 CMSIS"/>
2378       <require condition="GCC"/>
2379     </condition>
2380
2381     <condition id="ARMCM3 CMSIS">
2382       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2383       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2384       <require Cclass="CMSIS" Cgroup="CORE"/>
2385     </condition>
2386     <condition id="ARMCM3 CMSIS GCC">
2387       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
2388       <require condition="ARMCM3 CMSIS"/>
2389       <require condition="GCC"/>
2390     </condition>
2391
2392     <condition id="ARMCM4 CMSIS">
2393       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2394       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2395       <require Cclass="CMSIS" Cgroup="CORE"/>
2396     </condition>
2397     <condition id="ARMCM4 CMSIS GCC">
2398       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
2399       <require condition="ARMCM4 CMSIS"/>
2400       <require condition="GCC"/>
2401     </condition>
2402
2403     <condition id="ARMCM7 CMSIS">
2404       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2405       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2406       <require Cclass="CMSIS" Cgroup="CORE"/>
2407     </condition>
2408     <condition id="ARMCM7 CMSIS GCC">
2409       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
2410       <require condition="ARMCM7 CMSIS"/>
2411       <require condition="GCC"/>
2412     </condition>
2413
2414     <condition id="ARMCM23 CMSIS">
2415       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2416       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2417       <require Cclass="CMSIS" Cgroup="CORE"/>
2418     </condition>
2419     <condition id="ARMCM23 CMSIS GCC">
2420       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
2421       <require condition="ARMCM23 CMSIS"/>
2422       <require condition="GCC"/>
2423     </condition>
2424
2425     <condition id="ARMCM33 CMSIS">
2426       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2427       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2428       <require Cclass="CMSIS" Cgroup="CORE"/>
2429     </condition>
2430     <condition id="ARMCM33 CMSIS GCC">
2431       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
2432       <require condition="ARMCM33 CMSIS"/>
2433       <require condition="GCC"/>
2434     </condition>
2435
2436     <condition id="ARMCM35P CMSIS">
2437       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2438       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2439       <require Cclass="CMSIS" Cgroup="CORE"/>
2440     </condition>
2441     <condition id="ARMCM35P CMSIS GCC">
2442       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core requiring GCC</description>
2443       <require condition="ARMCM35P CMSIS"/>
2444       <require condition="GCC"/>
2445     </condition>
2446
2447     <condition id="ARMSC000 CMSIS">
2448       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2449       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2450       <require Cclass="CMSIS" Cgroup="CORE"/>
2451     </condition>
2452     <condition id="ARMSC000 CMSIS GCC">
2453       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
2454       <require condition="ARMSC000 CMSIS"/>
2455       <require condition="GCC"/>
2456     </condition>
2457
2458     <condition id="ARMSC300 CMSIS">
2459       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2460       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2461       <require Cclass="CMSIS" Cgroup="CORE"/>
2462     </condition>
2463     <condition id="ARMSC300 CMSIS GCC">
2464       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
2465       <require condition="ARMSC300 CMSIS"/>
2466       <require condition="GCC"/>
2467     </condition>
2468
2469     <condition id="ARMv8MBL CMSIS">
2470       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2471       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2472       <require Cclass="CMSIS" Cgroup="CORE"/>
2473     </condition>
2474     <condition id="ARMv8MBL CMSIS GCC">
2475       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
2476       <require condition="ARMv8MBL CMSIS"/>
2477       <require condition="GCC"/>
2478     </condition>
2479
2480     <condition id="ARMv8MML CMSIS">
2481       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2482       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2483       <require Cclass="CMSIS" Cgroup="CORE"/>
2484     </condition>
2485     <condition id="ARMv8MML CMSIS GCC">
2486       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2487       <require condition="ARMv8MML CMSIS"/>
2488       <require condition="GCC"/>
2489     </condition>
2490
2491     <condition id="ARMv81MML CMSIS">
2492       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2493       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2494       <require Cclass="CMSIS" Cgroup="CORE"/>
2495     </condition>
2496     <condition id="ARMv81MML CMSIS GCC">
2497       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2498       <require condition="ARMv81MML CMSIS"/>
2499       <require condition="GCC"/>
2500     </condition>
2501
2502     <condition id="ARMCA5 CMSIS">
2503       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2504       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2505       <require Cclass="CMSIS" Cgroup="CORE"/>
2506     </condition>
2507
2508     <condition id="ARMCA7 CMSIS">
2509       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2510       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2511       <require Cclass="CMSIS" Cgroup="CORE"/>
2512     </condition>
2513
2514     <condition id="ARMCA9 CMSIS">
2515       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2516       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2517       <require Cclass="CMSIS" Cgroup="CORE"/>
2518     </condition>
2519
2520     <!-- CMSIS DSP -->
2521     <condition id="CMSIS DSP">
2522       <description>Components required for DSP</description>
2523       <require condition="ARMv6_7_8-M Device"/>
2524       <require condition="ARMCC GCC IAR"/>
2525       <require Cclass="CMSIS" Cgroup="CORE"/>
2526     </condition>
2527
2528     <!-- CMSIS NN -->
2529     <condition id="CMSIS NN">
2530       <description>Components required for NN</description>
2531       <require condition="CMSIS DSP"/>
2532     </condition>
2533
2534     <!-- RTOS RTX -->
2535     <condition id="RTOS RTX">
2536       <description>Components required for RTOS RTX</description>
2537       <require condition="ARMv6_7-M Device"/>
2538       <require condition="ARMCC GCC IAR"/>
2539       <require Cclass="Device" Cgroup="Startup"/>
2540       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2541     </condition>
2542     <condition id="RTOS RTX IFX">
2543       <description>Components required for RTOS RTX IFX</description>
2544       <require condition="ARMv6_7-M Device"/>
2545       <require condition="ARMCC GCC IAR"/>
2546       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2547       <require Cclass="Device" Cgroup="Startup"/>
2548       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2549     </condition>
2550     <condition id="RTOS RTX5">
2551       <description>Components required for RTOS RTX5</description>
2552       <require condition="ARMv6_7_8-M Device"/>
2553       <require condition="ARMCC GCC IAR"/>
2554       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2555     </condition>
2556     <condition id="RTOS2 RTX5">
2557       <description>Components required for RTOS2 RTX5</description>
2558       <require condition="ARMv6_7_8-M Device"/>
2559       <require condition="ARMCC GCC IAR"/>
2560       <require Cclass="CMSIS"  Cgroup="CORE"/>
2561       <require Cclass="Device" Cgroup="Startup"/>
2562     </condition>
2563     <condition id="RTOS2 RTX5 v7-A">
2564       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2565       <require condition="ARMv7-A Device"/>
2566       <require condition="ARMCC GCC IAR"/>
2567       <require Cclass="CMSIS"  Cgroup="CORE"/>
2568       <require Cclass="Device" Cgroup="Startup"/>
2569       <require Cclass="Device" Cgroup="OS Tick"/>
2570       <require Cclass="Device" Cgroup="IRQ Controller"/>
2571     </condition>
2572     <condition id="RTOS2 RTX5 Lib">
2573       <description>Components required for RTOS2 RTX5 Library</description>
2574       <require condition="ARMv6_7_8-M Device"/>
2575       <require condition="ARMCC GCC IAR"/>
2576       <require Cclass="CMSIS"  Cgroup="CORE"/>
2577       <require Cclass="Device" Cgroup="Startup"/>
2578     </condition>
2579     <condition id="RTOS2 RTX5 NS">
2580       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2581       <require condition="ARMv8-M TZ Device"/>
2582       <require condition="ARMCC GCC IAR"/>
2583       <require Cclass="CMSIS"  Cgroup="CORE"/>
2584       <require Cclass="Device" Cgroup="Startup"/>
2585     </condition>
2586
2587     <!-- OS Tick -->
2588     <condition id="OS Tick PTIM">
2589       <description>Components required for OS Tick Private Timer</description>
2590       <require condition="CA5_CA9"/>
2591       <require Cclass="Device" Cgroup="IRQ Controller"/>
2592     </condition>
2593
2594     <condition id="OS Tick GTIM">
2595       <description>Components required for OS Tick Generic Physical Timer</description>
2596       <require condition="CA7"/>
2597       <require Cclass="Device" Cgroup="IRQ Controller"/>
2598     </condition>
2599
2600   </conditions>
2601
2602   <components>
2603     <!-- CMSIS-Core component -->
2604     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.3.0"  condition="ARMv6_7_8-M Device" >
2605       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2606       <files>
2607         <!-- CPU independent -->
2608         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2609         <file category="include" name="CMSIS/Core/Include/"/>
2610         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2611         <!-- Code template -->
2612         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2613         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2614       </files>
2615     </component>
2616
2617     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.4"  condition="ARMv7-A Device" >
2618       <description>CMSIS-CORE for Cortex-A</description>
2619       <files>
2620         <!-- CPU independent -->
2621         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2622         <file category="include" name="CMSIS/Core_A/Include/"/>
2623       </files>
2624     </component>
2625
2626     <!-- CMSIS-Startup components -->
2627     <!-- Cortex-M0 -->
2628     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM0 CMSIS">
2629       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2630       <files>
2631         <!-- include folder / device header file -->
2632         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2633         <!-- startup / system file -->
2634         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.0" attr="config"/>
2635         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2636         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2637         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2638         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2639       </files>
2640     </component>
2641     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM0 CMSIS">
2642       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2643       <files>
2644         <!-- include folder / device header file -->
2645         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2646         <!-- startup / system file -->
2647         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2648         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.0.0" attr="config" condition="GCC"/>
2649         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2650         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2651         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2652       </files>
2653     </component>
2654
2655     <!-- Cortex-M0+ -->
2656     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM0+ CMSIS">
2657       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2658       <files>
2659         <!-- include folder / device header file -->
2660         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2661         <!-- startup / system file -->
2662         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.0" attr="config"/>
2663         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2664         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2665         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2666         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2667       </files>
2668     </component>
2669     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM0+ CMSIS">
2670       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2671       <files>
2672         <!-- include folder / device header file -->
2673         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2674         <!-- startup / system file -->
2675         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2676         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.0.0" attr="config" condition="GCC"/>
2677         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2678         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2679         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2680       </files>
2681     </component>
2682
2683     <!-- Cortex-M1 -->
2684     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM1 CMSIS">
2685       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2686       <files>
2687         <!-- include folder / device header file -->
2688         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2689         <!-- startup / system file -->
2690         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.0" attr="config"/>
2691         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2692         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2693         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2694         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2695       </files>
2696     </component>
2697     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM1 CMSIS">
2698       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2699       <files>
2700         <!-- include folder / device header file -->
2701         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2702         <!-- startup / system file -->
2703         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.0" attr="config" condition="ARMCC"/>
2704         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.0.0" attr="config" condition="GCC"/>
2705         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2706         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2707         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2708       </files>
2709     </component>
2710
2711     <!-- Cortex-M3 -->
2712     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM3 CMSIS">
2713       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2714       <files>
2715         <!-- include folder / device header file -->
2716         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2717         <!-- startup / system file -->
2718         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.0" attr="config"/>
2719         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2720         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2721         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2722         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2723       </files>
2724     </component>
2725     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM3 CMSIS">
2726       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2727       <files>
2728         <!-- include folder / device header file -->
2729         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2730         <!-- startup / system file -->
2731         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2732         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.0.0" attr="config" condition="GCC"/>
2733         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2734         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2735         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2736       </files>
2737     </component>
2738
2739     <!-- Cortex-M4 -->
2740     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM4 CMSIS">
2741       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2742       <files>
2743         <!-- include folder / device header file -->
2744         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2745         <!-- startup / system file -->
2746         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.0" attr="config"/>
2747         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2748         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2749         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2750        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2751       </files>
2752     </component>
2753     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM4 CMSIS">
2754       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2755       <files>
2756         <!-- include folder / device header file -->
2757         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2758         <!-- startup / system file -->
2759         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2760         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.0.0" attr="config" condition="GCC"/>
2761         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2762         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2763         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2764       </files>
2765     </component>
2766
2767     <!-- Cortex-M7 -->
2768     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM7 CMSIS">
2769       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2770       <files>
2771         <!-- include folder / device header file -->
2772         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2773         <!-- startup / system file -->
2774         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.0" attr="config"/>
2775         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2776         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2777         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2778         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2779       </files>
2780     </component>
2781     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM7 CMSIS">
2782       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2783       <files>
2784         <!-- include folder / device header file -->
2785         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2786         <!-- startup / system file -->
2787         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2788         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.0.0" attr="config" condition="GCC"/>
2789         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2790         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2791         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2792       </files>
2793     </component>
2794
2795     <!-- Cortex-M23 -->
2796     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM23 CMSIS">
2797       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2798       <files>
2799         <!-- include folder / device header file -->
2800         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2801         <!-- startup / system file -->
2802         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.0" attr="config"/>
2803         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
2804         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2805         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.0" attr="config"/>
2806         <!-- SAU configuration -->
2807         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2808       </files>
2809     </component>
2810     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM23 CMSIS">
2811       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2812       <files>
2813         <!-- include folder / device header file -->
2814         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2815         <!-- startup / system file -->
2816         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2817         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.0.0" attr="config" condition="GCC"/>
2818         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.0.0" attr="config" condition="GCC"/>
2819         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2820         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2821         <!-- SAU configuration -->
2822         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2823       </files>
2824     </component>
2825
2826     <!-- Cortex-M33 -->
2827     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM33 CMSIS">
2828       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2829       <files>
2830         <!-- include folder / device header file -->
2831         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2832         <!-- startup / system file -->
2833         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.0" attr="config"/>
2834         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2835         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2836         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2837         <!-- SAU configuration -->
2838         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2839       </files>
2840     </component>
2841     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM33 CMSIS">
2842       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2843       <files>
2844         <!-- include folder / device header file -->
2845         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2846         <!-- startup / system file -->
2847         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2848         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.0.0" attr="config" condition="GCC"/>
2849         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2850         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2851         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2852         <!-- SAU configuration -->
2853         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2854       </files>
2855     </component>
2856
2857     <!-- Cortex-M35P -->
2858     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMCM35P CMSIS">
2859       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2860       <files>
2861         <!-- include folder / device header file -->
2862         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2863         <!-- startup / system file -->
2864         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.0" attr="config"/>
2865         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2866         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2867         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2868         <!-- SAU configuration -->
2869         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2870       </files>
2871     </component>
2872     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM35P CMSIS">
2873       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2874       <files>
2875         <!-- include folder / device header file -->
2876         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2877         <!-- startup / system file -->
2878         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2879         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.0" attr="config" condition="GCC"/>
2880         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2881         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
2882         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2883         <!-- SAU configuration -->
2884         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2885       </files>
2886     </component>
2887
2888     <!-- Cortex-SC000 -->
2889     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMSC000 CMSIS">
2890       <description>System and Startup for Generic Arm SC000 device</description>
2891       <files>
2892         <!-- include folder / device header file -->
2893         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2894         <!-- startup / system file -->
2895         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.0" attr="config"/>
2896         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2897         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2898         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2899         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2900       </files>
2901     </component>
2902     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMSC000 CMSIS">
2903       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2904       <files>
2905         <!-- include folder / device header file -->
2906         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2907         <!-- startup / system file -->
2908         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2909         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.0.0" attr="config" condition="GCC"/>
2910         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2911         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2912         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2913       </files>
2914     </component>
2915
2916     <!-- Cortex-SC300 -->
2917     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMSC300 CMSIS">
2918       <description>System and Startup for Generic Arm SC300 device</description>
2919       <files>
2920         <!-- include folder / device header file -->
2921         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2922         <!-- startup / system file -->
2923         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.0" attr="config"/>
2924         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2925         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2926         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2927         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2928       </files>
2929     </component>
2930     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMSC300 CMSIS">
2931       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2932       <files>
2933         <!-- include folder / device header file -->
2934         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2935         <!-- startup / system file -->
2936         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2937         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.0.0" attr="config" condition="GCC"/>
2938         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2939         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2940         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2941       </files>
2942     </component>
2943
2944     <!-- ARMv8MBL -->
2945     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMv8MBL CMSIS">
2946       <description>System and Startup for Generic Armv8-M Baseline device</description>
2947       <files>
2948         <!-- include folder / device header file -->
2949         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2950         <!-- startup / system file -->
2951         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.0" attr="config"/>
2952         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
2953         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2954         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.0" attr="config"/>
2955         <!-- SAU configuration -->
2956         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2957       </files>
2958     </component>
2959     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MBL CMSIS">
2960       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2961       <files>
2962         <!-- include folder / device header file -->
2963         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2964         <!-- startup / system file -->
2965         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2966         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.0.0" attr="config" condition="GCC"/>
2967         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2968         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2969         <!-- SAU configuration -->
2970         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2971       </files>
2972     </component>
2973
2974     <!-- ARMv8MML -->
2975     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMv8MML CMSIS">
2976       <description>System and Startup for Generic Armv8-M Mainline device</description>
2977       <files>
2978         <!-- include folder / device header file -->
2979         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2980         <!-- startup / system file -->
2981         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.0" attr="config"/>
2982         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2983         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2984         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2985         <!-- SAU configuration -->
2986         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2987       </files>
2988     </component>
2989     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMv8MML CMSIS">
2990       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2991       <files>
2992         <!-- include folder / device header file -->
2993         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2994         <!-- startup / system file -->
2995         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2996         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.0.0" attr="config" condition="GCC"/>
2997         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2998         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2999         <!-- SAU configuration -->
3000         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
3001       </files>
3002     </component>
3003
3004     <!-- ARMv81MML -->
3005     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.0" condition="ARMv81MML CMSIS">
3006       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
3007       <files>
3008         <!-- include folder / device header file -->
3009         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
3010         <!-- startup / system file -->
3011         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.0" attr="config"/>
3012         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"               version="1.0.0" attr="config" condition="ARMCC6"/>
3013         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.0.0" attr="config" condition="GCC"/>
3014         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.0.0" attr="config"/>
3015         <!-- SAU configuration -->
3016         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
3017       </files>
3018     </component>
3019
3020     <!-- Cortex-A5 -->
3021     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
3022       <description>System and Startup for Generic Arm Cortex-A5 device</description>
3023       <files>
3024         <!-- include folder / device header file -->
3025         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
3026         <!-- startup / system / mmu files -->
3027         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3028         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3029         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3030         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3031         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
3032         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
3033         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
3034         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
3035         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
3036         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
3037         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
3038         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.0.0" attr="config"/>
3039
3040       </files>
3041     </component>
3042
3043     <!-- Cortex-A7 -->
3044     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
3045       <description>System and Startup for Generic Arm Cortex-A7 device</description>
3046       <files>
3047         <!-- include folder / device header file -->
3048         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
3049         <!-- startup / system / mmu files -->
3050         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3051         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3052         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3053         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3054         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
3055         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
3056         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
3057         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
3058         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
3059         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
3060         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
3061         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.0.0" attr="config"/>
3062       </files>
3063     </component>
3064
3065     <!-- Cortex-A9 -->
3066     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
3067       <description>System and Startup for Generic Arm Cortex-A9 device</description>
3068       <files>
3069         <!-- include folder / device header file -->
3070         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3071         <!-- startup / system / mmu files -->
3072         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3073         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3074         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3075         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3076         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3077         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3078         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3079         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3080         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
3081         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
3082         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
3083         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.0.0" attr="config"/>
3084       </files>
3085     </component>
3086
3087     <!-- IRQ Controller -->
3088     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3089       <description>IRQ Controller implementation using GIC</description>
3090       <files>
3091         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3092       </files>
3093     </component>
3094
3095     <!-- OS Tick -->
3096     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3097       <description>OS Tick implementation using Private Timer</description>
3098       <files>
3099         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3100       </files>
3101     </component>
3102
3103     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3104       <description>OS Tick implementation using Generic Physical Timer</description>
3105       <files>
3106         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3107       </files>
3108     </component>
3109
3110     <!-- CMSIS-DSP component -->
3111     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.7.0" isDefaultVariant="true" condition="CMSIS DSP">
3112       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3113       <files>
3114         <!-- CPU independent -->
3115         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3116         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3117
3118         <!-- CPU and Compiler dependent -->
3119         <!-- ARMCC -->
3120         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3121         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3122         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3123         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3124         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3125         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3126         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3127         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3128         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3129         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3130         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3131         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3132         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3133         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3134         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3135         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3136
3137         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3138         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3139         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3140         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3141         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3142         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3143         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3144         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3145         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3146         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3147         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3148         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3149         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3150         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3151         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3152         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3153
3154         <!-- GCC -->
3155         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3156         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3157         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3158         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3159         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3160         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3161         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3162         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3163
3164         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3165         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3166         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3167         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3168         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3169         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3170         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3171         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3172         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3173         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3174         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3175         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3176         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3177         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3178         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3179         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3180
3181         <!-- IAR -->
3182         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3183         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3184         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3185         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3186         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3187         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3188         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3189         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3190         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3191         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3192         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3193         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3194         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3195         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3196         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3197         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3198
3199         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3200         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3201         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3202         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3203         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3204         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3205         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3206         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3207         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3208         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3209         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3210         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3211         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3212         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3213         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3214         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3215
3216       </files>
3217     </component>
3218     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.7.0" condition="CMSIS DSP">
3219       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3220       <files>
3221         <!-- CPU independent -->
3222         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3223         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3224
3225         <!-- DSP sources (core) -->
3226         <file category="source" name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3227         <file category="source" name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3228         <file category="source" name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3229         <file category="source" name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3230         <file category="source" name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3231         <file category="source" name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3232         <file category="source" name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3233         <file category="source" name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3234         <file category="source" name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3235         <file category="source" name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3236
3237       </files>
3238     </component>
3239
3240     <!-- CMSIS-NN component -->
3241     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.2.0" condition="CMSIS NN">
3242       <description>CMSIS-NN Neural Network Library</description>
3243       <files>
3244         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3245         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3246
3247         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3248         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3249         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3250         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3251
3252         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3253         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3254         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3255         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3256         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3257         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3258         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3259         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3260         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3261         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3262         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3263         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3264         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
3265
3266         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3267         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3268         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3269         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3270         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3271         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3272
3273         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3274         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3275         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3276         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3277         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3278
3279         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3280
3281         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3282         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3283       </files>
3284     </component>
3285
3286     <!-- CMSIS-RTOS Keil RTX component -->
3287     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3288       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3289       <RTE_Components_h>
3290         <!-- the following content goes into file 'RTE_Components.h' -->
3291         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3292         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3293       </RTE_Components_h>
3294       <files>
3295         <!-- CPU independent -->
3296         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3297         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3298         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3299
3300         <!-- RTX templates -->
3301         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3302         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3303         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3304         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3305         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3306         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3307         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3308         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3309         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3310         <!-- tool-chain specific template file -->
3311         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3312         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3313         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3314
3315         <!-- CPU and Compiler dependent -->
3316         <!-- ARMCC -->
3317         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3318         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3319         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3320         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3321         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3322         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3323         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3324         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3325         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3326         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3327         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3328         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3329         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3330         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3331         <!-- GCC -->
3332         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3333         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3334         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3335         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3336         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3337         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3338         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3339         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3340         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3341         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3342         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3343         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3344         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3345         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3346         <!-- IAR -->
3347         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3348         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3349         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3350         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3351         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3352         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3353         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3354         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3355         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3356         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3357         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3358         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3359         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3360         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3361       </files>
3362     </component>
3363     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3364     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3365       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3366       <RTE_Components_h>
3367         <!-- the following content goes into file 'RTE_Components.h' -->
3368         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3369         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3370       </RTE_Components_h>
3371       <files>
3372         <!-- CPU independent -->
3373         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3374         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3375         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3376
3377         <!-- RTX templates -->
3378         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3379         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3380         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3381         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3382         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3383         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3384         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3385         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3386         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3387         <!-- tool-chain specific template file -->
3388         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3389         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3390         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3391
3392         <!-- CPU and Compiler dependent -->
3393         <!-- ARMCC -->
3394         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3395         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3396         <!-- GCC -->
3397         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3398         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3399         <!-- IAR -->
3400       </files>
3401     </component>
3402
3403     <!-- CMSIS-RTOS Keil RTX5 component -->
3404     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.1" Capiversion="1.0.0" condition="RTOS RTX5">
3405       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3406       <RTE_Components_h>
3407         <!-- the following content goes into file 'RTE_Components.h' -->
3408         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3409         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3410       </RTE_Components_h>
3411       <files>
3412         <!-- RTX header file -->
3413         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3414         <!-- RTX compatibility module for API V1 -->
3415         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3416       </files>
3417     </component>
3418
3419     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3420     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
3421       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
3422       <RTE_Components_h>
3423         <!-- the following content goes into file 'RTE_Components.h' -->
3424         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3425         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3426       </RTE_Components_h>
3427       <files>
3428         <!-- RTX documentation -->
3429         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3430
3431         <!-- RTX header files -->
3432         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3433
3434         <!-- RTX configuration -->
3435         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3436         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3437
3438         <!-- RTX templates -->
3439         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3440         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3441         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3442         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3443         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3444         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3445         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3446         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3447         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3448         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3449
3450         <!-- RTX library configuration -->
3451         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3452
3453         <!-- RTX libraries (CPU and Compiler dependent) -->
3454         <!-- ARMCC -->
3455         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3456         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3457         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3458         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3459         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3460         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3461         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3462         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3463         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3464         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3465         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3466         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3467         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3468         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3469         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3470         <!-- GCC -->
3471         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3472         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3473         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3474         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3475         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3476         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3477         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3478         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3479         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3480         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3481         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3482         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3483         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3484         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3485         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3486         <!-- IAR -->
3487         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3488         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3489         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3490         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3491         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3492         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3493         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3494         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3495         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3496         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3497         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3498         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3499         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3500         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3501         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3502       </files>
3503     </component>
3504     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3505       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
3506       <RTE_Components_h>
3507         <!-- the following content goes into file 'RTE_Components.h' -->
3508         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3509         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3510         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3511       </RTE_Components_h>
3512       <files>
3513         <!-- RTX documentation -->
3514         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3515
3516         <!-- RTX header files -->
3517         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3518
3519         <!-- RTX configuration -->
3520         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3521         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3522
3523         <!-- RTX templates -->
3524         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3525         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3526         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3527         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3528         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3529         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3530         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3531         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3532         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3533         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3534
3535         <!-- RTX library configuration -->
3536         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3537
3538         <!-- RTX libraries (CPU and Compiler dependent) -->
3539         <!-- ARMCC -->
3540         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3541         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3542         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3543         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3544         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3545         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3546         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3547         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3548         <!-- GCC -->
3549         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3550         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3551         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3552         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3553         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3554         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3555         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3556         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3557         <!-- IAR -->
3558         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3559         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3560         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3561         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3562         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3563         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3564         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3565         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3566       </files>
3567     </component>
3568     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5">
3569       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3570       <RTE_Components_h>
3571         <!-- the following content goes into file 'RTE_Components.h' -->
3572         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3573         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3574         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3575       </RTE_Components_h>
3576       <files>
3577         <!-- RTX documentation -->
3578         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3579
3580         <!-- RTX header files -->
3581         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3582
3583         <!-- RTX configuration -->
3584         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3585         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3586
3587         <!-- RTX templates -->
3588         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3589         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3590         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3591         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3592         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3593         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3594         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3595         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3596         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3597         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3598
3599         <!-- RTX sources (core) -->
3600         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3601         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3602         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3603         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3604         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3605         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3606         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3607         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3608         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3609         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3610         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3611         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3612         <!-- RTX sources (library configuration) -->
3613         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3614         <!-- RTX sources (handlers ARMCC) -->
3615         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3616         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3617         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3618         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3619         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3620         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3621         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3622         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3623         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3624         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3625         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3626         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3627         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3628         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3629         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3630         <!-- RTX sources (handlers GCC) -->
3631         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3632         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3633         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3634         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3635         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3636         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3637         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3638         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3639         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3640         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3641         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3642         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3643         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3644         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3645         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3646         <!-- RTX sources (handlers IAR) -->
3647         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3648         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3649         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3650         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3651         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3652         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3653         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3654         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3655         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3656         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3657         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3658         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3659         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3660         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3661         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3662         <!-- OS Tick (SysTick) -->
3663         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3664       </files>
3665     </component>
3666     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3667       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3668       <RTE_Components_h>
3669         <!-- the following content goes into file 'RTE_Components.h' -->
3670         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3671         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3672         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3673       </RTE_Components_h>
3674       <files>
3675         <!-- RTX documentation -->
3676         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3677
3678         <!-- RTX header files -->
3679         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3680
3681         <!-- RTX configuration -->
3682         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3683         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3684
3685         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3686
3687         <!-- RTX templates -->
3688         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3689         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3690         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3691         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3692         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3693         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3694         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3695         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3696         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3697         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3698
3699         <!-- RTX sources (core) -->
3700         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3701         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3702         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3703         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3704         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3705         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3706         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3707         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3708         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3709         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3710         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3711         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3712         <!-- RTX sources (library configuration) -->
3713         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3714         <!-- RTX sources (handlers ARMCC) -->
3715         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3716         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3717         <!-- RTX sources (handlers GCC) -->
3718         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3719         <!-- RTX sources (handlers IAR) -->
3720         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3721       </files>
3722     </component>
3723     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3724       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3725       <RTE_Components_h>
3726         <!-- the following content goes into file 'RTE_Components.h' -->
3727         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3728         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3729         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3730         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3731       </RTE_Components_h>
3732       <files>
3733         <!-- RTX documentation -->
3734         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3735
3736         <!-- RTX header files -->
3737         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3738
3739         <!-- RTX configuration -->
3740         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3741         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3742
3743         <!-- RTX templates -->
3744         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3745         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3746         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3747         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3748         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3749         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3750         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3751         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3752         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3753         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3754
3755         <!-- RTX sources (core) -->
3756         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3757         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3758         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3759         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3760         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3761         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3762         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3763         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3764         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3765         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3766         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3767         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3768         <!-- RTX sources (library configuration) -->
3769         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3770         <!-- RTX sources (ARMCC handlers) -->
3771         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3772         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3773         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3774         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3775         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3776         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3777         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3778         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3779         <!-- RTX sources (GCC handlers) -->
3780         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3781         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3782         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3783         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3784         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3785         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3786         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3787         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3788         <!-- RTX sources (IAR handlers) -->
3789         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3790         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3791         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3792         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3793         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3794         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3795         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3796         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3797         <!-- OS Tick (SysTick) -->
3798         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3799       </files>
3800     </component>
3801
3802     <!-- CMSIS-Driver Custom components -->
3803     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3804       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3805       <files>
3806         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3807         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3808       </files>
3809     </component>
3810     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3811       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3812       <files>
3813         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3814         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3815       </files>
3816     </component>
3817     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.1.0" Capiversion="1.1.0">
3818       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3819       <files>
3820         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3821         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3822       </files>
3823     </component>
3824     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3825       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3826       <files>
3827         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3828         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3829       </files>
3830     </component>
3831     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.2.0" Capiversion="1.2.0">
3832       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3833       <files>
3834         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3835         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3836       </files>
3837     </component>
3838     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3839       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3840       <files>
3841         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3842         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3843       </files>
3844     </component>
3845     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3846       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3847       <files>
3848         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3849         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3850       </files>
3851     </component>
3852     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3853       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3854       <files>
3855         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3856         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3857       </files>
3858     </component>
3859     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3860       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3861       <files>
3862         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3863         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3864         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3865         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3866       </files>
3867     </component>
3868     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3869       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3870       <files>
3871         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3872         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3873       </files>
3874     </component>
3875     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3876       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3877       <files>
3878         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3879         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3880       </files>
3881     </component>
3882     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3883       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3884       <files>
3885         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3886         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3887       </files>
3888     </component>
3889     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3890       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3891       <files>
3892         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3893         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3894       </files>
3895     </component>
3896     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.0.0">
3897       <description>Access to #include Driver_WiFi.h file</description>
3898       <files>
3899         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3900         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3901       </files>
3902     </component>
3903   </components>
3904
3905   <boards>
3906     <board name="uVision Simulator" vendor="Keil">
3907       <description>uVision Simulator</description>
3908       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3909       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3910       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3911       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3912       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3913       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3914       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3915       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3916       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3917       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3918       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3919       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3920       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3921       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3922       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3923       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3924       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3925       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3926       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3927       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3928       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3929       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3930       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3931       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3932     </board>
3933
3934     <board name="EWARM Simulator" vendor="IAR">
3935       <description>EWARM Simulator</description>
3936       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3937       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3938       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3939       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3940       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3941       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3942       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3943       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3944       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3945       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3946       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3947       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3948       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3949       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3950       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3951       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3952       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3953       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3954       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3955       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3956       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3957       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3958       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3959       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3960     </board>
3961   </boards>
3962
3963   <examples>
3964     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3965       <description>DSP_Lib Class Marks example</description>
3966       <board name="uVision Simulator" vendor="Keil"/>
3967       <project>
3968         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3969       </project>
3970       <attributes>
3971         <component Cclass="CMSIS" Cgroup="CORE"/>
3972         <component Cclass="CMSIS" Cgroup="DSP"/>
3973         <component Cclass="Device" Cgroup="Startup"/>
3974         <category>Getting Started</category>
3975       </attributes>
3976     </example>
3977
3978     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3979       <description>DSP_Lib Convolution example</description>
3980       <board name="uVision Simulator" vendor="Keil"/>
3981       <project>
3982         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3983       </project>
3984       <attributes>
3985         <component Cclass="CMSIS" Cgroup="CORE"/>
3986         <component Cclass="CMSIS" Cgroup="DSP"/>
3987         <component Cclass="Device" Cgroup="Startup"/>
3988         <category>Getting Started</category>
3989       </attributes>
3990     </example>
3991
3992     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3993       <description>DSP_Lib Dotproduct example</description>
3994       <board name="uVision Simulator" vendor="Keil"/>
3995       <project>
3996         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3997       </project>
3998       <attributes>
3999         <component Cclass="CMSIS" Cgroup="CORE"/>
4000         <component Cclass="CMSIS" Cgroup="DSP"/>
4001         <component Cclass="Device" Cgroup="Startup"/>
4002         <category>Getting Started</category>
4003       </attributes>
4004     </example>
4005
4006     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
4007       <description>DSP_Lib FFT Bin example</description>
4008       <board name="uVision Simulator" vendor="Keil"/>
4009       <project>
4010         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
4011       </project>
4012       <attributes>
4013         <component Cclass="CMSIS" Cgroup="CORE"/>
4014         <component Cclass="CMSIS" Cgroup="DSP"/>
4015         <component Cclass="Device" Cgroup="Startup"/>
4016         <category>Getting Started</category>
4017       </attributes>
4018     </example>
4019
4020     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
4021       <description>DSP_Lib FIR example</description>
4022       <board name="uVision Simulator" vendor="Keil"/>
4023       <project>
4024         <environment name="uv" load="arm_fir_example.uvprojx"/>
4025       </project>
4026       <attributes>
4027         <component Cclass="CMSIS" Cgroup="CORE"/>
4028         <component Cclass="CMSIS" Cgroup="DSP"/>
4029         <component Cclass="Device" Cgroup="Startup"/>
4030         <category>Getting Started</category>
4031       </attributes>
4032     </example>
4033
4034     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
4035       <description>DSP_Lib Graphic Equalizer example</description>
4036       <board name="uVision Simulator" vendor="Keil"/>
4037       <project>
4038         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
4039       </project>
4040       <attributes>
4041         <component Cclass="CMSIS" Cgroup="CORE"/>
4042         <component Cclass="CMSIS" Cgroup="DSP"/>
4043         <component Cclass="Device" Cgroup="Startup"/>
4044         <category>Getting Started</category>
4045       </attributes>
4046     </example>
4047
4048     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4049       <description>DSP_Lib Linear Interpolation example</description>
4050       <board name="uVision Simulator" vendor="Keil"/>
4051       <project>
4052         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4053       </project>
4054       <attributes>
4055         <component Cclass="CMSIS" Cgroup="CORE"/>
4056         <component Cclass="CMSIS" Cgroup="DSP"/>
4057         <component Cclass="Device" Cgroup="Startup"/>
4058         <category>Getting Started</category>
4059       </attributes>
4060     </example>
4061
4062     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4063       <description>DSP_Lib Matrix example</description>
4064       <board name="uVision Simulator" vendor="Keil"/>
4065       <project>
4066         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4067       </project>
4068       <attributes>
4069         <component Cclass="CMSIS" Cgroup="CORE"/>
4070         <component Cclass="CMSIS" Cgroup="DSP"/>
4071         <component Cclass="Device" Cgroup="Startup"/>
4072         <category>Getting Started</category>
4073       </attributes>
4074     </example>
4075
4076     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4077       <description>DSP_Lib Signal Convergence example</description>
4078       <board name="uVision Simulator" vendor="Keil"/>
4079       <project>
4080         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4081       </project>
4082       <attributes>
4083         <component Cclass="CMSIS" Cgroup="CORE"/>
4084         <component Cclass="CMSIS" Cgroup="DSP"/>
4085         <component Cclass="Device" Cgroup="Startup"/>
4086         <category>Getting Started</category>
4087       </attributes>
4088     </example>
4089
4090     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4091       <description>DSP_Lib Sinus/Cosinus example</description>
4092       <board name="uVision Simulator" vendor="Keil"/>
4093       <project>
4094         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4095       </project>
4096       <attributes>
4097         <component Cclass="CMSIS" Cgroup="CORE"/>
4098         <component Cclass="CMSIS" Cgroup="DSP"/>
4099         <component Cclass="Device" Cgroup="Startup"/>
4100         <category>Getting Started</category>
4101       </attributes>
4102     </example>
4103
4104     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4105       <description>DSP_Lib Variance example</description>
4106       <board name="uVision Simulator" vendor="Keil"/>
4107       <project>
4108         <environment name="uv" load="arm_variance_example.uvprojx"/>
4109       </project>
4110       <attributes>
4111         <component Cclass="CMSIS" Cgroup="CORE"/>
4112         <component Cclass="CMSIS" Cgroup="DSP"/>
4113         <component Cclass="Device" Cgroup="Startup"/>
4114         <category>Getting Started</category>
4115       </attributes>
4116     </example>
4117
4118     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4119       <description>Neural Network CIFAR10 example</description>
4120       <board name="uVision Simulator" vendor="Keil"/>
4121       <project>
4122         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4123       </project>
4124       <attributes>
4125         <component Cclass="CMSIS" Cgroup="CORE"/>
4126         <component Cclass="CMSIS" Cgroup="DSP"/>
4127         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4128         <component Cclass="Device" Cgroup="Startup"/>
4129         <category>Getting Started</category>
4130       </attributes>
4131     </example>
4132
4133     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4134       <description>Neural Network CIFAR10 example</description>
4135       <board name="EWARM Simulator" vendor="IAR"/>
4136       <project>
4137         <environment name="iar" load="NN-example-cifar10.ewp"/>
4138       </project>
4139       <attributes>
4140         <component Cclass="CMSIS" Cgroup="CORE"/>
4141         <component Cclass="CMSIS" Cgroup="DSP"/>
4142         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4143         <component Cclass="Device" Cgroup="Startup"/>
4144         <category>Getting Started</category>
4145       </attributes>
4146     </example>
4147
4148     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4149       <description>Neural Network GRU example</description>
4150       <board name="uVision Simulator" vendor="Keil"/>
4151       <project>
4152         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4153       </project>
4154       <attributes>
4155         <component Cclass="CMSIS" Cgroup="CORE"/>
4156         <component Cclass="CMSIS" Cgroup="DSP"/>
4157         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4158         <component Cclass="Device" Cgroup="Startup"/>
4159         <category>Getting Started</category>
4160       </attributes>
4161     </example>
4162
4163     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4164       <description>Neural Network GRU example</description>
4165       <board name="EWARM Simulator" vendor="IAR"/>
4166       <project>
4167         <environment name="iar" load="NN-example-gru.ewp"/>
4168       </project>
4169       <attributes>
4170         <component Cclass="CMSIS" Cgroup="CORE"/>
4171         <component Cclass="CMSIS" Cgroup="DSP"/>
4172         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4173         <component Cclass="Device" Cgroup="Startup"/>
4174         <category>Getting Started</category>
4175       </attributes>
4176     </example>
4177
4178     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4179       <description>CMSIS-RTOS2 Blinky example</description>
4180       <board name="uVision Simulator" vendor="Keil"/>
4181       <project>
4182         <environment name="uv" load="Blinky.uvprojx"/>
4183       </project>
4184       <attributes>
4185         <component Cclass="CMSIS" Cgroup="CORE"/>
4186         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4187         <component Cclass="Device" Cgroup="Startup"/>
4188         <category>Getting Started</category>
4189       </attributes>
4190     </example>
4191
4192     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4193       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4194       <board name="uVision Simulator" vendor="Keil"/>
4195       <project>
4196         <environment name="uv" load="Blinky.uvprojx"/>
4197       </project>
4198       <attributes>
4199         <component Cclass="CMSIS" Cgroup="CORE"/>
4200         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4201         <component Cclass="Device" Cgroup="Startup"/>
4202         <category>Getting Started</category>
4203       </attributes>
4204     </example>
4205
4206     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4207       <description>CMSIS-RTOS2 Message Queue Example</description>
4208       <board name="uVision Simulator" vendor="Keil"/>
4209       <project>
4210         <environment name="uv" load="MsqQueue.uvprojx"/>
4211       </project>
4212       <attributes>
4213         <component Cclass="CMSIS" Cgroup="CORE"/>
4214         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4215         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4216         <component Cclass="Device" Cgroup="Startup"/>
4217         <category>Getting Started</category>
4218       </attributes>
4219     </example>
4220
4221     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4222       <description>CMSIS-RTOS2 Memory Pool Example</description>
4223       <board name="uVision Simulator" vendor="Keil"/>
4224       <project>
4225         <environment name="uv" load="MemPool.uvprojx"/>
4226       </project>
4227       <attributes>
4228         <component Cclass="CMSIS" Cgroup="CORE"/>
4229         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4230         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4231         <component Cclass="Device" Cgroup="Startup"/>
4232         <category>Getting Started</category>
4233       </attributes>
4234     </example>
4235
4236     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4237       <description>Bare-metal secure/non-secure example without RTOS</description>
4238       <board name="uVision Simulator" vendor="Keil"/>
4239       <project>
4240         <environment name="uv" load="NoRTOS.uvmpw"/>
4241       </project>
4242       <attributes>
4243         <component Cclass="CMSIS" Cgroup="CORE"/>
4244         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4245         <component Cclass="Device" Cgroup="Startup"/>
4246         <category>Getting Started</category>
4247       </attributes>
4248     </example>
4249
4250     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4251       <description>Secure/non-secure RTOS example with thread context management</description>
4252       <board name="uVision Simulator" vendor="Keil"/>
4253       <project>
4254         <environment name="uv" load="RTOS.uvmpw"/>
4255       </project>
4256       <attributes>
4257         <component Cclass="CMSIS" Cgroup="CORE"/>
4258         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4259         <component Cclass="Device" Cgroup="Startup"/>
4260         <category>Getting Started</category>
4261       </attributes>
4262     </example>
4263
4264     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4265       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4266       <board name="uVision Simulator" vendor="Keil"/>
4267       <project>
4268         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4269       </project>
4270       <attributes>
4271         <component Cclass="CMSIS" Cgroup="CORE"/>
4272         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4273         <component Cclass="Device" Cgroup="Startup"/>
4274         <category>Getting Started</category>
4275       </attributes>
4276     </example>
4277
4278   </examples>
4279
4280 </package>