begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.1.2-dev2">
  12       Active development...
  13       CMSIS-Core(M): 5.0.3 (see revision history for details)
  14       - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  15       CMSIS-RTOS2:
  16       - RTX 5.2.2 (see revision history for details)
  17     </release>
  18     <release version="5.1.2-dev1">
  19       Devices:
  20       - added GCC startup and linker script for Cortex-A9
  21       CMSIS-Core(M): 5.0.3 (see revision history for details)
  22       - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  23       - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  24       CMSIS-Core(A): 1.0.1 (see revision history for details)
  25       CMSIS-Driver:
  26       - CAN Driver API V1.2.0
  27       CMSIS-RTOS:
  28       - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata
  29       CMSIS-RTOS2:
  30       - RTX 5.2.1 (see revision history for details)
  31       - Message Queue Example
  32       - Memory Pool Example
  33     </release>
  34     <release version="5.1.1" date="2017-09-19">
  35       CMSIS-RTOS2:
  36       - RTX 5.2.1 (see revision history for details)
  37     </release>
  38     <release version="5.1.0" date="2017-08-04">
  39       CMSIS-Core(M): 5.0.2 (see revision history for details)
  40       - Changed Version Control macros to be core agnostic.
  41       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  42       CMSIS-Core(A): 1.0.0 (see revision history for details)
  43       - Initial release
  44       - IRQ Controller API 1.0.0
  45       CMSIS-Driver: 2.05 (see revision history for details)
  46       - All typedefs related to status have been made volatile.
  47       CMSIS-RTOS2:
  48       - API 2.1.1 (see revision history for details)
  49       - RTX 5.2.0 (see revision history for details)
  50       - OS Tick API 1.0.0
  51       CMSIS-DSP: 1.5.2 (see revision history for details)
  52       - Fixed GNU Compiler specific diagnostics.
  53       CMSIS-PACK: 1.5.0 (see revision history for details)
  54       - added System Description File (*.SDF) Format
  55       CMSIS-Zone: 0.0.1 (Preview)
  56       - Initial specification draft
  57     </release>
  58     <release version="5.0.1" date="2017-02-03">
  59       Package Description:
  60       - added taxonomy for Cclass RTOS
  61       CMSIS-RTOS2:
  62       - API 2.1   (see revision history for details)
  63       - RTX 5.1.0 (see revision history for details)
  64       CMSIS-Core: 5.0.1 (see revision history for details)
  65       - Added __PACKED_STRUCT macro
  66       - Added uVisior support
  67       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  68       - Updated template for secure main function (main_s.c)
  69       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  70       CMSIS-DSP: 1.5.1 (see revision history for details)
  71       - added ARMv8M DSP libraries.
  72       CMSIS-PACK:1.4.9 (see revision history for details)
  73       - added Pack Index File specification and schema file
  74     </release>
  75     <release version="5.0.0" date="2016-11-11">
  76       Changed open source license to Apache 2.0
  77       CMSIS_Core:
  78        - Added support for Cortex-M23 and Cortex-M33.
  79        - Added ARMv8-M device configurations for mainline and baseline.
  80        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  81        - Added cmsis_compiler.h to unify compiler behaviour.
  82        - Updated function SCB_EnableICache (for Cortex-M7).
  83        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  84       CMSIS-RTOS:
  85         - bug fix in RTX 4.82 (see revision history for details)
  86       CMSIS-RTOS2:
  87         - new API including compatibility layer to CMSIS-RTOS
  88         - reference implementation based on RTX5
  89         - supports all Cortex-M variants including TrustZone for ARMv8-M
  90       CMSIS-SVD:
  91        - reworked SVD format documentation
  92        - removed SVD file database documentation as SVD files are distributed in packs
  93        - updated SVDConv for Win32 and Linux
  94       CMSIS-DSP:
  95        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  96        - Added DSP libraries build projects to CMSIS pack.
  97     </release>
  98     <release version="4.5.0" date="2015-10-28">
  99       - CMSIS-Core     4.30.0  (see revision history for details)
 100       - CMSIS-DAP      1.1.0   (unchanged)
 101       - CMSIS-Driver   2.04.0  (see revision history for details)
 102       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 103       - CMSIS-PACK     1.4.1   (see revision history for details)
 104       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 105       - CMSIS-SVD      1.3.1   (see revision history for details)
 106     </release>
 107     <release version="4.4.0" date="2015-09-11">
 108       - CMSIS-Core     4.20   (see revision history for details)
 109       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 110       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 111       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 112       - CMSIS-RTOS
 113         -- API         1.02   (unchanged)
 114         -- RTX         4.79   (see revision history for details)
 115       - CMSIS-SVD      1.3.0  (see revision history for details)
 116       - CMSIS-DAP      1.1.0  (extended with SWO support)
 117     </release>
 118     <release version="4.3.0" date="2015-03-20">
 119       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 120       - CMSIS-DSP      1.4.5  (see revision history for details)
 121       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 122       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 123       - CMSIS-RTOS
 124         -- API         1.02   (unchanged)
 125         -- RTX         4.78   (see revision history for details)
 126       - CMSIS-SVD      1.2    (unchanged)
 127     </release>
 128     <release version="4.2.0" date="2014-09-24">
 129       Adding Cortex-M7 support
 130       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 131       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 132       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 133       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 134       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 135     </release>
 136     <release version="4.1.1" date="2014-06-30">
 137       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 138     </release>
 139     <release version="4.1.0" date="2014-06-12">
 140       - CMSIS-Driver   2.02  (incompatible update)
 141       - CMSIS-Pack     1.3   (see revision history for details)
 142       - CMSIS-DSP      1.4.2 (unchanged)
 143       - CMSIS-Core     3.30  (unchanged)
 144       - CMSIS-RTOS RTX 4.74  (unchanged)
 145       - CMSIS-RTOS API 1.02  (unchanged)
 146       - CMSIS-SVD      1.10  (unchanged)
 147       PACK:
 148       - removed G++ specific files from PACK
 149       - added Component Startup variant "C Startup"
 150       - added Pack Checking Utility
 151       - updated conditions to reflect tool-chain dependency
 152       - added Taxonomy for Graphics
 153       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 154     </release>
 155     <release version="4.0.0">
 156       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 157       - CMSIS-Pack     1.1   Preliminary
 158       - CMSIS-DSP      1.4.2 (see revision history for details)
 159       - CMSIS-Core     3.30  (see revision history for details)
 160       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 161       - CMSIS-RTOS API 1.02  (unchanged)
 162       - CMSIS-SVD      1.10  (unchanged)
 163     </release>
 164     <release version="3.20.4">
 165       - CMSIS-RTOS 4.74 (see revision history for details)
 166       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 167     </release>
 168     <release version="3.20.3">
 169       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 170       - CMSIS-RTOS 4.73 (see revision history for details)
 171     </release>
 172     <release version="3.20.2">
 173       - CMSIS-Pack documentation has been added
 174       - CMSIS-Drivers header and documentation have been added to PACK
 175       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 176     </release>
 177     <release version="3.20.1">
 178       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 179       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 180     </release>
 181     <release version="3.20.0">
 182       The software portions that are deployed in the application program are now under a BSD license which allows usage
 183       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 184       The individual components have been update as listed below:
 185       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 186       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 187       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 188       - CMSIS-SVD is unchanged.
 189     </release>
 190   </releases>
 191
 192   <taxonomy>
 193     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 194     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 195     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 196     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 197     <description Cclass="File System">File Drive Support and File System</description>
 198     <description Cclass="Graphics">Graphical User Interface</description>
 199     <description Cclass="Network">Network Stack using Internet Protocols</description>
 200     <description Cclass="USB">Universal Serial Bus Stack</description>
 201     <description Cclass="Compiler">Compiler Software Extensions</description>
 202     <description Cclass="RTOS">Real-time Operating System</description>
 203   </taxonomy>
 204
 205   <devices>
 206     <!-- ******************************  Cortex-M0  ****************************** -->
 207     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 208       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 209       <description>
 210 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 211 - simple, easy-to-use programmers model
 212 - highly efficient ultra-low power operation
 213 - excellent code density
 214 - deterministic, high-performance interrupt handling
 215 - upward compatibility with the rest of the Cortex-M processor family.
 216       </description>
 217       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 218       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 219       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 220       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 221
 222       <device Dname="ARMCM0">
 223         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 224         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 225       </device>
 226     </family>
 227
 228     <!-- ******************************  Cortex-M0P  ****************************** -->
 229     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 230       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 231       <description>
 232 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 233 - simple, easy-to-use programmers model
 234 - highly efficient ultra-low power operation
 235 - excellent code density
 236 - deterministic, high-performance interrupt handling
 237 - upward compatibility with the rest of the Cortex-M processor family.
 238       </description>
 239       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 240       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 241       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 242       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 243
 244       <device Dname="ARMCM0P">
 245         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 246         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 247       </device>
 248     </family>
 249
 250     <!-- ******************************  Cortex-M3  ****************************** -->
 251     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 252       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 253       <description>
 254 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 255 - simple, easy-to-use programmers model
 256 - highly efficient ultra-low power operation
 257 - excellent code density
 258 - deterministic, high-performance interrupt handling
 259 - upward compatibility with the rest of the Cortex-M processor family.
 260       </description>
 261       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 262       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 263       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 264       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 265
 266       <device Dname="ARMCM3">
 267         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 268         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 269       </device>
 270     </family>
 271
 272     <!-- ******************************  Cortex-M4  ****************************** -->
 273     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 274       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 275       <description>
 276 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 277 - simple, easy-to-use programmers model
 278 - highly efficient ultra-low power operation
 279 - excellent code density
 280 - deterministic, high-performance interrupt handling
 281 - upward compatibility with the rest of the Cortex-M processor family.
 282       </description>
 283       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 284       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 285       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 286       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 287
 288       <device Dname="ARMCM4">
 289         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 290         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 291       </device>
 292
 293       <device Dname="ARMCM4_FP">
 294         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 295         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 296       </device>
 297     </family>
 298
 299     <!-- ******************************  Cortex-M7  ****************************** -->
 300     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 301       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 302       <description>
 303 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 304 - simple, easy-to-use programmers model
 305 - highly efficient ultra-low power operation
 306 - excellent code density
 307 - deterministic, high-performance interrupt handling
 308 - upward compatibility with the rest of the Cortex-M processor family.
 309       </description>
 310       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 311       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 312       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 313       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 314
 315       <device Dname="ARMCM7">
 316         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 317         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 318       </device>
 319
 320       <device Dname="ARMCM7_SP">
 321         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 322         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 323       </device>
 324
 325       <device Dname="ARMCM7_DP">
 326         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 327         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 328       </device>
 329     </family>
 330
 331     <!-- ******************************  Cortex-M23  ********************** -->
 332     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 333       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 334       <description>
 335 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 336 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 337 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 338       </description>
 339       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 340       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 341       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 342       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 343       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 344       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 345
 346       <device Dname="ARMCM23">
 347         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 348         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 349       </device>
 350
 351       <device Dname="ARMCM23_TZ">
 352         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 353         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 354       </device>
 355     </family>
 356
 357     <!-- ******************************  Cortex-M33  ****************************** -->
 358     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 359       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 360       <description>
 361 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 362 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 363       </description>
 364       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 365       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 366       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 367       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 368       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 369       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 370
 371       <device Dname="ARMCM33">
 372         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 373         <description>
 374           no DSP Instructions, no Floating Point Unit, no TrustZone
 375         </description>
 376         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 377       </device>
 378
 379       <device Dname="ARMCM33_TZ">
 380         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 381         <description>
 382           no DSP Instructions, no Floating Point Unit, TrustZone
 383         </description>
 384         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 385       </device>
 386
 387       <device Dname="ARMCM33_DSP_FP">
 388         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 389         <description>
 390           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 391         </description>
 392         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 393       </device>
 394
 395       <device Dname="ARMCM33_DSP_FP_TZ">
 396         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 397         <description>
 398           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 399         </description>
 400         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 401       </device>
 402     </family>
 403
 404     <!-- ******************************  ARMSC000  ****************************** -->
 405     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 406       <description>
 407 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 408 - simple, easy-to-use programmers model
 409 - highly efficient ultra-low power operation
 410 - excellent code density
 411 - deterministic, high-performance interrupt handling
 412       </description>
 413       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 414       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 415       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 416       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 417
 418       <device Dname="ARMSC000">
 419         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 420         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 421       </device>
 422     </family>
 423
 424     <!-- ******************************  ARMSC300  ****************************** -->
 425     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 426       <description>
 427 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 428 - simple, easy-to-use programmers model
 429 - highly efficient ultra-low power operation
 430 - excellent code density
 431 - deterministic, high-performance interrupt handling
 432       </description>
 433       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 434       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 435       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 436       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 437
 438       <device Dname="ARMSC300">
 439         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 440         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 441       </device>
 442     </family>
 443
 444     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 445     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 446       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 447       <description>
 448 ARMv8-M Baseline based device with TrustZone
 449       </description>
 450       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 451       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 452       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 453       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 454       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 455       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 456
 457       <device Dname="ARMv8MBL">
 458         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 459         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 460       </device>
 461     </family>
 462
 463     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 464     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 465       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 466       <description>
 467 ARMv8-M Mainline based device with TrustZone
 468       </description>
 469       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 470       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 471       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 472       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 473       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 474       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 475
 476       <device Dname="ARMv8MML">
 477         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 478         <description>
 479           no DSP Instructions, no Floating Point Unit, TrustZone
 480         </description>
 481         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 482       </device>
 483
 484       <device Dname="ARMv8MML_DSP">
 485         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 486         <description>
 487           DSP Instructions, no Floating Point Unit, TrustZone
 488         </description>
 489         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 490       </device>
 491
 492       <device Dname="ARMv8MML_SP">
 493         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 494         <description>
 495           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 496         </description>
 497         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 498       </device>
 499
 500       <device Dname="ARMv8MML_DSP_SP">
 501         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 502         <description>
 503           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 504         </description>
 505         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 506       </device>
 507
 508       <device Dname="ARMv8MML_DP">
 509         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 510         <description>
 511           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 512         </description>
 513         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 514       </device>
 515
 516       <device Dname="ARMv8MML_DSP_DP">
 517         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 518         <description>
 519           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 520         </description>
 521         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 522       </device>
 523     </family>
 524
 525     <!-- ******************************  Cortex-A5  ****************************** -->
 526     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 527       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 528       <description>
 529 The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
 530 virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
 531 ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 532       </description>
 533
 534       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 535       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 536
 537       <device Dname="ARMCA5">
 538         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 539         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 540       </device>
 541     </family>
 542
 543     <!-- ******************************  Cortex-A7  ****************************** -->
 544     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 545       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 546       <description>
 547 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
 548 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 549 an optional integrated GIC, and an optional L2 cache controller.
 550       </description>
 551
 552       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 553       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 554
 555       <device Dname="ARMCA7">
 556         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 557         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 558       </device>
 559     </family>
 560
 561     <!-- ******************************  Cortex-A9  ****************************** -->
 562     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 563       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 564       <description>
 565 The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 566 The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
 567 and 8-bit Java bytecodes in Jazelle state.
 568       </description>
 569
 570       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 571       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 572
 573       <device Dname="ARMCA9">
 574         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 575         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 576       </device>
 577     </family>
 578   </devices>
 579
 580
 581   <apis>
 582     <!-- CMSIS Device API -->
 583     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 584       <description>Device interrupt controller interface</description>
 585       <files>
 586         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 587       </files>
 588     </api>
 589     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.0" exclusive="1">
 590       <description>RTOS Kernel system tick timer interface</description>
 591       <files>
 592         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 593       </files>
 594     </api>
 595     <!-- CMSIS-RTOS API -->
 596     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 597       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 598       <files>
 599         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 600       </files>
 601     </api>
 602     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.1" exclusive="1">
 603       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 604       <files>
 605         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 606         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 607       </files>
 608     </api>
 609     <!-- CMSIS Driver API -->
 610     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 611       <description>USART Driver API for Cortex-M</description>
 612       <files>
 613         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 614         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 615       </files>
 616     </api>
 617     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 618       <description>SPI Driver API for Cortex-M</description>
 619       <files>
 620         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 621         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 622       </files>
 623     </api>
 624     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 625       <description>SAI Driver API for Cortex-M</description>
 626       <files>
 627         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 628         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 629       </files>
 630     </api>
 631     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 632       <description>I2C Driver API for Cortex-M</description>
 633       <files>
 634         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 635         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 636       </files>
 637     </api>
 638     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 639       <description>CAN Driver API for Cortex-M</description>
 640       <files>
 641         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 642         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 643       </files>
 644     </api>
 645     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
 646       <description>Flash Driver API for Cortex-M</description>
 647       <files>
 648         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 649         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 650       </files>
 651     </api>
 652     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 653       <description>MCI Driver API for Cortex-M</description>
 654       <files>
 655         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 656         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 657       </files>
 658     </api>
 659     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
 660       <description>NAND Flash Driver API for Cortex-M</description>
 661       <files>
 662         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 663         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 664       </files>
 665     </api>
 666     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 667       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 668       <files>
 669         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 670         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 671         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 672       </files>
 673     </api>
 674     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 675       <description>Ethernet MAC Driver API for Cortex-M</description>
 676       <files>
 677         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 678         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 679       </files>
 680     </api>
 681     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 682       <description>Ethernet PHY Driver API for Cortex-M</description>
 683       <files>
 684         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 685         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 686       </files>
 687     </api>
 688     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 689       <description>USB Device Driver API for Cortex-M</description>
 690       <files>
 691         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 692         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 693       </files>
 694     </api>
 695     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 696       <description>USB Host Driver API for Cortex-M</description>
 697       <files>
 698         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 699         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 700       </files>
 701     </api>
 702   </apis>
 703
 704   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 705   <conditions>
 706     <!-- compiler -->
 707     <condition id="ARMCC6">
 708       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 709       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 710     </condition>
 711     <condition id="ARMCC5">
 712       <require Tcompiler="ARMCC" Toptions="AC5"/>
 713     </condition>
 714     <condition id="ARMCC">
 715       <require Tcompiler="ARMCC"/>
 716     </condition>
 717     <condition id="GCC">
 718       <require Tcompiler="GCC"/>
 719     </condition>
 720     <condition id="IAR">
 721       <require Tcompiler="IAR"/>
 722     </condition>
 723     <condition id="ARMCC GCC">
 724       <accept Tcompiler="ARMCC"/>
 725       <accept Tcompiler="GCC"/>
 726     </condition>
 727     <condition id="ARMCC GCC IAR">
 728       <accept Tcompiler="ARMCC"/>
 729       <accept Tcompiler="GCC"/>
 730       <accept Tcompiler="IAR"/>
 731     </condition>
 732
 733     <!-- ARM architecture -->
 734     <condition id="ARMv6-M Device">
 735       <description>ARMv6-M architecture based device</description>
 736       <accept Dcore="Cortex-M0"/>
 737       <accept Dcore="Cortex-M0+"/>
 738       <accept Dcore="SC000"/>
 739     </condition>
 740     <condition id="ARMv7-M Device">
 741       <description>ARMv7-M architecture based device</description>
 742       <accept Dcore="Cortex-M3"/>
 743       <accept Dcore="Cortex-M4"/>
 744       <accept Dcore="Cortex-M7"/>
 745       <accept Dcore="SC300"/>
 746     </condition>
 747     <condition id="ARMv8-M Device">
 748       <description>ARMv8-M architecture based device</description>
 749       <accept Dcore="ARMV8MBL"/>
 750       <accept Dcore="ARMV8MML"/>
 751       <accept Dcore="Cortex-M23"/>
 752       <accept Dcore="Cortex-M33"/>
 753     </condition>
 754     <condition id="ARMv8-M TZ Device">
 755       <description>ARMv8-M architecture based device with TrustZone</description>
 756       <require condition="ARMv8-M Device"/>
 757       <require Dtz="TZ"/>
 758     </condition>
 759     <condition id="ARMv6_7-M Device">
 760       <description>ARMv6_7-M architecture based device</description>
 761       <accept condition="ARMv6-M Device"/>
 762       <accept condition="ARMv7-M Device"/>
 763     </condition>
 764     <condition id="ARMv6_7_8-M Device">
 765       <description>ARMv6_7_8-M architecture based device</description>
 766       <accept condition="ARMv6-M Device"/>
 767       <accept condition="ARMv7-M Device"/>
 768       <accept condition="ARMv8-M Device"/>
 769     </condition>
 770     <condition id="ARMv7-A Device">
 771       <description>ARMv7-A architecture based device</description>
 772       <accept Dcore="Cortex-A5"/>
 773       <accept Dcore="Cortex-A7"/>
 774       <accept Dcore="Cortex-A9"/>
 775     </condition>
 776
 777     <!-- ARM core -->
 778     <condition id="CM0">
 779       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 780       <accept Dcore="Cortex-M0"/>
 781       <accept Dcore="Cortex-M0+"/>
 782       <accept Dcore="SC000"/>
 783     </condition>
 784     <condition id="CM3">
 785       <description>Cortex-M3 or SC300 processor based device</description>
 786       <accept Dcore="Cortex-M3"/>
 787       <accept Dcore="SC300"/>
 788     </condition>
 789     <condition id="CM4">
 790       <description>Cortex-M4 processor based device</description>
 791       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 792     </condition>
 793     <condition id="CM4_FP">
 794       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 795       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 796     </condition>
 797     <condition id="CM7">
 798       <description>Cortex-M7 processor based device</description>
 799       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 800     </condition>
 801     <condition id="CM7_FP">
 802       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 803       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 804       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 805     </condition>
 806     <condition id="CM7_SP">
 807       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 808       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 809     </condition>
 810     <condition id="CM7_DP">
 811       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 812       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 813     </condition>
 814     <condition id="CM23">
 815       <description>Cortex-M23 processor based device</description>
 816       <require Dcore="Cortex-M23"/>
 817     </condition>
 818     <condition id="CM33">
 819       <description>Cortex-M33 processor based device</description>
 820       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 821     </condition>
 822     <condition id="CM33_FP">
 823       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 824       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 825     </condition>
 826     <condition id="ARMv8MBL">
 827       <description>ARMv8-M Baseline processor based device</description>
 828       <require Dcore="ARMV8MBL"/>
 829     </condition>
 830     <condition id="ARMv8MML">
 831       <description>ARMv8-M Mainline processor based device</description>
 832       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 833     </condition>
 834     <condition id="ARMv8MML_FP">
 835       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 836       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 837       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 838     </condition>
 839
 840     <condition id="CM33_NODSP_NOFPU">
 841       <description>CM33, no DSP, no FPU</description>
 842       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 843     </condition>
 844     <condition id="CM33_DSP_NOFPU">
 845       <description>CM33, DSP, no FPU</description>
 846       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 847     </condition>
 848     <condition id="CM33_NODSP_SP">
 849       <description>CM33, no DSP, SP FPU</description>
 850       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 851     </condition>
 852     <condition id="CM33_DSP_SP">
 853       <description>CM33, DSP, SP FPU</description>
 854       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 855     </condition>
 856
 857     <condition id="ARMv8MML_NODSP_NOFPU">
 858       <description>ARMv8MML, no DSP, no FPU</description>
 859       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 860     </condition>
 861     <condition id="ARMv8MML_DSP_NOFPU">
 862       <description>ARMv8MML, DSP, no FPU</description>
 863       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 864     </condition>
 865     <condition id="ARMv8MML_NODSP_SP">
 866       <description>ARMv8MML, no DSP, SP FPU</description>
 867       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 868     </condition>
 869     <condition id="ARMv8MML_DSP_SP">
 870       <description>ARMv8MML, DSP, SP FPU</description>
 871       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 872     </condition>
 873
 874     <condition id="CA5_CA9">
 875       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 876       <accept Dcore="Cortex-A5"/>
 877       <accept Dcore="Cortex-A9"/>
 878     </condition>
 879
 880     <condition id="CA7">
 881       <description>Cortex-A7 processor based device</description>
 882       <accept Dcore="Cortex-A7"/>
 883     </condition>
 884
 885     <!-- ARMCC compiler -->
 886     <condition id="CA_ARMCC5">
 887       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
 888       <require condition="ARMv7-A Device"/>
 889       <require condition="ARMCC5"/>
 890     </condition>
 891     <condition id="CA_ARMCC6">
 892       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
 893       <require condition="ARMv7-A Device"/>
 894       <require condition="ARMCC6"/>
 895     </condition>
 896
 897     <condition id="CM0_ARMCC">
 898       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 899       <require condition="CM0"/>
 900       <require Tcompiler="ARMCC"/>
 901     </condition>
 902     <condition id="CM0_LE_ARMCC">
 903       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 904       <require condition="CM0_ARMCC"/>
 905       <require Dendian="Little-endian"/>
 906     </condition>
 907     <condition id="CM0_BE_ARMCC">
 908       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 909       <require condition="CM0_ARMCC"/>
 910       <require Dendian="Big-endian"/>
 911     </condition>
 912
 913     <condition id="CM3_ARMCC">
 914       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 915       <require condition="CM3"/>
 916       <require Tcompiler="ARMCC"/>
 917     </condition>
 918     <condition id="CM3_LE_ARMCC">
 919       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 920       <require condition="CM3_ARMCC"/>
 921       <require Dendian="Little-endian"/>
 922     </condition>
 923     <condition id="CM3_BE_ARMCC">
 924       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 925       <require condition="CM3_ARMCC"/>
 926       <require Dendian="Big-endian"/>
 927     </condition>
 928
 929     <condition id="CM4_ARMCC">
 930       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 931       <require condition="CM4"/>
 932       <require Tcompiler="ARMCC"/>
 933     </condition>
 934     <condition id="CM4_LE_ARMCC">
 935       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 936       <require condition="CM4_ARMCC"/>
 937       <require Dendian="Little-endian"/>
 938     </condition>
 939     <condition id="CM4_BE_ARMCC">
 940       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 941       <require condition="CM4_ARMCC"/>
 942       <require Dendian="Big-endian"/>
 943     </condition>
 944
 945     <condition id="CM4_FP_ARMCC">
 946       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 947       <require condition="CM4_FP"/>
 948       <require Tcompiler="ARMCC"/>
 949     </condition>
 950     <condition id="CM4_FP_LE_ARMCC">
 951       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 952       <require condition="CM4_FP_ARMCC"/>
 953       <require Dendian="Little-endian"/>
 954     </condition>
 955     <condition id="CM4_FP_BE_ARMCC">
 956       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 957       <require condition="CM4_FP_ARMCC"/>
 958       <require Dendian="Big-endian"/>
 959     </condition>
 960
 961     <condition id="CM7_ARMCC">
 962       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 963       <require condition="CM7"/>
 964       <require Tcompiler="ARMCC"/>
 965     </condition>
 966     <condition id="CM7_LE_ARMCC">
 967       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 968       <require condition="CM7_ARMCC"/>
 969       <require Dendian="Little-endian"/>
 970     </condition>
 971     <condition id="CM7_BE_ARMCC">
 972       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 973       <require condition="CM7_ARMCC"/>
 974       <require Dendian="Big-endian"/>
 975     </condition>
 976
 977     <condition id="CM7_FP_ARMCC">
 978       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 979       <require condition="CM7_FP"/>
 980       <require Tcompiler="ARMCC"/>
 981     </condition>
 982     <condition id="CM7_FP_LE_ARMCC">
 983       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 984       <require condition="CM7_FP_ARMCC"/>
 985       <require Dendian="Little-endian"/>
 986     </condition>
 987     <condition id="CM7_FP_BE_ARMCC">
 988       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 989       <require condition="CM7_FP_ARMCC"/>
 990       <require Dendian="Big-endian"/>
 991     </condition>
 992
 993     <condition id="CM7_SP_ARMCC">
 994       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 995       <require condition="CM7_SP"/>
 996       <require Tcompiler="ARMCC"/>
 997     </condition>
 998     <condition id="CM7_SP_LE_ARMCC">
 999       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1000       <require condition="CM7_SP_ARMCC"/>
1001       <require Dendian="Little-endian"/>
1002     </condition>
1003     <condition id="CM7_SP_BE_ARMCC">
1004       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1005       <require condition="CM7_SP_ARMCC"/>
1006       <require Dendian="Big-endian"/>
1007     </condition>
1008
1009     <condition id="CM7_DP_ARMCC">
1010       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1011       <require condition="CM7_DP"/>
1012       <require Tcompiler="ARMCC"/>
1013     </condition>
1014     <condition id="CM7_DP_LE_ARMCC">
1015       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1016       <require condition="CM7_DP_ARMCC"/>
1017       <require Dendian="Little-endian"/>
1018     </condition>
1019     <condition id="CM7_DP_BE_ARMCC">
1020       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1021       <require condition="CM7_DP_ARMCC"/>
1022       <require Dendian="Big-endian"/>
1023     </condition>
1024
1025     <condition id="CM23_ARMCC">
1026       <description>Cortex-M23 processor based device for the ARM Compiler</description>
1027       <require condition="CM23"/>
1028       <require Tcompiler="ARMCC"/>
1029     </condition>
1030     <condition id="CM23_LE_ARMCC">
1031       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1032       <require condition="CM23_ARMCC"/>
1033       <require Dendian="Little-endian"/>
1034     </condition>
1035     <condition id="CM23_BE_ARMCC">
1036       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1037       <require condition="CM23_ARMCC"/>
1038       <require Dendian="Big-endian"/>
1039     </condition>
1040
1041     <condition id="CM33_ARMCC">
1042       <description>Cortex-M33 processor based device for the ARM Compiler</description>
1043       <require condition="CM33"/>
1044       <require Tcompiler="ARMCC"/>
1045     </condition>
1046     <condition id="CM33_LE_ARMCC">
1047       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1048       <require condition="CM33_ARMCC"/>
1049       <require Dendian="Little-endian"/>
1050     </condition>
1051     <condition id="CM33_BE_ARMCC">
1052       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1053       <require condition="CM33_ARMCC"/>
1054       <require Dendian="Big-endian"/>
1055     </condition>
1056
1057     <condition id="CM33_FP_ARMCC">
1058       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1059       <require condition="CM33_FP"/>
1060       <require Tcompiler="ARMCC"/>
1061     </condition>
1062     <condition id="CM33_FP_LE_ARMCC">
1063       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1064       <require condition="CM33_FP_ARMCC"/>
1065       <require Dendian="Little-endian"/>
1066     </condition>
1067     <condition id="CM33_FP_BE_ARMCC">
1068       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1069       <require condition="CM33_FP_ARMCC"/>
1070       <require Dendian="Big-endian"/>
1071     </condition>
1072
1073     <condition id="CM33_NODSP_NOFPU_ARMCC">
1074       <description>CM33, no DSP, no FPU, ARM Compiler</description>
1075       <require condition="CM33_NODSP_NOFPU"/>
1076       <require Tcompiler="ARMCC"/>
1077     </condition>
1078     <condition id="CM33_DSP_NOFPU_ARMCC">
1079       <description>CM33, DSP, no FPU, ARM Compiler</description>
1080       <require condition="CM33_DSP_NOFPU"/>
1081       <require Tcompiler="ARMCC"/>
1082     </condition>
1083     <condition id="CM33_NODSP_SP_ARMCC">
1084       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1085       <require condition="CM33_NODSP_SP"/>
1086       <require Tcompiler="ARMCC"/>
1087     </condition>
1088     <condition id="CM33_DSP_SP_ARMCC">
1089       <description>CM33, DSP, SP FPU, ARM Compiler</description>
1090       <require condition="CM33_DSP_SP"/>
1091       <require Tcompiler="ARMCC"/>
1092     </condition>
1093     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1094       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1095       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1096       <require Dendian="Little-endian"/>
1097     </condition>
1098     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1099       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1100       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1101       <require Dendian="Little-endian"/>
1102     </condition>
1103     <condition id="CM33_NODSP_SP_LE_ARMCC">
1104       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1105       <require condition="CM33_NODSP_SP_ARMCC"/>
1106       <require Dendian="Little-endian"/>
1107     </condition>
1108     <condition id="CM33_DSP_SP_LE_ARMCC">
1109       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
1110       <require condition="CM33_DSP_SP_ARMCC"/>
1111       <require Dendian="Little-endian"/>
1112     </condition>
1113
1114     <condition id="ARMv8MBL_ARMCC">
1115       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1116       <require condition="ARMv8MBL"/>
1117       <require Tcompiler="ARMCC"/>
1118     </condition>
1119     <condition id="ARMv8MBL_LE_ARMCC">
1120       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1121       <require condition="ARMv8MBL_ARMCC"/>
1122       <require Dendian="Little-endian"/>
1123     </condition>
1124     <condition id="ARMv8MBL_BE_ARMCC">
1125       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1126       <require condition="ARMv8MBL_ARMCC"/>
1127       <require Dendian="Big-endian"/>
1128     </condition>
1129
1130     <condition id="ARMv8MML_ARMCC">
1131       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1132       <require condition="ARMv8MML"/>
1133       <require Tcompiler="ARMCC"/>
1134     </condition>
1135     <condition id="ARMv8MML_LE_ARMCC">
1136       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1137       <require condition="ARMv8MML_ARMCC"/>
1138       <require Dendian="Little-endian"/>
1139     </condition>
1140     <condition id="ARMv8MML_BE_ARMCC">
1141       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1142       <require condition="ARMv8MML_ARMCC"/>
1143       <require Dendian="Big-endian"/>
1144     </condition>
1145
1146     <condition id="ARMv8MML_FP_ARMCC">
1147       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1148       <require condition="ARMv8MML_FP"/>
1149       <require Tcompiler="ARMCC"/>
1150     </condition>
1151     <condition id="ARMv8MML_FP_LE_ARMCC">
1152       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1153       <require condition="ARMv8MML_FP_ARMCC"/>
1154       <require Dendian="Little-endian"/>
1155     </condition>
1156     <condition id="ARMv8MML_FP_BE_ARMCC">
1157       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1158       <require condition="ARMv8MML_FP_ARMCC"/>
1159       <require Dendian="Big-endian"/>
1160     </condition>
1161
1162     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1163       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1164       <require condition="ARMv8MML_NODSP_NOFPU"/>
1165       <require Tcompiler="ARMCC"/>
1166     </condition>
1167     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1168       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1169       <require condition="ARMv8MML_DSP_NOFPU"/>
1170       <require Tcompiler="ARMCC"/>
1171     </condition>
1172     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1173       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1174       <require condition="ARMv8MML_NODSP_SP"/>
1175       <require Tcompiler="ARMCC"/>
1176     </condition>
1177     <condition id="ARMv8MML_DSP_SP_ARMCC">
1178       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1179       <require condition="ARMv8MML_DSP_SP"/>
1180       <require Tcompiler="ARMCC"/>
1181     </condition>
1182     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1183       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1184       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1185       <require Dendian="Little-endian"/>
1186     </condition>
1187     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1188       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1189       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1190       <require Dendian="Little-endian"/>
1191     </condition>
1192     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1193       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1194       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1195       <require Dendian="Little-endian"/>
1196     </condition>
1197     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1198       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1199       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1200       <require Dendian="Little-endian"/>
1201     </condition>
1202
1203     <!-- GCC compiler -->
1204     <condition id="CA_GCC">
1205       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1206       <require condition="ARMv7-A Device"/>
1207       <require Tcompiler="GCC"/>
1208     </condition>
1209
1210     <condition id="CM0_GCC">
1211       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1212       <require condition="CM0"/>
1213       <require Tcompiler="GCC"/>
1214     </condition>
1215     <condition id="CM0_LE_GCC">
1216       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1217       <require condition="CM0_GCC"/>
1218       <require Dendian="Little-endian"/>
1219     </condition>
1220     <condition id="CM0_BE_GCC">
1221       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1222       <require condition="CM0_GCC"/>
1223       <require Dendian="Big-endian"/>
1224     </condition>
1225
1226     <condition id="CM3_GCC">
1227       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1228       <require condition="CM3"/>
1229       <require Tcompiler="GCC"/>
1230     </condition>
1231     <condition id="CM3_LE_GCC">
1232       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1233       <require condition="CM3_GCC"/>
1234       <require Dendian="Little-endian"/>
1235     </condition>
1236     <condition id="CM3_BE_GCC">
1237       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1238       <require condition="CM3_GCC"/>
1239       <require Dendian="Big-endian"/>
1240     </condition>
1241
1242     <condition id="CM4_GCC">
1243       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1244       <require condition="CM4"/>
1245       <require Tcompiler="GCC"/>
1246     </condition>
1247     <condition id="CM4_LE_GCC">
1248       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1249       <require condition="CM4_GCC"/>
1250       <require Dendian="Little-endian"/>
1251     </condition>
1252     <condition id="CM4_BE_GCC">
1253       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1254       <require condition="CM4_GCC"/>
1255       <require Dendian="Big-endian"/>
1256     </condition>
1257
1258     <condition id="CM4_FP_GCC">
1259       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1260       <require condition="CM4_FP"/>
1261       <require Tcompiler="GCC"/>
1262     </condition>
1263     <condition id="CM4_FP_LE_GCC">
1264       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1265       <require condition="CM4_FP_GCC"/>
1266       <require Dendian="Little-endian"/>
1267     </condition>
1268     <condition id="CM4_FP_BE_GCC">
1269       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1270       <require condition="CM4_FP_GCC"/>
1271       <require Dendian="Big-endian"/>
1272     </condition>
1273
1274     <condition id="CM7_GCC">
1275       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1276       <require condition="CM7"/>
1277       <require Tcompiler="GCC"/>
1278     </condition>
1279     <condition id="CM7_LE_GCC">
1280       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1281       <require condition="CM7_GCC"/>
1282       <require Dendian="Little-endian"/>
1283     </condition>
1284     <condition id="CM7_BE_GCC">
1285       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1286       <require condition="CM7_GCC"/>
1287       <require Dendian="Big-endian"/>
1288     </condition>
1289
1290     <condition id="CM7_FP_GCC">
1291       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1292       <require condition="CM7_FP"/>
1293       <require Tcompiler="GCC"/>
1294     </condition>
1295     <condition id="CM7_FP_LE_GCC">
1296       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1297       <require condition="CM7_FP_GCC"/>
1298       <require Dendian="Little-endian"/>
1299     </condition>
1300     <condition id="CM7_FP_BE_GCC">
1301       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1302       <require condition="CM7_FP_GCC"/>
1303       <require Dendian="Big-endian"/>
1304     </condition>
1305
1306     <condition id="CM7_SP_GCC">
1307       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1308       <require condition="CM7_SP"/>
1309       <require Tcompiler="GCC"/>
1310     </condition>
1311     <condition id="CM7_SP_LE_GCC">
1312       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1313       <require condition="CM7_SP_GCC"/>
1314       <require Dendian="Little-endian"/>
1315     </condition>
1316     <condition id="CM7_SP_BE_GCC">
1317       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1318       <require condition="CM7_SP_GCC"/>
1319       <require Dendian="Big-endian"/>
1320     </condition>
1321
1322     <condition id="CM7_DP_GCC">
1323       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1324       <require condition="CM7_DP"/>
1325       <require Tcompiler="GCC"/>
1326     </condition>
1327     <condition id="CM7_DP_LE_GCC">
1328       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1329       <require condition="CM7_DP_GCC"/>
1330       <require Dendian="Little-endian"/>
1331     </condition>
1332     <condition id="CM7_DP_BE_GCC">
1333       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1334       <require condition="CM7_DP_GCC"/>
1335       <require Dendian="Big-endian"/>
1336     </condition>
1337
1338     <condition id="CM23_GCC">
1339       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1340       <require condition="CM23"/>
1341       <require Tcompiler="GCC"/>
1342     </condition>
1343     <condition id="CM23_LE_GCC">
1344       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1345       <require condition="CM23_GCC"/>
1346       <require Dendian="Little-endian"/>
1347     </condition>
1348     <condition id="CM23_BE_GCC">
1349       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1350       <require condition="CM23_GCC"/>
1351       <require Dendian="Big-endian"/>
1352     </condition>
1353
1354     <condition id="CM33_GCC">
1355       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1356       <require condition="CM33"/>
1357       <require Tcompiler="GCC"/>
1358     </condition>
1359     <condition id="CM33_LE_GCC">
1360       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1361       <require condition="CM33_GCC"/>
1362       <require Dendian="Little-endian"/>
1363     </condition>
1364     <condition id="CM33_BE_GCC">
1365       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1366       <require condition="CM33_GCC"/>
1367       <require Dendian="Big-endian"/>
1368     </condition>
1369
1370     <condition id="CM33_FP_GCC">
1371       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1372       <require condition="CM33_FP"/>
1373       <require Tcompiler="GCC"/>
1374     </condition>
1375     <condition id="CM33_FP_LE_GCC">
1376       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1377       <require condition="CM33_FP_GCC"/>
1378       <require Dendian="Little-endian"/>
1379     </condition>
1380     <condition id="CM33_FP_BE_GCC">
1381       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1382       <require condition="CM33_FP_GCC"/>
1383       <require Dendian="Big-endian"/>
1384     </condition>
1385
1386     <condition id="CM33_NODSP_NOFPU_GCC">
1387       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1388       <require condition="CM33_NODSP_NOFPU"/>
1389       <require Tcompiler="GCC"/>
1390     </condition>
1391     <condition id="CM33_DSP_NOFPU_GCC">
1392       <description>CM33, DSP, no FPU, GCC Compiler</description>
1393       <require condition="CM33_DSP_NOFPU"/>
1394       <require Tcompiler="GCC"/>
1395     </condition>
1396     <condition id="CM33_NODSP_SP_GCC">
1397       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1398       <require condition="CM33_NODSP_SP"/>
1399       <require Tcompiler="GCC"/>
1400     </condition>
1401     <condition id="CM33_DSP_SP_GCC">
1402       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1403       <require condition="CM33_DSP_SP"/>
1404       <require Tcompiler="GCC"/>
1405     </condition>
1406     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1407       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1408       <require condition="CM33_NODSP_NOFPU_GCC"/>
1409       <require Dendian="Little-endian"/>
1410     </condition>
1411     <condition id="CM33_DSP_NOFPU_LE_GCC">
1412       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1413       <require condition="CM33_DSP_NOFPU_GCC"/>
1414       <require Dendian="Little-endian"/>
1415     </condition>
1416     <condition id="CM33_NODSP_SP_LE_GCC">
1417       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1418       <require condition="CM33_NODSP_SP_GCC"/>
1419       <require Dendian="Little-endian"/>
1420     </condition>
1421     <condition id="CM33_DSP_SP_LE_GCC">
1422       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1423       <require condition="CM33_DSP_SP_GCC"/>
1424       <require Dendian="Little-endian"/>
1425     </condition>
1426
1427     <condition id="ARMv8MBL_GCC">
1428       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1429       <require condition="ARMv8MBL"/>
1430       <require Tcompiler="GCC"/>
1431     </condition>
1432     <condition id="ARMv8MBL_LE_GCC">
1433       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1434       <require condition="ARMv8MBL_GCC"/>
1435       <require Dendian="Little-endian"/>
1436     </condition>
1437     <condition id="ARMv8MBL_BE_GCC">
1438       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1439       <require condition="ARMv8MBL_GCC"/>
1440       <require Dendian="Big-endian"/>
1441     </condition>
1442
1443     <condition id="ARMv8MML_GCC">
1444       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1445       <require condition="ARMv8MML"/>
1446       <require Tcompiler="GCC"/>
1447     </condition>
1448     <condition id="ARMv8MML_LE_GCC">
1449       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1450       <require condition="ARMv8MML_GCC"/>
1451       <require Dendian="Little-endian"/>
1452     </condition>
1453     <condition id="ARMv8MML_BE_GCC">
1454       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1455       <require condition="ARMv8MML_GCC"/>
1456       <require Dendian="Big-endian"/>
1457     </condition>
1458
1459     <condition id="ARMv8MML_FP_GCC">
1460       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1461       <require condition="ARMv8MML_FP"/>
1462       <require Tcompiler="GCC"/>
1463     </condition>
1464     <condition id="ARMv8MML_FP_LE_GCC">
1465       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1466       <require condition="ARMv8MML_FP_GCC"/>
1467       <require Dendian="Little-endian"/>
1468     </condition>
1469     <condition id="ARMv8MML_FP_BE_GCC">
1470       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1471       <require condition="ARMv8MML_FP_GCC"/>
1472       <require Dendian="Big-endian"/>
1473     </condition>
1474
1475     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1476       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1477       <require condition="ARMv8MML_NODSP_NOFPU"/>
1478       <require Tcompiler="GCC"/>
1479     </condition>
1480     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1481       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1482       <require condition="ARMv8MML_DSP_NOFPU"/>
1483       <require Tcompiler="GCC"/>
1484     </condition>
1485     <condition id="ARMv8MML_NODSP_SP_GCC">
1486       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1487       <require condition="ARMv8MML_NODSP_SP"/>
1488       <require Tcompiler="GCC"/>
1489     </condition>
1490     <condition id="ARMv8MML_DSP_SP_GCC">
1491       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1492       <require condition="ARMv8MML_DSP_SP"/>
1493       <require Tcompiler="GCC"/>
1494     </condition>
1495     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1496       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1497       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1498       <require Dendian="Little-endian"/>
1499     </condition>
1500     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1501       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1502       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1503       <require Dendian="Little-endian"/>
1504     </condition>
1505     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1506       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1507       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1508       <require Dendian="Little-endian"/>
1509     </condition>
1510     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1511       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1512       <require condition="ARMv8MML_DSP_SP_GCC"/>
1513       <require Dendian="Little-endian"/>
1514     </condition>
1515
1516     <!-- IAR compiler -->
1517     <condition id="CA_IAR">
1518       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1519       <require condition="ARMv7-A Device"/>
1520       <require Tcompiler="IAR"/>
1521     </condition>
1522
1523     <condition id="CM0_IAR">
1524       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1525       <require condition="CM0"/>
1526       <require Tcompiler="IAR"/>
1527     </condition>
1528     <condition id="CM0_LE_IAR">
1529       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1530       <require condition="CM0_IAR"/>
1531       <require Dendian="Little-endian"/>
1532     </condition>
1533     <condition id="CM0_BE_IAR">
1534       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1535       <require condition="CM0_IAR"/>
1536       <require Dendian="Big-endian"/>
1537     </condition>
1538
1539     <condition id="CM3_IAR">
1540       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1541       <require condition="CM3"/>
1542       <require Tcompiler="IAR"/>
1543     </condition>
1544     <condition id="CM3_LE_IAR">
1545       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1546       <require condition="CM3_IAR"/>
1547       <require Dendian="Little-endian"/>
1548     </condition>
1549     <condition id="CM3_BE_IAR">
1550       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1551       <require condition="CM3_IAR"/>
1552       <require Dendian="Big-endian"/>
1553     </condition>
1554
1555     <condition id="CM4_IAR">
1556       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1557       <require condition="CM4"/>
1558       <require Tcompiler="IAR"/>
1559     </condition>
1560     <condition id="CM4_LE_IAR">
1561       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1562       <require condition="CM4_IAR"/>
1563       <require Dendian="Little-endian"/>
1564     </condition>
1565     <condition id="CM4_BE_IAR">
1566       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1567       <require condition="CM4_IAR"/>
1568       <require Dendian="Big-endian"/>
1569     </condition>
1570
1571     <condition id="CM4_FP_IAR">
1572       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1573       <require condition="CM4_FP"/>
1574       <require Tcompiler="IAR"/>
1575     </condition>
1576     <condition id="CM4_FP_LE_IAR">
1577       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1578       <require condition="CM4_FP_IAR"/>
1579       <require Dendian="Little-endian"/>
1580     </condition>
1581     <condition id="CM4_FP_BE_IAR">
1582       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1583       <require condition="CM4_FP_IAR"/>
1584       <require Dendian="Big-endian"/>
1585     </condition>
1586
1587     <condition id="CM7_IAR">
1588       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1589       <require condition="CM7"/>
1590       <require Tcompiler="IAR"/>
1591     </condition>
1592     <condition id="CM7_LE_IAR">
1593       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1594       <require condition="CM7_IAR"/>
1595       <require Dendian="Little-endian"/>
1596     </condition>
1597     <condition id="CM7_BE_IAR">
1598       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1599       <require condition="CM7_IAR"/>
1600       <require Dendian="Big-endian"/>
1601     </condition>
1602
1603     <condition id="CM7_FP_IAR">
1604       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1605       <require condition="CM7_FP"/>
1606       <require Tcompiler="IAR"/>
1607     </condition>
1608     <condition id="CM7_FP_LE_IAR">
1609       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1610       <require condition="CM7_FP_IAR"/>
1611       <require Dendian="Little-endian"/>
1612     </condition>
1613     <condition id="CM7_FP_BE_IAR">
1614       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1615       <require condition="CM7_FP_IAR"/>
1616       <require Dendian="Big-endian"/>
1617     </condition>
1618
1619     <condition id="CM7_SP_IAR">
1620       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1621       <require condition="CM7_SP"/>
1622       <require Tcompiler="IAR"/>
1623     </condition>
1624     <condition id="CM7_SP_LE_IAR">
1625       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1626       <require condition="CM7_SP_IAR"/>
1627       <require Dendian="Little-endian"/>
1628     </condition>
1629     <condition id="CM7_SP_BE_IAR">
1630       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1631       <require condition="CM7_SP_IAR"/>
1632       <require Dendian="Big-endian"/>
1633     </condition>
1634
1635     <condition id="CM7_DP_IAR">
1636       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1637       <require condition="CM7_DP"/>
1638       <require Tcompiler="IAR"/>
1639     </condition>
1640     <condition id="CM7_DP_LE_IAR">
1641       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1642       <require condition="CM7_DP_IAR"/>
1643       <require Dendian="Little-endian"/>
1644     </condition>
1645     <condition id="CM7_DP_BE_IAR">
1646       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1647       <require condition="CM7_DP_IAR"/>
1648       <require Dendian="Big-endian"/>
1649     </condition>
1650
1651     <!-- conditions selecting single devices and CMSIS Core -->
1652     <!-- used for component startup, GCC version is used for C-Startup -->
1653     <condition id="ARMCM0 CMSIS">
1654       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1655       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1656       <require Cclass="CMSIS" Cgroup="CORE"/>
1657     </condition>
1658     <condition id="ARMCM0 CMSIS GCC">
1659       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1660       <require condition="ARMCM0 CMSIS"/>
1661       <require condition="GCC"/>
1662     </condition>
1663
1664     <condition id="ARMCM0+ CMSIS">
1665       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1666       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1667       <require Cclass="CMSIS" Cgroup="CORE"/>
1668     </condition>
1669     <condition id="ARMCM0+ CMSIS GCC">
1670       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1671       <require condition="ARMCM0+ CMSIS"/>
1672       <require condition="GCC"/>
1673     </condition>
1674
1675     <condition id="ARMCM3 CMSIS">
1676       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1677       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1678       <require Cclass="CMSIS" Cgroup="CORE"/>
1679     </condition>
1680     <condition id="ARMCM3 CMSIS GCC">
1681       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1682       <require condition="ARMCM3 CMSIS"/>
1683       <require condition="GCC"/>
1684     </condition>
1685
1686     <condition id="ARMCM4 CMSIS">
1687       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1688       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1689       <require Cclass="CMSIS" Cgroup="CORE"/>
1690     </condition>
1691     <condition id="ARMCM4 CMSIS GCC">
1692       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1693       <require condition="ARMCM4 CMSIS"/>
1694       <require condition="GCC"/>
1695     </condition>
1696
1697     <condition id="ARMCM7 CMSIS">
1698       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1699       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1700       <require Cclass="CMSIS" Cgroup="CORE"/>
1701     </condition>
1702     <condition id="ARMCM7 CMSIS GCC">
1703       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1704       <require condition="ARMCM7 CMSIS"/>
1705       <require condition="GCC"/>
1706     </condition>
1707
1708     <condition id="ARMCM23 CMSIS">
1709       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1710       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1711       <require Cclass="CMSIS" Cgroup="CORE"/>
1712     </condition>
1713     <condition id="ARMCM23 CMSIS GCC">
1714       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1715       <require condition="ARMCM23 CMSIS"/>
1716       <require condition="GCC"/>
1717     </condition>
1718
1719     <condition id="ARMCM33 CMSIS">
1720       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1721       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1722       <require Cclass="CMSIS" Cgroup="CORE"/>
1723     </condition>
1724     <condition id="ARMCM33 CMSIS GCC">
1725       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1726       <require condition="ARMCM33 CMSIS"/>
1727       <require condition="GCC"/>
1728     </condition>
1729
1730     <condition id="ARMSC000 CMSIS">
1731       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1732       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1733       <require Cclass="CMSIS" Cgroup="CORE"/>
1734     </condition>
1735     <condition id="ARMSC000 CMSIS GCC">
1736       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1737       <require condition="ARMSC000 CMSIS"/>
1738       <require condition="GCC"/>
1739     </condition>
1740
1741     <condition id="ARMSC300 CMSIS">
1742       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1743       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1744       <require Cclass="CMSIS" Cgroup="CORE"/>
1745     </condition>
1746     <condition id="ARMSC300 CMSIS GCC">
1747       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1748       <require condition="ARMSC300 CMSIS"/>
1749       <require condition="GCC"/>
1750     </condition>
1751
1752     <condition id="ARMv8MBL CMSIS">
1753       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1754       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1755       <require Cclass="CMSIS" Cgroup="CORE"/>
1756     </condition>
1757     <condition id="ARMv8MBL CMSIS GCC">
1758       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1759       <require condition="ARMv8MBL CMSIS"/>
1760       <require condition="GCC"/>
1761     </condition>
1762
1763     <condition id="ARMv8MML CMSIS">
1764       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1765       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1766       <require Cclass="CMSIS" Cgroup="CORE"/>
1767     </condition>
1768     <condition id="ARMv8MML CMSIS GCC">
1769       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1770       <require condition="ARMv8MML CMSIS"/>
1771       <require condition="GCC"/>
1772     </condition>
1773
1774     <condition id="ARMCA5 CMSIS">
1775       <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1776       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1777       <require Cclass="CMSIS" Cgroup="CORE"/>
1778     </condition>
1779
1780     <condition id="ARMCA7 CMSIS">
1781       <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1782       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1783       <require Cclass="CMSIS" Cgroup="CORE"/>
1784     </condition>
1785
1786     <condition id="ARMCA9 CMSIS">
1787       <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1788       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1789       <require Cclass="CMSIS" Cgroup="CORE"/>
1790     </condition>
1791
1792     <!-- CMSIS DSP -->
1793     <condition id="CMSIS DSP">
1794       <description>Components required for DSP</description>
1795       <require condition="ARMv6_7_8-M Device"/>
1796       <require condition="ARMCC GCC"/>
1797       <require Cclass="CMSIS" Cgroup="CORE"/>
1798     </condition>
1799
1800     <!-- RTOS RTX -->
1801     <condition id="RTOS RTX">
1802       <description>Components required for RTOS RTX</description>
1803       <require condition="ARMv6_7-M Device"/>
1804       <require condition="ARMCC GCC IAR"/>
1805       <require Cclass="Device" Cgroup="Startup"/>
1806       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1807     </condition>
1808     <condition id="RTOS RTX IFX">
1809       <description>Components required for RTOS RTX IFX</description>
1810       <require condition="ARMv6_7-M Device"/>
1811       <require condition="ARMCC GCC IAR"/>
1812       <require Dvendor="Infineon:7" Dname="XMC4*"/>
1813       <require Cclass="Device" Cgroup="Startup"/>
1814       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1815     </condition>
1816     <condition id="RTOS RTX5">
1817       <description>Components required for RTOS RTX5</description>
1818       <require condition="ARMv6_7_8-M Device"/>
1819       <require condition="ARMCC GCC IAR"/>
1820       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1821     </condition>
1822     <condition id="RTOS2 RTX5">
1823       <description>Components required for RTOS2 RTX5</description>
1824       <require condition="ARMv6_7_8-M Device"/>
1825       <require condition="ARMCC GCC IAR"/>
1826       <require Cclass="CMSIS"  Cgroup="CORE"/>
1827       <require Cclass="Device" Cgroup="Startup"/>
1828     </condition>
1829     <condition id="RTOS2 RTX5 v7-A">
1830       <description>Components required for RTOS2 RTX5 v7-A</description>
1831       <require condition="ARMv7-A Device"/>
1832       <require condition="ARMCC GCC IAR"/>
1833       <require Cclass="CMSIS"  Cgroup="CORE"/>
1834       <require Cclass="Device" Cgroup="Startup"/>
1835       <require Cclass="Device" Cgroup="OS Tick"/>
1836       <require Cclass="Device" Cgroup="IRQ Controller"/>
1837     </condition>
1838     <condition id="RTOS2 RTX5 Lib">
1839       <description>Components required for RTOS2 RTX5 Library</description>
1840       <require condition="ARMv6_7_8-M Device"/>
1841       <require condition="ARMCC GCC IAR"/>
1842       <require Cclass="CMSIS"  Cgroup="CORE"/>
1843       <require Cclass="Device" Cgroup="Startup"/>
1844     </condition>
1845     <condition id="RTOS2 RTX5 NS">
1846       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1847       <require condition="ARMv8-M TZ Device"/>
1848       <require condition="ARMCC GCC"/>
1849       <require Cclass="CMSIS"  Cgroup="CORE"/>
1850       <require Cclass="Device" Cgroup="Startup"/>
1851     </condition>
1852
1853     <!-- OS Tick -->
1854     <condition id="OS Tick PTIM">
1855       <description>Components required for OS Tick Private Timer</description>
1856       <require condition="CA5_CA9"/>
1857       <require Cclass="Device" Cgroup="IRQ Controller"/>
1858     </condition>
1859
1860     <condition id="OS Tick GTIM">
1861       <description>Components required for OS Tick Generic Physical Timer</description>
1862       <require condition="CA7"/>
1863       <require Cclass="Device" Cgroup="IRQ Controller"/>
1864     </condition>
1865
1866   </conditions>
1867
1868   <components>
1869     <!-- CMSIS-Core component -->
1870     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.2"  condition="ARMv6_7_8-M Device" >
1871       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1872       <files>
1873         <!-- CPU independent -->
1874         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1875         <file category="include" name="CMSIS/Include/"/>
1876         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1877         <!-- Code template -->
1878         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1879         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1880       </files>
1881     </component>
1882
1883     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.0"  condition="ARMv7-A Device" >
1884       <description>CMSIS-CORE for Cortex-A</description>
1885       <files>
1886         <!-- CPU independent -->
1887         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
1888         <file category="include" name="CMSIS/Core_A/Include/"/>
1889       </files>
1890     </component>
1891
1892     <!-- CMSIS-Startup components -->
1893     <!-- Cortex-M0 -->
1894     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1895       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1896       <files>
1897         <!-- include folder / device header file -->
1898         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1899         <!-- startup / system file -->
1900         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1901         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1902         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1903         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1904         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1905       </files>
1906     </component>
1907     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1908       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1909       <files>
1910         <!-- include folder / device header file -->
1911         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1912         <!-- startup / system file -->
1913         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1914         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1915         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1916       </files>
1917     </component>
1918
1919     <!-- Cortex-M0+ -->
1920     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1921       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1922       <files>
1923         <!-- include folder / device header file -->
1924         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1925         <!-- startup / system file -->
1926         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1927         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1928         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1929         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1930         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1931       </files>
1932     </component>
1933     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1934       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1935       <files>
1936         <!-- include folder / device header file -->
1937         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1938         <!-- startup / system file -->
1939         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1940         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1941         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1942       </files>
1943     </component>
1944
1945     <!-- Cortex-M3 -->
1946     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1947       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1948       <files>
1949         <!-- include folder / device header file -->
1950         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1951         <!-- startup / system file -->
1952         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1953         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1954         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1955         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1956         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1957       </files>
1958     </component>
1959     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1960       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1961       <files>
1962         <!-- include folder / device header file -->
1963         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1964         <!-- startup / system file -->
1965         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1966         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1967         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1968       </files>
1969     </component>
1970
1971     <!-- Cortex-M4 -->
1972     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1973       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1974       <files>
1975         <!-- include folder / device header file -->
1976         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1977         <!-- startup / system file -->
1978         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1979         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1980         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1981         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1982         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1983       </files>
1984     </component>
1985     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1986       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1987       <files>
1988         <!-- include folder / device header file -->
1989         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1990         <!-- startup / system file -->
1991         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1992         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1993         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1994       </files>
1995     </component>
1996
1997     <!-- Cortex-M7 -->
1998     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
1999       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2000       <files>
2001         <!-- include folder / device header file -->
2002         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2003         <!-- startup / system file -->
2004         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2005         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2006         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2007         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2008         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2009       </files>
2010     </component>
2011     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2012       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2013       <files>
2014         <!-- include folder / device header file -->
2015         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2016         <!-- startup / system file -->
2017         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2018         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2019         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2020       </files>
2021     </component>
2022
2023     <!-- Cortex-M23 -->
2024     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2025       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2026       <files>
2027         <!-- include folder / device header file -->
2028         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2029         <!-- startup / system file -->
2030         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2031         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2032         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2033         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2034         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2035         <!-- SAU configuration -->
2036         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2037       </files>
2038     </component>
2039     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2040       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2041       <files>
2042         <!-- include folder / device header file -->
2043         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2044         <!-- startup / system file -->
2045         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2046         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2047         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2048         <!-- SAU configuration -->
2049         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2050       </files>
2051     </component>
2052
2053     <!-- Cortex-M33 -->
2054     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2055       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2056       <files>
2057         <!-- include folder / device header file -->
2058         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2059         <!-- startup / system file -->
2060         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2061         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2062         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2063         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2064         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2065         <!-- SAU configuration -->
2066         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2067       </files>
2068     </component>
2069     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2070       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2071       <files>
2072         <!-- include folder / device header file -->
2073         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2074         <!-- startup / system file -->
2075         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2076         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2077         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2078         <!-- SAU configuration -->
2079         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2080       </files>
2081     </component>
2082
2083     <!-- Cortex-SC000 -->
2084     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2085       <description>System and Startup for Generic ARM SC000 device</description>
2086       <files>
2087         <!-- include folder / device header file -->
2088         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2089         <!-- startup / system file -->
2090         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2091         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2092         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2093         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2094         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2095       </files>
2096     </component>
2097     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2098       <description>System and Startup for Generic ARM SC000 device</description>
2099       <files>
2100         <!-- include folder / device header file -->
2101         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2102         <!-- startup / system file -->
2103         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2104         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2105         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2106       </files>
2107     </component>
2108
2109     <!-- Cortex-SC300 -->
2110     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2111       <description>System and Startup for Generic ARM SC300 device</description>
2112       <files>
2113         <!-- include folder / device header file -->
2114         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2115         <!-- startup / system file -->
2116         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2117         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2118         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2119         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2120         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2121       </files>
2122     </component>
2123     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2124       <description>System and Startup for Generic ARM SC300 device</description>
2125       <files>
2126         <!-- include folder / device header file -->
2127         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2128         <!-- startup / system file -->
2129         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2130         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2131         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2132       </files>
2133     </component>
2134
2135     <!-- ARMv8MBL -->
2136     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2137       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2138       <files>
2139         <!-- include folder / device header file -->
2140         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2141         <!-- startup / system file -->
2142         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2143         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2144         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2145         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2146         <!-- SAU configuration -->
2147         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2148       </files>
2149     </component>
2150     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2151       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2152       <files>
2153         <!-- include folder / device header file -->
2154         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2155         <!-- startup / system file -->
2156         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2157         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2158         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2159         <!-- SAU configuration -->
2160         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2161       </files>
2162     </component>
2163
2164     <!-- ARMv8MML -->
2165     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2166       <description>System and Startup for Generic ARM ARMv8MML device</description>
2167       <files>
2168         <!-- include folder / device header file -->
2169         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2170         <!-- startup / system file -->
2171         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2172         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2173         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2174         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2175         <!-- SAU configuration -->
2176         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2177       </files>
2178     </component>
2179     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2180       <description>System and Startup for Generic ARM ARMv8MML device</description>
2181       <files>
2182         <!-- include folder / device header file -->
2183         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2184         <!-- startup / system file -->
2185         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2186         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2187         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2188         <!-- SAU configuration -->
2189         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2190       </files>
2191     </component>
2192
2193     <!-- Cortex-A5 -->
2194     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2195       <description>System and Startup for Generic ARM Cortex-A5 device</description>
2196       <files>
2197         <!-- include folder / device header file -->
2198         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2199         <!-- startup / system / mmu files -->
2200         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2201         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2202         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2203         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2204         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2205         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2206         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2207         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2208         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2209         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2210
2211       </files>
2212     </component>
2213
2214     <!-- Cortex-A7 -->
2215     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2216       <description>System and Startup for Generic ARM Cortex-A7 device</description>
2217       <files>
2218         <!-- include folder / device header file -->
2219         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2220         <!-- startup / system / mmu files -->
2221         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2222         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2223         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2224         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2225         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2226         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2227         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2228         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2229         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2230         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2231       </files>
2232     </component>
2233
2234     <!-- Cortex-A9 -->
2235     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2236       <description>System and Startup for Generic ARM Cortex-A9 device</description>
2237       <files>
2238         <!-- include folder / device header file -->
2239         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2240         <!-- startup / system / mmu files -->
2241         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2242         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2243         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2244         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2245         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2246         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2247         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2248         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2249         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2250         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2251       </files>
2252     </component>
2253
2254     <!-- IRQ Controller -->
2255     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.0" condition="ARMv7-A Device">
2256       <description>IRQ Controller implementation using GIC</description>
2257       <files>
2258         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2259       </files>
2260     </component>
2261
2262     <!-- OS Tick -->
2263     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick PTIM">
2264       <description>OS Tick implementation using Private Timer</description>
2265       <files>
2266         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2267       </files>
2268     </component>
2269
2270     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.0" Cversion="1.0.0" condition="OS Tick GTIM">
2271       <description>OS Tick implementation using Generic Physical Timer</description>
2272       <files>
2273         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2274       </files>
2275     </component>
2276
2277     <!-- CMSIS-DSP component -->
2278     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2279       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2280       <files>
2281         <!-- CPU independent -->
2282         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2283         <file category="header" name="CMSIS/Include/arm_math.h"/>
2284
2285         <!-- CPU and Compiler dependent -->
2286         <!-- ARMCC -->
2287         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2288         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2289         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2290         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2291         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2292         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2293         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2294         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2295         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2296         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2297         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2298         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2299         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2300         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2301
2302         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2303         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2304         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2305         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2306         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2307         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2308         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2309         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2310         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2311         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2312         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2313         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2314
2315         <!-- GCC -->
2316         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2317         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2318         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2319         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2320         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2321         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2322         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2323
2324         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2325         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2326         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2327         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2328         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2329         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2330         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2331         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2332         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2333         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2334         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2335         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2336
2337       </files>
2338     </component>
2339
2340     <!-- CMSIS-RTOS Keil RTX component -->
2341     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2342       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2343       <RTE_Components_h>
2344         <!-- the following content goes into file 'RTE_Components.h' -->
2345         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2346         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2347       </RTE_Components_h>
2348       <files>
2349         <!-- CPU independent -->
2350         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2351         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2352         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2353
2354         <!-- RTX templates -->
2355         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2356         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2357         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2358         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2359         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2360         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2361         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2362         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2363         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2364         <!-- tool-chain specific template file -->
2365         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2366         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2367         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2368
2369         <!-- CPU and Compiler dependent -->
2370         <!-- ARMCC -->
2371         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2372         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2373         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2374         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2375         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2376         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2377         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2378         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2379         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2380         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2381         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2382         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2383         <!-- GCC -->
2384         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2385         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2386         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2387         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2388         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2389         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2390         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2391         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2392         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2393         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2394         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2395         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2396         <!-- IAR -->
2397         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2398         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2399         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2400         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2401         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2402         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2403         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2404         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2405         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2406         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2407         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2408         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2409       </files>
2410     </component>
2411     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2412     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2413       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2414       <RTE_Components_h>
2415         <!-- the following content goes into file 'RTE_Components.h' -->
2416         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2417         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2418       </RTE_Components_h>
2419       <files>
2420         <!-- CPU independent -->
2421         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2422         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2423         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2424
2425         <!-- RTX templates -->
2426         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2427         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2428         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2429         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2430         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2431         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2432         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2433         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2434         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2435         <!-- tool-chain specific template file -->
2436         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2437         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2438         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2439
2440         <!-- CPU and Compiler dependent -->
2441         <!-- ARMCC -->
2442         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2443         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2444         <!-- GCC -->
2445         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2446         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2447         <!-- IAR -->
2448       </files>
2449     </component>
2450
2451     <!-- CMSIS-RTOS Keil RTX5 component -->
2452     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.2" Capiversion="1.0.0" condition="RTOS RTX5">
2453       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2454       <RTE_Components_h>
2455         <!-- the following content goes into file 'RTE_Components.h' -->
2456         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2457         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2458       </RTE_Components_h>
2459       <files>
2460         <!-- RTX header file -->
2461         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2462         <!-- RTX compatibility module for API V1 -->
2463         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2464       </files>
2465     </component>
2466
2467     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2468     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.2" Capiversion="2.1.1" condition="RTOS2 RTX5 Lib">
2469       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2470       <RTE_Components_h>
2471         <!-- the following content goes into file 'RTE_Components.h' -->
2472         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2473         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2474       </RTE_Components_h>
2475       <files>
2476         <!-- RTX documentation -->
2477         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2478
2479         <!-- RTX header files -->
2480         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2481
2482         <!-- RTX configuration -->
2483         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2484         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2485
2486         <!-- RTX templates -->
2487         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2488         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2489         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2490         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2491         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2492         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2493         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2494         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2495         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2496         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2497
2498         <!-- RTX library configuration -->
2499         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2500
2501         <!-- RTX libraries (CPU and Compiler dependent) -->
2502         <!-- ARMCC -->
2503         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2504         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2505         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2506         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2507         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2508         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2509         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2510         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2511         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2512         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2513         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2514         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2515         <!-- GCC -->
2516         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2517         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2518         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2519         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2520         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2521         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2522         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2523         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2524         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2525         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2526         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2527         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2528         <!-- IAR -->
2529         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2530         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2531         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2532         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2533         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2534         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2535       </files>
2536     </component>
2537     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.2" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
2538       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2539       <RTE_Components_h>
2540         <!-- the following content goes into file 'RTE_Components.h' -->
2541         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2542         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2543         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2544       </RTE_Components_h>
2545       <files>
2546         <!-- RTX documentation -->
2547         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2548
2549         <!-- RTX header files -->
2550         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2551
2552         <!-- RTX configuration -->
2553         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2554         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2555
2556         <!-- RTX templates -->
2557         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2558         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2559         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2560         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2561         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2562         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2563         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2564         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2565         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2566         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2567
2568         <!-- RTX library configuration -->
2569         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2570
2571         <!-- RTX libraries (CPU and Compiler dependent) -->
2572         <!-- ARMCC -->
2573         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2574         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2575         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2576         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2577         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2578         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2579         <!-- GCC -->
2580         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2581         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2582         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2583         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2584         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2585         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2586       </files>
2587     </component>
2588     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.2" Capiversion="2.1.1" condition="RTOS2 RTX5">
2589       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2590       <RTE_Components_h>
2591         <!-- the following content goes into file 'RTE_Components.h' -->
2592         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2593         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2594         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2595       </RTE_Components_h>
2596       <files>
2597         <!-- RTX documentation -->
2598         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2599
2600         <!-- RTX header files -->
2601         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2602
2603         <!-- RTX configuration -->
2604         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2605         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2606
2607         <!-- RTX templates -->
2608         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2609         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2610         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2611         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2612         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2613         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2614         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2615         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2616         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2617         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2618
2619         <!-- RTX sources (core) -->
2620         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2621         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2622         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2623         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2624         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2625         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2626         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2627         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2628         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2629         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2630         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2631         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2632         <!-- RTX sources (library configuration) -->
2633         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2634         <!-- RTX sources (handlers ARMCC) -->
2635         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2636         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2637         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2638         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2639         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2640         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2641         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2642         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2643         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2644         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2645         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2646         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2647         <!-- RTX sources (handlers GCC) -->
2648         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2649         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2650         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2651         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2652         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2653         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2654         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2655         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2656         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2657         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2658         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2659         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2660         <!-- RTX sources (handlers IAR) -->
2661         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2662         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2663         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2664         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2665         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2666         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2667         <!-- OS Tick (SysTick) -->
2668         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2669       </files>
2670     </component>
2671     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.2" Capiversion="2.1.1" condition="RTOS2 RTX5 v7-A">
2672       <description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
2673       <RTE_Components_h>
2674         <!-- the following content goes into file 'RTE_Components.h' -->
2675         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2676         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2677         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2678       </RTE_Components_h>
2679       <files>
2680         <!-- RTX documentation -->
2681         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2682
2683         <!-- RTX header files -->
2684         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2685
2686         <!-- RTX configuration -->
2687         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2688         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2689
2690         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2691
2692         <!-- RTX templates -->
2693         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2694         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2695         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2696         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2697         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2698         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2699         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2700         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2701         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2702         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2703
2704         <!-- RTX sources (core) -->
2705         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2706         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2707         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2708         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2709         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2710         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2711         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2712         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2713         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2714         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2715         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2716         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2717         <!-- RTX sources (library configuration) -->
2718         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2719         <!-- RTX sources (handlers ARMCC) -->
2720         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
2721         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
2722         <!-- RTX sources (handlers GCC) -->
2723         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
2724         <!-- RTX sources (handlers IAR) -->
2725         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
2726       </files>
2727     </component>
2728     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.2" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
2729       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2730       <RTE_Components_h>
2731         <!-- the following content goes into file 'RTE_Components.h' -->
2732         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2733         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2734         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2735         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2736       </RTE_Components_h>
2737       <files>
2738         <!-- RTX documentation -->
2739         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2740
2741         <!-- RTX header files -->
2742         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2743
2744         <!-- RTX configuration -->
2745         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2746         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2747
2748         <!-- RTX templates -->
2749         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2750         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2751         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2752         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2753         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2754         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2755         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2756         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2757         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2758         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2759
2760         <!-- RTX sources (core) -->
2761         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2762         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2763         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2764         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2765         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2766         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2767         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2768         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2769         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2770         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2771         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2772         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2773         <!-- RTX sources (library configuration) -->
2774         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2775         <!-- RTX sources (ARMCC handlers) -->
2776         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2777         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2778         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2779         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2780         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2781         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2782         <!-- RTX sources (GCC handlers) -->
2783         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2784         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2785         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2786         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2787         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2788         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2789         <!-- OS Tick (SysTick) -->
2790         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2791       </files>
2792     </component>
2793
2794   </components>
2795
2796   <boards>
2797     <board name="uVision Simulator" vendor="Keil">
2798       <description>uVision Simulator</description>
2799       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2800       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2801       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2802       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2803       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2804       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2805       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2806       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2807       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2808       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2809       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2810       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2811       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2812       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2813       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2814       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2815       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2816       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2817     </board>
2818
2819     <board name="Fixed Virtual Platform" vendor="ARM">
2820       <description>Fixed Virtual Platform</description>
2821       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
2822       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
2823       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
2824     </board>
2825   </boards>
2826
2827   <examples>
2828     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2829       <description>DSP_Lib Class Marks example</description>
2830       <board name="uVision Simulator" vendor="Keil"/>
2831       <project>
2832         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2833       </project>
2834       <attributes>
2835         <component Cclass="CMSIS" Cgroup="CORE"/>
2836         <component Cclass="CMSIS" Cgroup="DSP"/>
2837         <component Cclass="Device" Cgroup="Startup"/>
2838         <category>Getting Started</category>
2839       </attributes>
2840     </example>
2841
2842     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2843       <description>DSP_Lib Convolution example</description>
2844       <board name="uVision Simulator" vendor="Keil"/>
2845       <project>
2846         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2847       </project>
2848       <attributes>
2849         <component Cclass="CMSIS" Cgroup="CORE"/>
2850         <component Cclass="CMSIS" Cgroup="DSP"/>
2851         <component Cclass="Device" Cgroup="Startup"/>
2852         <category>Getting Started</category>
2853       </attributes>
2854     </example>
2855
2856     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2857       <description>DSP_Lib Dotproduct example</description>
2858       <board name="uVision Simulator" vendor="Keil"/>
2859       <project>
2860         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2861       </project>
2862       <attributes>
2863         <component Cclass="CMSIS" Cgroup="CORE"/>
2864         <component Cclass="CMSIS" Cgroup="DSP"/>
2865         <component Cclass="Device" Cgroup="Startup"/>
2866         <category>Getting Started</category>
2867       </attributes>
2868     </example>
2869
2870     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2871       <description>DSP_Lib FFT Bin example</description>
2872       <board name="uVision Simulator" vendor="Keil"/>
2873       <project>
2874         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2875       </project>
2876       <attributes>
2877         <component Cclass="CMSIS" Cgroup="CORE"/>
2878         <component Cclass="CMSIS" Cgroup="DSP"/>
2879         <component Cclass="Device" Cgroup="Startup"/>
2880         <category>Getting Started</category>
2881       </attributes>
2882     </example>
2883
2884     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2885       <description>DSP_Lib FIR example</description>
2886       <board name="uVision Simulator" vendor="Keil"/>
2887       <project>
2888         <environment name="uv" load="arm_fir_example.uvprojx"/>
2889       </project>
2890       <attributes>
2891         <component Cclass="CMSIS" Cgroup="CORE"/>
2892         <component Cclass="CMSIS" Cgroup="DSP"/>
2893         <component Cclass="Device" Cgroup="Startup"/>
2894         <category>Getting Started</category>
2895       </attributes>
2896     </example>
2897
2898     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2899       <description>DSP_Lib Graphic Equalizer example</description>
2900       <board name="uVision Simulator" vendor="Keil"/>
2901       <project>
2902         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2903       </project>
2904       <attributes>
2905         <component Cclass="CMSIS" Cgroup="CORE"/>
2906         <component Cclass="CMSIS" Cgroup="DSP"/>
2907         <component Cclass="Device" Cgroup="Startup"/>
2908         <category>Getting Started</category>
2909       </attributes>
2910     </example>
2911
2912     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2913       <description>DSP_Lib Linear Interpolation example</description>
2914       <board name="uVision Simulator" vendor="Keil"/>
2915       <project>
2916         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2917       </project>
2918       <attributes>
2919         <component Cclass="CMSIS" Cgroup="CORE"/>
2920         <component Cclass="CMSIS" Cgroup="DSP"/>
2921         <component Cclass="Device" Cgroup="Startup"/>
2922         <category>Getting Started</category>
2923       </attributes>
2924     </example>
2925
2926     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2927       <description>DSP_Lib Matrix example</description>
2928       <board name="uVision Simulator" vendor="Keil"/>
2929       <project>
2930         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2931       </project>
2932       <attributes>
2933         <component Cclass="CMSIS" Cgroup="CORE"/>
2934         <component Cclass="CMSIS" Cgroup="DSP"/>
2935         <component Cclass="Device" Cgroup="Startup"/>
2936         <category>Getting Started</category>
2937       </attributes>
2938     </example>
2939
2940     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2941       <description>DSP_Lib Signal Convergence example</description>
2942       <board name="uVision Simulator" vendor="Keil"/>
2943       <project>
2944         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2945       </project>
2946       <attributes>
2947         <component Cclass="CMSIS" Cgroup="CORE"/>
2948         <component Cclass="CMSIS" Cgroup="DSP"/>
2949         <component Cclass="Device" Cgroup="Startup"/>
2950         <category>Getting Started</category>
2951       </attributes>
2952     </example>
2953
2954     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2955       <description>DSP_Lib Sinus/Cosinus example</description>
2956       <board name="uVision Simulator" vendor="Keil"/>
2957       <project>
2958         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2959       </project>
2960       <attributes>
2961         <component Cclass="CMSIS" Cgroup="CORE"/>
2962         <component Cclass="CMSIS" Cgroup="DSP"/>
2963         <component Cclass="Device" Cgroup="Startup"/>
2964         <category>Getting Started</category>
2965       </attributes>
2966     </example>
2967
2968     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2969       <description>DSP_Lib Variance example</description>
2970       <board name="uVision Simulator" vendor="Keil"/>
2971       <project>
2972         <environment name="uv" load="arm_variance_example.uvprojx"/>
2973       </project>
2974       <attributes>
2975         <component Cclass="CMSIS" Cgroup="CORE"/>
2976         <component Cclass="CMSIS" Cgroup="DSP"/>
2977         <component Cclass="Device" Cgroup="Startup"/>
2978         <category>Getting Started</category>
2979       </attributes>
2980     </example>
2981
2982     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2983       <description>CMSIS-RTOS2 Blinky example</description>
2984       <board name="uVision Simulator" vendor="Keil"/>
2985       <project>
2986         <environment name="uv" load="Blinky.uvprojx"/>
2987       </project>
2988       <attributes>
2989         <component Cclass="CMSIS" Cgroup="CORE"/>
2990         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2991         <component Cclass="Device" Cgroup="Startup"/>
2992         <category>Getting Started</category>
2993       </attributes>
2994     </example>
2995
2996     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2997       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2998       <board name="uVision Simulator" vendor="Keil"/>
2999       <project>
3000         <environment name="uv" load="Blinky.uvprojx"/>
3001       </project>
3002       <attributes>
3003         <component Cclass="CMSIS" Cgroup="CORE"/>
3004         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3005         <component Cclass="Device" Cgroup="Startup"/>
3006         <category>Getting Started</category>
3007       </attributes>
3008     </example>
3009
3010     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3011       <description>CMSIS-RTOS2 Message Queue Example</description>
3012       <board name="uVision Simulator" vendor="Keil"/>
3013       <project>
3014         <environment name="uv" load="MsqQueue.uvprojx"/>
3015       </project>
3016       <attributes>
3017         <component Cclass="CMSIS" Cgroup="CORE"/>
3018         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3019         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3020         <component Cclass="Device" Cgroup="Startup"/>
3021         <category>Getting Started</category>
3022       </attributes>
3023     </example>
3024
3025     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3026       <description>CMSIS-RTOS2 Memory Pool Example</description>
3027       <board name="Fixed Virtual Platform" vendor="ARM"/>
3028       <project>
3029         <environment name="uv" load="MemPool.uvprojx"/>
3030       </project>
3031       <attributes>
3032         <component Cclass="CMSIS" Cgroup="CORE"/>
3033         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3034         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3035         <component Cclass="Device" Cgroup="Startup"/>
3036         <category>Getting Started</category>
3037       </attributes>
3038     </example>
3039
3040     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3041       <description>Bare-metal secure/non-secure example without RTOS</description>
3042       <board name="uVision Simulator" vendor="Keil"/>
3043       <project>
3044         <environment name="uv" load="NoRTOS.uvmpw"/>
3045       </project>
3046       <attributes>
3047         <component Cclass="CMSIS" Cgroup="CORE"/>
3048         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3049         <component Cclass="Device" Cgroup="Startup"/>
3050         <category>Getting Started</category>
3051       </attributes>
3052     </example>
3053
3054     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3055       <description>Secure/non-secure RTOS example with thread context management</description>
3056       <board name="uVision Simulator" vendor="Keil"/>
3057       <project>
3058         <environment name="uv" load="RTOS.uvmpw"/>
3059       </project>
3060       <attributes>
3061         <component Cclass="CMSIS" Cgroup="CORE"/>
3062         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3063         <component Cclass="Device" Cgroup="Startup"/>
3064         <category>Getting Started</category>
3065       </attributes>
3066     </example>
3067
3068     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3069       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3070       <board name="uVision Simulator" vendor="Keil"/>
3071       <project>
3072         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3073       </project>
3074       <attributes>
3075         <component Cclass="CMSIS" Cgroup="CORE"/>
3076         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3077         <component Cclass="Device" Cgroup="Startup"/>
3078         <category>Getting Started</category>
3079       </attributes>
3080     </example>
3081
3082   </examples>
3083
3084 </package>