begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.0.1-dev6">
  12       DSP:
  13        - updated to version V1.5.1.
  14        - changed copyrigth note.
  15        - added ARMv8M DSP libraries.
  16        PACK:
  17        - added taxonomy for Cclass RTOS
  18     </release>
  19     <release version="5.0.1-dev5">
  20       DSP:
  21        - updated to version V1.5.0.
  22     </release>
  23     <release version="5.0.1-dev4">
  24       DSP:
  25        - preparation for ARMv8M DSP libraries.
  26     </release>
  27     <release version="5.0.1-dev3">
  28       Updated ARMv8M Mainline FPU settings in partition*.h
  29     </release>
  30     <release version="5.0.1-dev2">
  31       CMSIS-RTOS2:
  32        - API 2.1   (see revision history for details)
  33        - RTX 5.1.0 (see revision history for details)
  34     </release>
  35     <release version="5.0.1-dev1">
  36       All C module and header files: updated removing 'http://' within license header sections flagged by MISRA as comment within comment
  37       PDSC: added new compatible devices to 'uVision Simulator' generic board description
  38       CMSIS-Pack Schema: adding
  39     </release>
  40     <release version="5.0.1-dev0">
  41       CMSIS-Core:
  42        - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  43        - Updated template for secure main function (main_s.c)
  44        - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  45       CMSIS-RTOS2:
  46        - RTX 5.0.1 (see revision history for details)
  47     </release>
  48     <release version="5.0.0" date="2016-11-11">
  49       Changed open source license to Apache 2.0
  50       CMSIS_Core:
  51        - Added support for Cortex-M23 and Cortex-M33.
  52        - Added ARMv8-M device configurations for mainline and baseline.
  53        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  54        - Added cmsis_compiler.h to unify compiler behaviour.
  55        - Updated function SCB_EnableICache (for Cortex-M7).
  56        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  57       CMSIS-RTOS:
  58         - bug fix in RTX 4.82 (see revision history for details)
  59       CMSIS-RTOS2:
  60         - new API including compatibility layer to CMSIS-RTOS
  61         - reference implementation based on RTX5
  62         - supports all Cortex-M variants including TrustZone for ARMv8-M
  63       CMSIS-SVD:
  64        - reworked SVD format documentation
  65        - removed SVD file database documentation as SVD files are distributed in packs
  66        - updated SVDConv for Win32 and Linux
  67       CMSIS-DSP:
  68        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  69        - Added DSP libraries build projects to CMSIS pack.
  70     </release>
  71     <release version="4.5.0" date="2015-10-28">
  72       - CMSIS-Core     4.30.0  (see revision history for details)
  73       - CMSIS-DAP      1.1.0   (unchanged)
  74       - CMSIS-Driver   2.04.0  (see revision history for details)
  75       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
  76       - CMSIS-PACK     1.4.1   (see revision history for details)
  77       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
  78       - CMSIS-SVD      1.3.1   (see revision history for details)
  79     </release>
  80     <release version="4.4.0" date="2015-09-11">
  81       - CMSIS-Core     4.20   (see revision history for details)
  82       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
  83       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
  84       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
  85       - CMSIS-RTOS
  86         -- API         1.02   (unchanged)
  87         -- RTX         4.79   (see revision history for details)
  88       - CMSIS-SVD      1.3.0  (see revision history for details)
  89       - CMSIS-DAP      1.1.0  (extended with SWO support)
  90     </release>
  91     <release version="4.3.0" date="2015-03-20">
  92       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
  93       - CMSIS-DSP      1.4.5  (see revision history for details)
  94       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
  95       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
  96       - CMSIS-RTOS
  97         -- API         1.02   (unchanged)
  98         -- RTX         4.78   (see revision history for details)
  99       - CMSIS-SVD      1.2    (unchanged)
 100     </release>
 101     <release version="4.2.0" date="2014-09-24">
 102       Adding Cortex-M7 support
 103       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 104       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 105       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 106       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 107       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 108     </release>
 109     <release version="4.1.1" date="2014-06-30">
 110       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 111     </release>
 112     <release version="4.1.0" date="2014-06-12">
 113       - CMSIS-Driver   2.02  (incompatible update)
 114       - CMSIS-Pack     1.3   (see revision history for details)
 115       - CMSIS-DSP      1.4.2 (unchanged)
 116       - CMSIS-Core     3.30  (unchanged)
 117       - CMSIS-RTOS RTX 4.74  (unchanged)
 118       - CMSIS-RTOS API 1.02  (unchanged)
 119       - CMSIS-SVD      1.10  (unchanged)
 120       PACK:
 121       - removed G++ specific files from PACK
 122       - added Component Startup variant "C Startup"
 123       - added Pack Checking Utility
 124       - updated conditions to reflect tool-chain dependency
 125       - added Taxonomy for Graphics
 126       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 127     </release>
 128     <release version="4.0.0">
 129       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 130       - CMSIS-Pack     1.1   Preliminary
 131       - CMSIS-DSP      1.4.2 (see revision history for details)
 132       - CMSIS-Core     3.30  (see revision history for details)
 133       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 134       - CMSIS-RTOS API 1.02  (unchanged)
 135       - CMSIS-SVD      1.10  (unchanged)
 136     </release>
 137     <release version="3.20.4">
 138       - CMSIS-RTOS 4.74 (see revision history for details)
 139       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 140     </release>
 141     <release version="3.20.3">
 142       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 143       - CMSIS-RTOS 4.73 (see revision history for details)
 144     </release>
 145     <release version="3.20.2">
 146       - CMSIS-Pack documentation has been added
 147       - CMSIS-Drivers header and documentation have been added to PACK
 148       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 149     </release>
 150     <release version="3.20.1">
 151       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 152       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 153     </release>
 154     <release version="3.20.0">
 155       The software portions that are deployed in the application program are now under a BSD license which allows usage
 156       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 157       The individual components have been update as listed below:
 158       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 159       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 160       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 161       - CMSIS-SVD is unchanged.
 162     </release>
 163   </releases>
 164
 165   <taxonomy>
 166     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 167     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 168     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 169     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 170     <description Cclass="File System">File Drive Support and File System</description>
 171     <description Cclass="Graphics">Graphical User Interface</description>
 172     <description Cclass="Network">Network Stack using Internet Protocols</description>
 173     <description Cclass="USB">Universal Serial Bus Stack</description>
 174     <description Cclass="Compiler">Compiler Software Extensions</description>
 175     <description Cclass="RTOS">Real-time Operating System</description>
 176   </taxonomy>
 177
 178   <devices>
 179     <!-- ******************************  Cortex-M0  ****************************** -->
 180     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 181       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 182       <description>
 183 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 184 - simple, easy-to-use programmers model
 185 - highly efficient ultra-low power operation
 186 - excellent code density
 187 - deterministic, high-performance interrupt handling
 188 - upward compatibility with the rest of the Cortex-M processor family.
 189       </description>
 190       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 191       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 192       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 193       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 194
 195       <device Dname="ARMCM0">
 196         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 197         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 198       </device>
 199     </family>
 200
 201     <!-- ******************************  Cortex-M0P  ****************************** -->
 202     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 203       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 204       <description>
 205 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 206 - simple, easy-to-use programmers model
 207 - highly efficient ultra-low power operation
 208 - excellent code density
 209 - deterministic, high-performance interrupt handling
 210 - upward compatibility with the rest of the Cortex-M processor family.
 211       </description>
 212       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 213       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 214       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 215       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 216
 217       <device Dname="ARMCM0P">
 218         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 219         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 220       </device>
 221     </family>
 222
 223     <!-- ******************************  Cortex-M3  ****************************** -->
 224     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 225       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 226       <description>
 227 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 228 - simple, easy-to-use programmers model
 229 - highly efficient ultra-low power operation
 230 - excellent code density
 231 - deterministic, high-performance interrupt handling
 232 - upward compatibility with the rest of the Cortex-M processor family.
 233       </description>
 234       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 235       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 236       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 237       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 238
 239       <device Dname="ARMCM3">
 240         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 241         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 242       </device>
 243     </family>
 244
 245     <!-- ******************************  Cortex-M4  ****************************** -->
 246     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 247       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 248       <description>
 249 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 250 - simple, easy-to-use programmers model
 251 - highly efficient ultra-low power operation
 252 - excellent code density
 253 - deterministic, high-performance interrupt handling
 254 - upward compatibility with the rest of the Cortex-M processor family.
 255       </description>
 256       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 257       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 258       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 259       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 260
 261       <device Dname="ARMCM4">
 262         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 263         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 264       </device>
 265
 266       <device Dname="ARMCM4_FP">
 267         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 268         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 269       </device>
 270     </family>
 271
 272     <!-- ******************************  Cortex-M7  ****************************** -->
 273     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 274       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 275       <description>
 276 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 277 - simple, easy-to-use programmers model
 278 - highly efficient ultra-low power operation
 279 - excellent code density
 280 - deterministic, high-performance interrupt handling
 281 - upward compatibility with the rest of the Cortex-M processor family.
 282       </description>
 283       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 284       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 285       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 286       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 287
 288       <device Dname="ARMCM7">
 289         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 290         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 291       </device>
 292
 293       <device Dname="ARMCM7_SP">
 294         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 295         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 296       </device>
 297
 298       <device Dname="ARMCM7_DP">
 299         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 300         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 301       </device>
 302     </family>
 303
 304     <!-- ******************************  Cortex-M23  ********************** -->
 305     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 306       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 307       <description>
 308 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 309 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 310 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 311       </description>
 312       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 313       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 314       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 315       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 316       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 317       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 318
 319       <device Dname="ARMCM23">
 320         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 321         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 322       </device>
 323
 324       <device Dname="ARMCM23_TZ">
 325         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 326         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 327       </device>
 328     </family>
 329
 330     <!-- ******************************  Cortex-M33  ****************************** -->
 331     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 332       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 333       <description>
 334 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 335 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 336       </description>
 337       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 338       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 339       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 340       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 341       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 342       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 343
 344       <device Dname="ARMCM33">
 345         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 346         <description>
 347           no DSP Instructions, no Floating Point Unit, no TrustZone
 348         </description>
 349         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 350       </device>
 351
 352       <device Dname="ARMCM33_TZ">
 353         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 354         <description>
 355           no DSP Instructions, no Floating Point Unit, TrustZone
 356         </description>
 357         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 358       </device>
 359
 360       <device Dname="ARMCM33_DSP_FP">
 361         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 362         <description>
 363           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 364         </description>
 365         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 366       </device>
 367
 368       <device Dname="ARMCM33_DSP_FP_TZ">
 369         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 370         <description>
 371           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 372         </description>
 373         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 374       </device>
 375     </family>
 376
 377     <!-- ******************************  ARMSC000  ****************************** -->
 378     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 379       <description>
 380 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 381 - simple, easy-to-use programmers model
 382 - highly efficient ultra-low power operation
 383 - excellent code density
 384 - deterministic, high-performance interrupt handling
 385       </description>
 386       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 387       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 388       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 389       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 390
 391       <device Dname="ARMSC000">
 392         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 393         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 394       </device>
 395     </family>
 396
 397     <!-- ******************************  ARMSC300  ****************************** -->
 398     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 399       <description>
 400 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 401 - simple, easy-to-use programmers model
 402 - highly efficient ultra-low power operation
 403 - excellent code density
 404 - deterministic, high-performance interrupt handling
 405       </description>
 406       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 407       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 408       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 409       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 410
 411       <device Dname="ARMSC300">
 412         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 413         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 414       </device>
 415     </family>
 416
 417     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 418     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 419       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 420       <description>
 421 ARMv8-M Baseline based device with TrustZone
 422       </description>
 423       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 424       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 425       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 426       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 427       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 428       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 429
 430       <device Dname="ARMv8MBL">
 431         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 432         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 433       </device>
 434     </family>
 435
 436     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 437     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 438       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 439       <description>
 440 ARMv8-M Mainline based device with TrustZone
 441       </description>
 442       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 443       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 444       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 445       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 446       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 447       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 448
 449       <device Dname="ARMv8MML">
 450         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 451         <description>
 452           no DSP Instructions, no Floating Point Unit, TrustZone
 453         </description>
 454         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 455       </device>
 456
 457       <device Dname="ARMv8MML_DSP">
 458         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 459         <description>
 460           DSP Instructions, no Floating Point Unit, TrustZone
 461         </description>
 462         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 463       </device>
 464
 465       <device Dname="ARMv8MML_SP">
 466         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 467         <description>
 468           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 469         </description>
 470         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 471       </device>
 472
 473       <device Dname="ARMv8MML_DSP_SP">
 474         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 475         <description>
 476           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 477         </description>
 478         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 479       </device>
 480
 481       <device Dname="ARMv8MML_DP">
 482         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 483         <description>
 484           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 485         </description>
 486         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 487       </device>
 488
 489       <device Dname="ARMv8MML_DSP_DP">
 490         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 491         <description>
 492           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 493         </description>
 494         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 495       </device>
 496     </family>
 497
 498   </devices>
 499
 500
 501   <apis>
 502     <!-- CMSIS-RTOS API -->
 503     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 504       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 505       <files>
 506         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 507       </files>
 508     </api>
 509     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.0" exclusive="1">
 510       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 511       <files>
 512         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 513         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 514       </files>
 515     </api>
 516     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.2.0" exclusive="0">
 517       <description>USART Driver API for Cortex-M</description>
 518       <files>
 519         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 520         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 521       </files>
 522     </api>
 523     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.1.0" exclusive="0">
 524       <description>SPI Driver API for Cortex-M</description>
 525       <files>
 526         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 527         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 528       </files>
 529     </api>
 530     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.0.0" exclusive="0">
 531       <description>SAI Driver API for Cortex-M</description>
 532       <files>
 533         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 534         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 535       </files>
 536     </api>
 537     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.2.0" exclusive="0">
 538       <description>I2C Driver API for Cortex-M</description>
 539       <files>
 540         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 541         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 542       </files>
 543     </api>
 544     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.0.0" exclusive="0">
 545       <description>CAN Driver API for Cortex-M</description>
 546       <files>
 547         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 548         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 549       </files>
 550     </api>
 551     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.0.0" exclusive="0">
 552       <description>Flash Driver API for Cortex-M</description>
 553       <files>
 554         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 555         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 556       </files>
 557     </api>
 558     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.2.0" exclusive="0">
 559       <description>MCI Driver API for Cortex-M</description>
 560       <files>
 561         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 562         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 563       </files>
 564     </api>
 565     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.1.0" exclusive="0">
 566       <description>NAND Flash Driver API for Cortex-M</description>
 567       <files>
 568         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 569         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 570       </files>
 571     </api>
 572     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 573       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 574       <files>
 575         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 576         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 577         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 578       </files>
 579     </api>
 580     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 581       <description>Ethernet MAC Driver API for Cortex-M</description>
 582       <files>
 583         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 584         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 585       </files>
 586     </api>
 587     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.0.0" exclusive="0">
 588       <description>Ethernet PHY Driver API for Cortex-M</description>
 589       <files>
 590         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 591         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 592       </files>
 593     </api>
 594     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.1.0" exclusive="0">
 595       <description>USB Device Driver API for Cortex-M</description>
 596       <files>
 597         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 598         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 599       </files>
 600     </api>
 601     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.1.0" exclusive="0">
 602       <description>USB Host Driver API for Cortex-M</description>
 603       <files>
 604         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 605         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 606       </files>
 607     </api>
 608   </apis>
 609
 610   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 611   <conditions>
 612     <!-- compiler -->
 613     <condition id="ARMCC">
 614       <require Tcompiler="ARMCC"/>
 615     </condition>
 616     <condition id="GCC">
 617       <require Tcompiler="GCC"/>
 618     </condition>
 619     <condition id="IAR">
 620       <require Tcompiler="IAR"/>
 621     </condition>
 622     <condition id="ARMCC GCC">
 623       <accept Tcompiler="ARMCC"/>
 624       <accept Tcompiler="GCC"/>
 625     </condition>
 626     <condition id="ARMCC GCC IAR">
 627       <accept Tcompiler="ARMCC"/>
 628       <accept Tcompiler="GCC"/>
 629       <accept Tcompiler="IAR"/>
 630     </condition>
 631
 632     <!-- ARM architecture -->
 633     <condition id="ARMv6-M Device">
 634       <description>ARMv6-M architecture based device</description>
 635       <accept Dcore="Cortex-M0"/>
 636       <accept Dcore="Cortex-M0+"/>
 637       <accept Dcore="SC000"/>
 638     </condition>
 639     <condition id="ARMv7-M Device">
 640       <description>ARMv7-M architecture based device</description>
 641       <accept Dcore="Cortex-M3"/>
 642       <accept Dcore="Cortex-M4"/>
 643       <accept Dcore="Cortex-M7"/>
 644       <accept Dcore="SC300"/>
 645     </condition>
 646     <condition id="ARMv8-M Device">
 647       <description>ARMv8-M architecture based device</description>
 648       <accept Dcore="ARMV8MBL"/>
 649       <accept Dcore="ARMV8MML"/>
 650       <accept Dcore="Cortex-M23"/>
 651       <accept Dcore="Cortex-M33"/>
 652     </condition>
 653     <condition id="ARMv8-M TZ Device">
 654       <description>ARMv8-M architecture based device with TrustZone</description>
 655       <require condition="ARMv8-M Device"/>
 656       <require Dtz="TZ"/>
 657     </condition>
 658     <condition id="ARMv6_7-M Device">
 659       <description>ARMv6_7-M architecture based device</description>
 660       <accept condition="ARMv6-M Device"/>
 661       <accept condition="ARMv7-M Device"/>
 662     </condition>
 663     <condition id="ARMv6_7_8-M Device">
 664       <description>ARMv6_7_8-M architecture based device</description>
 665       <accept condition="ARMv6-M Device"/>
 666       <accept condition="ARMv7-M Device"/>
 667       <accept condition="ARMv8-M Device"/>
 668     </condition>
 669
 670     <!-- ARM core -->
 671     <condition id="CM0">
 672       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 673       <accept Dcore="Cortex-M0"/>
 674       <accept Dcore="Cortex-M0+"/>
 675       <accept Dcore="SC000"/>
 676     </condition>
 677     <condition id="CM3">
 678       <description>Cortex-M3 or SC300 processor based device</description>
 679       <accept Dcore="Cortex-M3"/>
 680       <accept Dcore="SC300"/>
 681     </condition>
 682     <condition id="CM4">
 683       <description>Cortex-M4 processor based device</description>
 684       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 685     </condition>
 686     <condition id="CM4_FP">
 687       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 688       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 689     </condition>
 690     <condition id="CM7">
 691       <description>Cortex-M7 processor based device</description>
 692       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 693     </condition>
 694     <condition id="CM7_FP">
 695       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 696       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 697       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 698     </condition>
 699     <condition id="CM7_SP">
 700       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 701       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 702     </condition>
 703     <condition id="CM7_DP">
 704       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 705       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 706     </condition>
 707     <condition id="CM23">
 708       <description>Cortex-M23 processor based device</description>
 709       <require Dcore="Cortex-M23"/>
 710     </condition>
 711     <condition id="CM33">
 712       <description>Cortex-M33 processor based device</description>
 713       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 714     </condition>
 715     <condition id="CM33_FP">
 716       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 717       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 718     </condition>
 719     <condition id="ARMv8MBL">
 720       <description>ARMv8-M Baseline processor based device</description>
 721       <require Dcore="ARMV8MBL"/>
 722     </condition>
 723     <condition id="ARMv8MML">
 724       <description>ARMv8-M Mainline processor based device</description>
 725       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 726     </condition>
 727     <condition id="ARMv8MML_FP">
 728       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 729       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 730       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 731     </condition>
 732
 733     <condition id="CM33_NODSP_NOFPU">
 734       <description>CM33, no DSP, no FPU</description>
 735       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 736     </condition>
 737     <condition id="CM33_DSP_NOFPU">
 738       <description>CM33, DSP, no FPU</description>
 739       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 740     </condition>
 741     <condition id="CM33_NODSP_SP">
 742       <description>CM33, no DSP, SP FPU</description>
 743       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 744     </condition>
 745     <condition id="CM33_DSP_SP">
 746       <description>CM33, DSP, SP FPU</description>
 747       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 748     </condition>
 749
 750     <condition id="ARMv8MML_NODSP_NOFPU">
 751       <description>ARMv8MML, no DSP, no FPU</description>
 752       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 753     </condition>
 754     <condition id="ARMv8MML_DSP_NOFPU">
 755       <description>ARMv8MML, DSP, no FPU</description>
 756       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 757     </condition>
 758     <condition id="ARMv8MML_NODSP_SP">
 759       <description>ARMv8MML, no DSP, SP FPU</description>
 760       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 761     </condition>
 762     <condition id="ARMv8MML_DSP_SP">
 763       <description>ARMv8MML, DSP, SP FPU</description>
 764       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 765     </condition>
 766
 767     <!-- ARMCC compiler -->
 768     <condition id="CM0_ARMCC">
 769       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 770       <require condition="CM0"/>
 771       <require Tcompiler="ARMCC"/>
 772     </condition>
 773     <condition id="CM0_LE_ARMCC">
 774       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 775       <require condition="CM0_ARMCC"/>
 776       <require Dendian="Little-endian"/>
 777     </condition>
 778     <condition id="CM0_BE_ARMCC">
 779       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 780       <require condition="CM0_ARMCC"/>
 781       <require Dendian="Big-endian"/>
 782     </condition>
 783
 784     <condition id="CM3_ARMCC">
 785       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 786       <require condition="CM3"/>
 787       <require Tcompiler="ARMCC"/>
 788     </condition>
 789     <condition id="CM3_LE_ARMCC">
 790       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 791       <require condition="CM3_ARMCC"/>
 792       <require Dendian="Little-endian"/>
 793     </condition>
 794     <condition id="CM3_BE_ARMCC">
 795       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 796       <require condition="CM3_ARMCC"/>
 797       <require Dendian="Big-endian"/>
 798     </condition>
 799
 800     <condition id="CM4_ARMCC">
 801       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 802       <require condition="CM4"/>
 803       <require Tcompiler="ARMCC"/>
 804     </condition>
 805     <condition id="CM4_LE_ARMCC">
 806       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 807       <require condition="CM4_ARMCC"/>
 808       <require Dendian="Little-endian"/>
 809     </condition>
 810     <condition id="CM4_BE_ARMCC">
 811       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 812       <require condition="CM4_ARMCC"/>
 813       <require Dendian="Big-endian"/>
 814     </condition>
 815
 816     <condition id="CM4_FP_ARMCC">
 817       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 818       <require condition="CM4_FP"/>
 819       <require Tcompiler="ARMCC"/>
 820     </condition>
 821     <condition id="CM4_FP_LE_ARMCC">
 822       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 823       <require condition="CM4_FP_ARMCC"/>
 824       <require Dendian="Little-endian"/>
 825     </condition>
 826     <condition id="CM4_FP_BE_ARMCC">
 827       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 828       <require condition="CM4_FP_ARMCC"/>
 829       <require Dendian="Big-endian"/>
 830     </condition>
 831
 832     <!-- XMC 4000 Series devices from Infineon require a special library -->
 833     <condition id="CM4_LE_ARMCC_STD">
 834       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
 835       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
 836       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 837       <require Tcompiler="ARMCC"/>
 838     </condition>
 839     <condition id="CM4_LE_ARMCC_IFX">
 840       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
 841       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 842       <require Tcompiler="ARMCC"/>
 843     </condition>
 844     <condition id="CM4_FP_LE_ARMCC_STD">
 845       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
 846       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
 847       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 848       <require Tcompiler="ARMCC"/>
 849     </condition>
 850     <condition id="CM4_FP_LE_ARMCC_IFX">
 851       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
 852       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 853       <require Tcompiler="ARMCC"/>
 854     </condition>
 855
 856     <condition id="CM7_ARMCC">
 857       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 858       <require condition="CM7"/>
 859       <require Tcompiler="ARMCC"/>
 860     </condition>
 861     <condition id="CM7_LE_ARMCC">
 862       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 863       <require condition="CM7_ARMCC"/>
 864       <require Dendian="Little-endian"/>
 865     </condition>
 866     <condition id="CM7_BE_ARMCC">
 867       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 868       <require condition="CM7_ARMCC"/>
 869       <require Dendian="Big-endian"/>
 870     </condition>
 871
 872     <condition id="CM7_FP_ARMCC">
 873       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 874       <require condition="CM7_FP"/>
 875       <require Tcompiler="ARMCC"/>
 876     </condition>
 877     <condition id="CM7_FP_LE_ARMCC">
 878       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 879       <require condition="CM7_FP_ARMCC"/>
 880       <require Dendian="Little-endian"/>
 881     </condition>
 882     <condition id="CM7_FP_BE_ARMCC">
 883       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 884       <require condition="CM7_FP_ARMCC"/>
 885       <require Dendian="Big-endian"/>
 886     </condition>
 887
 888     <condition id="CM7_SP_ARMCC">
 889       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 890       <require condition="CM7_SP"/>
 891       <require Tcompiler="ARMCC"/>
 892     </condition>
 893     <condition id="CM7_SP_LE_ARMCC">
 894       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 895       <require condition="CM7_SP_ARMCC"/>
 896       <require Dendian="Little-endian"/>
 897     </condition>
 898     <condition id="CM7_SP_BE_ARMCC">
 899       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 900       <require condition="CM7_SP_ARMCC"/>
 901       <require Dendian="Big-endian"/>
 902     </condition>
 903
 904     <condition id="CM7_DP_ARMCC">
 905       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
 906       <require condition="CM7_DP"/>
 907       <require Tcompiler="ARMCC"/>
 908     </condition>
 909     <condition id="CM7_DP_LE_ARMCC">
 910       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
 911       <require condition="CM7_DP_ARMCC"/>
 912       <require Dendian="Little-endian"/>
 913     </condition>
 914     <condition id="CM7_DP_BE_ARMCC">
 915       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
 916       <require condition="CM7_DP_ARMCC"/>
 917       <require Dendian="Big-endian"/>
 918     </condition>
 919
 920     <condition id="CM23_ARMCC">
 921       <description>Cortex-M23 processor based device for the ARM Compiler</description>
 922       <require condition="CM23"/>
 923       <require Tcompiler="ARMCC"/>
 924     </condition>
 925     <condition id="CM23_LE_ARMCC">
 926       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
 927       <require condition="CM23_ARMCC"/>
 928       <require Dendian="Little-endian"/>
 929     </condition>
 930     <condition id="CM23_BE_ARMCC">
 931       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
 932       <require condition="CM23_ARMCC"/>
 933       <require Dendian="Big-endian"/>
 934     </condition>
 935
 936     <condition id="CM33_ARMCC">
 937       <description>Cortex-M33 processor based device for the ARM Compiler</description>
 938       <require condition="CM33"/>
 939       <require Tcompiler="ARMCC"/>
 940     </condition>
 941     <condition id="CM33_LE_ARMCC">
 942       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
 943       <require condition="CM33_ARMCC"/>
 944       <require Dendian="Little-endian"/>
 945     </condition>
 946     <condition id="CM33_BE_ARMCC">
 947       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
 948       <require condition="CM33_ARMCC"/>
 949       <require Dendian="Big-endian"/>
 950     </condition>
 951
 952     <condition id="CM33_FP_ARMCC">
 953       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
 954       <require condition="CM33_FP"/>
 955       <require Tcompiler="ARMCC"/>
 956     </condition>
 957     <condition id="CM33_FP_LE_ARMCC">
 958       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 959       <require condition="CM33_FP_ARMCC"/>
 960       <require Dendian="Little-endian"/>
 961     </condition>
 962     <condition id="CM33_FP_BE_ARMCC">
 963       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 964       <require condition="CM33_FP_ARMCC"/>
 965       <require Dendian="Big-endian"/>
 966     </condition>
 967
 968     <condition id="CM33_NODSP_NOFPU_ARMCC">
 969       <description>CM33, no DSP, no FPU, ARM Compiler</description>
 970       <require condition="CM33_NODSP_NOFPU"/>
 971       <require Tcompiler="ARMCC"/>
 972     </condition>
 973     <condition id="CM33_DSP_NOFPU_ARMCC">
 974       <description>CM33, DSP, no FPU, ARM Compiler</description>
 975       <require condition="CM33_DSP_NOFPU"/>
 976       <require Tcompiler="ARMCC"/>
 977     </condition>
 978     <condition id="CM33_NODSP_SP_ARMCC">
 979       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
 980       <require condition="CM33_NODSP_SP"/>
 981       <require Tcompiler="ARMCC"/>
 982     </condition>
 983     <condition id="CM33_DSP_SP_ARMCC">
 984       <description>CM33, DSP, SP FPU, ARM Compiler</description>
 985       <require condition="CM33_DSP_SP"/>
 986       <require Tcompiler="ARMCC"/>
 987     </condition>
 988     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
 989       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
 990       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
 991       <require Dendian="Little-endian"/>
 992     </condition>
 993     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
 994       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
 995       <require condition="CM33_DSP_NOFPU_ARMCC"/>
 996       <require Dendian="Little-endian"/>
 997     </condition>
 998     <condition id="CM33_NODSP_SP_LE_ARMCC">
 999       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1000       <require condition="CM33_NODSP_SP_ARMCC"/>
1001       <require Dendian="Little-endian"/>
1002     </condition>
1003     <condition id="CM33_DSP_SP_LE_ARMCC">
1004       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
1005       <require condition="CM33_DSP_SP_ARMCC"/>
1006       <require Dendian="Little-endian"/>
1007     </condition>
1008
1009     <condition id="ARMv8MBL_ARMCC">
1010       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1011       <require condition="ARMv8MBL"/>
1012       <require Tcompiler="ARMCC"/>
1013     </condition>
1014     <condition id="ARMv8MBL_LE_ARMCC">
1015       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1016       <require condition="ARMv8MBL_ARMCC"/>
1017       <require Dendian="Little-endian"/>
1018     </condition>
1019     <condition id="ARMv8MBL_BE_ARMCC">
1020       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1021       <require condition="ARMv8MBL_ARMCC"/>
1022       <require Dendian="Big-endian"/>
1023     </condition>
1024
1025     <condition id="ARMv8MML_ARMCC">
1026       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1027       <require condition="ARMv8MML"/>
1028       <require Tcompiler="ARMCC"/>
1029     </condition>
1030     <condition id="ARMv8MML_LE_ARMCC">
1031       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1032       <require condition="ARMv8MML_ARMCC"/>
1033       <require Dendian="Little-endian"/>
1034     </condition>
1035     <condition id="ARMv8MML_BE_ARMCC">
1036       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1037       <require condition="ARMv8MML_ARMCC"/>
1038       <require Dendian="Big-endian"/>
1039     </condition>
1040
1041     <condition id="ARMv8MML_FP_ARMCC">
1042       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1043       <require condition="ARMv8MML_FP"/>
1044       <require Tcompiler="ARMCC"/>
1045     </condition>
1046     <condition id="ARMv8MML_FP_LE_ARMCC">
1047       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1048       <require condition="ARMv8MML_FP_ARMCC"/>
1049       <require Dendian="Little-endian"/>
1050     </condition>
1051     <condition id="ARMv8MML_FP_BE_ARMCC">
1052       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1053       <require condition="ARMv8MML_FP_ARMCC"/>
1054       <require Dendian="Big-endian"/>
1055     </condition>
1056
1057     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1058       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1059       <require condition="ARMv8MML_NODSP_NOFPU"/>
1060       <require Tcompiler="ARMCC"/>
1061     </condition>
1062     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1063       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1064       <require condition="ARMv8MML_DSP_NOFPU"/>
1065       <require Tcompiler="ARMCC"/>
1066     </condition>
1067     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1068       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1069       <require condition="ARMv8MML_NODSP_SP"/>
1070       <require Tcompiler="ARMCC"/>
1071     </condition>
1072     <condition id="ARMv8MML_DSP_SP_ARMCC">
1073       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1074       <require condition="ARMv8MML_DSP_SP"/>
1075       <require Tcompiler="ARMCC"/>
1076     </condition>
1077     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1078       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1079       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1080       <require Dendian="Little-endian"/>
1081     </condition>
1082     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1083       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1084       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1085       <require Dendian="Little-endian"/>
1086     </condition>
1087     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1088       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1089       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1090       <require Dendian="Little-endian"/>
1091     </condition>
1092     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1093       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1094       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1095       <require Dendian="Little-endian"/>
1096     </condition>
1097
1098     <!-- GCC compiler -->
1099     <condition id="CM0_GCC">
1100       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1101       <require condition="CM0"/>
1102       <require Tcompiler="GCC"/>
1103     </condition>
1104     <condition id="CM0_LE_GCC">
1105       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1106       <require condition="CM0_GCC"/>
1107       <require Dendian="Little-endian"/>
1108     </condition>
1109     <condition id="CM0_BE_GCC">
1110       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1111       <require condition="CM0_GCC"/>
1112       <require Dendian="Big-endian"/>
1113     </condition>
1114
1115     <condition id="CM3_GCC">
1116       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1117       <require condition="CM3"/>
1118       <require Tcompiler="GCC"/>
1119     </condition>
1120     <condition id="CM3_LE_GCC">
1121       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1122       <require condition="CM3_GCC"/>
1123       <require Dendian="Little-endian"/>
1124     </condition>
1125     <condition id="CM3_BE_GCC">
1126       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1127       <require condition="CM3_GCC"/>
1128       <require Dendian="Big-endian"/>
1129     </condition>
1130
1131     <condition id="CM4_GCC">
1132       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1133       <require condition="CM4"/>
1134       <require Tcompiler="GCC"/>
1135     </condition>
1136     <condition id="CM4_LE_GCC">
1137       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1138       <require condition="CM4_GCC"/>
1139       <require Dendian="Little-endian"/>
1140     </condition>
1141     <condition id="CM4_BE_GCC">
1142       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1143       <require condition="CM4_GCC"/>
1144       <require Dendian="Big-endian"/>
1145     </condition>
1146
1147     <condition id="CM4_FP_GCC">
1148       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1149       <require condition="CM4_FP"/>
1150       <require Tcompiler="GCC"/>
1151     </condition>
1152     <condition id="CM4_FP_LE_GCC">
1153       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1154       <require condition="CM4_FP_GCC"/>
1155       <require Dendian="Little-endian"/>
1156     </condition>
1157     <condition id="CM4_FP_BE_GCC">
1158       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1159       <require condition="CM4_FP_GCC"/>
1160       <require Dendian="Big-endian"/>
1161     </condition>
1162
1163     <!-- XMC 4000 Series devices from Infineon require a special library -->
1164     <condition id="CM4_LE_GCC_STD">
1165       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1166       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1167       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1168       <require Tcompiler="GCC"/>
1169     </condition>
1170     <condition id="CM4_LE_GCC_IFX">
1171       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1172       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1173       <require Tcompiler="GCC"/>
1174     </condition>
1175     <condition id="CM4_FP_LE_GCC_STD">
1176       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1177       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1178       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1179       <require Tcompiler="GCC"/>
1180     </condition>
1181     <condition id="CM4_FP_LE_GCC_IFX">
1182       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1183       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1184       <require Tcompiler="GCC"/>
1185     </condition>
1186
1187     <condition id="CM7_GCC">
1188       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1189       <require condition="CM7"/>
1190       <require Tcompiler="GCC"/>
1191     </condition>
1192     <condition id="CM7_LE_GCC">
1193       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1194       <require condition="CM7_GCC"/>
1195       <require Dendian="Little-endian"/>
1196     </condition>
1197     <condition id="CM7_BE_GCC">
1198       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1199       <require condition="CM7_GCC"/>
1200       <require Dendian="Big-endian"/>
1201     </condition>
1202
1203     <condition id="CM7_FP_GCC">
1204       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1205       <require condition="CM7_FP"/>
1206       <require Tcompiler="GCC"/>
1207     </condition>
1208     <condition id="CM7_FP_LE_GCC">
1209       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1210       <require condition="CM7_FP_GCC"/>
1211       <require Dendian="Little-endian"/>
1212     </condition>
1213     <condition id="CM7_FP_BE_GCC">
1214       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1215       <require condition="CM7_FP_GCC"/>
1216       <require Dendian="Big-endian"/>
1217     </condition>
1218
1219     <condition id="CM7_SP_GCC">
1220       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1221       <require condition="CM7_SP"/>
1222       <require Tcompiler="GCC"/>
1223     </condition>
1224     <condition id="CM7_SP_LE_GCC">
1225       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1226       <require condition="CM7_SP_GCC"/>
1227       <require Dendian="Little-endian"/>
1228     </condition>
1229     <condition id="CM7_SP_BE_GCC">
1230       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1231       <require condition="CM7_SP_GCC"/>
1232       <require Dendian="Big-endian"/>
1233     </condition>
1234
1235     <condition id="CM7_DP_GCC">
1236       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1237       <require condition="CM7_DP"/>
1238       <require Tcompiler="GCC"/>
1239     </condition>
1240     <condition id="CM7_DP_LE_GCC">
1241       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1242       <require condition="CM7_DP_GCC"/>
1243       <require Dendian="Little-endian"/>
1244     </condition>
1245     <condition id="CM7_DP_BE_GCC">
1246       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1247       <require condition="CM7_DP_GCC"/>
1248       <require Dendian="Big-endian"/>
1249     </condition>
1250
1251     <condition id="CM23_GCC">
1252       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1253       <require condition="CM23"/>
1254       <require Tcompiler="GCC"/>
1255     </condition>
1256     <condition id="CM23_LE_GCC">
1257       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1258       <require condition="CM23_GCC"/>
1259       <require Dendian="Little-endian"/>
1260     </condition>
1261     <condition id="CM23_BE_GCC">
1262       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1263       <require condition="CM23_GCC"/>
1264       <require Dendian="Big-endian"/>
1265     </condition>
1266
1267     <condition id="CM33_GCC">
1268       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1269       <require condition="CM33"/>
1270       <require Tcompiler="GCC"/>
1271     </condition>
1272     <condition id="CM33_LE_GCC">
1273       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1274       <require condition="CM33_GCC"/>
1275       <require Dendian="Little-endian"/>
1276     </condition>
1277     <condition id="CM33_BE_GCC">
1278       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1279       <require condition="CM33_GCC"/>
1280       <require Dendian="Big-endian"/>
1281     </condition>
1282
1283     <condition id="CM33_FP_GCC">
1284       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1285       <require condition="CM33_FP"/>
1286       <require Tcompiler="GCC"/>
1287     </condition>
1288     <condition id="CM33_FP_LE_GCC">
1289       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1290       <require condition="CM33_FP_GCC"/>
1291       <require Dendian="Little-endian"/>
1292     </condition>
1293     <condition id="CM33_FP_BE_GCC">
1294       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1295       <require condition="CM33_FP_GCC"/>
1296       <require Dendian="Big-endian"/>
1297     </condition>
1298
1299     <condition id="CM33_NODSP_NOFPU_GCC">
1300       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1301       <require condition="CM33_NODSP_NOFPU"/>
1302       <require Tcompiler="GCC"/>
1303     </condition>
1304     <condition id="CM33_DSP_NOFPU_GCC">
1305       <description>CM33, DSP, no FPU, GCC Compiler</description>
1306       <require condition="CM33_DSP_NOFPU"/>
1307       <require Tcompiler="GCC"/>
1308     </condition>
1309     <condition id="CM33_NODSP_SP_GCC">
1310       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1311       <require condition="CM33_NODSP_SP"/>
1312       <require Tcompiler="GCC"/>
1313     </condition>
1314     <condition id="CM33_DSP_SP_GCC">
1315       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1316       <require condition="CM33_DSP_SP"/>
1317       <require Tcompiler="GCC"/>
1318     </condition>
1319     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1320       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1321       <require condition="CM33_NODSP_NOFPU_GCC"/>
1322       <require Dendian="Little-endian"/>
1323     </condition>
1324     <condition id="CM33_DSP_NOFPU_LE_GCC">
1325       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1326       <require condition="CM33_DSP_NOFPU_GCC"/>
1327       <require Dendian="Little-endian"/>
1328     </condition>
1329     <condition id="CM33_NODSP_SP_LE_GCC">
1330       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1331       <require condition="CM33_NODSP_SP_GCC"/>
1332       <require Dendian="Little-endian"/>
1333     </condition>
1334     <condition id="CM33_DSP_SP_LE_GCC">
1335       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1336       <require condition="CM33_DSP_SP_GCC"/>
1337       <require Dendian="Little-endian"/>
1338     </condition>
1339
1340     <condition id="ARMv8MBL_GCC">
1341       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1342       <require condition="ARMv8MBL"/>
1343       <require Tcompiler="GCC"/>
1344     </condition>
1345     <condition id="ARMv8MBL_LE_GCC">
1346       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1347       <require condition="ARMv8MBL_GCC"/>
1348       <require Dendian="Little-endian"/>
1349     </condition>
1350     <condition id="ARMv8MBL_BE_GCC">
1351       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1352       <require condition="ARMv8MBL_GCC"/>
1353       <require Dendian="Big-endian"/>
1354     </condition>
1355
1356     <condition id="ARMv8MML_GCC">
1357       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1358       <require condition="ARMv8MML"/>
1359       <require Tcompiler="GCC"/>
1360     </condition>
1361     <condition id="ARMv8MML_LE_GCC">
1362       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1363       <require condition="ARMv8MML_GCC"/>
1364       <require Dendian="Little-endian"/>
1365     </condition>
1366     <condition id="ARMv8MML_BE_GCC">
1367       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1368       <require condition="ARMv8MML_GCC"/>
1369       <require Dendian="Big-endian"/>
1370     </condition>
1371
1372     <condition id="ARMv8MML_FP_GCC">
1373       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1374       <require condition="ARMv8MML_FP"/>
1375       <require Tcompiler="GCC"/>
1376     </condition>
1377     <condition id="ARMv8MML_FP_LE_GCC">
1378       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1379       <require condition="ARMv8MML_FP_GCC"/>
1380       <require Dendian="Little-endian"/>
1381     </condition>
1382     <condition id="ARMv8MML_FP_BE_GCC">
1383       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1384       <require condition="ARMv8MML_FP_GCC"/>
1385       <require Dendian="Big-endian"/>
1386     </condition>
1387
1388     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1389       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1390       <require condition="ARMv8MML_NODSP_NOFPU"/>
1391       <require Tcompiler="GCC"/>
1392     </condition>
1393     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1394       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1395       <require condition="ARMv8MML_DSP_NOFPU"/>
1396       <require Tcompiler="GCC"/>
1397     </condition>
1398     <condition id="ARMv8MML_NODSP_SP_GCC">
1399       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1400       <require condition="ARMv8MML_NODSP_SP"/>
1401       <require Tcompiler="GCC"/>
1402     </condition>
1403     <condition id="ARMv8MML_DSP_SP_GCC">
1404       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1405       <require condition="ARMv8MML_DSP_SP"/>
1406       <require Tcompiler="GCC"/>
1407     </condition>
1408     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1409       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1410       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1411       <require Dendian="Little-endian"/>
1412     </condition>
1413     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1414       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1415       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1416       <require Dendian="Little-endian"/>
1417     </condition>
1418     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1419       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1420       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1421       <require Dendian="Little-endian"/>
1422     </condition>
1423     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1424       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1425       <require condition="ARMv8MML_DSP_SP_GCC"/>
1426       <require Dendian="Little-endian"/>
1427     </condition>
1428
1429     <!-- IAR compiler -->
1430     <condition id="CM0_IAR">
1431       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1432       <require condition="CM0"/>
1433       <require Tcompiler="IAR"/>
1434     </condition>
1435     <condition id="CM0_LE_IAR">
1436       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1437       <require condition="CM0_IAR"/>
1438       <require Dendian="Little-endian"/>
1439     </condition>
1440     <condition id="CM0_BE_IAR">
1441       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1442       <require condition="CM0_IAR"/>
1443       <require Dendian="Big-endian"/>
1444     </condition>
1445
1446     <condition id="CM3_IAR">
1447       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1448       <require condition="CM3"/>
1449       <require Tcompiler="IAR"/>
1450     </condition>
1451     <condition id="CM3_LE_IAR">
1452       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1453       <require condition="CM3_IAR"/>
1454       <require Dendian="Little-endian"/>
1455     </condition>
1456     <condition id="CM3_BE_IAR">
1457       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1458       <require condition="CM3_IAR"/>
1459       <require Dendian="Big-endian"/>
1460     </condition>
1461
1462     <condition id="CM4_IAR">
1463       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1464       <require condition="CM4"/>
1465       <require Tcompiler="IAR"/>
1466     </condition>
1467     <condition id="CM4_LE_IAR">
1468       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1469       <require condition="CM4_IAR"/>
1470       <require Dendian="Little-endian"/>
1471     </condition>
1472     <condition id="CM4_BE_IAR">
1473       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1474       <require condition="CM4_IAR"/>
1475       <require Dendian="Big-endian"/>
1476     </condition>
1477
1478     <condition id="CM4_FP_IAR">
1479       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1480       <require condition="CM4_FP"/>
1481       <require Tcompiler="IAR"/>
1482     </condition>
1483     <condition id="CM4_FP_LE_IAR">
1484       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1485       <require condition="CM4_FP_IAR"/>
1486       <require Dendian="Little-endian"/>
1487     </condition>
1488     <condition id="CM4_FP_BE_IAR">
1489       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1490       <require condition="CM4_FP_IAR"/>
1491       <require Dendian="Big-endian"/>
1492     </condition>
1493
1494     <condition id="CM7_IAR">
1495       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1496       <require condition="CM7"/>
1497       <require Tcompiler="IAR"/>
1498     </condition>
1499     <condition id="CM7_LE_IAR">
1500       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1501       <require condition="CM7_IAR"/>
1502       <require Dendian="Little-endian"/>
1503     </condition>
1504     <condition id="CM7_BE_IAR">
1505       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1506       <require condition="CM7_IAR"/>
1507       <require Dendian="Big-endian"/>
1508     </condition>
1509
1510     <condition id="CM7_FP_IAR">
1511       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1512       <require condition="CM7_FP"/>
1513       <require Tcompiler="IAR"/>
1514     </condition>
1515     <condition id="CM7_FP_LE_IAR">
1516       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1517       <require condition="CM7_FP_IAR"/>
1518       <require Dendian="Little-endian"/>
1519     </condition>
1520     <condition id="CM7_FP_BE_IAR">
1521       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1522       <require condition="CM7_FP_IAR"/>
1523       <require Dendian="Big-endian"/>
1524     </condition>
1525
1526     <condition id="CM7_SP_IAR">
1527       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1528       <require condition="CM7_SP"/>
1529       <require Tcompiler="IAR"/>
1530     </condition>
1531     <condition id="CM7_SP_LE_IAR">
1532       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1533       <require condition="CM7_SP_IAR"/>
1534       <require Dendian="Little-endian"/>
1535     </condition>
1536     <condition id="CM7_SP_BE_IAR">
1537       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1538       <require condition="CM7_SP_IAR"/>
1539       <require Dendian="Big-endian"/>
1540     </condition>
1541
1542     <condition id="CM7_DP_IAR">
1543       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1544       <require condition="CM7_DP"/>
1545       <require Tcompiler="IAR"/>
1546     </condition>
1547     <condition id="CM7_DP_LE_IAR">
1548       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1549       <require condition="CM7_DP_IAR"/>
1550       <require Dendian="Little-endian"/>
1551     </condition>
1552     <condition id="CM7_DP_BE_IAR">
1553       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1554       <require condition="CM7_DP_IAR"/>
1555       <require Dendian="Big-endian"/>
1556     </condition>
1557
1558     <!-- conditions selecting single devices and CMSIS Core -->
1559     <!-- used for component startup, GCC version is used for C-Startup -->
1560     <condition id="ARMCM0 CMSIS">
1561       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1562       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1563       <require Cclass="CMSIS" Cgroup="CORE"/>
1564     </condition>
1565     <condition id="ARMCM0 CMSIS GCC">
1566       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1567       <require condition="ARMCM0 CMSIS"/>
1568       <require condition="GCC"/>
1569     </condition>
1570
1571     <condition id="ARMCM0+ CMSIS">
1572       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1573       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1574       <require Cclass="CMSIS" Cgroup="CORE"/>
1575     </condition>
1576     <condition id="ARMCM0+ CMSIS GCC">
1577       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1578       <require condition="ARMCM0+ CMSIS"/>
1579       <require condition="GCC"/>
1580     </condition>
1581
1582     <condition id="ARMCM3 CMSIS">
1583       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1584       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1585       <require Cclass="CMSIS" Cgroup="CORE"/>
1586     </condition>
1587     <condition id="ARMCM3 CMSIS GCC">
1588       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1589       <require condition="ARMCM3 CMSIS"/>
1590       <require condition="GCC"/>
1591     </condition>
1592
1593     <condition id="ARMCM4 CMSIS">
1594       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1595       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1596       <require Cclass="CMSIS" Cgroup="CORE"/>
1597     </condition>
1598     <condition id="ARMCM4 CMSIS GCC">
1599       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1600       <require condition="ARMCM4 CMSIS"/>
1601       <require condition="GCC"/>
1602     </condition>
1603
1604     <condition id="ARMCM7 CMSIS">
1605       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1606       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1607       <require Cclass="CMSIS" Cgroup="CORE"/>
1608     </condition>
1609     <condition id="ARMCM7 CMSIS GCC">
1610       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1611       <require condition="ARMCM7 CMSIS"/>
1612       <require condition="GCC"/>
1613     </condition>
1614
1615     <condition id="ARMCM23 CMSIS">
1616       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1617       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1618       <require Cclass="CMSIS" Cgroup="CORE"/>
1619     </condition>
1620     <condition id="ARMCM23 CMSIS GCC">
1621       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1622       <require condition="ARMCM23 CMSIS"/>
1623       <require condition="GCC"/>
1624     </condition>
1625
1626     <condition id="ARMCM33 CMSIS">
1627       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1628       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1629       <require Cclass="CMSIS" Cgroup="CORE"/>
1630     </condition>
1631     <condition id="ARMCM33 CMSIS GCC">
1632       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1633       <require condition="ARMCM33 CMSIS"/>
1634       <require condition="GCC"/>
1635     </condition>
1636
1637     <condition id="ARMSC000 CMSIS">
1638       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1639       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1640       <require Cclass="CMSIS" Cgroup="CORE"/>
1641     </condition>
1642     <condition id="ARMSC000 CMSIS GCC">
1643       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1644       <require condition="ARMSC000 CMSIS"/>
1645       <require condition="GCC"/>
1646     </condition>
1647
1648     <condition id="ARMSC300 CMSIS">
1649       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1650       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1651       <require Cclass="CMSIS" Cgroup="CORE"/>
1652     </condition>
1653     <condition id="ARMSC300 CMSIS GCC">
1654       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1655       <require condition="ARMSC300 CMSIS"/>
1656       <require condition="GCC"/>
1657     </condition>
1658
1659     <condition id="ARMv8MBL CMSIS">
1660       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1661       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1662       <require Cclass="CMSIS" Cgroup="CORE"/>
1663     </condition>
1664     <condition id="ARMv8MBL CMSIS GCC">
1665       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1666       <require condition="ARMv8MBL CMSIS"/>
1667       <require condition="GCC"/>
1668     </condition>
1669
1670     <condition id="ARMv8MML CMSIS">
1671       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1672       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1673       <require Cclass="CMSIS" Cgroup="CORE"/>
1674     </condition>
1675     <condition id="ARMv8MML CMSIS GCC">
1676       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1677       <require condition="ARMv8MML CMSIS"/>
1678       <require condition="GCC"/>
1679     </condition>
1680
1681     <!-- CMSIS DSP -->
1682     <condition id="CMSIS DSP">
1683       <description>Components required for DSP</description>
1684       <require condition="ARMv6_7_8-M Device"/>
1685       <require condition="ARMCC GCC"/>
1686       <require Cclass="CMSIS" Cgroup="CORE"/>
1687     </condition>
1688
1689     <!-- RTOS RTX -->
1690     <condition id="RTOS RTX">
1691       <description>Components required for RTOS RTX</description>
1692       <require condition="ARMv6_7-M Device"/>
1693       <require condition="ARMCC GCC IAR"/>
1694       <require Cclass="Device" Cgroup="Startup"/>
1695       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1696     </condition>
1697     <condition id="RTOS RTX5">
1698       <description>Components required for RTOS RTX5</description>
1699       <require condition="ARMv6_7_8-M Device"/>
1700       <require condition="ARMCC GCC IAR"/>
1701       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1702     </condition>
1703     <condition id="RTOS2 RTX5">
1704       <description>Components required for RTOS2 RTX5</description>
1705       <require condition="ARMv6_7_8-M Device"/>
1706       <require condition="ARMCC GCC IAR"/>
1707       <require Cclass="CMSIS"  Cgroup="CORE"/>
1708       <require Cclass="Device" Cgroup="Startup"/>
1709     </condition>
1710     <condition id="RTOS2 RTX5 NS">
1711       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1712       <require condition="ARMv8-M TZ Device"/>
1713       <require condition="ARMCC GCC"/>
1714       <require Cclass="CMSIS"  Cgroup="CORE"/>
1715       <require Cclass="Device" Cgroup="Startup"/>
1716     </condition>
1717
1718   </conditions>
1719
1720   <components>
1721     <!-- CMSIS-Core component -->
1722     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0"  condition="ARMv6_7_8-M Device" >
1723       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1724       <files>
1725         <!-- CPU independent -->
1726         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1727         <file category="include" name="CMSIS/Include/"/>
1728         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1729         <!-- Code template -->
1730         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1731         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1732       </files>
1733     </component>
1734
1735     <!-- CMSIS-Startup components -->
1736     <!-- Cortex-M0 -->
1737     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1738       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1739       <files>
1740         <!-- include folder / device header file -->
1741         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1742         <!-- startup / system file -->
1743         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1744         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1745         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1746         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1747         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1748       </files>
1749     </component>
1750     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1751       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1752       <files>
1753         <!-- include folder / device header file -->
1754         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1755         <!-- startup / system file -->
1756         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1757         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1758         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1759       </files>
1760     </component>
1761
1762     <!-- Cortex-M0+ -->
1763     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1764       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1765       <files>
1766         <!-- include folder / device header file -->
1767         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1768         <!-- startup / system file -->
1769         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1770         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1771         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1772         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1773         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1774       </files>
1775     </component>
1776     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1777       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1778       <files>
1779         <!-- include folder / device header file -->
1780         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1781         <!-- startup / system file -->
1782         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1783         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1784         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1785       </files>
1786     </component>
1787
1788     <!-- Cortex-M3 -->
1789     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1790       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1791       <files>
1792         <!-- include folder / device header file -->
1793         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1794         <!-- startup / system file -->
1795         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1796         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1797         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1798         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1799         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1800       </files>
1801     </component>
1802     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1803       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1804       <files>
1805         <!-- include folder / device header file -->
1806         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1807         <!-- startup / system file -->
1808         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1809         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1810         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1811       </files>
1812     </component>
1813
1814     <!-- Cortex-M4 -->
1815     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1816       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1817       <files>
1818         <!-- include folder / device header file -->
1819         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1820         <!-- startup / system file -->
1821         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1822         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1823         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1824         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1825         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1826       </files>
1827     </component>
1828     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1829       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1830       <files>
1831         <!-- include folder / device header file -->
1832         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1833         <!-- startup / system file -->
1834         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1835         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1836         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1837       </files>
1838     </component>
1839
1840     <!-- Cortex-M7 -->
1841     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
1842       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1843       <files>
1844         <!-- include folder / device header file -->
1845         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1846         <!-- startup / system file -->
1847         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1848         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1849         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1850         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1851         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1852       </files>
1853     </component>
1854     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1855       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1856       <files>
1857         <!-- include folder / device header file -->
1858         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1859         <!-- startup / system file -->
1860         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1861         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1862         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1863       </files>
1864     </component>
1865
1866     <!-- Cortex-M23 -->
1867     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
1868       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1869       <files>
1870         <!-- include folder / device header file -->
1871         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
1872         <!-- startup / system file -->
1873         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
1874         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
1875         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1876         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1877         <!-- SAU configuration -->
1878         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1879       </files>
1880     </component>
1881     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
1882       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1883       <files>
1884         <!-- include folder / device header file -->
1885         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
1886         <!-- startup / system file -->
1887         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
1888         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1889         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
1890         <!-- SAU configuration -->
1891         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1892       </files>
1893     </component>
1894
1895     <!-- Cortex-M33 -->
1896     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
1897       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1898       <files>
1899         <!-- include folder / device header file -->
1900         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
1901         <!-- startup / system file -->
1902         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
1903         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
1904         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1905         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
1906         <!-- SAU configuration -->
1907         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1908       </files>
1909     </component>
1910     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
1911       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1912       <files>
1913         <!-- include folder / device header file -->
1914         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
1915         <!-- startup / system file -->
1916         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
1917         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
1918         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
1919         <!-- SAU configuration -->
1920         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
1921       </files>
1922     </component>
1923
1924     <!-- Cortex-SC000 -->
1925     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
1926       <description>System and Startup for Generic ARM SC000 device</description>
1927       <files>
1928         <!-- include folder / device header file -->
1929         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1930         <!-- startup / system file -->
1931         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1932         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1933         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1934         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1935         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1936       </files>
1937     </component>
1938     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1939       <description>System and Startup for Generic ARM SC000 device</description>
1940       <files>
1941         <!-- include folder / device header file -->
1942         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1943         <!-- startup / system file -->
1944         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1945         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1946         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1947       </files>
1948     </component>
1949
1950     <!-- Cortex-SC300 -->
1951     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
1952       <description>System and Startup for Generic ARM SC300 device</description>
1953       <files>
1954         <!-- include folder / device header file -->
1955         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1956         <!-- startup / system file -->
1957         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1958         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1959         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1960         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1961         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
1962       </files>
1963     </component>
1964     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1965       <description>System and Startup for Generic ARM SC300 device</description>
1966       <files>
1967         <!-- include folder / device header file -->
1968         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1969         <!-- startup / system file -->
1970         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1971         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1972         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
1973       </files>
1974     </component>
1975
1976     <!-- ARMv8MBL -->
1977     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1978       <description>System and Startup for Generic ARM ARMv8MBL device</description>
1979       <files>
1980         <!-- include folder / device header file -->
1981         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
1982         <!-- startup / system file -->
1983         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
1984         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
1985         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1986         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1987         <!-- SAU configuration -->
1988         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
1989       </files>
1990     </component>
1991     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
1992       <description>System and Startup for Generic ARM ARMv8MBL device</description>
1993       <files>
1994         <!-- include folder / device header file -->
1995         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
1996         <!-- startup / system file -->
1997         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
1998         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1999         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2000         <!-- SAU configuration -->
2001         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2002       </files>
2003     </component>
2004
2005     <!-- ARMv8MML -->
2006     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2007       <description>System and Startup for Generic ARM ARMv8MML device</description>
2008       <files>
2009         <!-- include folder / device header file -->
2010         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2011         <!-- startup / system file -->
2012         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2013         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2014         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2015         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2016         <!-- SAU configuration -->
2017         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2018       </files>
2019     </component>
2020     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2021       <description>System and Startup for Generic ARM ARMv8MML device</description>
2022       <files>
2023         <!-- include folder / device header file -->
2024         <file category="include"  name="Device/ARM/ARMv8MML/Include/"/>
2025         <!-- startup / system file -->
2026         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2027         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2028         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2029         <!-- SAU configuration -->
2030         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2031       </files>
2032     </component>
2033
2034
2035     <!-- CMSIS-DSP component -->
2036     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.1" condition="CMSIS DSP">
2037       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2038       <files>
2039         <!-- CPU independent -->
2040         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2041         <file category="header" name="CMSIS/Include/arm_math.h"/>
2042
2043         <!-- CPU and Compiler dependent -->
2044         <!-- ARMCC -->
2045         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2046         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2047         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2048         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2049         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2050         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2051         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2052         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2053         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2054         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2055         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2056         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2057         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2058         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2059
2060         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2061         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2062         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2063         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2064         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2065         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2066         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2067         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2068         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2069         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2070         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2071         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2072
2073         <!-- GCC -->
2074         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2075         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2076         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2077         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2078         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2079         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2080         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2081
2082         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2083         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2084         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2085         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2086         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2087         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2088         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2089         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2090         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2091         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2092         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2093         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2094
2095       </files>
2096     </component>
2097
2098     <!-- CMSIS-RTOS Keil RTX component -->
2099     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0.0" condition="RTOS RTX">
2100       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2101       <RTE_Components_h>
2102         <!-- the following content goes into file 'RTE_Components.h' -->
2103         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2104         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2105       </RTE_Components_h>
2106       <files>
2107         <!-- CPU independent -->
2108         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2109         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2110         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2111
2112         <!-- RTX templates -->
2113         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2114         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2115         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2116         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2117         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2118         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2119         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2120         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2121         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2122         <!-- tool-chain specific template file -->
2123         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2124         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2125         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2126
2127         <!-- CPU and Compiler dependent -->
2128         <!-- ARMCC -->
2129         <file category="library" condition="CM0_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2130         <file category="library" condition="CM0_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2131         <file category="library" condition="CM3_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2132         <file category="library" condition="CM3_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2133         <file category="library" condition="CM4_LE_ARMCC_STD"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2134         <file category="library" condition="CM4_LE_ARMCC_IFX"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2135         <file category="library" condition="CM4_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2136         <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2137         <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2138         <file category="library" condition="CM4_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2139         <file category="library" condition="CM7_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2140         <file category="library" condition="CM7_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2141         <file category="library" condition="CM7_FP_LE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2142         <file category="library" condition="CM7_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2143         <!-- GCC -->
2144         <file category="library" condition="CM0_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2145         <file category="library" condition="CM0_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2146         <file category="library" condition="CM3_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2147         <file category="library" condition="CM3_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2148         <file category="library" condition="CM4_LE_GCC_STD"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2149         <file category="library" condition="CM4_LE_GCC_IFX"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2150         <file category="library" condition="CM4_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2151         <file category="library" condition="CM4_FP_LE_GCC_STD"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2152         <file category="library" condition="CM4_FP_LE_GCC_IFX"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2153         <file category="library" condition="CM4_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2154         <file category="library" condition="CM7_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2155         <file category="library" condition="CM7_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2156         <file category="library" condition="CM7_FP_LE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2157         <file category="library" condition="CM7_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2158         <!-- IAR -->
2159         <file category="library" condition="CM0_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2160         <file category="library" condition="CM0_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2161         <file category="library" condition="CM3_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2162         <file category="library" condition="CM3_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2163         <file category="library" condition="CM4_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2164         <file category="library" condition="CM4_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2165         <file category="library" condition="CM4_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2166         <file category="library" condition="CM4_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2167         <file category="library" condition="CM7_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2168         <file category="library" condition="CM7_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2169         <file category="library" condition="CM7_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2170         <file category="library" condition="CM7_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2171       </files>
2172     </component>
2173
2174     <!-- CMSIS-RTOS Keil RTX5 component -->
2175     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.1.0" Capiversion="1.0.0" condition="RTOS RTX5">
2176       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2177       <RTE_Components_h>
2178         <!-- the following content goes into file 'RTE_Components.h' -->
2179         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2180         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2181       </RTE_Components_h>
2182       <files>
2183         <!-- RTX header file -->
2184         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2185         <!-- RTX compatibility module for API V1 -->
2186         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2187       </files>
2188     </component>
2189
2190     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2191     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5">
2192       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2193       <RTE_Components_h>
2194         <!-- the following content goes into file 'RTE_Components.h' -->
2195         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2196         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2197       </RTE_Components_h>
2198       <files>
2199         <!-- RTX documentation -->
2200         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2201
2202         <!-- RTX header files -->
2203         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2204
2205         <!-- RTX configuration -->
2206         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2207         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2208
2209         <!-- RTX templates -->
2210         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2211         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2212         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2213         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2214         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2215         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2216         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2217         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2218         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2219
2220         <!-- RTX library configuration -->
2221         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2222
2223         <!-- RTX libraries (CPU and Compiler dependent) -->
2224         <!-- ARMCC -->
2225         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2226         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2227         <file category="library" condition="CM4_LE_ARMCC_STD"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2228         <file category="library" condition="CM4_FP_LE_ARMCC_STD"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2229         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2230         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2231         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2232         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2233         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2234         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2235         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2236         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2237         <!-- GCC -->
2238         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2239         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2240         <file category="library" condition="CM4_LE_GCC_STD"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2241         <file category="library" condition="CM4_FP_LE_GCC_STD"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2242         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2243         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2244         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2245         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2246         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2247         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2248         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2249         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2250         <!-- IAR -->
2251         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2252         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2253         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2254         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2255         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2256         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2257       </files>
2258     </component>
2259     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5 NS">
2260       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2261       <RTE_Components_h>
2262         <!-- the following content goes into file 'RTE_Components.h' -->
2263         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2264         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2265         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2266       </RTE_Components_h>
2267       <files>
2268         <!-- RTX documentation -->
2269         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2270
2271         <!-- RTX header files -->
2272         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2273
2274         <!-- RTX configuration -->
2275         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2276         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2277
2278         <!-- RTX templates -->
2279         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2280         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2281         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2282         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2283         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2284         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2285         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2286         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2287         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2288
2289         <!-- RTX library configuration -->
2290         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2291
2292         <!-- RTX libraries (CPU and Compiler dependent) -->
2293         <!-- ARMCC -->
2294         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2295         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2296         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2297         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2298         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2299         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2300         <!-- GCC -->
2301         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2302         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2303         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2304         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2305         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2306         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2307       </files>
2308     </component>
2309     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5">
2310       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2311       <RTE_Components_h>
2312         <!-- the following content goes into file 'RTE_Components.h' -->
2313         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2314         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2315         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2316       </RTE_Components_h>
2317       <files>
2318         <!-- RTX documentation -->
2319         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2320
2321         <!-- RTX header files -->
2322         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2323
2324         <!-- RTX configuration -->
2325         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2326         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2327
2328         <!-- RTX templates -->
2329         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2330         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2331         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2332         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2333         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2334         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2335         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2336         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2337         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2338
2339         <!-- RTX sources (core) -->
2340         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2341         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2342         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2343         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2344         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2345         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2346         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2347         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2348         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2349         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2350         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2351         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2352         <!-- RTX sources (library configuration) -->
2353         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2354         <!-- RTX sources (handlers ARMCC) -->
2355         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2356         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2357         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2358         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2359         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2360         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2361         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2362         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2363         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2364         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2365         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2366         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2367         <!-- RTX sources (handlers GCC) -->
2368         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2369         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2370         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2371         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2372         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2373         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2374         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2375         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2376         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2377         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2378         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2379         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2380         <!-- RTX sources (handlers IAR) -->
2381         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2382         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2383         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2384         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2385         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2386         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2387       </files>
2388     </component>
2389     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.1.0" Capiversion="2.1.0" condition="RTOS2 RTX5 NS">
2390       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2391       <RTE_Components_h>
2392         <!-- the following content goes into file 'RTE_Components.h' -->
2393         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2394         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2395         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2396         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2397       </RTE_Components_h>
2398       <files>
2399         <!-- RTX documentation -->
2400         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2401
2402         <!-- RTX header files -->
2403         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2404
2405         <!-- RTX configuration -->
2406         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2407         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2408
2409         <!-- RTX templates -->
2410         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2411         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2412         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2413         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2414         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2415         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2416         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2417         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2418         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2419
2420         <!-- RTX sources (core) -->
2421         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2422         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2423         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2424         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2425         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2426         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2427         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2428         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2429         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2430         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2431         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2432         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2433         <!-- RTX sources (library configuration) -->
2434         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2435         <!-- RTX sources (ARMCC handlers) -->
2436         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2437         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2438         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2439         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2440         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2441         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2442         <!-- RTX sources (GCC handlers) -->
2443         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2444         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2445         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2446         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2447         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2448         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2449       </files>
2450     </component>
2451
2452   </components>
2453
2454   <boards>
2455     <board name="uVision Simulator" vendor="Keil">
2456       <description>uVision Simulator</description>
2457       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2458       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2459       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2460       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2461       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2462       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2463       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2464       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2465       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2466       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2467       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2468       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2469       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2470       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2471       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2472       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2473       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2474    </board>
2475   </boards>
2476
2477   <examples>
2478     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2479       <description>DSP_Lib Class Marks example</description>
2480       <board name="uVision Simulator" vendor="Keil"/>
2481       <project>
2482         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2483       </project>
2484       <attributes>
2485         <component Cclass="CMSIS" Cgroup="CORE"/>
2486         <component Cclass="CMSIS" Cgroup="DSP"/>
2487         <component Cclass="Device" Cgroup="Startup"/>
2488         <category>Getting Started</category>
2489       </attributes>
2490     </example>
2491
2492     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2493       <description>DSP_Lib Convolution example</description>
2494       <board name="uVision Simulator" vendor="Keil"/>
2495       <project>
2496         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2497       </project>
2498       <attributes>
2499         <component Cclass="CMSIS" Cgroup="CORE"/>
2500         <component Cclass="CMSIS" Cgroup="DSP"/>
2501         <component Cclass="Device" Cgroup="Startup"/>
2502         <category>Getting Started</category>
2503       </attributes>
2504     </example>
2505
2506     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2507       <description>DSP_Lib Dotproduct example</description>
2508       <board name="uVision Simulator" vendor="Keil"/>
2509       <project>
2510         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2511       </project>
2512       <attributes>
2513         <component Cclass="CMSIS" Cgroup="CORE"/>
2514         <component Cclass="CMSIS" Cgroup="DSP"/>
2515         <component Cclass="Device" Cgroup="Startup"/>
2516         <category>Getting Started</category>
2517       </attributes>
2518     </example>
2519
2520     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2521       <description>DSP_Lib FFT Bin example</description>
2522       <board name="uVision Simulator" vendor="Keil"/>
2523       <project>
2524         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2525       </project>
2526       <attributes>
2527         <component Cclass="CMSIS" Cgroup="CORE"/>
2528         <component Cclass="CMSIS" Cgroup="DSP"/>
2529         <component Cclass="Device" Cgroup="Startup"/>
2530         <category>Getting Started</category>
2531       </attributes>
2532     </example>
2533
2534     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2535       <description>DSP_Lib FIR example</description>
2536       <board name="uVision Simulator" vendor="Keil"/>
2537       <project>
2538         <environment name="uv" load="arm_fir_example.uvprojx"/>
2539       </project>
2540       <attributes>
2541         <component Cclass="CMSIS" Cgroup="CORE"/>
2542         <component Cclass="CMSIS" Cgroup="DSP"/>
2543         <component Cclass="Device" Cgroup="Startup"/>
2544         <category>Getting Started</category>
2545       </attributes>
2546     </example>
2547
2548     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2549       <description>DSP_Lib Graphic Equalizer example</description>
2550       <board name="uVision Simulator" vendor="Keil"/>
2551       <project>
2552         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2553       </project>
2554       <attributes>
2555         <component Cclass="CMSIS" Cgroup="CORE"/>
2556         <component Cclass="CMSIS" Cgroup="DSP"/>
2557         <component Cclass="Device" Cgroup="Startup"/>
2558         <category>Getting Started</category>
2559       </attributes>
2560     </example>
2561
2562     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2563       <description>DSP_Lib Linear Interpolation example</description>
2564       <board name="uVision Simulator" vendor="Keil"/>
2565       <project>
2566         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2567       </project>
2568       <attributes>
2569         <component Cclass="CMSIS" Cgroup="CORE"/>
2570         <component Cclass="CMSIS" Cgroup="DSP"/>
2571         <component Cclass="Device" Cgroup="Startup"/>
2572         <category>Getting Started</category>
2573       </attributes>
2574     </example>
2575
2576     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2577       <description>DSP_Lib Matrix example</description>
2578       <board name="uVision Simulator" vendor="Keil"/>
2579       <project>
2580         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2581       </project>
2582       <attributes>
2583         <component Cclass="CMSIS" Cgroup="CORE"/>
2584         <component Cclass="CMSIS" Cgroup="DSP"/>
2585         <component Cclass="Device" Cgroup="Startup"/>
2586         <category>Getting Started</category>
2587       </attributes>
2588     </example>
2589
2590     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2591       <description>DSP_Lib Signal Convergence example</description>
2592       <board name="uVision Simulator" vendor="Keil"/>
2593       <project>
2594         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2595       </project>
2596       <attributes>
2597         <component Cclass="CMSIS" Cgroup="CORE"/>
2598         <component Cclass="CMSIS" Cgroup="DSP"/>
2599         <component Cclass="Device" Cgroup="Startup"/>
2600         <category>Getting Started</category>
2601       </attributes>
2602     </example>
2603
2604     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2605       <description>DSP_Lib Sinus/Cosinus example</description>
2606       <board name="uVision Simulator" vendor="Keil"/>
2607       <project>
2608         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2609       </project>
2610       <attributes>
2611         <component Cclass="CMSIS" Cgroup="CORE"/>
2612         <component Cclass="CMSIS" Cgroup="DSP"/>
2613         <component Cclass="Device" Cgroup="Startup"/>
2614         <category>Getting Started</category>
2615       </attributes>
2616     </example>
2617
2618     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2619       <description>DSP_Lib Variance example</description>
2620       <board name="uVision Simulator" vendor="Keil"/>
2621       <project>
2622         <environment name="uv" load="arm_variance_example.uvprojx"/>
2623       </project>
2624       <attributes>
2625         <component Cclass="CMSIS" Cgroup="CORE"/>
2626         <component Cclass="CMSIS" Cgroup="DSP"/>
2627         <component Cclass="Device" Cgroup="Startup"/>
2628         <category>Getting Started</category>
2629       </attributes>
2630     </example>
2631
2632     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2633       <description>CMSIS-RTOS2 Blinky example</description>
2634       <board name="uVision Simulator" vendor="Keil"/>
2635       <project>
2636         <environment name="uv" load="Blinky.uvprojx"/>
2637       </project>
2638       <attributes>
2639         <component Cclass="CMSIS" Cgroup="CORE"/>
2640         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2641         <component Cclass="Device" Cgroup="Startup"/>
2642         <category>Getting Started</category>
2643       </attributes>
2644     </example>
2645
2646     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2647       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2648       <board name="uVision Simulator" vendor="Keil"/>
2649       <project>
2650         <environment name="uv" load="Blinky.uvprojx"/>
2651       </project>
2652       <attributes>
2653         <component Cclass="CMSIS" Cgroup="CORE"/>
2654         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2655         <component Cclass="Device" Cgroup="Startup"/>
2656         <category>Getting Started</category>
2657       </attributes>
2658     </example>
2659
2660     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2661       <description>Bare-metal secure/non-secure example without RTOS</description>
2662       <board name="uVision Simulator" vendor="Keil"/>
2663       <project>
2664         <environment name="uv" load="NoRTOS.uvmpw"/>
2665       </project>
2666       <attributes>
2667         <component Cclass="CMSIS" Cgroup="CORE"/>
2668         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2669         <component Cclass="Device" Cgroup="Startup"/>
2670         <category>Getting Started</category>
2671       </attributes>
2672     </example>
2673
2674     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2675       <description>Secure/non-secure RTOS example with thread context management</description>
2676       <board name="uVision Simulator" vendor="Keil"/>
2677       <project>
2678         <environment name="uv" load="RTOS.uvmpw"/>
2679       </project>
2680       <attributes>
2681         <component Cclass="CMSIS" Cgroup="CORE"/>
2682         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2683         <component Cclass="Device" Cgroup="Startup"/>
2684         <category>Getting Started</category>
2685       </attributes>
2686     </example>
2687
2688     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2689       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2690       <board name="uVision Simulator" vendor="Keil"/>
2691       <project>
2692         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2693       </project>
2694       <attributes>
2695         <component Cclass="CMSIS" Cgroup="CORE"/>
2696         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2697         <component Cclass="Device" Cgroup="Startup"/>
2698         <category>Getting Started</category>
2699       </attributes>
2700     </example>
2701
2702   </examples>
2703
2704 </package>