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 128 <a href="#groups">Content</a> &#124;
 129 <a href="#nested-classes">Data Structures</a> &#124;
 130 <a href="#func-members">Functions</a>  </div>
 131   <div class="headertitle"><div class="title">System Control Register (SCTLR)<div class="ingroups"><a class="el" href="group__CMSIS__core__register.html">Core Register Access</a></div></div></div>
 132 </div><!--header-->
 133 <div class="contents">
 134
 135 <p>The SCTLR provides the top level control of the system, including its memory system.
 136 <a href="#details">More...</a></p>
 137 <table class="memberdecls">
 138 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="groups" name="groups"></a>
 139 Content</h2></td></tr>
 140 <tr class="memitem:group__CMSIS__SCTLR__BITS"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR__BITS.html">SCTLR Bits</a></td></tr>
 141 <tr class="memdesc:group__CMSIS__SCTLR__BITS"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit position and mask macros. <br /></td></tr>
 142 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 143 </table><table class="memberdecls">
 144 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="nested-classes" name="nested-classes"></a>
 145 Data Structures</h2></td></tr>
 146 <tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionSCTLR__Type.html">SCTLR_Type</a></td></tr>
 147 <tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bit field declaration for SCTLR layout.  <a href="unionSCTLR__Type.html#details">More...</a><br /></td></tr>
 148 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 149 </table><table class="memberdecls">
 150 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
 151 Functions</h2></td></tr>
 152 <tr class="memitem:gaf9b8e96ddd2e76c4475cf957600fd57a"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR.html#gaf9b8e96ddd2e76c4475cf957600fd57a">__set_SCTLR</a> (uint32_t sctlr)</td></tr>
 153 <tr class="memdesc:gaf9b8e96ddd2e76c4475cf957600fd57a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set SCTLR.  <br /></td></tr>
 154 <tr class="separator:gaf9b8e96ddd2e76c4475cf957600fd57a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 155 <tr class="memitem:ga3070304d6180433c91c4e6daef3f3c73"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__comp__cntrl__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__CMSIS__SCTLR.html#ga3070304d6180433c91c4e6daef3f3c73">__get_SCTLR</a> (void)</td></tr>
 156 <tr class="memdesc:ga3070304d6180433c91c4e6daef3f3c73"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get SCTLR.  <br /></td></tr>
 157 <tr class="separator:ga3070304d6180433c91c4e6daef3f3c73"><td class="memSeparator" colspan="2">&#160;</td></tr>
 158 </table>
 159 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 160 <p>The SCTLR provides the top level control of the system, including its memory system. </p>
 161 <p>In a VMSAv7 implementation, the SCTLR bit assignments are:</p>
 162 <table class="markdownTable">
 163 <tr class="markdownTableHead">
 164 <th class="markdownTableHeadLeft">Bits   </th><th class="markdownTableHeadLeft">Name   </th><th class="markdownTableHeadLeft">Function    </th></tr>
 165 <tr class="markdownTableRowOdd">
 166 <td class="markdownTableBodyLeft">[31]   </td><td class="markdownTableBodyLeft">-   </td><td class="markdownTableBodyLeft">Reserved.    </td></tr>
 167 <tr class="markdownTableRowEven">
 168 <td class="markdownTableBodyLeft">[30]   </td><td class="markdownTableBodyLeft">TE   </td><td class="markdownTableBodyLeft">Thumb Exception enable.    </td></tr>
 169 <tr class="markdownTableRowOdd">
 170 <td class="markdownTableBodyLeft">[29]   </td><td class="markdownTableBodyLeft">AFE   </td><td class="markdownTableBodyLeft">Access flag enable bit.    </td></tr>
 171 <tr class="markdownTableRowEven">
 172 <td class="markdownTableBodyLeft">[28]   </td><td class="markdownTableBodyLeft">TRE   </td><td class="markdownTableBodyLeft">TEX remap enable bit.    </td></tr>
 173 <tr class="markdownTableRowOdd">
 174 <td class="markdownTableBodyLeft">[27:26]   </td><td class="markdownTableBodyLeft">-   </td><td class="markdownTableBodyLeft">Reserved.    </td></tr>
 175 <tr class="markdownTableRowEven">
 176 <td class="markdownTableBodyLeft">[25]   </td><td class="markdownTableBodyLeft">EE   </td><td class="markdownTableBodyLeft">Exception Endianness bit.    </td></tr>
 177 <tr class="markdownTableRowOdd">
 178 <td class="markdownTableBodyLeft">[24:21]   </td><td class="markdownTableBodyLeft">-   </td><td class="markdownTableBodyLeft">Reserved.    </td></tr>
 179 <tr class="markdownTableRowEven">
 180 <td class="markdownTableBodyLeft">[20]   </td><td class="markdownTableBodyLeft">UWXN   </td><td class="markdownTableBodyLeft">Unprivileged write permission implies PL1 Execute Never (XN).    </td></tr>
 181 <tr class="markdownTableRowOdd">
 182 <td class="markdownTableBodyLeft">[19]   </td><td class="markdownTableBodyLeft">WXN   </td><td class="markdownTableBodyLeft">Write permission implies Execute Never (XN).    </td></tr>
 183 <tr class="markdownTableRowEven">
 184 <td class="markdownTableBodyLeft">[18:14]   </td><td class="markdownTableBodyLeft">-   </td><td class="markdownTableBodyLeft">Reserved.    </td></tr>
 185 <tr class="markdownTableRowOdd">
 186 <td class="markdownTableBodyLeft">[13]   </td><td class="markdownTableBodyLeft">V   </td><td class="markdownTableBodyLeft">Vectors bit.    </td></tr>
 187 <tr class="markdownTableRowEven">
 188 <td class="markdownTableBodyLeft">[12]   </td><td class="markdownTableBodyLeft">I   </td><td class="markdownTableBodyLeft">Instruction cache enable bit.    </td></tr>
 189 <tr class="markdownTableRowOdd">
 190 <td class="markdownTableBodyLeft">[11]   </td><td class="markdownTableBodyLeft">Z   </td><td class="markdownTableBodyLeft">Branch prediction enable bit.    </td></tr>
 191 <tr class="markdownTableRowEven">
 192 <td class="markdownTableBodyLeft">[10]   </td><td class="markdownTableBodyLeft">SW   </td><td class="markdownTableBodyLeft">SWP and SWPB enable bit.    </td></tr>
 193 <tr class="markdownTableRowOdd">
 194 <td class="markdownTableBodyLeft">[9:3]   </td><td class="markdownTableBodyLeft">-   </td><td class="markdownTableBodyLeft">Reserved.    </td></tr>
 195 <tr class="markdownTableRowEven">
 196 <td class="markdownTableBodyLeft">[2]   </td><td class="markdownTableBodyLeft">C   </td><td class="markdownTableBodyLeft">Cache enable bit.    </td></tr>
 197 <tr class="markdownTableRowOdd">
 198 <td class="markdownTableBodyLeft">[1]   </td><td class="markdownTableBodyLeft">A   </td><td class="markdownTableBodyLeft">Alignment bit.    </td></tr>
 199 <tr class="markdownTableRowEven">
 200 <td class="markdownTableBodyLeft">[0]   </td><td class="markdownTableBodyLeft">M   </td><td class="markdownTableBodyLeft">Address translation enable bit.   </td></tr>
 201 </table>
 202 <p>Consider using <a class="el" href="group__CMSIS__SCTLR.html#ga3070304d6180433c91c4e6daef3f3c73">__get_SCTLR</a> and <a class="el" href="group__CMSIS__SCTLR.html#gaf9b8e96ddd2e76c4475cf957600fd57a">__set_SCTLR</a> for accessing this register. </p>
 203 <h2 class="groupheader">Function Documentation</h2>
 204 <a id="ga3070304d6180433c91c4e6daef3f3c73" name="ga3070304d6180433c91c4e6daef3f3c73"></a>
 205 <h2 class="memtitle"><span class="permalink"><a href="#ga3070304d6180433c91c4e6daef3f3c73">&#9670;&#160;</a></span>__get_SCTLR()</h2>
 206
 207 <div class="memitem">
 208 <div class="memproto">
 209       <table class="memname">
 210         <tr>
 211           <td class="memname">__STATIC_INLINE uint32_t __get_SCTLR </td>
 212           <td>(</td>
 213           <td class="paramtype">void&#160;</td>
 214           <td class="paramname"></td><td>)</td>
 215           <td></td>
 216         </tr>
 217       </table>
 218 </div><div class="memdoc">
 219
 220 <p>Get SCTLR. </p>
 221 <dl class="section return"><dt>Returns</dt><dd>System Control Register value</dd></dl>
 222 <p>This function returns the value of the <a class="el" href="group__CMSIS__SCTLR.html">System Control Register (SCTLR)</a>. </p>
 223
 224 </div>
 225 </div>
 226 <a id="gaf9b8e96ddd2e76c4475cf957600fd57a" name="gaf9b8e96ddd2e76c4475cf957600fd57a"></a>
 227 <h2 class="memtitle"><span class="permalink"><a href="#gaf9b8e96ddd2e76c4475cf957600fd57a">&#9670;&#160;</a></span>__set_SCTLR()</h2>
 228
 229 <div class="memitem">
 230 <div class="memproto">
 231       <table class="memname">
 232         <tr>
 233           <td class="memname">__STATIC_INLINE void __set_SCTLR </td>
 234           <td>(</td>
 235           <td class="paramtype">uint32_t&#160;</td>
 236           <td class="paramname"><em>sctlr</em></td><td>)</td>
 237           <td></td>
 238         </tr>
 239       </table>
 240 </div><div class="memdoc">
 241
 242 <p>Set SCTLR. </p>
 243 <p>This function assigns the given value to the System Control Register.</p>
 244 <dl class="params"><dt>Parameters</dt><dd>
 245   <table class="params">
 246     <tr><td class="paramdir">[in]</td><td class="paramname">sctlr</td><td>System Control Register value to set</td></tr>
 247   </table>
 248   </dd>
 249 </dl>
 250 <p>This function assigns the given value to the <a class="el" href="group__CMSIS__SCTLR.html">System Control Register (SCTLR)</a>. </p>
 251
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