]> begriffs open source - cmsis/history - CMSIS/Core/Include/mpu_armv7.h
Core(A): Fixed GIC_SetPendingIRQ to raise interrupt only once.
[cmsis] / CMSIS / Core / Include / mpu_armv7.h
2018-01-10 Jonatan AntoniUpdating company brand
2017-12-01 Jonatan AntoniCore(M): Fixed MISRA and typos.
2017-11-13 Rajmund SzymaƄskiCore(M): Update mpu_armv7.h and mpu_armv8.h
2017-10-17 Jonatan AntoniCore: Aligned all core headers with pragma system include.
2017-10-17 Jonatan AntoniCore: Fixed MISRA warnings.
2017-09-08 Jonatan AntoniCore: Fixed minor compiler and MISRA warnings.
2017-09-06 Jonatan AntoniCore(M): Fixed indention in mpu_armv7.h
2017-08-29 Jonatan AntoniFurther MISRA-C Rule 10.6 fix up: Unsigned constant...
2017-08-29 Jonatan AntoniGlobal MISRA-C Rule 10.6 fix up: Unsigned constant...
2017-08-09 Jonatan AntoniCMSIS-Core(M): Fixed ARMv7 MPU Function for loading...
2017-07-27 Jonatan AntoniCMSIS-Core(M): Fixed ARM MPU implementation for Cortex...
2017-07-26 Jonatan AntoniCMSIS-Core(M): Prefixed all MPU functions with ARM_...
2017-07-25 Daniel BrondaniCMSIS-Core(M): Fixed typos and formatting in MPU functions.
2017-07-19 Jonatan AntoniCMSIS-Core(M): Fix up MPU implementation.
2017-07-18 Jonatan AntoniCMSIS-Core(M): Initial contribution for generic MPU...