begriffs open source - freertos/blob - portable/GCC/RX700v3_DPFPU/port.c

   1 /*
   2  * FreeRTOS Kernel <DEVELOPMENT BRANCH>
   3  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a copy of
   6  * this software and associated documentation files (the "Software"), to deal in
   7  * the Software without restriction, including without limitation the rights to
   8  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
   9  * the Software, and to permit persons to whom the Software is furnished to do so,
  10  * subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be included in all
  13  * copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  17  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  18  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  19  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  20  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * https://www.FreeRTOS.org
  23  * https://github.com/FreeRTOS
  24  *
  25  * 1 tab == 4 spaces!
  26  */
  27
  28 /*-----------------------------------------------------------
  29 * Implementation of functions defined in portable.h for the RXv3 DPFPU port.
  30 *----------------------------------------------------------*/
  31
  32 #warning Testing for DFPU support in this port is not yet complete
  33
  34 /* Scheduler includes. */
  35 #include "FreeRTOS.h"
  36 #include "task.h"
  37
  38 /* Library includes. */
  39 #include "string.h"
  40
  41 /* Hardware specifics. */
  42 #if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
  43
  44     #include "platform.h"
  45
  46 #else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
  47
  48     #include "iodefine.h"
  49
  50 #endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
  51
  52 /*-----------------------------------------------------------*/
  53
  54 /* Tasks should start with interrupts enabled and in Supervisor mode, therefore
  55  * PSW is set with U and I set, and PM and IPL clear. */
  56 #define portINITIAL_PSW     ( ( StackType_t ) 0x00030000 )
  57 #define portINITIAL_FPSW    ( ( StackType_t ) 0x00000100 )
  58 #define portINITIAL_DPSW    ( ( StackType_t ) 0x00000100 )
  59 #define portINITIAL_DCMR    ( ( StackType_t ) 0x00000000 )
  60 #define portINITIAL_DECNT   ( ( StackType_t ) 0x00000001 )
  61
  62 /* Tasks are not created with a DPFPU context, but can be given a DPFPU context
  63  * after they have been created.  A variable is stored as part of the tasks context
  64  * that holds portNO_DPFPU_CONTEXT if the task does not have a DPFPU context, or
  65  * any other value if the task does have a DPFPU context. */
  66 #define portNO_DPFPU_CONTEXT    ( ( StackType_t ) 0 )
  67 #define portHAS_DPFPU_CONTEXT   ( ( StackType_t ) 1 )
  68
  69 /* The space on the stack required to hold the DPFPU data registers.  This is 16
  70  * 64-bit registers. */
  71 #define portDPFPU_DATA_REGISTER_WORDS   ( 16 * 2 )
  72
  73 /* These macros allow a critical section to be added around the call to
  74  * xTaskIncrementTick(), which is only ever called from interrupts at the kernel
  75  * priority - ie a known priority.  Therefore these local macros are a slight
  76  * optimisation compared to calling the global SET/CLEAR_INTERRUPT_MASK macros,
  77  * which would require the old IPL to be read first and stored in a local variable. */
  78 #define portMASK_INTERRUPTS_FROM_KERNEL_ISR()      __asm volatile ( "MVTIPL     %0" ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) )
  79 #define portUNMASK_INTERRUPTS_FROM_KERNEL_ISR()    __asm volatile ( "MVTIPL     %0" ::"i" ( configKERNEL_INTERRUPT_PRIORITY ) )
  80
  81 /*-----------------------------------------------------------*/
  82
  83 /*
  84  * Function to start the first task executing - written in asm code as direct
  85  * access to registers is required.
  86  */
  87 static void prvStartFirstTask( void ) __attribute__( ( naked ) );
  88
  89 /*
  90  * Software interrupt handler.  Performs the actual context switch (saving and
  91  * restoring of registers).  Written in asm code as direct register access is
  92  * required.
  93  */
  94 #if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
  95
  96     R_BSP_PRAGMA_INTERRUPT( vSoftwareInterruptISR, VECT( ICU, SWINT ) )
  97     R_BSP_ATTRIB_INTERRUPT void vSoftwareInterruptISR( void ) __attribute__( ( naked ) );
  98
  99 #else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
 100
 101     void vSoftwareInterruptISR( void ) __attribute__( ( naked ) );
 102
 103 #endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H  */
 104
 105 /*
 106  * The tick ISR handler.  The peripheral used is configured by the application
 107  * via a hook/callback function.
 108  */
 109 #if ( configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H == 1 )
 110
 111     R_BSP_PRAGMA_INTERRUPT( vTickISR, _VECT( configTICK_VECTOR ) )
 112     R_BSP_ATTRIB_INTERRUPT void vTickISR( void ); /* Do not add __attribute__( ( interrupt ) ). */
 113
 114 #else /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
 115
 116     void vTickISR( void ) __attribute__( ( interrupt ) );
 117
 118 #endif /* configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H */
 119
 120 /*-----------------------------------------------------------*/
 121
 122 /* Saved as part of the task context.  If ulPortTaskHasDPFPUContext is non-zero
 123  * then a DPFPU context must be saved and restored for the task. */
 124 #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
 125
 126     StackType_t ulPortTaskHasDPFPUContext = portNO_DPFPU_CONTEXT;
 127
 128 #endif /* configUSE_TASK_DPFPU_SUPPORT */
 129
 130 /* This is accessed by the inline assembler functions so is file scope for
 131  * convenience. */
 132 extern void * pxCurrentTCB;
 133 extern void vTaskSwitchContext( void );
 134
 135 /*-----------------------------------------------------------*/
 136
 137 /*
 138  * See header file for description.
 139  */
 140 StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
 141                                      TaskFunction_t pxCode,
 142                                      void * pvParameters )
 143 {
 144     /* R0 is not included as it is the stack pointer. */
 145
 146     *pxTopOfStack = 0x00;
 147     pxTopOfStack--;
 148     *pxTopOfStack = portINITIAL_PSW;
 149     pxTopOfStack--;
 150     *pxTopOfStack = ( StackType_t ) pxCode;
 151
 152     /* When debugging it can be useful if every register is set to a known
 153      * value.  Otherwise code space can be saved by just setting the registers
 154      * that need to be set. */
 155     #ifdef USE_FULL_REGISTER_INITIALISATION
 156         {
 157             pxTopOfStack--;
 158             *pxTopOfStack = 0xffffffff; /* r15. */
 159             pxTopOfStack--;
 160             *pxTopOfStack = 0xeeeeeeee;
 161             pxTopOfStack--;
 162             *pxTopOfStack = 0xdddddddd;
 163             pxTopOfStack--;
 164             *pxTopOfStack = 0xcccccccc;
 165             pxTopOfStack--;
 166             *pxTopOfStack = 0xbbbbbbbb;
 167             pxTopOfStack--;
 168             *pxTopOfStack = 0xaaaaaaaa;
 169             pxTopOfStack--;
 170             *pxTopOfStack = 0x99999999;
 171             pxTopOfStack--;
 172             *pxTopOfStack = 0x88888888;
 173             pxTopOfStack--;
 174             *pxTopOfStack = 0x77777777;
 175             pxTopOfStack--;
 176             *pxTopOfStack = 0x66666666;
 177             pxTopOfStack--;
 178             *pxTopOfStack = 0x55555555;
 179             pxTopOfStack--;
 180             *pxTopOfStack = 0x44444444;
 181             pxTopOfStack--;
 182             *pxTopOfStack = 0x33333333;
 183             pxTopOfStack--;
 184             *pxTopOfStack = 0x22222222;
 185             pxTopOfStack--;
 186         }
 187     #else /* ifdef USE_FULL_REGISTER_INITIALISATION */
 188         {
 189             pxTopOfStack -= 15;
 190         }
 191     #endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
 192
 193     *pxTopOfStack = ( StackType_t ) pvParameters; /* R1 */
 194     pxTopOfStack--;
 195     *pxTopOfStack = portINITIAL_FPSW;
 196     pxTopOfStack--;
 197     *pxTopOfStack = 0x11111111; /* Accumulator 1. */
 198     pxTopOfStack--;
 199     *pxTopOfStack = 0x22222222; /* Accumulator 1. */
 200     pxTopOfStack--;
 201     *pxTopOfStack = 0x33333333; /* Accumulator 1. */
 202     pxTopOfStack--;
 203     *pxTopOfStack = 0x44444444; /* Accumulator 0. */
 204     pxTopOfStack--;
 205     *pxTopOfStack = 0x55555555; /* Accumulator 0. */
 206     pxTopOfStack--;
 207     *pxTopOfStack = 0x66666666; /* Accumulator 0. */
 208
 209     #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
 210         {
 211             /* The task will start without a DPFPU context.  A task that
 212              * uses the DPFPU hardware must call vPortTaskUsesDPFPU() before
 213              * executing any floating point instructions. */
 214             pxTopOfStack--;
 215             *pxTopOfStack = portNO_DPFPU_CONTEXT;
 216         }
 217     #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
 218         {
 219             /* The task will start with a DPFPU context.  Leave enough
 220              * space for the registers - and ensure they are initialised if desired. */
 221             #ifdef USE_FULL_REGISTER_INITIALISATION
 222                 {
 223                     pxTopOfStack -= 2;
 224                     *(double *)pxTopOfStack = 1515.1515; /* DR15. */
 225                     pxTopOfStack -= 2;
 226                     *(double *)pxTopOfStack = 1414.1414; /* DR14. */
 227                     pxTopOfStack -= 2;
 228                     *(double *)pxTopOfStack = 1313.1313; /* DR13. */
 229                     pxTopOfStack -= 2;
 230                     *(double *)pxTopOfStack = 1212.1212; /* DR12. */
 231                     pxTopOfStack -= 2;
 232                     *(double *)pxTopOfStack = 1111.1111; /* DR11. */
 233                     pxTopOfStack -= 2;
 234                     *(double *)pxTopOfStack = 1010.1010; /* DR10. */
 235                     pxTopOfStack -= 2;
 236                     *(double *)pxTopOfStack =  909.0909; /* DR9. */
 237                     pxTopOfStack -= 2;
 238                     *(double *)pxTopOfStack =  808.0808; /* DR8. */
 239                     pxTopOfStack -= 2;
 240                     *(double *)pxTopOfStack =  707.0707; /* DR7. */
 241                     pxTopOfStack -= 2;
 242                     *(double *)pxTopOfStack =  606.0606; /* DR6. */
 243                     pxTopOfStack -= 2;
 244                     *(double *)pxTopOfStack =  505.0505; /* DR5. */
 245                     pxTopOfStack -= 2;
 246                     *(double *)pxTopOfStack =  404.0404; /* DR4. */
 247                     pxTopOfStack -= 2;
 248                     *(double *)pxTopOfStack =  303.0303; /* DR3. */
 249                     pxTopOfStack -= 2;
 250                     *(double *)pxTopOfStack =  202.0202; /* DR2. */
 251                     pxTopOfStack -= 2;
 252                     *(double *)pxTopOfStack =  101.0101; /* DR1. */
 253                     pxTopOfStack -= 2;
 254                     *(double *)pxTopOfStack = 9876.54321;/* DR0. */
 255                 }
 256             #else /* ifdef USE_FULL_REGISTER_INITIALISATION */
 257                 {
 258                     pxTopOfStack -= portDPFPU_DATA_REGISTER_WORDS;
 259                     memset( pxTopOfStack, 0x00, portDPFPU_DATA_REGISTER_WORDS * sizeof( StackType_t ) );
 260                 }
 261             #endif /* ifdef USE_FULL_REGISTER_INITIALISATION */
 262             pxTopOfStack--;
 263             *pxTopOfStack = portINITIAL_DECNT; /* DECNT. */
 264             pxTopOfStack--;
 265             *pxTopOfStack = portINITIAL_DCMR;  /* DCMR. */
 266             pxTopOfStack--;
 267             *pxTopOfStack = portINITIAL_DPSW;  /* DPSW. */
 268         }
 269     #elif ( configUSE_TASK_DPFPU_SUPPORT == 0 )
 270         {
 271             /* Omit DPFPU support. */
 272         }
 273     #else /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
 274         {
 275             #error Invalid configUSE_TASK_DPFPU_SUPPORT setting - configUSE_TASK_DPFPU_SUPPORT must be set to 0, 1, 2, or left undefined.
 276         }
 277     #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
 278
 279     return pxTopOfStack;
 280 }
 281 /*-----------------------------------------------------------*/
 282
 283 #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
 284
 285     void vPortTaskUsesDPFPU( void )
 286     {
 287         /* A task is registering the fact that it needs a DPFPU context.  Set the
 288          * DPFPU flag (which is saved as part of the task context). */
 289         ulPortTaskHasDPFPUContext = portHAS_DPFPU_CONTEXT;
 290     }
 291
 292 #endif /* configUSE_TASK_DPFPU_SUPPORT */
 293 /*-----------------------------------------------------------*/
 294
 295 BaseType_t xPortStartScheduler( void )
 296 {
 297     extern void vApplicationSetupTimerInterrupt( void );
 298
 299     /* Use pxCurrentTCB just so it does not get optimised away. */
 300     if( pxCurrentTCB != NULL )
 301     {
 302         /* Call an application function to set up the timer that will generate the
 303          * tick interrupt.  This way the application can decide which peripheral to
 304          * use.  A demo application is provided to show a suitable example. */
 305         vApplicationSetupTimerInterrupt();
 306
 307         /* Enable the software interrupt. */
 308         _IEN( _ICU_SWINT ) = 1;
 309
 310         /* Ensure the software interrupt is clear. */
 311         _IR( _ICU_SWINT ) = 0;
 312
 313         /* Ensure the software interrupt is set to the kernel priority. */
 314         _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
 315
 316         /* Start the first task. */
 317         prvStartFirstTask();
 318     }
 319
 320     /* Should not get here. */
 321     return pdFAIL;
 322 }
 323 /*-----------------------------------------------------------*/
 324
 325 void vPortEndScheduler( void )
 326 {
 327     /* Not implemented in ports where there is nothing to return to.
 328      * Artificially force an assert. */
 329     configASSERT( pxCurrentTCB == NULL );
 330 }
 331 /*-----------------------------------------------------------*/
 332
 333 static void prvStartFirstTask( void )
 334 {
 335     __asm volatile
 336     (
 337
 338         /* When starting the scheduler there is nothing that needs moving to the
 339          * interrupt stack because the function is not called from an interrupt.
 340          * Just ensure the current stack is the user stack. */
 341         "SETPSW         U                                               \n"\
 342
 343
 344         /* Obtain the location of the stack associated with which ever task
 345          * pxCurrentTCB is currently pointing to. */
 346         "MOV.L          #_pxCurrentTCB, R15             \n"\
 347         "MOV.L          [R15], R15                              \n"\
 348         "MOV.L          [R15], R0                               \n"\
 349
 350
 351         /* Restore the registers from the stack of the task pointed to by
 352          * pxCurrentTCB. */
 353
 354         #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
 355
 356             /* The restored ulPortTaskHasDPFPUContext is to be zero here.
 357              * So, it is never necessary to restore the DPFPU context here. */
 358             "POP                R15                                                                     \n"\
 359             "MOV.L              #_ulPortTaskHasDPFPUContext, R14        \n"\
 360             "MOV.L              R15, [R14]                                                      \n"\
 361
 362         #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
 363
 364             /* Restore the DPFPU context. */
 365             "DPOPM.L    DPSW-DECNT                              \n"\
 366             "DPOPM.D    DR0-DR15                                \n"\
 367
 368         #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
 369
 370         "POP            R15                                             \n"\
 371
 372         /* Accumulator low 32 bits. */
 373         "MVTACLO        R15, A0                                 \n"\
 374         "POP            R15                                             \n"\
 375
 376         /* Accumulator high 32 bits. */
 377         "MVTACHI        R15, A0                                 \n"\
 378         "POP            R15                                             \n"\
 379
 380         /* Accumulator guard. */
 381         "MVTACGU        R15, A0                                 \n"\
 382         "POP            R15                                             \n"\
 383
 384         /* Accumulator low 32 bits. */
 385         "MVTACLO        R15, A1                                 \n"\
 386         "POP            R15                                             \n"\
 387
 388         /* Accumulator high 32 bits. */
 389         "MVTACHI        R15, A1                                 \n"\
 390         "POP            R15                                             \n"\
 391
 392         /* Accumulator guard. */
 393         "MVTACGU        R15, A1                                 \n"\
 394         "POP            R15                                             \n"\
 395
 396         /* Floating point status word. */
 397         "MVTC           R15, FPSW                               \n"\
 398
 399         /* R1 to R15 - R0 is not included as it is the SP. */
 400         "POPM           R1-R15                                  \n"\
 401
 402         /* This pops the remaining registers. */
 403         "RTE                                                            \n"\
 404         "NOP                                                            \n"\
 405         "NOP                                                            \n"
 406     );
 407 }
 408 /*-----------------------------------------------------------*/
 409
 410 void vSoftwareInterruptISR( void )
 411 {
 412     __asm volatile
 413     (
 414         /* Re-enable interrupts. */
 415         "SETPSW         I                                                       \n"\
 416
 417
 418         /* Move the data that was automatically pushed onto the interrupt stack when
 419          * the interrupt occurred from the interrupt stack to the user stack.
 420          *
 421          * R15 is saved before it is clobbered. */
 422         "PUSH.L         R15                                                     \n"\
 423
 424         /* Read the user stack pointer. */
 425         "MVFC           USP, R15                                        \n"\
 426
 427         /* Move the address down to the data being moved. */
 428         "SUB            #12, R15                                        \n"\
 429         "MVTC           R15, USP                                        \n"\
 430
 431         /* Copy the data across, R15, then PC, then PSW. */
 432         "MOV.L          [ R0 ], [ R15 ]                         \n"\
 433         "MOV.L          4[ R0 ], 4[ R15 ]                       \n"\
 434         "MOV.L          8[ R0 ], 8[ R15 ]                       \n"\
 435
 436         /* Move the interrupt stack pointer to its new correct position. */
 437         "ADD            #12, R0                                         \n"\
 438
 439         /* All the rest of the registers are saved directly to the user stack. */
 440         "SETPSW         U                                                       \n"\
 441
 442         /* Save the rest of the general registers (R15 has been saved already). */
 443         "PUSHM          R1-R14                                          \n"\
 444
 445         /* Save the FPSW and accumulators. */
 446         "MVFC           FPSW, R15                                       \n"\
 447         "PUSH.L         R15                                                     \n"\
 448         "MVFACGU        #0, A1, R15                                     \n"\
 449         "PUSH.L         R15                                                     \n"\
 450         "MVFACHI        #0, A1, R15                                     \n"\
 451         "PUSH.L         R15                                                     \n"\
 452         "MVFACLO        #0, A1, R15                                     \n" /* Low order word. */ \
 453         "PUSH.L         R15                                                     \n"\
 454         "MVFACGU        #0, A0, R15                                     \n"\
 455         "PUSH.L         R15                                                     \n"\
 456         "MVFACHI        #0, A0, R15                                     \n"\
 457         "PUSH.L         R15                                                     \n"\
 458         "MVFACLO        #0, A0, R15                                     \n" /* Low order word. */ \
 459         "PUSH.L         R15                                                     \n"\
 460
 461         #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
 462
 463             /* Does the task have a DPFPU context that needs saving?  If
 464              * ulPortTaskHasDPFPUContext is 0 then no. */
 465             "MOV.L              #_ulPortTaskHasDPFPUContext, R15        \n"\
 466             "MOV.L              [R15], R15                                                      \n"\
 467             "CMP                #0, R15                                                         \n"\
 468
 469             /* Save the DPFPU context, if any. */
 470             "BEQ.B              ?+                                                      \n"\
 471             "DPUSHM.D   DR0-DR15                                        \n"\
 472             "DPUSHM.L   DPSW-DECNT                                      \n"\
 473             "?:                                                                         \n"\
 474
 475             /* Save ulPortTaskHasDPFPUContext itself. */
 476             "PUSH.L             R15                                                     \n"\
 477
 478         #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
 479
 480             /* Save the DPFPU context, always. */
 481             "DPUSHM.D   DR0-DR15                                        \n"\
 482             "DPUSHM.L   DPSW-DECNT                                      \n"\
 483
 484         #endif /* if ( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
 485
 486
 487         /* Save the stack pointer to the TCB. */
 488         "MOV.L          #_pxCurrentTCB, R15                     \n"\
 489         "MOV.L          [ R15 ], R15                            \n"\
 490         "MOV.L          R0, [ R15 ]                                     \n"\
 491
 492
 493         /* Ensure the interrupt mask is set to the syscall priority while the kernel
 494          * structures are being accessed. */
 495         "MVTIPL         %0                                                      \n"\
 496
 497         /* Select the next task to run. */
 498         "BSR.A          _vTaskSwitchContext                     \n"\
 499
 500         /* Reset the interrupt mask as no more data structure access is required. */
 501         "MVTIPL         %1                                                      \n"\
 502
 503
 504         /* Load the stack pointer of the task that is now selected as the Running
 505          * state task from its TCB. */
 506         "MOV.L          #_pxCurrentTCB,R15                      \n"\
 507         "MOV.L          [ R15 ], R15                            \n"\
 508         "MOV.L          [ R15 ], R0                                     \n"\
 509
 510
 511         /* Restore the context of the new task.  The PSW (Program Status Word) and
 512          * PC will be popped by the RTE instruction. */
 513
 514         #if ( configUSE_TASK_DPFPU_SUPPORT == 1 )
 515
 516             /* Is there a DPFPU context to restore?  If the restored
 517              * ulPortTaskHasDPFPUContext is zero then no. */
 518             "POP                R15                                                                     \n"\
 519             "MOV.L              #_ulPortTaskHasDPFPUContext, R14        \n"\
 520             "MOV.L              R15, [R14]                                                      \n"\
 521             "CMP                #0, R15                                                         \n"\
 522
 523             /* Restore the DPFPU context, if any. */
 524             "BEQ.B              ?+                                                      \n"\
 525             "DPOPM.L    DPSW-DECNT                                      \n"\
 526             "DPOPM.D    DR0-DR15                                        \n"\
 527             "?:                                                                         \n"\
 528
 529         #elif ( configUSE_TASK_DPFPU_SUPPORT == 2 )
 530
 531             /* Restore the DPFPU context, always. */
 532             "DPOPM.L    DPSW-DECNT                                      \n"\
 533             "DPOPM.D    DR0-DR15                                        \n"\
 534
 535         #endif /* if( configUSE_TASK_DPFPU_SUPPORT == 1 ) */
 536
 537         "POP            R15                                                     \n"\
 538
 539         /* Accumulator low 32 bits. */
 540         "MVTACLO        R15, A0                                         \n"\
 541         "POP            R15                                                     \n"\
 542
 543         /* Accumulator high 32 bits. */
 544         "MVTACHI        R15, A0                                         \n"\
 545         "POP            R15                                                     \n"\
 546
 547         /* Accumulator guard. */
 548         "MVTACGU        R15, A0                                         \n"\
 549         "POP            R15                                                     \n"\
 550
 551         /* Accumulator low 32 bits. */
 552         "MVTACLO        R15, A1                                         \n"\
 553         "POP            R15                                                     \n"\
 554
 555         /* Accumulator high 32 bits. */
 556         "MVTACHI        R15, A1                                         \n"\
 557         "POP            R15                                                     \n"\
 558
 559         /* Accumulator guard. */
 560         "MVTACGU        R15, A1                                         \n"\
 561         "POP            R15                                                     \n"\
 562         "MVTC           R15, FPSW                                       \n"\
 563         "POPM           R1-R15                                          \n"\
 564         "RTE                                                                    \n"\
 565         "NOP                                                                    \n"\
 566         "NOP                                                                      "
 567         ::"i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ), "i" ( configKERNEL_INTERRUPT_PRIORITY )
 568     );
 569 }
 570 /*-----------------------------------------------------------*/
 571
 572 void vTickISR( void )
 573 {
 574     /* Re-enabled interrupts. */
 575     __asm volatile ( "SETPSW    I");
 576
 577     /* Increment the tick, and perform any processing the new tick value
 578      * necessitates.  Ensure IPL is at the max syscall value first. */
 579     portMASK_INTERRUPTS_FROM_KERNEL_ISR();
 580     {
 581         if( xTaskIncrementTick() != pdFALSE )
 582         {
 583             taskYIELD();
 584         }
 585     }
 586     portUNMASK_INTERRUPTS_FROM_KERNEL_ISR();
 587 }
 588 /*-----------------------------------------------------------*/
 589
 590 uint32_t ulPortGetIPL( void )
 591 {
 592     __asm volatile
 593     (
 594         "MVFC   PSW, R1                 \n"\
 595         "SHLR   #24, R1                 \n"\
 596         "RTS                                      "
 597     );
 598
 599     /* This will never get executed, but keeps the compiler from complaining. */
 600     return 0;
 601 }
 602 /*-----------------------------------------------------------*/
 603
 604 void vPortSetIPL( uint32_t ulNewIPL )
 605 {
 606     /* Avoid compiler warning about unreferenced parameter. */
 607     ( void ) ulNewIPL;
 608
 609     __asm volatile
 610     (
 611         "PUSH   R5                              \n"\
 612         "MVFC   PSW, R5                 \n"\
 613         "SHLL   #24, R1                 \n"\
 614         "AND    #-0F000001H, R5 \n"\
 615         "OR             R1, R5                  \n"\
 616         "MVTC   R5, PSW                 \n"\
 617         "POP    R5                              \n"\
 618         "RTS                                      "
 619     );
 620 }
 621 /*-----------------------------------------------------------*/