2 * FreeRTOS SMP Kernel V202110.00
3 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
6 * this software and associated documentation files (the "Software"), to deal in
7 * the Software without restriction, including without limitation the rights to
8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
9 * the Software, and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in all
13 * copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 * https://www.FreeRTOS.org
23 * https://github.com/FreeRTOS
35 /*------------------------------------------------------------------------------
36 * Port specific definitions.
38 * The settings in this file configure FreeRTOS correctly for the given hardware
41 * These settings should not be altered.
42 *------------------------------------------------------------------------------
45 #ifndef configENABLE_FPU
46 #error configENABLE_FPU must be defined in FreeRTOSConfig.h. Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.
47 #endif /* configENABLE_FPU */
49 #ifndef configENABLE_MPU
50 #error configENABLE_MPU must be defined in FreeRTOSConfig.h. Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.
51 #endif /* configENABLE_MPU */
53 #ifndef configENABLE_TRUSTZONE
54 #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h. Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.
55 #endif /* configENABLE_TRUSTZONE */
57 /*-----------------------------------------------------------*/
60 * @brief Type definitions.
63 #define portFLOAT float
64 #define portDOUBLE double
66 #define portSHORT short
67 #define portSTACK_TYPE uint32_t
68 #define portBASE_TYPE long
70 typedef portSTACK_TYPE StackType_t;
71 typedef long BaseType_t;
72 typedef unsigned long UBaseType_t;
74 #if ( configUSE_16_BIT_TICKS == 1 )
75 typedef uint16_t TickType_t;
76 #define portMAX_DELAY ( TickType_t ) 0xffff
78 typedef uint32_t TickType_t;
79 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
81 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
82 * not need to be guarded with a critical section. */
83 #define portTICK_TYPE_IS_ATOMIC 1
85 /*-----------------------------------------------------------*/
88 * Architecture specifics.
90 #define portARCH_NAME "Cortex-M23"
91 #define portSTACK_GROWTH ( -1 )
92 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
93 #define portBYTE_ALIGNMENT 8
95 #define portINLINE __inline
96 #ifndef portFORCE_INLINE
97 #define portFORCE_INLINE inline __attribute__( ( always_inline ) )
99 #define portHAS_STACK_OVERFLOW_CHECKING 1
100 #define portDONT_DISCARD __attribute__( ( used ) )
101 /*-----------------------------------------------------------*/
104 * @brief Extern declarations.
106 extern BaseType_t xPortIsInsideInterrupt( void );
108 extern void vPortYield( void ) /* PRIVILEGED_FUNCTION */;
110 extern void vPortEnterCritical( void ) /* PRIVILEGED_FUNCTION */;
111 extern void vPortExitCritical( void ) /* PRIVILEGED_FUNCTION */;
113 extern uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
114 extern void vClearInterruptMask( uint32_t ulMask ) /* __attribute__(( naked )) PRIVILEGED_FUNCTION */;
116 #if ( configENABLE_TRUSTZONE == 1 )
117 extern void vPortAllocateSecureContext( uint32_t ulSecureStackSize ); /* __attribute__ (( naked )) */
118 extern void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */;
119 #endif /* configENABLE_TRUSTZONE */
121 #if ( configENABLE_MPU == 1 )
122 extern BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */;
123 extern void vResetPrivilege( void ) /* __attribute__ (( naked )) */;
124 #endif /* configENABLE_MPU */
125 /*-----------------------------------------------------------*/
128 * @brief MPU specific constants.
130 #if ( configENABLE_MPU == 1 )
131 #define portUSING_MPU_WRAPPERS 1
132 #define portPRIVILEGE_BIT ( 0x80000000UL )
134 #define portPRIVILEGE_BIT ( 0x0UL )
135 #endif /* configENABLE_MPU */
139 #define portPRIVILEGED_FLASH_REGION ( 0UL )
140 #define portUNPRIVILEGED_FLASH_REGION ( 1UL )
141 #define portUNPRIVILEGED_SYSCALLS_REGION ( 2UL )
142 #define portPRIVILEGED_RAM_REGION ( 3UL )
143 #define portSTACK_REGION ( 4UL )
144 #define portFIRST_CONFIGURABLE_REGION ( 5UL )
145 #define portLAST_CONFIGURABLE_REGION ( 7UL )
146 #define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
147 #define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
149 /* Device memory attributes used in MPU_MAIR registers.
151 * 8-bit values encoded as follows:
152 * Bit[7:4] - 0000 - Device Memory
153 * Bit[3:2] - 00 --> Device-nGnRnE
154 * 01 --> Device-nGnRE
157 * Bit[1:0] - 00, Reserved.
159 #define portMPU_DEVICE_MEMORY_nGnRnE ( 0x00 ) /* 0000 0000 */
160 #define portMPU_DEVICE_MEMORY_nGnRE ( 0x04 ) /* 0000 0100 */
161 #define portMPU_DEVICE_MEMORY_nGRE ( 0x08 ) /* 0000 1000 */
162 #define portMPU_DEVICE_MEMORY_GRE ( 0x0C ) /* 0000 1100 */
164 /* Normal memory attributes used in MPU_MAIR registers. */
165 #define portMPU_NORMAL_MEMORY_NON_CACHEABLE ( 0x44 ) /* Non-cacheable. */
166 #define portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE ( 0xFF ) /* Non-Transient, Write-back, Read-Allocate and Write-Allocate. */
168 /* Attributes used in MPU_RBAR registers. */
169 #define portMPU_REGION_NON_SHAREABLE ( 0UL << 3UL )
170 #define portMPU_REGION_INNER_SHAREABLE ( 1UL << 3UL )
171 #define portMPU_REGION_OUTER_SHAREABLE ( 2UL << 3UL )
173 #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0UL << 1UL )
174 #define portMPU_REGION_READ_WRITE ( 1UL << 1UL )
175 #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 2UL << 1UL )
176 #define portMPU_REGION_READ_ONLY ( 3UL << 1UL )
178 #define portMPU_REGION_EXECUTE_NEVER ( 1UL )
179 /*-----------------------------------------------------------*/
182 * @brief Settings to define an MPU region.
184 typedef struct MPURegionSettings
186 uint32_t ulRBAR; /**< RBAR for the region. */
187 uint32_t ulRLAR; /**< RLAR for the region. */
188 } MPURegionSettings_t;
191 * @brief MPU settings as stored in the TCB.
193 typedef struct MPU_SETTINGS
195 uint32_t ulMAIR0; /**< MAIR0 for the task containing attributes for all the 4 per task regions. */
196 MPURegionSettings_t xRegionsSettings[ portTOTAL_NUM_REGIONS ]; /**< Settings for 4 per task regions. */
198 /*-----------------------------------------------------------*/
201 * @brief SVC numbers.
203 #define portSVC_ALLOCATE_SECURE_CONTEXT 0
204 #define portSVC_FREE_SECURE_CONTEXT 1
205 #define portSVC_START_SCHEDULER 2
206 #define portSVC_RAISE_PRIVILEGE 3
207 /*-----------------------------------------------------------*/
210 * @brief Scheduler utilities.
212 #define portYIELD() vPortYield()
213 #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
214 #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
215 #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
216 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
217 /*-----------------------------------------------------------*/
220 * @brief Critical section management.
222 #define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMask()
223 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMask( x )
224 #define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" )
225 #define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" )
226 #define portENTER_CRITICAL() vPortEnterCritical()
227 #define portEXIT_CRITICAL() vPortExitCritical()
228 /*-----------------------------------------------------------*/
231 * @brief Tickless idle/low power functionality.
233 #ifndef portSUPPRESS_TICKS_AND_SLEEP
234 extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
235 #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
237 /*-----------------------------------------------------------*/
240 * @brief Task function macros as described on the FreeRTOS.org WEB site.
242 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
243 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
244 /*-----------------------------------------------------------*/
246 #if ( configENABLE_TRUSTZONE == 1 )
249 * @brief Allocate a secure context for the task.
251 * Tasks are not created with a secure context. Any task that is going to call
252 * secure functions must call portALLOCATE_SECURE_CONTEXT() to allocate itself a
253 * secure context before it calls any secure function.
255 * @param[in] ulSecureStackSize The size of the secure stack to be allocated.
257 #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) vPortAllocateSecureContext( ulSecureStackSize )
260 * @brief Called when a task is deleted to delete the task's secure context,
263 * @param[in] pxTCB The TCB of the task being deleted.
265 #define portCLEAN_UP_TCB( pxTCB ) vPortFreeSecureContext( ( uint32_t * ) pxTCB )
267 #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize )
268 #define portCLEAN_UP_TCB( pxTCB )
269 #endif /* configENABLE_TRUSTZONE */
270 /*-----------------------------------------------------------*/
272 #if ( configENABLE_MPU == 1 )
275 * @brief Checks whether or not the processor is privileged.
277 * @return 1 if the processor is already privileged, 0 otherwise.
279 #define portIS_PRIVILEGED() xIsPrivileged()
282 * @brief Raise an SVC request to raise privilege.
284 * The SVC handler checks that the SVC was raised from a system call and only
285 * then it raises the privilege. If this is called from any other place,
286 * the privilege is not raised.
288 #define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" ::"i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );
291 * @brief Lowers the privilege level by setting the bit 0 of the CONTROL
294 #define portRESET_PRIVILEGE() vResetPrivilege()
296 #define portIS_PRIVILEGED()
297 #define portRAISE_PRIVILEGE()
298 #define portRESET_PRIVILEGE()
299 #endif /* configENABLE_MPU */
300 /*-----------------------------------------------------------*/
305 #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
306 /*-----------------------------------------------------------*/
312 #endif /* PORTMACRO_H */